[PATCH net-next] net: phy: realtek: Add support for RTL8221B-CG series
Realtek single-port 2.5Gbps Ethernet PHYs are list as below:
RTL8226-CG: the 1st generation 2.5Gbps single port PHY
RTL8226B-CG/RTL8221B-CG: the 2nd generation 2.5Gbps single port PHY
RTL8221B-VB-CG: the 3rd generation 2.5Gbps single port PHY
RTL8221B-VM-CG: the 2.5Gbps single port PHY with MACsec feature
This patch adds the minimal drivers to manage these transceivers.
Signed-off-by: Willy Liu
---
drivers/net/phy/realtek.c | 40
1 file changed, 40 insertions(+)
mode change 100644 => 100755 drivers/net/phy/realtek.c
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
old mode 100644
new mode 100755
index fb1db71..2ba0d73
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -660,6 +660,46 @@ static int rtlgen_resume(struct phy_device *phydev)
.read_mmd = rtl822x_read_mmd,
.write_mmd = rtl822x_write_mmd,
}, {
+ PHY_ID_MATCH_EXACT(0x001cc838),
+ .name = "RTL8226-CG 2.5Gbps PHY",
+ .get_features = rtl822x_get_features,
+ .config_aneg= rtl822x_config_aneg,
+ .read_status= rtl822x_read_status,
+ .suspend= genphy_suspend,
+ .resume = rtlgen_resume,
+ .read_page = rtl821x_read_page,
+ .write_page = rtl821x_write_page,
+ }, {
+ PHY_ID_MATCH_EXACT(0x001cc848),
+ .name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
+ .get_features = rtl822x_get_features,
+ .config_aneg= rtl822x_config_aneg,
+ .read_status= rtl822x_read_status,
+ .suspend= genphy_suspend,
+ .resume = rtlgen_resume,
+ .read_page = rtl821x_read_page,
+ .write_page = rtl821x_write_page,
+ }, {
+ PHY_ID_MATCH_EXACT(0x001cc849),
+ .name = "RTL8221B-VB-CG 2.5Gbps PHY",
+ .get_features = rtl822x_get_features,
+ .config_aneg= rtl822x_config_aneg,
+ .read_status= rtl822x_read_status,
+ .suspend= genphy_suspend,
+ .resume = rtlgen_resume,
+ .read_page = rtl821x_read_page,
+ .write_page = rtl821x_write_page,
+ }, {
+ PHY_ID_MATCH_EXACT(0x001cc84a),
+ .name = "RTL8221B-VM-CG 2.5Gbps PHY",
+ .get_features = rtl822x_get_features,
+ .config_aneg= rtl822x_config_aneg,
+ .read_status= rtl822x_read_status,
+ .suspend= genphy_suspend,
+ .resume = rtlgen_resume,
+ .read_page = rtl821x_read_page,
+ .write_page = rtl821x_write_page,
+ }, {
PHY_ID_MATCH_EXACT(0x001cc961),
.name = "RTL8366RB Gigabit Ethernet",
.config_init= _config_init,
--
1.9.1
RE: [PATCH v6 2/5] iommu: Use bus iommu ops for aux related callback
> From: Lu Baolu
> Sent: Friday, October 30, 2020 12:58 PM
>
> The aux-domain apis were designed for macro driver where the subdevices
> are created and used inside a device driver. Use the device's bus iommu
> ops instead of that in iommu domain for various callbacks.
IIRC there are only two users on these apis. One is VFIO, and the other
is on the ARM side (not checked in yet). Jean, can you help confirm
whether ARM-side usage still relies on aux apis even with this change?
If no, possibly they can be removed completely?
Thanks
Kevin
>
> Signed-off-by: Lu Baolu
> ---
> drivers/iommu/iommu.c | 16 ++--
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
> index 6bbdd959f9f3..17f2686664db 100644
> --- a/drivers/iommu/iommu.c
> +++ b/drivers/iommu/iommu.c
> @@ -2913,10 +2913,11 @@
> EXPORT_SYMBOL_GPL(iommu_dev_feature_enabled);
> */
> int iommu_aux_attach_device(struct iommu_domain *domain, struct device
> *dev)
> {
> + const struct iommu_ops *ops = dev->bus->iommu_ops;
> int ret = -ENODEV;
>
> - if (domain->ops->aux_attach_dev)
> - ret = domain->ops->aux_attach_dev(domain, dev);
> + if (ops && ops->aux_attach_dev)
> + ret = ops->aux_attach_dev(domain, dev);
>
> if (!ret)
> trace_attach_device_to_domain(dev);
> @@ -2927,8 +2928,10 @@
> EXPORT_SYMBOL_GPL(iommu_aux_attach_device);
>
> void iommu_aux_detach_device(struct iommu_domain *domain, struct
> device *dev)
> {
> - if (domain->ops->aux_detach_dev) {
> - domain->ops->aux_detach_dev(domain, dev);
> + const struct iommu_ops *ops = dev->bus->iommu_ops;
> +
> + if (ops && ops->aux_detach_dev) {
> + ops->aux_detach_dev(domain, dev);
> trace_detach_device_from_domain(dev);
> }
> }
> @@ -2936,10 +2939,11 @@
> EXPORT_SYMBOL_GPL(iommu_aux_detach_device);
>
> int iommu_aux_get_pasid(struct iommu_domain *domain, struct device
> *dev)
> {
> + const struct iommu_ops *ops = dev->bus->iommu_ops;
> int ret = -ENODEV;
>
> - if (domain->ops->aux_get_pasid)
> - ret = domain->ops->aux_get_pasid(domain, dev);
> + if (ops && ops->aux_get_pasid)
> + ret = ops->aux_get_pasid(domain, dev);
>
> return ret;
> }
> --
> 2.25.1
[PATCH 2/2] media: rockchip: rkisp1: destage Rockchip ISP1 driver
All the items in the TODO list were addressed, uapi was reviewed,
documentation written, checkpatch errors fixed, several bugs fixed.
There is no big reason to keep this driver in staging, so move it out.
Signed-off-by: Helen Koike
---
.../media/v4l/pixfmt-meta-rkisp1.rst | 2 +-
drivers/media/platform/Kconfig| 18 ++
drivers/media/platform/Makefile | 1 +
.../platform/rockchip}/rkisp1/Makefile| 0
.../rockchip}/rkisp1/rkisp1-capture.c | 0
.../platform/rockchip}/rkisp1/rkisp1-common.c | 0
.../platform/rockchip}/rkisp1/rkisp1-common.h | 2 +-
.../platform/rockchip}/rkisp1/rkisp1-dev.c| 0
.../platform/rockchip}/rkisp1/rkisp1-isp.c| 0
.../platform/rockchip}/rkisp1/rkisp1-params.c | 0
.../platform/rockchip}/rkisp1/rkisp1-regs.h | 0
.../rockchip}/rkisp1/rkisp1-resizer.c | 0
.../platform/rockchip}/rkisp1/rkisp1-stats.c | 0
drivers/staging/media/Kconfig | 2 --
drivers/staging/media/Makefile| 1 -
drivers/staging/media/rkisp1/Kconfig | 19 ---
drivers/staging/media/rkisp1/TODO | 6 --
.../uapi/linux}/rkisp1-config.h | 0
18 files changed, 21 insertions(+), 30 deletions(-)
rename drivers/{staging/media => media/platform/rockchip}/rkisp1/Makefile
(100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-capture.c (100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-common.c (100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-common.h (99%)
rename drivers/{staging/media => media/platform/rockchip}/rkisp1/rkisp1-dev.c
(100%)
rename drivers/{staging/media => media/platform/rockchip}/rkisp1/rkisp1-isp.c
(100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-params.c (100%)
rename drivers/{staging/media => media/platform/rockchip}/rkisp1/rkisp1-regs.h
(100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-resizer.c (100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-stats.c (100%)
delete mode 100644 drivers/staging/media/rkisp1/Kconfig
delete mode 100644 drivers/staging/media/rkisp1/TODO
rename {drivers/staging/media/rkisp1/uapi =>
include/uapi/linux}/rkisp1-config.h (100%)
diff --git a/Documentation/userspace-api/media/v4l/pixfmt-meta-rkisp1.rst
b/Documentation/userspace-api/media/v4l/pixfmt-meta-rkisp1.rst
index 7e43837ed260a..f3671472d4105 100644
--- a/Documentation/userspace-api/media/v4l/pixfmt-meta-rkisp1.rst
+++ b/Documentation/userspace-api/media/v4l/pixfmt-meta-rkisp1.rst
@@ -46,4 +46,4 @@ important tuning tools using software control loop.
rkisp1 uAPI data types
==
-.. kernel-doc:: drivers/staging/media/rkisp1/uapi/rkisp1-config.h
+.. kernel-doc:: include/uapi/linux/rkisp1-config.h
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index a3cb104956d56..202d447759fd8 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -448,6 +448,24 @@ config VIDEO_RENESAS_VSP1
To compile this driver as a module, choose M here: the module
will be called vsp1.
+config VIDEO_ROCKCHIP_ISP1
+ tristate "Rockchip Image Signal Processing v1 Unit driver"
+ depends on VIDEO_V4L2 && OF
+ depends on ARCH_ROCKCHIP || COMPILE_TEST
+ select MEDIA_CONTROLLER
+ select VIDEO_V4L2_SUBDEV_API
+ select VIDEOBUF2_DMA_CONTIG
+ select VIDEOBUF2_VMALLOC
+ select V4L2_FWNODE
+ select GENERIC_PHY_MIPI_DPHY
+ default n
+ help
+ Enable this to support the Image Signal Processing (ISP) module
+ present in RK3399 SoCs.
+
+ To compile this driver as a module, choose M here: the module
+ will be called rockchip-isp1.
+
config VIDEO_ROCKCHIP_RGA
tristate "Rockchip Raster 2d Graphic Acceleration Unit"
depends on VIDEO_DEV && VIDEO_V4L2
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index 62b6cdc8c7300..b342714228db4 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_VIDEO_RENESAS_FDP1) += rcar_fdp1.o
obj-$(CONFIG_VIDEO_RENESAS_JPU)+= rcar_jpu.o
obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1/
+obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += rockchip/rkisp1/
obj-$(CONFIG_VIDEO_ROCKCHIP_RGA) += rockchip/rga/
obj-y += omap/
diff --git a/drivers/staging/media/rkisp1/Makefile
b/drivers/media/platform/rockchip/rkisp1/Makefile
similarity index 100%
rename from drivers/staging/media/rkisp1/Makefile
rename to drivers/media/platform/rockchip/rkisp1/Makefile
diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c
b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
similarity index 100%
rename from drivers/staging/media/rkisp1/rkisp1-capture.c
rename
[PATCH 0/2] destage Rockchip ISP1 driver
Hello,
I think it is time to move this driver out of staging.
Thanks all who contributed, specially to Dafna, who put a lot of
effort addressing all the items in the TODO list, fixing bugs,
cleaning the code, addressing past comments and testing.
Please, review the driver, see if there is any other thing that should
be addressed before this change.
> media-ctl -p
http://ix.io/2Cso
> media-ctl --print-dot
http://ix.io/2Csp
> v4l2-compliance -m0
http://ix.io/2Csk
> v4l2-compliance -v -d /dev/video0 -s10
http://ix.io/2Csq
> v4l2-compliance -v -d /dev/video1 -s10
http://ix.io/2Css
This patch depends on the following series:
* media: staging: rkisp1: uapi: add "WITH Linux-syscall-note"
https://patchwork.linuxtv.org/project/linux-media/patch/20201020132514.26651-1-dafna.hirschf...@collabora.com/
* [0/2] media: staging: rkisp1: Fix formats for metadata pads
https://patchwork.linuxtv.org/project/linux-media/cover/20200325212704.29862-1-dafna.hirschf...@collabora.com/
* [v2,1/2] media: uapi: add MEDIA_BUS_FMT_METADATA_FIXED media bus format.
[v2,2/2] media: staging: rkisp1: isp: set metadata pads to
MEDIA_BUS_FMT_METADATA_FIXED
https://patchwork.linuxtv.org/project/linux-media/patch/20201020154522.654-1-dafna.hirschf...@collabora.com/
* [0/6] media: staging: rkisp1: improvements
https://patchwork.linuxtv.org/project/linux-media/cover/20201002184222.7094-1-dafna.hirschf...@collabora.com/
* [0/4] media: staging: rkisp1: send cleanups and checkpatch fixes
https://patchwork.linuxtv.org/project/linux-media/cover/20201019205956.6980-1-dafna.hirschf...@collabora.com/
* media: staging: rkisp1: capture: set default quantization on 'set_fmt'
https://patchwork.linuxtv.org/project/linux-media/patch/20201026162848.18310-1-dafna.hirschf...@collabora.com/
* media: staging: rkisp1: remove TODO item to document quantization handling
https://patchwork.linuxtv.org/project/linux-media/patch/20200928152809.27490-1-dafna.hirschf...@collabora.com/
* [v2] media: staging: rkisp1: cap: refactor enable/disable stream to allow
multistreaming
https://patchwork.linuxtv.org/project/linux-media/patch/20201019160434.877568-1-helen.ko...@collabora.com/
* [v6,0/9] move Rockchip ISP bindings out of staging / add ISP DT nodes for
RK3399
https://patchwork.linuxtv.org/project/linux-media/patch/20201020193850.1460644-2-helen.ko...@collabora.com/
You can also see all of them applied in this branch:
https://gitlab.collabora.com/koike/linux/-/tree/rockchip/isp/destage
Thanks
Helen
Helen Koike (1):
media: rockchip: rkisp1: destage Rockchip ISP1 driver
Shunqian Zheng (1):
media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
.../media/v4l/pixfmt-meta-rkisp1.rst | 2 +-
drivers/media/platform/Kconfig| 18 ++
drivers/media/platform/Makefile | 1 +
.../platform/rockchip}/rkisp1/Makefile| 0
.../rockchip}/rkisp1/rkisp1-capture.c | 0
.../platform/rockchip}/rkisp1/rkisp1-common.c | 0
.../platform/rockchip}/rkisp1/rkisp1-common.h | 2 +-
.../platform/rockchip}/rkisp1/rkisp1-dev.c| 0
.../platform/rockchip}/rkisp1/rkisp1-isp.c| 0
.../platform/rockchip}/rkisp1/rkisp1-params.c | 0
.../platform/rockchip}/rkisp1/rkisp1-regs.h | 0
.../rockchip}/rkisp1/rkisp1-resizer.c | 0
.../platform/rockchip}/rkisp1/rkisp1-stats.c | 0
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
drivers/staging/media/Kconfig | 2 --
drivers/staging/media/Makefile| 1 -
drivers/staging/media/rkisp1/Kconfig | 19 ---
drivers/staging/media/rkisp1/TODO | 6 --
.../uapi/linux}/rkisp1-config.h | 4
include/uapi/linux/videodev2.h| 4
20 files changed, 27 insertions(+), 34 deletions(-)
rename drivers/{staging/media => media/platform/rockchip}/rkisp1/Makefile
(100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-capture.c (100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-common.c (100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-common.h (99%)
rename drivers/{staging/media => media/platform/rockchip}/rkisp1/rkisp1-dev.c
(100%)
rename drivers/{staging/media => media/platform/rockchip}/rkisp1/rkisp1-isp.c
(100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-params.c (100%)
rename drivers/{staging/media => media/platform/rockchip}/rkisp1/rkisp1-regs.h
(100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-resizer.c (100%)
rename drivers/{staging/media =>
media/platform/rockchip}/rkisp1/rkisp1-stats.c (100%)
delete mode 100644 drivers/staging/media/rkisp1/Kconfig
delete mode 100644 drivers/staging/media/rkisp1/TODO
rename {drivers/staging/media/rkisp1/uapi =>
include/uapi/linux}/rkisp1-config.h (99%)
--
2.28.0
[PATCH 1/2] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
From: Shunqian Zheng
Add the Rockchip ISP1 specific processing parameter format
V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
Signed-off-by: Helen Koike
Reviewed-by: Laurent Pinchart
---
Hello,
This patch is a continuation of:
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20191106120132.6876-2-helen.ko...@collabora.com/
These formats are already documented under
Documentation/userspace-api/media/v4l/pixfmt-meta-rkisp1.rst
We had agreed to keep under
drivers/staging/media/rkisp1/uapi/rkisp1-config.h while the driver was
in staging, since we are moving it out of staging, I guess this is the
time :)
Regards,
Helen
---
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
drivers/staging/media/rkisp1/uapi/rkisp1-config.h | 4
include/uapi/linux/videodev2.h| 4
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c
b/drivers/media/v4l2-core/v4l2-ioctl.c
index eeff398fbdcc1..202597d031c6b 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1402,6 +1402,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_META_FMT_UVC: descr = "UVC Payload Header Metadata";
break;
case V4L2_META_FMT_D4XX:descr = "Intel D4xx UVC Metadata";
break;
case V4L2_META_FMT_VIVID: descr = "Vivid Metadata"; break;
+ case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A
params"; break;
+ case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A
statistics"; break;
default:
/* Compressed formats */
diff --git a/drivers/staging/media/rkisp1/uapi/rkisp1-config.h
b/drivers/staging/media/rkisp1/uapi/rkisp1-config.h
index 8d906cc7da8fc..6e449e7842605 100644
--- a/drivers/staging/media/rkisp1/uapi/rkisp1-config.h
+++ b/drivers/staging/media/rkisp1/uapi/rkisp1-config.h
@@ -9,10 +9,6 @@
#include
-/* Vendor specific - used for RK_ISP1 camera sub-system */
-#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /*
Rockchip ISP1 params */
-#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /*
Rockchip ISP1 3A statistics */
-
/* Defect Pixel Cluster Detection */
#define RKISP1_CIF_ISP_MODULE_DPCC (1U << 0)
/* Black Level Subtraction */
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 534eaa4d39bc8..c2e13ba81196b 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -770,6 +770,10 @@ struct v4l2_pix_format {
#define V4L2_META_FMT_D4XXv4l2_fourcc('D', '4', 'X', 'X') /* D4XX
Payload Header metadata */
#define V4L2_META_FMT_VIVID v4l2_fourcc('V', 'I', 'V', 'D') /* Vivid
Metadata */
+/* Vendor specific - used for RK_ISP1 camera sub-system */
+#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /*
Rockchip ISP1 params */
+#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /*
Rockchip ISP1 3A statistics */
+
/* priv field value to indicates that subsequent fields are valid. */
#define V4L2_PIX_FMT_PRIV_MAGIC0xfeedcafe
--
2.28.0
Re: [PATCH] kunit: tool: fix extra trailing \n in parsed test output
On Thu, Oct 29, 2020 at 7:34 PM David Gow wrote:
>
> On Wed, Oct 21, 2020 at 7:32 AM Daniel Latypov wrote:
> >
> > For simplcity, strip all trailing whitespace from parsed output.
> > I imagine no one is printing out meaningful trailing whitespace via
> > KUNIT_FAIL() or similar, and that if they are, they really shouldn't.
> >
> > At some point, the lines from `isolate_kunit_output()` started having
> > trailing \n, which results in artifacty output like this:
> >
> > $ ./tools/testing/kunit/kunit.py run
> > [16:16:46] [FAILED] example_simple_test
> > [16:16:46] # example_simple_test: EXPECTATION FAILED at
> > lib/kunit/kunit-example-test.c:29
> >
> > [16:16:46] Expected 1 + 1 == 3, but
> >
> > [16:16:46] 1 + 1 == 2
> >
> > [16:16:46] 3 == 3
> >
> > [16:16:46] not ok 1 - example_simple_test
> >
> > [16:16:46]
> >
> > After this change:
> > [16:16:46] # example_simple_test: EXPECTATION FAILED at
> > lib/kunit/kunit-example-test.c:29
> > [16:16:46] Expected 1 + 1 == 3, but
> > [16:16:46] 1 + 1 == 2
> > [16:16:46] 3 == 3
> > [16:16:46] not ok 1 - example_simple_test
> > [16:16:46]
> >
> > Signed-off-by: Daniel Latypov
> > ---
>
> Thanks! This is a long-overdue fix, and it worked well for me.
>
> Tested-by: David Gow
>
> One comment below:
>
> > tools/testing/kunit/kunit_parser.py | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/tools/testing/kunit/kunit_parser.py
> > b/tools/testing/kunit/kunit_parser.py
> > index 8019e3dd4c32..e68b1c66a73f 100644
> > --- a/tools/testing/kunit/kunit_parser.py
> > +++ b/tools/testing/kunit/kunit_parser.py
> > @@ -342,7 +342,8 @@ def parse_run_tests(kernel_output) -> TestResult:
> > total_tests = 0
> > failed_tests = 0
> > crashed_tests = 0
> > - test_result =
> > parse_test_result(list(isolate_kunit_output(kernel_output)))
> > + test_result = parse_test_result(list(
> > +l.rstrip() for l in isolate_kunit_output(kernel_output)))
>
> Could we do this inside isolate_kunit_output() instead? That seems
> like it'd be a more logical place for it (removing the newline is a
> sort of isolating the output), and it'd avoid making this line quite
> as horrifyingly nested.
Good point.
We could either do it on each yield (messy), or before, i.e.
diff --git a/tools/testing/kunit/kunit_parser.py
b/tools/testing/kunit/kunit_parser.py
index 8019e3dd4c32..14d35deb96cd 100644
--- a/tools/testing/kunit/kunit_parser.py
+++ b/tools/testing/kunit/kunit_parser.py
@@ -54,6 +54,7 @@ kunit_end_re = re.compile('(List of all partitions:|'
def isolate_kunit_output(kernel_output):
started = False
for line in kernel_output:
+ line = line.rstrip() # line always has a trailing \n
if kunit_start_re.search(line):
prefix_len = len(line.split('TAP version')[0])
started = True
I had some vague concerns about this as
kunit_start_re = re.compile(r'TAP version [0-9]+$')
has that anchor at the end.
This could ostensibly make it match more things than before.
Since I'm using rstrip() out of laziness, that means strings like
'TAP version 42\t\n'
will now also match.
I don't really think that's an issue, but I'd sent this as a more
conservative change initially.
I can send the diff above as a replacement for this patch.
>
> > if test_result.status == TestStatus.NO_TESTS:
> > print(red('[ERROR] ') + yellow('no tests run!'))
> > elif test_result.status == TestStatus.FAILURE_TO_PARSE_TESTS:
> >
> > base-commit: c4d6fe7311762f2e03b3c27ad38df7c40c80cc93
> > --
> > 2.29.0.rc1.297.gfa9743e501-goog
> >
Re: [PATCH v11 4/4] bus: mhi: Add userspace client interface driver
On 10/29/20 7:45 PM, Hemant Kumar wrote: > diff --git a/drivers/bus/mhi/Kconfig b/drivers/bus/mhi/Kconfig > index e841c10..476cc55 100644 > --- a/drivers/bus/mhi/Kconfig > +++ b/drivers/bus/mhi/Kconfig > @@ -20,3 +20,16 @@ config MHI_BUS_DEBUG > Enable debugfs support for use with the MHI transport. Allows > reading and/or modifying some values within the MHI controller > for debug and test purposes. > + > +config MHI_UCI > + tristate "MHI UCI" > + depends on MHI_BUS > + help > + MHI based Userspace Client Interface (UCI) driver is used for MHI-based > + transferring raw data between host and device using standard file > + operations from userspace. Open, read, write, and close operations > + are supported by this driver. Please check mhi_uci_match_table for also poll according to the documentation. > + all supported channels that are exposed to userspace. > + > + To compile this driver as a module, choose M here: the module will be > + called mhi_uci. -- ~Randy
[PATCH v2] perf data: Allow to use stdio functions for pipe mode
When perf data is in a pipe, it reads each event separately using
read(2) syscall. This is a huge performance bottleneck when
processing large data like in perf inject. Also perf inject needs to
use write(2) syscall for the output.
So convert it to use buffer I/O functions in stdio library for pipe
data. This makes inject-build-id bench time drops from 20ms to 8ms.
$ perf bench internals inject-build-id
# Running 'internals/inject-build-id' benchmark:
Average build-id injection took: 8.074 msec (+- 0.013 msec)
Average time per event: 0.792 usec (+- 0.001 usec)
Average memory usage: 8328 KB (+- 0 KB)
Average build-id-all injection took: 5.490 msec (+- 0.008 msec)
Average time per event: 0.538 usec (+- 0.001 usec)
Average memory usage: 7563 KB (+- 0 KB)
This patch enables it just for perf inject when used with pipe (it's a
default behavior). Maybe we could do it for perf record and/or report
later..
Signed-off-by: Namhyung Kim
---
v2: check result of fdopen()
tools/perf/builtin-inject.c | 2 ++
tools/perf/util/data.c | 41 ++---
tools/perf/util/data.h | 11 +-
tools/perf/util/header.c| 8
tools/perf/util/session.c | 7 ---
5 files changed, 58 insertions(+), 11 deletions(-)
diff --git a/tools/perf/builtin-inject.c b/tools/perf/builtin-inject.c
index 452a75fe68e5..14d6c88fed76 100644
--- a/tools/perf/builtin-inject.c
+++ b/tools/perf/builtin-inject.c
@@ -853,10 +853,12 @@ int cmd_inject(int argc, const char **argv)
.output = {
.path = "-",
.mode = PERF_DATA_MODE_WRITE,
+ .use_stdio = true,
},
};
struct perf_data data = {
.mode = PERF_DATA_MODE_READ,
+ .use_stdio = true,
};
int ret;
diff --git a/tools/perf/util/data.c b/tools/perf/util/data.c
index c47aa34fdc0a..05bbcb663c41 100644
--- a/tools/perf/util/data.c
+++ b/tools/perf/util/data.c
@@ -174,8 +174,21 @@ static bool check_pipe(struct perf_data *data)
is_pipe = true;
}
- if (is_pipe)
- data->file.fd = fd;
+ if (is_pipe) {
+ if (data->use_stdio) {
+ const char *mode;
+
+ mode = perf_data__is_read(data) ? "r" : "w";
+ data->file.fptr = fdopen(fd, mode);
+
+ if (data->file.fptr == NULL) {
+ data->file.fd = fd;
+ data->use_stdio = false;
+ }
+ } else {
+ data->file.fd = fd;
+ }
+ }
return data->is_pipe = is_pipe;
}
@@ -334,6 +347,9 @@ int perf_data__open(struct perf_data *data)
if (check_pipe(data))
return 0;
+ /* currently it allows stdio for pipe only */
+ data->use_stdio = false;
+
if (!data->path)
data->path = "perf.data";
@@ -353,7 +369,21 @@ void perf_data__close(struct perf_data *data)
perf_data__close_dir(data);
zfree(>file.path);
- close(data->file.fd);
+
+ if (data->use_stdio)
+ fclose(data->file.fptr);
+ else
+ close(data->file.fd);
+}
+
+ssize_t perf_data__read(struct perf_data *data, void *buf, size_t size)
+{
+ if (data->use_stdio) {
+ if (fread(buf, size, 1, data->file.fptr) == 1)
+ return size;
+ return feof(data->file.fptr) ? 0 : -1;
+ }
+ return readn(data->file.fd, buf, size);
}
ssize_t perf_data_file__write(struct perf_data_file *file,
@@ -365,6 +395,11 @@ ssize_t perf_data_file__write(struct perf_data_file *file,
ssize_t perf_data__write(struct perf_data *data,
void *buf, size_t size)
{
+ if (data->use_stdio) {
+ if (fwrite(buf, size, 1, data->file.fptr) == 1)
+ return size;
+ return -1;
+ }
return perf_data_file__write(>file, buf, size);
}
diff --git a/tools/perf/util/data.h b/tools/perf/util/data.h
index 75947ef6bc17..c563fcbb0288 100644
--- a/tools/perf/util/data.h
+++ b/tools/perf/util/data.h
@@ -2,6 +2,7 @@
#ifndef __PERF_DATA_H
#define __PERF_DATA_H
+#include
#include
enum perf_data_mode {
@@ -16,7 +17,10 @@ enum perf_dir_version {
struct perf_data_file {
char*path;
- int fd;
+ union {
+ int fd;
+ FILE*fptr;
+ };
unsigned longsize;
};
@@ -26,6 +30,7 @@ struct perf_data {
bool is_pipe;
bool is_dir;
bool force;
+ bool use_stdio;
enum perf_data_mode mode;
struct {
@@ -62,11 +67,15 @@ static inline bool
Ubuntu mainline kernel builds now failing not able to find module.lds file
I typically build cifs.ko for testing using the latest Ubuntu mainline build - but building a module in the 5.10-rc1 kernel - while booted to the 5.10-rc1 ubuntu mainlinekerel - e.g. "make C=1 -C /usr/src/linux-headers-`uname -r` M=`pwd` modules CF=-D__CHECK_ENDIAN__" which has worked for years - no longer works. make: Entering directory '/usr/src/linux-headers-5.10.0-051000rc1-generic' make[2]: *** No rule to make target 'scripts/module.lds', needed by '/home/smfrench/cifs-2.6/fs/cifs/cifs.ko'. Stop. make[1]: *** [scripts/Makefile.modpost:117: __modpost] Error 2 make: *** [Makefile:1703: modules] Error 2 make: Leaving directory '/usr/src/linux-headers-5.10.0-051000rc1-generic' I don't see a file in scripts/module.lds in /usr/src/linux-headers-5.10.0-051000rc1-generic/scripts directory copying from scripts/module.lds in the 5.10-rc1 git tree to /usr/src/linux-headers-5.10.0-051000rc1-generic/scripts fixed the problem but was wondering if this is just a packaging problem with Ubuntu (missing a file in the kernel headers package for their mainline daily builds?) -- Thanks, Steve
[RESEND PATCH v3] hwmon: add Corsair PSU HID controller driver
The Corsair digital power supplies of the series RMi, HXi and AXi include a small micro-controller with a lot of sensors attached. The sensors can be accessed by an USB connector from the outside. This micro-controller provides the data by a simple proprietary USB HID protocol. The data consist of temperatures, current and voltage levels, power usage, uptimes, fan speed and some more. It is also possible to configure the PSU (fan mode, mono/multi-rail, over current protection). This driver provides access to the sensors/statistics of the RMi and HXi series power supplies. It does not support configuring these devices, because there would be many ways to misconfigure or even damage the PSU. This patch adds: - hwmon driver corsair-psu - hwmon documentation - updates MAINTAINERS Signed-off-by: Wilken Gottwalt --- Changes in v3: - changed the email addresses because of serious email provider problems - fixed all multi-line comments - simplifiend some more switches - added more explanations about the values provied by the micro-controller - cached the raw value delivered by the usb_cmd function Changes in v2: - changed comments to hwmon style comments - simplified some switches - removed redundant code - removed misuse of EIO - changed a todo to a proper explanation - changed debugfs init/remove code - added 2 more HXi/RMi devices - updated documentation --- Documentation/hwmon/corsair-psu.rst | 82 Documentation/hwmon/index.rst | 1 + MAINTAINERS | 7 + drivers/hwmon/Kconfig | 13 + drivers/hwmon/Makefile | 1 + drivers/hwmon/corsair-psu.c | 605 6 files changed, 709 insertions(+) create mode 100644 Documentation/hwmon/corsair-psu.rst create mode 100644 drivers/hwmon/corsair-psu.c diff --git a/Documentation/hwmon/corsair-psu.rst b/Documentation/hwmon/corsair-psu.rst new file mode 100644 index ..396b95c9a76a --- /dev/null +++ b/Documentation/hwmon/corsair-psu.rst @@ -0,0 +1,82 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver corsair-psu += + +Supported devices: + +* Corsair Power Supplies + + Corsair HX550i + + Corsair HX650i + + Corsair HX750i + + Corsair HX850i + + Corsair HX1000i + + Corsair HX1200i + + Corsair RM550i + + Corsair RM650i + + Corsair RM750i + + Corsair RM850i + + Corsair RM1000i + +Author: Wilken Gottwalt + +Description +--- + +This driver implements the sysfs interface for the Corsair PSUs with a HID protocol +interface of the HXi and RMi series. +These power supplies provide access to a micro-controller with 2 attached +temperature sensors, 1 fan rpm sensor, 4 sensors for volt levels, 4 sensors for +power usage and 4 sensors for current levels and addtional non-sensor information +like uptimes. + +Sysfs entries +- + +=== +curr1_inputTotal current usage +curr2_inputCurrent on the 12v psu rail +curr3_inputCurrent on the 5v psu rail +curr4_inputCurrent on the 3.3v psu rail +fan1_input RPM of psu fan +in0_input Voltage of the psu ac input +in1_input Voltage of the 12v psu rail +in2_input Voltage of the 5v psu rail +in3_input Voltage of the 3.3 psu rail +power1_input Total power usage +power2_input Power usage of the 12v psu rail +power3_input Power usage of the 5v psu rail +power4_input Power usage of the 3.3v psu rail +temp1_inputTemperature of the psu vrm component +temp2_inputTemperature of the psu case +=== + +Usage Notes +--- + +It is an USB HID device, so it is auto-detected and supports hot-swapping. + +Flickering values in the rail voltage levels can be an indicator for a failing +PSU. The driver also provides some additional useful values via debugfs, which +do not fit into the hwmon class. + +Debugfs entries +--- + +=== +uptime Current uptime of the psu +uptime_total Total uptime of the psu +vendor Vendor name of the psu +productProduct name of the psu +=== diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index e6b91ab12978..408760d13813 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -49,6 +49,7 @@ Hardware Monitoring Kernel Drivers bt1-pvt coretemp corsair-cpro + corsair-psu da9052 da9055 dell-smm-hwmon diff --git a/MAINTAINERS b/MAINTAINERS index e73636b75f29..e1db1f6dd694 100644
Re: [PATCH] perf data: Allow to use stdio functions for pipe mode
Hi Jiri,
On Thu, Oct 29, 2020 at 8:57 PM Jiri Olsa wrote:
>
> On Wed, Oct 28, 2020 at 05:56:32PM +0900, Namhyung Kim wrote:
> > When perf data is in a pipe, it reads each event separately using
> > read(2) syscall. This is a huge performance bottleneck when
> > processing large data like in perf inject. Also perf inject needs to
> > use write(2) syscall for the output.
> >
> > So convert it to use buffer I/O functions in stdio library for pipe
> > data. This makes inject-build-id bench time drops from 20ms to 8ms.
> >
> > $ perf bench internals inject-build-id
> > # Running 'internals/inject-build-id' benchmark:
> > Average build-id injection took: 8.074 msec (+- 0.013 msec)
> > Average time per event: 0.792 usec (+- 0.001 usec)
> > Average memory usage: 8328 KB (+- 0 KB)
> > Average build-id-all injection took: 5.490 msec (+- 0.008 msec)
> > Average time per event: 0.538 usec (+- 0.001 usec)
> > Average memory usage: 7563 KB (+- 0 KB)
> >
> > This patch enables it just for perf inject when used with pipe (it's a
> > default behavior). Maybe we could do it for perf record and/or report
> > later..
> >
> > Signed-off-by: Namhyung Kim
> > ---
> > tools/perf/builtin-inject.c | 2 ++
> > tools/perf/util/data.c | 36 +---
> > tools/perf/util/data.h | 11 ++-
> > tools/perf/util/header.c| 8
> > tools/perf/util/session.c | 7 ---
> > 5 files changed, 53 insertions(+), 11 deletions(-)
> >
> > diff --git a/tools/perf/builtin-inject.c b/tools/perf/builtin-inject.c
> > index 452a75fe68e5..14d6c88fed76 100644
> > --- a/tools/perf/builtin-inject.c
> > +++ b/tools/perf/builtin-inject.c
> > @@ -853,10 +853,12 @@ int cmd_inject(int argc, const char **argv)
> > .output = {
> > .path = "-",
> > .mode = PERF_DATA_MODE_WRITE,
> > + .use_stdio = true,
> > },
> > };
> > struct perf_data data = {
> > .mode = PERF_DATA_MODE_READ,
> > + .use_stdio = true,
> > };
> > int ret;
> >
> > diff --git a/tools/perf/util/data.c b/tools/perf/util/data.c
> > index c47aa34fdc0a..47b5a4b50ca5 100644
> > --- a/tools/perf/util/data.c
> > +++ b/tools/perf/util/data.c
> > @@ -174,8 +174,16 @@ static bool check_pipe(struct perf_data *data)
> > is_pipe = true;
> > }
> >
> > - if (is_pipe)
> > - data->file.fd = fd;
> > + if (is_pipe) {
> > + if (data->use_stdio) {
> > + const char *mode;
> > +
> > + mode = perf_data__is_read(data) ? "r" : "w";
> > + data->file.fptr = fdopen(fd, mode);
>
> I guess fdopen should never fail right? but I think we should
> add BUG_ON(data->file.fptr == NULL) or something
The man page says it may fail when mode is invalid or malloc
failed internally. Will add the check.
>
> other than this the change looks good, I can see the speedup
> in bench as well
Thanks!
Namhyung
[PATCH v6 6/6] dt-bindings: spi: Add compatible for Intel LGM SoC
From: Ramuthevar Vadivel Murugan Add compatible for Intel LGM SoC. Signed-off-by: Ramuthevar Vadivel Murugan --- Documentation/devicetree/bindings/spi/cadence-quadspi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml index ec22b040d804..58ecdab939df 100644 --- a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml +++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml @@ -19,6 +19,7 @@ properties: - enum: - ti,k2g-qspi - ti,am654-ospi + - intel,lgm-qspi - const: cdns,qspi-nor reg: -- 2.11.0
[PATCH v6 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml
From: Ramuthevar Vadivel Murugan
Convert the cadence-quadspi.txt documentation to cadence-quadspi.yaml
remove the cadence-quadspi.txt from Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/spi/cadence-quadspi.txt| 67 -
.../devicetree/bindings/spi/cadence-quadspi.yaml | 149 +
2 files changed, 149 insertions(+), 67 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spi/cadence-quadspi.txt
create mode 100644 Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
b/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
deleted file mode 100644
index 945be7d5b236..
--- a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
+++ /dev/null
@@ -1,67 +0,0 @@
-* Cadence Quad SPI controller
-
-Required properties:
-- compatible : should be one of the following:
- Generic default - "cdns,qspi-nor".
- For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
- For TI AM654 SoC - "ti,am654-ospi", "cdns,qspi-nor".
-- reg : Contains two entries, each of which is a tuple consisting of a
- physical address and length. The first entry is the address and
- length of the controller register set. The second entry is the
- address and length of the QSPI Controller data area.
-- interrupts : Unit interrupt specifier for the controller interrupt.
-- clocks : phandle to the Quad SPI clock.
-- cdns,fifo-depth : Size of the data FIFO in words.
-- cdns,fifo-width : Bus width of the data FIFO in bytes.
-- cdns,trigger-address : 32-bit indirect AHB trigger address.
-
-Optional properties:
-- cdns,is-decoded-cs : Flag to indicate whether decoder is used or not.
-- cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch
- the read data rather than the QSPI clock. Make sure that QSPI return
- clock is populated on the board before using this property.
-
-Optional subnodes:
-Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional
-custom properties:
-- cdns,read-delay : Delay for read capture logic, in clock cycles
-- cdns,tshsl-ns : Delay in nanoseconds for the length that the master
- mode chip select outputs are de-asserted between
- transactions.
-- cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
- de-activated and the activation of another.
-- cdns,tchsh-ns : Delay in nanoseconds between last bit of current
- transaction and deasserting the device chip select
- (qspi_n_ss_out).
-- cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
- and first bit transfer.
-- resets : Must contain an entry for each entry in reset-names.
- See ../reset/reset.txt for details.
-- reset-names : Must include either "qspi" and/or "qspi-ocp".
-
-Example:
-
- qspi: spi@ff705000 {
- compatible = "cdns,qspi-nor";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0xff705000 0x1000>,
- <0xffa0 0x1000>;
- interrupts = <0 151 4>;
- clocks = <_clk>;
- cdns,is-decoded-cs;
- cdns,fifo-depth = <128>;
- cdns,fifo-width = <4>;
- cdns,trigger-address = <0x>;
- resets = < QSPI_RESET>, < QSPI_OCP_RESET>;
- reset-names = "qspi", "qspi-ocp";
-
- flash0: n25q00@0 {
- ...
- cdns,read-delay = <4>;
- cdns,tshsl-ns = <50>;
- cdns,tsd2d-ns = <50>;
- cdns,tchsh-ns = <4>;
- cdns,tslch-ns = <4>;
- };
- };
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
new file mode 100644
index ..ec22b040d804
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
@@ -0,0 +1,149 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/cadence-quadspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence Quad SPI controller
+
+maintainers:
+ - Vadivel Murugan
+
+allOf:
+ - $ref: "spi-controller.yaml#"
+
+properties:
+ compatible:
+oneOf:
+ - items:
+ - enum:
+ - ti,k2g-qspi
+ - ti,am654-ospi
+ - const: cdns,qspi-nor
+
+ reg:
+items:
+ - description: the controller register set
+ - description: the controller data area
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+maxItems: 1
+
+ cdns,fifo-depth:
+description:
+ Size of the data FIFO in words.
+$ref: "/schemas/types.yaml#/definitions/uint32"
+enum:
[PATCH v6 0/6] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC
Add QSPI controller support for Intel LGM SoC. Note from Vignesh(mtd subsystem maintainer): This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX that intended to move cadence-quadspi driver to spi-mem framework Those patches were trying to accomplish too many things in a single set of patches and need to split into smaller patches. This is reduced version of above series. Changes that are intended to make migration easy are split into separate patches. Patches 1 to 3 drop features that cannot be supported under spi-mem at the moment (backward compatibility is maintained). Patch 4-5 are trivial cleanups. Patch 6 does the actual conversion to spi-mem and patch 7 moves the driver to drivers/spi folder. I have tested both INDAC mode (used by non TI platforms like Altera SoCFPGA) and DAC mode (used by TI platforms) on TI EVMs. Patches to move move bindings over to "Documentation/devicetree/bindings/spi/" directory and also conversion of bindig doc to YAML will be posted separately. Support for Intel platform would follow that. Reference: https://lkml.org/lkml/2020/6/1/50 --- v6: - Rob's review comments update - add compatible string in properly aligned - remove cadence-qspi extra comaptible string in example v5: - Rob's review comments update - const with single compatible string kept v4: - Rob's review comments update - remove '|' no formatting to preserve - child node attributes follows under 'properties' under '@[0-9a-f]+$'. v3: - Pratyush review comments update - CQSPI_SUPPORTS_MULTI_CHIPSELECT macro used instead of cqspi->use_direct_mode - disable DAC support placed in end of controller_init v2: - Rob's review comments update for dt-bindings - add 'oneOf' for compatible selection - drop un-neccessary descriptions - add the cdns,is-decoded-cs and cdns,rclk-en properties as schema - remove 'allOf' in not required place - add AdditionalProperties false - add minItems/maxItems for qspi reset attributes resend-v1: - As per Mark's suggestion , reorder the patch series 1-3 driver support patches, series 4-6 dt-bindings patches. v1: - initial version Ramuthevar Vadivel Murugan (6): spi: cadence-quadspi: Add QSPI support for Intel LGM SoC spi: cadence-quadspi: Disable the DAC for Intel LGM SoC spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml dt-bindings: spi: Add compatible for Intel LGM SoC .../devicetree/bindings/mtd/cadence-quadspi.txt| 67 - .../devicetree/bindings/spi/cadence-quadspi.yaml | 150 + drivers/spi/Kconfig| 2 +- drivers/spi/spi-cadence-quadspi.c | 31 + 4 files changed, 182 insertions(+), 68 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mtd/cadence-quadspi.txt create mode 100644 Documentation/devicetree/bindings/spi/cadence-quadspi.yaml -- 2.11.0
[PATCH v6 1/6] spi: cadence-quadspi: Add QSPI support for Intel LGM SoC
From: Ramuthevar Vadivel Murugan
Add QSPI controller support for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/spi/Kconfig | 2 +-
drivers/spi/spi-cadence-quadspi.c | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index d2c976e55b8b..926da61eee5a 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -203,7 +203,7 @@ config SPI_CADENCE
config SPI_CADENCE_QUADSPI
tristate "Cadence Quad SPI controller"
- depends on OF && (ARM || ARM64 || COMPILE_TEST)
+ depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST)
help
Enable support for the Cadence Quad SPI Flash controller.
diff --git a/drivers/spi/spi-cadence-quadspi.c
b/drivers/spi/spi-cadence-quadspi.c
index 40938cf3806d..d7b10c46fa70 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1401,6 +1401,9 @@ static const struct of_device_id cqspi_dt_ids[] = {
.compatible = "ti,am654-ospi",
.data = _ospi,
},
+ {
+ .compatible = "intel,lgm-qspi",
+ },
{ /* end of table */ }
};
--
2.11.0
[PATCH v6 3/6] spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC
From: Ramuthevar Vadivel Murugan
Add multiple chipselect support for Intel LGM SoCs,
currently QSPI-NOR and QSPI-NAND supported.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/spi/spi-cadence-quadspi.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/spi/spi-cadence-quadspi.c
b/drivers/spi/spi-cadence-quadspi.c
index 6d6f7c440ece..c4440797db43 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -38,6 +38,7 @@
/* Capabilities */
#define CQSPI_SUPPORTS_OCTAL BIT(0)
+#define CQSPI_SUPPORTS_MULTI_CHIPSELECT BIT(1)
struct cqspi_st;
@@ -75,6 +76,7 @@ struct cqspi_st {
boolis_decoded_cs;
u32 fifo_depth;
u32 fifo_width;
+ u32 num_chipselect;
boolrclk_en;
u32 trigger_address;
u32 wr_delay;
@@ -1049,6 +1051,7 @@ static int cqspi_of_get_flash_pdata(struct
platform_device *pdev,
static int cqspi_of_get_pdata(struct cqspi_st *cqspi)
{
+ const struct cqspi_driver_platdata *ddata;
struct device *dev = >pdev->dev;
struct device_node *np = dev->of_node;
@@ -1070,6 +1073,15 @@ static int cqspi_of_get_pdata(struct cqspi_st *cqspi)
return -ENXIO;
}
+ ddata = of_device_get_match_data(dev);
+ if (ddata->hwcaps_mask & CQSPI_SUPPORTS_MULTI_CHIPSELECT) {
+ if (of_property_read_u32(np, "num-chipselect",
+>num_chipselect)) {
+ dev_err(dev, "couldn't determine number of cs\n");
+ return -ENXIO;
+ }
+ }
+
cqspi->rclk_en = of_property_read_bool(np, "cdns,rclk-en");
return 0;
@@ -1307,6 +1319,9 @@ static int cqspi_probe(struct platform_device *pdev)
cqspi->current_cs = -1;
cqspi->sclk = 0;
+ if (ddata->hwcaps_mask & CQSPI_SUPPORTS_MULTI_CHIPSELECT)
+ master->num_chipselect = cqspi->num_chipselect;
+
ret = cqspi_setup_flash(cqspi);
if (ret) {
dev_err(dev, "failed to setup flash parameters %d\n", ret);
@@ -1396,6 +1411,7 @@ static const struct cqspi_driver_platdata am654_ospi = {
};
static const struct cqspi_driver_platdata intel_lgm_qspi = {
+ .hwcaps_mask = CQSPI_SUPPORTS_MULTI_CHIPSELECT,
.quirks = CQSPI_DISABLE_DAC_MODE,
};
--
2.11.0
[PATCH v6 2/6] spi: cadence-quadspi: Disable the DAC for Intel LGM SoC
From: Ramuthevar Vadivel Murugan
On Intel Lightning Mountain(LGM) SoCs QSPI controller do not use
Direct Access Controller(DAC).
This patch adds a quirk to disable the Direct Access Controller
for data transfer instead it uses indirect data transfer.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/spi/spi-cadence-quadspi.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/spi/spi-cadence-quadspi.c
b/drivers/spi/spi-cadence-quadspi.c
index d7b10c46fa70..6d6f7c440ece 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1107,6 +1107,13 @@ static void cqspi_controller_init(struct cqspi_st *cqspi)
writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
cqspi_controller_enable(cqspi, 1);
+
+ /* Disable direct access controller */
+ if (!cqspi->use_direct_mode) {
+ reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
+ reg &= ~CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL;
+ writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
+ }
}
static int cqspi_request_mmap_dma(struct cqspi_st *cqspi)
@@ -1388,6 +1395,10 @@ static const struct cqspi_driver_platdata am654_ospi = {
.quirks = CQSPI_NEEDS_WR_DELAY,
};
+static const struct cqspi_driver_platdata intel_lgm_qspi = {
+ .quirks = CQSPI_DISABLE_DAC_MODE,
+};
+
static const struct of_device_id cqspi_dt_ids[] = {
{
.compatible = "cdns,qspi-nor",
@@ -1403,6 +1414,7 @@ static const struct of_device_id cqspi_dt_ids[] = {
},
{
.compatible = "intel,lgm-qspi",
+ .data = _lgm_qspi,
},
{ /* end of table */ }
};
--
2.11.0
[PATCH v6 4/6] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi
From: Ramuthevar Vadivel Murugan
Move the Documentation/devicetree/bindings/mtd/cadence-quadspi.txt to
Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/{mtd => spi}/cadence-quadspi.txt | 0
1 file changed, 0 insertions(+), 0 deletions(-)
rename Documentation/devicetree/bindings/{mtd => spi}/cadence-quadspi.txt
(100%)
diff --git a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt
b/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
similarity index 100%
rename from Documentation/devicetree/bindings/mtd/cadence-quadspi.txt
rename to Documentation/devicetree/bindings/spi/cadence-quadspi.txt
--
2.11.0
Re: [PATCH 1/2] KVM: x86/pmu: Set MSR_IA32_MISC_ENABLE_EMON when vPMU is enabled
Hi,
Is the community not interested in these two patches?
The second one also appears in the LBR patch set and
will benefit other PMU features later, such as PEBS.
Thanks,
Like Xu
On 2020/10/20 22:57, Like Xu wrote:
On Intel platforms, software may uses IA32_MISC_ENABLE[7]
bit to detect whether the performance monitoring facility
is supported in the processor.
A write to this PMU available bit will be ignored.
Cc: Yao Yuan
Signed-off-by: Like Xu
---
arch/x86/kvm/vmx/pmu_intel.c | 2 ++
arch/x86/kvm/x86.c | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index a886a47daebd..01c7d84ecf3e 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -339,6 +339,8 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
if (!pmu->version)
return;
+ vcpu->arch.ia32_misc_enable_msr |= MSR_IA32_MISC_ENABLE_EMON;
+
perf_get_x86_pmu_capability(_pmu);
if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
vcpu->arch.perf_capabilities = vmx_get_perf_capabilities();
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c4015a43cc8a..d7b8f98ada93 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -3042,6 +3042,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
}
break;
case MSR_IA32_MISC_ENABLE:
+ data &= ~MSR_IA32_MISC_ENABLE_EMON;
if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)
&&
((vcpu->arch.ia32_misc_enable_msr ^ data) &
MSR_IA32_MISC_ENABLE_MWAIT)) {
if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
Re: Additional debug info to aid cacheline analysis
Hello, On Thu, Oct 8, 2020 at 6:38 PM Mark Wielaard wrote: > > Hi, > > On Thu, 2020-10-08 at 09:02 +0200, Peter Zijlstra wrote: > > Some time ago, I had my intern pursue the other 2 approaches for > > > symbolization. The one I see as most promising is by using the DWARF > > > information (no BPF needed). The good news is that I believe we do not > > > need more information than what is already there. We just need the > > > compiler to generate valid DWARF at most optimization levels, which I > > > believe is not the case for LLVM based compilers but maybe okay for > > > GCC. > > > > Right, I think GCC improved a lot on this front over the past few years. > > Also added Andi and Masami, who have worked on this or related topics. > > For GCC Alexandre Oliva did a really thorough write up of all the > various optimization and their effect on debugging/DWARF: > https://www.fsfla.org/~lxoliva/writeups/gOlogy/gOlogy.html Thanks for the link. Looks very nice. > > GCC using -fvar-tracking and -fvar-tracking-assignments is pretty good > at keeping track of where variables are held (in memory or registers) > when in the program, even through various optimizations. > > -fvar-tracking-assignments is the default with -g -O2. > Except for the upstream linux kernel code. Most distros enable it > again, but you do want to enable it by hand when building from the > upstream linux git repo. Please correct me if I'm wrong. This seems to track local variables. But I'm not sure it's enough for this purpose as we want to know types of any memory references (not directly from a variable). Let's say we have a variable like below: struct xxx a; a.b->c->d++; And we have a sample where 'd' is updated, then how can we know it's from the variable 'a'? Maybe we don't need to know it, but we should know it accesses the 'd' field in the struct 'c'. Probably we can analyze the asm code and figure out it's from 'a' and accessing 'd' at the moment. I'm curious if there's a way in the DWARF to help this kind of work. Thanks Namhyung
Re: [PATCH] kunit: tool: fix pre-existing python type annotation errors
On Thu, Oct 29, 2020 at 7:56 PM David Gow wrote: > > On Thu, Oct 22, 2020 at 6:08 AM Daniel Latypov wrote: > > > > The code uses annotations, but they aren't accurate. > > Note that type checking in python is a separate process, running > > `kunit.py run` will not check and complain about invalid types at > > runtime. > > > > Fix pre-existing issues found by running a type checker > > $ mypy *.py > > > > All but one of these were returning `None` without denoting this > > properly (via `Optional[Type]`). > > > > Signed-off-by: Daniel Latypov > > --- > > I'm not going to pretend to really understand python annotations > completely, but this all seems correct from what I know of the code, > and I was able to install mypy and verify the issues were fixed. > > Clearly, if we're going to have type annotations here, we should be > verifying the code against them. Is there a way we could get python > itself to verify this code when the script runs, rather than have to > use mypy as a tool to verify it separately? Otherwise, maybe we can Type annotations are https://www.python.org/dev/peps/pep-0484/ There isn't support for python itself to type check and it calls out (only) mypy by name as a type-checker. I don't have a good answer for how we prevent them from bitrotting :/ > run it automatically from the kunit_tool_test.py unit tests or > something similar? I don't think it's possible to do so cleanly. E.g. I don't know python that well, but here's my guess at what it'd have to look like: * We have to assume mypy is installed * dynamically loading the module inside a `try` (so we don't break users who don't have it) * figure out what func is the entry point to mypy and call it on "./kunit.py" somehow > > Regardless, this is > > Reviewed-by: David Gow > > Cheers, > -- David
Re: [PATCH v2] watchdog: qcom_wdt: set WDOG_HW_RUNNING bit when appropriate
On 2020-10-28 17:16, Robert Marko wrote:
If the watchdog hardware is enabled/running during boot, e.g.
due to a boot loader configuring it, we must tell the
watchdog framework about this fact so that it can ping the
watchdog until userspace opens the device and takes over
control.
Do so using the WDOG_HW_RUNNING flag that exists for exactly
that use-case.
Given the watchdog driver core doesn't know what timeout was
originally set by whoever started the watchdog (boot loader),
we make sure to update the timeout in the hardware according
to what the watchdog core thinks it is.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v2:
* Correct authorship
drivers/watchdog/qcom-wdt.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/watchdog/qcom-wdt.c b/drivers/watchdog/qcom-wdt.c
index ab7465d186fd..28c93a918e38 100644
--- a/drivers/watchdog/qcom-wdt.c
+++ b/drivers/watchdog/qcom-wdt.c
@@ -152,6 +152,13 @@ static int qcom_wdt_restart(struct
watchdog_device *wdd, unsigned long action,
return 0;
}
+static int qcom_wdt_is_running(struct watchdog_device *wdd)
+{
+ struct qcom_wdt *wdt = to_qcom_wdt(wdd);
+
+ return (readl(wdt_addr(wdt, WDT_EN)) & 1);
QCOM_WDT_ENABLE macro can be used instead of 1?
+}
+
static const struct watchdog_ops qcom_wdt_ops = {
.start = qcom_wdt_start,
.stop = qcom_wdt_stop,
@@ -294,6 +301,21 @@ static int qcom_wdt_probe(struct platform_device
*pdev)
wdt->wdd.timeout = min(wdt->wdd.max_timeout, 30U);
watchdog_init_timeout(>wdd, 0, dev);
+ if (qcom_wdt_is_running(>wdd)) {
+ /*
+* Make sure to apply timeout from watchdog core, taking
+* the prescaler of this driver here into account (the
+* boot loader might be using a different prescaler).
+*
+* To avoid spurious resets because of different scaling,
+* we first disable the watchdog, set the new prescaler
+* and timeout, and then re-enable the watchdog.
+*/
+ qcom_wdt_stop(>wdd);
qcom_wdt_start disables the WDT, configure the timeout values and
enables it. Do we still need to call qcom_wdt_stop?
+ qcom_wdt_start(>wdd);
+ set_bit(WDOG_HW_RUNNING, >wdd.status);
+ }
+
ret = devm_watchdog_register_device(dev, >wdd);
if (ret)
return ret;
Re: [PATCH] powerpc/32s: Setup the early hash table at all time.
Andreas Schwab writes: > On Okt 01 2020, Christophe Leroy wrote: > >> At the time being, an early hash table is set up when >> CONFIG_KASAN is selected. >> >> There is nothing wrong with setting such an early hash table >> all the time, even if it is not used. This is a statically >> allocated 256 kB table which lies in the init data section. >> >> This makes the code simpler and may in the future allow to >> setup early IO mappings with fixmap instead of hard coding BATs. >> >> Put create_hpte() and flush_hash_pages() in the .ref.text section >> in order to avoid warning for the reference to early_hash[]. This >> reference is removed by MMU_init_hw_patch() before init memory is >> freed. > > This breaks booting on the iBook G4. Do you get an oops or anything? cheers
Re: [v4,1/3] drm/msm: Add support for GPU cooling
On 10/30/2020 2:18 AM, m...@chromium.org wrote: On Thu, Oct 29, 2020 at 01:37:19PM +0530, Akhil P Oommen wrote: Register GPU as a devfreq cooling device so that it can be passively cooled by the thermal framework. Signed-off-by: Akhil P Oommen Reviewed-by: Matthias Kaehlcke Wait, I did not post a 'Reviewed-by' tag for this patch! I think the patch should be ok, but I'm still not super happy about the resource management involving devfreq in general (see discussion on https://patchwork.freedesktop.org/patch/394291/?series=82476=1). It's not really something introduced by this patch, but if it ever gets fixed releasing the cooling device at the end of msm_gpu_cleanup() after everything else might cause trouble. In summary, I'm supportive of landing this patch, but reluctant to 'sign it off' because of the above. In any case: Tested-by: Matthias Kaehlcke Sorry, Matthias. My mistake. You shared the reviewed tag for the dt-bindings update. Will fix this ASAP. Thanks for verifying this. -Akhil. ___ dri-devel mailing list dri-de...@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v6 5/5] vfio/type1: Use mdev bus iommu_ops for IOMMU callbacks
With the IOMMU driver registering iommu_ops for the mdev_bus, the IOMMU
operations on an mdev could be done in the same way as any normal device
(for example, PCI/PCIe). There's no need to distinguish an mdev from
others for iommu operations. Remove the unnecessary code.
Signed-off-by: Lu Baolu
---
drivers/vfio/mdev/mdev_core.c| 18 -
drivers/vfio/mdev/mdev_driver.c | 6 ++
drivers/vfio/mdev/mdev_private.h | 1 -
drivers/vfio/vfio_iommu_type1.c | 128 +++
include/linux/mdev.h | 14
5 files changed, 18 insertions(+), 149 deletions(-)
diff --git a/drivers/vfio/mdev/mdev_core.c b/drivers/vfio/mdev/mdev_core.c
index 6b9ab71f89e7..f4fd5f237c49 100644
--- a/drivers/vfio/mdev/mdev_core.c
+++ b/drivers/vfio/mdev/mdev_core.c
@@ -386,24 +386,6 @@ int mdev_device_remove(struct device *dev)
return 0;
}
-int mdev_set_iommu_device(struct device *dev, struct device *iommu_device)
-{
- struct mdev_device *mdev = to_mdev_device(dev);
-
- mdev->iommu_device = iommu_device;
-
- return 0;
-}
-EXPORT_SYMBOL(mdev_set_iommu_device);
-
-struct device *mdev_get_iommu_device(struct device *dev)
-{
- struct mdev_device *mdev = to_mdev_device(dev);
-
- return mdev->iommu_device;
-}
-EXPORT_SYMBOL(mdev_get_iommu_device);
-
static int __init mdev_init(void)
{
return mdev_bus_register();
diff --git a/drivers/vfio/mdev/mdev_driver.c b/drivers/vfio/mdev/mdev_driver.c
index 0d3223aee20b..487402f16355 100644
--- a/drivers/vfio/mdev/mdev_driver.c
+++ b/drivers/vfio/mdev/mdev_driver.c
@@ -18,6 +18,9 @@ static int mdev_attach_iommu(struct mdev_device *mdev)
int ret;
struct iommu_group *group;
+ if (iommu_present(_bus_type))
+ return 0;
+
group = iommu_group_alloc();
if (IS_ERR(group))
return PTR_ERR(group);
@@ -33,6 +36,9 @@ static int mdev_attach_iommu(struct mdev_device *mdev)
static void mdev_detach_iommu(struct mdev_device *mdev)
{
+ if (iommu_present(_bus_type))
+ return;
+
iommu_group_remove_device(>dev);
dev_info(>dev, "MDEV: detaching iommu\n");
}
diff --git a/drivers/vfio/mdev/mdev_private.h b/drivers/vfio/mdev/mdev_private.h
index 7d922950caaf..efe0aefdb52f 100644
--- a/drivers/vfio/mdev/mdev_private.h
+++ b/drivers/vfio/mdev/mdev_private.h
@@ -31,7 +31,6 @@ struct mdev_device {
void *driver_data;
struct list_head next;
struct kobject *type_kobj;
- struct device *iommu_device;
bool active;
};
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index bb2684cc245e..e231b7070ca5 100644
--- a/drivers/vfio/vfio_iommu_type1.c
+++ b/drivers/vfio/vfio_iommu_type1.c
@@ -100,7 +100,6 @@ struct vfio_dma {
struct vfio_group {
struct iommu_group *iommu_group;
struct list_headnext;
- boolmdev_group; /* An mdev group */
boolpinned_page_dirty_scope;
};
@@ -1675,102 +1674,6 @@ static bool vfio_iommu_has_sw_msi(struct list_head
*group_resv_regions,
return ret;
}
-static struct device *vfio_mdev_get_iommu_device(struct device *dev)
-{
- struct device *(*fn)(struct device *dev);
- struct device *iommu_device;
-
- fn = symbol_get(mdev_get_iommu_device);
- if (fn) {
- iommu_device = fn(dev);
- symbol_put(mdev_get_iommu_device);
-
- return iommu_device;
- }
-
- return NULL;
-}
-
-static int vfio_mdev_attach_domain(struct device *dev, void *data)
-{
- struct iommu_domain *domain = data;
- struct device *iommu_device;
-
- iommu_device = vfio_mdev_get_iommu_device(dev);
- if (iommu_device) {
- if (iommu_dev_feature_enabled(iommu_device, IOMMU_DEV_FEAT_AUX))
- return iommu_aux_attach_device(domain, iommu_device);
- else
- return iommu_attach_device(domain, iommu_device);
- }
-
- return -EINVAL;
-}
-
-static int vfio_mdev_detach_domain(struct device *dev, void *data)
-{
- struct iommu_domain *domain = data;
- struct device *iommu_device;
-
- iommu_device = vfio_mdev_get_iommu_device(dev);
- if (iommu_device) {
- if (iommu_dev_feature_enabled(iommu_device, IOMMU_DEV_FEAT_AUX))
- iommu_aux_detach_device(domain, iommu_device);
- else
- iommu_detach_device(domain, iommu_device);
- }
-
- return 0;
-}
-
-static int vfio_iommu_attach_group(struct vfio_domain *domain,
- struct vfio_group *group)
-{
- if (group->mdev_group)
- return iommu_group_for_each_dev(group->iommu_group,
- domain->domain,
- vfio_mdev_attach_domain);
- else
-
[PATCH v6 0/5] iommu aux-domain APIs extensions
Hi Joerg and Alex, A description of purpose for this series could be found here. https://lore.kernel.org/linux-iommu/20200901033422.22249-1-baolu...@linux.intel.com/ The previous version was posted here. https://lore.kernel.org/linux-iommu/20200922061042.31633-1-baolu...@linux.intel.com/ This version is evolved according to Joerg's comments posted here. https://lore.kernel.org/linux-iommu/20200924095532.gk27...@8bytes.org/ This basic idea is that IOMMU registers an iommu_ops for subdevice bus (for example, the vfio/mdev bus), so that the upper layer device passthrough framework could use the standard iommu-core code to setup the IOMMU logistics. This series was tested by Dave Jiang with his idxd driver posted here. Very appreciated! https://lore.kernel.org/lkml/160021250454.67751.3119489448651243709.st...@djiang5-desk3.ch.intel.com/ Please help to review and comment. Best regards, baolu Lu Baolu (5): vfio/mdev: Register mdev bus earlier during boot iommu: Use bus iommu ops for aux related callback iommu/vt-d: Make some static functions global iommu/vt-d: Add iommu_ops support for subdevice bus vfio/type1: Use mdev bus iommu_ops for IOMMU callbacks drivers/iommu/intel/Kconfig | 13 drivers/iommu/intel/Makefile | 1 + drivers/iommu/intel/iommu.c | 79 +-- drivers/iommu/intel/siov.c | 119 drivers/iommu/iommu.c| 16 ++-- drivers/vfio/mdev/mdev_core.c| 22 +- drivers/vfio/mdev/mdev_driver.c | 6 ++ drivers/vfio/mdev/mdev_private.h | 1 - drivers/vfio/vfio_iommu_type1.c | 128 +++ include/linux/intel-iommu.h | 53 + include/linux/mdev.h | 14 11 files changed, 236 insertions(+), 216 deletions(-) create mode 100644 drivers/iommu/intel/siov.c -- 2.25.1
[PATCH v6 2/5] iommu: Use bus iommu ops for aux related callback
The aux-domain apis were designed for macro driver where the subdevices
are created and used inside a device driver. Use the device's bus iommu
ops instead of that in iommu domain for various callbacks.
Signed-off-by: Lu Baolu
---
drivers/iommu/iommu.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 6bbdd959f9f3..17f2686664db 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/iommu.c
@@ -2913,10 +2913,11 @@ EXPORT_SYMBOL_GPL(iommu_dev_feature_enabled);
*/
int iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev)
{
+ const struct iommu_ops *ops = dev->bus->iommu_ops;
int ret = -ENODEV;
- if (domain->ops->aux_attach_dev)
- ret = domain->ops->aux_attach_dev(domain, dev);
+ if (ops && ops->aux_attach_dev)
+ ret = ops->aux_attach_dev(domain, dev);
if (!ret)
trace_attach_device_to_domain(dev);
@@ -2927,8 +2928,10 @@ EXPORT_SYMBOL_GPL(iommu_aux_attach_device);
void iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev)
{
- if (domain->ops->aux_detach_dev) {
- domain->ops->aux_detach_dev(domain, dev);
+ const struct iommu_ops *ops = dev->bus->iommu_ops;
+
+ if (ops && ops->aux_detach_dev) {
+ ops->aux_detach_dev(domain, dev);
trace_detach_device_from_domain(dev);
}
}
@@ -2936,10 +2939,11 @@ EXPORT_SYMBOL_GPL(iommu_aux_detach_device);
int iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev)
{
+ const struct iommu_ops *ops = dev->bus->iommu_ops;
int ret = -ENODEV;
- if (domain->ops->aux_get_pasid)
- ret = domain->ops->aux_get_pasid(domain, dev);
+ if (ops && ops->aux_get_pasid)
+ ret = ops->aux_get_pasid(domain, dev);
return ret;
}
--
2.25.1
[PATCH v6 1/5] vfio/mdev: Register mdev bus earlier during boot
Move mdev bus registration earlier than IOMMU probe processing so that
the IOMMU drivers could be able to set iommu_ops for the mdev bus. This
only applies when vfio-mdev module is setected to be built-in.
Signed-off-by: Lu Baolu
---
drivers/vfio/mdev/mdev_core.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/vfio/mdev/mdev_core.c b/drivers/vfio/mdev/mdev_core.c
index b558d4cfd082..6b9ab71f89e7 100644
--- a/drivers/vfio/mdev/mdev_core.c
+++ b/drivers/vfio/mdev/mdev_core.c
@@ -417,8 +417,12 @@ static void __exit mdev_exit(void)
mdev_bus_unregister();
}
+#if IS_BUILTIN(CONFIG_VFIO_MDEV)
+postcore_initcall(mdev_init)
+#else
module_init(mdev_init)
module_exit(mdev_exit)
+#endif /* IS_BUILTIN(CONFIG_VFIO_MDEV) */
MODULE_VERSION(DRIVER_VERSION);
MODULE_LICENSE("GPL v2");
--
2.25.1
[PATCH v6 3/5] iommu/vt-d: Make some static functions global
So that they could be used in other files as well. No functional changes.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/iommu.c | 74 +++--
include/linux/intel-iommu.h | 49
2 files changed, 62 insertions(+), 61 deletions(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 8f5e7b31b3fb..1454fe74f3ba 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -330,10 +330,6 @@ static void domain_exit(struct dmar_domain *domain);
static void domain_remove_dev_info(struct dmar_domain *domain);
static void dmar_remove_one_dev_info(struct device *dev);
static void __dmar_remove_one_dev_info(struct device_domain_info *info);
-static int intel_iommu_attach_device(struct iommu_domain *domain,
-struct device *dev);
-static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain,
- dma_addr_t iova);
#ifdef CONFIG_INTEL_IOMMU_DEFAULT_ON
int dmar_disabled = 0;
@@ -4423,7 +4419,7 @@ static int md_domain_init(struct dmar_domain *domain, int
guest_width)
return 0;
}
-static struct iommu_domain *intel_iommu_domain_alloc(unsigned type)
+struct iommu_domain *intel_iommu_domain_alloc(unsigned int type)
{
struct dmar_domain *dmar_domain;
struct iommu_domain *domain;
@@ -4462,7 +4458,7 @@ static struct iommu_domain
*intel_iommu_domain_alloc(unsigned type)
return NULL;
}
-static void intel_iommu_domain_free(struct iommu_domain *domain)
+void intel_iommu_domain_free(struct iommu_domain *domain)
{
if (domain != _domain->domain)
domain_exit(to_dmar_domain(domain));
@@ -4639,8 +4635,7 @@ static int prepare_domain_attach_device(struct
iommu_domain *domain,
return 0;
}
-static int intel_iommu_attach_device(struct iommu_domain *domain,
-struct device *dev)
+int intel_iommu_attach_device(struct iommu_domain *domain, struct device *dev)
{
int ret;
@@ -4669,8 +4664,7 @@ static int intel_iommu_attach_device(struct iommu_domain
*domain,
return domain_add_dev_info(to_dmar_domain(domain), dev);
}
-static int intel_iommu_aux_attach_device(struct iommu_domain *domain,
-struct device *dev)
+int intel_iommu_aux_attach_device(struct iommu_domain *domain, struct device
*dev)
{
int ret;
@@ -4684,14 +4678,12 @@ static int intel_iommu_aux_attach_device(struct
iommu_domain *domain,
return aux_domain_add_dev(to_dmar_domain(domain), dev);
}
-static void intel_iommu_detach_device(struct iommu_domain *domain,
- struct device *dev)
+void intel_iommu_detach_device(struct iommu_domain *domain, struct device *dev)
{
dmar_remove_one_dev_info(dev);
}
-static void intel_iommu_aux_detach_device(struct iommu_domain *domain,
- struct device *dev)
+void intel_iommu_aux_detach_device(struct iommu_domain *domain, struct device
*dev)
{
aux_domain_remove_dev(to_dmar_domain(domain), dev);
}
@@ -4875,9 +4867,8 @@ intel_iommu_sva_invalidate(struct iommu_domain *domain,
struct device *dev,
}
#endif
-static int intel_iommu_map(struct iommu_domain *domain,
- unsigned long iova, phys_addr_t hpa,
- size_t size, int iommu_prot, gfp_t gfp)
+int intel_iommu_map(struct iommu_domain *domain, unsigned long iova,
+ phys_addr_t hpa, size_t size, int iommu_prot, gfp_t gfp)
{
struct dmar_domain *dmar_domain = to_dmar_domain(domain);
u64 max_addr;
@@ -4913,9 +4904,8 @@ static int intel_iommu_map(struct iommu_domain *domain,
return ret;
}
-static size_t intel_iommu_unmap(struct iommu_domain *domain,
- unsigned long iova, size_t size,
- struct iommu_iotlb_gather *gather)
+size_t intel_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
+size_t size, struct iommu_iotlb_gather *gather)
{
struct dmar_domain *dmar_domain = to_dmar_domain(domain);
unsigned long start_pfn, last_pfn;
@@ -4963,8 +4953,7 @@ static void intel_iommu_tlb_sync(struct iommu_domain
*domain,
dma_free_pagelist(gather->freelist);
}
-static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain,
- dma_addr_t iova)
+phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t
iova)
{
struct dmar_domain *dmar_domain = to_dmar_domain(domain);
struct dma_pte *pte;
@@ -4980,42 +4969,6 @@ static phys_addr_t intel_iommu_iova_to_phys(struct
iommu_domain *domain,
return phys;
}
-static inline bool scalable_mode_support(void)
-{
- struct dmar_drhd_unit *drhd;
- struct intel_iommu *iommu;
- bool ret = true;
-
[PATCH v6 4/5] iommu/vt-d: Add iommu_ops support for subdevice bus
The iommu_ops will only take effect when INTEL_IOMMU_SCALABLE_IOV kernel
option is selected. It applies to any device passthrough framework which
implements an underlying bus for the subdevices.
- Subdevice probe:
When a subdevice is created and added to the bus, iommu_probe_device()
will be called, where the device will be probed by the iommu core. An
iommu group will be allocated and the device will be added to it. The
default domain won't be allocated since there's no use case of using a
subdevice in the host kernel at this time being. However, it's pretty
easy to add this support later.
- Domain alloc/free/map/unmap/iova_to_phys operations:
For such ops, we just reuse those for PCI/PCIe devices.
- Domain attach/detach operations:
It depends on whether the parent device supports IOMMU_DEV_FEAT_AUX
feature. If so, the domain will be attached to the parent device as an
aux-domain; Otherwise, it will be attached to the parent as a primary
domain.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/Kconfig | 13
drivers/iommu/intel/Makefile | 1 +
drivers/iommu/intel/iommu.c | 5 ++
drivers/iommu/intel/siov.c | 119 +++
include/linux/intel-iommu.h | 4 ++
5 files changed, 142 insertions(+)
create mode 100644 drivers/iommu/intel/siov.c
diff --git a/drivers/iommu/intel/Kconfig b/drivers/iommu/intel/Kconfig
index 28a3d1596c76..94edc332f558 100644
--- a/drivers/iommu/intel/Kconfig
+++ b/drivers/iommu/intel/Kconfig
@@ -86,3 +86,16 @@ config INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON
is not selected, scalable mode support could also be enabled by
passing intel_iommu=sm_on to the kernel. If not sure, please use
the default value.
+
+config INTEL_IOMMU_SCALABLE_IOV
+ bool "Support for Intel Scalable I/O Virtualization"
+ depends on INTEL_IOMMU
+ select VFIO
+ select VFIO_MDEV
+ select VFIO_MDEV_DEVICE
+ help
+ Intel Scalable I/O virtualization (SIOV) is a hardware-assisted
+ PCIe subdevices virtualization. With each subdevice tagged with
+ an unique ID(PCI/PASID) the VT-d hardware could identify, hence
+ isolate DMA transactions from different subdevices on a same PCIe
+ device. Selecting this option will enable the support.
diff --git a/drivers/iommu/intel/Makefile b/drivers/iommu/intel/Makefile
index fb8e1e8c8029..f216385d5d59 100644
--- a/drivers/iommu/intel/Makefile
+++ b/drivers/iommu/intel/Makefile
@@ -4,4 +4,5 @@ obj-$(CONFIG_INTEL_IOMMU) += iommu.o pasid.o
obj-$(CONFIG_INTEL_IOMMU) += trace.o
obj-$(CONFIG_INTEL_IOMMU_DEBUGFS) += debugfs.o
obj-$(CONFIG_INTEL_IOMMU_SVM) += svm.o
+obj-$(CONFIG_INTEL_IOMMU_SCALABLE_IOV) += siov.o
obj-$(CONFIG_IRQ_REMAP) += irq_remapping.o
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 1454fe74f3ba..dafd8069c2af 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -4298,6 +4298,11 @@ int __init intel_iommu_init(void)
up_read(_global_lock);
bus_set_iommu(_bus_type, _iommu_ops);
+
+#ifdef CONFIG_INTEL_IOMMU_SCALABLE_IOV
+ intel_siov_init();
+#endif /* CONFIG_INTEL_IOMMU_SCALABLE_IOV */
+
if (si_domain && !hw_pass_through)
register_memory_notifier(_iommu_memory_nb);
cpuhp_setup_state(CPUHP_IOMMU_INTEL_DEAD, "iommu/intel:dead", NULL,
diff --git a/drivers/iommu/intel/siov.c b/drivers/iommu/intel/siov.c
new file mode 100644
index ..b9470e7ab3d6
--- /dev/null
+++ b/drivers/iommu/intel/siov.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0
+/**
+ * siov.c - Intel Scalable I/O virtualization support
+ *
+ * Copyright (C) 2020 Intel Corporation
+ *
+ * Author: Lu Baolu
+ */
+
+#define pr_fmt(fmt)"DMAR: " fmt
+
+#include
+#include
+#include
+#include
+
+static struct device *subdev_lookup_parent(struct device *dev)
+{
+ if (dev->bus == _bus_type)
+ return mdev_parent_dev(mdev_from_dev(dev));
+
+ return NULL;
+}
+
+static struct iommu_domain *siov_iommu_domain_alloc(unsigned int type)
+{
+ if (type != IOMMU_DOMAIN_UNMANAGED)
+ return NULL;
+
+ return intel_iommu_domain_alloc(type);
+}
+
+static int siov_iommu_attach_device(struct iommu_domain *domain,
+ struct device *dev)
+{
+ struct device *parent;
+
+ parent = subdev_lookup_parent(dev);
+ if (!parent || !dev_is_pci(parent))
+ return -ENODEV;
+
+ if (iommu_dev_feature_enabled(parent, IOMMU_DEV_FEAT_AUX))
+ return intel_iommu_aux_attach_device(domain, parent);
+ else
+ return intel_iommu_attach_device(domain, parent);
+}
+
+static void siov_iommu_detach_device(struct iommu_domain *domain,
+struct device *dev)
+{
+ struct device *parent;
+
+ parent = subdev_lookup_parent(dev);
+ if (WARN_ON_ONCE(!parent ||
Re: [PATCH] tpm: efi: Don't create binary_bios_measurements file for an empty log
On Wed, Oct 28, 2020 at 10:41:02AM -0500, Tyler Hicks wrote:
> Mimic the pre-existing ACPI and Device Tree event log behavior by not
> creating the binary_bios_measurements file when the EFI TPM event log is
> empty.
>
> This fixes the following NULL pointer dereference that can occur when
> reading /sys/kernel/security/tpm0/binary_bios_measurements after the
> kernel received an empty event log from the firmware:
>
> BUG: kernel NULL pointer dereference, address: 002c
> #PF: supervisor read access in kernel mode
> #PF: error_code(0x) - not-present page
> PGD 0 P4D 0
> Oops: [#1] SMP PTI
> CPU: 2 PID: 3932 Comm: fwupdtpmevlog Not tainted 5.9.0-3-g629990edad62
> #17
> Hardware name: LENOVO 20LCS03L00/20LCS03L00, BIOS N27ET38W (1.24 ) 11/28/2019
> RIP: 0010:tpm2_bios_measurements_start+0x3a/0x550
> Code: 54 53 48 83 ec 68 48 8b 57 70 48 8b 1e 65 48 8b 04 25 28 00 00 00 48
> 89 45 d0 31 c0 48 8b 82 c0 06 00 00 48 8b 8a c8 06 00 00 <44> 8b 60 1c 48 89
> 4d a0 4c 89 e2 49 83 c4 20 48 83 fb 00 75 2a 49
> RSP: 0018:a9c901203db0 EFLAGS: 00010246
> RAX: 0010 RBX: RCX: 0010
> RDX: 8ba1eb99c000 RSI: 8ba1e4ce8280 RDI: 8ba1e4ce8258
> RBP: a9c901203e40 R08: a9c901203dd8 R09: 8ba1ec443300
> R10: a9c901203e50 R11: R12: 8ba1e4ce8280
> R13: a9c901203ef0 R14: a9c901203ef0 R15: 8ba1e4ce8258
> FS: 7f6595460880() GS:8ba1ef88() knlGS:
> CS: 0010 DS: ES: CR0: 80050033
> CR2: 002c CR3: 0007d8d18003 CR4: 003706e0
> DR0: DR1: DR2:
> DR3: DR6: fffe0ff0 DR7: 0400
> Call Trace:
> ? __kmalloc_node+0x113/0x320
> ? kvmalloc_node+0x31/0x80
> seq_read+0x94/0x420
> vfs_read+0xa7/0x190
> ksys_read+0xa7/0xe0
> __x64_sys_read+0x1a/0x20
> do_syscall_64+0x37/0x80
> entry_SYSCALL_64_after_hwframe+0x44/0xa9
>
> In this situation, the bios_event_log pointer in the tpm_bios_log struct
> was not NULL but was equal to the ZERO_SIZE_PTR (0x10) value. This was
> due to the following kmemdup() in tpm_read_log_efi():
>
> int tpm_read_log_efi(struct tpm_chip *chip)
> {
> ...
> /* malloc EventLog space */
> log->bios_event_log = kmemdup(log_tbl->log, log_size, GFP_KERNEL);
> if (!log->bios_event_log) {
> ret = -ENOMEM;
> goto out;
> }
> ...
> }
>
> When log_size is zero, due to an empty event log from firmware,
> ZERO_SIZE_PTR is returned from kmemdup(). Upon a read of the
> binary_bios_measurements file, the tpm2_bios_measurements_start()
> function does not perform a ZERO_OR_NULL_PTR() check on the
> bios_event_log pointer before dereferencing it.
>
> Rather than add a ZERO_OR_NULL_PTR() check in functions that make use of
> the bios_event_log pointer, simply avoid creating the
> binary_bios_measurements_file as is done in other event log retrieval
> backends.
>
> Explicitly ignore all of the events in the final event log when the main
> event log is empty. The list of events in the final event log cannot be
> accurately parsed without referring to the first event in the main event
> log (the event log header) so the final event log is useless in such a
> situation.
>
> Fixes: 58cc1e4faf10 ("tpm: parse TPM event logs based on EFI table")
> Link:
> https://lore.kernel.org/linux-integrity/e1fdcccb-ca51-4aee-ac83-9cde995ea...@canonical.com/
> Reported-by: Kai-Heng Feng
> Reported-by: Kenneth R. Crudup
> Reported-by: Mimi Zohar
> Cc: Thiébaud Weksteen
> Cc: Ard Biesheuvel
> Signed-off-by: Tyler Hicks
> ---
Applied, thanks.
> drivers/char/tpm/eventlog/efi.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/char/tpm/eventlog/efi.c b/drivers/char/tpm/eventlog/efi.c
> index 6bb023de17f1..35229e5143ca 100644
> --- a/drivers/char/tpm/eventlog/efi.c
> +++ b/drivers/char/tpm/eventlog/efi.c
> @@ -41,6 +41,11 @@ int tpm_read_log_efi(struct tpm_chip *chip)
> log_size = log_tbl->size;
> memunmap(log_tbl);
>
> + if (!log_size) {
> + pr_warn("UEFI TPM log area empty\n");
> + return -EIO;
> + }
> +
> log_tbl = memremap(efi.tpm_log, sizeof(*log_tbl) + log_size,
> MEMREMAP_WB);
> if (!log_tbl) {
>
> base-commit: ed8780e3f2ecc82645342d070c6b4e530532e680
> --
> 2.25.1
>
>
/Jarkko
Re: [PATCH] pinctrl: aspeed: Fix GPI only function problem.
On Fri, 30 Oct 2020 at 04:28, Andrew Jeffery wrote:
>
> Hi Billy,
>
> On Tue, 27 Oct 2020, at 19:14, Billy Tsai wrote:
> > Some gpio pin at aspeed soc is input only and the prefix name of these
> > pin is "GPI" only. This patch fine-tune the condition of GPIO check from
> > "GPIO" to "GPI".
> >
> > Signed-off-by: Billy Tsai
>
> I'd like it if we were a bit more specific in the commit message, and even
> better if we update the comment in the code. A quick look at the code suggests
> this issue affects GPIO banks D and E in the AST2400 and AST2500, and banks T
> and U in the AST2600.
>
> Functionally I think the patch is fine.
Also add this line:
Fixes: 4d3d0e4272d8 ("pinctrl: Add core support for Aspeed SoCs")
Cheers,
Joel
>
> Cheers,
>
> Andrew
>
> > ---
> > drivers/pinctrl/aspeed/pinctrl-aspeed.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> > b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> > index 53f3f8aec695..a2f5ede3f897 100644
> > --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> > +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> > @@ -292,7 +292,7 @@ static bool aspeed_expr_is_gpio(const struct
> > aspeed_sig_expr *expr)
> >*
> >* expr->signal might look like "GPIOT3" in the GPIO case.
> >*/
> > - return strncmp(expr->signal, "GPIO", 4) == 0;
> > + return strncmp(expr->signal, "GPI", 3) == 0;
> > }
> >
> > static bool aspeed_gpio_in_exprs(const struct aspeed_sig_expr **exprs)
> > --
> > 2.17.1
> >
> >
RE: [PATCH -next] drm/amdgpu/swsmu: Remove unused static struct 'navi10_i2c_algo'
[AMD Official Use Only - Internal Distribution Only]
Other used APIs should be also dropped together.
navi10_i2c_func()
navi10_i2c_xfer()
navi10_i2c_write_data()
navi10_i2c_read_data()
Regards,
Evan
-Original Message-
From: amd-gfx On Behalf Of Zou Wei
Sent: Thursday, October 29, 2020 8:00 PM
To: Deucher, Alexander ; Koenig, Christian
; airl...@linux.ie; dan...@ffwll.ch
Cc: Zou Wei ; dri-de...@lists.freedesktop.org;
amd-...@lists.freedesktop.org; linux-kernel@vger.kernel.org
Subject: [PATCH -next] drm/amdgpu/swsmu: Remove unused static struct
'navi10_i2c_algo'
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/navi10_ppt.c:2527:35:
warning: ‘navi10_i2c_algo’
defined but not used [-Wunused-const-variable=] static const struct
i2c_algorithm navi10_i2c_algo = {
^~~
Reported-by: Hulk Robot
Signed-off-by: Zou Wei
---
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index ef1a62e..bec63f2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2523,12 +2523,6 @@ static u32 navi10_i2c_func(struct i2c_adapter *adap)
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; }
-
-static const struct i2c_algorithm navi10_i2c_algo = {
-.master_xfer = navi10_i2c_xfer,
-.functionality = navi10_i2c_func,
-};
-
static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
void **table)
{
--
2.6.2
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[PATCH] typec: Provide USB PD Specification Revision for cable and partner
The USB Power Delivery specification Section 6.2.1.1.5 outlines
revision backward compatibility requirements starting from Revision 3.0.
The Port, the Cable Plug, and the Port Partner may support either revision
2 or revision 3 individually, and communication between ports, partners,
and cables of different revisions are allowed under rules that the parties
agree to communicate between each other using the lowest common operating
revision.
This may mean that Port-to-Port operating revision comms may be different
than Port-to-CablePlug operating revision comms. For example, it is
possible for a R3.0 port to communicate with a R3.0 cable using R3.0
messages, while the R3.0 port (in the same session) must communicate with
a R2.0 partner using PD R2.0 messages only.
This change will introduce individual revision number tracking for cable
and port partner so that the port can track them independently.
This will also enable future changes which change cable identifier
decoding and visible sysfs nodes based on revision 2 or 3.
Signed-off-by: Benson Leung
---
Documentation/ABI/testing/sysfs-class-typec | 8 +
drivers/usb/typec/class.c | 38 +++--
include/linux/usb/typec.h | 10 ++
3 files changed, 46 insertions(+), 10 deletions(-)
diff --git a/Documentation/ABI/testing/sysfs-class-typec
b/Documentation/ABI/testing/sysfs-class-typec
index b834671522d6..740b226bb80e 100644
--- a/Documentation/ABI/testing/sysfs-class-typec
+++ b/Documentation/ABI/testing/sysfs-class-typec
@@ -102,6 +102,14 @@ Description:
Revision number of the supported USB Power Delivery
specification, or 0 when USB Power Delivery is not supported.
+What:
/sys/class/typec/-{partner|cable}/usb_power_delivery_revision
+Date: October 2020
+Contact: Benson Leung
+Description:
+ Revision number of the supported USB Power Delivery
+ specification of the port partner or cable, or 0 when USB Power
+ Delivery is not supported.
+
What: /sys/class/typec//usb_typec_revision
Date: April 2017
Contact: Heikki Krogerus
diff --git a/drivers/usb/typec/class.c b/drivers/usb/typec/class.c
index 35eec707cb51..abae4cbe66d5 100644
--- a/drivers/usb/typec/class.c
+++ b/drivers/usb/typec/class.c
@@ -25,6 +25,7 @@ struct typec_cable {
enum typec_plug_typetype;
struct usb_pd_identity *identity;
unsigned intactive:1;
+ u16 pd_revision; /* 0300H = "3.0" */
};
struct typec_partner {
@@ -33,6 +34,7 @@ struct typec_partner {
struct usb_pd_identity *identity;
enum typec_accessoryaccessory;
struct ida mode_ids;
+ u16 pd_revision; /* 0300H = "3.0" */
};
struct typec_port {
@@ -146,6 +148,28 @@ static void typec_report_identity(struct device *dev)
sysfs_notify(>kobj, "identity", "product");
}
+static ssize_t usb_power_delivery_revision_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ if (is_typec_partner(dev)) {
+ struct typec_partner *partner = to_typec_partner(dev);
+
+ return sprintf(buf, "%d\n", (partner->pd_revision >> 8) & 0xff);
+ } else if (is_typec_cable(dev)) {
+ struct typec_cable *cable = to_typec_cable(dev);
+
+ return sprintf(buf, "%d\n", (cable->pd_revision >> 8) & 0xff);
+ } else if (is_typec_port(dev)) {
+ struct typec_port *p = to_typec_port(dev);
+
+ return sprintf(buf, "%d\n", (p->cap->pd_revision >> 8) & 0xff);
+ }
+}
+static DEVICE_ATTR_RO(usb_power_delivery_revision);
+
+
+
/* - */
/* Alternate Modes */
@@ -535,6 +559,7 @@ static DEVICE_ATTR_RO(supports_usb_power_delivery);
static struct attribute *typec_partner_attrs[] = {
_attr_accessory_mode.attr,
_attr_supports_usb_power_delivery.attr,
+ _attr_usb_power_delivery_revision.attr,
NULL
};
ATTRIBUTE_GROUPS(typec_partner);
@@ -612,6 +637,7 @@ struct typec_partner *typec_register_partner(struct
typec_port *port,
ida_init(>mode_ids);
partner->usb_pd = desc->usb_pd;
partner->accessory = desc->accessory;
+ partner->pd_revision = desc->pd_revision;
if (desc->identity) {
/*
@@ -773,6 +799,7 @@ static DEVICE_ATTR_RO(plug_type);
static struct attribute *typec_cable_attrs[] = {
_attr_type.attr,
_attr_plug_type.attr,
+ _attr_usb_power_delivery_revision.attr,
NULL
};
ATTRIBUTE_GROUPS(typec_cable);
@@ -875,6 +902,7 @@ struct typec_cable *typec_register_cable(struct typec_port
*port,
linux-next: Fixes tag needs some work in the drm-fixes tree
Hi all,
In commit
65d437b83b2b ("drm/amdgpu/pm: fix the fan speed in fan1_input in manual mode
for navi1x")
Fixes tag
Fixes: 3033e9f1c2de ("drm/amdgpu/swsmu: handle manual fan readback on SMU11")
has these problem(s):
- Target SHA1 does not exist
Mayne you meant
Fixes: f6eb433954bf ("drm/amdgpu/swsmu: handle manual fan readback on SMU11")
--
Cheers,
Stephen Rothwell
pgpI8QJSVphCx.pgp
Description: OpenPGP digital signature
RE:(2) [PATCH v2] input: add 2 kind of switch
Hello, This is Hyungjae Im from Samsung Electronics. Let me answer your questions inline. >On Thu, Oct 29, 2020 at 10:27:47PM +0900, HyungJae Im wrote: >> From: "hj2.im" >> Date: Thu, 29 Oct 2020 22:11:24 +0900 >> Subject: [PATCH v2] input: add 2 kind of switch > >Why is this in the body of that patch? I read "how to send your first kernel patch", but still making so many mistakes. I will be cautious with this. >> >> We need support to various accessories on the device, >> some switch does not exist in switch list. >> So added switch for the following purpose. >> >> SW_COVER_ATTACHED is for the checking the cover >> attached or not on the device. SW_EXT_PEN_ATTACHED is for the >> checking the external pen attached or not on the device > >You didn't answer the previous question as to why the existing values do >not work for you instead of having to create new ones? I think I should clarify this part the most for this review. As you know, new added events both has similar existing events, but it has to operate separately. First, SW_COVER_ATTACHED is similar with SW_MACHINE_COVER. We need two events for our cover interaction. One is to detect if flip cover is open/closed(covers screen or not), and one is for detecting if cover is attached(detect if device is put into cover). With the second event, we send event for attachment and start authentication distinguishing if it was Samsung made cover. Second, SW_EXT_PEN_ATTACHED detects if pen is attached externally on tablet models. It is different with SW_PEN_INSERTED since this is detecting pens like our NOTE series. SW_EXT_PEN_ATTACHED has an unique role to set wacom tuning table differently while pen is attached/detached. >> >> Signed-off-by: Hyungjae Im >> --- >> drivers/input/Kconfig | 20 ++ >> drivers/input/Makefile | 3 + >> drivers/input/cover_detect.c | 242 >> drivers/input/ext_pen_detect.c | 243 + >> include/linux/mod_devicetable.h| 2 +- >> include/uapi/linux/input-event-codes.h | 4 +- >> 6 files changed, 512 insertions(+), 2 deletions(-) >> create mode 100644 drivers/input/cover_detect.c >> create mode 100644 drivers/input/ext_pen_detect.c >If this is v2, what changed from v1? > >And this is 2 different drivers, it should be 2 different patches at the >least, right?> V2 has additional submit for drivers using SW events. I will separate these two drivers and submit it separately. >> >> diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig >> index 1efd3154b68d..df902f4a549e 100644 >> --- a/drivers/input/Kconfig >> +++ b/drivers/input/Kconfig >> @@ -185,6 +185,26 @@ config INPUT_APMPOWER >>To compile this driver as a module, choose M here: the >>module will be called apm-power. >> >> +config COVER_DETECT >INPUT_COVER_DETECT? Will change feature name to INPUT_COVER_DETECT. >> +tristate "Enable cover attach detection" >> +default n >"default n" is always the default, no need for this here. Thanks for comment. I will erase it. >> +help >> + Say Y here to enable cover attach detection >> + and send a event when cover is attached/detached. >> + Active gpio state is low and active event value is 0. >> + >> + If unsure, say N. >What is the module name? I will add additional explanation for module name >> + >> +config EXT_PEN_DETECT >INPUT_EXT_PEN_DETECT? > +tristate "Enable external pen attach detection" > +default n >No default n. >> +help >> + Say Y here to enable external pen attach detection >> + and send a event when external pen is attached/detached. >> + Active gpio state is low and active event value is 0. >> + >> + If unsure, say N. >What is the module name? >> + >> comment "Input Device Drivers" >> >> source "drivers/input/keyboard/Kconfig" >> diff --git a/drivers/input/Makefile b/drivers/input/Makefile >> index e35650930371..31ee1f2d2e21 100644 >> --- a/drivers/input/Makefile >> +++ b/drivers/input/Makefile >> @@ -29,3 +29,6 @@ obj-$(CONFIG_INPUT_MISC)+= misc/ >> obj-$(CONFIG_INPUT_APMPOWER)+= apm-power.o >> >> obj-$(CONFIG_RMI4_CORE)+= rmi4/ >> + >> +obj-$(CONFIG_COVER_DETECT)+= cover_detect.o >> +obj-$(CONFIG_EXT_PEN_DETECT)+= ext_pen_detect.o >> diff --git a/drivers/input/cover_detect.c b/drivers/input/cover_detect.c >> new file mode 100644 >> index ..4d3d68c616ec >> --- /dev/null >> +++ b/drivers/input/cover_detect.c >> @@ -0,0 +1,242 @@ >> +/* >> + * Copyright (C) 2015 Samsung Electronics Co. Ltd. All Rights Reserved. >Please use a SPDX line, and no need for this: >> + * >> + * This software is licensed under the terms of the GNU General Public >> + * License version 2, as published by the Free Software Foundation, and >> + * may be
Re: [PATCH] pinctrl: aspeed: Fix GPI only function problem.
Hi Billy, On Tue, 27 Oct 2020, at 19:14, Billy Tsai wrote: > Some gpio pin at aspeed soc is input only and the prefix name of these > pin is "GPI" only. This patch fine-tune the condition of GPIO check from > "GPIO" to "GPI". > > Signed-off-by: Billy Tsai I'd like it if we were a bit more specific in the commit message, and even better if we update the comment in the code. A quick look at the code suggests this issue affects GPIO banks D and E in the AST2400 and AST2500, and banks T and U in the AST2600. Functionally I think the patch is fine. Cheers, Andrew > --- > drivers/pinctrl/aspeed/pinctrl-aspeed.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c > b/drivers/pinctrl/aspeed/pinctrl-aspeed.c > index 53f3f8aec695..a2f5ede3f897 100644 > --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c > +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c > @@ -292,7 +292,7 @@ static bool aspeed_expr_is_gpio(const struct > aspeed_sig_expr *expr) >* >* expr->signal might look like "GPIOT3" in the GPIO case. >*/ > - return strncmp(expr->signal, "GPIO", 4) == 0; > + return strncmp(expr->signal, "GPI", 3) == 0; > } > > static bool aspeed_gpio_in_exprs(const struct aspeed_sig_expr **exprs) > -- > 2.17.1 > >
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:1229:7: error: implicit declaration of function 'msm_dp_display_pre_disable'; did you mean
Hi Kuogee,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 07e0887302450a62f51dba72df6afb5fabb23d1c
commit: 8ede2ecc3e5ee327923f6e3cfe52761ce73607d1 drm/msm/dp: Add DP compliance
tests on Snapdragon Chipsets
date: 6 weeks ago
config: arm64-randconfig-r032-20201030 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=8ede2ecc3e5ee327923f6e3cfe52761ce73607d1
git remote add linus
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 8ede2ecc3e5ee327923f6e3cfe52761ce73607d1
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross
ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot
All errors (new ones prefixed by >>):
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c: In function
'dpu_encoder_virt_mode_set':
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:981:31: warning: variable
'num_dspp' set but not used [-Wunused-but-set-variable]
981 | int num_lm, num_ctl, num_pp, num_dspp;
| ^~~~
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:976:30: warning: variable
'topology' set but not used [-Wunused-but-set-variable]
976 | struct msm_display_topology topology;
| ^~~~
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c: In function
'_dpu_encoder_virt_enable_helper':
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:1099:26: warning: variable
'priv' set but not used [-Wunused-but-set-variable]
1099 | struct msm_drm_private *priv;
| ^~~~
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c: In function
'dpu_encoder_virt_disable':
>> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:1229:7: error: implicit
>> declaration of function 'msm_dp_display_pre_disable'; did you mean
>> 'msm_dp_display_disable'? [-Werror=implicit-function-declaration]
1229 | if (msm_dp_display_pre_disable(priv->dp, drm_enc))
| ^~
| msm_dp_display_disable
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:1203:18: warning: variable
'dpu_kms' set but not used [-Wunused-but-set-variable]
1203 | struct dpu_kms *dpu_kms;
| ^~~
cc1: some warnings being treated as errors
vim +1229 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
1198
1199 static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
1200 {
1201 struct dpu_encoder_virt *dpu_enc = NULL;
1202 struct msm_drm_private *priv;
1203 struct dpu_kms *dpu_kms;
1204 int i = 0;
1205
1206 if (!drm_enc) {
1207 DPU_ERROR("invalid encoder\n");
1208 return;
1209 } else if (!drm_enc->dev) {
1210 DPU_ERROR("invalid dev\n");
1211 return;
1212 }
1213
1214 dpu_enc = to_dpu_encoder_virt(drm_enc);
1215 DPU_DEBUG_ENC(dpu_enc, "\n");
1216
1217 mutex_lock(_enc->enc_lock);
1218 dpu_enc->enabled = false;
1219
1220 priv = drm_enc->dev->dev_private;
1221 dpu_kms = to_dpu_kms(priv->kms);
1222
1223 trace_dpu_enc_disable(DRMID(drm_enc));
1224
1225 /* wait for idle */
1226 dpu_encoder_wait_for_event(drm_enc, MSM_ENC_TX_COMPLETE);
1227
1228 if (drm_enc->encoder_type == DRM_MODE_ENCODER_TMDS && priv->dp)
{
> 1229 if (msm_dp_display_pre_disable(priv->dp, drm_enc))
1230 DPU_ERROR_ENC(dpu_enc, "dp display push idle
failed\n");
1231 }
1232
1233 dpu_encoder_resource_control(drm_enc,
DPU_ENC_RC_EVENT_PRE_STOP);
1234
1235 for (i = 0; i < dpu_enc->num_phys_encs; i++) {
1236 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
1237
1238 if (phys->ops.disable)
1239 phys->ops.disable(phys);
1240 }
1241
1242
1243 /* after phys waits for frame-done, should be no more frames
pending */
1244 if (atomic_xchg(_enc->frame_done_timeout_ms, 0)) {
1245 DPU_ERROR("enc%d timeout pending\n", drm_enc->base.id);
1246 del_timer_sync(_enc->frame_done_timer);
1247 }
1248
1249 dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_STOP);
1250
1251 for (i = 0; i < dpu_enc->num_phys_encs; i++) {
1252
[BUG] Stack overflow when running perf and function tracer
I found a bug in the recursion protection that prevented function tracing from running in NMI context. Applying this fix to 5.9 worked fine (tested by running perf record and function tracing at the same time). But when I applied the patch to 5.10-rc1, it blew up with a stack overflow: perf: interrupt took too long (14611 > 13550), lowering kernel.perf_event_max_sample_rate to 13000 perf: interrupt took too long (27965 > 18263), lowering kernel.perf_event_max_sample_rate to 7000 INFO: NMI handler (perf_event_nmi_handler) took too long to run: 0.000 msecs INFO: NMI handler (perf_event_nmi_handler) took too long to run: 1.087 msecs INFO: NMI handler (perf_event_nmi_handler) took too long to run: 9.082 msecs perf: interrupt took too long (27965 > 18263), lowering kernel.perf_event_max_sample_rate to 7000 traps: PANIC: double fault, error_code: 0x0 double fault: [#1] PREEMPT SMP PTI CPU: 1 PID: 1655 Comm: perf Not tainted 5.9.0-rc1-test+ #685 Hardware name: Hewlett-Packard HP Compaq Pro 6300 SFF/339A, BIOS K01 v03.03 07/14/2016 RIP: 0010:__rb_reserve_next+0xb/0x450 Code: 4f 10 f0 ff 41 08 0f 0b 83 f8 02 0f 84 97 fb ff ff e9 a5 fc ff ff b8 04 00 00 00 eb e1 66 90 41 57 41 56 41 55 41 54 49 89 f4 <55> 48 89 fd 53 48 83 ec 08 48 8b 9f 98 00 00 00 48 89 5e 28 4c 8b RSP: 0018:fe03c000 EFLAGS: 00010046 RAX: 001c RBX: 928ada27b400 RCX: RDX: 928ada07b200 RSI: fe03c028 RDI: 928ada27b400 RBP: 928ada27b4f0 R08: 0001 R09: R10: fe03c440 R11: 928a7383cc60 R12: fe03c028 R13: 03e8 R14: 0046 R15: 00110001 FS: 7f25d43cf780() GS:928adaa4() knlGS: CS: 0010 DS: ES: CR0: 80050033 CR2: fe03bff8 CR3: b52a8005 CR4: 001707e0 Call Trace: ring_buffer_lock_reserve+0x12c/0x380 ? perf_output_begin+0x4d/0x2d0 ? rcu_panic+0x20/0x20 trace_function+0x27/0x130 ? rcu_panic+0x20/0x20 ? perf_output_begin+0x4d/0x2d0 function_trace_call+0x133/0x180 0xc02a106a ? __rcu_read_lock+0x5/0x20 __rcu_read_lock+0x5/0x20 perf_output_begin+0x4d/0x2d0 ? sched_clock+0x5/0x10 ? trace_clock_local+0xc/0x20 ? __rb_reserve_next+0x5c/0x450 ? sched_clock+0x5/0x10 ? ring_buffer_lock_reserve+0x12c/0x380 ? sched_clock+0x5/0x10 ? trace_clock_local+0xc/0x20 ? __rb_reserve_next+0x5c/0x450 ? ring_buffer_lock_reserve+0x12c/0x380 ? perf_log_throttle+0x9a/0x120 ? perf_log_throttle+0x9a/0x120 ? perf_output_begin_backward+0x280/0x280 ? trace_function+0x88/0x130 ? ring_buffer_unlock_commit+0x25/0x140 ? perf_output_begin_backward+0x280/0x280 ? perf_log_throttle+0x9a/0x120 ? function_trace_call+0x133/0x180 ? 0xc02a106a ? perf_log_throttle+0x9a/0x120 ? perf_output_begin+0x5/0x2d0 ? __perf_event_header__init_id.isra.0+0x39/0xd0 ? perf_output_begin+0x5/0x2d0 perf_log_throttle+0x9a/0x120 ? trace_clock_local+0xc/0x20 ? __rb_reserve_next+0x5c/0x450 ? sched_clock+0x5/0x10 ? ring_buffer_lock_reserve+0x12c/0x380 ? sched_clock+0x5/0x10 ? sched_clock+0x5/0x10 ? sched_clock+0x5/0x10 ? trace_clock_local+0xc/0x20 ? __rb_reserve_next+0x5c/0x450 ? sched_clock+0x5/0x10 ? trace_clock_local+0xc/0x20 ? __rb_reserve_next+0x5c/0x450 ? setup_pebs_fixed_sample_data+0x365/0x3a0 ? setup_pebs_fixed_sample_data+0x365/0x3a0 ? intel_pmu_pebs_event_update_no_drain+0x70/0x70 ? trace_function+0x88/0x130 ? ring_buffer_unlock_commit+0x25/0x140 ? intel_pmu_pebs_event_update_no_drain+0x70/0x70 ? setup_pebs_fixed_sample_data+0x365/0x3a0 ? function_trace_call+0x133/0x180 ? intel_pmu_pebs_fixup_ip+0x32/0x1b0 ? function_trace_call+0x133/0x180 ? native_write_msr+0x6/0x20 __perf_event_account_interrupt+0xa9/0x120 __perf_event_overflow+0x2b/0xf0 __intel_pmu_pebs_event+0x2ec/0x3e0 ? trace_function+0x88/0x130 ? ring_buffer_unlock_commit+0x25/0x140 ? setup_pebs_adaptive_sample_data+0x3e0/0x3e0 ? 0xc02a106a ? 0xc02a106a ? generic_exec_single+0xa6/0xe0 ? perf_duration_warn+0x20/0x20 ? generic_exec_single+0xa6/0xe0 ? native_write_msr+0x6/0x20 ? ring_buffer_lock_reserve+0x1b9/0x380 ? ring_buffer_lock_reserve+0x12c/0x380 ? intel_pmu_drain_pebs_nhm+0x268/0x330 ? intel_pmu_drain_pebs_nhm+0x268/0x330 ? release_bts_buffer+0x60/0x60 ? trace_function+0x88/0x130 ? ring_buffer_unlock_commit+0x25/0x140 ? release_bts_buffer+0x60/0x60 ? intel_pmu_drain_pebs_nhm+0x268/0x330 ? function_trace_call+0x133/0x180 ? 0xc02a106a ? ring_buffer_lock_reserve+0x12c/0x380 intel_pmu_drain_pebs_nhm+0x268/0x330 ? setup_pebs_adaptive_sample_data+0x3e0/0x3e0 handle_pmi_common+0xc2/0x2b0 ? __rb_reserve_next+0x5c/0x450 ? sched_clock+0x5/0x10 ? trace_clock_local+0xc/0x20 ? __rb_reserve_next+0x5c/0x450 ? ring_buffer_lock_reserve+0x12c/0x380 ? intel_pmu_handle_irq+0xc8/0x160 ? intel_pmu_ha Lost 135
One note
Pages in active areas shouldn’t be swapped out only those in inactive areas. So it’s a bit like seminary rock. Sent from my iPhone
Re: [PATCH] opp: Reduce the size of critical section in _opp_table_kref_release()
On 29-10-20, 09:40, Viresh Kumar wrote: > Thanks a lot. I was a bit worried about the crazy idea I had to solve > this :) Hmm, I thought this is the other patch where I had that crazy idea. This one was quite straight forward :) -- viresh
Freezing between .48 and .51 when hitting swap.
I have an issue on my laptop which is old but with 2.5gb of ram an ssd hdd and using zram compression I believe. When ever it hits swap the system completely locks up and I have to reboot. This only started occurring in .51 I only have access to my phone at the moment though I’ve looked at the code and have what I believe is a workable solution that should mitigate against and future issues. The code base looked a little old so was probably quite stable but it really could do with some modernisation. The issue was with the active app in user space. What needs to be done is to swap out inactive pages in background user apps prior to the active apps hitting the memory threshold which was causing the lockup to occure. An improvement on the existing code would be to swap in and out inactive pages gradually so as to avoid any heavy system load. It may also be an idea to set the up priority to near idel for such heavy io background processes so that the overlapping io doesn’t cause issues with user space io. I believe this is similar to the main Linux scheduler since bfs because implementing a script to renice processes that started hitting higish cpu and then again when their cpu dipped didn’t seem to make much difference. It was unclear if this was also implemented for cocurent io as the window managers now seem to queue io tasks instead of executing them concurrently. Concurrent io was at least a historic issue. Kind regards, Oliverthered Sent from my iPhone
Re: [PATCH] drivers: amdgpu: Correct spelling defalut to default in comment
Applied. Thanks!
Alex
On Thu, Oct 29, 2020 at 9:17 AM Bhaskar Chowdhury wrote:
>
> Correct spelling in one of the comment.
>
> s/defalut/default/p
>
> Signed-off-by: Bhaskar Chowdhury
> ---
> CCing Greg becasue it touched drivers file. Trivial though.
>
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
> index 8cd646eef096..cdc8dd220a77 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
> @@ -556,7 +556,7 @@ static ssize_t dp_phy_test_pattern_debugfs_write(struct
> file *f, const char __us
> bool disable_hpd = false;
> bool valid_test_pattern = false;
> uint8_t param_nums = 0;
> - /* init with defalut 80bit custom pattern */
> + /* init with default 80bit custom pattern */
> uint8_t custom_pattern[10] = {
> 0x1f, 0x7c, 0xf0, 0xc1, 0x07,
> 0x1f, 0x7c, 0xf0, 0xc1, 0x07
> --
> 2.26.2
>
> ___
> amd-gfx mailing list
> amd-...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
linux-next: Tree for Oct 30
Hi all, Changes since 20201029: The drm-misc tree gained a build failure so I used the version from next-20201029. The pinctrl tree gained a build failure so I reverted a commit. Non-merge commits (relative to Linus' tree): 1997 2411 files changed, 324993 insertions(+), 49232 deletions(-) I have created today's linux-next tree at git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git (patches at http://www.kernel.org/pub/linux/kernel/next/ ). If you are tracking the linux-next tree using git, you should not use "git pull" to do so as that will try to merge the new linux-next release with the old one. You should use "git fetch" and checkout or reset to the new master. You can see which trees have been included by looking in the Next/Trees file in the source. There are also quilt-import.log and merge.log files in the Next directory. Between each merge, the tree was built with a ppc64_defconfig for powerpc, an allmodconfig for x86_64, a multi_v7_defconfig for arm and a native build of tools/perf. After the final fixups (if any), I do an x86_64 modules_install followed by builds for x86_64 allnoconfig, powerpc allnoconfig (32 and 64 bit), ppc44x_defconfig, allyesconfig and pseries_le_defconfig and i386, sparc and sparc64 defconfig and htmldocs. And finally, a simple boot test of the powerpc pseries_le_defconfig kernel in qemu (with and without kvm enabled). Below is a summary of the state of the merge. I am currently merging 327 trees (counting Linus' and 85 trees of bug fix patches pending for the current merge release). Stats about the size of the tree over time can be seen at http://neuling.org/linux-next-size.html . Status of my local build tests will be at http://kisskb.ellerman.id.au/linux-next . If maintainers want to give advice about cross compilers/configs that work, we are always open to add more builds. Thanks to Randy Dunlap for doing many randconfig builds. And to Paul Gortmaker for triage and bug fixes. -- Cheers, Stephen Rothwell $ git checkout master $ git reset --hard stable Merging origin/master (07e088730245 Merge tag 'fallthrough-fixes-clang-5.10-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux) Merging fixes/fixes (9123e3a74ec7 Linux 5.9-rc1) Merging kbuild-current/fixes (e36aec504147 builddeb: Fix rootless build in setuid/setgid directory) Merging arc-current/for-curr (3650b228f83a Linux 5.10-rc1) Merging arm-current/fixes (9fa2e7af3d53 ARM: 9019/1: kprobes: Avoid fortify_panic() when copying optprobe template) Merging arm64-fixes/for-next/fixes (96d389ca1011 arm64: Add workaround for Arm Cortex-A77 erratum 1508412) Merging arm-soc-fixes/arm/fixes (deaafe8edde7 Merge tag 'sunxi-fixes-for-5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes) Merging drivers-memory-fixes/fixes (3650b228f83a Linux 5.10-rc1) Merging m68k-current/for-linus (50c5feeea0af ide/macide: Convert Mac IDE driver to platform driver) Merging powerpc-fixes/fixes (4ff753feab02 powerpc/pseries: Avoid using addr_to_pfn in real mode) Merging s390-fixes/fixes (8e90b4b1305a s390: correct __bootdata / __bootdata_preserved macros) Merging sparc/master (0a95a6d1a4cd sparc: use for_each_child_of_node() macro) Merging fscrypt-current/for-stable (2b4eae95c736 fscrypt: don't evict dirty inodes after removing key) Merging net/master (07e088730245 Merge tag 'fallthrough-fixes-clang-5.10-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux) Merging bpf/master (0698ac66e010 tools, bpftool: Remove two unused variables.) Merging ipsec/master (a779d91314ca net: xfrm: fix a race condition during allocing spi) Merging netfilter/master (c77761c8a594 netfilter: nf_fwd_netdev: clear timestamp in forwarding path) Merging ipvs/master (c77761c8a594 netfilter: nf_fwd_netdev: clear timestamp in forwarding path) Merging wireless-drivers/master (3650b228f83a Linux 5.10-rc1) Merging mac80211/master (435ccfa894e3 tcp: Prevent low rmem stalls with SO_RCVLOWAT.) Merging rdma-fixes/for-rc (a2267f8a52ee RDMA/qedr: Fix memory leak in iWARP CM) Merging sound-current/for-linus (9fc149c3bce7 ALSA: hda: Reinstate runtime_allow() for all hda controllers) Merging sound-asoc-fixes/for-linus (838c70799b04 Merge remote-tracking branch 'asoc/for-5.10' into asoc-linus) Merging regmap-fixes/for-linus (780f88b04704 Merge remote-tracking branch 'regmap/for-5.10' into regmap-linus) Merging regulator-fixes/for-linus (c432bf3e3d82 Merge remote-tracking branch 'regulator/for-5.10' into regulator-linus) Merging spi-fixes/for-linus (9b3a2f2e8a67 Merge remote-tracking branch 'spi/for-5.10' into spi-linus) Merging pci-current/for-linus (3650b228f83a Linux 5.10-rc1) Merging driver-core.current/driver-core-linus (3650b228f83a Linux 5.10-rc1) Merging tty.current/tty-linus (d54654790302 vt_ioctl: fix GIO_UNIMAP regression) Merging usb.current/usb-linus (712da5fc4a6
[PATCH v3 06/12] bus: mhi: core: Move to an error state on any firmware load failure
Move MHI to a firmware download error state for a failure to find
the firmware files or to load SBL or EBL image using BHI/BHIe. This
helps detect an error state sooner and shortens the wait for a
synchronous power up timeout.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/core/boot.c | 35 ---
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/drivers/bus/mhi/core/boot.c b/drivers/bus/mhi/core/boot.c
index 7d6b3a7..cec5010 100644
--- a/drivers/bus/mhi/core/boot.c
+++ b/drivers/bus/mhi/core/boot.c
@@ -425,13 +425,13 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
!mhi_cntrl->seg_len))) {
dev_err(dev,
"No firmware image defined or !sbl_size || !seg_len\n");
- return;
+ goto error_fw_load;
}
ret = request_firmware(, fw_name, dev);
if (ret) {
dev_err(dev, "Error loading firmware: %d\n", ret);
- return;
+ goto error_fw_load;
}
size = (mhi_cntrl->fbc_download) ? mhi_cntrl->sbl_size : firmware->size;
@@ -443,7 +443,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
buf = mhi_alloc_coherent(mhi_cntrl, size, _addr, GFP_KERNEL);
if (!buf) {
release_firmware(firmware);
- return;
+ goto error_fw_load;
}
/* Download image using BHI */
@@ -451,17 +451,17 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
ret = mhi_fw_load_bhi(mhi_cntrl, dma_addr, size);
mhi_free_coherent(mhi_cntrl, size, buf, dma_addr);
- if (!mhi_cntrl->fbc_download || ret || mhi_cntrl->ee == MHI_EE_EDL)
- release_firmware(firmware);
-
/* Error or in EDL mode, we're done */
if (ret) {
dev_err(dev, "MHI did not load image over BHI, ret: %d\n", ret);
- return;
+ release_firmware(firmware);
+ goto error_fw_load;
}
- if (mhi_cntrl->ee == MHI_EE_EDL)
+ if (mhi_cntrl->ee == MHI_EE_EDL) {
+ release_firmware(firmware);
return;
+ }
write_lock_irq(_cntrl->pm_lock);
mhi_cntrl->dev_state = MHI_STATE_RESET;
@@ -474,13 +474,17 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
if (mhi_cntrl->fbc_download) {
ret = mhi_alloc_bhie_table(mhi_cntrl, _cntrl->fbc_image,
firmware->size);
- if (ret)
- goto error_alloc_fw_table;
+ if (ret) {
+ release_firmware(firmware);
+ goto error_fw_load;
+ }
/* Load the firmware into BHIE vec table */
mhi_firmware_copy(mhi_cntrl, firmware, mhi_cntrl->fbc_image);
}
+ release_firmware(firmware);
+
fw_load_ee_pthru:
/* Transitioning into MHI RESET->READY state */
ret = mhi_ready_state_transition(mhi_cntrl);
@@ -509,11 +513,11 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
ret = mhi_fw_load_bhie(mhi_cntrl,
/* Vector table is the last entry */
_info->mhi_buf[image_info->entries - 1]);
- if (ret)
+ if (ret) {
dev_err(dev, "MHI did not load image over BHIe, ret: %d\n",
ret);
-
- release_firmware(firmware);
+ goto error_fw_load;
+ }
return;
@@ -521,6 +525,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
mhi_free_bhie_table(mhi_cntrl, mhi_cntrl->fbc_image);
mhi_cntrl->fbc_image = NULL;
-error_alloc_fw_table:
- release_firmware(firmware);
+error_fw_load:
+ mhi_cntrl->pm_state = MHI_PM_FW_DL_ERR;
+ wake_up_all(_cntrl->state_event);
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 03/12] bus: mhi: core: Skip device wake in error or shutdown states
MHI client drivers can request a device wake even if the device
may be in an error state or undergoing a shutdown. To prevent
unnecessary device wake processing, check for the device state
and bail out early so that the clients are made aware of the
device state sooner.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Manivannan Sadhasivam
---
drivers/bus/mhi/core/pm.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c
index 805b6fa74..0299196 100644
--- a/drivers/bus/mhi/core/pm.c
+++ b/drivers/bus/mhi/core/pm.c
@@ -827,6 +827,10 @@ int __mhi_device_get_sync(struct mhi_controller *mhi_cntrl)
/* Wake up the device */
read_lock_bh(_cntrl->pm_lock);
+ if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {
+ read_unlock_bh(_cntrl->pm_lock);
+ return -EIO;
+ }
mhi_cntrl->wake_get(mhi_cntrl, true);
if (MHI_PM_IN_SUSPEND_STATE(mhi_cntrl->pm_state))
mhi_trigger_resume(mhi_cntrl);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 01/12] bus: mhi: core: Use appropriate names for firmware load functions
mhi_fw_load_sbl() function is currently used to transfer SBL or EDL
images over BHI (Boot Host Interface). Same goes with mhi_fw_load_amss()
which uses BHIe. However, the contents of these functions do not
indicate support for a specific set of images. Since these can be used
for any image download over BHI or BHIe, rename them based on the
protocol used.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/core/boot.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/bus/mhi/core/boot.c b/drivers/bus/mhi/core/boot.c
index 24422f5..7d6b3a7 100644
--- a/drivers/bus/mhi/core/boot.c
+++ b/drivers/bus/mhi/core/boot.c
@@ -171,7 +171,7 @@ int mhi_download_rddm_img(struct mhi_controller *mhi_cntrl,
bool in_panic)
}
EXPORT_SYMBOL_GPL(mhi_download_rddm_img);
-static int mhi_fw_load_amss(struct mhi_controller *mhi_cntrl,
+static int mhi_fw_load_bhie(struct mhi_controller *mhi_cntrl,
const struct mhi_buf *mhi_buf)
{
void __iomem *base = mhi_cntrl->bhie;
@@ -187,7 +187,7 @@ static int mhi_fw_load_amss(struct mhi_controller
*mhi_cntrl,
}
sequence_id = MHI_RANDOM_U32_NONZERO(BHIE_TXVECSTATUS_SEQNUM_BMSK);
- dev_dbg(dev, "Starting AMSS download via BHIe. Sequence ID:%u\n",
+ dev_dbg(dev, "Starting image download via BHIe. Sequence ID: %u\n",
sequence_id);
mhi_write_reg(mhi_cntrl, base, BHIE_TXVECADDR_HIGH_OFFS,
upper_32_bits(mhi_buf->dma_addr));
@@ -218,7 +218,7 @@ static int mhi_fw_load_amss(struct mhi_controller
*mhi_cntrl,
return (!ret) ? -ETIMEDOUT : 0;
}
-static int mhi_fw_load_sbl(struct mhi_controller *mhi_cntrl,
+static int mhi_fw_load_bhi(struct mhi_controller *mhi_cntrl,
dma_addr_t dma_addr,
size_t size)
{
@@ -245,7 +245,7 @@ static int mhi_fw_load_sbl(struct mhi_controller *mhi_cntrl,
}
session_id = MHI_RANDOM_U32_NONZERO(BHI_TXDB_SEQNUM_BMSK);
- dev_dbg(dev, "Starting SBL download via BHI. Session ID:%u\n",
+ dev_dbg(dev, "Starting image download via BHI. Session ID: %u\n",
session_id);
mhi_write_reg(mhi_cntrl, base, BHI_STATUS, 0);
mhi_write_reg(mhi_cntrl, base, BHI_IMGADDR_HIGH,
@@ -446,9 +446,9 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
return;
}
- /* Download SBL image */
+ /* Download image using BHI */
memcpy(buf, firmware->data, size);
- ret = mhi_fw_load_sbl(mhi_cntrl, dma_addr, size);
+ ret = mhi_fw_load_bhi(mhi_cntrl, dma_addr, size);
mhi_free_coherent(mhi_cntrl, size, buf, dma_addr);
if (!mhi_cntrl->fbc_download || ret || mhi_cntrl->ee == MHI_EE_EDL)
@@ -456,7 +456,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
/* Error or in EDL mode, we're done */
if (ret) {
- dev_err(dev, "MHI did not load SBL, ret:%d\n", ret);
+ dev_err(dev, "MHI did not load image over BHI, ret: %d\n", ret);
return;
}
@@ -506,11 +506,12 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
/* Start full firmware image download */
image_info = mhi_cntrl->fbc_image;
- ret = mhi_fw_load_amss(mhi_cntrl,
+ ret = mhi_fw_load_bhie(mhi_cntrl,
/* Vector table is the last entry */
_info->mhi_buf[image_info->entries - 1]);
if (ret)
- dev_err(dev, "MHI did not load AMSS, ret:%d\n", ret);
+ dev_err(dev, "MHI did not load image over BHIe, ret: %d\n",
+ ret);
release_firmware(firmware);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 00/12] Bug fixes and improvements for MHI power operations
Bug fixes and improvements for MHI powerup and shutdown handling. Firmware load function names are updated to accurately reflect their purpose. Closed certain design gaps where the host (MHI bus) would allow clients to operate after a power down or error detection. Move to an error state sooner based on different scenarios. These patches were tested on arm64 and X86_64 architectures. v3: -Fixed bus: mhi: core: Remove MHI event ring IRQ handlers when powering down -Mistakenly placed the free_irq() calls in mhi_pm_sys_error_transition() -Moved it to mhi_pm_disable_transition() v2: -Addressed patches based on review comments and made improvements -Added bus: mhi: core: Check for IRQ availability during registration -Dropped bus: mhi: core: Use the IRQF_ONESHOT flag for the BHI interrupt line -Split bus: mhi: core: Move to an error state on any firmware load failure -Modified the following patches: -bus: mhi: core: Disable IRQs when powering down -bus: mhi: core: Improve shutdown handling after link down detection -bus: mhi: core: Mark device inactive soon after host issues a shutdown -bus: mhi: core: Move to SYS_ERROR regardless of RDDM capability -Addressed the above as follow-up patches with improvements: -bus: mhi: core: Prevent sending multiple RDDM entry callbacks -bus: mhi: core: Separate system error and power down handling -bus: mhi: core: Remove MHI event ring IRQ handlers when powering down Bhaumik Bhatt (12): bus: mhi: core: Use appropriate names for firmware load functions bus: mhi: core: Move to using high priority workqueue bus: mhi: core: Skip device wake in error or shutdown states bus: mhi: core: Move to SYS_ERROR regardless of RDDM capability bus: mhi: core: Prevent sending multiple RDDM entry callbacks bus: mhi: core: Move to an error state on any firmware load failure bus: mhi: core: Use appropriate label in firmware load handler API bus: mhi: core: Move to an error state on mission mode failure bus: mhi: core: Check for IRQ availability during registration bus: mhi: core: Separate system error and power down handling bus: mhi: core: Mark and maintain device states early on after power down bus: mhi: core: Remove MHI event ring IRQ handlers when powering down drivers/bus/mhi/core/boot.c | 60 ++- drivers/bus/mhi/core/init.c | 10 +- drivers/bus/mhi/core/main.c | 16 +-- drivers/bus/mhi/core/pm.c | 236 include/linux/mhi.h | 2 + 5 files changed, 225 insertions(+), 99 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[PATCH v3 11/12] bus: mhi: core: Mark and maintain device states early on after power down
mhi_power_down() does not ensure that the PM state is moved to an
inaccessible state soon enough as the system can encounter
scheduling delays till mhi_pm_disable_transition() gets called.
Additionally, if an MHI controller decides that the device is now
inaccessible and issues a power down, the register inaccessible
state is not maintained by moving from MHI_PM_LD_ERR_FATAL_DETECT
to MHI_PM_SHUTDOWN_PROCESS. This can result in bus errors if a
client driver attempted to read registers when powering down.
Close these gaps and avoid any race conditions to prevent such
activity.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/core/pm.c | 77 ---
1 file changed, 33 insertions(+), 44 deletions(-)
diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c
index 347ae7d..ffbf6f5 100644
--- a/drivers/bus/mhi/core/pm.c
+++ b/drivers/bus/mhi/core/pm.c
@@ -37,9 +37,10 @@
* M0 -> FW_DL_ERR
* M0 -> M3_ENTER -> M3 -> M3_EXIT --> M0
* L1: SYS_ERR_DETECT -> SYS_ERR_PROCESS --> POR
- * L2: SHUTDOWN_PROCESS -> DISABLE
+ * L2: SHUTDOWN_PROCESS -> LD_ERR_FATAL_DETECT
+ * SHUTDOWN_PROCESS -> DISABLE
* L3: LD_ERR_FATAL_DETECT <--> LD_ERR_FATAL_DETECT
- * LD_ERR_FATAL_DETECT -> SHUTDOWN_PROCESS
+ * LD_ERR_FATAL_DETECT -> DISABLE
*/
static struct mhi_pm_transitions const dev_state_transitions[] = {
/* L0 States */
@@ -72,7 +73,7 @@ static struct mhi_pm_transitions const
dev_state_transitions[] = {
{
MHI_PM_M3,
MHI_PM_M3_EXIT | MHI_PM_SYS_ERR_DETECT |
- MHI_PM_SHUTDOWN_PROCESS | MHI_PM_LD_ERR_FATAL_DETECT
+ MHI_PM_LD_ERR_FATAL_DETECT
},
{
MHI_PM_M3_EXIT,
@@ -103,7 +104,7 @@ static struct mhi_pm_transitions const
dev_state_transitions[] = {
/* L3 States */
{
MHI_PM_LD_ERR_FATAL_DETECT,
- MHI_PM_LD_ERR_FATAL_DETECT | MHI_PM_SHUTDOWN_PROCESS
+ MHI_PM_LD_ERR_FATAL_DETECT | MHI_PM_DISABLE
},
};
@@ -445,10 +446,9 @@ static int mhi_pm_mission_mode_transition(struct
mhi_controller *mhi_cntrl)
}
/* Handle shutdown transitions */
-static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl,
- enum mhi_pm_state transition_state)
+static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl)
{
- enum mhi_pm_state cur_state, prev_state;
+ enum mhi_pm_state cur_state;
struct mhi_event *mhi_event;
struct mhi_cmd_ctxt *cmd_ctxt;
struct mhi_cmd *mhi_cmd;
@@ -456,33 +456,13 @@ static void mhi_pm_disable_transition(struct
mhi_controller *mhi_cntrl,
struct device *dev = _cntrl->mhi_dev->dev;
int ret, i;
- dev_dbg(dev, "Transitioning from PM state: %s to: %s\n",
- to_mhi_pm_state_str(mhi_cntrl->pm_state),
- to_mhi_pm_state_str(transition_state));
+ dev_dbg(dev, "Processing disable transition with PM state: %s\n",
+ to_mhi_pm_state_str(mhi_cntrl->pm_state));
mutex_lock(_cntrl->pm_mutex);
- write_lock_irq(_cntrl->pm_lock);
- prev_state = mhi_cntrl->pm_state;
- cur_state = mhi_tryset_pm_state(mhi_cntrl, transition_state);
- if (cur_state == transition_state) {
- mhi_cntrl->ee = MHI_EE_DISABLE_TRANSITION;
- mhi_cntrl->dev_state = MHI_STATE_RESET;
- }
- write_unlock_irq(_cntrl->pm_lock);
-
- /* Wake up threads waiting for state transition */
- wake_up_all(_cntrl->state_event);
-
- if (cur_state != transition_state) {
- dev_err(dev, "Failed to transition to state: %s from: %s\n",
- to_mhi_pm_state_str(transition_state),
- to_mhi_pm_state_str(cur_state));
- mutex_unlock(_cntrl->pm_mutex);
- return;
- }
/* Trigger MHI RESET so that the device will not access host memory */
- if (MHI_REG_ACCESS_VALID(prev_state)) {
+ if (!MHI_PM_IN_FATAL_STATE(mhi_cntrl->pm_state)) {
u32 in_reset = -1;
unsigned long timeout = msecs_to_jiffies(mhi_cntrl->timeout_ms);
@@ -785,8 +765,7 @@ void mhi_pm_st_worker(struct work_struct *work)
mhi_pm_sys_error_transition(mhi_cntrl);
break;
case DEV_ST_TRANSITION_DISABLE:
- mhi_pm_disable_transition
- (mhi_cntrl, MHI_PM_SHUTDOWN_PROCESS);
+ mhi_pm_disable_transition(mhi_cntrl);
break;
default:
break;
@@ -1153,23 +1132,33 @@ EXPORT_SYMBOL_GPL(mhi_async_power_up);
void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful)
{
- enum mhi_pm_state cur_state;
+ enum mhi_pm_state cur_state, transition_state;
struct device *dev =
[PATCH v3 05/12] bus: mhi: core: Prevent sending multiple RDDM entry callbacks
If an mhi_power_down() is initiated after the device has entered
RDDM and a status callback was provided for it, it is possible
that another BHI interrupt fires while waiting for the MHI
RESET to be cleared. If that happens, MHI host would have moved
a "disabled" execution environment and the check to allow sending
an RDDM status callback will pass when it is should not. Add a
check to see if MHI is in an active state before proceeding.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/core/main.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c
index 1f32d67..172b48b 100644
--- a/drivers/bus/mhi/core/main.c
+++ b/drivers/bus/mhi/core/main.c
@@ -399,6 +399,10 @@ irqreturn_t mhi_intvec_threaded_handler(int irq_number,
void *priv)
/* If device supports RDDM don't bother processing SYS error */
if (mhi_cntrl->rddm_image) {
+ /* host may be performing a device power down already */
+ if (!mhi_is_active(mhi_cntrl))
+ goto exit_intvec;
+
if (mhi_cntrl->ee == MHI_EE_RDDM && mhi_cntrl->ee != ee) {
mhi_cntrl->status_cb(mhi_cntrl, MHI_CB_EE_RDDM);
wake_up_all(_cntrl->state_event);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 08/12] bus: mhi: core: Move to an error state on mission mode failure
If the host receives a mission mode event and by the time it can get
to processing it, the register accesses fail implying a connectivity
error, MHI should move to an error state. This helps avoid longer wait
times from a synchronous power up perspective and accurately reflects
the MHI execution environment and power management states.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Manivannan Sadhasivam
---
drivers/bus/mhi/core/pm.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c
index 0299196..06adea2 100644
--- a/drivers/bus/mhi/core/pm.c
+++ b/drivers/bus/mhi/core/pm.c
@@ -383,10 +383,14 @@ static int mhi_pm_mission_mode_transition(struct
mhi_controller *mhi_cntrl)
write_lock_irq(_cntrl->pm_lock);
if (MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state))
mhi_cntrl->ee = mhi_get_exec_env(mhi_cntrl);
- write_unlock_irq(_cntrl->pm_lock);
- if (!MHI_IN_MISSION_MODE(mhi_cntrl->ee))
+ if (!MHI_IN_MISSION_MODE(mhi_cntrl->ee)) {
+ mhi_cntrl->pm_state = MHI_PM_LD_ERR_FATAL_DETECT;
+ write_unlock_irq(_cntrl->pm_lock);
+ wake_up_all(_cntrl->state_event);
return -EIO;
+ }
+ write_unlock_irq(_cntrl->pm_lock);
wake_up_all(_cntrl->state_event);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 10/12] bus: mhi: core: Separate system error and power down handling
Currently, there exist a set of if...else statements in the
mhi_pm_disable_transition() function which make handling system
error and disable transitions differently complex. To make that
cleaner and facilitate differences in behavior, separate these
two transitions for MHI host.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/core/pm.c | 159 +++---
1 file changed, 137 insertions(+), 22 deletions(-)
diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c
index 1d04e401..347ae7d 100644
--- a/drivers/bus/mhi/core/pm.c
+++ b/drivers/bus/mhi/core/pm.c
@@ -444,7 +444,7 @@ static int mhi_pm_mission_mode_transition(struct
mhi_controller *mhi_cntrl)
return ret;
}
-/* Handle SYS_ERR and Shutdown transitions */
+/* Handle shutdown transitions */
static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl,
enum mhi_pm_state transition_state)
{
@@ -460,10 +460,6 @@ static void mhi_pm_disable_transition(struct
mhi_controller *mhi_cntrl,
to_mhi_pm_state_str(mhi_cntrl->pm_state),
to_mhi_pm_state_str(transition_state));
- /* We must notify MHI control driver so it can clean up first */
- if (transition_state == MHI_PM_SYS_ERR_PROCESS)
- mhi_cntrl->status_cb(mhi_cntrl, MHI_CB_SYS_ERROR);
-
mutex_lock(_cntrl->pm_mutex);
write_lock_irq(_cntrl->pm_lock);
prev_state = mhi_cntrl->pm_state;
@@ -502,11 +498,8 @@ static void mhi_pm_disable_transition(struct
mhi_controller *mhi_cntrl,
MHICTRL_RESET_SHIFT,
_reset) ||
!in_reset, timeout);
- if ((!ret || in_reset) && cur_state == MHI_PM_SYS_ERR_PROCESS) {
+ if (!ret || in_reset)
dev_err(dev, "Device failed to exit MHI Reset state\n");
- mutex_unlock(_cntrl->pm_mutex);
- return;
- }
/*
* Device will clear BHI_INTVEC as a part of RESET processing,
@@ -566,19 +559,142 @@ static void mhi_pm_disable_transition(struct
mhi_controller *mhi_cntrl,
er_ctxt->wp = er_ctxt->rbase;
}
- if (cur_state == MHI_PM_SYS_ERR_PROCESS) {
- mhi_ready_state_transition(mhi_cntrl);
- } else {
- /* Move to disable state */
- write_lock_irq(_cntrl->pm_lock);
- cur_state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_DISABLE);
- write_unlock_irq(_cntrl->pm_lock);
- if (unlikely(cur_state != MHI_PM_DISABLE))
- dev_err(dev, "Error moving from PM state: %s to: %s\n",
- to_mhi_pm_state_str(cur_state),
- to_mhi_pm_state_str(MHI_PM_DISABLE));
+ /* Move to disable state */
+ write_lock_irq(_cntrl->pm_lock);
+ cur_state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_DISABLE);
+ write_unlock_irq(_cntrl->pm_lock);
+ if (unlikely(cur_state != MHI_PM_DISABLE))
+ dev_err(dev, "Error moving from PM state: %s to: %s\n",
+ to_mhi_pm_state_str(cur_state),
+ to_mhi_pm_state_str(MHI_PM_DISABLE));
+
+ dev_dbg(dev, "Exiting with PM state: %s, MHI state: %s\n",
+ to_mhi_pm_state_str(mhi_cntrl->pm_state),
+ TO_MHI_STATE_STR(mhi_cntrl->dev_state));
+
+ mutex_unlock(_cntrl->pm_mutex);
+}
+
+/* Handle system error transitions */
+static void mhi_pm_sys_error_transition(struct mhi_controller *mhi_cntrl)
+{
+ enum mhi_pm_state cur_state, prev_state;
+ struct mhi_event *mhi_event;
+ struct mhi_cmd_ctxt *cmd_ctxt;
+ struct mhi_cmd *mhi_cmd;
+ struct mhi_event_ctxt *er_ctxt;
+ struct device *dev = _cntrl->mhi_dev->dev;
+ int ret, i;
+
+ dev_dbg(dev, "Transitioning from PM state: %s to: %s\n",
+ to_mhi_pm_state_str(mhi_cntrl->pm_state),
+ to_mhi_pm_state_str(MHI_PM_SYS_ERR_PROCESS));
+
+ /* We must notify MHI control driver so it can clean up first */
+ mhi_cntrl->status_cb(mhi_cntrl, MHI_CB_SYS_ERROR);
+
+ mutex_lock(_cntrl->pm_mutex);
+ write_lock_irq(_cntrl->pm_lock);
+ prev_state = mhi_cntrl->pm_state;
+ cur_state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_SYS_ERR_PROCESS);
+ write_unlock_irq(_cntrl->pm_lock);
+
+ if (cur_state != MHI_PM_SYS_ERR_PROCESS) {
+ dev_err(dev, "Failed to transition from PM state: %s to: %s\n",
+ to_mhi_pm_state_str(cur_state),
+ to_mhi_pm_state_str(MHI_PM_SYS_ERR_PROCESS));
+ goto exit_sys_error_transition;
+ }
+
+ mhi_cntrl->ee = MHI_EE_DISABLE_TRANSITION;
+ mhi_cntrl->dev_state =
[PATCH v3 12/12] bus: mhi: core: Remove MHI event ring IRQ handlers when powering down
While powering down, the device may or may not acknowledge an MHI
RESET issued by host for a graceful shutdown scenario and end up
sending an incoming data packet after tasklets have been killed.
If a rogue device sends this interrupt for a data transfer event
ring update, it can result in a tasklet getting scheduled while a
clean up is ongoing or has completed and cause access to freed
memory leading to a NULL pointer exception. Remove the interrupt
handlers for MHI event rings early on to avoid this scenario.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/core/pm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c
index ffbf6f5..a671f58 100644
--- a/drivers/bus/mhi/core/pm.c
+++ b/drivers/bus/mhi/core/pm.c
@@ -494,6 +494,7 @@ static void mhi_pm_disable_transition(struct mhi_controller
*mhi_cntrl)
for (i = 0; i < mhi_cntrl->total_ev_rings; i++, mhi_event++) {
if (mhi_event->offload_ev)
continue;
+ free_irq(mhi_cntrl->irq[mhi_event->irq], mhi_event);
tasklet_kill(_event->task);
}
@@ -1164,7 +1165,7 @@ void mhi_power_down(struct mhi_controller *mhi_cntrl,
bool graceful)
/* Wait for shutdown to complete */
flush_work(_cntrl->st_worker);
- mhi_deinit_free_irq(mhi_cntrl);
+ free_irq(mhi_cntrl->irq[0], mhi_cntrl);
if (!mhi_cntrl->pre_init) {
/* Free all allocated resources */
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 07/12] bus: mhi: core: Use appropriate label in firmware load handler API
Correct the "error_read" label to say "error_ready_state" as that
is the appropriate usage of the label.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/core/boot.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/bus/mhi/core/boot.c b/drivers/bus/mhi/core/boot.c
index cec5010..6b4c51e 100644
--- a/drivers/bus/mhi/core/boot.c
+++ b/drivers/bus/mhi/core/boot.c
@@ -494,7 +494,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
if (ret) {
dev_err(dev, "MHI did not enter READY state\n");
- goto error_read;
+ goto error_ready_state;
}
/* Wait for the SBL event */
@@ -505,7 +505,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
if (!ret || MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {
dev_err(dev, "MHI did not enter SBL\n");
- goto error_read;
+ goto error_ready_state;
}
/* Start full firmware image download */
@@ -521,7 +521,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
return;
-error_read:
+error_ready_state:
mhi_free_bhie_table(mhi_cntrl, mhi_cntrl->fbc_image);
mhi_cntrl->fbc_image = NULL;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 02/12] bus: mhi: core: Move to using high priority workqueue
MHI work is currently scheduled on the global/system workqueue and can
encounter delays on a stressed system. To avoid those unforeseen
delays which can hamper bootup or shutdown times, use a dedicated high
priority workqueue instead of the global/system workqueue.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/core/init.c | 8
drivers/bus/mhi/core/pm.c | 2 +-
include/linux/mhi.h | 2 ++
3 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c
index 0ffdebd..23b6dd6 100644
--- a/drivers/bus/mhi/core/init.c
+++ b/drivers/bus/mhi/core/init.c
@@ -880,6 +880,13 @@ int mhi_register_controller(struct mhi_controller
*mhi_cntrl,
INIT_WORK(_cntrl->st_worker, mhi_pm_st_worker);
init_waitqueue_head(_cntrl->state_event);
+ mhi_cntrl->hiprio_wq = alloc_ordered_workqueue
+ ("mhi_hiprio_wq", WQ_MEM_RECLAIM | WQ_HIGHPRI);
+ if (!mhi_cntrl->hiprio_wq) {
+ dev_err(mhi_cntrl->cntrl_dev, "Failed to allocate workqueue\n");
+ goto error_alloc_cmd;
+ }
+
mhi_cmd = mhi_cntrl->mhi_cmd;
for (i = 0; i < NR_OF_CMD_RINGS; i++, mhi_cmd++)
spin_lock_init(_cmd->lock);
@@ -969,6 +976,7 @@ int mhi_register_controller(struct mhi_controller
*mhi_cntrl,
error_alloc_cmd:
vfree(mhi_cntrl->mhi_chan);
kfree(mhi_cntrl->mhi_event);
+ destroy_workqueue(mhi_cntrl->hiprio_wq);
return ret;
}
diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c
index 3de7b16..805b6fa74 100644
--- a/drivers/bus/mhi/core/pm.c
+++ b/drivers/bus/mhi/core/pm.c
@@ -597,7 +597,7 @@ int mhi_queue_state_transition(struct mhi_controller
*mhi_cntrl,
list_add_tail(>node, _cntrl->transition_list);
spin_unlock_irqrestore(_cntrl->transition_lock, flags);
- schedule_work(_cntrl->st_worker);
+ queue_work(mhi_cntrl->hiprio_wq, _cntrl->st_worker);
return 0;
}
diff --git a/include/linux/mhi.h b/include/linux/mhi.h
index d4841e5..8961cbc 100644
--- a/include/linux/mhi.h
+++ b/include/linux/mhi.h
@@ -337,6 +337,7 @@ struct mhi_controller_config {
* @wlock: Lock for protecting device wakeup
* @mhi_link_info: Device bandwidth info
* @st_worker: State transition worker
+ * @hiprio_wq: High priority workqueue for MHI work such as state transitions
* @state_event: State change event
* @status_cb: CB function to notify power states of the device (required)
* @wake_get: CB function to assert device wake (optional)
@@ -419,6 +420,7 @@ struct mhi_controller {
spinlock_t wlock;
struct mhi_link_info mhi_link_info;
struct work_struct st_worker;
+ struct workqueue_struct *hiprio_wq;
wait_queue_head_t state_event;
void (*status_cb)(struct mhi_controller *mhi_cntrl,
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 04/12] bus: mhi: core: Move to SYS_ERROR regardless of RDDM capability
In some cases, the entry of device to RDDM execution environment
can occur after a significant amount of time has elapsed and a
SYS_ERROR state change event has already arrived. This can result
in scenarios where MHI controller and client drivers are unaware
of the error state of the device. Remove the check for rddm_image
when processing the SYS_ERROR state change as it is present in
mhi_pm_sys_err_handler() already and prevent further activity
until the expected RDDM execution environment change occurs or
the controller driver decides further action.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/core/main.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c
index 2cff5dd..1f32d67 100644
--- a/drivers/bus/mhi/core/main.c
+++ b/drivers/bus/mhi/core/main.c
@@ -733,19 +733,15 @@ int mhi_process_ctrl_ev_ring(struct mhi_controller
*mhi_cntrl,
break;
case MHI_STATE_SYS_ERR:
{
- enum mhi_pm_state new_state;
-
- /* skip SYS_ERROR handling if RDDM supported */
- if (mhi_cntrl->ee == MHI_EE_RDDM ||
- mhi_cntrl->rddm_image)
- break;
+ enum mhi_pm_state state = MHI_PM_STATE_MAX;
dev_dbg(dev, "System error detected\n");
write_lock_irq(_cntrl->pm_lock);
- new_state = mhi_tryset_pm_state(mhi_cntrl,
+ if (mhi_cntrl->ee != MHI_EE_RDDM)
+ state = mhi_tryset_pm_state(mhi_cntrl,
MHI_PM_SYS_ERR_DETECT);
write_unlock_irq(_cntrl->pm_lock);
- if (new_state == MHI_PM_SYS_ERR_DETECT)
+ if (state == MHI_PM_SYS_ERR_DETECT)
mhi_pm_sys_err_handler(mhi_cntrl);
break;
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 09/12] bus: mhi: core: Check for IRQ availability during registration
Current design allows a controller to register with MHI successfully
without the need to have any IRQs available for use. If no IRQs are
available, power up requests to MHI can fail after a successful
registration with MHI. Improve the design by checking for the number
of IRQs available sooner within the mhi_regsiter_controller() API as
it is required to be specified by the controller.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/core/init.c | 2 +-
drivers/bus/mhi/core/pm.c | 3 ---
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c
index 23b6dd6..5dd9e39 100644
--- a/drivers/bus/mhi/core/init.c
+++ b/drivers/bus/mhi/core/init.c
@@ -858,7 +858,7 @@ int mhi_register_controller(struct mhi_controller
*mhi_cntrl,
if (!mhi_cntrl->runtime_get || !mhi_cntrl->runtime_put ||
!mhi_cntrl->status_cb || !mhi_cntrl->read_reg ||
- !mhi_cntrl->write_reg)
+ !mhi_cntrl->write_reg || !mhi_cntrl->nr_irqs)
return -EINVAL;
ret = parse_config(mhi_cntrl, config);
diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c
index 06adea2..1d04e401 100644
--- a/drivers/bus/mhi/core/pm.c
+++ b/drivers/bus/mhi/core/pm.c
@@ -926,9 +926,6 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl)
dev_info(dev, "Requested to power ON\n");
- if (mhi_cntrl->nr_irqs < 1)
- return -EINVAL;
-
/* Supply default wake routines if not provided by controller driver */
if (!mhi_cntrl->wake_get || !mhi_cntrl->wake_put ||
!mhi_cntrl->wake_toggle) {
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v7 1/2] f2fs: add F2FS_IOC_GET_COMPRESS_OPTION ioctl
From: Daeho Jeong
Added a new F2FS_IOC_GET_COMPRESS_OPTION ioctl to get file compression
option of a file.
struct f2fs_comp_option {
u8 algorithm; => compression algorithm
=> 0:lzo, 1:lz4, 2:zstd, 3:lzorle
u8 log_cluster_size; => log scale cluster size
=> 2 ~ 8
};
struct f2fs_comp_option option;
ioctl(fd, F2FS_IOC_GET_COMPRESS_OPTION, );
Signed-off-by: Daeho Jeong
---
v7: changed inode_lock() to inode_lock_shared().
v4: changed commit message.
v3: changed the error number more specific.
v2: added ioctl description.
---
fs/f2fs/f2fs.h | 7 +++
fs/f2fs/file.c | 30 ++
2 files changed, 37 insertions(+)
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index 53fe2853579c..a33c90cf979b 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -433,6 +433,8 @@ static inline bool __has_cursum_space(struct f2fs_journal
*journal,
_IOR(F2FS_IOCTL_MAGIC, 19, __u64)
#define F2FS_IOC_SEC_TRIM_FILE _IOW(F2FS_IOCTL_MAGIC, 20, \
struct f2fs_sectrim_range)
+#define F2FS_IOC_GET_COMPRESS_OPTION _IOR(F2FS_IOCTL_MAGIC, 21, \
+ struct f2fs_comp_option)
/*
* should be same as XFS_IOC_GOINGDOWN.
@@ -481,6 +483,11 @@ struct f2fs_sectrim_range {
u64 flags;
};
+struct f2fs_comp_option {
+ u8 algorithm;
+ u8 log_cluster_size;
+};
+
/* for inline stuff */
#define DEF_INLINE_RESERVED_SIZE 1
static inline int get_extra_isize(struct inode *inode);
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index ef5a844de53f..bd52df84219d 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -3936,6 +3936,33 @@ static int f2fs_sec_trim_file(struct file *filp,
unsigned long arg)
return ret;
}
+static int f2fs_ioc_get_compress_option(struct file *filp, unsigned long arg)
+{
+ struct inode *inode = file_inode(filp);
+ struct f2fs_comp_option option;
+
+ if (!f2fs_sb_has_compression(F2FS_I_SB(inode)))
+ return -EOPNOTSUPP;
+
+ inode_lock_shared(inode);
+
+ if (!f2fs_compressed_file(inode)) {
+ inode_unlock_shared(inode);
+ return -ENODATA;
+ }
+
+ option.algorithm = F2FS_I(inode)->i_compress_algorithm;
+ option.log_cluster_size = F2FS_I(inode)->i_log_cluster_size;
+
+ inode_unlock_shared(inode);
+
+ if (copy_to_user((struct f2fs_comp_option __user *)arg, ,
+ sizeof(option)))
+ return -EFAULT;
+
+ return 0;
+}
+
long f2fs_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
if (unlikely(f2fs_cp_error(F2FS_I_SB(file_inode(filp)
@@ -4024,6 +4051,8 @@ long f2fs_ioctl(struct file *filp, unsigned int cmd,
unsigned long arg)
return f2fs_reserve_compress_blocks(filp, arg);
case F2FS_IOC_SEC_TRIM_FILE:
return f2fs_sec_trim_file(filp, arg);
+ case F2FS_IOC_GET_COMPRESS_OPTION:
+ return f2fs_ioc_get_compress_option(filp, arg);
default:
return -ENOTTY;
}
@@ -4194,6 +4223,7 @@ long f2fs_compat_ioctl(struct file *file, unsigned int
cmd, unsigned long arg)
case F2FS_IOC_RELEASE_COMPRESS_BLOCKS:
case F2FS_IOC_RESERVE_COMPRESS_BLOCKS:
case F2FS_IOC_SEC_TRIM_FILE:
+ case F2FS_IOC_GET_COMPRESS_OPTION:
break;
default:
return -ENOIOCTLCMD;
--
2.29.1.341.ge80a0c044ae-goog
[PATCH v7 2/2] f2fs: add F2FS_IOC_SET_COMPRESS_OPTION ioctl
From: Daeho Jeong
Added a new F2FS_IOC_SET_COMPRESS_OPTION ioctl to change file
compression option of a file.
struct f2fs_comp_option {
u8 algorithm; => compression algorithm
=> 0:lzo, 1:lz4, 2:zstd, 3:lzorle
u8 log_cluster_size; => log scale cluster size
=> 2 ~ 8
};
struct f2fs_comp_option option;
option.algorithm = 1;
option.log_cluster_size = 7;
ioctl(fd, F2FS_IOC_SET_COMPRESS_OPTION, );
Signed-off-by: Daeho Jeong
---
v6: changed the function name of checking compression algorithm validity.
v5: allowed to set algorithm which is not currently enabled by kernel.
v4: changed commit message.
v3: changed the error number more specific.
folded in fix for build breakage reported by kernel test robot
and Dan Carpenter .
v2: added ioctl description.
---
fs/f2fs/compress.c | 5 +
fs/f2fs/f2fs.h | 7 ++
fs/f2fs/file.c | 54 ++
3 files changed, 66 insertions(+)
diff --git a/fs/f2fs/compress.c b/fs/f2fs/compress.c
index 7895186cc765..b0144670d320 100644
--- a/fs/f2fs/compress.c
+++ b/fs/f2fs/compress.c
@@ -514,6 +514,11 @@ bool f2fs_is_compress_backend_ready(struct inode *inode)
return f2fs_cops[F2FS_I(inode)->i_compress_algorithm];
}
+bool f2fs_is_compress_algorithm_valid(unsigned char algorithm)
+{
+ return f2fs_cops[algorithm] != NULL;
+}
+
static mempool_t *compress_page_pool;
static int num_compress_pages = 512;
module_param(num_compress_pages, uint, 0444);
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index a33c90cf979b..70a8a2196888 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -435,6 +435,8 @@ static inline bool __has_cursum_space(struct f2fs_journal
*journal,
struct f2fs_sectrim_range)
#define F2FS_IOC_GET_COMPRESS_OPTION _IOR(F2FS_IOCTL_MAGIC, 21, \
struct f2fs_comp_option)
+#define F2FS_IOC_SET_COMPRESS_OPTION _IOW(F2FS_IOCTL_MAGIC, 22, \
+ struct f2fs_comp_option)
/*
* should be same as XFS_IOC_GOINGDOWN.
@@ -3915,6 +3917,7 @@ bool f2fs_compress_write_end(struct inode *inode, void
*fsdata,
int f2fs_truncate_partial_cluster(struct inode *inode, u64 from, bool lock);
void f2fs_compress_write_end_io(struct bio *bio, struct page *page);
bool f2fs_is_compress_backend_ready(struct inode *inode);
+bool f2fs_is_compress_algorithm_valid(unsigned char algorithm);
int f2fs_init_compress_mempool(void);
void f2fs_destroy_compress_mempool(void);
void f2fs_decompress_pages(struct bio *bio, struct page *page, bool verity);
@@ -3945,6 +3948,10 @@ static inline bool f2fs_is_compress_backend_ready(struct
inode *inode)
/* not support compression */
return false;
}
+static inline bool f2fs_is_compress_algorithm_valid(unsigned char algorithm)
+{
+ return false;
+}
static inline struct page *f2fs_compress_control_page(struct page *page)
{
WARN_ON_ONCE(1);
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index bd52df84219d..be56702e4939 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -3963,6 +3963,57 @@ static int f2fs_ioc_get_compress_option(struct file
*filp, unsigned long arg)
return 0;
}
+static int f2fs_ioc_set_compress_option(struct file *filp, unsigned long arg)
+{
+ struct inode *inode = file_inode(filp);
+ struct f2fs_sb_info *sbi = F2FS_I_SB(inode);
+ struct f2fs_comp_option option;
+ int ret = 0;
+
+ if (!f2fs_sb_has_compression(sbi))
+ return -EOPNOTSUPP;
+
+ if (!(filp->f_mode & FMODE_WRITE))
+ return -EBADF;
+
+ if (copy_from_user(, (struct f2fs_comp_option __user *)arg,
+ sizeof(option)))
+ return -EFAULT;
+
+ if (!f2fs_compressed_file(inode) ||
+ option.log_cluster_size < MIN_COMPRESS_LOG_SIZE ||
+ option.log_cluster_size > MAX_COMPRESS_LOG_SIZE ||
+ option.algorithm >= COMPRESS_MAX)
+ return -EINVAL;
+
+ file_start_write(filp);
+ inode_lock(inode);
+
+ if (f2fs_is_mmap_file(inode) || get_dirty_pages(inode)) {
+ ret = -EBUSY;
+ goto out;
+ }
+
+ if (inode->i_size != 0) {
+ ret = -EFBIG;
+ goto out;
+ }
+
+ F2FS_I(inode)->i_compress_algorithm = option.algorithm;
+ F2FS_I(inode)->i_log_cluster_size = option.log_cluster_size;
+ F2FS_I(inode)->i_cluster_size = 1 << option.log_cluster_size;
+ f2fs_mark_inode_dirty_sync(inode, true);
+
+ if (!f2fs_is_compress_algorithm_valid(option.algorithm))
+ f2fs_warn(sbi, "compression algorithm is successfully set, "
+ "but current kernel doesn't support this algorithm.");
+out:
+ inode_unlock(inode);
+ file_end_write(filp);
+
+
Re: [PATCH 4/6] MIPS: Loongson64: Add Mail_Send support for 3A4000+ CPU
在 2020/10/29 16:02, Tiezhu Yang 写道:
Loongson 3A4000+ CPU has per-core Mail_Send register to send mail,
there is no need to maintain register address of each core and node,
just simply specify cpu number.
Signed-off-by: Lu Zeng
Signed-off-by: Jianmin Lv
Signed-off-by: Tiezhu Yang
---
.../include/asm/mach-loongson64/loongson_regs.h| 10 +++
arch/mips/loongson64/smp.c | 75 +-
2 files changed, 68 insertions(+), 17 deletions(-)
diff --git a/arch/mips/include/asm/mach-loongson64/loongson_regs.h
b/arch/mips/include/asm/mach-loongson64/loongson_regs.h
index 83dbb9f..1659935 100644
--- a/arch/mips/include/asm/mach-loongson64/loongson_regs.h
+++ b/arch/mips/include/asm/mach-loongson64/loongson_regs.h
@@ -227,6 +227,16 @@ static inline void csr_writeq(u64 val, u32 reg)
#define CSR_IPI_SEND_CPU_SHIFT16
#define CSR_IPI_SEND_BLOCKBIT(31)
+#define LOONGSON_CSR_MAIL_BUF0 0x1020
+#define LOONGSON_CSR_MAIL_SEND 0x1048
+#define CSR_MAIL_SEND_BLOCKBIT_ULL(31)
+#define CSR_MAIL_SEND_BOX_LOW(box) (box << 1)
+#define CSR_MAIL_SEND_BOX_HIGH(box)((box << 1) + 1)
+#define CSR_MAIL_SEND_BOX_SHIFT2
+#define CSR_MAIL_SEND_CPU_SHIFT16
+#define CSR_MAIL_SEND_BUF_SHIFT32
+#define CSR_MAIL_SEND_H32_MASK 0xULL
+
static inline u64 drdtime(void)
{
int rID = 0;
diff --git a/arch/mips/loongson64/smp.c b/arch/mips/loongson64/smp.c
index 7d58853..33597d2 100644
--- a/arch/mips/loongson64/smp.c
+++ b/arch/mips/loongson64/smp.c
@@ -54,6 +54,26 @@ static uint32_t core0_c0count[NR_CPUS];
u32 (*ipi_read_clear)(int cpu);
void (*ipi_write_action)(int cpu, u32 action);
+/* send mail via Mail_Send register for 3A4000+ CPU */
+static void csr_mail_send(uint64_t data, int cpu, int mailbox)
+{
+ uint64_t val;
+
+ /* send high 32 bits */
+ val = CSR_MAIL_SEND_BLOCK;
+ val |= (CSR_MAIL_SEND_BOX_HIGH(mailbox) << CSR_MAIL_SEND_BOX_SHIFT);
+ val |= (cpu << CSR_MAIL_SEND_CPU_SHIFT);
+ val |= (data & CSR_MAIL_SEND_H32_MASK);
+ csr_writeq(val, LOONGSON_CSR_MAIL_SEND);
+
+ /* send low 32 bits */
+ val = CSR_MAIL_SEND_BLOCK;
+ val |= (CSR_MAIL_SEND_BOX_LOW(mailbox) << CSR_MAIL_SEND_BOX_SHIFT);
+ val |= (cpu << CSR_MAIL_SEND_CPU_SHIFT);
+ val |= (data << CSR_MAIL_SEND_BUF_SHIFT);
+ csr_writeq(val, LOONGSON_CSR_MAIL_SEND);
+};
+
static u32 csr_ipi_read_clear(int cpu)
{
u32 action;
@@ -348,7 +368,10 @@ static void loongson3_init_secondary(void)
/* Set interrupt mask, but don't enable */
change_c0_status(ST0_IM, imask);
- loongson3_ipi_write32(0x, ipi_en0_regs[cpu_logical_map(cpu)]);
+ if (cpu_has_csr() && csr_readl(LOONGSON_CSR_FEATURES) &
LOONGSON_CSRF_IPI)
+ csr_writel(0x, LOONGSON_CSR_IPI_EN);
Hi Tiezhu,
Feature cheking is duplicated. could you please abstract them to
callbacks and set
them in csr_ipi probe?
e.g.
ipi_write_enable
+ else
+ loongson3_ipi_write32(0x,
ipi_en0_regs[cpu_logical_map(cpu)]);
per_cpu(cpu_state, cpu) = CPU_ONLINE;
cpu_set_core(_data[cpu],
@@ -380,8 +403,12 @@ static void loongson3_smp_finish(void)
write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);
local_irq_enable();
- loongson3_ipi_write64(0,
- ipi_mailbox_buf[cpu_logical_map(cpu)] + 0x0);
+
+ if (cpu_has_csr() && csr_readl(LOONGSON_CSR_FEATURES) &
LOONGSON_CSRF_IPI)
+ csr_writel(0, LOONGSON_CSR_MAIL_BUF0);
+ else
+ loongson3_ipi_write64(0, ipi_mailbox_buf[cpu_logical_map(cpu)]
+ 0x0);
+
ditto here,
ipi_write_buf
pr_info("CPU#%d finished, CP0_ST=%x\n",
smp_processor_id(), read_c0_status());
}
@@ -414,12 +441,18 @@ static void __init loongson3_smp_setup(void)
}
csr_ipi_probe();
- ipi_set0_regs_init();
- ipi_clear0_regs_init();
- ipi_status0_regs_init();
- ipi_en0_regs_init();
- ipi_mailbox_buf_init();
- loongson3_ipi_write32(0x, ipi_en0_regs[cpu_logical_map(0)]);
+
+ if (cpu_has_csr() && csr_readl(LOONGSON_CSR_FEATURES) &
LOONGSON_CSRF_IPI) {
+ csr_writel(0x, LOONGSON_CSR_IPI_EN);
+ } else {
+ ipi_set0_regs_init();
+ ipi_clear0_regs_init();
+ ipi_status0_regs_init();
+ ipi_en0_regs_init();
+ ipi_mailbox_buf_init();
+ loongson3_ipi_write32(0x,
ipi_en0_regs[cpu_logical_map(0)]);
+ }
+
cpu_set_core(_data[0],
cpu_logical_map(0) % loongson_sysconf.cores_per_package);
cpu_data[0].package = cpu_logical_map(0) /
loongson_sysconf.cores_per_package;
@@ -452,14 +485,22 @@ static int loongson3_boot_secondary(int cpu, struct
task_struct *idle)
[PATCH v2] Documentation: Chinese translation of Documentation/arm64/perf.rst
This is a Chinese translated version of Documentation/arm64/perf.rst Signed-off-by: Bailu Lin --- Changes in v2: - Modify a translation of 'guest/host/blackout window' as Alex sugguested. --- Documentation/arm64/perf.rst | 2 + .../translations/zh_CN/arm64/index.rst| 1 + .../translations/zh_CN/arm64/perf.rst | 86 +++ 3 files changed, 89 insertions(+) create mode 100644 Documentation/translations/zh_CN/arm64/perf.rst diff --git a/Documentation/arm64/perf.rst b/Documentation/arm64/perf.rst index 9c76a97baf28..b567f177d385 100644 --- a/Documentation/arm64/perf.rst +++ b/Documentation/arm64/perf.rst @@ -1,5 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0 +.. _perf_index: + = Perf Event Attributes = diff --git a/Documentation/translations/zh_CN/arm64/index.rst b/Documentation/translations/zh_CN/arm64/index.rst index e31a6090384d..f51fed166326 100644 --- a/Documentation/translations/zh_CN/arm64/index.rst +++ b/Documentation/translations/zh_CN/arm64/index.rst @@ -15,3 +15,4 @@ ARM64 架构 amu hugetlbpage +perf diff --git a/Documentation/translations/zh_CN/arm64/perf.rst b/Documentation/translations/zh_CN/arm64/perf.rst new file mode 100644 index ..9bf21d73f4d1 --- /dev/null +++ b/Documentation/translations/zh_CN/arm64/perf.rst @@ -0,0 +1,86 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: ../disclaimer-zh_CN.rst + +:Original: :ref:`Documentation/arm64/perf.rst ` + +Translator: Bailu Lin + += +Perf 事件属性 += + +:作者: Andrew Murray +:日期: 2019-03-06 + +exclude_user + + +该属性排除用户空间。 + +用户空间始终运行在 EL0，因此该属性将排除 EL0。 + + +exclude_kernel +-- + +该属性排除内核空间。 + +打开 VHE 时内核运行在 EL2，不打开 VHE 时内核运行在 EL1。客户机 +内核总是运行在 EL1。 + +对于宿主机，该属性排除 EL1 和 VHE 上的 EL2。 + +对于客户机，该属性排除 EL1。请注意客户机从来不会运行在 EL2。 + + +exclude_hv +-- + +该属性排除虚拟机监控器。 + +对于 VHE 宿主机该属性将被忽略，此时我们认为宿主机内核是虚拟机监 +控器。 + +对于 non-VHE 宿主机该属性将排除 EL2，因为虚拟机监控器运行在 EL2 +的任何代码主要用于客户机和宿主机的切换。 + +对于客户机该属性无效。请注意客户机从来不会运行在 EL2。 + + +exclude_host / exclude_guest + + +这些属性分别排除了 KVM 宿主机和客户机。 + +KVM 宿主机可能运行在 EL0（用户空间），EL1（non-VHE 内核）和 +EL2（VHE 内核 或 non-VHE 虚拟机监控器）。 + +KVM 客户机可能运行在 EL0（用户空间）和 EL1（内核）。 + +由于宿主机和客户机之间重叠的异常级别，我们不能仅仅依靠 PMU 的硬件异 +常过滤机制-因此我们必须启用/禁用对于客户机进入和退出的计数。而这在 +VHE 和 non-VHE 系统上表现不同。 + +对于 non-VHE 系统的 exclude_host 属性排除 EL2 - 在进入和退出客户 +机时，我们会根据 exclude_host 和 exclude_guest 属性在适当的情况下 +禁用/启用该事件。 + +对于 VHE 系统的 exclude_guest 属性排除 EL1，而对其中的 exclude_host +属性同时排除 EL0，EL2。在进入和退出客户机时，我们会适当地根据 +exclude_host 和 exclude_guest 属性包括/排除 EL0。 + +以上声明也适用于在 not-VHE 客户机使用这些属性时，但是请注意客户机从 +来不会运行在 EL2。 + + +准确性 +-- + +在 non-VHE 宿主机上，我们在 EL2 进入/退出宿主机/客户机的切换时启用/ +关闭计数器 -但是在启用/禁用计数器和进入/退出客户机之间存在一段延时。 +对于 exclude_host， 我们可以通过过滤 EL2 消除在客户机进入/退出边界 +上用于计数客户机事件的宿主机事件计数器。但是当使用 !exclude_hv 时， +在客户机进入/退出有一个小的停电窗口无法捕获到宿主机的事件。 + +在 VHE 系统没有停电窗口。 -- 2.20.1
Re: [PATCH v4 7/7] dma-buf: system_heap: Add a system-uncached heap re-using the system heap
On Thu, Oct 29, 2020 at 7:48 PM Hillf Danton wrote: > On Thu, 29 Oct 2020 15:28:34 -0700 John Stultz wrote: > > On Thu, Oct 29, 2020 at 12:10 AM Hillf Danton wrote: > > > On Thu, 29 Oct 2020 00:16:24 + John Stultz wrote: > > > > @@ -194,6 +210,9 @@ static int system_heap_mmap(struct dma_buf *dmabuf, > > > > struct vm_area_struct *vma) > > > > struct sg_page_iter piter; > > > > int ret; > > > > > > > > + if (buffer->uncached) > > > > + vma->vm_page_prot = > > > > pgprot_writecombine(vma->vm_page_prot); > > > > + > > > > > > Wonder why you turn back to dma_mmap_wc() and friends? > > > > Sorry, can you expand on what you are proposing here instead? I'm not > > sure I see how dma_alloc/mmap/*_wc() quite fits here. > > I just wondered if *_wc() could save you two minutes or three. Can you > shed some light on your concerns about their unfitness? Sorry, I feel a bit daft here. I'm still not exactly sure what you're proposing, and your reply of saving minutes doesn't really clarify things. So I'm not sure it's a good use of time to try to (most likely, incorrectly) refute all the possible things you might be suggesting. :) But I'll try to share my thoughts: So the system heap allows for allocation of non-contiguous buffers (currently allocated from page_alloc), which we keep track using sglists. Since the resulting dmabufs are shared between multiple devices, we want to provide a *specific type of memory* (in this case non-contiguous system memory), rather than what the underlying dma_alloc_attr() allocates for a specific device. My sense is dma_mmap_wc() likely ought to be paired with switching to using dma_alloc_wc() as well, which calls down to dma_alloc_attr(). Maybe one could use dma_alloc_attr against the heap device to allocate chunks that we track in the sglist. But I'm not sure how that saves us much other than possibly swapping dma_mmap_wc() for remap_pfn_range()? But again, I suspect I've mischaracterized what you're actually suggesting. So please let me know what you're thinking and I'm happy to consider it. thanks -john
[PATCH v2] drm/amd/pm: replace kmalloc+memcpy by kmemdup
Use kmemdup() for instructions using kmalloc() + memcpy(). More information here: https://lwn.net/Articles/198928/ Issue reported by coccinelle script: scripts/coccinelle/api/memdup.cocci Signed-off-by: Deepak R Varma --- Changes since v1: - Update patch subject and log message to match proposed change. Please Note: This is a Outreachy project task patch. .../gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c index 740e2fc7a034..1e79baab753e 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c @@ -252,12 +252,11 @@ static int init_powerplay_table_information( phm_copy_clock_limits_array(hwmgr, _information->power_saving_clock_max, powerplay_table->PowerSavingClockMax, ATOM_VEGA12_PPCLOCK_COUNT); phm_copy_clock_limits_array(hwmgr, _information->power_saving_clock_min, powerplay_table->PowerSavingClockMin, ATOM_VEGA12_PPCLOCK_COUNT); - pptable_information->smc_pptable = kmalloc(sizeof(PPTable_t), GFP_KERNEL); + pptable_information->smc_pptable = kmemdup(&(powerplay_table->smcPPTable), + sizeof(PPTable_t), GFP_KERNEL); if (pptable_information->smc_pptable == NULL) return -ENOMEM; - memcpy(pptable_information->smc_pptable, &(powerplay_table->smcPPTable), sizeof(PPTable_t)); - result = append_vbios_pptable(hwmgr, (pptable_information->smc_pptable)); return result; -- 2.25.1
Re: [PATCH 1/6] MIPS: Loongson64: Do not write the read only field LPA of CP0_CONFIG3
在 2020/10/29 16:02, Tiezhu Yang 写道: The field LPA of CP0_CONFIG3 register is read only for Loongson64, so the write operations are meaningless, remove them. Signed-off-by: Tiezhu Yang --- arch/mips/include/asm/mach-loongson64/kernel-entry-init.h | 8 arch/mips/loongson64/numa.c | 3 --- 2 files changed, 11 deletions(-) Hi Tiezhu, AFAIK it's not read only on 3A1000. Have you check with hardware guys? Thanks. - Jiaxun
Re: [PATCH 9/9] mfd: sprd-sc27xx-spi: remove unnecessary CONFIG_PM_SLEEP
Hi Coiby, After removing CONFIG_PM_SLEEP, sprd_pmic_suspend/resume() would not be built into symbol table with clang compiler though, that would cause clang compiler report warnings of "unused function" if CONFIG_PM_SLEEP is not set. So I also prefer to add a __maybe_unused instead as other people suggested in the mail list. Thanks, Chunyan On Thu, 29 Oct 2020 at 18:07, Coiby Xu wrote: > > SIMPLE_DEV_PM_OPS has already took good care of CONFIG_PM_CONFIG. > Signed-off-by: Coiby Xu drivers/mfd/sprd-sc27xx-spi.c | > 2 -- 1 file changed, 2 deletions(-) diff --git > a/drivers/mfd/sprd-sc27xx-spi.c b/drivers/mfd/sprd-sc27xx-spi.c index > 6b7956604a0f..4db2ec9ef2ff 100644 --- a/drivers/mfd/sprd-sc27xx-spi.c +++ > b/drivers/mfd/sprd-sc27xx-spi.c @@ -206,7 +206,6 @@ static int > sprd_pmic_probe(struct spi_device *spi) return 0; -#ifdef CONFIG_PM_SLEEP > static int sprd_pmic_suspend(struct device *dev) struct sprd_pmic *ddata = > dev_get_drvdata(dev); @@ -226,7 +225,6 @@ static int sprd_pmic_resume(struct > device *dev) return 0; -#endif static SIMPLE_DEV_PM_OPS(sprd_pmic_pm_ops, > sprd_pmic_suspend, sprd_pmic_resume); 2.28.0
[PATCH RESEND v13 06/10] KVM: vmx/pmu: Pass-through LBR msrs to when the guest LBR event is ACTIVE
In addition to DEBUGCTLMSR_LBR, any KVM trap caused by LBR msrs access
will result in a creation of guest LBR event per-vcpu.
If the guest LBR event is scheduled on with the corresponding vcpu context,
KVM will pass-through all LBR records msrs to the guest. The LBR callstack
mechanism implemented in the host could help save/restore the guest LBR
records during the event context switches, which reduces a lot of overhead
if we save/restore tens of LBR msrs (e.g. 32 LBR records entries) in the
much more frequent VMX transitions.
To avoid reclaiming LBR resources from any higher priority event on host,
KVM would always check the exist of guest LBR event and its state before
vm-entry as late as possible. A negative result would cancel the
pass-through state, and it also prevents real registers accesses and
potential data leakage. If host reclaims the LBR between two checks, the
interception state and LBR records can be safely preserved due to native
save/restore support from guest LBR event.
The KVM emits a pr_warn() when the LBR hardware is unavailable to the
guest LBR event. The administer is supposed to reminder users that the
guest result may be inaccurate if someone is using LBR to record
hypervisor on the host side.
Suggested-by: Andi Kleen
Co-developed-by: Wei Wang
Signed-off-by: Wei Wang
Signed-off-by: Like Xu
---
arch/x86/kvm/vmx/pmu_intel.c | 127 ++-
arch/x86/kvm/vmx/vmx.c | 10 +++
arch/x86/kvm/vmx/vmx.h | 1 +
3 files changed, 135 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index db1d78ddabac..6b3319dbfa72 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -201,6 +201,24 @@ bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu)
return true;
}
+static bool intel_pmu_is_valid_lbr_msr(struct kvm_vcpu *vcpu, u32 index)
+{
+ struct x86_pmu_lbr *records = vcpu_to_lbr_records(vcpu);
+ bool ret = false;
+
+ if (!intel_pmu_lbr_is_enabled(vcpu))
+ return ret;
+
+ ret = (index == MSR_LBR_SELECT) || (index == MSR_LBR_TOS) ||
+ (index >= records->from && index < records->from + records->nr)
||
+ (index >= records->to && index < records->to + records->nr);
+
+ if (!ret && records->info)
+ ret = (index >= records->info && index < records->info +
records->nr);
+
+ return ret;
+}
+
static bool intel_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)
{
struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
@@ -216,7 +234,8 @@ static bool intel_is_valid_msr(struct kvm_vcpu *vcpu, u32
msr)
default:
ret = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0) ||
get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0) ||
- get_fixed_pmc(pmu, msr) || get_fw_gp_pmc(pmu, msr);
+ get_fixed_pmc(pmu, msr) || get_fw_gp_pmc(pmu, msr) ||
+ intel_pmu_is_valid_lbr_msr(vcpu, msr);
break;
}
@@ -294,6 +313,46 @@ int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu)
return 0;
}
+/*
+ * It's safe to access LBR msrs from guest when they have not
+ * been passthrough since the host would help restore or reset
+ * the LBR msrs records when the guest LBR event is scheduled in.
+ */
+static bool intel_pmu_handle_lbr_msrs_access(struct kvm_vcpu *vcpu,
+struct msr_data *msr_info, bool read)
+{
+ struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);
+ u32 index = msr_info->index;
+
+ if (!intel_pmu_is_valid_lbr_msr(vcpu, index))
+ return false;
+
+ if (!lbr_desc->event && !intel_pmu_create_guest_lbr_event(vcpu))
+ goto dummy;
+
+ /*
+* Disable irq to ensure the LBR feature doesn't get reclaimed by the
+* host at the time the value is read from the msr, and this avoids the
+* host LBR value to be leaked to the guest. If LBR has been reclaimed,
+* return 0 on guest reads.
+*/
+ local_irq_disable();
+ if (lbr_desc->event->state == PERF_EVENT_STATE_ACTIVE) {
+ if (read)
+ rdmsrl(index, msr_info->data);
+ else
+ wrmsrl(index, msr_info->data);
+ local_irq_enable();
+ return true;
+ }
+ local_irq_enable();
+
+dummy:
+ if (read)
+ msr_info->data = 0;
+ return true;
+}
+
static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
{
struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
@@ -328,7 +387,8 @@ static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
} else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {
msr_info->data = pmc->eventsel;
return 0;
- }
+ } else if
[PATCH RESEND v13 10/10] KVM: vmx/pmu: Release guest LBR event via lazy release mechanism
The vPMU uses GUEST_LBR_IN_USE_IDX (bit 58) in 'pmu->pmc_in_use' to
indicate whether a guest LBR event is still needed by the vcpu. If the
vcpu no longer accesses LBR related registers within a scheduling time
slice, and the enable bit of LBR has been unset, vPMU will treat the
guest LBR event as a bland event of a vPMC counter and release it
as usual. Also, the pass-through state of LBR records msrs is cancelled.
Signed-off-by: Like Xu
---
arch/x86/kvm/pmu.c | 7 +++
arch/x86/kvm/pmu.h | 4
arch/x86/kvm/vmx/pmu_intel.c | 17 -
3 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
index 405890c723a1..e7c72eea07d4 100644
--- a/arch/x86/kvm/pmu.c
+++ b/arch/x86/kvm/pmu.c
@@ -463,6 +463,7 @@ void kvm_pmu_cleanup(struct kvm_vcpu *vcpu)
struct kvm_pmc *pmc = NULL;
DECLARE_BITMAP(bitmask, X86_PMC_IDX_MAX);
int i;
+ bool extra_cleanup = false;
pmu->need_cleanup = false;
@@ -474,8 +475,14 @@ void kvm_pmu_cleanup(struct kvm_vcpu *vcpu)
if (pmc && pmc->perf_event && !pmc_speculative_in_use(pmc))
pmc_stop_counter(pmc);
+
+ if (i == INTEL_GUEST_LBR_INUSE)
+ extra_cleanup = true;
}
+ if (extra_cleanup && kvm_x86_ops.pmu_ops->cleanup)
+ kvm_x86_ops.pmu_ops->cleanup(vcpu);
+
bitmap_zero(pmu->pmc_in_use, X86_PMC_IDX_MAX);
}
diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h
index 742a4e98df8c..c8b650866f56 100644
--- a/arch/x86/kvm/pmu.h
+++ b/arch/x86/kvm/pmu.h
@@ -15,6 +15,9 @@
#define VMWARE_BACKDOOR_PMC_REAL_TIME 0x10001
#define VMWARE_BACKDOOR_PMC_APPARENT_TIME 0x10002
+/* Indicates whether Intel LBR msrs were accessed during the last time slice.
*/
+#define INTEL_GUEST_LBR_INUSE INTEL_PMC_IDX_FIXED_VLBR
+
#define MAX_FIXED_COUNTERS 3
struct kvm_event_hw_type_mapping {
@@ -40,6 +43,7 @@ struct kvm_pmu_ops {
void (*init)(struct kvm_vcpu *vcpu);
void (*reset)(struct kvm_vcpu *vcpu);
void (*deliver_pmi)(struct kvm_vcpu *vcpu);
+ void (*cleanup)(struct kvm_vcpu *vcpu);
};
static inline u64 pmc_bitmask(struct kvm_pmc *pmc)
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 8120685c43d4..4d10f564607d 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -310,6 +310,7 @@ int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu)
}
lbr_desc->event = event;
vcpu_to_pmu(vcpu)->event_count++;
+ __set_bit(INTEL_GUEST_LBR_INUSE, vcpu_to_pmu(vcpu)->pmc_in_use);
return 0;
}
@@ -342,10 +343,12 @@ static bool intel_pmu_handle_lbr_msrs_access(struct
kvm_vcpu *vcpu,
rdmsrl(index, msr_info->data);
else
wrmsrl(index, msr_info->data);
+ __set_bit(INTEL_GUEST_LBR_INUSE, vcpu_to_pmu(vcpu)->pmc_in_use);
local_irq_enable();
return true;
}
local_irq_enable();
+ clear_bit(INTEL_GUEST_LBR_INUSE, vcpu_to_pmu(vcpu)->pmc_in_use);
dummy:
if (read)
@@ -496,7 +499,8 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
if (!intel_pmu_lbr_is_enabled(vcpu)) {
vcpu->arch.perf_capabilities &= ~PMU_CAP_LBR_FMT;
lbr_desc->records.nr = 0;
- }
+ } else
+ bitmap_set(pmu->all_valid_pmc_idx, INTEL_GUEST_LBR_INUSE, 1);
pmu->nr_arch_gp_counters = min_t(int, eax.split.num_counters,
x86_pmu.num_counters_gp);
@@ -669,17 +673,21 @@ static inline void vmx_enable_lbr_msrs_passthrough(struct
kvm_vcpu *vcpu)
*/
void vmx_passthrough_lbr_msrs(struct kvm_vcpu *vcpu)
{
+ struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);
if (!lbr_desc->event) {
vmx_disable_lbr_msrs_passthrough(vcpu);
if (vmcs_read64(GUEST_IA32_DEBUGCTL) & DEBUGCTLMSR_LBR)
goto warn;
+ if (test_bit(INTEL_GUEST_LBR_INUSE, pmu->pmc_in_use))
+ goto warn;
return;
}
if (lbr_desc->event->state < PERF_EVENT_STATE_ACTIVE) {
vmx_disable_lbr_msrs_passthrough(vcpu);
+ __clear_bit(INTEL_GUEST_LBR_INUSE, pmu->pmc_in_use);
goto warn;
} else
vmx_enable_lbr_msrs_passthrough(vcpu);
@@ -691,6 +699,12 @@ void vmx_passthrough_lbr_msrs(struct kvm_vcpu *vcpu)
vcpu->vcpu_id);
}
+static void intel_pmu_cleanup(struct kvm_vcpu *vcpu)
+{
+ if (!(vmcs_read64(GUEST_IA32_DEBUGCTL) & DEBUGCTLMSR_LBR))
+ intel_pmu_release_guest_lbr_event(vcpu);
+}
+
struct kvm_pmu_ops intel_pmu_ops = {
.find_arch_event = intel_find_arch_event,
.find_fixed_event =
[PATCH RESEND v13 00/10] Guest Last Branch Recording Enabling
Hi All,
PMU features matter. Please help review this rebased version for the
next kernel release and with this patch set, the following error will be
gone forever and cloud developers can better understand their
programs with less profiling overhead:
$ perf record -b lbr ${WORKLOAD}
or $ perf record --call-graph lbr ${WORKLOAD}
Error:
cycles: PMU Hardware doesn't support sampling/overflow-interrupts. Try 'perf
stat'
We already have host perf support to implement guest LBR, please
check more details in each commit and feel free to test and comment.
v12->v13 Changelog:
- remove perf patches since they're merged already;
- add a minor patch to refactor MSR_IA32_DEBUGCTLMSR set/get handler;
- add a minor patch to expose vmx_set_intercept_for_msr();
- add a minor patch to adjust features visibility via IA32_PERF_CAPABILITIES;
- spilt the big patch to three pieces (0004-0006) for better understanding and
review;
- make the LBR_FMT exposure patch as the last step to enable guest LBR;
Previous:
https://lore.kernel.org/kvm/20200613080958.132489-1-like...@linux.intel.com/
---
The last branch recording (LBR) is a performance monitor unit (PMU)
feature on Intel processors that records a running trace of the most
recent branches taken by the processor in the LBR stack. This patch
series is going to enable this feature for plenty of KVM guests.
The user space could configure whether it's enabled or not for each
guest via MSR_IA32_PERF_CAPABILITIES msr. As a first step, a guest
could only enable LBR feature if its cpu model is the same as the
host since the LBR feature is still one of model specific features.
If it's enabled on the guest, the guest LBR driver would accesses the
LBR MSR (including IA32_DEBUGCTLMSR and records MSRs) as host does.
The first guest access on the LBR related MSRs is always interceptible.
The KVM trap would create a special LBR event (called guest LBR event)
which enables the callstack mode and none of hardware counter is assigned.
The host perf would enable and schedule this event as usual.
Guest's first access to a LBR registers gets trapped to KVM, which
creates a guest LBR perf event. It's a regular LBR perf event which gets
the LBR facility assigned from the perf subsystem. Once that succeeds,
the LBR stack msrs are passed through to the guest for efficient accesses.
However, if another host LBR event comes in and takes over the LBR
facility, the LBR msrs will be made interceptible, and guest following
accesses to the LBR msrs will be trapped and meaningless.
Because saving/restoring tens of LBR MSRs (e.g. 32 LBR stack entries) in
VMX transition brings too excessive overhead to frequent vmx transition
itself, the guest LBR event would help save/restore the LBR stack msrs
during the context switching with the help of native LBR event callstack
mechanism, including LBR_SELECT msr.
If the guest no longer accesses the LBR-related MSRs within a scheduling
time slice and the LBR enable bit is unset, vPMU would release its guest
LBR event as a normal event of a unused vPMC and the pass-through
state of the LBR stack msrs would be canceled.
---
LBR testcase:
echo 1 > /proc/sys/kernel/watchdog
echo 25 > /proc/sys/kernel/perf_cpu_time_max_percent
echo 5000 > /proc/sys/kernel/perf_event_max_sample_rate
echo 0 > /proc/sys/kernel/perf_cpu_time_max_percent
./perf record -b ./br_instr a
- Perf report on the host:
Samples: 72K of event 'cycles', Event count (approx.): 72512
Overhead Command Source Shared Object Source Symbol
Target Symbol Basic Block Cycles
12.12% br_instr br_instr [.] cmp_end
[.] lfsr_cond 1
11.05% br_instr br_instr [.] lfsr_cond
[.] cmp_end 5
8.81% br_instr br_instr [.] lfsr_cond
[.] cmp_end 4
5.04% br_instr br_instr [.] cmp_end
[.] lfsr_cond 20
4.92% br_instr br_instr [.] lfsr_cond
[.] cmp_end 6
4.88% br_instr br_instr [.] cmp_end
[.] lfsr_cond 6
4.58% br_instr br_instr [.] cmp_end
[.] lfsr_cond 5
- Perf report on the guest:
Samples: 92K of event 'cycles', Event count (approx.): 92544
Overhead Command Source Shared Object Source Symbol
Target Symbol Basic Block Cycles
12.03% br_instr br_instr [.] cmp_end
[.] lfsr_cond 1
11.09% br_instr br_instr [.]
[PATCH RESEND v13 05/10] KVM: vmx/pmu: Create a guest LBR event when vcpu sets DEBUGCTLMSR_LBR
When vcpu sets DEBUGCTLMSR_LBR in the MSR_IA32_DEBUGCTLMSR, the KVM handler
would create a guest LBR event which enables the callstack mode and none of
hardware counter is assigned. The host perf would schedule and enable this
event as usual but in an exclusive way.
The guest LBR event will be released when the vPMU is reset but soon,
the lazy release mechanism would be applied to this event like a vPMC.
Adding vcpu_supported_debugctl() to throw #GP for DEBUGCTLMSR_LBR
based on per-guest LBR setting.
Suggested-by: Andi Kleen
Co-developed-by: Wei Wang
Signed-off-by: Wei Wang
Signed-off-by: Like Xu
---
arch/x86/kvm/vmx/capabilities.h | 7 +++-
arch/x86/kvm/vmx/pmu_intel.c| 61 +
arch/x86/kvm/vmx/vmx.c | 31 +++--
arch/x86/kvm/vmx/vmx.h | 10 ++
4 files changed, 97 insertions(+), 12 deletions(-)
diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h
index db1178a66d93..62aa7a701ebb 100644
--- a/arch/x86/kvm/vmx/capabilities.h
+++ b/arch/x86/kvm/vmx/capabilities.h
@@ -381,7 +381,12 @@ static inline u64 vmx_get_perf_capabilities(void)
static inline u64 vmx_supported_debugctl(void)
{
- return DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF;
+ u64 debugctl = DEBUGCTLMSR_BTF;
+
+ if (vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT)
+ debugctl |= DEBUGCTLMSR_LBR;
+
+ return debugctl;
}
#endif /* __KVM_X86_VMX_CAPS_H */
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 91212fe5ec56..db1d78ddabac 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -235,6 +235,65 @@ static struct kvm_pmc *intel_msr_idx_to_pmc(struct
kvm_vcpu *vcpu, u32 msr)
return pmc;
}
+static inline void intel_pmu_release_guest_lbr_event(struct kvm_vcpu *vcpu)
+{
+ struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);
+
+ if (lbr_desc->event) {
+ perf_event_release_kernel(lbr_desc->event);
+ lbr_desc->event = NULL;
+ vcpu_to_pmu(vcpu)->event_count--;
+ }
+}
+
+int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu)
+{
+ struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);
+ struct perf_event *event;
+
+ /*
+* The perf_event_attr is constructed in the minimum efficient way:
+* - set 'pinned = true' to make it task pinned so that if another
+* cpu pinned event reclaims LBR, the event->oncpu will be set to -1;
+* - set '.exclude_host = true' to record guest branches behavior;
+*
+* - set '.config = INTEL_FIXED_VLBR_EVENT' to indicates host perf
+* schedule the event without a real HW counter but a fake one;
+* check is_guest_lbr_event() and __intel_get_event_constraints();
+*
+* - set 'sample_type = PERF_SAMPLE_BRANCH_STACK' and
+* 'branch_sample_type = PERF_SAMPLE_BRANCH_CALL_STACK |
+* PERF_SAMPLE_BRANCH_USER' to configure it as a LBR callstack
+* event, which helps KVM to save/restore guest LBR records
+* during host context switches and reduces quite a lot overhead,
+* check branch_user_callstack() and intel_pmu_lbr_sched_task();
+*/
+ struct perf_event_attr attr = {
+ .type = PERF_TYPE_RAW,
+ .size = sizeof(attr),
+ .config = INTEL_FIXED_VLBR_EVENT,
+ .sample_type = PERF_SAMPLE_BRANCH_STACK,
+ .pinned = true,
+ .exclude_host = true,
+ .branch_sample_type = PERF_SAMPLE_BRANCH_CALL_STACK |
+ PERF_SAMPLE_BRANCH_USER,
+ };
+
+ if (unlikely(lbr_desc->event))
+ return 0;
+
+ event = perf_event_create_kernel_counter(, -1,
+ current, NULL, NULL);
+ if (IS_ERR(event)) {
+ pr_debug_ratelimited("%s: failed %ld\n",
+ __func__, PTR_ERR(event));
+ return -ENOENT;
+ }
+ lbr_desc->event = event;
+ vcpu_to_pmu(vcpu)->event_count++;
+ return 0;
+}
+
static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
{
struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
@@ -441,6 +500,7 @@ static void intel_pmu_init(struct kvm_vcpu *vcpu)
vcpu->arch.perf_capabilities = guest_cpuid_has(vcpu, X86_FEATURE_PDCM) ?
vmx_get_perf_capabilities() : 0;
lbr_desc->records.nr = 0;
+ lbr_desc->event = NULL;
}
static void intel_pmu_reset(struct kvm_vcpu *vcpu)
@@ -465,6 +525,7 @@ static void intel_pmu_reset(struct kvm_vcpu *vcpu)
pmu->fixed_ctr_ctrl = pmu->global_ctrl = pmu->global_status =
pmu->global_ovf_ctrl = 0;
+ intel_pmu_release_guest_lbr_event(vcpu);
}
struct kvm_pmu_ops intel_pmu_ops = {
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index
[PATCH RESEND v13 07/10] KVM: vmx/pmu: Reduce the overhead of LBR pass-through or cancellation
When the LBR records msrs has already been pass-through, there is no
need to call vmx_update_intercept_for_lbr_msrs() again and again, and
vice versa.
Signed-off-by: Like Xu
---
arch/x86/kvm/vmx/pmu_intel.c | 13 +
arch/x86/kvm/vmx/vmx.h | 3 +++
2 files changed, 16 insertions(+)
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 6b3319dbfa72..72a6dd6ca0ac 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -562,6 +562,7 @@ static void intel_pmu_init(struct kvm_vcpu *vcpu)
vmx_get_perf_capabilities() : 0;
lbr_desc->records.nr = 0;
lbr_desc->event = NULL;
+ lbr_desc->already_passthrough = false;
}
static void intel_pmu_reset(struct kvm_vcpu *vcpu)
@@ -607,12 +608,24 @@ static void vmx_update_intercept_for_lbr_msrs(struct
kvm_vcpu *vcpu, bool set)
static inline void vmx_disable_lbr_msrs_passthrough(struct kvm_vcpu *vcpu)
{
+ struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);
+
+ if (!lbr_desc->already_passthrough)
+ return;
+
vmx_update_intercept_for_lbr_msrs(vcpu, true);
+ lbr_desc->already_passthrough = false;
}
static inline void vmx_enable_lbr_msrs_passthrough(struct kvm_vcpu *vcpu)
{
+ struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);
+
+ if (lbr_desc->already_passthrough)
+ return;
+
vmx_update_intercept_for_lbr_msrs(vcpu, false);
+ lbr_desc->already_passthrough = true;
}
/*
diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index 2bd866c5a4e4..1869f5090e40 100644
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -90,6 +90,9 @@ struct lbr_desc {
* The records may be inaccurate if the host reclaims the LBR.
*/
struct perf_event *event;
+
+ /* A flag to reduce the overhead of LBR pass-through or cancellation. */
+ bool already_passthrough;
};
/*
--
2.21.3
[PATCH RESEND v13 09/10] KVM: vmx/pmu: Expose LBR_FMT in the MSR_IA32_PERF_CAPABILITIES
Userspace could enable guest LBR feature when the exactly supported
LBR format value is initialized to the MSR_IA32_PERF_CAPABILITIES
and the LBR is also compatible with vPMU version and host cpu model.
Signed-off-by: Like Xu
---
arch/x86/kvm/vmx/capabilities.h | 9 -
arch/x86/kvm/vmx/vmx.c | 7 +++
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h
index 57b940c613ab..a9a7c4d1b634 100644
--- a/arch/x86/kvm/vmx/capabilities.h
+++ b/arch/x86/kvm/vmx/capabilities.h
@@ -378,7 +378,14 @@ static inline u64 vmx_get_perf_capabilities(void)
* Since counters are virtualized, KVM would support full
* width counting unconditionally, even if the host lacks it.
*/
- return PMU_CAP_FW_WRITES;
+ u64 perf_cap = PMU_CAP_FW_WRITES;
+
+ if (boot_cpu_has(X86_FEATURE_PDCM))
+ rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_cap);
+
+ perf_cap |= perf_cap & PMU_CAP_LBR_FMT;
+
+ return perf_cap;
}
static inline u64 vmx_supported_debugctl(void)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 2da96ec410a3..4fe1e9605ff4 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -2230,6 +2230,13 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
case MSR_IA32_PERF_CAPABILITIES:
if (data && !vcpu_to_pmu(vcpu)->version)
return 1;
+ if (data & PMU_CAP_LBR_FMT) {
+ if ((data & PMU_CAP_LBR_FMT) !=
+ (vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT))
+ return 1;
+ if (!intel_pmu_lbr_is_compatible(vcpu))
+ return 1;
+ }
ret = kvm_set_msr_common(vcpu, msr_info);
break;
--
2.21.3
[PATCH RESEND v13 08/10] KVM: vmx/pmu: Emulate legacy freezing LBRs on virtual PMI
The current vPMU only supports Architecture Version 2. According to
Intel SDM "17.4.7 Freezing LBR and Performance Counters on PMI", if
IA32_DEBUGCTL.Freeze_LBR_On_PMI = 1, the LBR is frozen on the virtual
PMI and the KVM would emulate to clear the LBR bit (bit 0) in
IA32_DEBUGCTL. Also, guest needs to re-enable IA32_DEBUGCTL.LBR
to resume recording branches.
Signed-off-by: Like Xu
---
arch/x86/kvm/pmu.c | 5 -
arch/x86/kvm/pmu.h | 1 +
arch/x86/kvm/vmx/capabilities.h | 4 +++-
arch/x86/kvm/vmx/pmu_intel.c| 30 ++
arch/x86/kvm/vmx/vmx.c | 2 +-
5 files changed, 39 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
index 67741d2a0308..405890c723a1 100644
--- a/arch/x86/kvm/pmu.c
+++ b/arch/x86/kvm/pmu.c
@@ -383,8 +383,11 @@ int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned idx, u64
*data)
void kvm_pmu_deliver_pmi(struct kvm_vcpu *vcpu)
{
- if (lapic_in_kernel(vcpu))
+ if (lapic_in_kernel(vcpu)) {
+ if (kvm_x86_ops.pmu_ops->deliver_pmi)
+ kvm_x86_ops.pmu_ops->deliver_pmi(vcpu);
kvm_apic_local_deliver(vcpu->arch.apic, APIC_LVTPC);
+ }
}
bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)
diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h
index 067fef51760c..742a4e98df8c 100644
--- a/arch/x86/kvm/pmu.h
+++ b/arch/x86/kvm/pmu.h
@@ -39,6 +39,7 @@ struct kvm_pmu_ops {
void (*refresh)(struct kvm_vcpu *vcpu);
void (*init)(struct kvm_vcpu *vcpu);
void (*reset)(struct kvm_vcpu *vcpu);
+ void (*deliver_pmi)(struct kvm_vcpu *vcpu);
};
static inline u64 pmc_bitmask(struct kvm_pmc *pmc)
diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h
index 62aa7a701ebb..57b940c613ab 100644
--- a/arch/x86/kvm/vmx/capabilities.h
+++ b/arch/x86/kvm/vmx/capabilities.h
@@ -21,6 +21,8 @@ extern int __read_mostly pt_mode;
#define PMU_CAP_FW_WRITES (1ULL << 13)
#define PMU_CAP_LBR_FMT0x3f
+#define DEBUGCTLMSR_LBR_MASK (DEBUGCTLMSR_LBR |
DEBUGCTLMSR_FREEZE_LBRS_ON_PMI)
+
struct nested_vmx_msrs {
/*
* We only store the "true" versions of the VMX capability MSRs. We
@@ -384,7 +386,7 @@ static inline u64 vmx_supported_debugctl(void)
u64 debugctl = DEBUGCTLMSR_BTF;
if (vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT)
- debugctl |= DEBUGCTLMSR_LBR;
+ debugctl |= DEBUGCTLMSR_LBR_MASK;
return debugctl;
}
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 72a6dd6ca0ac..8120685c43d4 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -590,6 +590,35 @@ static void intel_pmu_reset(struct kvm_vcpu *vcpu)
intel_pmu_release_guest_lbr_event(vcpu);
}
+/*
+ * Emulate LBR_On_PMI behavior for 1 < pmu.version < 4.
+ *
+ * If Freeze_LBR_On_PMI = 1, the LBR is frozen on PMI and
+ * the KVM emulates to clear the LBR bit (bit 0) in IA32_DEBUGCTL.
+ *
+ * Guest needs to re-enable LBR to resume branches recording.
+ */
+static void intel_pmu_legacy_freezing_lbrs_on_pmi(struct kvm_vcpu *vcpu)
+{
+ u64 data = vmcs_read64(GUEST_IA32_DEBUGCTL);
+
+ if (data & DEBUGCTLMSR_FREEZE_LBRS_ON_PMI) {
+ data &= ~DEBUGCTLMSR_LBR;
+ vmcs_write64(GUEST_IA32_DEBUGCTL, data);
+ }
+}
+
+static void intel_pmu_deliver_pmi(struct kvm_vcpu *vcpu)
+{
+ u8 version = vcpu_to_pmu(vcpu)->version;
+
+ if (!intel_pmu_lbr_is_enabled(vcpu))
+ return;
+
+ if (version > 1 && version < 4)
+ intel_pmu_legacy_freezing_lbrs_on_pmi(vcpu);
+}
+
static void vmx_update_intercept_for_lbr_msrs(struct kvm_vcpu *vcpu, bool set)
{
struct x86_pmu_lbr *lbr = vcpu_to_lbr_records(vcpu);
@@ -676,4 +705,5 @@ struct kvm_pmu_ops intel_pmu_ops = {
.refresh = intel_pmu_refresh,
.init = intel_pmu_init,
.reset = intel_pmu_reset,
+ .deliver_pmi = intel_pmu_deliver_pmi,
};
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index aef34f967769..2da96ec410a3 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1964,7 +1964,7 @@ static u64 vcpu_supported_debugctl(struct kvm_vcpu *vcpu)
u64 debugctl = vmx_supported_debugctl();
if (!intel_pmu_lbr_is_enabled(vcpu))
- debugctl &= ~DEBUGCTLMSR_LBR;
+ debugctl &= ~DEBUGCTLMSR_LBR_MASK;
return debugctl;
}
--
2.21.3
[PATCH RESEND v13 02/10] KVM: x86/vmx: Make vmx_set_intercept_for_msr() non-static and expose it
To make code responsibilities clear, we may resue and invoke the
vmx_set_intercept_for_msr() in other vmx-specific files (e.g. pmu_intel.c),
so expose it to passthrough LBR msrs later.
Signed-off-by: Like Xu
---
arch/x86/kvm/vmx/vmx.c | 2 +-
arch/x86/kvm/vmx/vmx.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index c12faeebd390..4085c90c8fc2 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -3788,7 +3788,7 @@ static __always_inline void
vmx_enable_intercept_for_msr(struct kvm_vcpu *vcpu,
vmx_set_msr_bitmap_write(msr_bitmap, msr);
}
-static __always_inline void vmx_set_intercept_for_msr(struct kvm_vcpu *vcpu,
+void vmx_set_intercept_for_msr(struct kvm_vcpu *vcpu,
u32 msr, int type, bool
value)
{
if (value)
diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index f6f66e5c6510..cf9d27f1e122 100644
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -341,6 +341,8 @@ void pt_update_intercept_for_msr(struct kvm_vcpu *vcpu);
void vmx_update_host_rsp(struct vcpu_vmx *vmx, unsigned long host_rsp);
int vmx_find_loadstore_msr_slot(struct vmx_msrs *m, u32 msr);
void vmx_ept_load_pdptrs(struct kvm_vcpu *vcpu);
+void vmx_set_intercept_for_msr(struct kvm_vcpu *vcpu,
+ u32 msr, int type, bool value);
static inline u8 vmx_get_rvi(void)
{
--
2.21.3
[PATCH RESEND v13 04/10] KVM: vmx/pmu: Clear PMU_CAP_LBR_FMT when guest LBR is disabled
The LBR could be enabled on the guest if host perf supports LBR
(checked via x86_perf_get_lbr()) and the vcpu model is compatible
with the host one.
If LBR is disabled on the guest, the bits [0, 5] of the read-only
MSR_IA32_PERF_CAPABILITIES which tells about the record format
stored in the LBR records would be cleared.
Signed-off-by: Like Xu
---
arch/x86/kvm/vmx/capabilities.h | 1 +
arch/x86/kvm/vmx/pmu_intel.c| 40 +
arch/x86/kvm/vmx/vmx.h | 12 ++
3 files changed, 53 insertions(+)
diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h
index a58cf3655351..db1178a66d93 100644
--- a/arch/x86/kvm/vmx/capabilities.h
+++ b/arch/x86/kvm/vmx/capabilities.h
@@ -19,6 +19,7 @@ extern int __read_mostly pt_mode;
#define PT_MODE_HOST_GUEST 1
#define PMU_CAP_FW_WRITES (1ULL << 13)
+#define PMU_CAP_LBR_FMT0x3f
struct nested_vmx_msrs {
/*
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index f8083ecf8c7b..91212fe5ec56 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -168,6 +168,39 @@ static inline struct kvm_pmc *get_fw_gp_pmc(struct kvm_pmu
*pmu, u32 msr)
return get_gp_pmc(pmu, msr, MSR_IA32_PMC0);
}
+bool intel_pmu_lbr_is_compatible(struct kvm_vcpu *vcpu)
+{
+ struct x86_pmu_lbr *lbr = vcpu_to_lbr_records(vcpu);
+ struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
+
+ if (pmu->version < 2)
+ return false;
+
+ /*
+* As a first step, a guest could only enable LBR feature if its
+* cpu model is the same as the host because the LBR registers
+* would be pass-through to the guest and they're model specific.
+*/
+ if (boot_cpu_data.x86_model != guest_cpuid_model(vcpu))
+ return false;
+
+ return !x86_perf_get_lbr(lbr);
+}
+
+bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu)
+{
+ struct x86_pmu_lbr *lbr = vcpu_to_lbr_records(vcpu);
+ u64 lbr_fmt = vcpu->arch.perf_capabilities & PMU_CAP_LBR_FMT;
+
+ if (lbr->nr && lbr_fmt)
+ return true;
+
+ if (!lbr_fmt || !intel_pmu_lbr_is_compatible(vcpu))
+ return false;
+
+ return true;
+}
+
static bool intel_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)
{
struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
@@ -320,6 +353,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
struct kvm_cpuid_entry2 *entry;
union cpuid10_eax eax;
union cpuid10_edx edx;
+ struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);
pmu->nr_arch_gp_counters = 0;
pmu->nr_arch_fixed_counters = 0;
@@ -339,6 +373,10 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
return;
perf_get_x86_pmu_capability(_pmu);
+ if (!intel_pmu_lbr_is_enabled(vcpu)) {
+ vcpu->arch.perf_capabilities &= ~PMU_CAP_LBR_FMT;
+ lbr_desc->records.nr = 0;
+ }
pmu->nr_arch_gp_counters = min_t(int, eax.split.num_counters,
x86_pmu.num_counters_gp);
@@ -384,6 +422,7 @@ static void intel_pmu_init(struct kvm_vcpu *vcpu)
{
int i;
struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
+ struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);
for (i = 0; i < INTEL_PMC_MAX_GENERIC; i++) {
pmu->gp_counters[i].type = KVM_PMC_GP;
@@ -401,6 +440,7 @@ static void intel_pmu_init(struct kvm_vcpu *vcpu)
vcpu->arch.perf_capabilities = guest_cpuid_has(vcpu, X86_FEATURE_PDCM) ?
vmx_get_perf_capabilities() : 0;
+ lbr_desc->records.nr = 0;
}
static void intel_pmu_reset(struct kvm_vcpu *vcpu)
diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index cf9d27f1e122..e2d542bbca50 100644
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -70,6 +70,17 @@ struct pt_desc {
struct pt_ctx guest;
};
+#define vcpu_to_lbr_desc(vcpu) (_vmx(vcpu)->lbr_desc)
+#define vcpu_to_lbr_records(vcpu) (_vmx(vcpu)->lbr_desc.records)
+
+bool intel_pmu_lbr_is_compatible(struct kvm_vcpu *vcpu);
+bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu);
+
+struct lbr_desc {
+ /* Basic info about guest LBR records. */
+ struct x86_pmu_lbr records;
+};
+
/*
* The nested_vmx structure is part of vcpu_vmx, and holds information we need
* for correct emulation of VMX (i.e., nested VMX) on this vcpu.
@@ -279,6 +290,7 @@ struct vcpu_vmx {
u64 ept_pointer;
struct pt_desc pt_desc;
+ struct lbr_desc lbr_desc;
/* Save desired MSR intercept (read: pass-through) state */
#define MAX_POSSIBLE_PASSTHROUGH_MSRS 13
--
2.21.3
[PATCH RESEND v13 01/10] KVM: x86: Move common set/get handler of MSR_IA32_DEBUGCTLMSR to VMX
SVM already has specific handlers of MSR_IA32_DEBUGCTLMSR in the
svm_get/set_msr, so the x86 common part can be safely moved to VMX.
Add vmx_supported_debugctl() to refactor the throwing logic of #GP.
Signed-off-by: Like Xu
---
arch/x86/kvm/vmx/capabilities.h | 5 +
arch/x86/kvm/vmx/vmx.c | 19 ---
arch/x86/kvm/x86.c | 13 -
3 files changed, 21 insertions(+), 16 deletions(-)
diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h
index 3a1861403d73..a58cf3655351 100644
--- a/arch/x86/kvm/vmx/capabilities.h
+++ b/arch/x86/kvm/vmx/capabilities.h
@@ -378,4 +378,9 @@ static inline u64 vmx_get_perf_capabilities(void)
return PMU_CAP_FW_WRITES;
}
+static inline u64 vmx_supported_debugctl(void)
+{
+ return DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF;
+}
+
#endif /* __KVM_X86_VMX_CAPS_H */
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 281c405c7ea3..c12faeebd390 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1925,6 +1925,9 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
!guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP))
return 1;
goto find_uret_msr;
+ case MSR_IA32_DEBUGCTLMSR:
+ msr_info->data = 0;
+ break;
default:
find_uret_msr:
msr = vmx_find_uret_msr(vmx, msr_info->index);
@@ -2003,9 +2006,19 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
VM_EXIT_SAVE_DEBUG_CONTROLS)
get_vmcs12(vcpu)->guest_ia32_debugctl = data;
- ret = kvm_set_msr_common(vcpu, msr_info);
- break;
-
+ if (!data) {
+ /* We support the non-activated case already */
+ return 0;
+ } else if (data & ~vmx_supported_debugctl()) {
+ /*
+* Values other than LBR and BTF are vendor-specific,
+* thus reserved and should throw a #GP.
+*/
+ return 1;
+ }
+ vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
+ __func__, data);
+ return 0;
case MSR_IA32_BNDCFGS:
if (!kvm_mpx_supported() ||
(!msr_info->host_initiated &&
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 397f599b20e5..021791991e05 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -3055,18 +3055,6 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
return 1;
}
break;
- case MSR_IA32_DEBUGCTLMSR:
- if (!data) {
- /* We support the non-activated case already */
- break;
- } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
- /* Values other than LBR and BTF are vendor-specific,
- thus reserved and should throw a #GP */
- return 1;
- }
- vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
- __func__, data);
- break;
case 0x200 ... 0x2ff:
return kvm_mtrr_set_msr(vcpu, msr, data);
case MSR_IA32_APICBASE:
@@ -3339,7 +3327,6 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
switch (msr_info->index) {
case MSR_IA32_PLATFORM_ID:
case MSR_IA32_EBL_CR_POWERON:
- case MSR_IA32_DEBUGCTLMSR:
case MSR_IA32_LASTBRANCHFROMIP:
case MSR_IA32_LASTBRANCHTOIP:
case MSR_IA32_LASTINTFROMIP:
--
2.21.3
[PATCH RESEND v13 03/10] KVM: x86/pmu: Use IA32_PERF_CAPABILITIES to adjust features visibility
On Intel platforms, KVM agent could configure MSR_IA32_PERF_CAPABILITIES (such as unmask some vmx-supported bits in vcpu->arch.perf_capabilities) to adjust the visibility of guest PMU features for vPMU-enabled guests. Once MSR_IA32_PERF_CAPABILITIES is changed via vmx_set_msr() validly, the adjustment in intel_pmu_refresh() will be triggered. To ensure the sustainability of the new value, the default initialization path is moved to intel_pmu_init(). Signed-off-by: Like Xu --- arch/x86/kvm/vmx/pmu_intel.c | 6 +++--- arch/x86/kvm/vmx/vmx.c | 5 + arch/x86/kvm/x86.c | 2 +- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index a886a47daebd..f8083ecf8c7b 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -327,7 +327,6 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) pmu->counter_bitmask[KVM_PMC_FIXED] = 0; pmu->version = 0; pmu->reserved_bits = 0x0020ull; - vcpu->arch.perf_capabilities = 0; entry = kvm_find_cpuid_entry(vcpu, 0xa, 0); if (!entry) @@ -340,8 +339,6 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) return; perf_get_x86_pmu_capability(_pmu); - if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM)) - vcpu->arch.perf_capabilities = vmx_get_perf_capabilities(); pmu->nr_arch_gp_counters = min_t(int, eax.split.num_counters, x86_pmu.num_counters_gp); @@ -401,6 +398,9 @@ static void intel_pmu_init(struct kvm_vcpu *vcpu) pmu->fixed_counters[i].idx = i + INTEL_PMC_IDX_FIXED; pmu->fixed_counters[i].current_config = 0; } + + vcpu->arch.perf_capabilities = guest_cpuid_has(vcpu, X86_FEATURE_PDCM) ? + vmx_get_perf_capabilities() : 0; } static void intel_pmu_reset(struct kvm_vcpu *vcpu) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 4085c90c8fc2..b9fde795dd96 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -2210,6 +2210,11 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) if ((data >> 32) != 0) return 1; goto find_uret_msr; + case MSR_IA32_PERF_CAPABILITIES: + if (data && !vcpu_to_pmu(vcpu)->version) + return 1; + ret = kvm_set_msr_common(vcpu, msr_info); + break; default: find_uret_msr: diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 021791991e05..410d5209a76f 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3029,7 +3029,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) return 1; vcpu->arch.perf_capabilities = data; - + kvm_pmu_refresh(vcpu); return 0; } case MSR_EFER: -- 2.21.3
Re: [PATCH 4/5] drm/amdgpu: fix build_coefficients() argument
On Mon, Oct 26, 2020 at 5:01 PM Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> gcc -Wextra warns about a function taking an enum argument
> being called with a bool:
>
> drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c: In
> function 'apply_degamma_for_user_regamma':
> drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c:1617:29:
> warning: implicit conversion from 'enum ' to 'enum
> dc_transfer_func_predefined' [-Wenum-conversion]
> 1617 | build_coefficients(, true);
>
> It appears that a patch was added using the old calling conventions
> after the type was changed, and the value should actually be 0
> (TRANSFER_FUNCTION_SRGB) here instead of 1 (true).
This looks correct to me. Harry, Leo?
Alex
>
> Fixes: 55a01d4023ce ("drm/amd/display: Add user_regamma to color module")
> Signed-off-by: Arnd Bergmann
> ---
> drivers/gpu/drm/amd/display/modules/color/color_gamma.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/modules/color/color_gamma.c
> b/drivers/gpu/drm/amd/display/modules/color/color_gamma.c
> index b8695660b480..09bc2c249e1a 100644
> --- a/drivers/gpu/drm/amd/display/modules/color/color_gamma.c
> +++ b/drivers/gpu/drm/amd/display/modules/color/color_gamma.c
> @@ -1614,7 +1614,7 @@ static void apply_degamma_for_user_regamma(struct
> pwl_float_data_ex *rgb_regamma
> struct pwl_float_data_ex *rgb = rgb_regamma;
> const struct hw_x_point *coord_x = coordinates_x;
>
> - build_coefficients(, true);
> + build_coefficients(, TRANSFER_FUNCTION_SRGB);
>
> i = 0;
> while (i != hw_points_num + 1) {
> --
> 2.27.0
>
> ___
> amd-gfx mailing list
> amd-...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [tip: locking/core] lockdep: Fix usage_traceoverflow
Hi Peter,
On Wed, Oct 28, 2020 at 08:59:10PM +0100, Peter Zijlstra wrote:
> On Wed, Oct 28, 2020 at 08:42:09PM +0100, Peter Zijlstra wrote:
> > On Wed, Oct 28, 2020 at 05:40:48PM +, Chris Wilson wrote:
> > > Quoting Chris Wilson (2020-10-27 16:34:53)
> > > > Quoting Peter Zijlstra (2020-10-27 15:45:33)
> > > > > On Tue, Oct 27, 2020 at 01:29:10PM +, Chris Wilson wrote:
> > > > >
> > > > > > <4> [304.908891] hm#2, depth: 6 [6], 3425cfea6ff31f7f !=
> > > > > > 547d92e9ec2ab9af
> > > > > > <4> [304.908897] WARNING: CPU: 0 PID: 5658 at
> > > > > > kernel/locking/lockdep.c:3679 check_chain_key+0x1a4/0x1f0
> > > > >
> > > > > Urgh, I don't think I've _ever_ seen that warning trigger.
> > > > >
> > > > > The comments that go with it suggest memory corruption is the most
> > > > > likely trigger of it. Is it easy to trigger?
> > > >
> > > > For the automated CI, yes, the few machines that run that particular HW
> > > > test seem to hit it regularly. I have not yet reproduced it for myself.
> > > > I thought it looked like something kasan would provide some insight for
> > > > and we should get a kasan run through CI over the w/e. I suspect we've
> > > > feed in some garbage and called it a lock.
> > >
> > > I tracked it down to a second invocation of
> > > lock_acquire_shared_recursive()
> > > intermingled with some other regular mutexes (in this case ww_mutex).
> > >
> > > We hit this path in validate_chain():
> > > /*
> > >* Mark recursive read, as we jump over it when
> > >* building dependencies (just like we jump over
> > >* trylock entries):
> > >*/
> > > if (ret == 2)
> > > hlock->read = 2;
> > >
> > > and that is modifying hlock_id() and so the chain-key, after it has
> > > already been computed.
> >
> > Ooh, interesting.. I'll have to go look at this in the morning, brain is
> > fried already. Thanks for digging into it.
>
Sorry for the late response.
> So that's commit f611e8cf98ec ("lockdep: Take read/write status in
> consideration when generate chainkey") that did that.
>
Yeah, I think that's related, howver ...
> So validate_chain() requires the new chain_key, but can change ->read
> which then invalidates the chain_key we just calculated.
>
> This happens when check_deadlock() returns 2, which only happens when:
>
> - next->read == 2 && ... ; however @hext is our @hlock, so that's
> pointless
>
I don't think we should return 2 (earlier) in this case anymore. Because
now we have recursive read deadlock detection, it's safe to add dep:
"prev -> next" in the dependency graph. I think we can just continue in
this case. Actually I think this is something I'm missing in my
recursive read detection patchset :-/
> - when there's a nest_lock involved ; ww_mutex uses that !!!
>
That leaves check_deadlock() return 2 only if hlock is a nest_lock, and
...
> I suppose something like the below _might_ just do it, but I haven't
> compiled it, and like said, my brain is fried.
>
> Boqun, could you have a look, you're a few timezones ahead of us so your
> morning is earlier ;-)
>
> ---
>
> diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c
> index 3e99dfef8408..3caf63532bc2 100644
> --- a/kernel/locking/lockdep.c
> +++ b/kernel/locking/lockdep.c
> @@ -3556,7 +3556,7 @@ static inline int lookup_chain_cache_add(struct
> task_struct *curr,
>
> static int validate_chain(struct task_struct *curr,
> struct held_lock *hlock,
> - int chain_head, u64 chain_key)
> + int chain_head, u64 *chain_key)
> {
> /*
>* Trylock needs to maintain the stack of held locks, but it
> @@ -3568,6 +3568,7 @@ static int validate_chain(struct task_struct *curr,
>* (If lookup_chain_cache_add() return with 1 it acquires
>* graph_lock for us)
>*/
> +again:
> if (!hlock->trylock && hlock->check &&
> lookup_chain_cache_add(curr, hlock, chain_key)) {
> /*
> @@ -3597,8 +3598,12 @@ static int validate_chain(struct task_struct *curr,
>* building dependencies (just like we jump over
>* trylock entries):
>*/
> - if (ret == 2)
> + if (ret == 2) {
> hlock->read = 2;
> + *chain_key = iterate_chain_key(hlock->prev_chain_key,
> hlock_id(hlock));
If "ret == 2" means hlock is a a nest_lock, than we don't need the
"->read = 2" trick here and we don't need to update chain_key either.
We used to have this "->read = 2" only because we want to skip the
dependency adding step afterwards. So how about the following:
It survived a lockdep selftest at boot time.
Regards,
Boqun
->8
diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c
index 3e99dfef8408..b23ca6196561 100644
--- a/kernel/locking/lockdep.c
+++ b/kernel/locking/lockdep.c
@@ -2765,7 +2765,7 @@ print_deadlock_bug(struct task_struct
Re: [PATCH 03/17] phy: broadcom: convert to devm_platform_ioremap_resource(_byname)
On 10/28/2020 7:54 PM, Chunfeng Yun wrote: > Use devm_platform_ioremap_resource(_byname) to simplify code > > Cc: Al Cooper > Signed-off-by: Chunfeng Yun Reviewed-by: Florian Fainelli -- Florian
[PATCH v2 2/2] hwspinlock: sprd: use module_platform_driver() instead postcore initcall
From: Chunyan Zhang
The hardware spinlock devices are defined in the DT, there's no need for
init calls order, remove boilerplate code by using module_platform_driver.
Signed-off-by: Chunyan Zhang
---
drivers/hwspinlock/sprd_hwspinlock.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/hwspinlock/sprd_hwspinlock.c
b/drivers/hwspinlock/sprd_hwspinlock.c
index 4c63e2546064..19d1924044e5 100644
--- a/drivers/hwspinlock/sprd_hwspinlock.c
+++ b/drivers/hwspinlock/sprd_hwspinlock.c
@@ -151,18 +151,7 @@ static struct platform_driver sprd_hwspinlock_driver = {
.of_match_table = of_match_ptr(sprd_hwspinlock_of_match),
},
};
-
-static int __init sprd_hwspinlock_init(void)
-{
- return platform_driver_register(_hwspinlock_driver);
-}
-postcore_initcall(sprd_hwspinlock_init);
-
-static void __exit sprd_hwspinlock_exit(void)
-{
- platform_driver_unregister(_hwspinlock_driver);
-}
-module_exit(sprd_hwspinlock_exit);
+module_platform_driver(sprd_hwspinlock_driver);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Hardware spinlock driver for Spreadtrum");
--
2.20.1
Re: [PATCH] ARM: dts: aspeed-g6: Fix HVI3C function-group in pinctrl dtsi
On Thu, 29 Oct 2020 at 06:28, Dylan Hung wrote:
>
> The HVI3C shall be a group of I3C function, not an independent function.
> Correct the function name from "HVI3C" to "I3C".
>
> Signed-off-by: Dylan Hung
Fixes: f510f04c8c83 ("ARM: dts: aspeed: Add AST2600 pinmux nodes")
I have a few device tree fixes for 5.10 that I will include this in.
Cheers,
Joel
> ---
> arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
> b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
> index 7028e21bdd98..910eacc8ad3b 100644
> --- a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
> @@ -208,12 +208,12 @@
> };
>
> pinctrl_hvi3c3_default: hvi3c3_default {
> - function = "HVI3C3";
> + function = "I3C3";
> groups = "HVI3C3";
> };
>
> pinctrl_hvi3c4_default: hvi3c4_default {
> - function = "HVI3C4";
> + function = "I3C4";
> groups = "HVI3C4";
> };
>
> --
> 2.17.1
>
[PATCH v2 0/2] fixes and improvement for sprd hwspinlock
From: Chunyan Zhang Changes since v1: * Change to add __maybe_unsed rather than not use of_match_ptr(). Chunyan Zhang (2): hwspinlock: sprd: fixed warning of unused variable 'sprd_hwspinlock_of_match' hwspinlock: sprd: use module_platform_driver() instead postcore initcall drivers/hwspinlock/sprd_hwspinlock.c | 15 ++- 1 file changed, 2 insertions(+), 13 deletions(-) -- 2.20.1
[PATCH v2 1/2] hwspinlock: sprd: fixed warning of unused variable 'sprd_hwspinlock_of_match'
From: Chunyan Zhang
The macro function of_match_ptr() is NULL if CONFIG_OF is not set, then
Clang compiler would complain the of_device_id variable is unused.
But using of_match_ptr() is space saving, for this case, the unused structure
'sprd_hwspinlock_of_match' would be not built into symbol table if CONFIG_OF
is not set, probably depends on the compiler though.
So adding __maybe_unsed seems a good approach to fix this warning.
Reported-by: kernel test robot
Fixes: d8c81aba ("hwspinlock: sprd: Add hardware spinlock driver")
Signed-off-by: Chunyan Zhang
---
drivers/hwspinlock/sprd_hwspinlock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwspinlock/sprd_hwspinlock.c
b/drivers/hwspinlock/sprd_hwspinlock.c
index 36dc8038bbb4..4c63e2546064 100644
--- a/drivers/hwspinlock/sprd_hwspinlock.c
+++ b/drivers/hwspinlock/sprd_hwspinlock.c
@@ -138,7 +138,7 @@ static int sprd_hwspinlock_probe(struct platform_device
*pdev)
SPRD_HWLOCKS_NUM);
}
-static const struct of_device_id sprd_hwspinlock_of_match[] = {
+static const __maybe_unused struct of_device_id sprd_hwspinlock_of_match[] = {
{ .compatible = "sprd,hwspinlock-r3p0", },
{ /* sentinel */ }
};
--
2.20.1
Re: [PATCH 02/17] phy: amlogic: convert to devm_platform_ioremap_resource
On Thu, 2020-10-29 at 09:24 +0100, Remi Pommarel wrote:
> Hi,
>
> On Thu, Oct 29, 2020 at 10:54:24AM +0800, Chunfeng Yun wrote:
> > Use devm_platform_ioremap_resource to simplify code
> >
> > Signed-off-by: Chunfeng Yun
> > ---
> > drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c | 4 +---
> > drivers/phy/amlogic/phy-meson-axg-pcie.c | 4 +---
> > drivers/phy/amlogic/phy-meson-g12a-usb2.c| 4 +---
> > drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c | 4 +---
> > drivers/phy/amlogic/phy-meson-gxl-usb2.c | 4 +---
> > 5 files changed, 5 insertions(+), 15 deletions(-)
> >
> > diff --git a/drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c
> > b/drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c
> > index 1431cbf885e1..7d06cda329fb 100644
> > --- a/drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c
> > +++ b/drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c
> > @@ -126,7 +126,6 @@ static int phy_axg_mipi_pcie_analog_probe(struct
> > platform_device *pdev)
> > struct phy_axg_mipi_pcie_analog_priv *priv;
> > struct device_node *np = dev->of_node;
> > struct regmap *map;
> > - struct resource *res;
> > void __iomem *base;
> > int ret;
> >
> > @@ -134,8 +133,7 @@ static int phy_axg_mipi_pcie_analog_probe(struct
> > platform_device *pdev)
> > if (!priv)
> > return -ENOMEM;
> >
> > - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > - base = devm_ioremap_resource(dev, res);
> > + base = devm_platform_ioremap_resource(pdev, 0);
> > if (IS_ERR(base)) {
> > dev_err(dev, "failed to get regmap base\n");
> > return PTR_ERR(base);
>
> This patch will conflict with [0] that uses syscon to map those shared
> resources instead and that is hopefully going to be merged soon.
>
> So I think you can skip this file.
Ok, will drop it, thanks
>
> > diff --git a/drivers/phy/amlogic/phy-meson-axg-pcie.c
> > b/drivers/phy/amlogic/phy-meson-axg-pcie.c
> > index 377ed0dcd0d9..58a7507a8422 100644
> > --- a/drivers/phy/amlogic/phy-meson-axg-pcie.c
> > +++ b/drivers/phy/amlogic/phy-meson-axg-pcie.c
> > @@ -129,7 +129,6 @@ static int phy_axg_pcie_probe(struct platform_device
> > *pdev)
> > struct device *dev = >dev;
> > struct phy_axg_pcie_priv *priv;
> > struct device_node *np = dev->of_node;
> > - struct resource *res;
> > void __iomem *base;
> > int ret;
> >
> > @@ -145,8 +144,7 @@ static int phy_axg_pcie_probe(struct platform_device
> > *pdev)
> > return ret;
> > }
> >
> > - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > - base = devm_ioremap_resource(dev, res);
> > + base = devm_platform_ioremap_resource(pdev, 0);
> > if (IS_ERR(base))
> > return PTR_ERR(base);
> >
> > diff --git a/drivers/phy/amlogic/phy-meson-g12a-usb2.c
> > b/drivers/phy/amlogic/phy-meson-g12a-usb2.c
> > index b26e30e1afaf..9d1efa0d9394 100644
> > --- a/drivers/phy/amlogic/phy-meson-g12a-usb2.c
> > +++ b/drivers/phy/amlogic/phy-meson-g12a-usb2.c
> > @@ -292,7 +292,6 @@ static int phy_meson_g12a_usb2_probe(struct
> > platform_device *pdev)
> > {
> > struct device *dev = >dev;
> > struct phy_provider *phy_provider;
> > - struct resource *res;
> > struct phy_meson_g12a_usb2_priv *priv;
> > struct phy *phy;
> > void __iomem *base;
> > @@ -305,8 +304,7 @@ static int phy_meson_g12a_usb2_probe(struct
> > platform_device *pdev)
> > priv->dev = dev;
> > platform_set_drvdata(pdev, priv);
> >
> > - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > - base = devm_ioremap_resource(dev, res);
> > + base = devm_platform_ioremap_resource(pdev, 0);
> > if (IS_ERR(base))
> > return PTR_ERR(base);
> >
> > diff --git a/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c
> > b/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c
> > index 08e322789e59..ebe3d0ddd304 100644
> > --- a/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c
> > +++ b/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c
> > @@ -386,7 +386,6 @@ static int phy_g12a_usb3_pcie_probe(struct
> > platform_device *pdev)
> > struct device *dev = >dev;
> > struct device_node *np = dev->of_node;
> > struct phy_g12a_usb3_pcie_priv *priv;
> > - struct resource *res;
> > struct phy_provider *phy_provider;
> > void __iomem *base;
> > int ret;
> > @@ -395,8 +394,7 @@ static int phy_g12a_usb3_pcie_probe(struct
> > platform_device *pdev)
> > if (!priv)
> > return -ENOMEM;
> >
> > - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > - base = devm_ioremap_resource(dev, res);
> > + base = devm_platform_ioremap_resource(pdev, 0);
> > if (IS_ERR(base))
> > return PTR_ERR(base);
> >
> > diff --git a/drivers/phy/amlogic/phy-meson-gxl-usb2.c
> > b/drivers/phy/amlogic/phy-meson-gxl-usb2.c
> > index 43ec9bf24abf..875afb2672c7 100644
> > --- a/drivers/phy/amlogic/phy-meson-gxl-usb2.c
> > +++
Re: [PATCH 2/5] drm/amdgpu: fix incorrect enum type
Applied. Thanks!
Alex
On Mon, Oct 26, 2020 at 5:01 PM Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> core_link_write_dpcd() returns enum dc_status, not ddc_result:
>
> display/dc/core/dc_link_dp.c: In function 'dp_set_panel_mode':
> display/dc/core/dc_link_dp.c:4237:11: warning: implicit conversion from 'enum
> dc_status' to 'enum ddc_result'
> [-Wenum-conversion]
>
> Avoid the warning by using the correct enum in the caller.
>
> Fixes: 0b226322434c ("drm/amd/display: Synchronous DisplayPort Link Training")
> Signed-off-by: Arnd Bergmann
> ---
> drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> index ff1e9963ec7a..98464886341f 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> @@ -4230,7 +4230,7 @@ void dp_set_panel_mode(struct dc_link *link, enum
> dp_panel_mode panel_mode)
>
> if (edp_config_set.bits.PANEL_MODE_EDP
> != panel_mode_edp) {
> - enum ddc_result result = DDC_RESULT_UNKNOWN;
> + enum dc_status result = DC_ERROR_UNEXPECTED;
>
> edp_config_set.bits.PANEL_MODE_EDP =
> panel_mode_edp;
> @@ -4240,7 +4240,7 @@ void dp_set_panel_mode(struct dc_link *link, enum
> dp_panel_mode panel_mode)
> _config_set.raw,
> sizeof(edp_config_set.raw));
>
> - ASSERT(result == DDC_RESULT_SUCESSFULL);
> + ASSERT(result == DC_OK);
> }
> }
> DC_LOG_DETECTION_DP_CAPS("Link: %d eDP panel mode supported: %d "
> --
> 2.27.0
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] ARC: [plat-hsdk] Remap CCMs super early in asm boot trampoline
ARC HSDK platform stopped booting on released v5.10-rc1, getting stuck
in startup of non master SMP cores.
This was bisected to upstream commit 7fef431be9c9ac25
"(mm/page_alloc: place pages to tail in __free_pages_core())"
That commit itself is harmless, it just exposed a subtle assumption in
our platform code (hence CC'ing linux-mm just as FYI in case some other
arches / platforms trip on it).
The upstream commit is semantically disruptive as it reverses the order
of page allocations (actually it can be good test for hardware
verification to exercise different memory patterns altogether).
For ARC HSDK platform that meant a remapped memory region (pertaining to
unused Closely Coupled Memory) started getting used early for dynamice
allocations, while not effectively remapped on all the cores, triggering
memory error exception on those cores.
The fix is to move the CCM remapping from early platform code to to early core
boot code. And while it is undesirable to riddle common boot code with
platform quirks, there is no other way to do this since the faltering code
involves setting up stack itself so even function calls are not allowed at
that point.
If anyone is interested, all the gory details can be found at Link below.
Link: https://github.com/foss-for-synopsys-dwc-arc-processors/linux/issues/32
Cc: David Hildenbrand
Cc: linux...@kvack.org
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/head.S| 17 -
arch/arc/plat-hsdk/platform.c | 17 -
2 files changed, 16 insertions(+), 18 deletions(-)
diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 17fd1ed700cc..9152782444b5 100644
--- a/arch/arc/kernel/head.S
+++ b/arch/arc/kernel/head.S
@@ -67,7 +67,22 @@
sr r5, [ARC_REG_LPB_CTRL]
1:
#endif /* CONFIG_ARC_LPB_DISABLE */
-#endif
+
+ /* On HSDK, CCMs need to remapped super early */
+#ifdef CONFIG_ARC_SOC_HSDK
+ mov r6, 0x6000
+ lr r5, [ARC_REG_ICCM_BUILD]
+ breqr5, 0, 1f
+ sr r6, [ARC_REG_AUX_ICCM]
+1:
+ lr r5, [ARC_REG_DCCM_BUILD]
+ breqr5, 0, 2f
+ sr r6, [ARC_REG_AUX_DCCM]
+2:
+#endif /* CONFIG_ARC_SOC_HSDK */
+
+#endif /* CONFIG_ISA_ARCV2 */
+
; Config DSP_CTRL properly, so kernel may use integer multiply,
; multiply-accumulate, and divide operations
DSP_EARLY_INIT
diff --git a/arch/arc/plat-hsdk/platform.c b/arch/arc/plat-hsdk/platform.c
index 0b63fc095b99..b3ea1fa11f87 100644
--- a/arch/arc/plat-hsdk/platform.c
+++ b/arch/arc/plat-hsdk/platform.c
@@ -17,22 +17,6 @@ int arc_hsdk_axi_dmac_coherent __section(".data") = 0;
#define ARC_CCM_UNUSED_ADDR0x6000
-static void __init hsdk_init_per_cpu(unsigned int cpu)
-{
- /*
-* By default ICCM is mapped to 0x7z while this area is used for
-* kernel virtual mappings, so move it to currently unused area.
-*/
- if (cpuinfo_arc700[cpu].iccm.sz)
- write_aux_reg(ARC_REG_AUX_ICCM, ARC_CCM_UNUSED_ADDR);
-
- /*
-* By default DCCM is mapped to 0x8z while this area is used by kernel,
-* so move it to currently unused area.
-*/
- if (cpuinfo_arc700[cpu].dccm.sz)
- write_aux_reg(ARC_REG_AUX_DCCM, ARC_CCM_UNUSED_ADDR);
-}
#define ARC_PERIPHERAL_BASE0xf000
#define CREG_BASE (ARC_PERIPHERAL_BASE + 0x1000)
@@ -339,5 +323,4 @@ static const char *hsdk_compat[] __initconst = {
MACHINE_START(SIMULATION, "hsdk")
.dt_compat = hsdk_compat,
.init_early = hsdk_init_early,
- .init_per_cpu = hsdk_init_per_cpu,
MACHINE_END
--
2.25.1
Re: [PATCH] drm/amd/display: remove unneeded semicolon
Applied. Thanks! Alex On Tue, Oct 27, 2020 at 4:07 PM wrote: > > From: Tom Rix > > A semicolon is not needed after a switch statement. > > Signed-off-by: Tom Rix > --- > drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c | 2 +- > drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c > b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c > index 7b4b2304bbff..5feb804af4be 100644 > --- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c > +++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c > @@ -858,7 +858,7 @@ static struct clock_source *find_matching_pll( > return pool->clock_sources[DCE112_CLK_SRC_PLL5]; > default: > return NULL; > - }; > + } > > return 0; > } > diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c > b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c > index fb6a19d020f9..ee5230ccf3c4 100644 > --- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c > +++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c > @@ -280,6 +280,6 @@ char *mod_hdcp_state_id_to_str(int32_t id) > return "D2_A9_VALIDATE_STREAM_READY"; > default: > return "UNKNOWN_STATE_ID"; > - }; > + } > } > > -- > 2.18.1 > > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] drm/amdgpu: remove unneeded semicolon
Applied. I dropped the first hunk as that fix had already been submitted by someone else. Alex On Tue, Oct 27, 2020 at 3:07 PM wrote: > > From: Tom Rix > > A semicolon is not needed after a switch statement. > > Signed-off-by: Tom Rix > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c | 2 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c > index 1b213c4ddfcb..19c0a3655228 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c > @@ -654,7 +654,7 @@ int amdgpu_pmu_init(struct amdgpu_device *adev) > > default: > return 0; > - }; > + } > > return ret; > } > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c > index 8bf6a7c056bc..a61cf8cfbfc3 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c > @@ -953,7 +953,7 @@ static char *amdgpu_ras_badpage_flags_str(unsigned int > flags) > case AMDGPU_RAS_RETIRE_PAGE_FAULT: > default: > return "F"; > - }; > + } > } > > /** > -- > 2.18.1 > > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm/sti: use DEFINE_DEBUGFS_ATTRIBUTE with debugfs_create_file_unsafe()
Using DEFINE_DEBUGFS_ATTRIBUTE macro with debugfs_create_file_unsafe()
function in place of the debugfs_create_file() function will make the
file operation struct "reset" aware of the file's lifetime. Additional
details here: https://lists.archive.carbon60.com/linux/kernel/2369498
Issue reported by Coccinelle script:
scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci
Signed-off-by: Deepak R Varma
---
Please Note: This is a Outreachy project task patch.
drivers/gpu/drm/sti/sti_drv.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/gpu/drm/sti/sti_drv.c
index 3f54efa36098..18c6639e4dbf 100644
--- a/drivers/gpu/drm/sti/sti_drv.c
+++ b/drivers/gpu/drm/sti/sti_drv.c
@@ -68,8 +68,8 @@ static int sti_drm_fps_set(void *data, u64 val)
return 0;
}
-DEFINE_SIMPLE_ATTRIBUTE(sti_drm_fps_fops,
- sti_drm_fps_get, sti_drm_fps_set, "%llu\n");
+DEFINE_DEBUGFS_ATTRIBUTE(sti_drm_fps_fops, sti_drm_fps_get,
+sti_drm_fps_set, "%llu\n");
static int sti_drm_fps_dbg_show(struct seq_file *s, void *data)
{
@@ -98,8 +98,8 @@ static void sti_drm_dbg_init(struct drm_minor *minor)
ARRAY_SIZE(sti_drm_dbg_list),
minor->debugfs_root, minor);
- debugfs_create_file("fps_show", S_IRUGO | S_IWUSR, minor->debugfs_root,
- minor->dev, _drm_fps_fops);
+ debugfs_create_file_unsafe("fps_show", S_IRUGO | S_IWUSR,
minor->debugfs_root,
+ minor->dev, _drm_fps_fops);
DRM_INFO("%s: debugfs installed\n", DRIVER_NAME);
}
--
2.25.1
[PATCH] drm/panel: st7703: use DEFINE_DEBUGFS_ATTRIBUTE with debugfs_create_file_unsafe()
Using DEFINE_DEBUGFS_ATTRIBUTE macro with debugfs_create_file_unsafe()
function in place of the debugfs_create_file() function will make the
file operation struct "reset" aware of the file's lifetime. Additional
details here: https://lists.archive.carbon60.com/linux/kernel/2369498
Issue reported by Coccinelle script:
scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci
Signed-off-by: Deepak R Varma
---
Please Note: This is a Outreachy project task patch.
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index c22e7c49e077..89b71d4f810d 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -502,15 +502,14 @@ static int allpixelson_set(void *data, u64 val)
return 0;
}
-DEFINE_SIMPLE_ATTRIBUTE(allpixelson_fops, NULL,
- allpixelson_set, "%llu\n");
+DEFINE_DEBUGFS_ATTRIBUTE(allpixelson_fops, NULL, allpixelson_set, "%llu\n");
static void st7703_debugfs_init(struct st7703 *ctx)
{
ctx->debugfs = debugfs_create_dir(DRV_NAME, NULL);
- debugfs_create_file("allpixelson", 0600, ctx->debugfs, ctx,
- _fops);
+ debugfs_create_file_unsafe("allpixelson", 0600, ctx->debugfs, ctx,
+ _fops);
}
static void st7703_debugfs_remove(struct st7703 *ctx)
--
2.25.1
Re: INFO: rcu detected stall in ip_list_rcv
syzbot suspects this issue was fixed by commit: commit 1d0e850a49a5b56f8f3cb51e74a11e2fedb96be6 Author: David Howells Date: Fri Oct 16 12:21:14 2020 + afs: Fix cell removal bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=164fdca850 start commit: fb0155a0 Merge tag 'nfs-for-5.9-3' of git://git.linux-nfs... git tree: upstream kernel config: https://syzkaller.appspot.com/x/.config?x=41b736b7ce1b3ea4 dashboard link: https://syzkaller.appspot.com/bug?extid=14189f93c40e0e6b19cd syz repro: https://syzkaller.appspot.com/x/repro.syz?x=12baea3790 C reproducer: https://syzkaller.appspot.com/x/repro.c?x=172f27cf90 If the result looks correct, please mark the issue as fixed by replying with: #syz fix: afs: Fix cell removal For information about bisection process see: https://goo.gl/tpsmEJ#bisection
[PATCH] drm/i915/gvt: use DEFINE_DEBUGFS_ATTRIBUTE with debugfs_create_file_unsafe()
Using DEFINE_DEBUGFS_ATTRIBUTE macro with debugfs_create_file_unsafe()
function in place of the debugfs_create_file() function will make the
file operation struct "reset" aware of the file's lifetime. Additional
details here: https://lists.archive.carbon60.com/linux/kernel/2369498
Issue reported by Coccinelle script:
scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci
Signed-off-by: Deepak R Varma
---
Please Note: This is a Outreachy project task patch.
drivers/gpu/drm/i915/gvt/debugfs.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/debugfs.c
b/drivers/gpu/drm/i915/gvt/debugfs.c
index 62e6a14ad58e..18adfa2d5f5b 100644
--- a/drivers/gpu/drm/i915/gvt/debugfs.c
+++ b/drivers/gpu/drm/i915/gvt/debugfs.c
@@ -147,9 +147,8 @@ vgpu_scan_nonprivbb_set(void *data, u64 val)
return 0;
}
-DEFINE_SIMPLE_ATTRIBUTE(vgpu_scan_nonprivbb_fops,
- vgpu_scan_nonprivbb_get, vgpu_scan_nonprivbb_set,
- "0x%llx\n");
+DEFINE_DEBUGFS_ATTRIBUTE(vgpu_scan_nonprivbb_fops, vgpu_scan_nonprivbb_get,
+vgpu_scan_nonprivbb_set, "0x%llx\n");
/**
* intel_gvt_debugfs_add_vgpu - register debugfs entries for a vGPU
@@ -165,8 +164,8 @@ void intel_gvt_debugfs_add_vgpu(struct intel_vgpu *vgpu)
debugfs_create_bool("active", 0444, vgpu->debugfs, >active);
debugfs_create_file("mmio_diff", 0444, vgpu->debugfs, vgpu,
_mmio_diff_fops);
- debugfs_create_file("scan_nonprivbb", 0644, vgpu->debugfs, vgpu,
- _scan_nonprivbb_fops);
+ debugfs_create_file_unsafe("scan_nonprivbb", 0644, vgpu->debugfs, vgpu,
+ _scan_nonprivbb_fops);
}
/**
--
2.25.1
Re: [PATCH v4 5/7] dma-buf: system_heap: Allocate higher order pages if available
On Thu, Oct 29, 2020 at 7:34 PM Hillf Danton wrote: > On Thu, 29 Oct 2020 12:34:51 -0700 John Stultz wrote: > > As for your comment on HPAGE_PMD_ORDER (9 on arm64/arm) and > > PAGE_ALLOC_COSTLY_ORDER(3), I'm not totally sure I understand your > > question? Are you suggesting those values would be more natural orders > > to choose from? > > The numbers, 9 and 3, are not magic themselves but under the mm diretory > they draw more attentions than others do. Sometimes it would take two > minutes for me to work out that HPAGE_PMD_ORDER does not mean 1MiB, on > platforms like arm64 or not. Yes, I can say it took me longer than two minutes to dig around and work out HPAGE_PMD_ORDER for my last reply. :) Though I'm still a bit unsure if you are proposing something more than just a comment to explain why order 8 and order 4 allocations are used in my patch? Please let me know if so. thanks -john
[PATCH] drm/amd/pm: use DEFINE_DEBUGFS_ATTRIBUTE with debugfs_create_file_unsafe()
Using DEFINE_DEBUGFS_ATTRIBUTE macro with debugfs_create_file_unsafe() function in place of the debugfs_create_file() function will make the file operation struct "reset" aware of the file's lifetime. Additional details here: https://lists.archive.carbon60.com/linux/kernel/2369498 Issue reported by Coccinelle script: scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci Signed-off-by: Deepak R Varma --- Please Note: This is a Outreachy project task patch. .../gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c index 740e2fc7a034..1e79baab753e 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c @@ -252,12 +252,11 @@ static int init_powerplay_table_information( phm_copy_clock_limits_array(hwmgr, _information->power_saving_clock_max, powerplay_table->PowerSavingClockMax, ATOM_VEGA12_PPCLOCK_COUNT); phm_copy_clock_limits_array(hwmgr, _information->power_saving_clock_min, powerplay_table->PowerSavingClockMin, ATOM_VEGA12_PPCLOCK_COUNT); - pptable_information->smc_pptable = kmalloc(sizeof(PPTable_t), GFP_KERNEL); + pptable_information->smc_pptable = kmemdup(&(powerplay_table->smcPPTable), + sizeof(PPTable_t), GFP_KERNEL); if (pptable_information->smc_pptable == NULL) return -ENOMEM; - memcpy(pptable_information->smc_pptable, &(powerplay_table->smcPPTable), sizeof(PPTable_t)); - result = append_vbios_pptable(hwmgr, (pptable_information->smc_pptable)); return result; -- 2.25.1
Re: [PATCH] stop_machine: Mark functions as notrace
On Fri, Oct 30, 2020 at 2:46 AM Atish Patra wrote:
>
> On Thu, Oct 29, 2020 at 9:06 AM Guo Ren wrote:
> >
> > On Thu, Oct 29, 2020 at 10:34 AM Zong Li wrote:
> > >
> > > On Thu, Oct 29, 2020 at 8:23 AM Atish Patra wrote:
> > > >
> > > > On Wed, Oct 28, 2020 at 8:44 AM Guo Ren wrote:
> > > > >
> > > > > Hi Zong & Atish,
> > > > >
> > > > > In our 2 harts c910 chip, we found:
> > > > >
> > > > > echo function > /sys/kernel/debug/tracing/current_tracer
> > > > > echo function_graph > /sys/kernel/debug/tracing/current_tracer
> > > > > echo function > /sys/kernel/debug/tracing/current_tracer
> > > > > echo function_graph > /sys/kernel/debug/tracing/current_tracer
> > > > >
> > > > > Then one core halted at stop_machine_yield:
> > > > > arch_cpu_idle () at arch/riscv/kernel/process.c:39
> > > > > 39 local_irq_enable();
> > > > > (gdb) i th
> > > > > Id Target Id Frame
> > > > > * 1Thread 1 (CPU#0) arch_cpu_idle () at
> > > > > arch/riscv/kernel/process.c:39
> > > > > 2Thread 2 (CPU#1) stop_machine_yield
> > > > > (cpumask=0xffe001371fa8 <__cpu_online_mask>) at
> > > > > ./arch/riscv/include/asm/vdso/processor.h:12
> > > > > (gdb) thread 2
> > > > > [Switching to thread 2 (Thread 2)]
> > > > > #0 stop_machine_yield (cpumask=0xffe001371fa8
> > > > > <__cpu_online_mask>) at ./arch/riscv/include/asm/vdso/processor.h:12
> > > > > 12 __asm__ __volatile__ ("div %0, %0, zero" : "=r"
> > > > > (dummy));
> > > > >
> > > > > With your patch, it's solved. For this patch, I'll give:
> > > > > Tested by: Guo Ren
> > > > >
> > > > > But that's not enough, we still need:
> > > > >
> > > > > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
> > > > > index 226ccce..12b8808 100644
> > > > > --- a/arch/riscv/kernel/sbi.c
> > > > > +++ b/arch/riscv/kernel/sbi.c
> > > > > @@ -376,7 +376,7 @@ EXPORT_SYMBOL(sbi_send_ipi);
> > > > > *
> > > > > * Return: None
> > > > > */
> > > > > -void sbi_remote_fence_i(const unsigned long *hart_mask)
> > > > > +void notrace sbi_remote_fence_i(const unsigned long *hart_mask)
> > > > > {
> > > > > __sbi_rfence(SBI_EXT_RFENCE_REMOTE_FENCE_I,
> > > > > hart_mask, 0, 0, 0, 0);
> > > > > diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
> > > > > index 400b945d..9467d987 100644
> > > > > --- a/arch/riscv/mm/cacheflush.c
> > > > > +++ b/arch/riscv/mm/cacheflush.c
> > > > > @@ -9,12 +9,12 @@
> > > > >
> > > > > #include
> > > > >
> > > > > -static void ipi_remote_fence_i(void *info)
> > > > > +static void notrace ipi_remote_fence_i(void *info)
> > > > > {
> > > > > return local_flush_icache_all();
> > > > > }
> > > > >
> > > > > -void flush_icache_all(void)
> > > > > +void notrace flush_icache_all(void)
> > > > > {
> > > > > if (IS_ENABLED(CONFIG_RISCV_SBI))
> > > > > sbi_remote_fence_i(NULL);
> > > > >
> > > >
> > > > Did you see any issue if these functions are not marked as notrace ?
> > > >
> > > > As per Zong's explanation, the issue was that the other harts already
> > > > fetched the next 2 nops and
> > > > executed 1 while kernel patching replaced other with one of the auipc
> > > > + jalr pair.
> > > >
> > > > @Zong can correct me if I am wrong.
> > > >
> > > > These functions are too far ahead. Can it cause such issues ? If yes,
> > > > then we need to mark each and every function
> > > > that can be invoked from patch_text_nosync and are not inlined.
> > > >
> > > > That includes copy_to_kernel_nofault, __sbi_rfence_v02,
> > > > __sbi_rfence_v02_call, sbi_ecall.
> > > >
> > > > Few of these functions may be inlined by compiler. Can we depend on
> > > > that ?
> > > >
> > > > > Because:
> > > > > (gdb) bt
> > > > > #0 flush_icache_all () at arch/riscv/mm/cacheflush.c:20
> > > > > #1 0xffe00020473a in patch_text_nosync (addr=,
> > > > > insns=
> > > > > , len=) at
> > > > > arch/riscv/kernel/patch.c:96
> > > > > #2 0xffe000206792 in ftrace_make_call (rec=,
> > > > > addr=) at arch/riscv/kernel/ftrace.c:109
> > > > > #3 0xffe0002c9be4 in __ftrace_replace_code
> > > > > (rec=0xffe01ae40020, e
> > > > > nable=true) at kernel/trace/ftrace.c:2503
> > > > > #4 0xffe0002ca092 in ftrace_replace_code (mod_flags= > > > > out>) at kernel/trace/ftrace.c:2530
> > > > > #5 0xffe0002ca24a in ftrace_modify_all_code (command=9) at kernel
> > > > >/trace/ftrace.c:2677
> > > > > #6 0xffe0002ca2ee in __ftrace_modify_code (data=)
> > > > > at
> > > > >kernel/trace/ftrace.c:2703
> > > > > #7 0xffe0002c1390 in multi_cpu_stop (data=0x0) at
> > > > > kernel/stop_machin
> > > > >e.c:224
> > > > > #8 0xffe0002c0fbe in cpu_stopper_thread (cpu=) at
> > > > > kern
> > > > >el/stop_machine.c:491
> > > > > #9 0xffe0002343be in smpboot_thread_fn (data=0x0) at
> > > > > kernel/smpboot.
> > > > >c:165
> > > > > #10 0xffe00022f894 in kthread (_create=0xffe01af13040)
RE: [PATCH] clk: imx: remove redundant assignment to pointer np
> From: Colin King
> Sent: Friday, October 30, 2020 6:40 AM
>
> Pointer np is being initialized with a value that is never read and it is
> being
> updated with a value later on. The initialization is redundant and can be
> removed.
>
> Addresses-Coverity: ("Unused value")
> Signed-off-by: Colin Ian King
Reviewed-by: Dong Aisheng
Regards
Aisheng
Re: [f2fs-dev] [PATCH v5 1/2] f2fs: add F2FS_IOC_GET_COMPRESS_OPTION ioctl
Opps, I missed this.
We need v7... lol
2020년 10월 30일 (금) 오전 11:37, Chao Yu 님이 작성:
>
> On 2020/10/29 15:24, Chao Yu wrote:
> > On 2020/10/29 12:15, Daeho Jeong wrote:
>
> >> +inode_lock(inode);
> >
> > It's minor,
> >
> > inode_lock_shared()?
> >
> >> +
> >> +if (!f2fs_compressed_file(inode)) {
> >> +inode_unlock(inode);
> >
> > inode_unlock_shared()?
> >
> >> +return -ENODATA;
> >> +}
> >> +
> >> +option.algorithm = F2FS_I(inode)->i_compress_algorithm;
> >> +option.log_cluster_size = F2FS_I(inode)->i_log_cluster_size;
> >> +
> >> +inode_unlock(inode);
> >
> > ditto.
>
> Any comments?
>
> Thanks,
[PATCH net-next v2] net/usb/r8153_ecm: support ECM mode for RTL8153
Support ECM mode based on cdc_ether with relative mii functions,
when CONFIG_USB_RTL8152 is not set, or the device is not supported
by r8152 driver.
Signed-off-by: Hayes Wang
---
v2:
Add include/linux/usb/r8152.h to avoid the warning about
no previous prototype for rtl8152_get_version.
drivers/net/usb/Makefile| 2 +-
drivers/net/usb/r8152.c | 30 +--
drivers/net/usb/r8153_ecm.c | 162
include/linux/usb/r8152.h | 37
4 files changed, 204 insertions(+), 27 deletions(-)
create mode 100644 drivers/net/usb/r8153_ecm.c
create mode 100644 include/linux/usb/r8152.h
diff --git a/drivers/net/usb/Makefile b/drivers/net/usb/Makefile
index 99fd12be2111..99381e6bea78 100644
--- a/drivers/net/usb/Makefile
+++ b/drivers/net/usb/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_USB_LAN78XX) += lan78xx.o
obj-$(CONFIG_USB_NET_AX8817X) += asix.o
asix-y := asix_devices.o asix_common.o ax88172a.o
obj-$(CONFIG_USB_NET_AX88179_178A) += ax88179_178a.o
-obj-$(CONFIG_USB_NET_CDCETHER) += cdc_ether.o
+obj-$(CONFIG_USB_NET_CDCETHER) += cdc_ether.o r8153_ecm.o
obj-$(CONFIG_USB_NET_CDC_EEM) += cdc_eem.o
obj-$(CONFIG_USB_NET_DM9601) += dm9601.o
obj-$(CONFIG_USB_NET_SR9700) += sr9700.o
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index b1770489aca5..7d2523d96c51 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
/* Information for net-next */
#define NETNEXT_VERSION"11"
@@ -653,18 +654,6 @@ enum rtl_register_content {
#define INTR_LINK 0x0004
-#define RTL8152_REQT_READ 0xc0
-#define RTL8152_REQT_WRITE 0x40
-#define RTL8152_REQ_GET_REGS 0x05
-#define RTL8152_REQ_SET_REGS 0x05
-
-#define BYTE_EN_DWORD 0xff
-#define BYTE_EN_WORD 0x33
-#define BYTE_EN_BYTE 0x11
-#define BYTE_EN_SIX_BYTES 0x3f
-#define BYTE_EN_START_MASK 0x0f
-#define BYTE_EN_END_MASK 0xf0
-
#define RTL8153_MAX_PACKET 9216 /* 9K */
#define RTL8153_MAX_MTU(RTL8153_MAX_PACKET - VLAN_ETH_HLEN - \
ETH_FCS_LEN)
@@ -689,21 +678,9 @@ enum rtl8152_flags {
LENOVO_MACPASSTHRU,
};
-/* Define these values to match your device */
-#define VENDOR_ID_REALTEK 0x0bda
-#define VENDOR_ID_MICROSOFT0x045e
-#define VENDOR_ID_SAMSUNG 0x04e8
-#define VENDOR_ID_LENOVO 0x17ef
-#define VENDOR_ID_LINKSYS 0x13b1
-#define VENDOR_ID_NVIDIA 0x0955
-#define VENDOR_ID_TPLINK 0x2357
-
#define DEVICE_ID_THINKPAD_THUNDERBOLT3_DOCK_GEN2 0x3082
#define DEVICE_ID_THINKPAD_USB_C_DOCK_GEN2 0xa387
-#define MCU_TYPE_PLA 0x0100
-#define MCU_TYPE_USB 0x
-
struct tally_counter {
__le64 tx_packets;
__le64 rx_packets;
@@ -6615,7 +6592,7 @@ static int rtl_fw_init(struct r8152 *tp)
return 0;
}
-static u8 rtl_get_version(struct usb_interface *intf)
+u8 rtl8152_get_version(struct usb_interface *intf)
{
struct usb_device *udev = interface_to_usbdev(intf);
u32 ocp_data = 0;
@@ -6673,12 +6650,13 @@ static u8 rtl_get_version(struct usb_interface *intf)
return version;
}
+EXPORT_SYMBOL_GPL(rtl8152_get_version);
static int rtl8152_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct usb_device *udev = interface_to_usbdev(intf);
- u8 version = rtl_get_version(intf);
+ u8 version = rtl8152_get_version(intf);
struct r8152 *tp;
struct net_device *netdev;
int ret;
diff --git a/drivers/net/usb/r8153_ecm.c b/drivers/net/usb/r8153_ecm.c
new file mode 100644
index ..2c3fabd38b16
--- /dev/null
+++ b/drivers/net/usb/r8153_ecm.c
@@ -0,0 +1,162 @@
+// SPDX-License-Identifier: GPL-2.0-only
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define OCP_BASE 0xe86c
+
+static int pla_read_word(struct usbnet *dev, u16 index)
+{
+ u16 byen = BYTE_EN_WORD;
+ u8 shift = index & 2;
+ __le32 tmp;
+ int ret;
+
+ if (shift)
+ byen <<= shift;
+
+ index &= ~3;
+
+ ret = usbnet_read_cmd(dev, RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
index,
+ MCU_TYPE_PLA | byen, , sizeof(tmp));
+ if (ret < 0)
+ goto out;
+
+ ret = __le32_to_cpu(tmp);
+ ret >>= (shift * 8);
+ ret &= 0x;
+
+out:
+ return ret;
+}
+
+static int pla_write_word(struct usbnet *dev, u16 index, u32 data)
+{
+ u32 mask = 0x;
+ u16 byen = BYTE_EN_WORD;
+ u8 shift = index & 2;
+ __le32 tmp;
+ int ret;
+
+ data &= mask;
+
+ if (shift) {
+ byen <<= shift;
+ mask <<= (shift * 8);
+ data <<= (shift * 8);
+
Re: [PATCH v2 1/2] bpf: don't rely on GCC __attribute__((optimize)) to disable GCSE
On Thu, Oct 29, 2020 at 05:28:11PM -0700, Nick Desaulniers wrote: > > We already know that -fno-asynchronous-unwind-tables get dropped, > hence this patch. On arm64 only. Not on x86 > And we know -fomit-frame-pointer or > -fno-omit-frame-pointer I guess gets dropped, hence your ask. yep. that one is bugged. > We might not know the full extent which other flags get dropped with the > optimize attribute, but I'd argue that my list above can all result in > pretty bad bugs when accidentally omitted (ok, maybe not -fshort-wchar > or -fmacro-prefix-map, idk what those do) or when mixed with code that true. Few month back I've checked that strict-aliasing and no-common flags from your list are not dropped by this attr in gcc [6789]. I've also checked that no-red-zone and model=kernel preserved as well. > has different values those flags control. Searching GCC's bug tracker > for `__attribute__((optimize` turns up plenty of reports to make me > think this attribute maybe doesn't work the way folks suspect or > intend: > https://gcc.gnu.org/bugzilla/buglist.cgi?quicksearch=__attribute__%28%28optimize_id=283390. There is a risk. Is it a footgun? Sure. Yet. gcc testsuite is using __attribute__((optimize)). And some of these tests were added _after_ offical gcc doc said that this attribute is broken. imo it's like 'beware of the dog' sign. > There's plenty of folks arguing against the use of the optimize > attribute in favor of the command line flag. I urge you to please > reconsider the request. ok. Applied this first patch to bpf tree and will get it to Linus soon. Second patch that is splitting interpreter out because of this mess is dropped. The effect of gcse on performance is questionable. iirc some interpreters used to do -fno-gcse to gain performance.
[PATCH] drm/amdgpu: use DEFINE_DEBUGFS_ATTRIBUTE with debugfs_create_file_unsafe()
Using DEFINE_DEBUGFS_ATTRIBUTE macro with debugfs_create_file_unsafe()
function in place of the debugfs_create_file() function will make the
file operation struct "reset" aware of the file's lifetime. Additional
details here: https://lists.archive.carbon60.com/linux/kernel/2369498
Issue reported by Coccinelle script:
scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci
Signed-off-by: Deepak R Varma
---
Please Note: This is a Outreachy project task patch.
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 2d125b8b15ee..f076b1ba7319 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1551,29 +1551,29 @@ static int amdgpu_debugfs_sclk_set(void *data, u64 val)
return 0;
}
-DEFINE_SIMPLE_ATTRIBUTE(fops_ib_preempt, NULL,
- amdgpu_debugfs_ib_preempt, "%llu\n");
+DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
+amdgpu_debugfs_ib_preempt, "%llu\n");
-DEFINE_SIMPLE_ATTRIBUTE(fops_sclk_set, NULL,
- amdgpu_debugfs_sclk_set, "%llu\n");
+DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
+amdgpu_debugfs_sclk_set, "%llu\n");
int amdgpu_debugfs_init(struct amdgpu_device *adev)
{
int r, i;
adev->debugfs_preempt =
- debugfs_create_file("amdgpu_preempt_ib", 0600,
- adev_to_drm(adev)->primary->debugfs_root,
adev,
- _ib_preempt);
+ debugfs_create_file_unsafe("amdgpu_preempt_ib", 0600,
+
adev_to_drm(adev)->primary->debugfs_root, adev,
+ _ib_preempt);
if (!(adev->debugfs_preempt)) {
DRM_ERROR("unable to create amdgpu_preempt_ib debugsfs file\n");
return -EIO;
}
adev->smu.debugfs_sclk =
- debugfs_create_file("amdgpu_force_sclk", 0200,
- adev_to_drm(adev)->primary->debugfs_root,
adev,
- _sclk_set);
+ debugfs_create_file_unsafe("amdgpu_force_sclk", 0200,
+
adev_to_drm(adev)->primary->debugfs_root, adev,
+ _sclk_set);
if (!(adev->smu.debugfs_sclk)) {
DRM_ERROR("unable to create amdgpu_set_sclk debugsfs file\n");
return -EIO;
--
2.25.1
