[PATCH v2 1/4] dt-bindings: k3dma: add optional property hisilicon,dma-min-chan
From: Li Yu Add optional property hisilicon,dma-min-chan for k3dma. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/k3dma.txt b/Documentation/devicetree/bindings/dma/k3dma.txt index 4945aeac4dc4..f34202a80f3c 100644 --- a/Documentation/devicetree/bindings/dma/k3dma.txt +++ b/Documentation/devicetree/bindings/dma/k3dma.txt @@ -12,6 +12,11 @@ Required properties: have specific request line - clocks: clock required +Optional properties: +- hisilicon,dma-min-chan: the minimum DMA channel number which is usable + Default value is 0, but in some platform it is + configured 1, like in hi3660 platform + Example: Controller: @@ -21,6 +26,7 @@ Controller: #dma-cells = <1>; dma-channels = <16>; dma-requests = <27>; + hisilicon,dma-min-chan = <1>; interrupts = <0 12 4>; clocks = <>; }; -- 2.17.1
[PATCH v2 0/4] k3dma: add support to reserved channels
This patchset fixes bug people found on hikey960 when allocating DMA channels to peripherals such as SPI. It fails because the channel is reserved and not accessible by kernel. Patch 1, 2 and 3 add support to reserved channels for K3 DMA. Patch 4 includes a removal of axi_config who controls DMA secure/non-secure access permission but is actually set in early stage by bootloader. Guodong Xu (1): arm64: dts: hi3660: update property name hisilicon,dma-min-chan Li Yu (3): dt-bindings: k3dma: add optional property hisilicon,dma-min-chan k3dma: add support to reserved minimum channels k3dma: delete axi_config Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 +- drivers/dma/k3dma.c | 16 3 files changed, 15 insertions(+), 9 deletions(-) -- 2.17.1
[PATCH v2 2/4] k3dma: add support to reserved minimum channels
From: Li Yu On k3 series of SoC, DMA controller reserves some channels for other on-chip coprocessors. By reading property "hisilicon,dma-min-chan" from dts node, kernel will not use these reserved channels. As an example, on Hi3660, channel 0 is reserved for lpm3. Refer to Documentation/devicetree/bindings/dma/k3dma.txt for more information. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- drivers/dma/k3dma.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c index fa31cccbe04f..33efb541acb2 100644 --- a/drivers/dma/k3dma.c +++ b/drivers/dma/k3dma.c @@ -113,6 +113,7 @@ struct k3_dma_dev { struct dma_pool *pool; u32 dma_channels; u32 dma_requests; + u32 dma_min_chan; unsigned intirq; }; @@ -309,7 +310,7 @@ static void k3_dma_tasklet(unsigned long arg) /* check new channel request in d->chan_pending */ spin_lock_irq(>lock); - for (pch = 0; pch < d->dma_channels; pch++) { + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { p = >phy[pch]; if (p->vchan == NULL && !list_empty(>chan_pending)) { @@ -326,7 +327,7 @@ static void k3_dma_tasklet(unsigned long arg) } spin_unlock_irq(>lock); - for (pch = 0; pch < d->dma_channels; pch++) { + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { if (pch_alloc & (1 << pch)) { p = >phy[pch]; c = p->vchan; @@ -825,6 +826,8 @@ static int k3_dma_probe(struct platform_device *op) "dma-channels", >dma_channels); of_property_read_u32((>dev)->of_node, "dma-requests", >dma_requests); + of_property_read_u32((>dev)->of_node, + "hisilicon,dma-min-chan", >dma_min_chan); } d->clk = devm_clk_get(>dev, NULL); @@ -848,12 +851,12 @@ static int k3_dma_probe(struct platform_device *op) return -ENOMEM; /* init phy channel */ - d->phy = devm_kcalloc(>dev, - d->dma_channels, sizeof(struct k3_dma_phy), GFP_KERNEL); + d->phy = devm_kcalloc(>dev, (d->dma_channels - d->dma_min_chan), + sizeof(struct k3_dma_phy), GFP_KERNEL); if (d->phy == NULL) return -ENOMEM; - for (i = 0; i < d->dma_channels; i++) { + for (i = d->dma_min_chan; i < d->dma_channels; i++) { struct k3_dma_phy *p = >phy[i]; p->idx = i; -- 2.17.1
[PATCH v2 3/4] arm64: dts: hi3660: update property name hisilicon,dma-min-chan
Update property name dma-min-chan to "hisilicon,dma-min-chan" Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 8d477dcbfa58..0cec26976eb6 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -537,7 +537,7 @@ #dma-cells = <1>; dma-channels = <16>; dma-requests = <32>; - dma-min-chan = <1>; + hisilicon,dma-min-chan = <1>; interrupts = ; clocks = <_ctrl HI3660_CLK_GATE_DMAC>; dma-no-cci; -- 2.17.1
[PATCH v2 4/4] k3dma: delete axi_config
From: Li Yu Axi_config controls whether DMA resources can be accessed in non-secure mode, such as linux kernel. The setting is actually done in bootloader stage. This patch removes axi_config from k3dma driver. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- drivers/dma/k3dma.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c index 33efb541acb2..4542e703ec85 100644 --- a/drivers/dma/k3dma.c +++ b/drivers/dma/k3dma.c @@ -52,8 +52,6 @@ #define CX_SRC 0x814 #define CX_DST 0x818 #define CX_CFG 0x81c -#define AXI_CFG0x820 -#define AXI_CFG_DEFAULT0x201201 #define CX_LLI_CHAIN_EN0x2 #define CX_CFG_EN 0x1 @@ -158,7 +156,6 @@ static void k3_dma_set_desc(struct k3_dma_phy *phy, struct k3_desc_hw *hw) writel_relaxed(hw->count, phy->base + CX_CNT0); writel_relaxed(hw->saddr, phy->base + CX_SRC); writel_relaxed(hw->daddr, phy->base + CX_DST); - writel_relaxed(AXI_CFG_DEFAULT, phy->base + AXI_CFG); writel_relaxed(hw->config, phy->base + CX_CFG); } -- 2.17.1
[PATCH v2 1/4] dt-bindings: k3dma: add optional property hisilicon,dma-min-chan
From: Li Yu Add optional property hisilicon,dma-min-chan for k3dma. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/k3dma.txt b/Documentation/devicetree/bindings/dma/k3dma.txt index 4945aeac4dc4..f34202a80f3c 100644 --- a/Documentation/devicetree/bindings/dma/k3dma.txt +++ b/Documentation/devicetree/bindings/dma/k3dma.txt @@ -12,6 +12,11 @@ Required properties: have specific request line - clocks: clock required +Optional properties: +- hisilicon,dma-min-chan: the minimum DMA channel number which is usable + Default value is 0, but in some platform it is + configured 1, like in hi3660 platform + Example: Controller: @@ -21,6 +26,7 @@ Controller: #dma-cells = <1>; dma-channels = <16>; dma-requests = <27>; + hisilicon,dma-min-chan = <1>; interrupts = <0 12 4>; clocks = <>; }; -- 2.17.1
[PATCH v2 0/4] k3dma: add support to reserved channels
This patchset fixes bug people found on hikey960 when allocating DMA channels to peripherals such as SPI. It fails because the channel is reserved and not accessible by kernel. Patch 1, 2 and 3 add support to reserved channels for K3 DMA. Patch 4 includes a removal of axi_config who controls DMA secure/non-secure access permission but is actually set in early stage by bootloader. Guodong Xu (1): arm64: dts: hi3660: update property name hisilicon,dma-min-chan Li Yu (3): dt-bindings: k3dma: add optional property hisilicon,dma-min-chan k3dma: add support to reserved minimum channels k3dma: delete axi_config Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 +- drivers/dma/k3dma.c | 16 3 files changed, 15 insertions(+), 9 deletions(-) -- 2.17.1
[PATCH v2 2/4] k3dma: add support to reserved minimum channels
From: Li Yu On k3 series of SoC, DMA controller reserves some channels for other on-chip coprocessors. By reading property "hisilicon,dma-min-chan" from dts node, kernel will not use these reserved channels. As an example, on Hi3660, channel 0 is reserved for lpm3. Refer to Documentation/devicetree/bindings/dma/k3dma.txt for more information. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- drivers/dma/k3dma.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c index fa31cccbe04f..33efb541acb2 100644 --- a/drivers/dma/k3dma.c +++ b/drivers/dma/k3dma.c @@ -113,6 +113,7 @@ struct k3_dma_dev { struct dma_pool *pool; u32 dma_channels; u32 dma_requests; + u32 dma_min_chan; unsigned intirq; }; @@ -309,7 +310,7 @@ static void k3_dma_tasklet(unsigned long arg) /* check new channel request in d->chan_pending */ spin_lock_irq(>lock); - for (pch = 0; pch < d->dma_channels; pch++) { + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { p = >phy[pch]; if (p->vchan == NULL && !list_empty(>chan_pending)) { @@ -326,7 +327,7 @@ static void k3_dma_tasklet(unsigned long arg) } spin_unlock_irq(>lock); - for (pch = 0; pch < d->dma_channels; pch++) { + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { if (pch_alloc & (1 << pch)) { p = >phy[pch]; c = p->vchan; @@ -825,6 +826,8 @@ static int k3_dma_probe(struct platform_device *op) "dma-channels", >dma_channels); of_property_read_u32((>dev)->of_node, "dma-requests", >dma_requests); + of_property_read_u32((>dev)->of_node, + "hisilicon,dma-min-chan", >dma_min_chan); } d->clk = devm_clk_get(>dev, NULL); @@ -848,12 +851,12 @@ static int k3_dma_probe(struct platform_device *op) return -ENOMEM; /* init phy channel */ - d->phy = devm_kcalloc(>dev, - d->dma_channels, sizeof(struct k3_dma_phy), GFP_KERNEL); + d->phy = devm_kcalloc(>dev, (d->dma_channels - d->dma_min_chan), + sizeof(struct k3_dma_phy), GFP_KERNEL); if (d->phy == NULL) return -ENOMEM; - for (i = 0; i < d->dma_channels; i++) { + for (i = d->dma_min_chan; i < d->dma_channels; i++) { struct k3_dma_phy *p = >phy[i]; p->idx = i; -- 2.17.1
[PATCH v2 3/4] arm64: dts: hi3660: update property name hisilicon,dma-min-chan
Update property name dma-min-chan to "hisilicon,dma-min-chan" Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 8d477dcbfa58..0cec26976eb6 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -537,7 +537,7 @@ #dma-cells = <1>; dma-channels = <16>; dma-requests = <32>; - dma-min-chan = <1>; + hisilicon,dma-min-chan = <1>; interrupts = ; clocks = <_ctrl HI3660_CLK_GATE_DMAC>; dma-no-cci; -- 2.17.1
[PATCH v2 4/4] k3dma: delete axi_config
From: Li Yu Axi_config controls whether DMA resources can be accessed in non-secure mode, such as linux kernel. The setting is actually done in bootloader stage. This patch removes axi_config from k3dma driver. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- drivers/dma/k3dma.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c index 33efb541acb2..4542e703ec85 100644 --- a/drivers/dma/k3dma.c +++ b/drivers/dma/k3dma.c @@ -52,8 +52,6 @@ #define CX_SRC 0x814 #define CX_DST 0x818 #define CX_CFG 0x81c -#define AXI_CFG0x820 -#define AXI_CFG_DEFAULT0x201201 #define CX_LLI_CHAIN_EN0x2 #define CX_CFG_EN 0x1 @@ -158,7 +156,6 @@ static void k3_dma_set_desc(struct k3_dma_phy *phy, struct k3_desc_hw *hw) writel_relaxed(hw->count, phy->base + CX_CNT0); writel_relaxed(hw->saddr, phy->base + CX_SRC); writel_relaxed(hw->daddr, phy->base + CX_DST); - writel_relaxed(AXI_CFG_DEFAULT, phy->base + AXI_CFG); writel_relaxed(hw->config, phy->base + CX_CFG); } -- 2.17.1
Re: [PATCH 1/3] dt-bindings: k3dma: add optional property dma_min_chan
On Wed, Jul 4, 2018 at 9:14 AM Guodong Xu wrote: > > On Wed, Jul 4, 2018 at 2:54 AM Rob Herring wrote: > > > > On Fri, Jun 22, 2018 at 11:24:14AM +0800, Guodong Xu wrote: > > > From: Li Yu > > > > > > Add optional property dma_min_chan for k3dma. > > > > > > Signed-off-by: Li Yu > > > --- > > > Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ > > > 1 file changed, 6 insertions(+) > > > > > > diff --git a/t b/Documentation/devicetree/bindings/dma/k3dma.txt > > > index 4945aeac4dc4..2fa1370c3173 100644 > > > --- a/Documentation/devicetree/bindings/dma/k3dma.txt > > > +++ b/Documentation/devicetree/bindings/dma/k3dma.txt > > > @@ -12,6 +12,11 @@ Required properties: > > > have specific request line > > > - clocks: clock required > > > > > > +Optional properties: > > > +- dma_min_chan: the minimum number of DMA channel which begin to use > > > + the default value is 0, but in some platform is > > > + configured 1, like hi3660 platform > > > > Can't this be implied by the compatible? > > > > No. "hisilicon,k3-dma-1.0" can work with series of hisilicon kirin > SoC. And each has different reservation of channels for on-chip > coprocessors. > > > If not, needs vendor prefix and don't use '_' in property names. > > > > Sure, thanks. Will change that when design new property. As Vinod > suggested, it makes sense to change this to a mask. > After checking with Kirin SoC design team, I prefer to stay with minimum channel number instead of mask. So, I will change this property to: hisilicon,dma-min-chan -Guodong > > -Guodong > > > Rob
Re: [PATCH 1/3] dt-bindings: k3dma: add optional property dma_min_chan
On Wed, Jul 4, 2018 at 9:14 AM Guodong Xu wrote: > > On Wed, Jul 4, 2018 at 2:54 AM Rob Herring wrote: > > > > On Fri, Jun 22, 2018 at 11:24:14AM +0800, Guodong Xu wrote: > > > From: Li Yu > > > > > > Add optional property dma_min_chan for k3dma. > > > > > > Signed-off-by: Li Yu > > > --- > > > Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ > > > 1 file changed, 6 insertions(+) > > > > > > diff --git a/t b/Documentation/devicetree/bindings/dma/k3dma.txt > > > index 4945aeac4dc4..2fa1370c3173 100644 > > > --- a/Documentation/devicetree/bindings/dma/k3dma.txt > > > +++ b/Documentation/devicetree/bindings/dma/k3dma.txt > > > @@ -12,6 +12,11 @@ Required properties: > > > have specific request line > > > - clocks: clock required > > > > > > +Optional properties: > > > +- dma_min_chan: the minimum number of DMA channel which begin to use > > > + the default value is 0, but in some platform is > > > + configured 1, like hi3660 platform > > > > Can't this be implied by the compatible? > > > > No. "hisilicon,k3-dma-1.0" can work with series of hisilicon kirin > SoC. And each has different reservation of channels for on-chip > coprocessors. > > > If not, needs vendor prefix and don't use '_' in property names. > > > > Sure, thanks. Will change that when design new property. As Vinod > suggested, it makes sense to change this to a mask. > After checking with Kirin SoC design team, I prefer to stay with minimum channel number instead of mask. So, I will change this property to: hisilicon,dma-min-chan -Guodong > > -Guodong > > > Rob
Re: [PATCH 2/3] k3dma: add support to reserved minimum channels
On Thu, Jun 28, 2018 at 2:02 PM Vinod wrote: > > On 22-06-18, 11:24, Guodong Xu wrote: > > From: Li Yu > > > > On k3 series of SoC, DMA controller reserves some channels for > > other on-chip coprocessors. By adding support to dma_min_chan, kernel > > will not be able to use these reserved channels. > > > > One example is on Hi3660 platform, channel 0 is reserved to lpm3. > > > > Please also refer to Documentation/devicetree/bindings/dma/k3dma.txt > > and if some other platform has channel X marked for co-processor, maybe > a last channel or something in middle, how will this work then? > Hi, Vinod Sorry for delayed response. We checked with Kirin hardware design team, so far their design strategy is all Kirin SoC series reserve only from minimum side, saying channel 0, then 1, then 2. That impacts the current SoC in upstreaming, Kirin960 (Hi3660), and next versions in Kirin SoC, Kirin970 and 980, which may hit upstream later. > I am thinking this should be a mask, rather than min. > So, since this driver k3dma.c is only used by Kirin SoC DMA controllers, I would prefer to keep the current design dma_min_chan unchanged. What do you think? -Guodong > > > > Signed-off-by: Li Yu > > Signed-off-by: Guodong Xu > > --- > > drivers/dma/k3dma.c | 13 - > > 1 file changed, 8 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c > > index fa31cccbe04f..13cec12742e3 100644 > > --- a/drivers/dma/k3dma.c > > +++ b/drivers/dma/k3dma.c > > @@ -113,6 +113,7 @@ struct k3_dma_dev { > > struct dma_pool *pool; > > u32 dma_channels; > > u32 dma_requests; > > + u32 dma_min_chan; > > unsigned intirq; > > }; > > > > @@ -309,7 +310,7 @@ static void k3_dma_tasklet(unsigned long arg) > > > > /* check new channel request in d->chan_pending */ > > spin_lock_irq(>lock); > > - for (pch = 0; pch < d->dma_channels; pch++) { > > + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { > > p = >phy[pch]; > > > > if (p->vchan == NULL && !list_empty(>chan_pending)) { > > @@ -326,7 +327,7 @@ static void k3_dma_tasklet(unsigned long arg) > > } > > spin_unlock_irq(>lock); > > > > - for (pch = 0; pch < d->dma_channels; pch++) { > > + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { > > if (pch_alloc & (1 << pch)) { > > p = >phy[pch]; > > c = p->vchan; > > @@ -825,6 +826,8 @@ static int k3_dma_probe(struct platform_device *op) > > "dma-channels", >dma_channels); > > of_property_read_u32((>dev)->of_node, > > "dma-requests", >dma_requests); > > + of_property_read_u32((>dev)->of_node, > > + "dma-min-chan", >dma_min_chan); > > } > > > > d->clk = devm_clk_get(>dev, NULL); > > @@ -848,12 +851,12 @@ static int k3_dma_probe(struct platform_device *op) > > return -ENOMEM; > > > > /* init phy channel */ > > - d->phy = devm_kcalloc(>dev, > > - d->dma_channels, sizeof(struct k3_dma_phy), GFP_KERNEL); > > + d->phy = devm_kcalloc(>dev, (d->dma_channels - d->dma_min_chan), > > + sizeof(struct k3_dma_phy), GFP_KERNEL); > > if (d->phy == NULL) > > return -ENOMEM; > > > > - for (i = 0; i < d->dma_channels; i++) { > > + for (i = d->dma_min_chan; i < d->dma_channels; i++) { > > struct k3_dma_phy *p = >phy[i]; > > > > p->idx = i; > > -- > > 2.17.1 > > -- > ~Vinod
Re: [PATCH 2/3] k3dma: add support to reserved minimum channels
On Thu, Jun 28, 2018 at 2:02 PM Vinod wrote: > > On 22-06-18, 11:24, Guodong Xu wrote: > > From: Li Yu > > > > On k3 series of SoC, DMA controller reserves some channels for > > other on-chip coprocessors. By adding support to dma_min_chan, kernel > > will not be able to use these reserved channels. > > > > One example is on Hi3660 platform, channel 0 is reserved to lpm3. > > > > Please also refer to Documentation/devicetree/bindings/dma/k3dma.txt > > and if some other platform has channel X marked for co-processor, maybe > a last channel or something in middle, how will this work then? > Hi, Vinod Sorry for delayed response. We checked with Kirin hardware design team, so far their design strategy is all Kirin SoC series reserve only from minimum side, saying channel 0, then 1, then 2. That impacts the current SoC in upstreaming, Kirin960 (Hi3660), and next versions in Kirin SoC, Kirin970 and 980, which may hit upstream later. > I am thinking this should be a mask, rather than min. > So, since this driver k3dma.c is only used by Kirin SoC DMA controllers, I would prefer to keep the current design dma_min_chan unchanged. What do you think? -Guodong > > > > Signed-off-by: Li Yu > > Signed-off-by: Guodong Xu > > --- > > drivers/dma/k3dma.c | 13 - > > 1 file changed, 8 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c > > index fa31cccbe04f..13cec12742e3 100644 > > --- a/drivers/dma/k3dma.c > > +++ b/drivers/dma/k3dma.c > > @@ -113,6 +113,7 @@ struct k3_dma_dev { > > struct dma_pool *pool; > > u32 dma_channels; > > u32 dma_requests; > > + u32 dma_min_chan; > > unsigned intirq; > > }; > > > > @@ -309,7 +310,7 @@ static void k3_dma_tasklet(unsigned long arg) > > > > /* check new channel request in d->chan_pending */ > > spin_lock_irq(>lock); > > - for (pch = 0; pch < d->dma_channels; pch++) { > > + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { > > p = >phy[pch]; > > > > if (p->vchan == NULL && !list_empty(>chan_pending)) { > > @@ -326,7 +327,7 @@ static void k3_dma_tasklet(unsigned long arg) > > } > > spin_unlock_irq(>lock); > > > > - for (pch = 0; pch < d->dma_channels; pch++) { > > + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { > > if (pch_alloc & (1 << pch)) { > > p = >phy[pch]; > > c = p->vchan; > > @@ -825,6 +826,8 @@ static int k3_dma_probe(struct platform_device *op) > > "dma-channels", >dma_channels); > > of_property_read_u32((>dev)->of_node, > > "dma-requests", >dma_requests); > > + of_property_read_u32((>dev)->of_node, > > + "dma-min-chan", >dma_min_chan); > > } > > > > d->clk = devm_clk_get(>dev, NULL); > > @@ -848,12 +851,12 @@ static int k3_dma_probe(struct platform_device *op) > > return -ENOMEM; > > > > /* init phy channel */ > > - d->phy = devm_kcalloc(>dev, > > - d->dma_channels, sizeof(struct k3_dma_phy), GFP_KERNEL); > > + d->phy = devm_kcalloc(>dev, (d->dma_channels - d->dma_min_chan), > > + sizeof(struct k3_dma_phy), GFP_KERNEL); > > if (d->phy == NULL) > > return -ENOMEM; > > > > - for (i = 0; i < d->dma_channels; i++) { > > + for (i = d->dma_min_chan; i < d->dma_channels; i++) { > > struct k3_dma_phy *p = >phy[i]; > > > > p->idx = i; > > -- > > 2.17.1 > > -- > ~Vinod
Re: [PATCH 1/3] dt-bindings: k3dma: add optional property dma_min_chan
On Wed, Jul 4, 2018 at 2:54 AM Rob Herring wrote: > > On Fri, Jun 22, 2018 at 11:24:14AM +0800, Guodong Xu wrote: > > From: Li Yu > > > > Add optional property dma_min_chan for k3dma. > > > > Signed-off-by: Li Yu > > --- > > Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/t b/Documentation/devicetree/bindings/dma/k3dma.txt > > index 4945aeac4dc4..2fa1370c3173 100644 > > --- a/Documentation/devicetree/bindings/dma/k3dma.txt > > +++ b/Documentation/devicetree/bindings/dma/k3dma.txt > > @@ -12,6 +12,11 @@ Required properties: > > have specific request line > > - clocks: clock required > > > > +Optional properties: > > +- dma_min_chan: the minimum number of DMA channel which begin to use > > + the default value is 0, but in some platform is > > + configured 1, like hi3660 platform > > Can't this be implied by the compatible? > No. "hisilicon,k3-dma-1.0" can work with series of hisilicon kirin SoC. And each has different reservation of channels for on-chip coprocessors. > If not, needs vendor prefix and don't use '_' in property names. > Sure, thanks. Will change that when design new property. As Vinod suggested, it makes sense to change this to a mask. -Guodong > Rob
Re: [PATCH 1/3] dt-bindings: k3dma: add optional property dma_min_chan
On Wed, Jul 4, 2018 at 2:54 AM Rob Herring wrote: > > On Fri, Jun 22, 2018 at 11:24:14AM +0800, Guodong Xu wrote: > > From: Li Yu > > > > Add optional property dma_min_chan for k3dma. > > > > Signed-off-by: Li Yu > > --- > > Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/t b/Documentation/devicetree/bindings/dma/k3dma.txt > > index 4945aeac4dc4..2fa1370c3173 100644 > > --- a/Documentation/devicetree/bindings/dma/k3dma.txt > > +++ b/Documentation/devicetree/bindings/dma/k3dma.txt > > @@ -12,6 +12,11 @@ Required properties: > > have specific request line > > - clocks: clock required > > > > +Optional properties: > > +- dma_min_chan: the minimum number of DMA channel which begin to use > > + the default value is 0, but in some platform is > > + configured 1, like hi3660 platform > > Can't this be implied by the compatible? > No. "hisilicon,k3-dma-1.0" can work with series of hisilicon kirin SoC. And each has different reservation of channels for on-chip coprocessors. > If not, needs vendor prefix and don't use '_' in property names. > Sure, thanks. Will change that when design new property. As Vinod suggested, it makes sense to change this to a mask. -Guodong > Rob
[PATCH 0/3] k3dma: add support to reserved channels
This patchset fixes bug people found on hikey960 when allocating DMA channels to peripherals such as SPI. It fails because the channel is reserved, and is not accessible by kernel. Patch 1 and 2 add support to reserved channels for K3 DMA. Patch 3 includes a removal of axi_config who controls DMA secure/non-secure access permission but is actually set in early stage by bootloader. Li Yu (3): dt-bindings: k3dma: add optional property dma_min_chan k3dma: add support to reserved minimum channels k3dma: delete axi_config Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ drivers/dma/k3dma.c | 16 2 files changed, 14 insertions(+), 8 deletions(-) -- 2.17.1
[PATCH 0/3] k3dma: add support to reserved channels
This patchset fixes bug people found on hikey960 when allocating DMA channels to peripherals such as SPI. It fails because the channel is reserved, and is not accessible by kernel. Patch 1 and 2 add support to reserved channels for K3 DMA. Patch 3 includes a removal of axi_config who controls DMA secure/non-secure access permission but is actually set in early stage by bootloader. Li Yu (3): dt-bindings: k3dma: add optional property dma_min_chan k3dma: add support to reserved minimum channels k3dma: delete axi_config Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ drivers/dma/k3dma.c | 16 2 files changed, 14 insertions(+), 8 deletions(-) -- 2.17.1
[PATCH 3/3] k3dma: delete axi_config
From: Li Yu Axi_config controls whether DMA resources can be accessed in non-secure mode, such as linux kernel. The setting is actually done in bootloader stage. This patch removes axi_config from k3dma driver. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- drivers/dma/k3dma.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c index 13cec12742e3..ddd7d1e054c0 100644 --- a/drivers/dma/k3dma.c +++ b/drivers/dma/k3dma.c @@ -52,8 +52,6 @@ #define CX_SRC 0x814 #define CX_DST 0x818 #define CX_CFG 0x81c -#define AXI_CFG0x820 -#define AXI_CFG_DEFAULT0x201201 #define CX_LLI_CHAIN_EN0x2 #define CX_CFG_EN 0x1 @@ -158,7 +156,6 @@ static void k3_dma_set_desc(struct k3_dma_phy *phy, struct k3_desc_hw *hw) writel_relaxed(hw->count, phy->base + CX_CNT0); writel_relaxed(hw->saddr, phy->base + CX_SRC); writel_relaxed(hw->daddr, phy->base + CX_DST); - writel_relaxed(AXI_CFG_DEFAULT, phy->base + AXI_CFG); writel_relaxed(hw->config, phy->base + CX_CFG); } -- 2.17.1
[PATCH 3/3] k3dma: delete axi_config
From: Li Yu Axi_config controls whether DMA resources can be accessed in non-secure mode, such as linux kernel. The setting is actually done in bootloader stage. This patch removes axi_config from k3dma driver. Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- drivers/dma/k3dma.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c index 13cec12742e3..ddd7d1e054c0 100644 --- a/drivers/dma/k3dma.c +++ b/drivers/dma/k3dma.c @@ -52,8 +52,6 @@ #define CX_SRC 0x814 #define CX_DST 0x818 #define CX_CFG 0x81c -#define AXI_CFG0x820 -#define AXI_CFG_DEFAULT0x201201 #define CX_LLI_CHAIN_EN0x2 #define CX_CFG_EN 0x1 @@ -158,7 +156,6 @@ static void k3_dma_set_desc(struct k3_dma_phy *phy, struct k3_desc_hw *hw) writel_relaxed(hw->count, phy->base + CX_CNT0); writel_relaxed(hw->saddr, phy->base + CX_SRC); writel_relaxed(hw->daddr, phy->base + CX_DST); - writel_relaxed(AXI_CFG_DEFAULT, phy->base + AXI_CFG); writel_relaxed(hw->config, phy->base + CX_CFG); } -- 2.17.1
[PATCH 2/3] k3dma: add support to reserved minimum channels
From: Li Yu On k3 series of SoC, DMA controller reserves some channels for other on-chip coprocessors. By adding support to dma_min_chan, kernel will not be able to use these reserved channels. One example is on Hi3660 platform, channel 0 is reserved to lpm3. Please also refer to Documentation/devicetree/bindings/dma/k3dma.txt Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- drivers/dma/k3dma.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c index fa31cccbe04f..13cec12742e3 100644 --- a/drivers/dma/k3dma.c +++ b/drivers/dma/k3dma.c @@ -113,6 +113,7 @@ struct k3_dma_dev { struct dma_pool *pool; u32 dma_channels; u32 dma_requests; + u32 dma_min_chan; unsigned intirq; }; @@ -309,7 +310,7 @@ static void k3_dma_tasklet(unsigned long arg) /* check new channel request in d->chan_pending */ spin_lock_irq(>lock); - for (pch = 0; pch < d->dma_channels; pch++) { + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { p = >phy[pch]; if (p->vchan == NULL && !list_empty(>chan_pending)) { @@ -326,7 +327,7 @@ static void k3_dma_tasklet(unsigned long arg) } spin_unlock_irq(>lock); - for (pch = 0; pch < d->dma_channels; pch++) { + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { if (pch_alloc & (1 << pch)) { p = >phy[pch]; c = p->vchan; @@ -825,6 +826,8 @@ static int k3_dma_probe(struct platform_device *op) "dma-channels", >dma_channels); of_property_read_u32((>dev)->of_node, "dma-requests", >dma_requests); + of_property_read_u32((>dev)->of_node, + "dma-min-chan", >dma_min_chan); } d->clk = devm_clk_get(>dev, NULL); @@ -848,12 +851,12 @@ static int k3_dma_probe(struct platform_device *op) return -ENOMEM; /* init phy channel */ - d->phy = devm_kcalloc(>dev, - d->dma_channels, sizeof(struct k3_dma_phy), GFP_KERNEL); + d->phy = devm_kcalloc(>dev, (d->dma_channels - d->dma_min_chan), + sizeof(struct k3_dma_phy), GFP_KERNEL); if (d->phy == NULL) return -ENOMEM; - for (i = 0; i < d->dma_channels; i++) { + for (i = d->dma_min_chan; i < d->dma_channels; i++) { struct k3_dma_phy *p = >phy[i]; p->idx = i; -- 2.17.1
[PATCH 1/3] dt-bindings: k3dma: add optional property dma_min_chan
From: Li Yu Add optional property dma_min_chan for k3dma. Signed-off-by: Li Yu --- Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/k3dma.txt b/Documentation/devicetree/bindings/dma/k3dma.txt index 4945aeac4dc4..2fa1370c3173 100644 --- a/Documentation/devicetree/bindings/dma/k3dma.txt +++ b/Documentation/devicetree/bindings/dma/k3dma.txt @@ -12,6 +12,11 @@ Required properties: have specific request line - clocks: clock required +Optional properties: +- dma_min_chan: the minimum number of DMA channel which begin to use + the default value is 0, but in some platform is + configured 1, like hi3660 platform + Example: Controller: @@ -21,6 +26,7 @@ Controller: #dma-cells = <1>; dma-channels = <16>; dma-requests = <27>; + dma_min_chan = <1>; interrupts = <0 12 4>; clocks = <>; }; -- 2.17.1
[PATCH 2/3] k3dma: add support to reserved minimum channels
From: Li Yu On k3 series of SoC, DMA controller reserves some channels for other on-chip coprocessors. By adding support to dma_min_chan, kernel will not be able to use these reserved channels. One example is on Hi3660 platform, channel 0 is reserved to lpm3. Please also refer to Documentation/devicetree/bindings/dma/k3dma.txt Signed-off-by: Li Yu Signed-off-by: Guodong Xu --- drivers/dma/k3dma.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c index fa31cccbe04f..13cec12742e3 100644 --- a/drivers/dma/k3dma.c +++ b/drivers/dma/k3dma.c @@ -113,6 +113,7 @@ struct k3_dma_dev { struct dma_pool *pool; u32 dma_channels; u32 dma_requests; + u32 dma_min_chan; unsigned intirq; }; @@ -309,7 +310,7 @@ static void k3_dma_tasklet(unsigned long arg) /* check new channel request in d->chan_pending */ spin_lock_irq(>lock); - for (pch = 0; pch < d->dma_channels; pch++) { + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { p = >phy[pch]; if (p->vchan == NULL && !list_empty(>chan_pending)) { @@ -326,7 +327,7 @@ static void k3_dma_tasklet(unsigned long arg) } spin_unlock_irq(>lock); - for (pch = 0; pch < d->dma_channels; pch++) { + for (pch = d->dma_min_chan; pch < d->dma_channels; pch++) { if (pch_alloc & (1 << pch)) { p = >phy[pch]; c = p->vchan; @@ -825,6 +826,8 @@ static int k3_dma_probe(struct platform_device *op) "dma-channels", >dma_channels); of_property_read_u32((>dev)->of_node, "dma-requests", >dma_requests); + of_property_read_u32((>dev)->of_node, + "dma-min-chan", >dma_min_chan); } d->clk = devm_clk_get(>dev, NULL); @@ -848,12 +851,12 @@ static int k3_dma_probe(struct platform_device *op) return -ENOMEM; /* init phy channel */ - d->phy = devm_kcalloc(>dev, - d->dma_channels, sizeof(struct k3_dma_phy), GFP_KERNEL); + d->phy = devm_kcalloc(>dev, (d->dma_channels - d->dma_min_chan), + sizeof(struct k3_dma_phy), GFP_KERNEL); if (d->phy == NULL) return -ENOMEM; - for (i = 0; i < d->dma_channels; i++) { + for (i = d->dma_min_chan; i < d->dma_channels; i++) { struct k3_dma_phy *p = >phy[i]; p->idx = i; -- 2.17.1
[PATCH 1/3] dt-bindings: k3dma: add optional property dma_min_chan
From: Li Yu Add optional property dma_min_chan for k3dma. Signed-off-by: Li Yu --- Documentation/devicetree/bindings/dma/k3dma.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/k3dma.txt b/Documentation/devicetree/bindings/dma/k3dma.txt index 4945aeac4dc4..2fa1370c3173 100644 --- a/Documentation/devicetree/bindings/dma/k3dma.txt +++ b/Documentation/devicetree/bindings/dma/k3dma.txt @@ -12,6 +12,11 @@ Required properties: have specific request line - clocks: clock required +Optional properties: +- dma_min_chan: the minimum number of DMA channel which begin to use + the default value is 0, but in some platform is + configured 1, like hi3660 platform + Example: Controller: @@ -21,6 +26,7 @@ Controller: #dma-cells = <1>; dma-channels = <16>; dma-requests = <27>; + dma_min_chan = <1>; interrupts = <0 12 4>; clocks = <>; }; -- 2.17.1
Re: [PATCH 4/4] arm64: dts: hisilicon: hi3660-hikey960: Allow USR4 LED to notify kernel panic
On Mon, Oct 23, 2017 at 12:43 PM, Amit Kucheria <amit.kuche...@linaro.org> wrote: > On Thu, Oct 19, 2017 at 5:30 PM, Guodong Xu <guodong...@linaro.org> wrote: >> >> >> On Thu, Oct 19, 2017 at 4:57 AM, Amit Kucheria <amit.kuche...@linaro.org> >> wrote: >>> >>> Blink the LED on a kernel panic. >>> >>> Signed-off-by: Amit Kucheria <amit.kuche...@linaro.org> >>> --- >>> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> index fd4705c..febbcb5 100644 >>> --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> @@ -108,6 +108,7 @@ >>> label = "user_led4"; >>> /* gpio_190_user_led4 */ >>> gpios = < 6 0>; >>> + panic-indicator; >> >> >> Looks good to me. > > Can I take that as an Ack? How about the Hikey960 patch? > Acked-by: Guodong Xu <guodong...@linaro.org> -Guodong >> >> >>> >>> linux,default-trigger = "cpu0"; >>> }; >>> >>> -- >>> 2.7.4 >>> >>
Re: [PATCH 4/4] arm64: dts: hisilicon: hi3660-hikey960: Allow USR4 LED to notify kernel panic
On Mon, Oct 23, 2017 at 12:43 PM, Amit Kucheria wrote: > On Thu, Oct 19, 2017 at 5:30 PM, Guodong Xu wrote: >> >> >> On Thu, Oct 19, 2017 at 4:57 AM, Amit Kucheria >> wrote: >>> >>> Blink the LED on a kernel panic. >>> >>> Signed-off-by: Amit Kucheria >>> --- >>> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> index fd4705c..febbcb5 100644 >>> --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts >>> @@ -108,6 +108,7 @@ >>> label = "user_led4"; >>> /* gpio_190_user_led4 */ >>> gpios = < 6 0>; >>> + panic-indicator; >> >> >> Looks good to me. > > Can I take that as an Ack? How about the Hikey960 patch? > Acked-by: Guodong Xu -Guodong >> >> >>> >>> linux,default-trigger = "cpu0"; >>> }; >>> >>> -- >>> 2.7.4 >>> >>
[PATCH v3 10/10] arm64: dts: hi3660: enable watchdog
From: Leo Yan <leo@linaro.org> This patch is to add watchdog binding for Hi3660 on Hikey960 board. Cc: Guodong Xu <guodong...@linaro.org> Cc: Zhong Kaihua <zhongkai...@huawei.com> Signed-off-by: Leo Yan <leo@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 545d435..b7a90d6 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -962,5 +962,21 @@ _cfg_func>; status = "disabled"; }; + + watchdog0: watchdog@e8a06000 { + compatible = "arm,sp805-wdt", "arm,primecell"; + reg = <0x0 0xe8a06000 0x0 0x1000>; + interrupts = ; + clocks = <_ctrl HI3660_OSC32K>; + clock-names = "apb_pclk"; + }; + + watchdog1: watchdog@e8a07000 { + compatible = "arm,sp805-wdt", "arm,primecell"; + reg = <0x0 0xe8a07000 0x0 0x1000>; + interrupts = ; + clocks = <_ctrl HI3660_OSC32K>; + clock-names = "apb_pclk"; + }; }; }; -- 2.10.2
[PATCH v3 08/10] arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps
Update bluetooth UART max-speed to 3Mbps Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 7770ec7..fd4705c 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -230,7 +230,7 @@ bluetooth { compatible = "ti,wl1837-st"; enable-gpios = < 6 GPIO_ACTIVE_HIGH>; - max-speed = <921600>; + max-speed = <300>; }; }; -- 2.10.2
[PATCH v3 10/10] arm64: dts: hi3660: enable watchdog
From: Leo Yan This patch is to add watchdog binding for Hi3660 on Hikey960 board. Cc: Guodong Xu Cc: Zhong Kaihua Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 545d435..b7a90d6 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -962,5 +962,21 @@ _cfg_func>; status = "disabled"; }; + + watchdog0: watchdog@e8a06000 { + compatible = "arm,sp805-wdt", "arm,primecell"; + reg = <0x0 0xe8a06000 0x0 0x1000>; + interrupts = ; + clocks = <_ctrl HI3660_OSC32K>; + clock-names = "apb_pclk"; + }; + + watchdog1: watchdog@e8a07000 { + compatible = "arm,sp805-wdt", "arm,primecell"; + reg = <0x0 0xe8a07000 0x0 0x1000>; + interrupts = ; + clocks = <_ctrl HI3660_OSC32K>; + clock-names = "apb_pclk"; + }; }; }; -- 2.10.2
[PATCH v3 08/10] arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps
Update bluetooth UART max-speed to 3Mbps Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 7770ec7..fd4705c 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -230,7 +230,7 @@ bluetooth { compatible = "ti,wl1837-st"; enable-gpios = < 6 GPIO_ACTIVE_HIGH>; - max-speed = <921600>; + max-speed = <300>; }; }; -- 2.10.2
[PATCH v3 09/10] arm64: dts: hi3660: add bindings for DMA
From: Wang Ruyi <wangr...@huawei.com> Add bindings for DMA. Signed-off-by: Wang Ruyi <wangr...@huawei.com> Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 41841f7..545d435 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -436,6 +436,19 @@ status = "disabled"; }; + dma0: dma@fdf3 { + compatible = "hisilicon,k3-dma-1.0"; + reg = <0x0 0xfdf3 0x0 0x1000>; + #dma-cells = <1>; + dma-channels = <16>; + dma-requests = <32>; + dma-min-chan = <1>; + interrupts = ; + clocks = <_ctrl HI3660_CLK_GATE_DMAC>; + dma-no-cci; + dma-type = "hi3660_dma"; + }; + rtc0: rtc@fff04000 { compatible = "arm,pl031", "arm,primecell"; reg = <0x0 0Xfff04000 0x0 0x1000>; -- 2.10.2
[PATCH v3 09/10] arm64: dts: hi3660: add bindings for DMA
From: Wang Ruyi Add bindings for DMA. Signed-off-by: Wang Ruyi Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 41841f7..545d435 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -436,6 +436,19 @@ status = "disabled"; }; + dma0: dma@fdf3 { + compatible = "hisilicon,k3-dma-1.0"; + reg = <0x0 0xfdf3 0x0 0x1000>; + #dma-cells = <1>; + dma-channels = <16>; + dma-requests = <32>; + dma-min-chan = <1>; + interrupts = ; + clocks = <_ctrl HI3660_CLK_GATE_DMAC>; + dma-no-cci; + dma-type = "hi3660_dma"; + }; + rtc0: rtc@fff04000 { compatible = "arm,pl031", "arm,primecell"; reg = <0x0 0Xfff04000 0x0 0x1000>; -- 2.10.2
[PATCH v3 05/10] arm64: dts: hikey960: Add support for syscon-reboot-mode
Add support to hikey960 dts for the syscon-reboot-mode driver. Cc: John Stultz <john.stu...@linaro.org> Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index b96d865..ce5e874 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -39,6 +39,20 @@ reg = <0x0 0x0 0x0 0x0>; }; + reboot-mode-syscon@3210 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0x3210 0x0 0x1000>; + + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x0>; + + mode-normal = <0x77665501>; + mode-bootloader = <0x77665500>; + mode-recovery = <0x77665502>; + }; + }; + keys { compatible = "gpio-keys"; pinctrl-names = "default"; -- 2.10.2
[PATCH v3 04/10] arm64: dts: hikey960: Add optee node
From: Victor ChongThis patch adds op-tee node for hikey960 Signed-off-by: Victor Chong --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 6609b0f..b96d865 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -159,6 +159,13 @@ startup-delay-us = <7>; enable-active-high; }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; }; { -- 2.10.2
[PATCH v3 04/10] arm64: dts: hikey960: Add optee node
From: Victor Chong This patch adds op-tee node for hikey960 Signed-off-by: Victor Chong --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 6609b0f..b96d865 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -159,6 +159,13 @@ startup-delay-us = <7>; enable-active-high; }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; }; { -- 2.10.2
[PATCH v3 05/10] arm64: dts: hikey960: Add support for syscon-reboot-mode
Add support to hikey960 dts for the syscon-reboot-mode driver. Cc: John Stultz Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index b96d865..ce5e874 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -39,6 +39,20 @@ reg = <0x0 0x0 0x0 0x0>; }; + reboot-mode-syscon@3210 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0x3210 0x0 0x1000>; + + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x0>; + + mode-normal = <0x77665501>; + mode-bootloader = <0x77665500>; + mode-recovery = <0x77665502>; + }; + }; + keys { compatible = "gpio-keys"; pinctrl-names = "default"; -- 2.10.2
[PATCH v3 07/10] arm64: dts: hi3660: Reset the mmc hosts
Add reset-names = "reset" into mmc nodes. Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 5fd5686..41841f7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -909,6 +909,7 @@ clock-names = "ciu", "biu"; clock-frequency = <320>; resets = <_rst 0x94 18>; + reset-names = "reset"; cd-gpios = < 3 0>; hisilicon,peripheral-syscon = <>; pinctrl-names = "default"; @@ -938,6 +939,7 @@ <_ctrl HI3660_HCLK_GATE_SDIO0>; clock-names = "ciu", "biu"; resets = <_rst 0x94 20>; + reset-names = "reset"; card-detect-delay = <200>; supports-highspeed; keep-power-in-suspend; -- 2.10.2
[PATCH v3 07/10] arm64: dts: hi3660: Reset the mmc hosts
Add reset-names = "reset" into mmc nodes. Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 5fd5686..41841f7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -909,6 +909,7 @@ clock-names = "ciu", "biu"; clock-frequency = <320>; resets = <_rst 0x94 18>; + reset-names = "reset"; cd-gpios = < 3 0>; hisilicon,peripheral-syscon = <>; pinctrl-names = "default"; @@ -938,6 +939,7 @@ <_ctrl HI3660_HCLK_GATE_SDIO0>; clock-names = "ciu", "biu"; resets = <_rst 0x94 20>; + reset-names = "reset"; card-detect-delay = <200>; supports-highspeed; keep-power-in-suspend; -- 2.10.2
[PATCH v3 06/10] arm64: dts: hikey960: Add pstore support
This patch reserves some memory in the DTS and sets up a pstore device tree node to enable pstore support on HiKey960. Cc: John Stultz <john.stu...@linaro.org> Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index ce5e874..7770ec7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -39,6 +39,20 @@ reg = <0x0 0x0 0x0 0x0>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@3200 { + compatible = "ramoops"; + reg = <0x0 0x3200 0x0 0x0010>; + record-size = <0x0002>; + console-size= <0x0002>; + ftrace-size = <0x0002>; + }; + }; + reboot-mode-syscon@3210 { compatible = "syscon", "simple-mfd"; reg = <0x0 0x3210 0x0 0x1000>; -- 2.10.2
[PATCH v3 06/10] arm64: dts: hikey960: Add pstore support
This patch reserves some memory in the DTS and sets up a pstore device tree node to enable pstore support on HiKey960. Cc: John Stultz Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index ce5e874..7770ec7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -39,6 +39,20 @@ reg = <0x0 0x0 0x0 0x0>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@3200 { + compatible = "ramoops"; + reg = <0x0 0x3200 0x0 0x0010>; + record-size = <0x0002>; + console-size= <0x0002>; + ftrace-size = <0x0002>; + }; + }; + reboot-mode-syscon@3210 { compatible = "syscon", "simple-mfd"; reg = <0x0 0x3210 0x0 0x1000>; -- 2.10.2
[PATCH v3 01/10] arm64: dts: hi3660: enable idle states
From: Leo YanThere are two clusters on the Hi3660, the first one is Cortex-A53 based and the other one is Cortex-A73 based. These two clusters have different idle states. Thanks to Daniel Lezcano's recent changes, the generic ARM cpuidle driver can now support several clusters with different idle states, thus supporting the big.Little architecture. In addition to the WFI idle state which is the default shallowest state for all ARM cpus, the Hi3660 supports the following states: - CA53 CPUs: - CPU_SLEEP: CPU power off state - CLUSTER_SLEEP_0: Cluster power off state - CA73 CPUs: - CPU_NAP: CPU retention state - CPU_SLEEP: CPU power off state - CLUSTER_SLEEP_1: Cluster power off state This patch adds the idle states description for the Hi3660 to the device tree. Cc: Kevin Wang Signed-off-by: Leo Yan Acked-by: Daniel Lezcano --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 63 +++ 1 file changed, 63 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index c6a1961..8921310 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -58,6 +58,7 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu1: cpu@1 { @@ -65,6 +66,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu2: cpu@2 { @@ -72,6 +74,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu3: cpu@3 { @@ -79,6 +82,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu4: cpu@100 { @@ -86,6 +90,11 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu5: cpu@101 { @@ -93,6 +102,11 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu6: cpu@102 { @@ -100,6 +114,11 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu7: cpu@103 { @@ -107,6 +126,50 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; + }; + + idle-states { + entry-method = "psci"; + + CPU_NAP: cpu-nap { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x001>; + entry-latency-us = <7>; + exit-latency-us = <2>; + min-residency-us = <15>; + }; + + CPU_SLEEP: cpu-sleep { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x001>; + entry-latency-us = <40>; + exit-latency-us = <70>; + min-residency-us = <3000>; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 {
[PATCH v3 01/10] arm64: dts: hi3660: enable idle states
From: Leo Yan There are two clusters on the Hi3660, the first one is Cortex-A53 based and the other one is Cortex-A73 based. These two clusters have different idle states. Thanks to Daniel Lezcano's recent changes, the generic ARM cpuidle driver can now support several clusters with different idle states, thus supporting the big.Little architecture. In addition to the WFI idle state which is the default shallowest state for all ARM cpus, the Hi3660 supports the following states: - CA53 CPUs: - CPU_SLEEP: CPU power off state - CLUSTER_SLEEP_0: Cluster power off state - CA73 CPUs: - CPU_NAP: CPU retention state - CPU_SLEEP: CPU power off state - CLUSTER_SLEEP_1: Cluster power off state This patch adds the idle states description for the Hi3660 to the device tree. Cc: Kevin Wang Signed-off-by: Leo Yan Acked-by: Daniel Lezcano --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 63 +++ 1 file changed, 63 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index c6a1961..8921310 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -58,6 +58,7 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu1: cpu@1 { @@ -65,6 +66,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu2: cpu@2 { @@ -72,6 +74,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu3: cpu@3 { @@ -79,6 +82,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu4: cpu@100 { @@ -86,6 +90,11 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu5: cpu@101 { @@ -93,6 +102,11 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu6: cpu@102 { @@ -100,6 +114,11 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu7: cpu@103 { @@ -107,6 +126,50 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; + }; + + idle-states { + entry-method = "psci"; + + CPU_NAP: cpu-nap { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x001>; + entry-latency-us = <7>; + exit-latency-us = <2>; + min-residency-us = <15>; + }; + + CPU_SLEEP: cpu-sleep { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x001>; + entry-latency-us = <40>; + exit-latency-us = <70>; + min-residency-us = <3000>; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 { + compatible = "arm,idle-state"; +
[PATCH v3 02/10] arm64: dts: hi3660: add L2 cache topology
From: Leo YanThis patch adds the L2 cache topology on 96boards Hikey960. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 8921310..1cdd03b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -58,6 +58,7 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -66,6 +67,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -74,6 +76,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -82,6 +85,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -90,6 +94,7 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -102,6 +107,7 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -114,6 +120,7 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -126,6 +133,7 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -171,6 +179,14 @@ min-residency-us = <2>; }; }; + + A53_L2: l2-cache0 { + compatible = "cache"; + }; + + A73_L2: l2-cache1 { + compatible = "cache"; + }; }; gic: interrupt-controller@e82b { -- 2.10.2
[PATCH v3 03/10] arm64: dts: hi3660: add pmu dt node for hi3660
From: YiPing XuAdd pmu dt node for hi3660 Signed-off-by: YiPing Xu Signed-off-by: Zhong Kaihua Signed-off-by: Leo Yan Tested-by: Jumana Mundichipparakkal --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 1cdd03b..5fd5686 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -202,6 +202,26 @@ IRQ_TYPE_LEVEL_HIGH)>; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = , +, +, +, +, +, +, +; + interrupt-affinity = <>, +<>, +<>, +<>, +<>, +<>, +<>, +<>; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <>; -- 2.10.2
[PATCH v3 02/10] arm64: dts: hi3660: add L2 cache topology
From: Leo Yan This patch adds the L2 cache topology on 96boards Hikey960. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 8921310..1cdd03b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -58,6 +58,7 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -66,6 +67,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -74,6 +76,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -82,6 +85,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -90,6 +94,7 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -102,6 +107,7 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -114,6 +120,7 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -126,6 +133,7 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -171,6 +179,14 @@ min-residency-us = <2>; }; }; + + A53_L2: l2-cache0 { + compatible = "cache"; + }; + + A73_L2: l2-cache1 { + compatible = "cache"; + }; }; gic: interrupt-controller@e82b { -- 2.10.2
[PATCH v3 03/10] arm64: dts: hi3660: add pmu dt node for hi3660
From: YiPing Xu Add pmu dt node for hi3660 Signed-off-by: YiPing Xu Signed-off-by: Zhong Kaihua Signed-off-by: Leo Yan Tested-by: Jumana Mundichipparakkal --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 1cdd03b..5fd5686 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -202,6 +202,26 @@ IRQ_TYPE_LEVEL_HIGH)>; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = , +, +, +, +, +, +, +; + interrupt-affinity = <>, +<>, +<>, +<>, +<>, +<>, +<>, +<>; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <>; -- 2.10.2
[PATCH v3 00/10] arm64: dts: hi3660: add more device nodes
This patchset adds more device nodes for hi3660 and hikey960, including: - cpu idle states - L2 cache - PMU - OP-TEE - reboot - pstore - DMA - watchdog Patch 7 fixes an issue in mmc nodes, by adding 'reset' Patch 8 change bluetooth uart max-speed to 3Mbps HiKey960 is one of 96boards. For details information about it, please refer to [1]. === Major changes in v3: - update commit message of patch 1, as suggested by Daniel Lezcano - add patch 10 for watchdog bindings Major changes in v2: - add patch 8 to change bluetooth uart max-speed to 3Mbps - add patch 9 for DMA node. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 Guodong Xu (4): arm64: dts: hikey960: Add support for syscon-reboot-mode arm64: dts: hikey960: Add pstore support arm64: dts: hi3660: Reset the mmc hosts arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps Leo Yan (3): arm64: dts: hi3660: enable idle states arm64: dts: hi3660: add L2 cache topology arm64: dts: hi3660: enable watchdog Victor Chong (1): arm64: dts: hikey960: Add optee node Wang Ruyi (1): arm64: dts: hi3660: add bindings for DMA YiPing Xu (1): arm64: dts: hi3660: add pmu dt node for hi3660 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 37 +- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 130 ++ 2 files changed, 166 insertions(+), 1 deletion(-) -- 2.10.2
[PATCH v3 00/10] arm64: dts: hi3660: add more device nodes
This patchset adds more device nodes for hi3660 and hikey960, including: - cpu idle states - L2 cache - PMU - OP-TEE - reboot - pstore - DMA - watchdog Patch 7 fixes an issue in mmc nodes, by adding 'reset' Patch 8 change bluetooth uart max-speed to 3Mbps HiKey960 is one of 96boards. For details information about it, please refer to [1]. === Major changes in v3: - update commit message of patch 1, as suggested by Daniel Lezcano - add patch 10 for watchdog bindings Major changes in v2: - add patch 8 to change bluetooth uart max-speed to 3Mbps - add patch 9 for DMA node. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 Guodong Xu (4): arm64: dts: hikey960: Add support for syscon-reboot-mode arm64: dts: hikey960: Add pstore support arm64: dts: hi3660: Reset the mmc hosts arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps Leo Yan (3): arm64: dts: hi3660: enable idle states arm64: dts: hi3660: add L2 cache topology arm64: dts: hi3660: enable watchdog Victor Chong (1): arm64: dts: hikey960: Add optee node Wang Ruyi (1): arm64: dts: hi3660: add bindings for DMA YiPing Xu (1): arm64: dts: hi3660: add pmu dt node for hi3660 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 37 +- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 130 ++ 2 files changed, 166 insertions(+), 1 deletion(-) -- 2.10.2
[PATCH v2 2/6] arm64: defconfig: enable support hi6421v530 PMIC
Enable configs for hi6421v530 mfd and regulator driver + CONFIG_MFD_HI6421_PMIC=y + CONFIG_REGULATOR_HI6421V530=y Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 4e14c6d..d752beb 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -317,6 +317,7 @@ CONFIG_MFD_CROS_EC=y CONFIG_MFD_CROS_EC_I2C=y CONFIG_MFD_CROS_EC_SPI=y CONFIG_MFD_EXYNOS_LPASS=m +CONFIG_MFD_HI6421_PMIC=y CONFIG_MFD_HI655X_PMIC=y CONFIG_MFD_MAX77620=y CONFIG_MFD_SPMI_PMIC=y @@ -325,6 +326,7 @@ CONFIG_MFD_SEC_CORE=y CONFIG_REGULATOR_FAN53555=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_HI6421V530=y CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_PWM=y -- 2.10.2
[PATCH v2 4/6] arm64: defconfig: enable support for serial port connected device
This patch enables these configs: +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y As example, a bluetooth device connected to UART port can be supported by this. Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index f7081056..99f7e06 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -251,6 +251,8 @@ CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y CONFIG_SERIAL_MVEBU_UART=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y CONFIG_VIRTIO_CONSOLE=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y -- 2.10.2
[PATCH v2 1/6] arm64: defconfig: enable Kirin PCIe
From: Xiaowei Song <songxiao...@hisilicon.com> Enable HiSilicon Kirin series SoCs PCIe controllers Signed-off-by: Guodong Xu <guodong...@linaro.org> Signed-off-by: Xiaowei Song <songxiao...@hisilicon.com> --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b4ca115..4e14c6d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -68,6 +68,7 @@ CONFIG_HOTPLUG_PCI_ACPI=y CONFIG_PCI_LAYERSCAPE=y CONFIG_PCI_HISI=y CONFIG_PCIE_QCOM=y +CONFIG_PCIE_KIRIN=y CONFIG_PCIE_ARMADA_8K=y CONFIG_PCI_AARDVARK=y CONFIG_PCIE_RCAR=y -- 2.10.2
[PATCH v2 2/6] arm64: defconfig: enable support hi6421v530 PMIC
Enable configs for hi6421v530 mfd and regulator driver + CONFIG_MFD_HI6421_PMIC=y + CONFIG_REGULATOR_HI6421V530=y Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 4e14c6d..d752beb 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -317,6 +317,7 @@ CONFIG_MFD_CROS_EC=y CONFIG_MFD_CROS_EC_I2C=y CONFIG_MFD_CROS_EC_SPI=y CONFIG_MFD_EXYNOS_LPASS=m +CONFIG_MFD_HI6421_PMIC=y CONFIG_MFD_HI655X_PMIC=y CONFIG_MFD_MAX77620=y CONFIG_MFD_SPMI_PMIC=y @@ -325,6 +326,7 @@ CONFIG_MFD_SEC_CORE=y CONFIG_REGULATOR_FAN53555=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_HI6421V530=y CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_PWM=y -- 2.10.2
[PATCH v2 4/6] arm64: defconfig: enable support for serial port connected device
This patch enables these configs: +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y As example, a bluetooth device connected to UART port can be supported by this. Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index f7081056..99f7e06 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -251,6 +251,8 @@ CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y CONFIG_SERIAL_MVEBU_UART=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y CONFIG_VIRTIO_CONSOLE=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y -- 2.10.2
[PATCH v2 1/6] arm64: defconfig: enable Kirin PCIe
From: Xiaowei Song Enable HiSilicon Kirin series SoCs PCIe controllers Signed-off-by: Guodong Xu Signed-off-by: Xiaowei Song --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b4ca115..4e14c6d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -68,6 +68,7 @@ CONFIG_HOTPLUG_PCI_ACPI=y CONFIG_PCI_LAYERSCAPE=y CONFIG_PCI_HISI=y CONFIG_PCIE_QCOM=y +CONFIG_PCIE_KIRIN=y CONFIG_PCIE_ARMADA_8K=y CONFIG_PCI_AARDVARK=y CONFIG_PCIE_RCAR=y -- 2.10.2
[PATCH v2 5/6] arm64: defconfig: enable OP-TEE
From: Victor Chong <victor.ch...@linaro.org> This patch enables configs for Trusted Execution Environment (TEE) and OP-TEE. +CONFIG_TEE=y +CONFIG_OPTEE=y Signed-off-by: Victor Chong <victor.ch...@linaro.org> Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 99f7e06..81008e1 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -521,6 +521,8 @@ CONFIG_PHY_XGENE=y CONFIG_PHY_TEGRA_XUSB=y CONFIG_QCOM_L2_PMU=y CONFIG_QCOM_L3_PMU=y +CONFIG_TEE=y +CONFIG_OPTEE=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_EFI_CAPSULE_LOADER=y -- 2.10.2
[PATCH v2 6/6] arm64: defconfig: enable DMA driver for hi3660
From: Wang Ruyienable DMA driver for hi3660. Signed-off-by: Wang Ruyi --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 81008e1..ab085d0 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -457,6 +457,7 @@ CONFIG_RTC_DRV_TEGRA=y CONFIG_RTC_DRV_XGENE=y CONFIG_DMADEVICES=y CONFIG_DMA_BCM2835=m +CONFIG_K3_DMA=y CONFIG_MV_XOR_V2=y CONFIG_PL330_DMA=y CONFIG_TEGRA20_APB_DMA=y -- 2.10.2
[PATCH v2 6/6] arm64: defconfig: enable DMA driver for hi3660
From: Wang Ruyi enable DMA driver for hi3660. Signed-off-by: Wang Ruyi --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 81008e1..ab085d0 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -457,6 +457,7 @@ CONFIG_RTC_DRV_TEGRA=y CONFIG_RTC_DRV_XGENE=y CONFIG_DMADEVICES=y CONFIG_DMA_BCM2835=m +CONFIG_K3_DMA=y CONFIG_MV_XOR_V2=y CONFIG_PL330_DMA=y CONFIG_TEGRA20_APB_DMA=y -- 2.10.2
[PATCH v2 5/6] arm64: defconfig: enable OP-TEE
From: Victor Chong This patch enables configs for Trusted Execution Environment (TEE) and OP-TEE. +CONFIG_TEE=y +CONFIG_OPTEE=y Signed-off-by: Victor Chong Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 99f7e06..81008e1 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -521,6 +521,8 @@ CONFIG_PHY_XGENE=y CONFIG_PHY_TEGRA_XUSB=y CONFIG_QCOM_L2_PMU=y CONFIG_QCOM_L3_PMU=y +CONFIG_TEE=y +CONFIG_OPTEE=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_EFI_CAPSULE_LOADER=y -- 2.10.2
[PATCH v2 3/6] arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE
Enable CONFIG_SYSCON_REBOOT_MODE Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d752beb..f7081056 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -298,6 +298,7 @@ CONFIG_GPIO_MAX77620=y CONFIG_POWER_RESET_MSM=y CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_SYSCON=y +CONFIG_SYSCON_REBOOT_MODE=y CONFIG_BATTERY_BQ27XXX=y CONFIG_SENSORS_ARM_SCPI=y CONFIG_SENSORS_LM90=m -- 2.10.2
[PATCH v2 3/6] arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE
Enable CONFIG_SYSCON_REBOOT_MODE Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d752beb..f7081056 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -298,6 +298,7 @@ CONFIG_GPIO_MAX77620=y CONFIG_POWER_RESET_MSM=y CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_SYSCON=y +CONFIG_SYSCON_REBOOT_MODE=y CONFIG_BATTERY_BQ27XXX=y CONFIG_SENSORS_ARM_SCPI=y CONFIG_SENSORS_LM90=m -- 2.10.2
[PATCH v2 0/6] arm64: defconfig: enable configs for HiKey960
This patchset enables config items in arm64/defconfig for HiKey960. All of them correspond to real functions on HiKey960. Including: - Kirin PCIe - PMIC support, hi6421v530 - syscon reboot mode - serdev bus - OP-TEE - K3 DMA HiKey960 is one of 96boards. For details information about it, please refer to [1]. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 === Major changes in v2: - Add patch 6 to enable K3 DMA Guodong Xu (3): arm64: defconfig: enable support hi6421v530 PMIC arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE arm64: defconfig: enable support for serial port connected device Victor Chong (1): arm64: defconfig: enable OP-TEE Wang Ruyi (1): arm64: defconfig: enable DMA driver for hi3660 Xiaowei Song (1): arm64: defconfig: enable Kirin PCIe arch/arm64/configs/defconfig | 9 + 1 file changed, 9 insertions(+) -- 2.10.2
[PATCH v2 0/6] arm64: defconfig: enable configs for HiKey960
This patchset enables config items in arm64/defconfig for HiKey960. All of them correspond to real functions on HiKey960. Including: - Kirin PCIe - PMIC support, hi6421v530 - syscon reboot mode - serdev bus - OP-TEE - K3 DMA HiKey960 is one of 96boards. For details information about it, please refer to [1]. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 === Major changes in v2: - Add patch 6 to enable K3 DMA Guodong Xu (3): arm64: defconfig: enable support hi6421v530 PMIC arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE arm64: defconfig: enable support for serial port connected device Victor Chong (1): arm64: defconfig: enable OP-TEE Wang Ruyi (1): arm64: defconfig: enable DMA driver for hi3660 Xiaowei Song (1): arm64: defconfig: enable Kirin PCIe arch/arm64/configs/defconfig | 9 + 1 file changed, 9 insertions(+) -- 2.10.2
[PATCH v2 3/9] arm64: dts: hi3660: add pmu dt node for hi3660
From: YiPing XuAdd pmu dt node for hi3660 Signed-off-by: YiPing Xu Signed-off-by: Zhong Kaihua Signed-off-by: Leo Yan Tested-by: Jumana Mundichipparakkal --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 1cdd03b..5fd5686 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -202,6 +202,26 @@ IRQ_TYPE_LEVEL_HIGH)>; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = , +, +, +, +, +, +, +; + interrupt-affinity = <>, +<>, +<>, +<>, +<>, +<>, +<>, +<>; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <>; -- 2.10.2
[PATCH v2 3/9] arm64: dts: hi3660: add pmu dt node for hi3660
From: YiPing Xu Add pmu dt node for hi3660 Signed-off-by: YiPing Xu Signed-off-by: Zhong Kaihua Signed-off-by: Leo Yan Tested-by: Jumana Mundichipparakkal --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 1cdd03b..5fd5686 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -202,6 +202,26 @@ IRQ_TYPE_LEVEL_HIGH)>; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = , +, +, +, +, +, +, +; + interrupt-affinity = <>, +<>, +<>, +<>, +<>, +<>, +<>, +<>; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <>; -- 2.10.2
[PATCH v2 4/9] arm64: dts: hikey960: Add optee node
From: Victor ChongThis patch adds op-tee node for hikey960 Signed-off-by: Victor Chong --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 6609b0f..b96d865 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -159,6 +159,13 @@ startup-delay-us = <7>; enable-active-high; }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; }; { -- 2.10.2
[PATCH v2 4/9] arm64: dts: hikey960: Add optee node
From: Victor Chong This patch adds op-tee node for hikey960 Signed-off-by: Victor Chong --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 6609b0f..b96d865 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -159,6 +159,13 @@ startup-delay-us = <7>; enable-active-high; }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; }; { -- 2.10.2
[PATCH v2 9/9] arm64: dts: hi3660: add bindings for DMA
From: Wang Ruyi <wangr...@huawei.com> Add bindings for DMA. Signed-off-by: Wang Ruyi <wangr...@huawei.com> Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 41841f7..545d435 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -436,6 +436,19 @@ status = "disabled"; }; + dma0: dma@fdf3 { + compatible = "hisilicon,k3-dma-1.0"; + reg = <0x0 0xfdf3 0x0 0x1000>; + #dma-cells = <1>; + dma-channels = <16>; + dma-requests = <32>; + dma-min-chan = <1>; + interrupts = ; + clocks = <_ctrl HI3660_CLK_GATE_DMAC>; + dma-no-cci; + dma-type = "hi3660_dma"; + }; + rtc0: rtc@fff04000 { compatible = "arm,pl031", "arm,primecell"; reg = <0x0 0Xfff04000 0x0 0x1000>; -- 2.10.2
[PATCH v2 9/9] arm64: dts: hi3660: add bindings for DMA
From: Wang Ruyi Add bindings for DMA. Signed-off-by: Wang Ruyi Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 41841f7..545d435 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -436,6 +436,19 @@ status = "disabled"; }; + dma0: dma@fdf3 { + compatible = "hisilicon,k3-dma-1.0"; + reg = <0x0 0xfdf3 0x0 0x1000>; + #dma-cells = <1>; + dma-channels = <16>; + dma-requests = <32>; + dma-min-chan = <1>; + interrupts = ; + clocks = <_ctrl HI3660_CLK_GATE_DMAC>; + dma-no-cci; + dma-type = "hi3660_dma"; + }; + rtc0: rtc@fff04000 { compatible = "arm,pl031", "arm,primecell"; reg = <0x0 0Xfff04000 0x0 0x1000>; -- 2.10.2
[PATCH v2 5/9] arm64: dts: hikey960: Add support for syscon-reboot-mode
Add support to hikey960 dts for the syscon-reboot-mode driver. Cc: John Stultz <john.stu...@linaro.org> Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index b96d865..ce5e874 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -39,6 +39,20 @@ reg = <0x0 0x0 0x0 0x0>; }; + reboot-mode-syscon@3210 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0x3210 0x0 0x1000>; + + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x0>; + + mode-normal = <0x77665501>; + mode-bootloader = <0x77665500>; + mode-recovery = <0x77665502>; + }; + }; + keys { compatible = "gpio-keys"; pinctrl-names = "default"; -- 2.10.2
[PATCH v2 8/9] arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps
Update bluetooth UART max-speed to 3Mbps Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 7770ec7..fd4705c 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -230,7 +230,7 @@ bluetooth { compatible = "ti,wl1837-st"; enable-gpios = < 6 GPIO_ACTIVE_HIGH>; - max-speed = <921600>; + max-speed = <300>; }; }; -- 2.10.2
[PATCH v2 6/9] arm64: dts: hikey960: Add pstore support
This patch reserves some memory in the DTS and sets up a pstore device tree node to enable pstore support on HiKey960. Cc: John Stultz <john.stu...@linaro.org> Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index ce5e874..7770ec7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -39,6 +39,20 @@ reg = <0x0 0x0 0x0 0x0>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@3200 { + compatible = "ramoops"; + reg = <0x0 0x3200 0x0 0x0010>; + record-size = <0x0002>; + console-size= <0x0002>; + ftrace-size = <0x0002>; + }; + }; + reboot-mode-syscon@3210 { compatible = "syscon", "simple-mfd"; reg = <0x0 0x3210 0x0 0x1000>; -- 2.10.2
[PATCH v2 7/9] arm64: dts: hi3660: Reset the mmc hosts
Add reset-names = "reset" into mmc nodes. Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 5fd5686..41841f7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -909,6 +909,7 @@ clock-names = "ciu", "biu"; clock-frequency = <320>; resets = <_rst 0x94 18>; + reset-names = "reset"; cd-gpios = < 3 0>; hisilicon,peripheral-syscon = <>; pinctrl-names = "default"; @@ -938,6 +939,7 @@ <_ctrl HI3660_HCLK_GATE_SDIO0>; clock-names = "ciu", "biu"; resets = <_rst 0x94 20>; + reset-names = "reset"; card-detect-delay = <200>; supports-highspeed; keep-power-in-suspend; -- 2.10.2
[PATCH v2 5/9] arm64: dts: hikey960: Add support for syscon-reboot-mode
Add support to hikey960 dts for the syscon-reboot-mode driver. Cc: John Stultz Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index b96d865..ce5e874 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -39,6 +39,20 @@ reg = <0x0 0x0 0x0 0x0>; }; + reboot-mode-syscon@3210 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0x3210 0x0 0x1000>; + + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x0>; + + mode-normal = <0x77665501>; + mode-bootloader = <0x77665500>; + mode-recovery = <0x77665502>; + }; + }; + keys { compatible = "gpio-keys"; pinctrl-names = "default"; -- 2.10.2
[PATCH v2 8/9] arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps
Update bluetooth UART max-speed to 3Mbps Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 7770ec7..fd4705c 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -230,7 +230,7 @@ bluetooth { compatible = "ti,wl1837-st"; enable-gpios = < 6 GPIO_ACTIVE_HIGH>; - max-speed = <921600>; + max-speed = <300>; }; }; -- 2.10.2
[PATCH v2 6/9] arm64: dts: hikey960: Add pstore support
This patch reserves some memory in the DTS and sets up a pstore device tree node to enable pstore support on HiKey960. Cc: John Stultz Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index ce5e874..7770ec7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -39,6 +39,20 @@ reg = <0x0 0x0 0x0 0x0>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@3200 { + compatible = "ramoops"; + reg = <0x0 0x3200 0x0 0x0010>; + record-size = <0x0002>; + console-size= <0x0002>; + ftrace-size = <0x0002>; + }; + }; + reboot-mode-syscon@3210 { compatible = "syscon", "simple-mfd"; reg = <0x0 0x3210 0x0 0x1000>; -- 2.10.2
[PATCH v2 7/9] arm64: dts: hi3660: Reset the mmc hosts
Add reset-names = "reset" into mmc nodes. Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 5fd5686..41841f7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -909,6 +909,7 @@ clock-names = "ciu", "biu"; clock-frequency = <320>; resets = <_rst 0x94 18>; + reset-names = "reset"; cd-gpios = < 3 0>; hisilicon,peripheral-syscon = <>; pinctrl-names = "default"; @@ -938,6 +939,7 @@ <_ctrl HI3660_HCLK_GATE_SDIO0>; clock-names = "ciu", "biu"; resets = <_rst 0x94 20>; + reset-names = "reset"; card-detect-delay = <200>; supports-highspeed; keep-power-in-suspend; -- 2.10.2
[PATCH v2 2/9] arm64: dts: hi3660: add L2 cache topology
From: Leo YanThis patch adds the L2 cache topology on 96boards Hikey960. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 8921310..1cdd03b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -58,6 +58,7 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -66,6 +67,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -74,6 +76,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -82,6 +85,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -90,6 +94,7 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -102,6 +107,7 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -114,6 +120,7 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -126,6 +133,7 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -171,6 +179,14 @@ min-residency-us = <2>; }; }; + + A53_L2: l2-cache0 { + compatible = "cache"; + }; + + A73_L2: l2-cache1 { + compatible = "cache"; + }; }; gic: interrupt-controller@e82b { -- 2.10.2
[PATCH v2 2/9] arm64: dts: hi3660: add L2 cache topology
From: Leo Yan This patch adds the L2 cache topology on 96boards Hikey960. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 8921310..1cdd03b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -58,6 +58,7 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -66,6 +67,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -74,6 +76,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -82,6 +85,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -90,6 +94,7 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -102,6 +107,7 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -114,6 +120,7 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -126,6 +133,7 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -171,6 +179,14 @@ min-residency-us = <2>; }; }; + + A53_L2: l2-cache0 { + compatible = "cache"; + }; + + A73_L2: l2-cache1 { + compatible = "cache"; + }; }; gic: interrupt-controller@e82b { -- 2.10.2
[PATCH v2 1/9] arm64: dts: hi3660: enable idle states
From: Leo YanOn Hi3660 there have two clusters, one is CA53 cluster and another is CA73 cluster. This two clusters have different idle states separately. With Daniel Lezcano's patch (ARM: cpuidle: Support asymmetric idle definition), now ARM idle driver can support different clusters with different idle states. Base on this, this patch is to bind two clusters idle states on Hi3660. Except the "WFI" states are enabled by default for all CPUs, this patch also binds below extra idle states: - CA53 CPUs have two more states: CPU_SLEEP: CPU power off state CLUSTER_SLEEP_0: Cluster power off state - CA73 CPUs have three more states: CPU_NAP: CPU retention state CPU_SLEEP: CPU power off state CLUSTER_SLEEP_1: Cluster power off state Cc: Daniel Lezcano Cc: Kevin Wang Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 63 +++ 1 file changed, 63 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index c6a1961..8921310 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -58,6 +58,7 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu1: cpu@1 { @@ -65,6 +66,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu2: cpu@2 { @@ -72,6 +74,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu3: cpu@3 { @@ -79,6 +82,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu4: cpu@100 { @@ -86,6 +90,11 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu5: cpu@101 { @@ -93,6 +102,11 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu6: cpu@102 { @@ -100,6 +114,11 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu7: cpu@103 { @@ -107,6 +126,50 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; + }; + + idle-states { + entry-method = "psci"; + + CPU_NAP: cpu-nap { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x001>; + entry-latency-us = <7>; + exit-latency-us = <2>; + min-residency-us = <15>; + }; + + CPU_SLEEP: cpu-sleep { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x001>; + entry-latency-us = <40>; + exit-latency-us = <70>; + min-residency-us = <3000>; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 { + compatible = "arm,idle-state"; +
[PATCH v2 1/9] arm64: dts: hi3660: enable idle states
From: Leo Yan On Hi3660 there have two clusters, one is CA53 cluster and another is CA73 cluster. This two clusters have different idle states separately. With Daniel Lezcano's patch (ARM: cpuidle: Support asymmetric idle definition), now ARM idle driver can support different clusters with different idle states. Base on this, this patch is to bind two clusters idle states on Hi3660. Except the "WFI" states are enabled by default for all CPUs, this patch also binds below extra idle states: - CA53 CPUs have two more states: CPU_SLEEP: CPU power off state CLUSTER_SLEEP_0: Cluster power off state - CA73 CPUs have three more states: CPU_NAP: CPU retention state CPU_SLEEP: CPU power off state CLUSTER_SLEEP_1: Cluster power off state Cc: Daniel Lezcano Cc: Kevin Wang Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 63 +++ 1 file changed, 63 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index c6a1961..8921310 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -58,6 +58,7 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu1: cpu@1 { @@ -65,6 +66,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu2: cpu@2 { @@ -72,6 +74,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu3: cpu@3 { @@ -79,6 +82,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + cpu-idle-states = <_SLEEP _SLEEP_0>; }; cpu4: cpu@100 { @@ -86,6 +90,11 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu5: cpu@101 { @@ -93,6 +102,11 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu6: cpu@102 { @@ -100,6 +114,11 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; }; cpu7: cpu@103 { @@ -107,6 +126,50 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + cpu-idle-states = < + _NAP + _SLEEP + _SLEEP_1 + >; + }; + + idle-states { + entry-method = "psci"; + + CPU_NAP: cpu-nap { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x001>; + entry-latency-us = <7>; + exit-latency-us = <2>; + min-residency-us = <15>; + }; + + CPU_SLEEP: cpu-sleep { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x001>; + entry-latency-us = <40>; + exit-latency-us = <70>; + min-residency-us = <3000>; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param
[PATCH v2 0/9] arm64: dts: hi3660: add more device nodes
This patchset adds more device nodes for hi3660 and hikey960, including: - cpu idle states - L2 cache - PMU - OP-TEE - reboot - pstore - DMA Patch 7 fixes an issue in mmc nodes, by adding 'reset' Patch 8 change bluetooth uart max-speed to 3Mbps HiKey960 is one of 96boards. For details information about it, please refer to [1]. === Major changes in v2: - add patch 8 to change bluetooth uart max-speed to 3Mbps - add patch 9 for DMA node. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 Guodong Xu (4): arm64: dts: hikey960: Add support for syscon-reboot-mode arm64: dts: hikey960: Add pstore support arm64: dts: hi3660: Reset the mmc hosts arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps Leo Yan (2): arm64: dts: hi3660: enable idle states arm64: dts: hi3660: add L2 cache topology Victor Chong (1): arm64: dts: hikey960: Add optee node Wang Ruyi (1): arm64: dts: hi3660: add bindings for DMA YiPing Xu (1): arm64: dts: hi3660: add pmu dt node for hi3660 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 37 ++- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 114 ++ 2 files changed, 150 insertions(+), 1 deletion(-) -- 2.10.2
[PATCH v2 0/9] arm64: dts: hi3660: add more device nodes
This patchset adds more device nodes for hi3660 and hikey960, including: - cpu idle states - L2 cache - PMU - OP-TEE - reboot - pstore - DMA Patch 7 fixes an issue in mmc nodes, by adding 'reset' Patch 8 change bluetooth uart max-speed to 3Mbps HiKey960 is one of 96boards. For details information about it, please refer to [1]. === Major changes in v2: - add patch 8 to change bluetooth uart max-speed to 3Mbps - add patch 9 for DMA node. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 Guodong Xu (4): arm64: dts: hikey960: Add support for syscon-reboot-mode arm64: dts: hikey960: Add pstore support arm64: dts: hi3660: Reset the mmc hosts arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps Leo Yan (2): arm64: dts: hi3660: enable idle states arm64: dts: hi3660: add L2 cache topology Victor Chong (1): arm64: dts: hikey960: Add optee node Wang Ruyi (1): arm64: dts: hi3660: add bindings for DMA YiPing Xu (1): arm64: dts: hi3660: add pmu dt node for hi3660 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 37 ++- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 114 ++ 2 files changed, 150 insertions(+), 1 deletion(-) -- 2.10.2
[PATCH] clk: hi3660: fix incorrect uart3 clock freqency
From: Zhong Kaihua <zhongkai...@huawei.com> UART3 clock rate is doubled in previous commit. This error is not detected until recently a mezzanine board which makes real use of uart3 port (through LS connector of 96boards) was setup and tested on hi3660-hikey960 board. This patch changes clock source rate of clk_factor_uart3 to 1. Signed-off-by: Zhong Kaihua <zhongkai...@huawei.com> Signed-off-by: Guodong Xu <guodong...@linaro.org> --- drivers/clk/hisilicon/clk-hi3660.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c index a18258e..f404199 100644 --- a/drivers/clk/hisilicon/clk-hi3660.c +++ b/drivers/clk/hisilicon/clk-hi3660.c @@ -34,7 +34,7 @@ static const struct hisi_fixed_rate_clock hi3660_fixed_rate_clks[] = { /* crgctrl */ static const struct hisi_fixed_factor_clock hi3660_crg_fixed_factor_clks[] = { - { HI3660_FACTOR_UART3, "clk_factor_uart3", "iomcu_peri0", 1, 8, 0, }, + { HI3660_FACTOR_UART3, "clk_factor_uart3", "iomcu_peri0", 1, 16, 0, }, { HI3660_CLK_FACTOR_MMC, "clk_factor_mmc", "clkin_sys", 1, 6, 0, }, { HI3660_CLK_GATE_I2C0, "clk_gate_i2c0", "clk_i2c0_iomcu", 1, 4, 0, }, { HI3660_CLK_GATE_I2C1, "clk_gate_i2c1", "clk_i2c1_iomcu", 1, 4, 0, }, -- 2.10.2
[PATCH] clk: hi3660: fix incorrect uart3 clock freqency
From: Zhong Kaihua UART3 clock rate is doubled in previous commit. This error is not detected until recently a mezzanine board which makes real use of uart3 port (through LS connector of 96boards) was setup and tested on hi3660-hikey960 board. This patch changes clock source rate of clk_factor_uart3 to 1. Signed-off-by: Zhong Kaihua Signed-off-by: Guodong Xu --- drivers/clk/hisilicon/clk-hi3660.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c index a18258e..f404199 100644 --- a/drivers/clk/hisilicon/clk-hi3660.c +++ b/drivers/clk/hisilicon/clk-hi3660.c @@ -34,7 +34,7 @@ static const struct hisi_fixed_rate_clock hi3660_fixed_rate_clks[] = { /* crgctrl */ static const struct hisi_fixed_factor_clock hi3660_crg_fixed_factor_clks[] = { - { HI3660_FACTOR_UART3, "clk_factor_uart3", "iomcu_peri0", 1, 8, 0, }, + { HI3660_FACTOR_UART3, "clk_factor_uart3", "iomcu_peri0", 1, 16, 0, }, { HI3660_CLK_FACTOR_MMC, "clk_factor_mmc", "clkin_sys", 1, 6, 0, }, { HI3660_CLK_GATE_I2C0, "clk_gate_i2c0", "clk_i2c0_iomcu", 1, 4, 0, }, { HI3660_CLK_GATE_I2C1, "clk_gate_i2c1", "clk_i2c1_iomcu", 1, 4, 0, }, -- 2.10.2
[PATCH 5/5] arm64: defconfig: enable OP-TEE
From: Victor Chong <victor.ch...@linaro.org> This patch enables configs for Trusted Execution Environment (TEE) and OP-TEE. +CONFIG_TEE=y +CONFIG_OPTEE=y Signed-off-by: Victor Chong <victor.ch...@linaro.org> Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 99f7e06..81008e1 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -521,6 +521,8 @@ CONFIG_PHY_XGENE=y CONFIG_PHY_TEGRA_XUSB=y CONFIG_QCOM_L2_PMU=y CONFIG_QCOM_L3_PMU=y +CONFIG_TEE=y +CONFIG_OPTEE=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_EFI_CAPSULE_LOADER=y -- 2.10.2
[PATCH 5/5] arm64: defconfig: enable OP-TEE
From: Victor Chong This patch enables configs for Trusted Execution Environment (TEE) and OP-TEE. +CONFIG_TEE=y +CONFIG_OPTEE=y Signed-off-by: Victor Chong Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 99f7e06..81008e1 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -521,6 +521,8 @@ CONFIG_PHY_XGENE=y CONFIG_PHY_TEGRA_XUSB=y CONFIG_QCOM_L2_PMU=y CONFIG_QCOM_L3_PMU=y +CONFIG_TEE=y +CONFIG_OPTEE=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_EFI_CAPSULE_LOADER=y -- 2.10.2
[PATCH 3/5] arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE
Enable CONFIG_SYSCON_REBOOT_MODE Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d752beb..f7081056 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -298,6 +298,7 @@ CONFIG_GPIO_MAX77620=y CONFIG_POWER_RESET_MSM=y CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_SYSCON=y +CONFIG_SYSCON_REBOOT_MODE=y CONFIG_BATTERY_BQ27XXX=y CONFIG_SENSORS_ARM_SCPI=y CONFIG_SENSORS_LM90=m -- 2.10.2
[PATCH 3/5] arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE
Enable CONFIG_SYSCON_REBOOT_MODE Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d752beb..f7081056 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -298,6 +298,7 @@ CONFIG_GPIO_MAX77620=y CONFIG_POWER_RESET_MSM=y CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_SYSCON=y +CONFIG_SYSCON_REBOOT_MODE=y CONFIG_BATTERY_BQ27XXX=y CONFIG_SENSORS_ARM_SCPI=y CONFIG_SENSORS_LM90=m -- 2.10.2
[PATCH 4/5] arm64: defconfig: enable support for serial port connected device
This patch enables these configs: +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y As example, a bluetooth device connected to UART port can be supported by this. Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index f7081056..99f7e06 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -251,6 +251,8 @@ CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y CONFIG_SERIAL_MVEBU_UART=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y CONFIG_VIRTIO_CONSOLE=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y -- 2.10.2
[PATCH 2/5] arm64: defconfig: enable support hi6421v530 PMIC
Enable configs for hi6421v530 mfd and regulator driver + CONFIG_MFD_HI6421_PMIC=y + CONFIG_REGULATOR_HI6421V530=y Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 4e14c6d..d752beb 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -317,6 +317,7 @@ CONFIG_MFD_CROS_EC=y CONFIG_MFD_CROS_EC_I2C=y CONFIG_MFD_CROS_EC_SPI=y CONFIG_MFD_EXYNOS_LPASS=m +CONFIG_MFD_HI6421_PMIC=y CONFIG_MFD_HI655X_PMIC=y CONFIG_MFD_MAX77620=y CONFIG_MFD_SPMI_PMIC=y @@ -325,6 +326,7 @@ CONFIG_MFD_SEC_CORE=y CONFIG_REGULATOR_FAN53555=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_HI6421V530=y CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_PWM=y -- 2.10.2
[PATCH 4/5] arm64: defconfig: enable support for serial port connected device
This patch enables these configs: +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y As example, a bluetooth device connected to UART port can be supported by this. Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index f7081056..99f7e06 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -251,6 +251,8 @@ CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y CONFIG_SERIAL_MVEBU_UART=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y CONFIG_VIRTIO_CONSOLE=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y -- 2.10.2
[PATCH 2/5] arm64: defconfig: enable support hi6421v530 PMIC
Enable configs for hi6421v530 mfd and regulator driver + CONFIG_MFD_HI6421_PMIC=y + CONFIG_REGULATOR_HI6421V530=y Signed-off-by: Guodong Xu --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 4e14c6d..d752beb 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -317,6 +317,7 @@ CONFIG_MFD_CROS_EC=y CONFIG_MFD_CROS_EC_I2C=y CONFIG_MFD_CROS_EC_SPI=y CONFIG_MFD_EXYNOS_LPASS=m +CONFIG_MFD_HI6421_PMIC=y CONFIG_MFD_HI655X_PMIC=y CONFIG_MFD_MAX77620=y CONFIG_MFD_SPMI_PMIC=y @@ -325,6 +326,7 @@ CONFIG_MFD_SEC_CORE=y CONFIG_REGULATOR_FAN53555=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_HI6421V530=y CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_PWM=y -- 2.10.2
[PATCH 1/5] arm64: defconfig: enable Kirin PCIe
From: Xiaowei Song <songxiao...@hisilicon.com> Enable HiSilicon Kirin series SoCs PCIe controllers Signed-off-by: Guodong Xu <guodong...@linaro.org> Signed-off-by: Xiaowei Song <songxiao...@hisilicon.com> --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b4ca115..4e14c6d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -68,6 +68,7 @@ CONFIG_HOTPLUG_PCI_ACPI=y CONFIG_PCI_LAYERSCAPE=y CONFIG_PCI_HISI=y CONFIG_PCIE_QCOM=y +CONFIG_PCIE_KIRIN=y CONFIG_PCIE_ARMADA_8K=y CONFIG_PCI_AARDVARK=y CONFIG_PCIE_RCAR=y -- 2.10.2
[PATCH 1/5] arm64: defconfig: enable Kirin PCIe
From: Xiaowei Song Enable HiSilicon Kirin series SoCs PCIe controllers Signed-off-by: Guodong Xu Signed-off-by: Xiaowei Song --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b4ca115..4e14c6d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -68,6 +68,7 @@ CONFIG_HOTPLUG_PCI_ACPI=y CONFIG_PCI_LAYERSCAPE=y CONFIG_PCI_HISI=y CONFIG_PCIE_QCOM=y +CONFIG_PCIE_KIRIN=y CONFIG_PCIE_ARMADA_8K=y CONFIG_PCI_AARDVARK=y CONFIG_PCIE_RCAR=y -- 2.10.2
[PATCH 0/5] arm64: defconfig: enable configs for HiKey960
This patchset enables config items in arm64/defconfig for HiKey960. All of them correspond to real functions on HiKey960. Including: - Kirin PCIe - PMIC support, hi6421v530 - syscon reboot mode - serdev bus - OP-TEE HiKey960 is one of 96boards. For details information about it, please refer to [1]. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 Guodong Xu (3): arm64: defconfig: enable support hi6421v530 PMIC arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE arm64: defconfig: enable support for serial port connected device Victor Chong (1): arm64: defconfig: enable OP-TEE Xiaowei Song (1): arm64: defconfig: enable Kirin PCIe arch/arm64/configs/defconfig | 8 1 file changed, 8 insertions(+) -- 2.10.2
[PATCH 0/5] arm64: defconfig: enable configs for HiKey960
This patchset enables config items in arm64/defconfig for HiKey960. All of them correspond to real functions on HiKey960. Including: - Kirin PCIe - PMIC support, hi6421v530 - syscon reboot mode - serdev bus - OP-TEE HiKey960 is one of 96boards. For details information about it, please refer to [1]. [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960 Guodong Xu (3): arm64: defconfig: enable support hi6421v530 PMIC arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODE arm64: defconfig: enable support for serial port connected device Victor Chong (1): arm64: defconfig: enable OP-TEE Xiaowei Song (1): arm64: defconfig: enable Kirin PCIe arch/arm64/configs/defconfig | 8 1 file changed, 8 insertions(+) -- 2.10.2
[PATCH 2/7] arm64: dts: hi3660: add L2 cache topology
From: Leo YanThis patch adds the L2 cache topology on 96boards Hikey960. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 8921310..1cdd03b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -58,6 +58,7 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -66,6 +67,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -74,6 +76,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -82,6 +85,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -90,6 +94,7 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -102,6 +107,7 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -114,6 +120,7 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -126,6 +133,7 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -171,6 +179,14 @@ min-residency-us = <2>; }; }; + + A53_L2: l2-cache0 { + compatible = "cache"; + }; + + A73_L2: l2-cache1 { + compatible = "cache"; + }; }; gic: interrupt-controller@e82b { -- 2.10.2
[PATCH 2/7] arm64: dts: hi3660: add L2 cache topology
From: Leo Yan This patch adds the L2 cache topology on 96boards Hikey960. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 8921310..1cdd03b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -58,6 +58,7 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -66,6 +67,7 @@ device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -74,6 +76,7 @@ device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -82,6 +85,7 @@ device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = <_SLEEP _SLEEP_0>; }; @@ -90,6 +94,7 @@ device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -102,6 +107,7 @@ device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -114,6 +120,7 @@ device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -126,6 +133,7 @@ device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; + next-level-cache = <_L2>; cpu-idle-states = < _NAP _SLEEP @@ -171,6 +179,14 @@ min-residency-us = <2>; }; }; + + A53_L2: l2-cache0 { + compatible = "cache"; + }; + + A73_L2: l2-cache1 { + compatible = "cache"; + }; }; gic: interrupt-controller@e82b { -- 2.10.2
[PATCH 6/7] arm64: dts: hikey960: Add pstore support
This patch reserves some memory in the DTS and sets up a pstore device tree node to enable pstore support on HiKey960. Cc: John Stultz <john.stu...@linaro.org> Signed-off-by: Guodong Xu <guodong...@linaro.org> --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index ce5e874..7770ec7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -39,6 +39,20 @@ reg = <0x0 0x0 0x0 0x0>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@3200 { + compatible = "ramoops"; + reg = <0x0 0x3200 0x0 0x0010>; + record-size = <0x0002>; + console-size= <0x0002>; + ftrace-size = <0x0002>; + }; + }; + reboot-mode-syscon@3210 { compatible = "syscon", "simple-mfd"; reg = <0x0 0x3210 0x0 0x1000>; -- 2.10.2
[PATCH 6/7] arm64: dts: hikey960: Add pstore support
This patch reserves some memory in the DTS and sets up a pstore device tree node to enable pstore support on HiKey960. Cc: John Stultz Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index ce5e874..7770ec7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -39,6 +39,20 @@ reg = <0x0 0x0 0x0 0x0>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@3200 { + compatible = "ramoops"; + reg = <0x0 0x3200 0x0 0x0010>; + record-size = <0x0002>; + console-size= <0x0002>; + ftrace-size = <0x0002>; + }; + }; + reboot-mode-syscon@3210 { compatible = "syscon", "simple-mfd"; reg = <0x0 0x3210 0x0 0x1000>; -- 2.10.2