[PATCH 3/4] spi: mediatek: add mtk_spi_compatible support
this patch adds max_fifo_size and must_rx compat support.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-slave-mt27xx.c | 28
1 file changed, 24 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
index 44edaa360405..7e6fadc88cef 100644
--- a/drivers/spi/spi-slave-mt27xx.c
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -10,6 +10,8 @@
#include
#include
#include
+#include
+
#define SPIS_IRQ_EN_REG0x0
#define SPIS_IRQ_CLR_REG 0x4
@@ -61,8 +63,6 @@
#define SPIS_DMA_ADDR_EN BIT(1)
#define SPIS_SOFT_RST BIT(0)
-#define MTK_SPI_SLAVE_MAX_FIFO_SIZE 512U
-
struct mtk_spi_slave {
struct device *dev;
void __iomem *base;
@@ -70,10 +70,19 @@ struct mtk_spi_slave {
struct completion xfer_done;
struct spi_transfer *cur_transfer;
bool slave_aborted;
+ const struct mtk_spi_compatible *dev_comp;
};
+struct mtk_spi_compatible {
+ const u32 max_fifo_size;
+ bool must_rx;
+};
+static const struct mtk_spi_compatible mt2712_compat = {
+ .max_fifo_size = 512,
+};
static const struct of_device_id mtk_spi_slave_of_match[] = {
- { .compatible = "mediatek,mt2712-spi-slave", },
+ { .compatible = "mediatek,mt2712-spi-slave",
+ .data = (void *)_compat,},
{}
};
MODULE_DEVICE_TABLE(of, mtk_spi_slave_of_match);
@@ -272,7 +281,7 @@ static int mtk_spi_slave_transfer_one(struct spi_controller
*ctlr,
mdata->slave_aborted = false;
mdata->cur_transfer = xfer;
- if (xfer->len > MTK_SPI_SLAVE_MAX_FIFO_SIZE)
+ if (xfer->len > mdata->dev_comp->max_fifo_size)
return mtk_spi_slave_dma_transfer(ctlr, spi, xfer);
else
return mtk_spi_slave_fifo_transfer(ctlr, spi, xfer);
@@ -369,6 +378,7 @@ static int mtk_spi_slave_probe(struct platform_device *pdev)
struct spi_controller *ctlr;
struct mtk_spi_slave *mdata;
int irq, ret;
+ const struct of_device_id *of_id;
ctlr = spi_alloc_slave(>dev, sizeof(*mdata));
if (!ctlr) {
@@ -386,7 +396,17 @@ static int mtk_spi_slave_probe(struct platform_device
*pdev)
ctlr->setup = mtk_spi_slave_setup;
ctlr->slave_abort = mtk_slave_abort;
+ of_id = of_match_node(mtk_spi_slave_of_match, pdev->dev.of_node);
+ if (!of_id) {
+ dev_err(>dev, "failed to probe of_node\n");
+ ret = -EINVAL;
+ goto err_put_ctlr;
+ }
mdata = spi_controller_get_devdata(ctlr);
+ mdata->dev_comp = of_id->data;
+
+ if (mdata->dev_comp->must_rx)
+ ctlr->flags = SPI_MASTER_MUST_RX;
platform_set_drvdata(pdev, ctlr);
--
2.18.0
[PATCH 4/4] spi: mediatek: add mt8195 spi slave support
this patch adds mt8195 spi slave compatible support.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-slave-mt27xx.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
index 7e6fadc88cef..f199a6c4738a 100644
--- a/drivers/spi/spi-slave-mt27xx.c
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -77,12 +77,20 @@ struct mtk_spi_compatible {
const u32 max_fifo_size;
bool must_rx;
};
+
static const struct mtk_spi_compatible mt2712_compat = {
.max_fifo_size = 512,
};
+static const struct mtk_spi_compatible mt8195_compat = {
+ .max_fifo_size = 128,
+ .must_rx = true,
+};
+
static const struct of_device_id mtk_spi_slave_of_match[] = {
{ .compatible = "mediatek,mt2712-spi-slave",
.data = (void *)_compat,},
+ { .compatible = "mediatek,mt8195-spi-slave",
+ .data = (void *)_compat,},
{}
};
MODULE_DEVICE_TABLE(of, mtk_spi_slave_of_match);
--
2.18.0
[PATCH 0/4] Add Mediatek MT8195 SPI driver support
This series are based on spi/for-next, and provide 4 patches to add MT8195 spi support. Leilk Liu (4): spi: update spi master bindings for MT8195 SoC spi: update spi slave bindings for MT8195 SoC spi: mediatek: add mtk_spi_compatible support spi: mediatek: add mt8195 spi slave support .../devicetree/bindings/spi/spi-mt65xx.txt| 1 + .../bindings/spi/spi-slave-mt27xx.txt | 1 + drivers/spi/spi-slave-mt27xx.c| 36 --- 3 files changed, 34 insertions(+), 4 deletions(-) -- 2.25.1
[PATCH 2/4] spi: update spi slave bindings for MT8195 SoC
Add a DT binding documentation for the MT8195 soc. Signed-off-by: Leilk Liu --- Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt index c37e5a179b21..9192724540fd 100644 --- a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt @@ -3,6 +3,7 @@ Binding for MTK SPI Slave controller Required properties: - compatible: should be one of the following. - mediatek,mt2712-spi-slave: for mt2712 platforms +- mediatek,mt8195-spi-slave: for mt8195 platforms - reg: Address and length of the register set for the device. - interrupts: Should contain spi interrupt. - clocks: phandles to input clocks. -- 2.18.0
[PATCH 1/4] spi: update spi master bindings for MT8195 SoC
Add a DT binding documentation for the MT8195 soc. Signed-off-by: leilk.liu --- Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 7bae7eef26c7..4d0e4c15c4ea 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -12,6 +12,7 @@ Required properties: - mediatek,mt8173-spi: for mt8173 platforms - mediatek,mt8183-spi: for mt8183 platforms - "mediatek,mt8192-spi", "mediatek,mt6765-spi": for mt8192 platforms +- "mediatek,mt8195-spi", "mediatek,mt6765-spi": for mt8195 platforms - "mediatek,mt8516-spi", "mediatek,mt2712-spi": for mt8516 platforms - "mediatek,mt6779-spi", "mediatek,mt6765-spi": for mt6779 platforms -- 2.18.0
Re: [PATCH] spi: mediatek: Re-license MTK SPI driver as Dual MIT/GPL
On Wed, 2021-03-03 at 08:18 +0100, Greg Kroah-Hartman wrote: > On Wed, Mar 03, 2021 at 10:56:36AM +0800, Leilk Liu wrote: > > From: "leilk.liu" > > > > It is wanted to use MTK spi bus driver with GPL-2.0 or MIT license. > > But now it is only licensed as GPL-2.0, so re-license it as dual > > MIT/GPL. > > > > Signed-off-by: leilk.liu > > Please use your name here, not an email alias for where your name goes. > OK, I'll fix it, thanks! > > > --- > > drivers/spi/spi-mt65xx.c | 4 ++-- > > include/linux/platform_data/spi-mt65xx.h | 2 +- > > Given that these files have been licensed under the GPL only since 2015, > all changes contributed to it have only been licensed under the GPL as > well, so have you gotten approval for all of the contributors for this > change? > This is the reason that I sent this patch to ask for ACKs from all contributors (who are all in the To mail-list) for these files. > Can you please get your lawyer to also sign off on this license change > patch, so that we know that you have their approval for this incase > there are questions about it in the future? > I need to use the code in other projects that is not with GPL-2.0. Also, the license change is approved by Mediatek supervisor. > thanks, > > greg k-h
[PATCH 0/3] spi: add set_cs_timing support for HW/SW CS mode
Some controllers only have one HW CS, if support multiple devices, other devices need to use SW CS. This patch adds the support of both HW and SW CS via cs_gpio. leilk.liu (3): spi: add power control when set_cs_timing spi: support CS timing for HW & SW mode spi: mediatek: add set_cs_timing support drivers/spi/spi-mt65xx.c | 72 +++- drivers/spi/spi.c| 32 +++--- 2 files changed, 83 insertions(+), 21 deletions(-) -- 2.18.0
[PATCH] spi: mediatek: add SPI_LSB_FIRST support
this patch add SPI_LSB_FIRST feature support.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c | 15 ++-
include/linux/platform_data/spi-mt65xx.h |2 --
2 files changed, 6 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 0cce6f0..7f4dc18 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -131,8 +131,6 @@ struct mtk_spi {
* supplies it.
*/
static const struct mtk_chip_config mtk_default_chip_info = {
- .rx_mlsb = 1,
- .tx_mlsb = 1,
.cs_pol = 0,
.sample_sel = 0,
};
@@ -203,14 +201,13 @@ static int mtk_spi_prepare_message(struct spi_master
*master,
reg_val &= ~SPI_CMD_CPOL;
/* set the mlsbx and mlsbtx */
- if (chip_config->tx_mlsb)
- reg_val |= SPI_CMD_TXMSBF;
- else
+ if (spi->mode & SPI_LSB_FIRST) {
reg_val &= ~SPI_CMD_TXMSBF;
- if (chip_config->rx_mlsb)
- reg_val |= SPI_CMD_RXMSBF;
- else
reg_val &= ~SPI_CMD_RXMSBF;
+ } else {
+ reg_val |= SPI_CMD_TXMSBF;
+ reg_val |= SPI_CMD_RXMSBF;
+ }
/* set the tx/rx endian */
#ifdef __LITTLE_ENDIAN
@@ -607,7 +604,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
master->auto_runtime_pm = true;
master->dev.of_node = pdev->dev.of_node;
- master->mode_bits = SPI_CPOL | SPI_CPHA;
+ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
master->set_cs = mtk_spi_set_cs;
master->prepare_message = mtk_spi_prepare_message;
diff --git a/include/linux/platform_data/spi-mt65xx.h
b/include/linux/platform_data/spi-mt65xx.h
index ba4e4bb..8d5df58 100644
--- a/include/linux/platform_data/spi-mt65xx.h
+++ b/include/linux/platform_data/spi-mt65xx.h
@@ -14,8 +14,6 @@
/* Board specific platform_data */
struct mtk_chip_config {
- u32 tx_mlsb;
- u32 rx_mlsb;
u32 cs_pol;
u32 sample_sel;
};
--
1.7.9.5
[PATCH] dt-bindings: spi: spi-mt65xx: add support for MT8516
Add binding documentation of spi-mt65xx for MT8516 SOC. Signed-off-by: Leilk Liu --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 69c3567..c0f6c8e 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -10,6 +10,7 @@ Required properties: - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms - mediatek,mt8183-spi: for mt8183 platforms +- "mediatek,mt8516-spi", "mediatek,mt2712-spi": for mt8516 platforms - #address-cells: should be 1. -- 1.7.9.5
[PATCH v3] spi: mediatek: Add bindings for mediatek MT7629 soc platform
This patch adds a DT binding documentation for the MT7629 soc. Signed-off-by: Leilk Liu --- v3: remove cover-letter. v2: remove "mediatek,mt7629-spi" compatible according Matthias's advice. v1: This series are based on 4.20-rc1 and provide two patches to support mt7629 IC. --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 7940940..69c3567 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -6,6 +6,7 @@ Required properties: - mediatek,mt2712-spi: for mt2712 platforms - mediatek,mt6589-spi: for mt6589 platforms - mediatek,mt7622-spi: for mt7622 platforms +- "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms - mediatek,mt8183-spi: for mt8183 platforms -- 1.7.9.5
[PATCH v3] spi: mediatek: Add bindings for mediatek MT7629 soc platform
This patch adds a DT binding documentation for the MT7629 soc. Signed-off-by: Leilk Liu --- v3: remove cover-letter. v2: remove "mediatek,mt7629-spi" compatible according Matthias's advice. v1: This series are based on 4.20-rc1 and provide two patches to support mt7629 IC. --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 7940940..69c3567 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -6,6 +6,7 @@ Required properties: - mediatek,mt2712-spi: for mt2712 platforms - mediatek,mt6589-spi: for mt6589 platforms - mediatek,mt7622-spi: for mt7622 platforms +- "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms - mediatek,mt8183-spi: for mt8183 platforms -- 1.7.9.5
[PATCH v2 1/1] spi: mediatek: Add bindings for mediatek MT7629 soc platform
This patch adds a DT binding documentation for the MT7629 soc. Signed-off-by: Leilk Liu --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 7940940..69c3567 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -6,6 +6,7 @@ Required properties: - mediatek,mt2712-spi: for mt2712 platforms - mediatek,mt6589-spi: for mt6589 platforms - mediatek,mt7622-spi: for mt7622 platforms +- "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms - mediatek,mt8183-spi: for mt8183 platforms -- 1.7.9.5
[PATCH v2 1/1] spi: mediatek: Add bindings for mediatek MT7629 soc platform
This patch adds a DT binding documentation for the MT7629 soc. Signed-off-by: Leilk Liu --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 7940940..69c3567 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -6,6 +6,7 @@ Required properties: - mediatek,mt2712-spi: for mt2712 platforms - mediatek,mt6589-spi: for mt6589 platforms - mediatek,mt7622-spi: for mt7622 platforms +- "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms - mediatek,mt8183-spi: for mt8183 platforms -- 1.7.9.5
[PATCH v2 0/1] add SPI driver support for mt7629
>From cf719ac350c36cb58e2013b58f73ad04f6981384 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Tue, 27 Nov 2018 10:18:30 +0800 Subject: [PATCH v2 0/1] add SPI driver support for mt7629 v2: remove "mediatek,mt7629-spi" compatible according Matthias's advice. v1: This series are based on 4.20-rc1 and provide two patches to support mt7629 IC. Leilk Liu (1): spi: mediatek: Add bindings for mediatek MT7629 soc platform Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 1 + 1 file changed, 1 insertion(+) -- 1.9.1
[PATCH v2 0/1] add SPI driver support for mt7629
>From cf719ac350c36cb58e2013b58f73ad04f6981384 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Tue, 27 Nov 2018 10:18:30 +0800 Subject: [PATCH v2 0/1] add SPI driver support for mt7629 v2: remove "mediatek,mt7629-spi" compatible according Matthias's advice. v1: This series are based on 4.20-rc1 and provide two patches to support mt7629 IC. Leilk Liu (1): spi: mediatek: Add bindings for mediatek MT7629 soc platform Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 1 + 1 file changed, 1 insertion(+) -- 1.9.1
[PATCH 0/2] add SPI driver support for mt7629
>From 51ab18abe1ad0f8ef0bc88696d956431f3e01f3f Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Tue, 20 Nov 2018 16:34:22 +0800 Subject: [PATCH 0/2] add SPI driver support for mt7629 This series are based on 4.20-rc1 and provide two patches to support mt7629 IC. Leilk Liu (2): spi: mediatek: Add bindings for mediatek MT7629 soc platform spi: mediatek: add spi support for mt7629 IC Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 1 + drivers/spi/spi-mt65xx.c | 3 +++ 2 files changed, 4 insertions(+) -- 1.9.1
[PATCH 2/2] spi: mediatek: add spi support for mt7629 IC
this patch add support for mt7629 IC.
Change-Id: Icb8ced408ebd1340fb0340592b91f24740d07e1e
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 9ee1fe9..0cce6f0 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -150,6 +150,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt7622-spi",
.data = (void *)_compat,
},
+ { .compatible = "mediatek,mt7629-spi",
+ .data = (void *)_compat,
+ },
{ .compatible = "mediatek,mt8135-spi",
.data = (void *)_common_compat,
},
--
1.7.9.5
[PATCH 0/2] add SPI driver support for mt7629
>From 51ab18abe1ad0f8ef0bc88696d956431f3e01f3f Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Tue, 20 Nov 2018 16:34:22 +0800 Subject: [PATCH 0/2] add SPI driver support for mt7629 This series are based on 4.20-rc1 and provide two patches to support mt7629 IC. Leilk Liu (2): spi: mediatek: Add bindings for mediatek MT7629 soc platform spi: mediatek: add spi support for mt7629 IC Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 1 + drivers/spi/spi-mt65xx.c | 3 +++ 2 files changed, 4 insertions(+) -- 1.9.1
[PATCH 2/2] spi: mediatek: add spi support for mt7629 IC
this patch add support for mt7629 IC.
Change-Id: Icb8ced408ebd1340fb0340592b91f24740d07e1e
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 9ee1fe9..0cce6f0 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -150,6 +150,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt7622-spi",
.data = (void *)_compat,
},
+ { .compatible = "mediatek,mt7629-spi",
+ .data = (void *)_compat,
+ },
{ .compatible = "mediatek,mt8135-spi",
.data = (void *)_common_compat,
},
--
1.7.9.5
[PATCH 1/2] spi: mediatek: Add bindings for mediatek MT7629 soc platform
This patch adds a DT binding documentation for the MT7629 soc. Signed-off-by: Leilk Liu --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 7940940..6cc4e87 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -6,6 +6,7 @@ Required properties: - mediatek,mt2712-spi: for mt2712 platforms - mediatek,mt6589-spi: for mt6589 platforms - mediatek,mt7622-spi: for mt7622 platforms +- mediatek,mt7629-spi: for mt7629 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms - mediatek,mt8183-spi: for mt8183 platforms -- 1.7.9.5
[PATCH 1/2] spi: mediatek: Add bindings for mediatek MT7629 soc platform
This patch adds a DT binding documentation for the MT7629 soc. Signed-off-by: Leilk Liu --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 7940940..6cc4e87 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -6,6 +6,7 @@ Required properties: - mediatek,mt2712-spi: for mt2712 platforms - mediatek,mt6589-spi: for mt6589 platforms - mediatek,mt7622-spi: for mt7622 platforms +- mediatek,mt7629-spi: for mt7629 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms - mediatek,mt8183-spi: for mt8183 platforms -- 1.7.9.5
[PATCH 1/2] spi: mediatek: Add bindings for mediatek MT8183 soc platform
This patch adds a DT binding documentation for the MT8183 soc. Signed-off-by: Leilk Liu --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 236dcb0..7940940 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -8,6 +8,7 @@ Required properties: - mediatek,mt7622-spi: for mt7622 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms +- mediatek,mt8183-spi: for mt8183 platforms - #address-cells: should be 1. -- 1.7.9.5
add SPI driver support for mt8183
>From 44b1c34bc19d9bfdc736664439c0530fbb2c75b8 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Thu, 1 Nov 2018 11:48:20 +0800 Subject: [PATCH 0/2] add SPI driver support for mt8183 This series are based on 4.19-rc1 and provide two patches to support mt8183 IC. Leilk Liu (2): spi: mediatek: Add bindings for mediatek MT8183 soc platform spi: mediatek: add spi support for mt8183 IC Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 1 + drivers/spi/spi-mt65xx.c | 9 + 2 files changed, 10 insertions(+) -- 2.19.1
[PATCH 1/2] spi: mediatek: Add bindings for mediatek MT8183 soc platform
This patch adds a DT binding documentation for the MT8183 soc. Signed-off-by: Leilk Liu --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 236dcb0..7940940 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -8,6 +8,7 @@ Required properties: - mediatek,mt7622-spi: for mt7622 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms +- mediatek,mt8183-spi: for mt8183 platforms - #address-cells: should be 1. -- 1.7.9.5
add SPI driver support for mt8183
>From 44b1c34bc19d9bfdc736664439c0530fbb2c75b8 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Thu, 1 Nov 2018 11:48:20 +0800 Subject: [PATCH 0/2] add SPI driver support for mt8183 This series are based on 4.19-rc1 and provide two patches to support mt8183 IC. Leilk Liu (2): spi: mediatek: Add bindings for mediatek MT8183 soc platform spi: mediatek: add spi support for mt8183 IC Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 1 + drivers/spi/spi-mt65xx.c | 9 + 2 files changed, 10 insertions(+) -- 2.19.1
[PATCH 2/2] spi: mediatek: add spi support for mt8183 IC
this patch add support for mt8183 IC.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 0c2867d..9ee1fe9 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -120,6 +120,12 @@ struct mtk_spi {
.must_tx = true,
};
+static const struct mtk_spi_compatible mt8183_compat = {
+ .need_pad_sel = true,
+ .must_tx = true,
+ .enhance_timing = true,
+};
+
/*
* A piece of default chip info unless the platform
* supplies it.
@@ -150,6 +156,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt8173-spi",
.data = (void *)_compat,
},
+ { .compatible = "mediatek,mt8183-spi",
+ .data = (void *)_compat,
+ },
{}
};
MODULE_DEVICE_TABLE(of, mtk_spi_of_match);
--
1.7.9.5
[PATCH 2/2] spi: mediatek: add spi support for mt8183 IC
this patch add support for mt8183 IC.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 0c2867d..9ee1fe9 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -120,6 +120,12 @@ struct mtk_spi {
.must_tx = true,
};
+static const struct mtk_spi_compatible mt8183_compat = {
+ .need_pad_sel = true,
+ .must_tx = true,
+ .enhance_timing = true,
+};
+
/*
* A piece of default chip info unless the platform
* supplies it.
@@ -150,6 +156,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt8173-spi",
.data = (void *)_compat,
},
+ { .compatible = "mediatek,mt8183-spi",
+ .data = (void *)_compat,
+ },
{}
};
MODULE_DEVICE_TABLE(of, mtk_spi_of_match);
--
1.7.9.5
[PATCH] spi: mediatek: use correct mata->xfer_len when in fifo transfer
when xfer_len is greater than 64 bytes and use fifo mode
to transfer, the actual length from the third time is mata->xfer_len
but not len in mtk_spi_interrupt().
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 3dc3162..0c2867d 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -522,11 +522,11 @@ static irqreturn_t mtk_spi_interrupt(int irq, void
*dev_id)
mdata->xfer_len = min(MTK_SPI_MAX_FIFO_SIZE, len);
mtk_spi_setup_packet(master);
- cnt = len / 4;
+ cnt = mdata->xfer_len / 4;
iowrite32_rep(mdata->base + SPI_TX_DATA_REG,
trans->tx_buf + mdata->num_xfered, cnt);
- remainder = len % 4;
+ remainder = mdata->xfer_len % 4;
if (remainder > 0) {
reg_val = 0;
memcpy(_val,
--
1.7.9.5
[PATCH] spi: mediatek: use correct mata->xfer_len when in fifo transfer
when xfer_len is greater than 64 bytes and use fifo mode
to transfer, the actual length from the third time is mata->xfer_len
but not len in mtk_spi_interrupt().
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 3dc3162..0c2867d 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -522,11 +522,11 @@ static irqreturn_t mtk_spi_interrupt(int irq, void
*dev_id)
mdata->xfer_len = min(MTK_SPI_MAX_FIFO_SIZE, len);
mtk_spi_setup_packet(master);
- cnt = len / 4;
+ cnt = mdata->xfer_len / 4;
iowrite32_rep(mdata->base + SPI_TX_DATA_REG,
trans->tx_buf + mdata->num_xfered, cnt);
- remainder = len % 4;
+ remainder = mdata->xfer_len % 4;
if (remainder > 0) {
reg_val = 0;
memcpy(_val,
--
1.7.9.5
[PATCH v5 2/3] spi: mediatek: add spi slave for Mediatek MT2712
This patch adds basic spi slave for MT2712.
Signed-off-by: Leilk Liu
---
drivers/spi/Kconfig| 10 +
drivers/spi/Makefile |1 +
drivers/spi/spi-slave-mt27xx.c | 554
3 files changed, 565 insertions(+)
create mode 100644 drivers/spi/spi-slave-mt27xx.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 671d078..60b13c6 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -596,6 +596,16 @@ config SPI_SIRF
help
SPI driver for CSR SiRFprimaII SoCs
+config SPI_SLAVE_MT27XX
+ tristate "MediaTek SPI slave device"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ depends on SPI_SLAVE
+ help
+ This selects the MediaTek(R) SPI slave device driver.
+ If you want to use MediaTek(R) SPI slave interface,
+ say Y or M here.If you are not sure, say N.
+ SPI slave drivers for Mediatek MT27XX series ARM SoCs.
+
config SPI_SPRD_ADI
tristate "Spreadtrum ADI controller"
depends on ARCH_SPRD || COMPILE_TEST
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a90d559..3b469fa 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -88,6 +88,7 @@ obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o
obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o
obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o
obj-$(CONFIG_SPI_SIRF) += spi-sirf.o
+obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o
obj-$(CONFIG_SPI_SPRD_ADI) += spi-sprd-adi.o
obj-$(CONFIG_SPI_STM32)+= spi-stm32.o
obj-$(CONFIG_SPI_ST_SSC4) += spi-st-ssc4.o
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
new file mode 100644
index 000..d1075433
--- /dev/null
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -0,0 +1,554 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SPIS_IRQ_EN_REG0x0
+#define SPIS_IRQ_CLR_REG 0x4
+#define SPIS_IRQ_ST_REG0x8
+#define SPIS_IRQ_MASK_REG 0xc
+#define SPIS_CFG_REG 0x10
+#define SPIS_RX_DATA_REG 0x14
+#define SPIS_TX_DATA_REG 0x18
+#define SPIS_RX_DST_REG0x1c
+#define SPIS_TX_SRC_REG0x20
+#define SPIS_DMA_CFG_REG 0x30
+#define SPIS_SOFT_RST_REG 0x40
+
+/* SPIS_IRQ_EN_REG */
+#define DMA_DONE_ENBIT(7)
+#define DATA_DONE_EN BIT(2)
+#define RSTA_DONE_EN BIT(1)
+#define CMD_INVALID_EN BIT(0)
+
+/* SPIS_IRQ_ST_REG */
+#define DMA_DONE_STBIT(7)
+#define DATA_DONE_ST BIT(2)
+#define RSTA_DONE_ST BIT(1)
+#define CMD_INVALID_ST BIT(0)
+
+/* SPIS_IRQ_MASK_REG */
+#define DMA_DONE_MASK BIT(7)
+#define DATA_DONE_MASK BIT(2)
+#define RSTA_DONE_MASK BIT(1)
+#define CMD_INVALID_MASK BIT(0)
+
+/* SPIS_CFG_REG */
+#define SPIS_TX_ENDIAN BIT(7)
+#define SPIS_RX_ENDIAN BIT(6)
+#define SPIS_TXMSBFBIT(5)
+#define SPIS_RXMSBFBIT(4)
+#define SPIS_CPHA BIT(3)
+#define SPIS_CPOL BIT(2)
+#define SPIS_TX_EN BIT(1)
+#define SPIS_RX_EN BIT(0)
+
+/* SPIS_DMA_CFG_REG */
+#define TX_DMA_TRIG_EN BIT(31)
+#define TX_DMA_EN BIT(30)
+#define RX_DMA_EN BIT(29)
+#define TX_DMA_LEN 0xf
+
+/* SPIS_SOFT_RST_REG */
+#define SPIS_DMA_ADDR_EN BIT(1)
+#define SPIS_SOFT_RST BIT(0)
+
+#define MTK_SPI_SLAVE_MAX_FIFO_SIZE 512U
+
+struct mtk_spi_slave {
+ struct device *dev;
+ void __iomem *base;
+ struct clk *spi_clk;
+ struct completion xfer_done;
+ struct spi_transfer *cur_transfer;
+ bool slave_aborted;
+};
+
+static const struct of_device_id mtk_spi_slave_of_match[] = {
+ { .compatible = "mediatek,mt2712-spi-slave", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mtk_spi_slave_of_match);
+
+static void mtk_spi_slave_disable_dma(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);
+ reg_val &= ~RX_DMA_EN;
+ reg_val &= ~TX_DMA_EN;
+ writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);
+}
+
+static void mtk_spi_slave_disable_xfer(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_CFG_REG);
+ reg_val &= ~SPIS_TX_EN;
+ reg_val &= ~SPIS_RX_EN;
+ writel(reg_val, mdata->base + SPIS_CFG_REG);
+}
+
+static int mtk_spi_slave_wait_for_completion(struct mtk_spi_slave *mdata)
+{
+ if (wait_for_completion_interruptible(>xfer_done) ||
+ mdata->slave_aborted) {
+ dev_err(mdata->dev, "interrupted\n");
+ return -EINTR;
[PATCH v5 0/3] Add Mediatek SPI slave driver
>From 5479c692171dc52990290d88c505c074fa4db7d4 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Fri, 28 Sep 2018 18:37:40 +0800 Subject: [PATCH v5 0/3] Add Mediatek SPI slave driver v5: 1. Fix typos in bindings file. v4: 1. Fix Mark Brown review comment about kconfig & driver. v3: 1. Fix Rob Herring review comment about bindings. 2. remove unused variables in driver. v2: 1. Fix Sean Wang review comment. 2. remove unused register and offset define. 3. update bindings file with assigned-clocks and assigned-clocks-parents. v1: This series are based on 4.19-rc1 and provide three patches to add mediatek spi slave driver. Leilk Liu (3): spi: mediatek: add bindings for Mediatek MT2712 soc platform spi: mediatek: add spi slave for Mediatek MT2712 arm64: dts: Add spi slave dts .../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32 ++ arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 + drivers/spi/Kconfig| 10 + drivers/spi/Makefile | 1 + drivers/spi/spi-slave-mt27xx.c | 554 + 5 files changed, 608 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt create mode 100644 drivers/spi/spi-slave-mt27xx.c -- 1.9.1
[PATCH v5 1/3] spi: mediatek: add bindings for Mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
new file mode 100644
index 000..c37e5a1
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
@@ -0,0 +1,32 @@
+Binding for MTK SPI Slave controller
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt2712-spi-slave: for mt2712 platforms
+- reg: Address and length of the register set for the device.
+- interrupts: Should contain spi interrupt.
+- clocks: phandles to input clocks.
+ It's clock gate, and should be < CLK_INFRA_AO_SPI1>.
+- clock-names: should be "spi" for the clock gate.
+
+Optional properties:
+- assigned-clocks: it's mux clock, should be < CLK_TOP_SPISLV_SEL>.
+- assigned-clock-parents: parent of mux clock.
+ It's PLL, and should be one of the following.
+ - < CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
+ It's the default one.
+ - < CLK_TOP_UNIVPLL1_D4>: specify parent clock 156MHZ.
+ - < CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
+ - < CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+
+Example:
+- SoC Specific Portion:
+spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+};
--
1.7.9.5
[PATCH v5 2/3] spi: mediatek: add spi slave for Mediatek MT2712
This patch adds basic spi slave for MT2712.
Signed-off-by: Leilk Liu
---
drivers/spi/Kconfig| 10 +
drivers/spi/Makefile |1 +
drivers/spi/spi-slave-mt27xx.c | 554
3 files changed, 565 insertions(+)
create mode 100644 drivers/spi/spi-slave-mt27xx.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 671d078..60b13c6 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -596,6 +596,16 @@ config SPI_SIRF
help
SPI driver for CSR SiRFprimaII SoCs
+config SPI_SLAVE_MT27XX
+ tristate "MediaTek SPI slave device"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ depends on SPI_SLAVE
+ help
+ This selects the MediaTek(R) SPI slave device driver.
+ If you want to use MediaTek(R) SPI slave interface,
+ say Y or M here.If you are not sure, say N.
+ SPI slave drivers for Mediatek MT27XX series ARM SoCs.
+
config SPI_SPRD_ADI
tristate "Spreadtrum ADI controller"
depends on ARCH_SPRD || COMPILE_TEST
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a90d559..3b469fa 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -88,6 +88,7 @@ obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o
obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o
obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o
obj-$(CONFIG_SPI_SIRF) += spi-sirf.o
+obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o
obj-$(CONFIG_SPI_SPRD_ADI) += spi-sprd-adi.o
obj-$(CONFIG_SPI_STM32)+= spi-stm32.o
obj-$(CONFIG_SPI_ST_SSC4) += spi-st-ssc4.o
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
new file mode 100644
index 000..d1075433
--- /dev/null
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -0,0 +1,554 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SPIS_IRQ_EN_REG0x0
+#define SPIS_IRQ_CLR_REG 0x4
+#define SPIS_IRQ_ST_REG0x8
+#define SPIS_IRQ_MASK_REG 0xc
+#define SPIS_CFG_REG 0x10
+#define SPIS_RX_DATA_REG 0x14
+#define SPIS_TX_DATA_REG 0x18
+#define SPIS_RX_DST_REG0x1c
+#define SPIS_TX_SRC_REG0x20
+#define SPIS_DMA_CFG_REG 0x30
+#define SPIS_SOFT_RST_REG 0x40
+
+/* SPIS_IRQ_EN_REG */
+#define DMA_DONE_ENBIT(7)
+#define DATA_DONE_EN BIT(2)
+#define RSTA_DONE_EN BIT(1)
+#define CMD_INVALID_EN BIT(0)
+
+/* SPIS_IRQ_ST_REG */
+#define DMA_DONE_STBIT(7)
+#define DATA_DONE_ST BIT(2)
+#define RSTA_DONE_ST BIT(1)
+#define CMD_INVALID_ST BIT(0)
+
+/* SPIS_IRQ_MASK_REG */
+#define DMA_DONE_MASK BIT(7)
+#define DATA_DONE_MASK BIT(2)
+#define RSTA_DONE_MASK BIT(1)
+#define CMD_INVALID_MASK BIT(0)
+
+/* SPIS_CFG_REG */
+#define SPIS_TX_ENDIAN BIT(7)
+#define SPIS_RX_ENDIAN BIT(6)
+#define SPIS_TXMSBFBIT(5)
+#define SPIS_RXMSBFBIT(4)
+#define SPIS_CPHA BIT(3)
+#define SPIS_CPOL BIT(2)
+#define SPIS_TX_EN BIT(1)
+#define SPIS_RX_EN BIT(0)
+
+/* SPIS_DMA_CFG_REG */
+#define TX_DMA_TRIG_EN BIT(31)
+#define TX_DMA_EN BIT(30)
+#define RX_DMA_EN BIT(29)
+#define TX_DMA_LEN 0xf
+
+/* SPIS_SOFT_RST_REG */
+#define SPIS_DMA_ADDR_EN BIT(1)
+#define SPIS_SOFT_RST BIT(0)
+
+#define MTK_SPI_SLAVE_MAX_FIFO_SIZE 512U
+
+struct mtk_spi_slave {
+ struct device *dev;
+ void __iomem *base;
+ struct clk *spi_clk;
+ struct completion xfer_done;
+ struct spi_transfer *cur_transfer;
+ bool slave_aborted;
+};
+
+static const struct of_device_id mtk_spi_slave_of_match[] = {
+ { .compatible = "mediatek,mt2712-spi-slave", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mtk_spi_slave_of_match);
+
+static void mtk_spi_slave_disable_dma(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);
+ reg_val &= ~RX_DMA_EN;
+ reg_val &= ~TX_DMA_EN;
+ writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);
+}
+
+static void mtk_spi_slave_disable_xfer(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_CFG_REG);
+ reg_val &= ~SPIS_TX_EN;
+ reg_val &= ~SPIS_RX_EN;
+ writel(reg_val, mdata->base + SPIS_CFG_REG);
+}
+
+static int mtk_spi_slave_wait_for_completion(struct mtk_spi_slave *mdata)
+{
+ if (wait_for_completion_interruptible(>xfer_done) ||
+ mdata->slave_aborted) {
+ dev_err(mdata->dev, "interrupted\n");
+ return -EINTR;
[PATCH v5 0/3] Add Mediatek SPI slave driver
>From 5479c692171dc52990290d88c505c074fa4db7d4 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Fri, 28 Sep 2018 18:37:40 +0800 Subject: [PATCH v5 0/3] Add Mediatek SPI slave driver v5: 1. Fix typos in bindings file. v4: 1. Fix Mark Brown review comment about kconfig & driver. v3: 1. Fix Rob Herring review comment about bindings. 2. remove unused variables in driver. v2: 1. Fix Sean Wang review comment. 2. remove unused register and offset define. 3. update bindings file with assigned-clocks and assigned-clocks-parents. v1: This series are based on 4.19-rc1 and provide three patches to add mediatek spi slave driver. Leilk Liu (3): spi: mediatek: add bindings for Mediatek MT2712 soc platform spi: mediatek: add spi slave for Mediatek MT2712 arm64: dts: Add spi slave dts .../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32 ++ arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 + drivers/spi/Kconfig| 10 + drivers/spi/Makefile | 1 + drivers/spi/spi-slave-mt27xx.c | 554 + 5 files changed, 608 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt create mode 100644 drivers/spi/spi-slave-mt27xx.c -- 1.9.1
[PATCH v5 1/3] spi: mediatek: add bindings for Mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
new file mode 100644
index 000..c37e5a1
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
@@ -0,0 +1,32 @@
+Binding for MTK SPI Slave controller
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt2712-spi-slave: for mt2712 platforms
+- reg: Address and length of the register set for the device.
+- interrupts: Should contain spi interrupt.
+- clocks: phandles to input clocks.
+ It's clock gate, and should be < CLK_INFRA_AO_SPI1>.
+- clock-names: should be "spi" for the clock gate.
+
+Optional properties:
+- assigned-clocks: it's mux clock, should be < CLK_TOP_SPISLV_SEL>.
+- assigned-clock-parents: parent of mux clock.
+ It's PLL, and should be one of the following.
+ - < CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
+ It's the default one.
+ - < CLK_TOP_UNIVPLL1_D4>: specify parent clock 156MHZ.
+ - < CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
+ - < CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+
+Example:
+- SoC Specific Portion:
+spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+};
--
1.7.9.5
[PATCH v5 3/3] arm64: dts: Add spi slave dts
This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 75cc0f7..ee627a7 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -301,6 +301,17 @@
status = "disabled";
};
+ spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+ status = "disabled";
+ };
+
apmixedsys: syscon@10209000 {
compatible = "mediatek,mt2712-apmixedsys", "syscon";
reg = <0 0x10209000 0 0x1000>;
--
1.7.9.5
[PATCH v5 3/3] arm64: dts: Add spi slave dts
This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 75cc0f7..ee627a7 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -301,6 +301,17 @@
status = "disabled";
};
+ spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+ status = "disabled";
+ };
+
apmixedsys: syscon@10209000 {
compatible = "mediatek,mt2712-apmixedsys", "syscon";
reg = <0 0x10209000 0 0x1000>;
--
1.7.9.5
[PATCH v4 2/3] spi: mediatek: add spi slave for Mediatek MT2712
This patch adds basic spi slave for MT2712.
Signed-off-by: Leilk Liu
---
drivers/spi/Kconfig| 10 +
drivers/spi/Makefile |1 +
drivers/spi/spi-slave-mt27xx.c | 554
3 files changed, 565 insertions(+)
create mode 100644 drivers/spi/spi-slave-mt27xx.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 671d078..60b13c6 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -596,6 +596,16 @@ config SPI_SIRF
help
SPI driver for CSR SiRFprimaII SoCs
+config SPI_SLAVE_MT27XX
+ tristate "MediaTek SPI slave device"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ depends on SPI_SLAVE
+ help
+ This selects the MediaTek(R) SPI slave device driver.
+ If you want to use MediaTek(R) SPI slave interface,
+ say Y or M here.If you are not sure, say N.
+ SPI slave drivers for Mediatek MT27XX series ARM SoCs.
+
config SPI_SPRD_ADI
tristate "Spreadtrum ADI controller"
depends on ARCH_SPRD || COMPILE_TEST
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a90d559..3b469fa 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -88,6 +88,7 @@ obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o
obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o
obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o
obj-$(CONFIG_SPI_SIRF) += spi-sirf.o
+obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o
obj-$(CONFIG_SPI_SPRD_ADI) += spi-sprd-adi.o
obj-$(CONFIG_SPI_STM32)+= spi-stm32.o
obj-$(CONFIG_SPI_ST_SSC4) += spi-st-ssc4.o
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
new file mode 100644
index 000..d1075433
--- /dev/null
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -0,0 +1,554 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SPIS_IRQ_EN_REG0x0
+#define SPIS_IRQ_CLR_REG 0x4
+#define SPIS_IRQ_ST_REG0x8
+#define SPIS_IRQ_MASK_REG 0xc
+#define SPIS_CFG_REG 0x10
+#define SPIS_RX_DATA_REG 0x14
+#define SPIS_TX_DATA_REG 0x18
+#define SPIS_RX_DST_REG0x1c
+#define SPIS_TX_SRC_REG0x20
+#define SPIS_DMA_CFG_REG 0x30
+#define SPIS_SOFT_RST_REG 0x40
+
+/* SPIS_IRQ_EN_REG */
+#define DMA_DONE_ENBIT(7)
+#define DATA_DONE_EN BIT(2)
+#define RSTA_DONE_EN BIT(1)
+#define CMD_INVALID_EN BIT(0)
+
+/* SPIS_IRQ_ST_REG */
+#define DMA_DONE_STBIT(7)
+#define DATA_DONE_ST BIT(2)
+#define RSTA_DONE_ST BIT(1)
+#define CMD_INVALID_ST BIT(0)
+
+/* SPIS_IRQ_MASK_REG */
+#define DMA_DONE_MASK BIT(7)
+#define DATA_DONE_MASK BIT(2)
+#define RSTA_DONE_MASK BIT(1)
+#define CMD_INVALID_MASK BIT(0)
+
+/* SPIS_CFG_REG */
+#define SPIS_TX_ENDIAN BIT(7)
+#define SPIS_RX_ENDIAN BIT(6)
+#define SPIS_TXMSBFBIT(5)
+#define SPIS_RXMSBFBIT(4)
+#define SPIS_CPHA BIT(3)
+#define SPIS_CPOL BIT(2)
+#define SPIS_TX_EN BIT(1)
+#define SPIS_RX_EN BIT(0)
+
+/* SPIS_DMA_CFG_REG */
+#define TX_DMA_TRIG_EN BIT(31)
+#define TX_DMA_EN BIT(30)
+#define RX_DMA_EN BIT(29)
+#define TX_DMA_LEN 0xf
+
+/* SPIS_SOFT_RST_REG */
+#define SPIS_DMA_ADDR_EN BIT(1)
+#define SPIS_SOFT_RST BIT(0)
+
+#define MTK_SPI_SLAVE_MAX_FIFO_SIZE 512U
+
+struct mtk_spi_slave {
+ struct device *dev;
+ void __iomem *base;
+ struct clk *spi_clk;
+ struct completion xfer_done;
+ struct spi_transfer *cur_transfer;
+ bool slave_aborted;
+};
+
+static const struct of_device_id mtk_spi_slave_of_match[] = {
+ { .compatible = "mediatek,mt2712-spi-slave", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mtk_spi_slave_of_match);
+
+static void mtk_spi_slave_disable_dma(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);
+ reg_val &= ~RX_DMA_EN;
+ reg_val &= ~TX_DMA_EN;
+ writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);
+}
+
+static void mtk_spi_slave_disable_xfer(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_CFG_REG);
+ reg_val &= ~SPIS_TX_EN;
+ reg_val &= ~SPIS_RX_EN;
+ writel(reg_val, mdata->base + SPIS_CFG_REG);
+}
+
+static int mtk_spi_slave_wait_for_completion(struct mtk_spi_slave *mdata)
+{
+ if (wait_for_completion_interruptible(>xfer_done) ||
+ mdata->slave_aborted) {
+ dev_err(mdata->dev, "interrupted\n");
+ return -EINTR;
[PATCH v4 0/3] Add Mediatek SPI slave driver
>From 7f2423debd91771a1d3a5ca02cd3990f1417bcb8 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Tue, 25 Sep 2018 10:11:44 +0800 Subject: Subject: [PATCH v4 0/3] Add Mediatek SPI slave driver v4: 1. Fix Mark Brown review comment about kconfig & driver. v3: 1. Fix Rob Herring review comment about bindings. 2. remove unused variables in driver. v2: 1. Fix Sean Wang review comment. 2. remove unused register and offset define. 3. update bindings file with assigned-clocks and assigned-clocks-parents. v1: This series are based on 4.19-rc1 and provide three patches to add mediatek spi slave driver. Leilk Liu (3): spi: mediatek: add bindings for Mediatek MT2712 soc platform spi: mediatek: add spi slave for Mediatek MT2712 arm64: dts: Add spi slave dts .../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32 ++ arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 + drivers/spi/Kconfig| 10 + drivers/spi/Makefile | 1 + drivers/spi/spi-slave-mt27xx.c | 554 + 5 files changed, 608 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt create mode 100644 drivers/spi/spi-slave-mt27xx.c -- 1.9.1
[PATCH v4 2/3] spi: mediatek: add spi slave for Mediatek MT2712
This patch adds basic spi slave for MT2712.
Signed-off-by: Leilk Liu
---
drivers/spi/Kconfig| 10 +
drivers/spi/Makefile |1 +
drivers/spi/spi-slave-mt27xx.c | 554
3 files changed, 565 insertions(+)
create mode 100644 drivers/spi/spi-slave-mt27xx.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 671d078..60b13c6 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -596,6 +596,16 @@ config SPI_SIRF
help
SPI driver for CSR SiRFprimaII SoCs
+config SPI_SLAVE_MT27XX
+ tristate "MediaTek SPI slave device"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ depends on SPI_SLAVE
+ help
+ This selects the MediaTek(R) SPI slave device driver.
+ If you want to use MediaTek(R) SPI slave interface,
+ say Y or M here.If you are not sure, say N.
+ SPI slave drivers for Mediatek MT27XX series ARM SoCs.
+
config SPI_SPRD_ADI
tristate "Spreadtrum ADI controller"
depends on ARCH_SPRD || COMPILE_TEST
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a90d559..3b469fa 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -88,6 +88,7 @@ obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o
obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o
obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o
obj-$(CONFIG_SPI_SIRF) += spi-sirf.o
+obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o
obj-$(CONFIG_SPI_SPRD_ADI) += spi-sprd-adi.o
obj-$(CONFIG_SPI_STM32)+= spi-stm32.o
obj-$(CONFIG_SPI_ST_SSC4) += spi-st-ssc4.o
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
new file mode 100644
index 000..d1075433
--- /dev/null
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -0,0 +1,554 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SPIS_IRQ_EN_REG0x0
+#define SPIS_IRQ_CLR_REG 0x4
+#define SPIS_IRQ_ST_REG0x8
+#define SPIS_IRQ_MASK_REG 0xc
+#define SPIS_CFG_REG 0x10
+#define SPIS_RX_DATA_REG 0x14
+#define SPIS_TX_DATA_REG 0x18
+#define SPIS_RX_DST_REG0x1c
+#define SPIS_TX_SRC_REG0x20
+#define SPIS_DMA_CFG_REG 0x30
+#define SPIS_SOFT_RST_REG 0x40
+
+/* SPIS_IRQ_EN_REG */
+#define DMA_DONE_ENBIT(7)
+#define DATA_DONE_EN BIT(2)
+#define RSTA_DONE_EN BIT(1)
+#define CMD_INVALID_EN BIT(0)
+
+/* SPIS_IRQ_ST_REG */
+#define DMA_DONE_STBIT(7)
+#define DATA_DONE_ST BIT(2)
+#define RSTA_DONE_ST BIT(1)
+#define CMD_INVALID_ST BIT(0)
+
+/* SPIS_IRQ_MASK_REG */
+#define DMA_DONE_MASK BIT(7)
+#define DATA_DONE_MASK BIT(2)
+#define RSTA_DONE_MASK BIT(1)
+#define CMD_INVALID_MASK BIT(0)
+
+/* SPIS_CFG_REG */
+#define SPIS_TX_ENDIAN BIT(7)
+#define SPIS_RX_ENDIAN BIT(6)
+#define SPIS_TXMSBFBIT(5)
+#define SPIS_RXMSBFBIT(4)
+#define SPIS_CPHA BIT(3)
+#define SPIS_CPOL BIT(2)
+#define SPIS_TX_EN BIT(1)
+#define SPIS_RX_EN BIT(0)
+
+/* SPIS_DMA_CFG_REG */
+#define TX_DMA_TRIG_EN BIT(31)
+#define TX_DMA_EN BIT(30)
+#define RX_DMA_EN BIT(29)
+#define TX_DMA_LEN 0xf
+
+/* SPIS_SOFT_RST_REG */
+#define SPIS_DMA_ADDR_EN BIT(1)
+#define SPIS_SOFT_RST BIT(0)
+
+#define MTK_SPI_SLAVE_MAX_FIFO_SIZE 512U
+
+struct mtk_spi_slave {
+ struct device *dev;
+ void __iomem *base;
+ struct clk *spi_clk;
+ struct completion xfer_done;
+ struct spi_transfer *cur_transfer;
+ bool slave_aborted;
+};
+
+static const struct of_device_id mtk_spi_slave_of_match[] = {
+ { .compatible = "mediatek,mt2712-spi-slave", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mtk_spi_slave_of_match);
+
+static void mtk_spi_slave_disable_dma(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);
+ reg_val &= ~RX_DMA_EN;
+ reg_val &= ~TX_DMA_EN;
+ writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);
+}
+
+static void mtk_spi_slave_disable_xfer(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_CFG_REG);
+ reg_val &= ~SPIS_TX_EN;
+ reg_val &= ~SPIS_RX_EN;
+ writel(reg_val, mdata->base + SPIS_CFG_REG);
+}
+
+static int mtk_spi_slave_wait_for_completion(struct mtk_spi_slave *mdata)
+{
+ if (wait_for_completion_interruptible(>xfer_done) ||
+ mdata->slave_aborted) {
+ dev_err(mdata->dev, "interrupted\n");
+ return -EINTR;
[PATCH v4 0/3] Add Mediatek SPI slave driver
>From 7f2423debd91771a1d3a5ca02cd3990f1417bcb8 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Tue, 25 Sep 2018 10:11:44 +0800 Subject: Subject: [PATCH v4 0/3] Add Mediatek SPI slave driver v4: 1. Fix Mark Brown review comment about kconfig & driver. v3: 1. Fix Rob Herring review comment about bindings. 2. remove unused variables in driver. v2: 1. Fix Sean Wang review comment. 2. remove unused register and offset define. 3. update bindings file with assigned-clocks and assigned-clocks-parents. v1: This series are based on 4.19-rc1 and provide three patches to add mediatek spi slave driver. Leilk Liu (3): spi: mediatek: add bindings for Mediatek MT2712 soc platform spi: mediatek: add spi slave for Mediatek MT2712 arm64: dts: Add spi slave dts .../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32 ++ arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 + drivers/spi/Kconfig| 10 + drivers/spi/Makefile | 1 + drivers/spi/spi-slave-mt27xx.c | 554 + 5 files changed, 608 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt create mode 100644 drivers/spi/spi-slave-mt27xx.c -- 1.9.1
[PATCH v4 1/3] spi: mediatek: add bindings for Mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
new file mode 100644
index 000..09cb2c4
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
@@ -0,0 +1,32 @@
+Binding for MTK SPI Slave controller
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt2712-spi-slave: for mt2712 platforms
+- reg: Address and length of the register set for the device.
+- interrupts: Should contain spi interrupt.
+- clocks: phandles to input clocks.
+ It's clock gate, and should be < CLK_INFRA_AO_SPI1>.
+- clock-names: should be "spi" for the clock gate.
+
+Optional properties:
+- assigned-clocks: it's mux clock, should be < CLK_TOP_SPISLV_SEL>.
+- assigned-clock-parents: parent of mux clock.
+ It's PLL, and should be on of the following.
+ - < CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
+ It's the default one.
+ - < CLK_TOP_UNIVPLL1_D4>: specify parent clock 156MHZ.
+ - < CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
+ - < CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+
+Example:
+- SoC Specific Portion:
+spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+};
--
1.7.9.5
[PATCH v4 1/3] spi: mediatek: add bindings for Mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
new file mode 100644
index 000..09cb2c4
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
@@ -0,0 +1,32 @@
+Binding for MTK SPI Slave controller
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt2712-spi-slave: for mt2712 platforms
+- reg: Address and length of the register set for the device.
+- interrupts: Should contain spi interrupt.
+- clocks: phandles to input clocks.
+ It's clock gate, and should be < CLK_INFRA_AO_SPI1>.
+- clock-names: should be "spi" for the clock gate.
+
+Optional properties:
+- assigned-clocks: it's mux clock, should be < CLK_TOP_SPISLV_SEL>.
+- assigned-clock-parents: parent of mux clock.
+ It's PLL, and should be on of the following.
+ - < CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
+ It's the default one.
+ - < CLK_TOP_UNIVPLL1_D4>: specify parent clock 156MHZ.
+ - < CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
+ - < CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+
+Example:
+- SoC Specific Portion:
+spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+};
--
1.7.9.5
[PATCH v4 3/3] arm64: dts: Add spi slave dts
This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 75cc0f7..ee627a7 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -301,6 +301,17 @@
status = "disabled";
};
+ spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+ status = "disabled";
+ };
+
apmixedsys: syscon@10209000 {
compatible = "mediatek,mt2712-apmixedsys", "syscon";
reg = <0 0x10209000 0 0x1000>;
--
1.7.9.5
[PATCH v4 3/3] arm64: dts: Add spi slave dts
This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 75cc0f7..ee627a7 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -301,6 +301,17 @@
status = "disabled";
};
+ spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+ status = "disabled";
+ };
+
apmixedsys: syscon@10209000 {
compatible = "mediatek,mt2712-apmixedsys", "syscon";
reg = <0 0x10209000 0 0x1000>;
--
1.7.9.5
[PATCH v3 0/3] Add Mediatek SPI slave driver
>From 82bced99683343899dea4634452940b15d6374eb Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Mon, 17 Sep 2018 10:07:45 +0800 Subject: [PATCH v3 0/3] Add Mediatek SPI slave driver v3: 1. Fix Rob Herring review comment about bindings. 2. remove unused variables in driver. v2: 1. Fix Sean Wang review comment. 2. remove unused register and offset define. 3. update bindings file with assigned-clocks and assigned-clocks-parents. v1: This series are based on 4.19-rc1 and provide three patches to add mediatek spi slave driver. Leilk Liu (3): spis: mediatek: add bindings for Mediatek MT2712 soc platform spis: mediatek: add spi slave for Mediatek MT2712 arm64: dts: Add spi slave dts .../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32 ++ arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 + drivers/spi/Kconfig| 8 + drivers/spi/Makefile | 1 + drivers/spi/spi-slave-mt27xx.c | 553 + 5 files changed, 605 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt create mode 100644 drivers/spi/spi-slave-mt27xx.c -- 1.9.1
[PATCH v3 3/3] arm64: dts: Add spi slave dts
This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 75cc0f7..ee627a7 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -301,6 +301,17 @@
status = "disabled";
};
+ spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+ status = "disabled";
+ };
+
apmixedsys: syscon@10209000 {
compatible = "mediatek,mt2712-apmixedsys", "syscon";
reg = <0 0x10209000 0 0x1000>;
--
1.7.9.5
[PATCH v3 2/3] spis: mediatek: add spi slave for Mediatek MT2712
This patchs add basic spi slave for MT2712.
Signed-off-by: Leilk Liu
---
drivers/spi/Kconfig|8 +
drivers/spi/Makefile |1 +
drivers/spi/spi-slave-mt27xx.c | 553
3 files changed, 562 insertions(+)
create mode 100644 drivers/spi/spi-slave-mt27xx.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 671d078..86ef6a5 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -802,6 +802,14 @@ config SPI_SLAVE
slave protocol handlers.
if SPI_SLAVE
+config SPI_SLAVE_MT27XX
+ tristate "MediaTek SPI slave device"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ help
+ This selects the MediaTek(R) SPI slave device driver.
+ If you want to use MediaTek(R) SPI slave interface,
+ say Y or M here.If you are not sure, say N.
+ SPI slave drivers for Mediatek MT27XX series ARM SoCs.
config SPI_SLAVE_TIME
tristate "SPI slave handler reporting boot up time"
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a90d559..a5e7b3c 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -109,5 +109,6 @@ obj-$(CONFIG_SPI_XTENSA_XTFPGA) +=
spi-xtensa-xtfpga.o
obj-$(CONFIG_SPI_ZYNQMP_GQSPI) += spi-zynqmp-gqspi.o
# SPI slave protocol handlers
+obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o
obj-$(CONFIG_SPI_SLAVE_TIME) += spi-slave-time.o
obj-$(CONFIG_SPI_SLAVE_SYSTEM_CONTROL) += spi-slave-system-control.o
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
new file mode 100644
index 000..2e59339
--- /dev/null
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -0,0 +1,553 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SPIS_IRQ_EN_REG0x0
+#define SPIS_IRQ_CLR_REG 0x4
+#define SPIS_IRQ_ST_REG0x8
+#define SPIS_IRQ_MASK_REG 0xc
+#define SPIS_CFG_REG 0x10
+#define SPIS_RX_DATA_REG 0x14
+#define SPIS_TX_DATA_REG 0x18
+#define SPIS_RX_DST_REG0x1c
+#define SPIS_TX_SRC_REG0x20
+#define SPIS_DMA_CFG_REG 0x30
+#define SPIS_SOFT_RST_REG 0x40
+
+/* SPIS_IRQ_EN_REG */
+#define DMA_DONE_ENBIT(7)
+#define DATA_DONE_EN BIT(2)
+#define RSTA_DONE_EN BIT(1)
+#define CMD_INVALID_EN BIT(0)
+
+/* SPIS_IRQ_ST_REG */
+#define DMA_DONE_STBIT(7)
+#define DATA_DONE_ST BIT(2)
+#define RSTA_DONE_ST BIT(1)
+#define CMD_INVALID_ST BIT(0)
+
+/* SPIS_IRQ_MASK_REG */
+#define DMA_DONE_MASK BIT(7)
+#define DATA_DONE_MASK BIT(2)
+#define RSTA_DONE_MASK BIT(1)
+#define CMD_INVALID_MASK BIT(0)
+
+/* SPIS_CFG_REG */
+#define SPIS_TX_ENDIAN BIT(7)
+#define SPIS_RX_ENDIAN BIT(6)
+#define SPIS_TXMSBFBIT(5)
+#define SPIS_RXMSBFBIT(4)
+#define SPIS_CPHA BIT(3)
+#define SPIS_CPOL BIT(2)
+#define SPIS_TX_EN BIT(1)
+#define SPIS_RX_EN BIT(0)
+
+/* SPIS_DMA_CFG_REG */
+#define TX_DMA_TRIG_EN BIT(31)
+#define TX_DMA_EN BIT(30)
+#define RX_DMA_EN BIT(29)
+#define TX_DMA_LEN 0xf
+
+/* SPIS_SOFT_RST_REG */
+#define SPIS_DMA_ADDR_EN BIT(1)
+#define SPIS_SOFT_RST BIT(0)
+
+#define MTK_SPI_SLAVE_MAX_FIFO_SIZE 512U
+
+struct mtk_spi_slave {
+ struct device *dev;
+ void __iomem *base;
+ struct clk *spi_clk;
+ struct completion xfer_done;
+ struct spi_transfer *cur_transfer;
+ bool slave_aborted;
+};
+
+static const struct of_device_id mtk_spi_slave_of_match[] = {
+ { .compatible = "mediatek,mt2712-spi-slave", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mtk_spi_slave_of_match);
+
+static void mtk_spi_slave_disable_dma(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);
+ reg_val &= ~RX_DMA_EN;
+ reg_val &= ~TX_DMA_EN;
+ writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);
+}
+
+static void mtk_spi_slave_disable_xfer(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_CFG_REG);
+ reg_val &= ~SPIS_TX_EN;
+ reg_val &= ~SPIS_RX_EN;
+ writel(reg_val, mdata->base + SPIS_CFG_REG);
+}
+
+static int mtk_spi_slave_wait_for_completion(struct mtk_spi_slave *mdata)
+{
+ if (wait_for_completion_interruptible(>xfer_done) ||
+ mdata->slave_aborted) {
+ dev_err(mdata->dev, "interrupted\n");
+ return -EINTR;
+ }
+
+ return 0;
+}
+
+static int mtk_spi_slave_prepare_message(struct spi_controller *ctlr,
+
[PATCH v3 1/3] spis: mediatek: add bindings for Mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
new file mode 100644
index 000..09cb2c4
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
@@ -0,0 +1,32 @@
+Binding for MTK SPI Slave controller
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt2712-spi-slave: for mt2712 platforms
+- reg: Address and length of the register set for the device.
+- interrupts: Should contain spi interrupt.
+- clocks: phandles to input clocks.
+ It's clock gate, and should be < CLK_INFRA_AO_SPI1>.
+- clock-names: should be "spi" for the clock gate.
+
+Optional properties:
+- assigned-clocks: it's mux clock, should be < CLK_TOP_SPISLV_SEL>.
+- assigned-clock-parents: parent of mux clock.
+ It's PLL, and should be on of the following.
+ - < CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
+ It's the default one.
+ - < CLK_TOP_UNIVPLL1_D4>: specify parent clock 156MHZ.
+ - < CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
+ - < CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+
+Example:
+- SoC Specific Portion:
+spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+};
--
1.7.9.5
[PATCH v3 0/3] Add Mediatek SPI slave driver
>From 82bced99683343899dea4634452940b15d6374eb Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Mon, 17 Sep 2018 10:07:45 +0800 Subject: [PATCH v3 0/3] Add Mediatek SPI slave driver v3: 1. Fix Rob Herring review comment about bindings. 2. remove unused variables in driver. v2: 1. Fix Sean Wang review comment. 2. remove unused register and offset define. 3. update bindings file with assigned-clocks and assigned-clocks-parents. v1: This series are based on 4.19-rc1 and provide three patches to add mediatek spi slave driver. Leilk Liu (3): spis: mediatek: add bindings for Mediatek MT2712 soc platform spis: mediatek: add spi slave for Mediatek MT2712 arm64: dts: Add spi slave dts .../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32 ++ arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 + drivers/spi/Kconfig| 8 + drivers/spi/Makefile | 1 + drivers/spi/spi-slave-mt27xx.c | 553 + 5 files changed, 605 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt create mode 100644 drivers/spi/spi-slave-mt27xx.c -- 1.9.1
[PATCH v3 3/3] arm64: dts: Add spi slave dts
This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 75cc0f7..ee627a7 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -301,6 +301,17 @@
status = "disabled";
};
+ spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+ status = "disabled";
+ };
+
apmixedsys: syscon@10209000 {
compatible = "mediatek,mt2712-apmixedsys", "syscon";
reg = <0 0x10209000 0 0x1000>;
--
1.7.9.5
[PATCH v3 2/3] spis: mediatek: add spi slave for Mediatek MT2712
This patchs add basic spi slave for MT2712.
Signed-off-by: Leilk Liu
---
drivers/spi/Kconfig|8 +
drivers/spi/Makefile |1 +
drivers/spi/spi-slave-mt27xx.c | 553
3 files changed, 562 insertions(+)
create mode 100644 drivers/spi/spi-slave-mt27xx.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 671d078..86ef6a5 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -802,6 +802,14 @@ config SPI_SLAVE
slave protocol handlers.
if SPI_SLAVE
+config SPI_SLAVE_MT27XX
+ tristate "MediaTek SPI slave device"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ help
+ This selects the MediaTek(R) SPI slave device driver.
+ If you want to use MediaTek(R) SPI slave interface,
+ say Y or M here.If you are not sure, say N.
+ SPI slave drivers for Mediatek MT27XX series ARM SoCs.
config SPI_SLAVE_TIME
tristate "SPI slave handler reporting boot up time"
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a90d559..a5e7b3c 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -109,5 +109,6 @@ obj-$(CONFIG_SPI_XTENSA_XTFPGA) +=
spi-xtensa-xtfpga.o
obj-$(CONFIG_SPI_ZYNQMP_GQSPI) += spi-zynqmp-gqspi.o
# SPI slave protocol handlers
+obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o
obj-$(CONFIG_SPI_SLAVE_TIME) += spi-slave-time.o
obj-$(CONFIG_SPI_SLAVE_SYSTEM_CONTROL) += spi-slave-system-control.o
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
new file mode 100644
index 000..2e59339
--- /dev/null
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -0,0 +1,553 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SPIS_IRQ_EN_REG0x0
+#define SPIS_IRQ_CLR_REG 0x4
+#define SPIS_IRQ_ST_REG0x8
+#define SPIS_IRQ_MASK_REG 0xc
+#define SPIS_CFG_REG 0x10
+#define SPIS_RX_DATA_REG 0x14
+#define SPIS_TX_DATA_REG 0x18
+#define SPIS_RX_DST_REG0x1c
+#define SPIS_TX_SRC_REG0x20
+#define SPIS_DMA_CFG_REG 0x30
+#define SPIS_SOFT_RST_REG 0x40
+
+/* SPIS_IRQ_EN_REG */
+#define DMA_DONE_ENBIT(7)
+#define DATA_DONE_EN BIT(2)
+#define RSTA_DONE_EN BIT(1)
+#define CMD_INVALID_EN BIT(0)
+
+/* SPIS_IRQ_ST_REG */
+#define DMA_DONE_STBIT(7)
+#define DATA_DONE_ST BIT(2)
+#define RSTA_DONE_ST BIT(1)
+#define CMD_INVALID_ST BIT(0)
+
+/* SPIS_IRQ_MASK_REG */
+#define DMA_DONE_MASK BIT(7)
+#define DATA_DONE_MASK BIT(2)
+#define RSTA_DONE_MASK BIT(1)
+#define CMD_INVALID_MASK BIT(0)
+
+/* SPIS_CFG_REG */
+#define SPIS_TX_ENDIAN BIT(7)
+#define SPIS_RX_ENDIAN BIT(6)
+#define SPIS_TXMSBFBIT(5)
+#define SPIS_RXMSBFBIT(4)
+#define SPIS_CPHA BIT(3)
+#define SPIS_CPOL BIT(2)
+#define SPIS_TX_EN BIT(1)
+#define SPIS_RX_EN BIT(0)
+
+/* SPIS_DMA_CFG_REG */
+#define TX_DMA_TRIG_EN BIT(31)
+#define TX_DMA_EN BIT(30)
+#define RX_DMA_EN BIT(29)
+#define TX_DMA_LEN 0xf
+
+/* SPIS_SOFT_RST_REG */
+#define SPIS_DMA_ADDR_EN BIT(1)
+#define SPIS_SOFT_RST BIT(0)
+
+#define MTK_SPI_SLAVE_MAX_FIFO_SIZE 512U
+
+struct mtk_spi_slave {
+ struct device *dev;
+ void __iomem *base;
+ struct clk *spi_clk;
+ struct completion xfer_done;
+ struct spi_transfer *cur_transfer;
+ bool slave_aborted;
+};
+
+static const struct of_device_id mtk_spi_slave_of_match[] = {
+ { .compatible = "mediatek,mt2712-spi-slave", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mtk_spi_slave_of_match);
+
+static void mtk_spi_slave_disable_dma(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);
+ reg_val &= ~RX_DMA_EN;
+ reg_val &= ~TX_DMA_EN;
+ writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);
+}
+
+static void mtk_spi_slave_disable_xfer(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_CFG_REG);
+ reg_val &= ~SPIS_TX_EN;
+ reg_val &= ~SPIS_RX_EN;
+ writel(reg_val, mdata->base + SPIS_CFG_REG);
+}
+
+static int mtk_spi_slave_wait_for_completion(struct mtk_spi_slave *mdata)
+{
+ if (wait_for_completion_interruptible(>xfer_done) ||
+ mdata->slave_aborted) {
+ dev_err(mdata->dev, "interrupted\n");
+ return -EINTR;
+ }
+
+ return 0;
+}
+
+static int mtk_spi_slave_prepare_message(struct spi_controller *ctlr,
+
[PATCH v3 1/3] spis: mediatek: add bindings for Mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-slave-mt27xx.txt | 32
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
new file mode 100644
index 000..09cb2c4
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
@@ -0,0 +1,32 @@
+Binding for MTK SPI Slave controller
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt2712-spi-slave: for mt2712 platforms
+- reg: Address and length of the register set for the device.
+- interrupts: Should contain spi interrupt.
+- clocks: phandles to input clocks.
+ It's clock gate, and should be < CLK_INFRA_AO_SPI1>.
+- clock-names: should be "spi" for the clock gate.
+
+Optional properties:
+- assigned-clocks: it's mux clock, should be < CLK_TOP_SPISLV_SEL>.
+- assigned-clock-parents: parent of mux clock.
+ It's PLL, and should be on of the following.
+ - < CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
+ It's the default one.
+ - < CLK_TOP_UNIVPLL1_D4>: specify parent clock 156MHZ.
+ - < CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
+ - < CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+
+Example:
+- SoC Specific Portion:
+spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+};
--
1.7.9.5
[PATCH v2 2/3] spis: mediatek: add spi slave for Mediatek MT2712
This patchs add basic spi slave for MT2712.
Signed-off-by: Leilk Liu
---
drivers/spi/Kconfig|8 +
drivers/spi/Makefile |1 +
drivers/spi/spi-slave-mt27xx.c | 557
3 files changed, 566 insertions(+)
create mode 100644 drivers/spi/spi-slave-mt27xx.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 671d078..86ef6a5 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -802,6 +802,14 @@ config SPI_SLAVE
slave protocol handlers.
if SPI_SLAVE
+config SPI_SLAVE_MT27XX
+ tristate "MediaTek SPI slave device"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ help
+ This selects the MediaTek(R) SPI slave device driver.
+ If you want to use MediaTek(R) SPI slave interface,
+ say Y or M here.If you are not sure, say N.
+ SPI slave drivers for Mediatek MT27XX series ARM SoCs.
config SPI_SLAVE_TIME
tristate "SPI slave handler reporting boot up time"
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a90d559..a5e7b3c 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -109,5 +109,6 @@ obj-$(CONFIG_SPI_XTENSA_XTFPGA) +=
spi-xtensa-xtfpga.o
obj-$(CONFIG_SPI_ZYNQMP_GQSPI) += spi-zynqmp-gqspi.o
# SPI slave protocol handlers
+obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o
obj-$(CONFIG_SPI_SLAVE_TIME) += spi-slave-time.o
obj-$(CONFIG_SPI_SLAVE_SYSTEM_CONTROL) += spi-slave-system-control.o
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
new file mode 100644
index 000..b9a49a9
--- /dev/null
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -0,0 +1,557 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SPIS_IRQ_EN_REG0x0
+#define SPIS_IRQ_CLR_REG 0x4
+#define SPIS_IRQ_ST_REG0x8
+#define SPIS_IRQ_MASK_REG 0xc
+#define SPIS_CFG_REG 0x10
+#define SPIS_RX_DATA_REG 0x14
+#define SPIS_TX_DATA_REG 0x18
+#define SPIS_RX_DST_REG0x1c
+#define SPIS_TX_SRC_REG0x20
+#define SPIS_DMA_CFG_REG 0x30
+#define SPIS_SOFT_RST_REG 0x40
+
+/* SPIS_IRQ_EN_REG */
+#define DMA_DONE_ENBIT(7)
+#define DATA_DONE_EN BIT(2)
+#define RSTA_DONE_EN BIT(1)
+#define CMD_INVALID_EN BIT(0)
+
+/* SPIS_IRQ_ST_REG */
+#define DMA_DONE_STBIT(7)
+#define DATA_DONE_ST BIT(2)
+#define RSTA_DONE_ST BIT(1)
+#define CMD_INVALID_ST BIT(0)
+
+/* SPIS_IRQ_MASK_REG */
+#define DMA_DONE_MASK BIT(7)
+#define DATA_DONE_MASK BIT(2)
+#define RSTA_DONE_MASK BIT(1)
+#define CMD_INVALID_MASK BIT(0)
+
+/* SPIS_CFG_REG */
+#define SPIS_TX_ENDIAN BIT(7)
+#define SPIS_RX_ENDIAN BIT(6)
+#define SPIS_TXMSBFBIT(5)
+#define SPIS_RXMSBFBIT(4)
+#define SPIS_CPHA BIT(3)
+#define SPIS_CPOL BIT(2)
+#define SPIS_TX_EN BIT(1)
+#define SPIS_RX_EN BIT(0)
+
+/* SPIS_DMA_CFG_REG */
+#define TX_DMA_TRIG_EN BIT(31)
+#define TX_DMA_EN BIT(30)
+#define RX_DMA_EN BIT(29)
+#define TX_DMA_LEN 0xf
+
+/* SPIS_SOFT_RST_REG */
+#define SPIS_DMA_ADDR_EN BIT(1)
+#define SPIS_SOFT_RST BIT(0)
+
+#define MTK_SPI_SLAVE_MAX_FIFO_SIZE 512U
+
+struct mtk_spi_slave {
+ struct device *dev;
+ void __iomem *base;
+ struct clk *spi_clk;
+ struct completion xfer_done;
+ struct spi_transfer *cur_transfer;
+ bool slave_aborted;
+};
+
+static const struct of_device_id mtk_spi_slave_of_match[] = {
+ { .compatible = "mediatek,mt2712-spi-slave", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mtk_spi_slave_of_match);
+
+static void mtk_spi_slave_disable_dma(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);
+ reg_val &= ~RX_DMA_EN;
+ reg_val &= ~TX_DMA_EN;
+ writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);
+}
+
+static void mtk_spi_slave_disable_xfer(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_CFG_REG);
+ reg_val &= ~SPIS_TX_EN;
+ reg_val &= ~SPIS_RX_EN;
+ writel(reg_val, mdata->base + SPIS_CFG_REG);
+}
+
+static int mtk_spi_slave_wait_for_completion(struct mtk_spi_slave *mdata)
+{
+ if (wait_for_completion_interruptible(>xfer_done) ||
+ mdata->slave_aborted) {
+ dev_err(mdata->dev, "interrupted\n");
+ return -EINTR;
+ }
+
+ return 0;
+}
+
+static int mtk_spi_slave_prepare_message(struct spi_controller *ctlr,
+
[PATCH v2 2/3] spis: mediatek: add spi slave for Mediatek MT2712
This patchs add basic spi slave for MT2712.
Signed-off-by: Leilk Liu
---
drivers/spi/Kconfig|8 +
drivers/spi/Makefile |1 +
drivers/spi/spi-slave-mt27xx.c | 557
3 files changed, 566 insertions(+)
create mode 100644 drivers/spi/spi-slave-mt27xx.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 671d078..86ef6a5 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -802,6 +802,14 @@ config SPI_SLAVE
slave protocol handlers.
if SPI_SLAVE
+config SPI_SLAVE_MT27XX
+ tristate "MediaTek SPI slave device"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ help
+ This selects the MediaTek(R) SPI slave device driver.
+ If you want to use MediaTek(R) SPI slave interface,
+ say Y or M here.If you are not sure, say N.
+ SPI slave drivers for Mediatek MT27XX series ARM SoCs.
config SPI_SLAVE_TIME
tristate "SPI slave handler reporting boot up time"
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a90d559..a5e7b3c 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -109,5 +109,6 @@ obj-$(CONFIG_SPI_XTENSA_XTFPGA) +=
spi-xtensa-xtfpga.o
obj-$(CONFIG_SPI_ZYNQMP_GQSPI) += spi-zynqmp-gqspi.o
# SPI slave protocol handlers
+obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o
obj-$(CONFIG_SPI_SLAVE_TIME) += spi-slave-time.o
obj-$(CONFIG_SPI_SLAVE_SYSTEM_CONTROL) += spi-slave-system-control.o
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
new file mode 100644
index 000..b9a49a9
--- /dev/null
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -0,0 +1,557 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SPIS_IRQ_EN_REG0x0
+#define SPIS_IRQ_CLR_REG 0x4
+#define SPIS_IRQ_ST_REG0x8
+#define SPIS_IRQ_MASK_REG 0xc
+#define SPIS_CFG_REG 0x10
+#define SPIS_RX_DATA_REG 0x14
+#define SPIS_TX_DATA_REG 0x18
+#define SPIS_RX_DST_REG0x1c
+#define SPIS_TX_SRC_REG0x20
+#define SPIS_DMA_CFG_REG 0x30
+#define SPIS_SOFT_RST_REG 0x40
+
+/* SPIS_IRQ_EN_REG */
+#define DMA_DONE_ENBIT(7)
+#define DATA_DONE_EN BIT(2)
+#define RSTA_DONE_EN BIT(1)
+#define CMD_INVALID_EN BIT(0)
+
+/* SPIS_IRQ_ST_REG */
+#define DMA_DONE_STBIT(7)
+#define DATA_DONE_ST BIT(2)
+#define RSTA_DONE_ST BIT(1)
+#define CMD_INVALID_ST BIT(0)
+
+/* SPIS_IRQ_MASK_REG */
+#define DMA_DONE_MASK BIT(7)
+#define DATA_DONE_MASK BIT(2)
+#define RSTA_DONE_MASK BIT(1)
+#define CMD_INVALID_MASK BIT(0)
+
+/* SPIS_CFG_REG */
+#define SPIS_TX_ENDIAN BIT(7)
+#define SPIS_RX_ENDIAN BIT(6)
+#define SPIS_TXMSBFBIT(5)
+#define SPIS_RXMSBFBIT(4)
+#define SPIS_CPHA BIT(3)
+#define SPIS_CPOL BIT(2)
+#define SPIS_TX_EN BIT(1)
+#define SPIS_RX_EN BIT(0)
+
+/* SPIS_DMA_CFG_REG */
+#define TX_DMA_TRIG_EN BIT(31)
+#define TX_DMA_EN BIT(30)
+#define RX_DMA_EN BIT(29)
+#define TX_DMA_LEN 0xf
+
+/* SPIS_SOFT_RST_REG */
+#define SPIS_DMA_ADDR_EN BIT(1)
+#define SPIS_SOFT_RST BIT(0)
+
+#define MTK_SPI_SLAVE_MAX_FIFO_SIZE 512U
+
+struct mtk_spi_slave {
+ struct device *dev;
+ void __iomem *base;
+ struct clk *spi_clk;
+ struct completion xfer_done;
+ struct spi_transfer *cur_transfer;
+ bool slave_aborted;
+};
+
+static const struct of_device_id mtk_spi_slave_of_match[] = {
+ { .compatible = "mediatek,mt2712-spi-slave", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mtk_spi_slave_of_match);
+
+static void mtk_spi_slave_disable_dma(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);
+ reg_val &= ~RX_DMA_EN;
+ reg_val &= ~TX_DMA_EN;
+ writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);
+}
+
+static void mtk_spi_slave_disable_xfer(struct mtk_spi_slave *mdata)
+{
+ u32 reg_val;
+
+ reg_val = readl(mdata->base + SPIS_CFG_REG);
+ reg_val &= ~SPIS_TX_EN;
+ reg_val &= ~SPIS_RX_EN;
+ writel(reg_val, mdata->base + SPIS_CFG_REG);
+}
+
+static int mtk_spi_slave_wait_for_completion(struct mtk_spi_slave *mdata)
+{
+ if (wait_for_completion_interruptible(>xfer_done) ||
+ mdata->slave_aborted) {
+ dev_err(mdata->dev, "interrupted\n");
+ return -EINTR;
+ }
+
+ return 0;
+}
+
+static int mtk_spi_slave_prepare_message(struct spi_controller *ctlr,
+
[PATCH v2 3/3] arm64: dts: Add spi slave dts
This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 75cc0f7..59b3c3c 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -301,6 +301,18 @@
status = "disabled";
};
+ spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi-clk";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+ spi-slave;
+ status = "disabled";
+ };
+
apmixedsys: syscon@10209000 {
compatible = "mediatek,mt2712-apmixedsys", "syscon";
reg = <0 0x10209000 0 0x1000>;
--
1.7.9.5
[PATCH v2 1/3] spis: mediatek: add bindings for Mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-slave-mt27xx.txt | 35
1 file changed, 35 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
new file mode 100644
index 000..d379369
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
@@ -0,0 +1,35 @@
+Binding for MTK SPI Slave controller
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt2712-spi-slave: for mt2712 platforms
+- reg: Address and length of the register set for the device.
+- interrupts: Should contain spi interrupt.
+- clocks: phandles to input clocks.
+ It's clock gate, and should be < CLK_INFRA_AO_SPI1>.
+- clock-names: should be "spi-clk" for the clock gate.
+- spi-slave: Empty property indicating the SPI controller is used in slave
mode.
+
+Optional properties:
+- assigned-clocks: it's mux clock, should be < CLK_TOP_SPISLV_SEL>.
+- assigned-clock-parents: parent of mux clock.
+ It's PLL, and should be on of the following.
+ - < CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
+ It's the default one.
+ - < CLK_TOP_UNIVPLL1_D4>: specify parent clock 156MHZ.
+ - < CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
+ - < CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+
+Example:
+- SoC Specific Portion:
+spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi-clk";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+ spi-slave;
+ status = "disabled";
+};
--
1.7.9.5
[PATCH v2 0/3] Add Mediatek SPI slave driver
>From c211d55c612b1fb43e3a5f137e8cacbd347beee5 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Tue, 4 Sep 2018 09:38:00 +0800 Subject: [PATCH v2 0/3] Add Mediatek SPI slave driver v2: 1. Fix Sean Wang review comment. 2. remove unused register and offset define. 3. update bindings file with assigned-clocks and assigned-clocks-parents. v1: This series are based on 4.19-rc1 and provide three patches to add mediatek spi slave driver. Leilk Liu (3): spis: mediatek: add bindings for Mediatek MT2712 soc platform spis: mediatek: add spi slave for Mediatek MT2712 arm64: dts: Add spi slave dts .../devicetree/bindings/spi/spi-slave-mt27xx.txt | 35 ++ arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 12 + drivers/spi/Kconfig| 8 + drivers/spi/Makefile | 1 + drivers/spi/spi-slave-mt27xx.c | 557 + 5 files changed, 613 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt create mode 100644 drivers/spi/spi-slave-mt27xx.c -- 1.9.1
[PATCH v2 3/3] arm64: dts: Add spi slave dts
This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 75cc0f7..59b3c3c 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -301,6 +301,18 @@
status = "disabled";
};
+ spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi-clk";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+ spi-slave;
+ status = "disabled";
+ };
+
apmixedsys: syscon@10209000 {
compatible = "mediatek,mt2712-apmixedsys", "syscon";
reg = <0 0x10209000 0 0x1000>;
--
1.7.9.5
[PATCH v2 1/3] spis: mediatek: add bindings for Mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-slave-mt27xx.txt | 35
1 file changed, 35 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
new file mode 100644
index 000..d379369
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
@@ -0,0 +1,35 @@
+Binding for MTK SPI Slave controller
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt2712-spi-slave: for mt2712 platforms
+- reg: Address and length of the register set for the device.
+- interrupts: Should contain spi interrupt.
+- clocks: phandles to input clocks.
+ It's clock gate, and should be < CLK_INFRA_AO_SPI1>.
+- clock-names: should be "spi-clk" for the clock gate.
+- spi-slave: Empty property indicating the SPI controller is used in slave
mode.
+
+Optional properties:
+- assigned-clocks: it's mux clock, should be < CLK_TOP_SPISLV_SEL>.
+- assigned-clock-parents: parent of mux clock.
+ It's PLL, and should be on of the following.
+ - < CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
+ It's the default one.
+ - < CLK_TOP_UNIVPLL1_D4>: specify parent clock 156MHZ.
+ - < CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
+ - < CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+
+Example:
+- SoC Specific Portion:
+spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_INFRA_AO_SPI1>;
+ clock-names = "spi-clk";
+ assigned-clocks = < CLK_TOP_SPISLV_SEL>;
+ assigned-clock-parents = < CLK_TOP_UNIVPLL1_D2>;
+ spi-slave;
+ status = "disabled";
+};
--
1.7.9.5
[PATCH v2 0/3] Add Mediatek SPI slave driver
>From c211d55c612b1fb43e3a5f137e8cacbd347beee5 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Tue, 4 Sep 2018 09:38:00 +0800 Subject: [PATCH v2 0/3] Add Mediatek SPI slave driver v2: 1. Fix Sean Wang review comment. 2. remove unused register and offset define. 3. update bindings file with assigned-clocks and assigned-clocks-parents. v1: This series are based on 4.19-rc1 and provide three patches to add mediatek spi slave driver. Leilk Liu (3): spis: mediatek: add bindings for Mediatek MT2712 soc platform spis: mediatek: add spi slave for Mediatek MT2712 arm64: dts: Add spi slave dts .../devicetree/bindings/spi/spi-slave-mt27xx.txt | 35 ++ arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 12 + drivers/spi/Kconfig| 8 + drivers/spi/Makefile | 1 + drivers/spi/spi-slave-mt27xx.c | 557 + 5 files changed, 613 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt create mode 100644 drivers/spi/spi-slave-mt27xx.c -- 1.9.1
[PATCH 3/3] arm64: dts: Add spi slave dts
This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 75cc0f7..064419b 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -301,6 +301,18 @@
status = "disabled";
};
+ spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_TOP_UNIVPLL1_D2>,
+ < CLK_TOP_SPISLV_SEL>,
+ < CLK_INFRA_AO_SPI1>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ spi-slave;
+ status = "disabled";
+ };
+
apmixedsys: syscon@10209000 {
compatible = "mediatek,mt2712-apmixedsys", "syscon";
reg = <0 0x10209000 0 0x1000>;
--
1.7.9.5
[PATCH 2/3] spis: mediatek: add spi slave for Mediatek MT2712
This patchs add basic spi slave for MT2712.
Signed-off-by: Leilk Liu
---
drivers/spi/Kconfig|8 +
drivers/spi/Makefile |1 +
drivers/spi/spi-slave-mt27xx.c | 613
3 files changed, 622 insertions(+)
create mode 100644 drivers/spi/spi-slave-mt27xx.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 671d078..86ef6a5 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -802,6 +802,14 @@ config SPI_SLAVE
slave protocol handlers.
if SPI_SLAVE
+config SPI_SLAVE_MT27XX
+ tristate "MediaTek SPI slave device"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ help
+ This selects the MediaTek(R) SPI slave device driver.
+ If you want to use MediaTek(R) SPI slave interface,
+ say Y or M here.If you are not sure, say N.
+ SPI slave drivers for Mediatek MT27XX series ARM SoCs.
config SPI_SLAVE_TIME
tristate "SPI slave handler reporting boot up time"
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a90d559..a5e7b3c 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -109,5 +109,6 @@ obj-$(CONFIG_SPI_XTENSA_XTFPGA) +=
spi-xtensa-xtfpga.o
obj-$(CONFIG_SPI_ZYNQMP_GQSPI) += spi-zynqmp-gqspi.o
# SPI slave protocol handlers
+obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o
obj-$(CONFIG_SPI_SLAVE_TIME) += spi-slave-time.o
obj-$(CONFIG_SPI_SLAVE_SYSTEM_CONTROL) += spi-slave-system-control.o
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
new file mode 100644
index 000..2aa12f3
--- /dev/null
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -0,0 +1,613 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (c) 2018 MediaTek Inc.
+// Author: Leilk Liu
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License version 2 as
+// published by the Free Software Foundation.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SPIS_IRQ_EN_REG0x0
+#define SPIS_IRQ_CLR_REG 0x4
+#define SPIS_IRQ_ST_REG0x8
+#define SPIS_IRQ_MASK_REG 0xc
+#define SPIS_CFG_REG 0x10
+#define SPIS_RX_DATA_REG 0x14
+#define SPIS_TX_DATA_REG 0x18
+#define SPIS_RX_DST_REG0x1c
+#define SPIS_TX_SRC_REG0x20
+#define SPIS_RX_CMD_REG0x24
+#define SPIS_FIFO_ST_REG 0x28
+#define SPIS_MON_SEL_REG 0x2c
+#define SPIS_DMA_CFG_REG 0x30
+#define SPIS_FIFO_THR_REG 0x34
+#define SPIS_DEBUG_ST_REG 0x38
+#define SPIS_BYTE_CNT_REG 0x3c
+#define SPIS_SOFT_RST_REG 0x40
+
+/* SPIS_IRQ_EN_REG */
+#define DMA_DONE_ENBIT(7)
+#define TX_FIFO_EMPTY_EN BIT(6)
+#define TX_FIFO_FULL_ENBIT(5)
+#define RX_FIFO_EMPTY_EN BIT(4)
+#define RX_FIFO_FULL_ENBIT(3)
+#define DATA_DONE_EN BIT(2)
+#define RSTA_DONE_EN BIT(1)
+#define CMD_INVALID_EN BIT(0)
+
+/* SPIS_IRQ_CLR_REG */
+#define DMA_DONE_CLR BIT(7)
+#define TX_FIFO_EMPTY_CLR BIT(6)
+#define TX_FIFO_FULL_CLR BIT(5)
+#define RX_FIFO_EMPTY_CLR BIT(4)
+#define RX_FIFO_FULL_CLR BIT(3)
+#define DATA_DONE_CLR BIT(2)
+#define RSTA_DONE_CLR BIT(1)
+#define CMD_INVALID_CLRBIT(0)
+
+/* SPIS_IRQ_ST_REG */
+#define DMA_DONE_STBIT(7)
+#define TX_FIFO_EMPTY_ST BIT(6)
+#define TX_FIFO_FULL_STBIT(5)
+#define RX_FIFO_EMPTY_ST BIT(4)
+#define RX_FIFO_FULL_STBIT(3)
+#define DATA_DONE_ST BIT(2)
+#define RSTA_DONE_ST BIT(1)
+#define CMD_INVALID_ST BIT(0)
+
+/* SPIS_IRQ_MASK_REG */
+#define DMA_DONE_MASK BIT(7)
+#define DATA_DONE_MASK BIT(2)
+#define RSTA_DONE_MASK BIT(1)
+#define CMD_INVALID_MASK BIT(0)
+
+/* SPIS_CFG_REG */
+#define SPIS_TX_ENDIAN BIT(7)
+#define SPIS_RX_ENDIAN BIT(6)
+#define SPIS_TXMSBFBIT(5)
+#define SPIS_RXMSBFBIT(4)
+#define SPIS_CPHA BIT(3)
+#define SPIS_CPOL BIT(2)
+#define SPIS_TX_EN BIT(1)
+#define SPIS_RX_EN BIT(0)
+
+/* SPIS_DMA_CFG_REG */
+#define TX_DMA_TRIG_EN BIT(31)
+#define TX_DMA_EN BIT(30)
+#define RX_DMA_EN BIT(29)
+#define TX_DMA_LEN 0xf
+
+/* SPIS_SOFT_RST_REG */
+#define SPIS_DMA_ADDR_EN BIT(1)
+#define SPIS_SOFT_RST BIT(0)
+
+#define MTK_SPI_SLAVE_MAX_FIFO_SIZE 512U
+
+struct mtk_spi_slave {
+
[PATCH 1/3] spis: mediatek: add bindings for Mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-slave-mt27xx.txt | 39
1 file changed, 39 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
new file mode 100644
index 000..dcb8934
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
@@ -0,0 +1,39 @@
+Binding for MTK SPI Slave controller
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt2712-spi: for mt2712 platforms
+
+- reg: Address and length of the register set for the device
+
+- interrupts: Should contain spi interrupt
+
+- clocks: phandles to input clocks.
+ The first should be one of the following. It's PLL.
+ - < CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
+ It's the default one.
+ - < CLK_TOP_UNIVPLL1_D4>: specify parent clock 156MHZ.
+ - < CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
+ - < CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+ The second should be < CLK_TOP_SPISLV_SEL>. It's clock mux.
+ The third is < CLK_INFRA_AO_SPI1>. It's clock gate.
+
+- clock-names: shall be "parent-clk" for the parent clock, "sel-clk" for the
+ muxes clock, and "spi-clk" for the clock gate.
+
+- spi-slave: Empty property indicating the SPI controller is used in slave
mode.
+
+Example:
+
+- SoC Specific Portion:
+spis: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_TOP_UNIVPLL1_D2>,
+ < CLK_TOP_SPISLV_SEL>,
+ < CLK_INFRA_AO_SPI1>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ spi-slave;
+ status = "disabled";
+};
--
1.7.9.5
[PATCH 0/3] Add Mediatek SPI slave driver
>From 5ba1b2c0cd279255b49ecc8fa18c04ceb292a214 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Tue, 28 Aug 2018 14:18:56 +0800 Subject: [PATCH 0/3] Add Mediatek SPI slave driver This series are based on 4.19-rc1 and provide three patches to add mediatek spi slave driver. Leilk Liu (3): spis: mediatek: add bindings for Mediatek MT2712 soc platform spis: mediatek: add spi slave for Mediatek MT2712 arm64: dts: Add spi slave dts .../devicetree/bindings/spi/spi-slave-mt27xx.txt | 39 ++ arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 12 + drivers/spi/Kconfig|8 + drivers/spi/Makefile |1 + drivers/spi/spi-slave-mt27xx.c | 613 5 files changed, 673 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt create mode 100644 drivers/spi/spi-slave-mt27xx.c -- 1.7.9.5
[PATCH 3/3] arm64: dts: Add spi slave dts
This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 75cc0f7..064419b 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -301,6 +301,18 @@
status = "disabled";
};
+ spis1: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_TOP_UNIVPLL1_D2>,
+ < CLK_TOP_SPISLV_SEL>,
+ < CLK_INFRA_AO_SPI1>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ spi-slave;
+ status = "disabled";
+ };
+
apmixedsys: syscon@10209000 {
compatible = "mediatek,mt2712-apmixedsys", "syscon";
reg = <0 0x10209000 0 0x1000>;
--
1.7.9.5
[PATCH 2/3] spis: mediatek: add spi slave for Mediatek MT2712
This patchs add basic spi slave for MT2712.
Signed-off-by: Leilk Liu
---
drivers/spi/Kconfig|8 +
drivers/spi/Makefile |1 +
drivers/spi/spi-slave-mt27xx.c | 613
3 files changed, 622 insertions(+)
create mode 100644 drivers/spi/spi-slave-mt27xx.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 671d078..86ef6a5 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -802,6 +802,14 @@ config SPI_SLAVE
slave protocol handlers.
if SPI_SLAVE
+config SPI_SLAVE_MT27XX
+ tristate "MediaTek SPI slave device"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ help
+ This selects the MediaTek(R) SPI slave device driver.
+ If you want to use MediaTek(R) SPI slave interface,
+ say Y or M here.If you are not sure, say N.
+ SPI slave drivers for Mediatek MT27XX series ARM SoCs.
config SPI_SLAVE_TIME
tristate "SPI slave handler reporting boot up time"
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a90d559..a5e7b3c 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -109,5 +109,6 @@ obj-$(CONFIG_SPI_XTENSA_XTFPGA) +=
spi-xtensa-xtfpga.o
obj-$(CONFIG_SPI_ZYNQMP_GQSPI) += spi-zynqmp-gqspi.o
# SPI slave protocol handlers
+obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o
obj-$(CONFIG_SPI_SLAVE_TIME) += spi-slave-time.o
obj-$(CONFIG_SPI_SLAVE_SYSTEM_CONTROL) += spi-slave-system-control.o
diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c
new file mode 100644
index 000..2aa12f3
--- /dev/null
+++ b/drivers/spi/spi-slave-mt27xx.c
@@ -0,0 +1,613 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright (c) 2018 MediaTek Inc.
+// Author: Leilk Liu
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License version 2 as
+// published by the Free Software Foundation.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SPIS_IRQ_EN_REG0x0
+#define SPIS_IRQ_CLR_REG 0x4
+#define SPIS_IRQ_ST_REG0x8
+#define SPIS_IRQ_MASK_REG 0xc
+#define SPIS_CFG_REG 0x10
+#define SPIS_RX_DATA_REG 0x14
+#define SPIS_TX_DATA_REG 0x18
+#define SPIS_RX_DST_REG0x1c
+#define SPIS_TX_SRC_REG0x20
+#define SPIS_RX_CMD_REG0x24
+#define SPIS_FIFO_ST_REG 0x28
+#define SPIS_MON_SEL_REG 0x2c
+#define SPIS_DMA_CFG_REG 0x30
+#define SPIS_FIFO_THR_REG 0x34
+#define SPIS_DEBUG_ST_REG 0x38
+#define SPIS_BYTE_CNT_REG 0x3c
+#define SPIS_SOFT_RST_REG 0x40
+
+/* SPIS_IRQ_EN_REG */
+#define DMA_DONE_ENBIT(7)
+#define TX_FIFO_EMPTY_EN BIT(6)
+#define TX_FIFO_FULL_ENBIT(5)
+#define RX_FIFO_EMPTY_EN BIT(4)
+#define RX_FIFO_FULL_ENBIT(3)
+#define DATA_DONE_EN BIT(2)
+#define RSTA_DONE_EN BIT(1)
+#define CMD_INVALID_EN BIT(0)
+
+/* SPIS_IRQ_CLR_REG */
+#define DMA_DONE_CLR BIT(7)
+#define TX_FIFO_EMPTY_CLR BIT(6)
+#define TX_FIFO_FULL_CLR BIT(5)
+#define RX_FIFO_EMPTY_CLR BIT(4)
+#define RX_FIFO_FULL_CLR BIT(3)
+#define DATA_DONE_CLR BIT(2)
+#define RSTA_DONE_CLR BIT(1)
+#define CMD_INVALID_CLRBIT(0)
+
+/* SPIS_IRQ_ST_REG */
+#define DMA_DONE_STBIT(7)
+#define TX_FIFO_EMPTY_ST BIT(6)
+#define TX_FIFO_FULL_STBIT(5)
+#define RX_FIFO_EMPTY_ST BIT(4)
+#define RX_FIFO_FULL_STBIT(3)
+#define DATA_DONE_ST BIT(2)
+#define RSTA_DONE_ST BIT(1)
+#define CMD_INVALID_ST BIT(0)
+
+/* SPIS_IRQ_MASK_REG */
+#define DMA_DONE_MASK BIT(7)
+#define DATA_DONE_MASK BIT(2)
+#define RSTA_DONE_MASK BIT(1)
+#define CMD_INVALID_MASK BIT(0)
+
+/* SPIS_CFG_REG */
+#define SPIS_TX_ENDIAN BIT(7)
+#define SPIS_RX_ENDIAN BIT(6)
+#define SPIS_TXMSBFBIT(5)
+#define SPIS_RXMSBFBIT(4)
+#define SPIS_CPHA BIT(3)
+#define SPIS_CPOL BIT(2)
+#define SPIS_TX_EN BIT(1)
+#define SPIS_RX_EN BIT(0)
+
+/* SPIS_DMA_CFG_REG */
+#define TX_DMA_TRIG_EN BIT(31)
+#define TX_DMA_EN BIT(30)
+#define RX_DMA_EN BIT(29)
+#define TX_DMA_LEN 0xf
+
+/* SPIS_SOFT_RST_REG */
+#define SPIS_DMA_ADDR_EN BIT(1)
+#define SPIS_SOFT_RST BIT(0)
+
+#define MTK_SPI_SLAVE_MAX_FIFO_SIZE 512U
+
+struct mtk_spi_slave {
+
[PATCH 1/3] spis: mediatek: add bindings for Mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc.
Signed-off-by: Leilk Liu
---
.../devicetree/bindings/spi/spi-slave-mt27xx.txt | 39
1 file changed, 39 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
new file mode 100644
index 000..dcb8934
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt
@@ -0,0 +1,39 @@
+Binding for MTK SPI Slave controller
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt2712-spi: for mt2712 platforms
+
+- reg: Address and length of the register set for the device
+
+- interrupts: Should contain spi interrupt
+
+- clocks: phandles to input clocks.
+ The first should be one of the following. It's PLL.
+ - < CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
+ It's the default one.
+ - < CLK_TOP_UNIVPLL1_D4>: specify parent clock 156MHZ.
+ - < CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
+ - < CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+ The second should be < CLK_TOP_SPISLV_SEL>. It's clock mux.
+ The third is < CLK_INFRA_AO_SPI1>. It's clock gate.
+
+- clock-names: shall be "parent-clk" for the parent clock, "sel-clk" for the
+ muxes clock, and "spi-clk" for the clock gate.
+
+- spi-slave: Empty property indicating the SPI controller is used in slave
mode.
+
+Example:
+
+- SoC Specific Portion:
+spis: spi@10013000 {
+ compatible = "mediatek,mt2712-spi-slave";
+ reg = <0 0x10013000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_TOP_UNIVPLL1_D2>,
+ < CLK_TOP_SPISLV_SEL>,
+ < CLK_INFRA_AO_SPI1>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ spi-slave;
+ status = "disabled";
+};
--
1.7.9.5
[PATCH 0/3] Add Mediatek SPI slave driver
>From 5ba1b2c0cd279255b49ecc8fa18c04ceb292a214 Mon Sep 17 00:00:00 2001 From: Leilk Liu Date: Tue, 28 Aug 2018 14:18:56 +0800 Subject: [PATCH 0/3] Add Mediatek SPI slave driver This series are based on 4.19-rc1 and provide three patches to add mediatek spi slave driver. Leilk Liu (3): spis: mediatek: add bindings for Mediatek MT2712 soc platform spis: mediatek: add spi slave for Mediatek MT2712 arm64: dts: Add spi slave dts .../devicetree/bindings/spi/spi-slave-mt27xx.txt | 39 ++ arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 12 + drivers/spi/Kconfig|8 + drivers/spi/Makefile |1 + drivers/spi/spi-slave-mt27xx.c | 613 5 files changed, 673 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt create mode 100644 drivers/spi/spi-slave-mt27xx.c -- 1.7.9.5
[PATCH 2/2] spi: mediatek: add spi support for mt2712 IC
this patch add support for mt2712 IC.
Signed-off-by: Leilk Liu <leilk@mediatek.com>
---
drivers/spi/spi-mt65xx.c |7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index ec7755b..86bf456 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -105,6 +105,10 @@ struct mtk_spi {
static const struct mtk_spi_compatible mtk_common_compat;
+static const struct mtk_spi_compatible mt2712_compat = {
+ .must_tx = true,
+};
+
static const struct mtk_spi_compatible mt7622_compat = {
.must_tx = true,
.enhance_timing = true,
@@ -130,6 +134,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt2701-spi",
.data = (void *)_common_compat,
},
+ { .compatible = "mediatek,mt2712-spi",
+ .data = (void *)_compat,
+ },
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)_common_compat,
},
--
1.7.9.5
[PATCH 2/2] spi: mediatek: add spi support for mt2712 IC
this patch add support for mt2712 IC.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index ec7755b..86bf456 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -105,6 +105,10 @@ struct mtk_spi {
static const struct mtk_spi_compatible mtk_common_compat;
+static const struct mtk_spi_compatible mt2712_compat = {
+ .must_tx = true,
+};
+
static const struct mtk_spi_compatible mt7622_compat = {
.must_tx = true,
.enhance_timing = true,
@@ -130,6 +134,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt2701-spi",
.data = (void *)_common_compat,
},
+ { .compatible = "mediatek,mt2712-spi",
+ .data = (void *)_compat,
+ },
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)_common_compat,
},
--
1.7.9.5
[PATCH 1/2] spi: mediatek: Add bindings for mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc. Signed-off-by: Leilk Liu <leilk@mediatek.com> --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index c0b1f01..e0318cf 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -3,6 +3,7 @@ Binding for MTK SPI controller Required properties: - compatible: should be one of the following. - mediatek,mt2701-spi: for mt2701 platforms +- mediatek,mt2712-spi: for mt2712 platforms - mediatek,mt6589-spi: for mt6589 platforms - mediatek,mt7622-spi: for mt7622 platforms - mediatek,mt8135-spi: for mt8135 platforms -- 1.7.9.5
[PATCH 1/2] spi: mediatek: Add bindings for mediatek MT2712 soc platform
This patch adds a DT binding documentation for the MT2712 soc. Signed-off-by: Leilk Liu --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index c0b1f01..e0318cf 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -3,6 +3,7 @@ Binding for MTK SPI controller Required properties: - compatible: should be one of the following. - mediatek,mt2701-spi: for mt2701 platforms +- mediatek,mt2712-spi: for mt2712 platforms - mediatek,mt6589-spi: for mt6589 platforms - mediatek,mt7622-spi: for mt7622 platforms - mediatek,mt8135-spi: for mt8135 platforms -- 1.7.9.5
[PATCH 0/2] add mt2712 spi support
This series are based on 4.12-rc1 and provide 2 patches to support mt2712 IC. Change in this series: 1. update document to add mt2712; 2. add mt7622_compat. Leilk Liu (2): spi: mediatek: Add bindings for mediatek MT2712 soc platform spi: mediatek: add spi support for mt2712 IC .../devicetree/bindings/spi/spi-mt65xx.txt |1 + drivers/spi/spi-mt65xx.c |7 +++ 2 files changed, 8 insertions(+) -- 1.7.9.5
[PATCH 0/2] add mt2712 spi support
This series are based on 4.12-rc1 and provide 2 patches to support mt2712 IC. Change in this series: 1. update document to add mt2712; 2. add mt7622_compat. Leilk Liu (2): spi: mediatek: Add bindings for mediatek MT2712 soc platform spi: mediatek: add spi support for mt2712 IC .../devicetree/bindings/spi/spi-mt65xx.txt |1 + drivers/spi/spi-mt65xx.c |7 +++ 2 files changed, 8 insertions(+) -- 1.7.9.5
[PATCH v3 2/2] spi: mediatek: add spi support for mt7622 IC
this patch add support for mt7622 IC.
Signed-off-by: Leilk Liu <leilk@mediatek.com>
---
drivers/spi/spi-mt65xx.c |9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index eae73b5..ec7755b 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -104,6 +104,12 @@ struct mtk_spi {
};
static const struct mtk_spi_compatible mtk_common_compat;
+
+static const struct mtk_spi_compatible mt7622_compat = {
+ .must_tx = true,
+ .enhance_timing = true,
+};
+
static const struct mtk_spi_compatible mt8173_compat = {
.need_pad_sel = true,
.must_tx = true,
@@ -127,6 +133,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)_common_compat,
},
+ { .compatible = "mediatek,mt7622-spi",
+ .data = (void *)_compat,
+ },
{ .compatible = "mediatek,mt8135-spi",
.data = (void *)_common_compat,
},
--
1.7.9.5
[PATCH v3 1/2] spi: mediatek: adjust register to enhance time accuracy
this patch adjust register to enhance time accuracy.
Signed-off-by: Leilk Liu <leilk@mediatek.com>
---
drivers/spi/spi-mt65xx.c | 45 ++
include/linux/platform_data/spi-mt65xx.h |2 ++
2 files changed, 42 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 278867a..eae73b5 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -35,11 +35,15 @@
#define SPI_CMD_REG 0x0018
#define SPI_STATUS0_REG 0x001c
#define SPI_PAD_SEL_REG 0x0024
+#define SPI_CFG2_REG 0x0028
#define SPI_CFG0_SCK_HIGH_OFFSET 0
#define SPI_CFG0_SCK_LOW_OFFSET 8
#define SPI_CFG0_CS_HOLD_OFFSET 16
#define SPI_CFG0_CS_SETUP_OFFSET 24
+#define SPI_ADJUST_CFG0_SCK_LOW_OFFSET16
+#define SPI_ADJUST_CFG0_CS_HOLD_OFFSET0
+#define SPI_ADJUST_CFG0_CS_SETUP_OFFSET 16
#define SPI_CFG1_CS_IDLE_OFFSET 0
#define SPI_CFG1_PACKET_LOOP_OFFSET 8
@@ -55,6 +59,8 @@
#define SPI_CMD_RST BIT(2)
#define SPI_CMD_PAUSE_EN BIT(4)
#define SPI_CMD_DEASSERT BIT(5)
+#define SPI_CMD_SAMPLE_SEL BIT(6)
+#define SPI_CMD_CS_POL BIT(7)
#define SPI_CMD_CPHA BIT(8)
#define SPI_CMD_CPOL BIT(9)
#define SPI_CMD_RX_DMA BIT(10)
@@ -80,6 +86,8 @@ struct mtk_spi_compatible {
bool need_pad_sel;
/* Must explicitly send dummy Tx bytes to do Rx only transfer */
bool must_tx;
+ /* some IC design adjust cfg register to enhance time accuracy */
+ bool enhance_timing;
};
struct mtk_spi {
@@ -108,6 +116,8 @@ struct mtk_spi {
static const struct mtk_chip_config mtk_default_chip_info = {
.rx_mlsb = 1,
.tx_mlsb = 1,
+ .cs_pol = 0,
+ .sample_sel = 0,
};
static const struct of_device_id mtk_spi_of_match[] = {
@@ -182,6 +192,17 @@ static int mtk_spi_prepare_message(struct spi_master
*master,
reg_val |= SPI_CMD_RX_ENDIAN;
#endif
+ if (mdata->dev_comp->enhance_timing) {
+ if (chip_config->cs_pol)
+ reg_val |= SPI_CMD_CS_POL;
+ else
+ reg_val &= ~SPI_CMD_CS_POL;
+ if (chip_config->sample_sel)
+ reg_val |= SPI_CMD_SAMPLE_SEL;
+ else
+ reg_val &= ~SPI_CMD_SAMPLE_SEL;
+ }
+
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_IE;
@@ -233,11 +254,25 @@ static void mtk_spi_prepare_transfer(struct spi_master
*master,
sck_time = (div + 1) / 2;
cs_time = sck_time * 2;
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
- writel(reg_val, mdata->base + SPI_CFG0_REG);
+ if (mdata->dev_comp->enhance_timing) {
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_SCK_LOW_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG2_REG);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ } else {
+ reg_val |= (((sck_time - 1) & 0xff)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ }
reg_val = readl(mdata->base + SPI_CFG1_REG);
reg_val &= ~SPI_CFG1_CS_IDLE_MASK;
diff --git a/include/linux/platform_data/spi-mt65xx.h
b/include/linux/platform_data/spi-mt65xx.h
index 54b0448..ba4e4bb 100644
--- a/include/linux/platform_data/spi-mt65xx.h
+++ b/include/linux/platform_data/spi-mt65xx.h
@@ -16,5 +16,7 @@
struct mtk_chip_config {
u32 tx_mlsb;
u32 rx_mlsb;
+ u32 cs_pol;
+ u32 sample_sel;
};
#endif
--
1.7.9.5
[PATCH v3 2/2] spi: mediatek: add spi support for mt7622 IC
this patch add support for mt7622 IC.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index eae73b5..ec7755b 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -104,6 +104,12 @@ struct mtk_spi {
};
static const struct mtk_spi_compatible mtk_common_compat;
+
+static const struct mtk_spi_compatible mt7622_compat = {
+ .must_tx = true,
+ .enhance_timing = true,
+};
+
static const struct mtk_spi_compatible mt8173_compat = {
.need_pad_sel = true,
.must_tx = true,
@@ -127,6 +133,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)_common_compat,
},
+ { .compatible = "mediatek,mt7622-spi",
+ .data = (void *)_compat,
+ },
{ .compatible = "mediatek,mt8135-spi",
.data = (void *)_common_compat,
},
--
1.7.9.5
[PATCH v3 1/2] spi: mediatek: adjust register to enhance time accuracy
this patch adjust register to enhance time accuracy.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c | 45 ++
include/linux/platform_data/spi-mt65xx.h |2 ++
2 files changed, 42 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 278867a..eae73b5 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -35,11 +35,15 @@
#define SPI_CMD_REG 0x0018
#define SPI_STATUS0_REG 0x001c
#define SPI_PAD_SEL_REG 0x0024
+#define SPI_CFG2_REG 0x0028
#define SPI_CFG0_SCK_HIGH_OFFSET 0
#define SPI_CFG0_SCK_LOW_OFFSET 8
#define SPI_CFG0_CS_HOLD_OFFSET 16
#define SPI_CFG0_CS_SETUP_OFFSET 24
+#define SPI_ADJUST_CFG0_SCK_LOW_OFFSET16
+#define SPI_ADJUST_CFG0_CS_HOLD_OFFSET0
+#define SPI_ADJUST_CFG0_CS_SETUP_OFFSET 16
#define SPI_CFG1_CS_IDLE_OFFSET 0
#define SPI_CFG1_PACKET_LOOP_OFFSET 8
@@ -55,6 +59,8 @@
#define SPI_CMD_RST BIT(2)
#define SPI_CMD_PAUSE_EN BIT(4)
#define SPI_CMD_DEASSERT BIT(5)
+#define SPI_CMD_SAMPLE_SEL BIT(6)
+#define SPI_CMD_CS_POL BIT(7)
#define SPI_CMD_CPHA BIT(8)
#define SPI_CMD_CPOL BIT(9)
#define SPI_CMD_RX_DMA BIT(10)
@@ -80,6 +86,8 @@ struct mtk_spi_compatible {
bool need_pad_sel;
/* Must explicitly send dummy Tx bytes to do Rx only transfer */
bool must_tx;
+ /* some IC design adjust cfg register to enhance time accuracy */
+ bool enhance_timing;
};
struct mtk_spi {
@@ -108,6 +116,8 @@ struct mtk_spi {
static const struct mtk_chip_config mtk_default_chip_info = {
.rx_mlsb = 1,
.tx_mlsb = 1,
+ .cs_pol = 0,
+ .sample_sel = 0,
};
static const struct of_device_id mtk_spi_of_match[] = {
@@ -182,6 +192,17 @@ static int mtk_spi_prepare_message(struct spi_master
*master,
reg_val |= SPI_CMD_RX_ENDIAN;
#endif
+ if (mdata->dev_comp->enhance_timing) {
+ if (chip_config->cs_pol)
+ reg_val |= SPI_CMD_CS_POL;
+ else
+ reg_val &= ~SPI_CMD_CS_POL;
+ if (chip_config->sample_sel)
+ reg_val |= SPI_CMD_SAMPLE_SEL;
+ else
+ reg_val &= ~SPI_CMD_SAMPLE_SEL;
+ }
+
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_IE;
@@ -233,11 +254,25 @@ static void mtk_spi_prepare_transfer(struct spi_master
*master,
sck_time = (div + 1) / 2;
cs_time = sck_time * 2;
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
- writel(reg_val, mdata->base + SPI_CFG0_REG);
+ if (mdata->dev_comp->enhance_timing) {
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_SCK_LOW_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG2_REG);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ } else {
+ reg_val |= (((sck_time - 1) & 0xff)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ }
reg_val = readl(mdata->base + SPI_CFG1_REG);
reg_val &= ~SPI_CFG1_CS_IDLE_MASK;
diff --git a/include/linux/platform_data/spi-mt65xx.h
b/include/linux/platform_data/spi-mt65xx.h
index 54b0448..ba4e4bb 100644
--- a/include/linux/platform_data/spi-mt65xx.h
+++ b/include/linux/platform_data/spi-mt65xx.h
@@ -16,5 +16,7 @@
struct mtk_chip_config {
u32 tx_mlsb;
u32 rx_mlsb;
+ u32 cs_pol;
+ u32 sample_sel;
};
#endif
--
1.7.9.5
[PATCH v3 0/2] add mt7622 spi support
This series are based on 4.12-rc1 and provide 2 patches to support mt7622 IC. Change in v3: fix build error. Change in v2: 1. rename patch title; 2. use enhance_timing to instead of adjust_reg. Change in v1: 1. update document to add mt7622; 2. add adjust register define support; 3. add mt7622_compat. Leilk Liu (2): spi: mediatek: adjust register to enhance time accuracy spi: mediatek: add spi support for mt7622 IC drivers/spi/spi-mt65xx.c | 54 +++--- include/linux/platform_data/spi-mt65xx.h |2 ++ 2 files changed, 51 insertions(+), 5 deletions(-) -- 1.7.9.5
[PATCH v3 0/2] add mt7622 spi support
This series are based on 4.12-rc1 and provide 2 patches to support mt7622 IC. Change in v3: fix build error. Change in v2: 1. rename patch title; 2. use enhance_timing to instead of adjust_reg. Change in v1: 1. update document to add mt7622; 2. add adjust register define support; 3. add mt7622_compat. Leilk Liu (2): spi: mediatek: adjust register to enhance time accuracy spi: mediatek: add spi support for mt7622 IC drivers/spi/spi-mt65xx.c | 54 +++--- include/linux/platform_data/spi-mt65xx.h |2 ++ 2 files changed, 51 insertions(+), 5 deletions(-) -- 1.7.9.5
[PATCH v2 1/2] spi: mediatek: adjust register to enhance time accuracy
this patch adjust register to enhance time accuracy.
Signed-off-by: Leilk Liu <leilk@mediatek.com>
---
drivers/spi/spi-mt65xx.c | 45 ++
include/linux/platform_data/spi-mt65xx.h |2 ++
2 files changed, 42 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 278867a..eae73b5 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -35,11 +35,15 @@
#define SPI_CMD_REG 0x0018
#define SPI_STATUS0_REG 0x001c
#define SPI_PAD_SEL_REG 0x0024
+#define SPI_CFG2_REG 0x0028
#define SPI_CFG0_SCK_HIGH_OFFSET 0
#define SPI_CFG0_SCK_LOW_OFFSET 8
#define SPI_CFG0_CS_HOLD_OFFSET 16
#define SPI_CFG0_CS_SETUP_OFFSET 24
+#define SPI_ADJUST_CFG0_SCK_LOW_OFFSET16
+#define SPI_ADJUST_CFG0_CS_HOLD_OFFSET0
+#define SPI_ADJUST_CFG0_CS_SETUP_OFFSET 16
#define SPI_CFG1_CS_IDLE_OFFSET 0
#define SPI_CFG1_PACKET_LOOP_OFFSET 8
@@ -55,6 +59,8 @@
#define SPI_CMD_RST BIT(2)
#define SPI_CMD_PAUSE_EN BIT(4)
#define SPI_CMD_DEASSERT BIT(5)
+#define SPI_CMD_SAMPLE_SEL BIT(6)
+#define SPI_CMD_CS_POL BIT(7)
#define SPI_CMD_CPHA BIT(8)
#define SPI_CMD_CPOL BIT(9)
#define SPI_CMD_RX_DMA BIT(10)
@@ -80,6 +86,8 @@ struct mtk_spi_compatible {
bool need_pad_sel;
/* Must explicitly send dummy Tx bytes to do Rx only transfer */
bool must_tx;
+ /* some IC design adjust cfg register to enhance time accuracy */
+ bool enhance_timing;
};
struct mtk_spi {
@@ -108,6 +116,8 @@ struct mtk_spi {
static const struct mtk_chip_config mtk_default_chip_info = {
.rx_mlsb = 1,
.tx_mlsb = 1,
+ .cs_pol = 0,
+ .sample_sel = 0,
};
static const struct of_device_id mtk_spi_of_match[] = {
@@ -182,6 +192,17 @@ static int mtk_spi_prepare_message(struct spi_master
*master,
reg_val |= SPI_CMD_RX_ENDIAN;
#endif
+ if (mdata->dev_comp->enhance_timing) {
+ if (chip_config->cs_pol)
+ reg_val |= SPI_CMD_CS_POL;
+ else
+ reg_val &= ~SPI_CMD_CS_POL;
+ if (chip_config->sample_sel)
+ reg_val |= SPI_CMD_SAMPLE_SEL;
+ else
+ reg_val &= ~SPI_CMD_SAMPLE_SEL;
+ }
+
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_IE;
@@ -233,11 +254,25 @@ static void mtk_spi_prepare_transfer(struct spi_master
*master,
sck_time = (div + 1) / 2;
cs_time = sck_time * 2;
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
- writel(reg_val, mdata->base + SPI_CFG0_REG);
+ if (mdata->dev_comp->enhance_timing) {
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_SCK_LOW_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG2_REG);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ } else {
+ reg_val |= (((sck_time - 1) & 0xff)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ }
reg_val = readl(mdata->base + SPI_CFG1_REG);
reg_val &= ~SPI_CFG1_CS_IDLE_MASK;
diff --git a/include/linux/platform_data/spi-mt65xx.h
b/include/linux/platform_data/spi-mt65xx.h
index 54b0448..ba4e4bb 100644
--- a/include/linux/platform_data/spi-mt65xx.h
+++ b/include/linux/platform_data/spi-mt65xx.h
@@ -16,5 +16,7 @@
struct mtk_chip_config {
u32 tx_mlsb;
u32 rx_mlsb;
+ u32 cs_pol;
+ u32 sample_sel;
};
#endif
--
1.7.9.5
[PATCH v2 1/2] spi: mediatek: adjust register to enhance time accuracy
this patch adjust register to enhance time accuracy.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c | 45 ++
include/linux/platform_data/spi-mt65xx.h |2 ++
2 files changed, 42 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 278867a..eae73b5 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -35,11 +35,15 @@
#define SPI_CMD_REG 0x0018
#define SPI_STATUS0_REG 0x001c
#define SPI_PAD_SEL_REG 0x0024
+#define SPI_CFG2_REG 0x0028
#define SPI_CFG0_SCK_HIGH_OFFSET 0
#define SPI_CFG0_SCK_LOW_OFFSET 8
#define SPI_CFG0_CS_HOLD_OFFSET 16
#define SPI_CFG0_CS_SETUP_OFFSET 24
+#define SPI_ADJUST_CFG0_SCK_LOW_OFFSET16
+#define SPI_ADJUST_CFG0_CS_HOLD_OFFSET0
+#define SPI_ADJUST_CFG0_CS_SETUP_OFFSET 16
#define SPI_CFG1_CS_IDLE_OFFSET 0
#define SPI_CFG1_PACKET_LOOP_OFFSET 8
@@ -55,6 +59,8 @@
#define SPI_CMD_RST BIT(2)
#define SPI_CMD_PAUSE_EN BIT(4)
#define SPI_CMD_DEASSERT BIT(5)
+#define SPI_CMD_SAMPLE_SEL BIT(6)
+#define SPI_CMD_CS_POL BIT(7)
#define SPI_CMD_CPHA BIT(8)
#define SPI_CMD_CPOL BIT(9)
#define SPI_CMD_RX_DMA BIT(10)
@@ -80,6 +86,8 @@ struct mtk_spi_compatible {
bool need_pad_sel;
/* Must explicitly send dummy Tx bytes to do Rx only transfer */
bool must_tx;
+ /* some IC design adjust cfg register to enhance time accuracy */
+ bool enhance_timing;
};
struct mtk_spi {
@@ -108,6 +116,8 @@ struct mtk_spi {
static const struct mtk_chip_config mtk_default_chip_info = {
.rx_mlsb = 1,
.tx_mlsb = 1,
+ .cs_pol = 0,
+ .sample_sel = 0,
};
static const struct of_device_id mtk_spi_of_match[] = {
@@ -182,6 +192,17 @@ static int mtk_spi_prepare_message(struct spi_master
*master,
reg_val |= SPI_CMD_RX_ENDIAN;
#endif
+ if (mdata->dev_comp->enhance_timing) {
+ if (chip_config->cs_pol)
+ reg_val |= SPI_CMD_CS_POL;
+ else
+ reg_val &= ~SPI_CMD_CS_POL;
+ if (chip_config->sample_sel)
+ reg_val |= SPI_CMD_SAMPLE_SEL;
+ else
+ reg_val &= ~SPI_CMD_SAMPLE_SEL;
+ }
+
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_IE;
@@ -233,11 +254,25 @@ static void mtk_spi_prepare_transfer(struct spi_master
*master,
sck_time = (div + 1) / 2;
cs_time = sck_time * 2;
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
- writel(reg_val, mdata->base + SPI_CFG0_REG);
+ if (mdata->dev_comp->enhance_timing) {
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_SCK_LOW_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG2_REG);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ } else {
+ reg_val |= (((sck_time - 1) & 0xff)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ }
reg_val = readl(mdata->base + SPI_CFG1_REG);
reg_val &= ~SPI_CFG1_CS_IDLE_MASK;
diff --git a/include/linux/platform_data/spi-mt65xx.h
b/include/linux/platform_data/spi-mt65xx.h
index 54b0448..ba4e4bb 100644
--- a/include/linux/platform_data/spi-mt65xx.h
+++ b/include/linux/platform_data/spi-mt65xx.h
@@ -16,5 +16,7 @@
struct mtk_chip_config {
u32 tx_mlsb;
u32 rx_mlsb;
+ u32 cs_pol;
+ u32 sample_sel;
};
#endif
--
1.7.9.5
[PATCH v2 2/2] spi: mediatek: add spi support for mt7622 IC
this patch add support for mt7622 IC.
Signed-off-by: Leilk Liu <leilk@mediatek.com>
---
drivers/spi/spi-mt65xx.c |9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index eae73b5..4bf6495 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -104,6 +104,12 @@ struct mtk_spi {
};
static const struct mtk_spi_compatible mtk_common_compat;
+
+static const struct mtk_spi_compatible mt7622_compat = {
+ .must_tx = true,
+ .adjust_reg = true,
+};
+
static const struct mtk_spi_compatible mt8173_compat = {
.need_pad_sel = true,
.must_tx = true,
@@ -127,6 +133,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)_common_compat,
},
+ { .compatible = "mediatek,mt7622-spi",
+ .data = (void *)_compat,
+ },
{ .compatible = "mediatek,mt8135-spi",
.data = (void *)_common_compat,
},
--
1.7.9.5
[PATCH v2 0/2] add mt7622 spi support
This series are based on 4.12-rc1 and provide 2 patches to support mt7622 IC. Change in v2: 1. rename patch title; 2. use enhance_timing to instead of adjust_reg. Change in v1: 1. update document to add mt7622; 2. add adjust register define support; 3. add mt7622_compat. Leilk Liu (2): spi: mediatek: adjust register to enhance time accuracy spi: mediatek: add spi support for mt7622 IC drivers/spi/spi-mt65xx.c | 54 +++--- include/linux/platform_data/spi-mt65xx.h |2 ++ 2 files changed, 51 insertions(+), 5 deletions(-) -- 1.7.9.5
[PATCH v2 2/2] spi: mediatek: add spi support for mt7622 IC
this patch add support for mt7622 IC.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index eae73b5..4bf6495 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -104,6 +104,12 @@ struct mtk_spi {
};
static const struct mtk_spi_compatible mtk_common_compat;
+
+static const struct mtk_spi_compatible mt7622_compat = {
+ .must_tx = true,
+ .adjust_reg = true,
+};
+
static const struct mtk_spi_compatible mt8173_compat = {
.need_pad_sel = true,
.must_tx = true,
@@ -127,6 +133,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)_common_compat,
},
+ { .compatible = "mediatek,mt7622-spi",
+ .data = (void *)_compat,
+ },
{ .compatible = "mediatek,mt8135-spi",
.data = (void *)_common_compat,
},
--
1.7.9.5
[PATCH v2 0/2] add mt7622 spi support
This series are based on 4.12-rc1 and provide 2 patches to support mt7622 IC. Change in v2: 1. rename patch title; 2. use enhance_timing to instead of adjust_reg. Change in v1: 1. update document to add mt7622; 2. add adjust register define support; 3. add mt7622_compat. Leilk Liu (2): spi: mediatek: adjust register to enhance time accuracy spi: mediatek: add spi support for mt7622 IC drivers/spi/spi-mt65xx.c | 54 +++--- include/linux/platform_data/spi-mt65xx.h |2 ++ 2 files changed, 51 insertions(+), 5 deletions(-) -- 1.7.9.5
[PATCH 1/3] dt-bindings: spi: mediatek: Add bindings for mediatek MT7622 soc platform
This patch adds a DT binding documentation for the MT7622 soc. Signed-off-by: Leilk Liu <leilk@mediatek.com> --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index e43f4cf..c0b1f01 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -4,6 +4,7 @@ Required properties: - compatible: should be one of the following. - mediatek,mt2701-spi: for mt2701 platforms - mediatek,mt6589-spi: for mt6589 platforms +- mediatek,mt7622-spi: for mt7622 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms -- 1.7.9.5
[PATCH 1/3] dt-bindings: spi: mediatek: Add bindings for mediatek MT7622 soc platform
This patch adds a DT binding documentation for the MT7622 soc. Signed-off-by: Leilk Liu --- .../devicetree/bindings/spi/spi-mt65xx.txt |1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index e43f4cf..c0b1f01 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -4,6 +4,7 @@ Required properties: - compatible: should be one of the following. - mediatek,mt2701-spi: for mt2701 platforms - mediatek,mt6589-spi: for mt6589 platforms +- mediatek,mt7622-spi: for mt7622 platforms - mediatek,mt8135-spi: for mt8135 platforms - mediatek,mt8173-spi: for mt8173 platforms -- 1.7.9.5
[PATCH 3/3] spi: mediatek: add compatible support for mt7622 IC
this patch add compatible support for mt7622 IC.
Signed-off-by: Leilk Liu <leilk@mediatek.com>
---
drivers/spi/spi-mt65xx.c |9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 3d7cd2d..ebc4b1a 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -104,6 +104,12 @@ struct mtk_spi {
};
static const struct mtk_spi_compatible mtk_common_compat;
+
+static const struct mtk_spi_compatible mt7622_compat = {
+ .must_tx = true,
+ .adjust_reg = true,
+};
+
static const struct mtk_spi_compatible mt8173_compat = {
.need_pad_sel = true,
.must_tx = true,
@@ -127,6 +133,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)_common_compat,
},
+ { .compatible = "mediatek,mt7622-spi",
+ .data = (void *)_compat,
+ },
{ .compatible = "mediatek,mt8135-spi",
.data = (void *)_common_compat,
},
--
1.7.9.5
[PATCH 2/3] spi: mediatek: support adjust register define
this patch adds support for adjust register design.
Signed-off-by: Leilk Liu <leilk@mediatek.com>
---
drivers/spi/spi-mt65xx.c | 45 ++
include/linux/platform_data/spi-mt65xx.h |2 ++
2 files changed, 42 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 278867a..3d7cd2d 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -35,11 +35,15 @@
#define SPI_CMD_REG 0x0018
#define SPI_STATUS0_REG 0x001c
#define SPI_PAD_SEL_REG 0x0024
+#define SPI_CFG2_REG 0x0028
#define SPI_CFG0_SCK_HIGH_OFFSET 0
#define SPI_CFG0_SCK_LOW_OFFSET 8
#define SPI_CFG0_CS_HOLD_OFFSET 16
#define SPI_CFG0_CS_SETUP_OFFSET 24
+#define SPI_ADJUST_CFG0_SCK_LOW_OFFSET16
+#define SPI_ADJUST_CFG0_CS_HOLD_OFFSET0
+#define SPI_ADJUST_CFG0_CS_SETUP_OFFSET 16
#define SPI_CFG1_CS_IDLE_OFFSET 0
#define SPI_CFG1_PACKET_LOOP_OFFSET 8
@@ -55,6 +59,8 @@
#define SPI_CMD_RST BIT(2)
#define SPI_CMD_PAUSE_EN BIT(4)
#define SPI_CMD_DEASSERT BIT(5)
+#define SPI_CMD_SAMPLE_SEL BIT(6)
+#define SPI_CMD_CS_POL BIT(7)
#define SPI_CMD_CPHA BIT(8)
#define SPI_CMD_CPOL BIT(9)
#define SPI_CMD_RX_DMA BIT(10)
@@ -80,6 +86,8 @@ struct mtk_spi_compatible {
bool need_pad_sel;
/* Must explicitly send dummy Tx bytes to do Rx only transfer */
bool must_tx;
+ /* some IC design adjust register define */
+ bool adjust_reg;
};
struct mtk_spi {
@@ -108,6 +116,8 @@ struct mtk_spi {
static const struct mtk_chip_config mtk_default_chip_info = {
.rx_mlsb = 1,
.tx_mlsb = 1,
+ .cs_pol = 0,
+ .sample_sel = 0,
};
static const struct of_device_id mtk_spi_of_match[] = {
@@ -182,6 +192,17 @@ static int mtk_spi_prepare_message(struct spi_master
*master,
reg_val |= SPI_CMD_RX_ENDIAN;
#endif
+ if (mdata->dev_comp->adjust_reg) {
+ if (chip_config->cs_pol)
+ reg_val |= SPI_CMD_CS_POL;
+ else
+ reg_val &= ~SPI_CMD_CS_POL;
+ if (chip_config->sample_sel)
+ reg_val |= SPI_CMD_SAMPLE_SEL;
+ else
+ reg_val &= ~SPI_CMD_SAMPLE_SEL;
+ }
+
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_IE;
@@ -233,11 +254,25 @@ static void mtk_spi_prepare_transfer(struct spi_master
*master,
sck_time = (div + 1) / 2;
cs_time = sck_time * 2;
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
- writel(reg_val, mdata->base + SPI_CFG0_REG);
+ if (mdata->dev_comp->adjust_reg) {
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_SCK_LOW_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG2_REG);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ } else {
+ reg_val |= (((sck_time - 1) & 0xff)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ }
reg_val = readl(mdata->base + SPI_CFG1_REG);
reg_val &= ~SPI_CFG1_CS_IDLE_MASK;
diff --git a/include/linux/platform_data/spi-mt65xx.h
b/include/linux/platform_data/spi-mt65xx.h
index 54b0448..ba4e4bb 100644
--- a/include/linux/platform_data/spi-mt65xx.h
+++ b/include/linux/platform_data/spi-mt65xx.h
@@ -16,5 +16,7 @@
struct mtk_chip_config {
u32 tx_mlsb;
u32 rx_mlsb;
+ u32 cs_pol;
+ u32 sample_sel;
};
#endif
--
1.7.9.5
[PATCH 3/3] spi: mediatek: add compatible support for mt7622 IC
this patch add compatible support for mt7622 IC.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 3d7cd2d..ebc4b1a 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -104,6 +104,12 @@ struct mtk_spi {
};
static const struct mtk_spi_compatible mtk_common_compat;
+
+static const struct mtk_spi_compatible mt7622_compat = {
+ .must_tx = true,
+ .adjust_reg = true,
+};
+
static const struct mtk_spi_compatible mt8173_compat = {
.need_pad_sel = true,
.must_tx = true,
@@ -127,6 +133,9 @@ struct mtk_spi {
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)_common_compat,
},
+ { .compatible = "mediatek,mt7622-spi",
+ .data = (void *)_compat,
+ },
{ .compatible = "mediatek,mt8135-spi",
.data = (void *)_common_compat,
},
--
1.7.9.5
[PATCH 2/3] spi: mediatek: support adjust register define
this patch adds support for adjust register design.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c | 45 ++
include/linux/platform_data/spi-mt65xx.h |2 ++
2 files changed, 42 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 278867a..3d7cd2d 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -35,11 +35,15 @@
#define SPI_CMD_REG 0x0018
#define SPI_STATUS0_REG 0x001c
#define SPI_PAD_SEL_REG 0x0024
+#define SPI_CFG2_REG 0x0028
#define SPI_CFG0_SCK_HIGH_OFFSET 0
#define SPI_CFG0_SCK_LOW_OFFSET 8
#define SPI_CFG0_CS_HOLD_OFFSET 16
#define SPI_CFG0_CS_SETUP_OFFSET 24
+#define SPI_ADJUST_CFG0_SCK_LOW_OFFSET16
+#define SPI_ADJUST_CFG0_CS_HOLD_OFFSET0
+#define SPI_ADJUST_CFG0_CS_SETUP_OFFSET 16
#define SPI_CFG1_CS_IDLE_OFFSET 0
#define SPI_CFG1_PACKET_LOOP_OFFSET 8
@@ -55,6 +59,8 @@
#define SPI_CMD_RST BIT(2)
#define SPI_CMD_PAUSE_EN BIT(4)
#define SPI_CMD_DEASSERT BIT(5)
+#define SPI_CMD_SAMPLE_SEL BIT(6)
+#define SPI_CMD_CS_POL BIT(7)
#define SPI_CMD_CPHA BIT(8)
#define SPI_CMD_CPOL BIT(9)
#define SPI_CMD_RX_DMA BIT(10)
@@ -80,6 +86,8 @@ struct mtk_spi_compatible {
bool need_pad_sel;
/* Must explicitly send dummy Tx bytes to do Rx only transfer */
bool must_tx;
+ /* some IC design adjust register define */
+ bool adjust_reg;
};
struct mtk_spi {
@@ -108,6 +116,8 @@ struct mtk_spi {
static const struct mtk_chip_config mtk_default_chip_info = {
.rx_mlsb = 1,
.tx_mlsb = 1,
+ .cs_pol = 0,
+ .sample_sel = 0,
};
static const struct of_device_id mtk_spi_of_match[] = {
@@ -182,6 +192,17 @@ static int mtk_spi_prepare_message(struct spi_master
*master,
reg_val |= SPI_CMD_RX_ENDIAN;
#endif
+ if (mdata->dev_comp->adjust_reg) {
+ if (chip_config->cs_pol)
+ reg_val |= SPI_CMD_CS_POL;
+ else
+ reg_val &= ~SPI_CMD_CS_POL;
+ if (chip_config->sample_sel)
+ reg_val |= SPI_CMD_SAMPLE_SEL;
+ else
+ reg_val &= ~SPI_CMD_SAMPLE_SEL;
+ }
+
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_IE;
@@ -233,11 +254,25 @@ static void mtk_spi_prepare_transfer(struct spi_master
*master,
sck_time = (div + 1) / 2;
cs_time = sck_time * 2;
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
- reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
- reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
- writel(reg_val, mdata->base + SPI_CFG0_REG);
+ if (mdata->dev_comp->adjust_reg) {
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_SCK_LOW_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG2_REG);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0x)
+ << SPI_ADJUST_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ } else {
+ reg_val |= (((sck_time - 1) & 0xff)
+ << SPI_CFG0_SCK_HIGH_OFFSET);
+ reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
+ reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
+ writel(reg_val, mdata->base + SPI_CFG0_REG);
+ }
reg_val = readl(mdata->base + SPI_CFG1_REG);
reg_val &= ~SPI_CFG1_CS_IDLE_MASK;
diff --git a/include/linux/platform_data/spi-mt65xx.h
b/include/linux/platform_data/spi-mt65xx.h
index 54b0448..ba4e4bb 100644
--- a/include/linux/platform_data/spi-mt65xx.h
+++ b/include/linux/platform_data/spi-mt65xx.h
@@ -16,5 +16,7 @@
struct mtk_chip_config {
u32 tx_mlsb;
u32 rx_mlsb;
+ u32 cs_pol;
+ u32 sample_sel;
};
#endif
--
1.7.9.5
[PATCH 0/3] add mt7622 spi support
This series are based on 4.12-rc1 and provide 4 patches to support mt7622 IC. Change in this series: 1. update document to add mt7622; 2. add adjust register define support; 3. add mt7622_compat. Leilk Liu (3): dt-bindings: spi: mediatek: Add bindings for mediatek MT7622 soc platform spi: mediatek: support adjust register define spi: mediatek: add spi support for mt7622 IC .../devicetree/bindings/spi/spi-mt65xx.txt |1 + drivers/spi/spi-mt65xx.c | 54 ++-- include/linux/platform_data/spi-mt65xx.h |2 + 3 files changed, 52 insertions(+), 5 deletions(-) -- 1.7.9.5
[PATCH 0/3] add mt7622 spi support
This series are based on 4.12-rc1 and provide 4 patches to support mt7622 IC. Change in this series: 1. update document to add mt7622; 2. add adjust register define support; 3. add mt7622_compat. Leilk Liu (3): dt-bindings: spi: mediatek: Add bindings for mediatek MT7622 soc platform spi: mediatek: support adjust register define spi: mediatek: add spi support for mt7622 IC .../devicetree/bindings/spi/spi-mt65xx.txt |1 + drivers/spi/spi-mt65xx.c | 54 ++-- include/linux/platform_data/spi-mt65xx.h |2 + 3 files changed, 52 insertions(+), 5 deletions(-) -- 1.7.9.5
[PATCH 2/4] spi: mediatek: Add spi support for mt2701 IC
This patch adds spi support for mt2701 IC.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 3573c09..fe95f3f 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -111,6 +111,9 @@ static const struct mtk_chip_config mtk_default_chip_info =
{
};
static const struct of_device_id mtk_spi_of_match[] = {
+ { .compatible = "mediatek,mt2701-spi",
+ .data = (void *)_common_compat,
+ },
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)_common_compat,
},
--
1.7.9.5
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/4] dts: mt2701: add spi dts for mt2701
This patch adds dtsi node of spi for mt2701.
Signed-off-by: Leilk Liu
---
arch/arm/boot/dts/mt2701.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index bd88ae9..9ccd1f0 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -194,4 +194,43 @@
clocks = <_clk>;
status = "disabled";
};
+
+ spi0: spi@1100a000 {
+ compatible = "mediatek,mt2701-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x1100a000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_TOP_SYSPLL3_D2>,
+< CLK_TOP_SPI0_SEL>,
+< CLK_PERI_SPI0>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
+
+ spi1: spi@11016000 {
+ compatible = "mediatek,mt2701-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x11016000 0 0x100>;
+ interrupts = ;
+ clocks = < CLK_TOP_SYSPLL3_D2>,
+< CLK_TOP_SPI1_SEL>,
+< CLK_PERI_SPI1>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
+
+ spi2: spi@11017000 {
+ compatible = "mediatek,mt2701-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x11017000 0 0x1000>;
+ interrupts = ;
+ clocks = < CLK_TOP_SYSPLL3_D2>,
+< CLK_TOP_SPI2_SEL>,
+< CLK_PERI_SPI2>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
};
--
1.7.9.5
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/4] spi: mediatek: merge all identical compat to mtk_common_compat
This patch merge all identical compat into on mtk_common_compat
and used for all compatible soc.
Signed-off-by: Leilk Liu
---
drivers/spi/spi-mt65xx.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 563954a..3573c09 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -95,8 +95,7 @@ struct mtk_spi {
const struct mtk_spi_compatible *dev_comp;
};
-static const struct mtk_spi_compatible mt6589_compat;
-static const struct mtk_spi_compatible mt8135_compat;
+static const struct mtk_spi_compatible mtk_common_compat;
static const struct mtk_spi_compatible mt8173_compat = {
.need_pad_sel = true,
.must_tx = true,
@@ -112,9 +111,15 @@ static const struct mtk_chip_config mtk_default_chip_info
= {
};
static const struct of_device_id mtk_spi_of_match[] = {
- { .compatible = "mediatek,mt6589-spi", .data = (void *)_compat },
- { .compatible = "mediatek,mt8135-spi", .data = (void *)_compat },
- { .compatible = "mediatek,mt8173-spi", .data = (void *)_compat },
+ { .compatible = "mediatek,mt6589-spi",
+ .data = (void *)_common_compat,
+ },
+ { .compatible = "mediatek,mt8135-spi",
+ .data = (void *)_common_compat,
+ },
+ { .compatible = "mediatek,mt8173-spi",
+ .data = (void *)_compat,
+ },
{}
};
MODULE_DEVICE_TABLE(of, mtk_spi_of_match);
--
1.7.9.5
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH 4/4] Document: spi: Add bindings for mediatek MT2701 soc platform
This patch adds a DT binding documentation for the MT2701 soc. Signed-off-by: Leilk Liu --- .../devicetree/bindings/spi/spi-mt65xx.txt |5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index ce363c923f..bf489e0 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -2,9 +2,10 @@ Binding for MTK SPI controller Required properties: - compatible: should be one of the following. -- mediatek,mt8173-spi: for mt8173 platforms -- mediatek,mt8135-spi: for mt8135 platforms +- mediatek,mt2701-spi: for mt2701 platforms - mediatek,mt6589-spi: for mt6589 platforms +- mediatek,mt8135-spi: for mt8135 platforms +- mediatek,mt8173-spi: for mt8173 platforms - #address-cells: should be 1. -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 0/4] SPI: support mt2701 IC
This series are based on 4.4-rc1 and provide 4 patches to support mt2701 spi HW. Change in this series: 1. merge all identical compat to mtk_common_compat; 2. Add spi support for mt2701 IC; 3. add spi dts for mt2701; 4. Add bindings for mediatek MT2701 soc platform. Leilk Liu (4): spi: mediatek: merge all identical compat to mtk_common_compat spi: mediatek: Add spi support for mt2701 IC dts: mt2701: add spi dts for mt2701 Document: spi: Add bindings for mediatek MT2701 soc platform .../devicetree/bindings/spi/spi-mt65xx.txt |5 ++- arch/arm/boot/dts/mt2701.dtsi | 39 drivers/spi/spi-mt65xx.c | 18 ++--- 3 files changed, 55 insertions(+), 7 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
