Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Wei Huang]

On 11/10/2016 11:17 AM, Will Deacon wrote:
> On Thu, Nov 10, 2016 at 03:32:12PM +, Marc Zyngier wrote:
>> On 10/11/16 15:12, Wei Huang wrote:
>>>
>>>
>>> On 11/10/2016 03:10 AM, Marc Zyngier wrote:
 Hi Wei,

 On 09/11/16 19:57, Wei Huang wrote:
> This patch moves ARMv8-related perf event definitions from perf_event.c
> to asm/perf_event.h; so KVM code can use them directly. This also help
> remove a duplicated definition of SW_INCR in perf_event.h.
>
> Signed-off-by: Wei Huang 
> ---
>  arch/arm64/include/asm/perf_event.h | 161 
> +++-
>  arch/arm64/kernel/perf_event.c  | 161 
> 
>  2 files changed, 160 insertions(+), 162 deletions(-)
>
> diff --git a/arch/arm64/include/asm/perf_event.h 
> b/arch/arm64/include/asm/perf_event.h
> index 2065f46..6c7b18b 100644
> --- a/arch/arm64/include/asm/perf_event.h
> +++ b/arch/arm64/include/asm/perf_event.h
> @@ -46,7 +46,166 @@
>  #define  ARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
> bits */
>  #define  ARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
> */
>  
> -#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR   0   /* Software increment 
> event */
> +/*
> + * ARMv8 PMUv3 Performance Events handling code.
> + * Common event types.
> + */
> +
> +/* Required events. */
> +#define ARMV8_PMUV3_PERFCTR_SW_INCR  0x00
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x03
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE0x04
> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED  0x10
> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES   0x11
> +#define ARMV8_PMUV3_PERFCTR_BR_PRED  0x12

 In my initial review, I asked for the "required" events to be moved to a
 shared location. What's the rational for moving absolutely everything?
>>>
>>> I did notice the phrase "required" in the original email. However I
>>> think it is weird to have two places for a same set of PMU definitions.
>>> Other developers might think these two are missing if they don't search
>>> kernel files carefully.
>>>
>>> If Will Deacon and you insist, I can move only two defs to perf_event.h,
>>> consolidated with the 2nd patch into a single one.
>>
>> My personal feeling is that only architected events should be in a
>> public header. The CPU-specific ones are probably better kept private,
>> as it is doubtful that other users would appear).
>>
>> I'll leave it up to Will to decide, as all I want to avoid is the
>> duplication of constants between the PMU and KVM code bases.
> 
> Yeah, just take the sets that you need (i.e. the architected events).

Hi Will,

Just to clarify what "architected" means:

We need two for KVM: SW_INCR (architectural) and CPU_CYCLES
(micro-architectural). Looking at perf_event.c file, I can either
relocate the  "Required events" (6 events) or the whole set of
ARMV8_PMUV3_PERFCTR_* (~50 events) to perf_event.h. Which way you prefer?

Thanks,
-Wei

> 
> Also, check that it builds.
> 
> Will
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Wei Huang]

On 11/10/2016 11:17 AM, Will Deacon wrote:
> On Thu, Nov 10, 2016 at 03:32:12PM +, Marc Zyngier wrote:
>> On 10/11/16 15:12, Wei Huang wrote:
>>>
>>>
>>> On 11/10/2016 03:10 AM, Marc Zyngier wrote:
 Hi Wei,

 On 09/11/16 19:57, Wei Huang wrote:
> This patch moves ARMv8-related perf event definitions from perf_event.c
> to asm/perf_event.h; so KVM code can use them directly. This also help
> remove a duplicated definition of SW_INCR in perf_event.h.
>
> Signed-off-by: Wei Huang 
> ---
>  arch/arm64/include/asm/perf_event.h | 161 
> +++-
>  arch/arm64/kernel/perf_event.c  | 161 
> 
>  2 files changed, 160 insertions(+), 162 deletions(-)
>
> diff --git a/arch/arm64/include/asm/perf_event.h 
> b/arch/arm64/include/asm/perf_event.h
> index 2065f46..6c7b18b 100644
> --- a/arch/arm64/include/asm/perf_event.h
> +++ b/arch/arm64/include/asm/perf_event.h
> @@ -46,7 +46,166 @@
>  #define  ARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
> bits */
>  #define  ARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
> */
>  
> -#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR   0   /* Software increment 
> event */
> +/*
> + * ARMv8 PMUv3 Performance Events handling code.
> + * Common event types.
> + */
> +
> +/* Required events. */
> +#define ARMV8_PMUV3_PERFCTR_SW_INCR  0x00
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x03
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE0x04
> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED  0x10
> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES   0x11
> +#define ARMV8_PMUV3_PERFCTR_BR_PRED  0x12

 In my initial review, I asked for the "required" events to be moved to a
 shared location. What's the rational for moving absolutely everything?
>>>
>>> I did notice the phrase "required" in the original email. However I
>>> think it is weird to have two places for a same set of PMU definitions.
>>> Other developers might think these two are missing if they don't search
>>> kernel files carefully.
>>>
>>> If Will Deacon and you insist, I can move only two defs to perf_event.h,
>>> consolidated with the 2nd patch into a single one.
>>
>> My personal feeling is that only architected events should be in a
>> public header. The CPU-specific ones are probably better kept private,
>> as it is doubtful that other users would appear).
>>
>> I'll leave it up to Will to decide, as all I want to avoid is the
>> duplication of constants between the PMU and KVM code bases.
> 
> Yeah, just take the sets that you need (i.e. the architected events).

Hi Will,

Just to clarify what "architected" means:

We need two for KVM: SW_INCR (architectural) and CPU_CYCLES
(micro-architectural). Looking at perf_event.c file, I can either
relocate the  "Required events" (6 events) or the whole set of
ARMV8_PMUV3_PERFCTR_* (~50 events) to perf_event.h. Which way you prefer?

Thanks,
-Wei

> 
> Also, check that it builds.
> 
> Will
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Will Deacon]

On Thu, Nov 10, 2016 at 03:32:12PM +, Marc Zyngier wrote:
> On 10/11/16 15:12, Wei Huang wrote:
> > 
> > 
> > On 11/10/2016 03:10 AM, Marc Zyngier wrote:
> >> Hi Wei,
> >>
> >> On 09/11/16 19:57, Wei Huang wrote:
> >>> This patch moves ARMv8-related perf event definitions from perf_event.c
> >>> to asm/perf_event.h; so KVM code can use them directly. This also help
> >>> remove a duplicated definition of SW_INCR in perf_event.h.
> >>>
> >>> Signed-off-by: Wei Huang 
> >>> ---
> >>>  arch/arm64/include/asm/perf_event.h | 161 
> >>> +++-
> >>>  arch/arm64/kernel/perf_event.c  | 161 
> >>> 
> >>>  2 files changed, 160 insertions(+), 162 deletions(-)
> >>>
> >>> diff --git a/arch/arm64/include/asm/perf_event.h 
> >>> b/arch/arm64/include/asm/perf_event.h
> >>> index 2065f46..6c7b18b 100644
> >>> --- a/arch/arm64/include/asm/perf_event.h
> >>> +++ b/arch/arm64/include/asm/perf_event.h
> >>> @@ -46,7 +46,166 @@
> >>>  #define  ARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
> >>> bits */
> >>>  #define  ARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
> >>> */
> >>>  
> >>> -#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR   0   /* Software increment 
> >>> event */
> >>> +/*
> >>> + * ARMv8 PMUv3 Performance Events handling code.
> >>> + * Common event types.
> >>> + */
> >>> +
> >>> +/* Required events. */
> >>> +#define ARMV8_PMUV3_PERFCTR_SW_INCR  0x00
> >>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x03
> >>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE0x04
> >>> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED  0x10
> >>> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES   0x11
> >>> +#define ARMV8_PMUV3_PERFCTR_BR_PRED  0x12
> >>
> >> In my initial review, I asked for the "required" events to be moved to a
> >> shared location. What's the rational for moving absolutely everything?
> > 
> > I did notice the phrase "required" in the original email. However I
> > think it is weird to have two places for a same set of PMU definitions.
> > Other developers might think these two are missing if they don't search
> > kernel files carefully.
> > 
> > If Will Deacon and you insist, I can move only two defs to perf_event.h,
> > consolidated with the 2nd patch into a single one.
> 
> My personal feeling is that only architected events should be in a
> public header. The CPU-specific ones are probably better kept private,
> as it is doubtful that other users would appear).
> 
> I'll leave it up to Will to decide, as all I want to avoid is the
> duplication of constants between the PMU and KVM code bases.

Yeah, just take the sets that you need (i.e. the architected events).

Also, check that it builds.

Will

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Will Deacon]

On Thu, Nov 10, 2016 at 03:32:12PM +, Marc Zyngier wrote:
> On 10/11/16 15:12, Wei Huang wrote:
> > 
> > 
> > On 11/10/2016 03:10 AM, Marc Zyngier wrote:
> >> Hi Wei,
> >>
> >> On 09/11/16 19:57, Wei Huang wrote:
> >>> This patch moves ARMv8-related perf event definitions from perf_event.c
> >>> to asm/perf_event.h; so KVM code can use them directly. This also help
> >>> remove a duplicated definition of SW_INCR in perf_event.h.
> >>>
> >>> Signed-off-by: Wei Huang 
> >>> ---
> >>>  arch/arm64/include/asm/perf_event.h | 161 
> >>> +++-
> >>>  arch/arm64/kernel/perf_event.c  | 161 
> >>> 
> >>>  2 files changed, 160 insertions(+), 162 deletions(-)
> >>>
> >>> diff --git a/arch/arm64/include/asm/perf_event.h 
> >>> b/arch/arm64/include/asm/perf_event.h
> >>> index 2065f46..6c7b18b 100644
> >>> --- a/arch/arm64/include/asm/perf_event.h
> >>> +++ b/arch/arm64/include/asm/perf_event.h
> >>> @@ -46,7 +46,166 @@
> >>>  #define  ARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
> >>> bits */
> >>>  #define  ARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
> >>> */
> >>>  
> >>> -#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR   0   /* Software increment 
> >>> event */
> >>> +/*
> >>> + * ARMv8 PMUv3 Performance Events handling code.
> >>> + * Common event types.
> >>> + */
> >>> +
> >>> +/* Required events. */
> >>> +#define ARMV8_PMUV3_PERFCTR_SW_INCR  0x00
> >>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x03
> >>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE0x04
> >>> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED  0x10
> >>> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES   0x11
> >>> +#define ARMV8_PMUV3_PERFCTR_BR_PRED  0x12
> >>
> >> In my initial review, I asked for the "required" events to be moved to a
> >> shared location. What's the rational for moving absolutely everything?
> > 
> > I did notice the phrase "required" in the original email. However I
> > think it is weird to have two places for a same set of PMU definitions.
> > Other developers might think these two are missing if they don't search
> > kernel files carefully.
> > 
> > If Will Deacon and you insist, I can move only two defs to perf_event.h,
> > consolidated with the 2nd patch into a single one.
> 
> My personal feeling is that only architected events should be in a
> public header. The CPU-specific ones are probably better kept private,
> as it is doubtful that other users would appear).
> 
> I'll leave it up to Will to decide, as all I want to avoid is the
> duplication of constants between the PMU and KVM code bases.

Yeah, just take the sets that you need (i.e. the architected events).

Also, check that it builds.

Will

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Marc Zyngier]

On 10/11/16 15:12, Wei Huang wrote:
> 
> 
> On 11/10/2016 03:10 AM, Marc Zyngier wrote:
>> Hi Wei,
>>
>> On 09/11/16 19:57, Wei Huang wrote:
>>> This patch moves ARMv8-related perf event definitions from perf_event.c
>>> to asm/perf_event.h; so KVM code can use them directly. This also help
>>> remove a duplicated definition of SW_INCR in perf_event.h.
>>>
>>> Signed-off-by: Wei Huang 
>>> ---
>>>  arch/arm64/include/asm/perf_event.h | 161 
>>> +++-
>>>  arch/arm64/kernel/perf_event.c  | 161 
>>> 
>>>  2 files changed, 160 insertions(+), 162 deletions(-)
>>>
>>> diff --git a/arch/arm64/include/asm/perf_event.h 
>>> b/arch/arm64/include/asm/perf_event.h
>>> index 2065f46..6c7b18b 100644
>>> --- a/arch/arm64/include/asm/perf_event.h
>>> +++ b/arch/arm64/include/asm/perf_event.h
>>> @@ -46,7 +46,166 @@
>>>  #defineARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
>>> bits */
>>>  #defineARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
>>> */
>>>  
>>> -#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR 0   /* Software increment 
>>> event */
>>> +/*
>>> + * ARMv8 PMUv3 Performance Events handling code.
>>> + * Common event types.
>>> + */
>>> +
>>> +/* Required events. */
>>> +#define ARMV8_PMUV3_PERFCTR_SW_INCR0x00
>>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL   0x03
>>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE  0x04
>>> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED0x10
>>> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES 0x11
>>> +#define ARMV8_PMUV3_PERFCTR_BR_PRED0x12
>>
>> In my initial review, I asked for the "required" events to be moved to a
>> shared location. What's the rational for moving absolutely everything?
> 
> I did notice the phrase "required" in the original email. However I
> think it is weird to have two places for a same set of PMU definitions.
> Other developers might think these two are missing if they don't search
> kernel files carefully.
> 
> If Will Deacon and you insist, I can move only two defs to perf_event.h,
> consolidated with the 2nd patch into a single one.

My personal feeling is that only architected events should be in a
public header. The CPU-specific ones are probably better kept private,
as it is doubtful that other users would appear).

I'll leave it up to Will to decide, as all I want to avoid is the
duplication of constants between the PMU and KVM code bases.

Thanks,

M.
-- 
Jazz is not dead. It just smells funny...

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Marc Zyngier]

On 10/11/16 15:12, Wei Huang wrote:
> 
> 
> On 11/10/2016 03:10 AM, Marc Zyngier wrote:
>> Hi Wei,
>>
>> On 09/11/16 19:57, Wei Huang wrote:
>>> This patch moves ARMv8-related perf event definitions from perf_event.c
>>> to asm/perf_event.h; so KVM code can use them directly. This also help
>>> remove a duplicated definition of SW_INCR in perf_event.h.
>>>
>>> Signed-off-by: Wei Huang 
>>> ---
>>>  arch/arm64/include/asm/perf_event.h | 161 
>>> +++-
>>>  arch/arm64/kernel/perf_event.c  | 161 
>>> 
>>>  2 files changed, 160 insertions(+), 162 deletions(-)
>>>
>>> diff --git a/arch/arm64/include/asm/perf_event.h 
>>> b/arch/arm64/include/asm/perf_event.h
>>> index 2065f46..6c7b18b 100644
>>> --- a/arch/arm64/include/asm/perf_event.h
>>> +++ b/arch/arm64/include/asm/perf_event.h
>>> @@ -46,7 +46,166 @@
>>>  #defineARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
>>> bits */
>>>  #defineARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
>>> */
>>>  
>>> -#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR 0   /* Software increment 
>>> event */
>>> +/*
>>> + * ARMv8 PMUv3 Performance Events handling code.
>>> + * Common event types.
>>> + */
>>> +
>>> +/* Required events. */
>>> +#define ARMV8_PMUV3_PERFCTR_SW_INCR0x00
>>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL   0x03
>>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE  0x04
>>> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED0x10
>>> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES 0x11
>>> +#define ARMV8_PMUV3_PERFCTR_BR_PRED0x12
>>
>> In my initial review, I asked for the "required" events to be moved to a
>> shared location. What's the rational for moving absolutely everything?
> 
> I did notice the phrase "required" in the original email. However I
> think it is weird to have two places for a same set of PMU definitions.
> Other developers might think these two are missing if they don't search
> kernel files carefully.
> 
> If Will Deacon and you insist, I can move only two defs to perf_event.h,
> consolidated with the 2nd patch into a single one.

My personal feeling is that only architected events should be in a
public header. The CPU-specific ones are probably better kept private,
as it is doubtful that other users would appear).

I'll leave it up to Will to decide, as all I want to avoid is the
duplication of constants between the PMU and KVM code bases.

Thanks,

M.
-- 
Jazz is not dead. It just smells funny...

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Mark Rutland]

On Thu, Nov 10, 2016 at 09:12:35AM -0600, Wei Huang wrote:
> On 11/10/2016 03:10 AM, Marc Zyngier wrote:
> > On 09/11/16 19:57, Wei Huang wrote:
> >> diff --git a/arch/arm64/include/asm/perf_event.h 
> >> b/arch/arm64/include/asm/perf_event.h

> >> +/*
> >> + * ARMv8 PMUv3 Performance Events handling code.
> >> + * Common event types.
> >> + */
> >> +
> >> +/* Required events. */
> >> +#define ARMV8_PMUV3_PERFCTR_SW_INCR   0x00
> >> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL  0x03
> >> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x04
> >> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED   0x10
> >> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES0x11
> >> +#define ARMV8_PMUV3_PERFCTR_BR_PRED   0x12
> > 
> > In my initial review, I asked for the "required" events to be moved to a
> > shared location. What's the rational for moving absolutely everything?
> 
> I did notice the phrase "required" in the original email. However I
> think it is weird to have two places for a same set of PMU definitions.
> Other developers might think these two are missing if they don't search
> kernel files carefully.
> 
> If Will Deacon and you insist, I can move only two defs to perf_event.h,
> consolidated with the 2nd patch into a single one.

FWIW, my personal preference would be for all the definitions (or at
least all of the ARMV8_PMUV3_* ones) to be in one place.

That said, I don't feel particularly strongly either way, and I'll defer
to Will.

Thanks,
Mark.

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Mark Rutland]

On Thu, Nov 10, 2016 at 09:12:35AM -0600, Wei Huang wrote:
> On 11/10/2016 03:10 AM, Marc Zyngier wrote:
> > On 09/11/16 19:57, Wei Huang wrote:
> >> diff --git a/arch/arm64/include/asm/perf_event.h 
> >> b/arch/arm64/include/asm/perf_event.h

> >> +/*
> >> + * ARMv8 PMUv3 Performance Events handling code.
> >> + * Common event types.
> >> + */
> >> +
> >> +/* Required events. */
> >> +#define ARMV8_PMUV3_PERFCTR_SW_INCR   0x00
> >> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL  0x03
> >> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x04
> >> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED   0x10
> >> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES0x11
> >> +#define ARMV8_PMUV3_PERFCTR_BR_PRED   0x12
> > 
> > In my initial review, I asked for the "required" events to be moved to a
> > shared location. What's the rational for moving absolutely everything?
> 
> I did notice the phrase "required" in the original email. However I
> think it is weird to have two places for a same set of PMU definitions.
> Other developers might think these two are missing if they don't search
> kernel files carefully.
> 
> If Will Deacon and you insist, I can move only two defs to perf_event.h,
> consolidated with the 2nd patch into a single one.

FWIW, my personal preference would be for all the definitions (or at
least all of the ARMV8_PMUV3_* ones) to be in one place.

That said, I don't feel particularly strongly either way, and I'll defer
to Will.

Thanks,
Mark.

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Wei Huang]

On 11/10/2016 03:10 AM, Marc Zyngier wrote:
> Hi Wei,
> 
> On 09/11/16 19:57, Wei Huang wrote:
>> This patch moves ARMv8-related perf event definitions from perf_event.c
>> to asm/perf_event.h; so KVM code can use them directly. This also help
>> remove a duplicated definition of SW_INCR in perf_event.h.
>>
>> Signed-off-by: Wei Huang 
>> ---
>>  arch/arm64/include/asm/perf_event.h | 161 
>> +++-
>>  arch/arm64/kernel/perf_event.c  | 161 
>> 
>>  2 files changed, 160 insertions(+), 162 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/perf_event.h 
>> b/arch/arm64/include/asm/perf_event.h
>> index 2065f46..6c7b18b 100644
>> --- a/arch/arm64/include/asm/perf_event.h
>> +++ b/arch/arm64/include/asm/perf_event.h
>> @@ -46,7 +46,166 @@
>>  #define ARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
>> bits */
>>  #define ARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
>> */
>>  
>> -#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR  0   /* Software increment 
>> event */
>> +/*
>> + * ARMv8 PMUv3 Performance Events handling code.
>> + * Common event types.
>> + */
>> +
>> +/* Required events. */
>> +#define ARMV8_PMUV3_PERFCTR_SW_INCR 0x00
>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL0x03
>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE   0x04
>> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED 0x10
>> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES  0x11
>> +#define ARMV8_PMUV3_PERFCTR_BR_PRED 0x12
> 
> In my initial review, I asked for the "required" events to be moved to a
> shared location. What's the rational for moving absolutely everything?

I did notice the phrase "required" in the original email. However I
think it is weird to have two places for a same set of PMU definitions.
Other developers might think these two are missing if they don't search
kernel files carefully.

If Will Deacon and you insist, I can move only two defs to perf_event.h,
consolidated with the 2nd patch into a single one.

> KVM only needs to know about ARMV8_PMUV3_PERFCTR_SW_INCR and
> ARMV8_PMUV3_PERFCTR_CPU_CYCLES, so I thought that moving the above six
> events (and maybe the following two) would be enough.
> 
> Also, you've now broken the build by dropping
> ARMV8_PMU_EVTYPE_EVENT_SW_INCR without amending it use in the KVM PMU
> code (see the kbuild report).
> 

My bad. I tested compilation only after two patches applied. Will fix it.



>> +
>>  /* PMUv3 HW events mapping. */
>>  
>>  /*
>>
> 
> Thanks,
> 
>   M.
> 

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Wei Huang]

On 11/10/2016 03:10 AM, Marc Zyngier wrote:
> Hi Wei,
> 
> On 09/11/16 19:57, Wei Huang wrote:
>> This patch moves ARMv8-related perf event definitions from perf_event.c
>> to asm/perf_event.h; so KVM code can use them directly. This also help
>> remove a duplicated definition of SW_INCR in perf_event.h.
>>
>> Signed-off-by: Wei Huang 
>> ---
>>  arch/arm64/include/asm/perf_event.h | 161 
>> +++-
>>  arch/arm64/kernel/perf_event.c  | 161 
>> 
>>  2 files changed, 160 insertions(+), 162 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/perf_event.h 
>> b/arch/arm64/include/asm/perf_event.h
>> index 2065f46..6c7b18b 100644
>> --- a/arch/arm64/include/asm/perf_event.h
>> +++ b/arch/arm64/include/asm/perf_event.h
>> @@ -46,7 +46,166 @@
>>  #define ARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
>> bits */
>>  #define ARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
>> */
>>  
>> -#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR  0   /* Software increment 
>> event */
>> +/*
>> + * ARMv8 PMUv3 Performance Events handling code.
>> + * Common event types.
>> + */
>> +
>> +/* Required events. */
>> +#define ARMV8_PMUV3_PERFCTR_SW_INCR 0x00
>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL0x03
>> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE   0x04
>> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED 0x10
>> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES  0x11
>> +#define ARMV8_PMUV3_PERFCTR_BR_PRED 0x12
> 
> In my initial review, I asked for the "required" events to be moved to a
> shared location. What's the rational for moving absolutely everything?

I did notice the phrase "required" in the original email. However I
think it is weird to have two places for a same set of PMU definitions.
Other developers might think these two are missing if they don't search
kernel files carefully.

If Will Deacon and you insist, I can move only two defs to perf_event.h,
consolidated with the 2nd patch into a single one.

> KVM only needs to know about ARMV8_PMUV3_PERFCTR_SW_INCR and
> ARMV8_PMUV3_PERFCTR_CPU_CYCLES, so I thought that moving the above six
> events (and maybe the following two) would be enough.
> 
> Also, you've now broken the build by dropping
> ARMV8_PMU_EVTYPE_EVENT_SW_INCR without amending it use in the KVM PMU
> code (see the kbuild report).
> 

My bad. I tested compilation only after two patches applied. Will fix it.



>> +
>>  /* PMUv3 HW events mapping. */
>>  
>>  /*
>>
> 
> Thanks,
> 
>   M.
> 

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Marc Zyngier]

Hi Wei,

On 09/11/16 19:57, Wei Huang wrote:
> This patch moves ARMv8-related perf event definitions from perf_event.c
> to asm/perf_event.h; so KVM code can use them directly. This also help
> remove a duplicated definition of SW_INCR in perf_event.h.
> 
> Signed-off-by: Wei Huang 
> ---
>  arch/arm64/include/asm/perf_event.h | 161 
> +++-
>  arch/arm64/kernel/perf_event.c  | 161 
> 
>  2 files changed, 160 insertions(+), 162 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/perf_event.h 
> b/arch/arm64/include/asm/perf_event.h
> index 2065f46..6c7b18b 100644
> --- a/arch/arm64/include/asm/perf_event.h
> +++ b/arch/arm64/include/asm/perf_event.h
> @@ -46,7 +46,166 @@
>  #define  ARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
> bits */
>  #define  ARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
> */
>  
> -#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR   0   /* Software increment 
> event */
> +/*
> + * ARMv8 PMUv3 Performance Events handling code.
> + * Common event types.
> + */
> +
> +/* Required events. */
> +#define ARMV8_PMUV3_PERFCTR_SW_INCR  0x00
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x03
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE0x04
> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED  0x10
> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES   0x11
> +#define ARMV8_PMUV3_PERFCTR_BR_PRED  0x12

In my initial review, I asked for the "required" events to be moved to a
shared location. What's the rational for moving absolutely everything?
KVM only needs to know about ARMV8_PMUV3_PERFCTR_SW_INCR and
ARMV8_PMUV3_PERFCTR_CPU_CYCLES, so I thought that moving the above six
events (and maybe the following two) would be enough.

Also, you've now broken the build by dropping
ARMV8_PMU_EVTYPE_EVENT_SW_INCR without amending it use in the KVM PMU
code (see the kbuild report).

> +
> +/* At least one of the following is required. */
> +#define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x08
> +#define ARMV8_PMUV3_PERFCTR_INST_SPEC0x1B
> +
> +/* Common architectural events. */
> +#define ARMV8_PMUV3_PERFCTR_LD_RETIRED   0x06
> +#define ARMV8_PMUV3_PERFCTR_ST_RETIRED   0x07
> +#define ARMV8_PMUV3_PERFCTR_EXC_TAKEN0x09
> +#define ARMV8_PMUV3_PERFCTR_EXC_RETURN   0x0A
> +#define ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED0x0B
> +#define ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED 0x0C
> +#define ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED 0x0D
> +#define ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED0x0E
> +#define ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED   0x0F
> +#define ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED   0x1C
> +#define ARMV8_PMUV3_PERFCTR_CHAIN0x1E
> +#define ARMV8_PMUV3_PERFCTR_BR_RETIRED   0x21
> +
> +/* Common microarchitectural events. */
> +#define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x01
> +#define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL   0x02
> +#define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL   0x05
> +#define ARMV8_PMUV3_PERFCTR_MEM_ACCESS   0x13
> +#define ARMV8_PMUV3_PERFCTR_L1I_CACHE0x14
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB 0x15
> +#define ARMV8_PMUV3_PERFCTR_L2D_CACHE0x16
> +#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL 0x17
> +#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB 0x18
> +#define ARMV8_PMUV3_PERFCTR_BUS_ACCESS   0x19
> +#define ARMV8_PMUV3_PERFCTR_MEMORY_ERROR 0x1A
> +#define ARMV8_PMUV3_PERFCTR_BUS_CYCLES   0x1D
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE   0x1F
> +#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE   0x20
> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED  0x22
> +#define ARMV8_PMUV3_PERFCTR_STALL_FRONTEND   0x23
> +#define ARMV8_PMUV3_PERFCTR_STALL_BACKEND0x24
> +#define ARMV8_PMUV3_PERFCTR_L1D_TLB  0x25
> +#define ARMV8_PMUV3_PERFCTR_L1I_TLB  0x26
> +#define ARMV8_PMUV3_PERFCTR_L2I_CACHE0x27
> +#define ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL 0x28
> +#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE   0x29
> +#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL 0x2A
> +#define ARMV8_PMUV3_PERFCTR_L3D_CACHE

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Marc Zyngier]

Hi Wei,

On 09/11/16 19:57, Wei Huang wrote:
> This patch moves ARMv8-related perf event definitions from perf_event.c
> to asm/perf_event.h; so KVM code can use them directly. This also help
> remove a duplicated definition of SW_INCR in perf_event.h.
> 
> Signed-off-by: Wei Huang 
> ---
>  arch/arm64/include/asm/perf_event.h | 161 
> +++-
>  arch/arm64/kernel/perf_event.c  | 161 
> 
>  2 files changed, 160 insertions(+), 162 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/perf_event.h 
> b/arch/arm64/include/asm/perf_event.h
> index 2065f46..6c7b18b 100644
> --- a/arch/arm64/include/asm/perf_event.h
> +++ b/arch/arm64/include/asm/perf_event.h
> @@ -46,7 +46,166 @@
>  #define  ARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
> bits */
>  #define  ARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
> */
>  
> -#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR   0   /* Software increment 
> event */
> +/*
> + * ARMv8 PMUv3 Performance Events handling code.
> + * Common event types.
> + */
> +
> +/* Required events. */
> +#define ARMV8_PMUV3_PERFCTR_SW_INCR  0x00
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x03
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE0x04
> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED  0x10
> +#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES   0x11
> +#define ARMV8_PMUV3_PERFCTR_BR_PRED  0x12

In my initial review, I asked for the "required" events to be moved to a
shared location. What's the rational for moving absolutely everything?
KVM only needs to know about ARMV8_PMUV3_PERFCTR_SW_INCR and
ARMV8_PMUV3_PERFCTR_CPU_CYCLES, so I thought that moving the above six
events (and maybe the following two) would be enough.

Also, you've now broken the build by dropping
ARMV8_PMU_EVTYPE_EVENT_SW_INCR without amending it use in the KVM PMU
code (see the kbuild report).

> +
> +/* At least one of the following is required. */
> +#define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x08
> +#define ARMV8_PMUV3_PERFCTR_INST_SPEC0x1B
> +
> +/* Common architectural events. */
> +#define ARMV8_PMUV3_PERFCTR_LD_RETIRED   0x06
> +#define ARMV8_PMUV3_PERFCTR_ST_RETIRED   0x07
> +#define ARMV8_PMUV3_PERFCTR_EXC_TAKEN0x09
> +#define ARMV8_PMUV3_PERFCTR_EXC_RETURN   0x0A
> +#define ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED0x0B
> +#define ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED 0x0C
> +#define ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED 0x0D
> +#define ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED0x0E
> +#define ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED   0x0F
> +#define ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED   0x1C
> +#define ARMV8_PMUV3_PERFCTR_CHAIN0x1E
> +#define ARMV8_PMUV3_PERFCTR_BR_RETIRED   0x21
> +
> +/* Common microarchitectural events. */
> +#define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x01
> +#define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL   0x02
> +#define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL   0x05
> +#define ARMV8_PMUV3_PERFCTR_MEM_ACCESS   0x13
> +#define ARMV8_PMUV3_PERFCTR_L1I_CACHE0x14
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB 0x15
> +#define ARMV8_PMUV3_PERFCTR_L2D_CACHE0x16
> +#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL 0x17
> +#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB 0x18
> +#define ARMV8_PMUV3_PERFCTR_BUS_ACCESS   0x19
> +#define ARMV8_PMUV3_PERFCTR_MEMORY_ERROR 0x1A
> +#define ARMV8_PMUV3_PERFCTR_BUS_CYCLES   0x1D
> +#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE   0x1F
> +#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE   0x20
> +#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED  0x22
> +#define ARMV8_PMUV3_PERFCTR_STALL_FRONTEND   0x23
> +#define ARMV8_PMUV3_PERFCTR_STALL_BACKEND0x24
> +#define ARMV8_PMUV3_PERFCTR_L1D_TLB  0x25
> +#define ARMV8_PMUV3_PERFCTR_L1I_TLB  0x26
> +#define ARMV8_PMUV3_PERFCTR_L2I_CACHE0x27
> +#define ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL 0x28
> +#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE   0x29
> +#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL 0x2A
> +#define ARMV8_PMUV3_PERFCTR_L3D_CACHE0x2B
> +#define 

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[kbuild test robot]

Hi Wei,

[auto build test ERROR on tip/perf/core]
[also build test ERROR on v4.9-rc4 next-20161109]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Wei-Huang/arm64-perf-Move-ARMv8-PMU-perf-event-definitions-to-asm-perf_event-h/20161110-040107
config: arm64-defconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64 

Note: the 
linux-review/Wei-Huang/arm64-perf-Move-ARMv8-PMU-perf-event-definitions-to-asm-perf_event-h/20161110-040107
 HEAD 72ad64c0d8d13a655312ace104d723c9dd7dc5b0 builds fine.
  It only hurts bisectibility.

All errors (new ones prefixed by >>):

   arch/arm64/kvm/../../../virt/kvm/arm/pmu.c: In function 
'kvm_pmu_software_increment':
>> arch/arm64/kvm/../../../virt/kvm/arm/pmu.c:308:16: error: 
>> 'ARMV8_PMU_EVTYPE_EVENT_SW_INCR' undeclared (first use in this function)
  if ((type == ARMV8_PMU_EVTYPE_EVENT_SW_INCR)
   ^~
   arch/arm64/kvm/../../../virt/kvm/arm/pmu.c:308:16: note: each undeclared 
identifier is reported only once for each function it appears in
   arch/arm64/kvm/../../../virt/kvm/arm/pmu.c: In function 
'kvm_pmu_set_counter_event_type':
   arch/arm64/kvm/../../../virt/kvm/arm/pmu.c:382:18: error: 
'ARMV8_PMU_EVTYPE_EVENT_SW_INCR' undeclared (first use in this function)
 if (eventsel == ARMV8_PMU_EVTYPE_EVENT_SW_INCR)
 ^~

vim +/ARMV8_PMU_EVTYPE_EVENT_SW_INCR +308 
arch/arm64/kvm/../../../virt/kvm/arm/pmu.c

7a0adc70 Shannon Zhao 2015-09-08  302   enable = vcpu_sys_reg(vcpu, 
PMCNTENSET_EL0);
7a0adc70 Shannon Zhao 2015-09-08  303   for (i = 0; i < ARMV8_PMU_CYCLE_IDX; 
i++) {
7a0adc70 Shannon Zhao 2015-09-08  304   if (!(val & BIT(i)))
7a0adc70 Shannon Zhao 2015-09-08  305   continue;
7a0adc70 Shannon Zhao 2015-09-08  306   type = vcpu_sys_reg(vcpu, 
PMEVTYPER0_EL0 + i)
7a0adc70 Shannon Zhao 2015-09-08  307  & ARMV8_PMU_EVTYPE_EVENT;
7a0adc70 Shannon Zhao 2015-09-08 @308   if ((type == 
ARMV8_PMU_EVTYPE_EVENT_SW_INCR)
7a0adc70 Shannon Zhao 2015-09-08  309   && (enable & BIT(i))) {
7a0adc70 Shannon Zhao 2015-09-08  310   reg = 
vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i) + 1;
7a0adc70 Shannon Zhao 2015-09-08  311   reg = 
lower_32_bits(reg);

:: The code at line 308 was first introduced by commit
:: 7a0adc7064b88609e2917446af8789fac1d4fdd1 arm64: KVM: Add access handler 
for PMSWINC register

:: TO: Shannon Zhao 
:: CC: Marc Zyngier 

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

Re: [PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[kbuild test robot]

Hi Wei,

[auto build test ERROR on tip/perf/core]
[also build test ERROR on v4.9-rc4 next-20161109]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Wei-Huang/arm64-perf-Move-ARMv8-PMU-perf-event-definitions-to-asm-perf_event-h/20161110-040107
config: arm64-defconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64 

Note: the 
linux-review/Wei-Huang/arm64-perf-Move-ARMv8-PMU-perf-event-definitions-to-asm-perf_event-h/20161110-040107
 HEAD 72ad64c0d8d13a655312ace104d723c9dd7dc5b0 builds fine.
  It only hurts bisectibility.

All errors (new ones prefixed by >>):

   arch/arm64/kvm/../../../virt/kvm/arm/pmu.c: In function 
'kvm_pmu_software_increment':
>> arch/arm64/kvm/../../../virt/kvm/arm/pmu.c:308:16: error: 
>> 'ARMV8_PMU_EVTYPE_EVENT_SW_INCR' undeclared (first use in this function)
  if ((type == ARMV8_PMU_EVTYPE_EVENT_SW_INCR)
   ^~
   arch/arm64/kvm/../../../virt/kvm/arm/pmu.c:308:16: note: each undeclared 
identifier is reported only once for each function it appears in
   arch/arm64/kvm/../../../virt/kvm/arm/pmu.c: In function 
'kvm_pmu_set_counter_event_type':
   arch/arm64/kvm/../../../virt/kvm/arm/pmu.c:382:18: error: 
'ARMV8_PMU_EVTYPE_EVENT_SW_INCR' undeclared (first use in this function)
 if (eventsel == ARMV8_PMU_EVTYPE_EVENT_SW_INCR)
 ^~

vim +/ARMV8_PMU_EVTYPE_EVENT_SW_INCR +308 
arch/arm64/kvm/../../../virt/kvm/arm/pmu.c

7a0adc70 Shannon Zhao 2015-09-08  302   enable = vcpu_sys_reg(vcpu, 
PMCNTENSET_EL0);
7a0adc70 Shannon Zhao 2015-09-08  303   for (i = 0; i < ARMV8_PMU_CYCLE_IDX; 
i++) {
7a0adc70 Shannon Zhao 2015-09-08  304   if (!(val & BIT(i)))
7a0adc70 Shannon Zhao 2015-09-08  305   continue;
7a0adc70 Shannon Zhao 2015-09-08  306   type = vcpu_sys_reg(vcpu, 
PMEVTYPER0_EL0 + i)
7a0adc70 Shannon Zhao 2015-09-08  307  & ARMV8_PMU_EVTYPE_EVENT;
7a0adc70 Shannon Zhao 2015-09-08 @308   if ((type == 
ARMV8_PMU_EVTYPE_EVENT_SW_INCR)
7a0adc70 Shannon Zhao 2015-09-08  309   && (enable & BIT(i))) {
7a0adc70 Shannon Zhao 2015-09-08  310   reg = 
vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i) + 1;
7a0adc70 Shannon Zhao 2015-09-08  311   reg = 
lower_32_bits(reg);

:: The code at line 308 was first introduced by commit
:: 7a0adc7064b88609e2917446af8789fac1d4fdd1 arm64: KVM: Add access handler 
for PMSWINC register

:: TO: Shannon Zhao 
:: CC: Marc Zyngier 

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

[PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Wei Huang]

This patch moves ARMv8-related perf event definitions from perf_event.c
to asm/perf_event.h; so KVM code can use them directly. This also help
remove a duplicated definition of SW_INCR in perf_event.h.

Signed-off-by: Wei Huang 
---
 arch/arm64/include/asm/perf_event.h | 161 +++-
 arch/arm64/kernel/perf_event.c  | 161 
 2 files changed, 160 insertions(+), 162 deletions(-)

diff --git a/arch/arm64/include/asm/perf_event.h 
b/arch/arm64/include/asm/perf_event.h
index 2065f46..6c7b18b 100644
--- a/arch/arm64/include/asm/perf_event.h
+++ b/arch/arm64/include/asm/perf_event.h
@@ -46,7 +46,166 @@
 #defineARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
bits */
 #defineARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
*/
 
-#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR 0   /* Software increment event */
+/*
+ * ARMv8 PMUv3 Performance Events handling code.
+ * Common event types.
+ */
+
+/* Required events. */
+#define ARMV8_PMUV3_PERFCTR_SW_INCR0x00
+#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL   0x03
+#define ARMV8_PMUV3_PERFCTR_L1D_CACHE  0x04
+#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED0x10
+#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES 0x11
+#define ARMV8_PMUV3_PERFCTR_BR_PRED0x12
+
+/* At least one of the following is required. */
+#define ARMV8_PMUV3_PERFCTR_INST_RETIRED   0x08
+#define ARMV8_PMUV3_PERFCTR_INST_SPEC  0x1B
+
+/* Common architectural events. */
+#define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x06
+#define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x07
+#define ARMV8_PMUV3_PERFCTR_EXC_TAKEN  0x09
+#define ARMV8_PMUV3_PERFCTR_EXC_RETURN 0x0A
+#define ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED  0x0B
+#define ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED   0x0C
+#define ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED   0x0D
+#define ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED  0x0E
+#define ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED 0x0F
+#define ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED 0x1C
+#define ARMV8_PMUV3_PERFCTR_CHAIN  0x1E
+#define ARMV8_PMUV3_PERFCTR_BR_RETIRED 0x21
+
+/* Common microarchitectural events. */
+#define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL   0x01
+#define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x02
+#define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x05
+#define ARMV8_PMUV3_PERFCTR_MEM_ACCESS 0x13
+#define ARMV8_PMUV3_PERFCTR_L1I_CACHE  0x14
+#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB   0x15
+#define ARMV8_PMUV3_PERFCTR_L2D_CACHE  0x16
+#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL   0x17
+#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB   0x18
+#define ARMV8_PMUV3_PERFCTR_BUS_ACCESS 0x19
+#define ARMV8_PMUV3_PERFCTR_MEMORY_ERROR   0x1A
+#define ARMV8_PMUV3_PERFCTR_BUS_CYCLES 0x1D
+#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE 0x1F
+#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE 0x20
+#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED0x22
+#define ARMV8_PMUV3_PERFCTR_STALL_FRONTEND 0x23
+#define ARMV8_PMUV3_PERFCTR_STALL_BACKEND  0x24
+#define ARMV8_PMUV3_PERFCTR_L1D_TLB0x25
+#define ARMV8_PMUV3_PERFCTR_L1I_TLB0x26
+#define ARMV8_PMUV3_PERFCTR_L2I_CACHE  0x27
+#define ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL   0x28
+#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE 0x29
+#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL   0x2A
+#define ARMV8_PMUV3_PERFCTR_L3D_CACHE  0x2B
+#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_WB   0x2C
+#define ARMV8_PMUV3_PERFCTR_L2D_TLB_REFILL 0x2D
+#define ARMV8_PMUV3_PERFCTR_L2I_TLB_REFILL 0x2E
+#define ARMV8_PMUV3_PERFCTR_L2D_TLB0x2F
+#define ARMV8_PMUV3_PERFCTR_L2I_TLB0x30
+
+/* ARMv8 recommended implementation defined event types */
+#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD  0x40
+#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR  0x41
+#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD   0x42
+#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR   0x43
+#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_INNER0x44
+#define 

[PATCH 1/2] arm64: perf: Move ARMv8 PMU perf event definitions to asm/perf_event.h

[Wei Huang]

This patch moves ARMv8-related perf event definitions from perf_event.c
to asm/perf_event.h; so KVM code can use them directly. This also help
remove a duplicated definition of SW_INCR in perf_event.h.

Signed-off-by: Wei Huang 
---
 arch/arm64/include/asm/perf_event.h | 161 +++-
 arch/arm64/kernel/perf_event.c  | 161 
 2 files changed, 160 insertions(+), 162 deletions(-)

diff --git a/arch/arm64/include/asm/perf_event.h 
b/arch/arm64/include/asm/perf_event.h
index 2065f46..6c7b18b 100644
--- a/arch/arm64/include/asm/perf_event.h
+++ b/arch/arm64/include/asm/perf_event.h
@@ -46,7 +46,166 @@
 #defineARMV8_PMU_EVTYPE_MASK   0xc800  /* Mask for writable 
bits */
 #defineARMV8_PMU_EVTYPE_EVENT  0x  /* Mask for EVENT bits 
*/
 
-#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR 0   /* Software increment event */
+/*
+ * ARMv8 PMUv3 Performance Events handling code.
+ * Common event types.
+ */
+
+/* Required events. */
+#define ARMV8_PMUV3_PERFCTR_SW_INCR0x00
+#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL   0x03
+#define ARMV8_PMUV3_PERFCTR_L1D_CACHE  0x04
+#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED0x10
+#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES 0x11
+#define ARMV8_PMUV3_PERFCTR_BR_PRED0x12
+
+/* At least one of the following is required. */
+#define ARMV8_PMUV3_PERFCTR_INST_RETIRED   0x08
+#define ARMV8_PMUV3_PERFCTR_INST_SPEC  0x1B
+
+/* Common architectural events. */
+#define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x06
+#define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x07
+#define ARMV8_PMUV3_PERFCTR_EXC_TAKEN  0x09
+#define ARMV8_PMUV3_PERFCTR_EXC_RETURN 0x0A
+#define ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED  0x0B
+#define ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED   0x0C
+#define ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED   0x0D
+#define ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED  0x0E
+#define ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED 0x0F
+#define ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED 0x1C
+#define ARMV8_PMUV3_PERFCTR_CHAIN  0x1E
+#define ARMV8_PMUV3_PERFCTR_BR_RETIRED 0x21
+
+/* Common microarchitectural events. */
+#define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL   0x01
+#define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x02
+#define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x05
+#define ARMV8_PMUV3_PERFCTR_MEM_ACCESS 0x13
+#define ARMV8_PMUV3_PERFCTR_L1I_CACHE  0x14
+#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB   0x15
+#define ARMV8_PMUV3_PERFCTR_L2D_CACHE  0x16
+#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL   0x17
+#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB   0x18
+#define ARMV8_PMUV3_PERFCTR_BUS_ACCESS 0x19
+#define ARMV8_PMUV3_PERFCTR_MEMORY_ERROR   0x1A
+#define ARMV8_PMUV3_PERFCTR_BUS_CYCLES 0x1D
+#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE 0x1F
+#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE 0x20
+#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED0x22
+#define ARMV8_PMUV3_PERFCTR_STALL_FRONTEND 0x23
+#define ARMV8_PMUV3_PERFCTR_STALL_BACKEND  0x24
+#define ARMV8_PMUV3_PERFCTR_L1D_TLB0x25
+#define ARMV8_PMUV3_PERFCTR_L1I_TLB0x26
+#define ARMV8_PMUV3_PERFCTR_L2I_CACHE  0x27
+#define ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL   0x28
+#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE 0x29
+#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL   0x2A
+#define ARMV8_PMUV3_PERFCTR_L3D_CACHE  0x2B
+#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_WB   0x2C
+#define ARMV8_PMUV3_PERFCTR_L2D_TLB_REFILL 0x2D
+#define ARMV8_PMUV3_PERFCTR_L2I_TLB_REFILL 0x2E
+#define ARMV8_PMUV3_PERFCTR_L2D_TLB0x2F
+#define ARMV8_PMUV3_PERFCTR_L2I_TLB0x30
+
+/* ARMv8 recommended implementation defined event types */
+#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD  0x40
+#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR  0x41
+#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD   0x42
+#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR   0x43
+#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_INNER0x44
+#define