[PATCH v2 08/14] MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers

2017-01-22 Thread Paul Cercueil
We set the pin configuration for the jz4740-nand, jz4740-mmc,
jz4740-fb, jz4740-pwm and jz4740-uart drivers.

This will permit those drivers to be cleaned out of the custom GPIO code
that they currently use.

Signed-off-by: Paul Cercueil 
---
 arch/mips/boot/dts/ingenic/qi_lb60.dts | 13 +++
 arch/mips/jz4740/board-qi_lb60.c   | 42 ++
 2 files changed, 46 insertions(+), 9 deletions(-)

v2: Changed the devicetree bindings to match the new driver

diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts 
b/arch/mips/boot/dts/ingenic/qi_lb60.dts
index be1a7d3a3e1b..b715ee2ac2ee 100644
--- a/arch/mips/boot/dts/ingenic/qi_lb60.dts
+++ b/arch/mips/boot/dts/ingenic/qi_lb60.dts
@@ -17,3 +17,16 @@
 _dev {
system-power-controller;
 };
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_uart0>;
+};
+
+ {
+   pins_uart0: uart0 {
+   function = "uart0";
+   groups = "uart0-data";
+   bias-disable;
+   };
+};
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index a5bd94b95263..bf3dcc9ee9f8 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -22,6 +22,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -447,13 +449,36 @@ static struct platform_device *jz_platform_devices[] 
__initdata = {
_lb60_audio_device,
 };
 
-static void __init board_gpio_setup(void)
-{
-   /* We only need to enable/disable pullup here for pins used in generic
-* drivers. Everything else is done by the drivers themselves. */
-   jz_gpio_disable_pullup(QI_LB60_GPIO_SD_VCC_EN_N);
-   jz_gpio_disable_pullup(QI_LB60_GPIO_SD_CD);
-}
+static unsigned long pin_cfg_bias_disable[] = {
+   PIN_CONFIG_BIAS_DISABLE,
+};
+
+static struct pinctrl_map pin_map[] __initdata = {
+   /* NAND pin configuration */
+   PIN_MAP_MUX_GROUP_DEFAULT("jz4740-nand",
+   "1001.jz4740-pinctrl", "nand", "nand"),
+
+   /* fbdev pin configuration */
+   PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_DEFAULT,
+   "1001.jz4740-pinctrl", "lcd", "lcd-8bit"),
+   PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_SLEEP,
+   "1001.jz4740-pinctrl", "lcd", "lcd-no-pins"),
+
+   /* MMC pin configuration */
+   PIN_MAP_MUX_GROUP_DEFAULT("jz4740-mmc.0",
+   "1001.jz4740-pinctrl", "mmc", "mmc-1bit"),
+   PIN_MAP_MUX_GROUP_DEFAULT("jz4740-mmc.0",
+   "1001.jz4740-pinctrl", "mmc", "mmc-4bit"),
+   PIN_MAP_CONFIGS_PIN_DEFAULT("jz4740-mmc.0",
+   "1001.jz4740-pinctrl", "PD0", pin_cfg_bias_disable),
+   PIN_MAP_CONFIGS_PIN_DEFAULT("jz4740-mmc.0",
+   "1001.jz4740-pinctrl", "PD2", pin_cfg_bias_disable),
+
+   /* PWM pin configuration */
+   PIN_MAP_MUX_GROUP_DEFAULT("jz4740-pwm",
+   "1001.jz4740-pinctrl", "pwm4", "pwm4"),
+};
+
 
 static int __init qi_lb60_init_platform_devices(void)
 {
@@ -469,6 +494,7 @@ static int __init qi_lb60_init_platform_devices(void)
ARRAY_SIZE(qi_lb60_spi_board_info));
 
pwm_add_table(qi_lb60_pwm_lookup, ARRAY_SIZE(qi_lb60_pwm_lookup));
+   pinctrl_register_mappings(pin_map, ARRAY_SIZE(pin_map));
 
return platform_add_devices(jz_platform_devices,
ARRAY_SIZE(jz_platform_devices));
@@ -479,8 +505,6 @@ static int __init qi_lb60_board_setup(void)
 {
printk(KERN_INFO "Qi Hardware JZ4740 QI LB60 setup\n");
 
-   board_gpio_setup();
-
if (qi_lb60_init_platform_devices())
panic("Failed to initialize platform devices");
 
-- 
2.11.0



[PATCH v2 08/14] MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers

2017-01-22 Thread Paul Cercueil
We set the pin configuration for the jz4740-nand, jz4740-mmc,
jz4740-fb, jz4740-pwm and jz4740-uart drivers.

This will permit those drivers to be cleaned out of the custom GPIO code
that they currently use.

Signed-off-by: Paul Cercueil 
---
 arch/mips/boot/dts/ingenic/qi_lb60.dts | 13 +++
 arch/mips/jz4740/board-qi_lb60.c   | 42 ++
 2 files changed, 46 insertions(+), 9 deletions(-)

v2: Changed the devicetree bindings to match the new driver

diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts 
b/arch/mips/boot/dts/ingenic/qi_lb60.dts
index be1a7d3a3e1b..b715ee2ac2ee 100644
--- a/arch/mips/boot/dts/ingenic/qi_lb60.dts
+++ b/arch/mips/boot/dts/ingenic/qi_lb60.dts
@@ -17,3 +17,16 @@
 _dev {
system-power-controller;
 };
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_uart0>;
+};
+
+ {
+   pins_uart0: uart0 {
+   function = "uart0";
+   groups = "uart0-data";
+   bias-disable;
+   };
+};
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index a5bd94b95263..bf3dcc9ee9f8 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -22,6 +22,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -447,13 +449,36 @@ static struct platform_device *jz_platform_devices[] 
__initdata = {
_lb60_audio_device,
 };
 
-static void __init board_gpio_setup(void)
-{
-   /* We only need to enable/disable pullup here for pins used in generic
-* drivers. Everything else is done by the drivers themselves. */
-   jz_gpio_disable_pullup(QI_LB60_GPIO_SD_VCC_EN_N);
-   jz_gpio_disable_pullup(QI_LB60_GPIO_SD_CD);
-}
+static unsigned long pin_cfg_bias_disable[] = {
+   PIN_CONFIG_BIAS_DISABLE,
+};
+
+static struct pinctrl_map pin_map[] __initdata = {
+   /* NAND pin configuration */
+   PIN_MAP_MUX_GROUP_DEFAULT("jz4740-nand",
+   "1001.jz4740-pinctrl", "nand", "nand"),
+
+   /* fbdev pin configuration */
+   PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_DEFAULT,
+   "1001.jz4740-pinctrl", "lcd", "lcd-8bit"),
+   PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_SLEEP,
+   "1001.jz4740-pinctrl", "lcd", "lcd-no-pins"),
+
+   /* MMC pin configuration */
+   PIN_MAP_MUX_GROUP_DEFAULT("jz4740-mmc.0",
+   "1001.jz4740-pinctrl", "mmc", "mmc-1bit"),
+   PIN_MAP_MUX_GROUP_DEFAULT("jz4740-mmc.0",
+   "1001.jz4740-pinctrl", "mmc", "mmc-4bit"),
+   PIN_MAP_CONFIGS_PIN_DEFAULT("jz4740-mmc.0",
+   "1001.jz4740-pinctrl", "PD0", pin_cfg_bias_disable),
+   PIN_MAP_CONFIGS_PIN_DEFAULT("jz4740-mmc.0",
+   "1001.jz4740-pinctrl", "PD2", pin_cfg_bias_disable),
+
+   /* PWM pin configuration */
+   PIN_MAP_MUX_GROUP_DEFAULT("jz4740-pwm",
+   "1001.jz4740-pinctrl", "pwm4", "pwm4"),
+};
+
 
 static int __init qi_lb60_init_platform_devices(void)
 {
@@ -469,6 +494,7 @@ static int __init qi_lb60_init_platform_devices(void)
ARRAY_SIZE(qi_lb60_spi_board_info));
 
pwm_add_table(qi_lb60_pwm_lookup, ARRAY_SIZE(qi_lb60_pwm_lookup));
+   pinctrl_register_mappings(pin_map, ARRAY_SIZE(pin_map));
 
return platform_add_devices(jz_platform_devices,
ARRAY_SIZE(jz_platform_devices));
@@ -479,8 +505,6 @@ static int __init qi_lb60_board_setup(void)
 {
printk(KERN_INFO "Qi Hardware JZ4740 QI LB60 setup\n");
 
-   board_gpio_setup();
-
if (qi_lb60_init_platform_devices())
panic("Failed to initialize platform devices");
 
-- 
2.11.0