Re: [PATCH v3] drm/mediatek: Support UYVY and YUYV format for overlay

[CK Hu]

Hi, Bibby:

I've applied this patch to my branch mediatek-drm-next-4.13, thanks.

Regards,
CK

On Tue, 2017-01-24 at 12:40 +0800, Bibby Hsieh wrote:
> MT8173 overlay can support UYVY and YUYV format,
> we add the format in DRM driver.
> 
> Signed-off-by: Bibby Hsieh 
> Reviewed-by: Daniel Kurtz 
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c  | 7 +++
>  drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 ++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c 
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index c703102..53f2001 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -40,10 +40,13 @@
>  #define  OVL_RDMA_MEM_GMC0x40402020
>  
>  #define OVL_CON_BYTE_SWAPBIT(24)
> +#define OVL_CON_MTX_YUV_TO_RGB   (6 << 16)
>  #define OVL_CON_CLRFMT_RGB565(0 << 12)
>  #define OVL_CON_CLRFMT_RGB888(1 << 12)
>  #define OVL_CON_CLRFMT_RGBA  (2 << 12)
>  #define OVL_CON_CLRFMT_ARGB  (3 << 12)
> +#define OVL_CON_CLRFMT_UYVY  (4 << 12)
> +#define OVL_CON_CLRFMT_YUYV  (5 << 12)
>  #define  OVL_CON_AEN BIT(8)
>  #define  OVL_CON_ALPHA   0xff
>  
> @@ -162,6 +165,10 @@ static unsigned int ovl_fmt_convert(unsigned int fmt)
>   case DRM_FORMAT_XBGR:
>   case DRM_FORMAT_ABGR:
>   return OVL_CON_CLRFMT_RGBA | OVL_CON_BYTE_SWAP;
> + case DRM_FORMAT_UYVY:
> + return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB;
> + case DRM_FORMAT_YUYV:
> + return OVL_CON_CLRFMT_YUYV | OVL_CON_MTX_YUV_TO_RGB;
>   }
>  }
>  
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c 
> b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> index c461a23..8c02d1d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> @@ -28,6 +28,8 @@
>   DRM_FORMAT_XRGB,
>   DRM_FORMAT_ARGB,
>   DRM_FORMAT_RGB565,
> + DRM_FORMAT_UYVY,
> + DRM_FORMAT_YUYV,
>  };
>  
>  static void mtk_plane_reset(struct drm_plane *plane)

Re: [PATCH v3] drm/mediatek: Support UYVY and YUYV format for overlay

[CK Hu]

Hi, Bibby:

I've applied this patch to my branch mediatek-drm-next-4.13, thanks.

Regards,
CK

On Tue, 2017-01-24 at 12:40 +0800, Bibby Hsieh wrote:
> MT8173 overlay can support UYVY and YUYV format,
> we add the format in DRM driver.
> 
> Signed-off-by: Bibby Hsieh 
> Reviewed-by: Daniel Kurtz 
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c  | 7 +++
>  drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 ++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c 
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index c703102..53f2001 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -40,10 +40,13 @@
>  #define  OVL_RDMA_MEM_GMC0x40402020
>  
>  #define OVL_CON_BYTE_SWAPBIT(24)
> +#define OVL_CON_MTX_YUV_TO_RGB   (6 << 16)
>  #define OVL_CON_CLRFMT_RGB565(0 << 12)
>  #define OVL_CON_CLRFMT_RGB888(1 << 12)
>  #define OVL_CON_CLRFMT_RGBA  (2 << 12)
>  #define OVL_CON_CLRFMT_ARGB  (3 << 12)
> +#define OVL_CON_CLRFMT_UYVY  (4 << 12)
> +#define OVL_CON_CLRFMT_YUYV  (5 << 12)
>  #define  OVL_CON_AEN BIT(8)
>  #define  OVL_CON_ALPHA   0xff
>  
> @@ -162,6 +165,10 @@ static unsigned int ovl_fmt_convert(unsigned int fmt)
>   case DRM_FORMAT_XBGR:
>   case DRM_FORMAT_ABGR:
>   return OVL_CON_CLRFMT_RGBA | OVL_CON_BYTE_SWAP;
> + case DRM_FORMAT_UYVY:
> + return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB;
> + case DRM_FORMAT_YUYV:
> + return OVL_CON_CLRFMT_YUYV | OVL_CON_MTX_YUV_TO_RGB;
>   }
>  }
>  
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c 
> b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> index c461a23..8c02d1d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> @@ -28,6 +28,8 @@
>   DRM_FORMAT_XRGB,
>   DRM_FORMAT_ARGB,
>   DRM_FORMAT_RGB565,
> + DRM_FORMAT_UYVY,
> + DRM_FORMAT_YUYV,
>  };
>  
>  static void mtk_plane_reset(struct drm_plane *plane)

Re: [PATCH v3] drm/mediatek: Support UYVY and YUYV format for overlay

[CK Hu]

Hi, Bibby:

On Tue, 2017-01-24 at 12:40 +0800, Bibby Hsieh wrote:
> MT8173 overlay can support UYVY and YUYV format,
> we add the format in DRM driver.
> 
> Signed-off-by: Bibby Hsieh 
> Reviewed-by: Daniel Kurtz 

Acked-by: CK Hu 

> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c  | 7 +++
>  drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 ++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c 
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index c703102..53f2001 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -40,10 +40,13 @@
>  #define  OVL_RDMA_MEM_GMC0x40402020
>  
>  #define OVL_CON_BYTE_SWAPBIT(24)
> +#define OVL_CON_MTX_YUV_TO_RGB   (6 << 16)
>  #define OVL_CON_CLRFMT_RGB565(0 << 12)
>  #define OVL_CON_CLRFMT_RGB888(1 << 12)
>  #define OVL_CON_CLRFMT_RGBA  (2 << 12)
>  #define OVL_CON_CLRFMT_ARGB  (3 << 12)
> +#define OVL_CON_CLRFMT_UYVY  (4 << 12)
> +#define OVL_CON_CLRFMT_YUYV  (5 << 12)
>  #define  OVL_CON_AEN BIT(8)
>  #define  OVL_CON_ALPHA   0xff
>  
> @@ -162,6 +165,10 @@ static unsigned int ovl_fmt_convert(unsigned int fmt)
>   case DRM_FORMAT_XBGR:
>   case DRM_FORMAT_ABGR:
>   return OVL_CON_CLRFMT_RGBA | OVL_CON_BYTE_SWAP;
> + case DRM_FORMAT_UYVY:
> + return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB;
> + case DRM_FORMAT_YUYV:
> + return OVL_CON_CLRFMT_YUYV | OVL_CON_MTX_YUV_TO_RGB;
>   }
>  }
>  
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c 
> b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> index c461a23..8c02d1d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> @@ -28,6 +28,8 @@
>   DRM_FORMAT_XRGB,
>   DRM_FORMAT_ARGB,
>   DRM_FORMAT_RGB565,
> + DRM_FORMAT_UYVY,
> + DRM_FORMAT_YUYV,
>  };
>  
>  static void mtk_plane_reset(struct drm_plane *plane)

Re: [PATCH v3] drm/mediatek: Support UYVY and YUYV format for overlay

[CK Hu]

Hi, Bibby:

On Tue, 2017-01-24 at 12:40 +0800, Bibby Hsieh wrote:
> MT8173 overlay can support UYVY and YUYV format,
> we add the format in DRM driver.
> 
> Signed-off-by: Bibby Hsieh 
> Reviewed-by: Daniel Kurtz 

Acked-by: CK Hu 

> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c  | 7 +++
>  drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 ++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c 
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index c703102..53f2001 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -40,10 +40,13 @@
>  #define  OVL_RDMA_MEM_GMC0x40402020
>  
>  #define OVL_CON_BYTE_SWAPBIT(24)
> +#define OVL_CON_MTX_YUV_TO_RGB   (6 << 16)
>  #define OVL_CON_CLRFMT_RGB565(0 << 12)
>  #define OVL_CON_CLRFMT_RGB888(1 << 12)
>  #define OVL_CON_CLRFMT_RGBA  (2 << 12)
>  #define OVL_CON_CLRFMT_ARGB  (3 << 12)
> +#define OVL_CON_CLRFMT_UYVY  (4 << 12)
> +#define OVL_CON_CLRFMT_YUYV  (5 << 12)
>  #define  OVL_CON_AEN BIT(8)
>  #define  OVL_CON_ALPHA   0xff
>  
> @@ -162,6 +165,10 @@ static unsigned int ovl_fmt_convert(unsigned int fmt)
>   case DRM_FORMAT_XBGR:
>   case DRM_FORMAT_ABGR:
>   return OVL_CON_CLRFMT_RGBA | OVL_CON_BYTE_SWAP;
> + case DRM_FORMAT_UYVY:
> + return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB;
> + case DRM_FORMAT_YUYV:
> + return OVL_CON_CLRFMT_YUYV | OVL_CON_MTX_YUV_TO_RGB;
>   }
>  }
>  
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c 
> b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> index c461a23..8c02d1d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> @@ -28,6 +28,8 @@
>   DRM_FORMAT_XRGB,
>   DRM_FORMAT_ARGB,
>   DRM_FORMAT_RGB565,
> + DRM_FORMAT_UYVY,
> + DRM_FORMAT_YUYV,
>  };
>  
>  static void mtk_plane_reset(struct drm_plane *plane)

[PATCH v3] drm/mediatek: Support UYVY and YUYV format for overlay

[Bibby Hsieh]

MT8173 overlay can support UYVY and YUYV format,
we add the format in DRM driver.

Signed-off-by: Bibby Hsieh 
Reviewed-by: Daniel Kurtz 
---
 drivers/gpu/drm/mediatek/mtk_disp_ovl.c  | 7 +++
 drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 ++
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c 
b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index c703102..53f2001 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -40,10 +40,13 @@
 #defineOVL_RDMA_MEM_GMC0x40402020
 
 #define OVL_CON_BYTE_SWAP  BIT(24)
+#define OVL_CON_MTX_YUV_TO_RGB (6 << 16)
 #define OVL_CON_CLRFMT_RGB565  (0 << 12)
 #define OVL_CON_CLRFMT_RGB888  (1 << 12)
 #define OVL_CON_CLRFMT_RGBA(2 << 12)
 #define OVL_CON_CLRFMT_ARGB(3 << 12)
+#define OVL_CON_CLRFMT_UYVY(4 << 12)
+#define OVL_CON_CLRFMT_YUYV(5 << 12)
 #defineOVL_CON_AEN BIT(8)
 #defineOVL_CON_ALPHA   0xff
 
@@ -162,6 +165,10 @@ static unsigned int ovl_fmt_convert(unsigned int fmt)
case DRM_FORMAT_XBGR:
case DRM_FORMAT_ABGR:
return OVL_CON_CLRFMT_RGBA | OVL_CON_BYTE_SWAP;
+   case DRM_FORMAT_UYVY:
+   return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB;
+   case DRM_FORMAT_YUYV:
+   return OVL_CON_CLRFMT_YUYV | OVL_CON_MTX_YUV_TO_RGB;
}
 }
 
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c 
b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
index c461a23..8c02d1d 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
@@ -28,6 +28,8 @@
DRM_FORMAT_XRGB,
DRM_FORMAT_ARGB,
DRM_FORMAT_RGB565,
+   DRM_FORMAT_UYVY,
+   DRM_FORMAT_YUYV,
 };
 
 static void mtk_plane_reset(struct drm_plane *plane)
-- 
1.9.1

[PATCH v3] drm/mediatek: Support UYVY and YUYV format for overlay

[Bibby Hsieh]

MT8173 overlay can support UYVY and YUYV format,
we add the format in DRM driver.

Signed-off-by: Bibby Hsieh 
Reviewed-by: Daniel Kurtz 
---
 drivers/gpu/drm/mediatek/mtk_disp_ovl.c  | 7 +++
 drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 ++
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c 
b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index c703102..53f2001 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -40,10 +40,13 @@
 #defineOVL_RDMA_MEM_GMC0x40402020
 
 #define OVL_CON_BYTE_SWAP  BIT(24)
+#define OVL_CON_MTX_YUV_TO_RGB (6 << 16)
 #define OVL_CON_CLRFMT_RGB565  (0 << 12)
 #define OVL_CON_CLRFMT_RGB888  (1 << 12)
 #define OVL_CON_CLRFMT_RGBA(2 << 12)
 #define OVL_CON_CLRFMT_ARGB(3 << 12)
+#define OVL_CON_CLRFMT_UYVY(4 << 12)
+#define OVL_CON_CLRFMT_YUYV(5 << 12)
 #defineOVL_CON_AEN BIT(8)
 #defineOVL_CON_ALPHA   0xff
 
@@ -162,6 +165,10 @@ static unsigned int ovl_fmt_convert(unsigned int fmt)
case DRM_FORMAT_XBGR:
case DRM_FORMAT_ABGR:
return OVL_CON_CLRFMT_RGBA | OVL_CON_BYTE_SWAP;
+   case DRM_FORMAT_UYVY:
+   return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB;
+   case DRM_FORMAT_YUYV:
+   return OVL_CON_CLRFMT_YUYV | OVL_CON_MTX_YUV_TO_RGB;
}
 }
 
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c 
b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
index c461a23..8c02d1d 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
@@ -28,6 +28,8 @@
DRM_FORMAT_XRGB,
DRM_FORMAT_ARGB,
DRM_FORMAT_RGB565,
+   DRM_FORMAT_UYVY,
+   DRM_FORMAT_YUYV,
 };
 
 static void mtk_plane_reset(struct drm_plane *plane)
-- 
1.9.1