Re: [PATCH v4] [media] Add LVDS RGB media bus formats

2015-02-02 Thread Philipp Zabel
Hi Steve,

Am Samstag, den 31.01.2015, 20:54 +0100 schrieb Steve Cotton:
 On Wed, Jan 28, 2015 at 05:55:06PM +0100, Philipp Zabel wrote:
  +  paraOn LVDS buses, usually each sample is transferred serialized in
  +  seven time slots per pixel clock, on three (18-bit) or four (24-bit)
  +  differential data pairs at the same time. The remaining bits are 
  used for
  +  control signals as defined by SPWG/PSWG/VESA or JEIDA standards.
  +  The 24-bit RGB format serialized in seven time slots on four lanes 
  using
  +  JEIDA defined bit mapping will be named
  +  constantMEDIA_BUS_FMT_RGB888_1X7X3_JEIDA/constant, for example.
  +  /para
 
 Hi Philipp,
 
 Should that example be MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA instead of 1X7X3?

Yes, thank you. I'll fix this and resend.

regards
Philipp

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Re: [PATCH v4] [media] Add LVDS RGB media bus formats

2015-01-31 Thread Steve Cotton
On Wed, Jan 28, 2015 at 05:55:06PM +0100, Philipp Zabel wrote:
 +  paraOn LVDS buses, usually each sample is transferred serialized in
 +  seven time slots per pixel clock, on three (18-bit) or four (24-bit)
 +  differential data pairs at the same time. The remaining bits are used 
 for
 +  control signals as defined by SPWG/PSWG/VESA or JEIDA standards.
 +  The 24-bit RGB format serialized in seven time slots on four lanes 
 using
 +  JEIDA defined bit mapping will be named
 +  constantMEDIA_BUS_FMT_RGB888_1X7X3_JEIDA/constant, for example.
 +  /para

Hi Philipp,

Should that example be MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA instead of 1X7X3?

Regards,
Steve
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[PATCH v4] [media] Add LVDS RGB media bus formats

2015-01-28 Thread Philipp Zabel
This patch adds three new RGB media bus formats that describe
18-bit or 24-bit samples transferred over an LVDS bus with three
or four differential data pairs, serialized into 7 time slots,
using standard SPWG/PSWG/VESA or JEIDA data ordering.

Signed-off-by: Philipp Zabel p.za...@pengutronix.de
Acked-by: Sakari Ailus sakari.ai...@linux.intel.com
---
This patch depends on Boris' Add RGB444_1X12 and RGB565_1X16 media bus formats
patch due to the numbering changes:
https://lkml.org/lkml/2015/1/6/203

Changes since v3:
 - Added Sakari's ack
---
 Documentation/DocBook/media/v4l/subdev-formats.xml | 255 +
 include/uapi/linux/media-bus-format.h  |   5 +-
 2 files changed, 259 insertions(+), 1 deletion(-)

diff --git a/Documentation/DocBook/media/v4l/subdev-formats.xml 
b/Documentation/DocBook/media/v4l/subdev-formats.xml
index be57efa..a88f72b 100644
--- a/Documentation/DocBook/media/v4l/subdev-formats.xml
+++ b/Documentation/DocBook/media/v4l/subdev-formats.xml
@@ -622,6 +622,261 @@ see xref linkend=colorspaces /./entry
  /tbody
/tgroup
   /table
+
+  paraOn LVDS buses, usually each sample is transferred serialized in
+  seven time slots per pixel clock, on three (18-bit) or four (24-bit)
+  differential data pairs at the same time. The remaining bits are used for
+  control signals as defined by SPWG/PSWG/VESA or JEIDA standards.
+  The 24-bit RGB format serialized in seven time slots on four lanes using
+  JEIDA defined bit mapping will be named
+  constantMEDIA_BUS_FMT_RGB888_1X7X3_JEIDA/constant, for example.
+  /para
+
+  table pgwide=0 frame=none id=v4l2-mbus-pixelcode-rgb-lvds
+   titleLVDS RGB formats/title
+   tgroup cols=8
+ colspec colname=id align=left /
+ colspec colname=code align=center /
+ colspec colname=slot align=center /
+ colspec colname=lane /
+ colspec colnum=5 colname=l03 align=center /
+ colspec colnum=6 colname=l02 align=center /
+ colspec colnum=7 colname=l01 align=center /
+ colspec colnum=8 colname=l00 align=center /
+ spanspec namest=l03 nameend=l00 spanname=l0 /
+ thead
+   row
+ entryIdentifier/entry
+ entryCode/entry
+ entry/entry
+ entry/entry
+ entry spanname=l0Data organization/entry
+   /row
+   row
+ entry/entry
+ entry/entry
+ entryTimeslot/entry
+ entryLane/entry
+ entry3/entry
+ entry2/entry
+ entry1/entry
+ entry0/entry
+   /row
+ /thead
+ tbody valign=top
+   row id=MEDIA-BUS-FMT-RGB666-1X7X3-SPWG
+ entryMEDIA_BUS_FMT_RGB666_1X7X3_SPWG/entry
+ entry0x1010/entry
+ entry0/entry
+ entry/entry
+ entry-/entry
+ entryd/entry
+ entrybsubscript1/subscript/entry
+ entrygsubscript0/subscript/entry
+   /row
+   row
+ entry/entry
+ entry/entry
+ entry1/entry
+ entry/entry
+ entry-/entry
+ entryd/entry
+ entrybsubscript0/subscript/entry
+ entryrsubscript5/subscript/entry
+   /row
+   row
+ entry/entry
+ entry/entry
+ entry2/entry
+ entry/entry
+ entry-/entry
+ entryd/entry
+ entrygsubscript5/subscript/entry
+ entryrsubscript4/subscript/entry
+   /row
+   row
+ entry/entry
+ entry/entry
+ entry3/entry
+ entry/entry
+ entry-/entry
+ entrybsubscript5/subscript/entry
+ entrygsubscript4/subscript/entry
+ entryrsubscript3/subscript/entry
+   /row
+   row
+ entry/entry
+ entry/entry
+ entry4/entry
+ entry/entry
+ entry-/entry
+ entrybsubscript4/subscript/entry
+ entrygsubscript3/subscript/entry
+ entryrsubscript2/subscript/entry
+   /row
+   row
+ entry/entry
+ entry/entry
+ entry5/entry
+ entry/entry
+ entry-/entry
+ entrybsubscript3/subscript/entry
+ entrygsubscript2/subscript/entry
+ entryrsubscript1/subscript/entry
+   /row
+   row
+ entry/entry
+ entry/entry
+ entry6/entry
+ entry/entry
+ entry-/entry
+ entrybsubscript2/subscript/entry
+ entrygsubscript1/subscript/entry
+ entryrsubscript0/subscript/entry
+   /row
+   row id=MEDIA-BUS-FMT-RGB888-1X7X4-SPWG
+ entryMEDIA_BUS_FMT_RGB888_1X7X4_SPWG/entry
+