Re: Git tree updated to v2.6.29-rc1, omap-2.6.28 branch added
* David Brownell davi...@pacbell.net [090116 09:59]: On Thursday 15 January 2009, Tony Lindgren wrote: Then when it tries to boot, (a) the HSMMC driver reports error -110 then chokes, so no root FS; and then (b) MUSB misdetects the high speed hub as full speed then chokes, so no network links either. That's on a trusty Beagle config. I don't think I'll be upgrading anything else just yet... Hmm, that sounds conservative! :) You're just trying to get me to find out what's broken and fix it! I'm on to that particular dastardly plot... ;) Oh no, busted! It'd be somewhat usable if the MMC were live. Seems to work on at least overo, no ideas what might have happened to it on beagle. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: OMAP3430 clock settings
Hi Hari, Thanks for providing this utility. This is useful to read the values of registers from user space. Can you please help us further by letting us know how to find out clock speeds of DSP, ARM, L3? There are some multiplication factors to be used to arrive at clock speeds. Can you please let us know the procedure since it is already known? Regards, Kishore. -Original Message- From: Kanigeri, Hari [mailto:h-kanige...@ti.com] Sent: Thursday, January 15, 2009 10:25 PM To: Krishna Kishore; linux-omap@vger.kernel.org Subject: RE: OMAP3430 clock settings Kishore, We need to find this out during runtime. Which register to read and how to know the clock settings of DSP, ARM and L3? -- You can use this small utility to read/write/dump register values from user space. This is only for debug purpose if you want to peek and poke at some registers from user space. https://omapzoom.org/gf/download/frsrelease/152/964/debuginfo.out The usage is For reading ./debuginfo.out r Hex registerAddress without 0x prefix regAccessSize =8, 16, 32 Eg: to read PM_PWSTCTRL_IVA2 register, it would be ./debuginfo.out r 483060E0 32 For writing # ./debuginfo.out w Hex registerAddress without 0x prefix regAccessSize =8, 16, 32 value Eg: to write to PM_PWSTCTRL_IVA2 register, it would be ./debuginfo.out w 483060E0 32 value For Dump # ./debuginfo.out a Hex registerAddress without 0x prefix numOfWordsToDump Eg: To dump first 100 values of IVA2_PRM registers ./debuginfo.out a 48306000 100 Thank you, Best regards, Hari -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Krishna Kishore Sent: Wednesday, January 14, 2009 1:41 AM To: linux-omap@vger.kernel.org Subject: OMAP3430 clock settings Hi, How do we find out clock settings on OMAP3430? We need to find this out during runtime. Which register to read and how to know the clock settings of DSP, ARM and L3? Regards, Kishore. SASKEN BUSINESS DISCLAIMER - This message may contain confidential, proprietary or legally privileged information. In case you are not the original intended Recipient of the message, you must not, directly or indirectly, use, Disclose, distribute, print, or copy any part of this message and you are requested to delete it and inform the sender. Any views expressed in this message are those of the individual sender unless otherwise stated. Nothing contained in this message shall be construed as an offer or acceptance of any offer by Sasken Communication Technologies Limited (Sasken) unless sent with that express intent and with due authority of Sasken. Sasken has taken enough precautions to prevent the spread of viruses. However the company accepts no liability for any damage caused by any virus transmitted by this email -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html SASKEN BUSINESS DISCLAIMER - This message may contain confidential, proprietary or legally privileged information. In case you are not the original intended Recipient of the message, you must not, directly or indirectly, use, Disclose, distribute, print, or copy any part of this message and you are requested to delete it and inform the sender. Any views expressed in this message are those of the individual sender unless otherwise stated. Nothing contained in this message shall be construed as an offer or acceptance of any offer by Sasken Communication Technologies Limited (Sasken) unless sent with that express intent and with due authority of Sasken. Sasken has taken enough precautions to prevent the spread of viruses. However the company accepts no liability for any damage caused by any virus transmitted by this email -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/10] arm: omap mailbox: add omap3 support with some fixes
The following patches add omap3 support and some cleanups. This omap mailbox device driver has been used for the interprocessor communication between ARM and some co-processors(DSP) inside of omap SoC, which is a kind of interrupt driven FIFO. --- Hiroshi DOYU (10): omap mailbox: remove unnecessary header file inclusion omap mailbox: convert sequence bit checking to module paramter omap mailbox: move mailbox.h into mailbox.c omap mailbox: add save_/restore_ctx() for PM omap mailbox: fix empty struct device for omap2 omap mailbox: fix empty struct device for omap1 omap mailbox: fix empty struct device for omap_mbox omap mailbox: print hardware revision at startup omap mailbox: add initial omap3 support omap mailbox: cleanup omap2 register definition with macro arch/arm/mach-omap1/devices.c |2 arch/arm/mach-omap1/mailbox.c | 31 ++-- arch/arm/mach-omap2/devices.c | 38 - arch/arm/mach-omap2/mailbox.c | 195 +--- arch/arm/plat-omap/Kconfig |8 + arch/arm/plat-omap/include/mach/mailbox.h | 27 arch/arm/plat-omap/include/mach/omap34xx.h |1 arch/arm/plat-omap/mailbox.c | 152 -- arch/arm/plat-omap/mailbox.h | 100 -- 9 files changed, 311 insertions(+), 243 deletions(-) delete mode 100644 arch/arm/plat-omap/mailbox.h -- Hiroshi DOYU -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/10] omap mailbox: cleanup omap2 register definition with macro
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/mach-omap2/mailbox.c | 77 +++--
1 files changed, 29 insertions(+), 48 deletions(-)
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 32b7af3..0609e2d 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -1,9 +1,9 @@
/*
- * Mailbox reservation modules for OMAP2
+ * Mailbox reservation modules for OMAP2/3
*
- * Copyright (C) 2006 Nokia Corporation
+ * Copyright (C) 2006-2008 Nokia Corporation
* Written by: Hiroshi DOYU hiroshi.d...@nokia.com
- *and Paul Mundt paul.mu...@nokia.com
+ *and Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
@@ -18,40 +18,19 @@
#include mach/mailbox.h
#include mach/irqs.h
-#define MAILBOX_REVISION 0x00
-#define MAILBOX_SYSCONFIG 0x10
-#define MAILBOX_SYSSTATUS 0x14
-#define MAILBOX_MESSAGE_0 0x40
-#define MAILBOX_MESSAGE_1 0x44
-#define MAILBOX_MESSAGE_2 0x48
-#define MAILBOX_MESSAGE_3 0x4c
-#define MAILBOX_MESSAGE_4 0x50
-#define MAILBOX_MESSAGE_5 0x54
-#define MAILBOX_FIFOSTATUS_0 0x80
-#define MAILBOX_FIFOSTATUS_1 0x84
-#define MAILBOX_FIFOSTATUS_2 0x88
-#define MAILBOX_FIFOSTATUS_3 0x8c
-#define MAILBOX_FIFOSTATUS_4 0x90
-#define MAILBOX_FIFOSTATUS_5 0x94
-#define MAILBOX_MSGSTATUS_00xc0
-#define MAILBOX_MSGSTATUS_10xc4
-#define MAILBOX_MSGSTATUS_20xc8
-#define MAILBOX_MSGSTATUS_30xcc
-#define MAILBOX_MSGSTATUS_40xd0
-#define MAILBOX_MSGSTATUS_50xd4
-#define MAILBOX_IRQSTATUS_00x100
-#define MAILBOX_IRQENABLE_00x104
-#define MAILBOX_IRQSTATUS_10x108
-#define MAILBOX_IRQENABLE_10x10c
-#define MAILBOX_IRQSTATUS_20x110
-#define MAILBOX_IRQENABLE_20x114
-#define MAILBOX_IRQSTATUS_30x118
-#define MAILBOX_IRQENABLE_30x11c
+#define MAILBOX_REVISION 0x000
+#define MAILBOX_SYSCONFIG 0x010
+#define MAILBOX_SYSSTATUS 0x014
+#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
+#define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
+#define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
+#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
+#define MAILBOX_IRQENABLE(u) (0x108 + 8 * (u))
-static unsigned long mbox_base;
+#define MAILBOX_IRQ_NEWMSG(u) (1 (2 * (u)))
+#define MAILBOX_IRQ_NOTFULL(u) (1 (2 * (u) + 1))
-#define MAILBOX_IRQ_NOTFULL(n) (1 (2 * (n) + 1))
-#define MAILBOX_IRQ_NEWMSG(n) (1 (2 * (n)))
+static unsigned long mbox_base;
struct omap_mbox2_fifo {
unsigned long msg;
@@ -209,15 +188,15 @@ static struct omap_mbox_ops omap2_mbox_ops = {
/* DSP */
static struct omap_mbox2_priv omap2_mbox_dsp_priv = {
.tx_fifo = {
- .msg= MAILBOX_MESSAGE_0,
- .fifo_stat = MAILBOX_FIFOSTATUS_0,
+ .msg= MAILBOX_MESSAGE(0),
+ .fifo_stat = MAILBOX_FIFOSTATUS(0),
},
.rx_fifo = {
- .msg= MAILBOX_MESSAGE_1,
- .msg_stat = MAILBOX_MSGSTATUS_1,
+ .msg= MAILBOX_MESSAGE(1),
+ .msg_stat = MAILBOX_MSGSTATUS(1),
},
- .irqenable = MAILBOX_IRQENABLE_0,
- .irqstatus = MAILBOX_IRQSTATUS_0,
+ .irqenable = MAILBOX_IRQENABLE(0),
+ .irqstatus = MAILBOX_IRQSTATUS(0),
.notfull_bit= MAILBOX_IRQ_NOTFULL(0),
.newmsg_bit = MAILBOX_IRQ_NEWMSG(1),
};
@@ -232,15 +211,15 @@ EXPORT_SYMBOL(mbox_dsp_info);
/* IVA */
static struct omap_mbox2_priv omap2_mbox_iva_priv = {
.tx_fifo = {
- .msg= MAILBOX_MESSAGE_2,
- .fifo_stat = MAILBOX_FIFOSTATUS_2,
+ .msg= MAILBOX_MESSAGE(2),
+ .fifo_stat = MAILBOX_FIFOSTATUS(2),
},
.rx_fifo = {
- .msg= MAILBOX_MESSAGE_3,
- .msg_stat = MAILBOX_MSGSTATUS_3,
+ .msg= MAILBOX_MESSAGE(3),
+ .msg_stat = MAILBOX_MSGSTATUS(3),
},
- .irqenable = MAILBOX_IRQENABLE_3,
- .irqstatus = MAILBOX_IRQSTATUS_3,
+ .irqenable = MAILBOX_IRQENABLE(3),
+ .irqstatus = MAILBOX_IRQSTATUS(3),
.notfull_bit= MAILBOX_IRQ_NOTFULL(2),
.newmsg_bit = MAILBOX_IRQ_NEWMSG(3),
};
@@ -320,4 +299,6 @@ static void __exit omap2_mbox_exit(void)
module_init(omap2_mbox_init);
module_exit(omap2_mbox_exit);
-MODULE_LICENSE(GPL);
[PATCH 03/10] omap mailbox: print hardware revision at startup
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com --- arch/arm/mach-omap2/mailbox.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 3176bb7..c73fa89 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c @@ -74,6 +74,9 @@ static int omap2_mbox_startup(struct omap_mbox *mbox) } clk_enable(mbox_ick_handle); + l = mbox_read_reg(MAILBOX_REVISION); + pr_info(omap mailbox rev %d.%d\n, (l 0xf0) 4, (l 0x0f)); + /* set smart-idle autoidle */ l = mbox_read_reg(MAILBOX_SYSCONFIG); l |= 0x0011; -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 04/10] omap mailbox: fix empty struct device for omap_mbox
Since mbox-dev doesn't exist and isn't created either at
registration, this patch will create struct device, which belongs to
omap-mailbox class and set this pointer for the member of
struct omap_mbox.
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/plat-omap/include/mach/mailbox.h |4 +-
arch/arm/plat-omap/mailbox.c | 63 ++---
2 files changed, 33 insertions(+), 34 deletions(-)
diff --git a/arch/arm/plat-omap/include/mach/mailbox.h
b/arch/arm/plat-omap/include/mach/mailbox.h
index 7cbed93..577db68 100644
--- a/arch/arm/plat-omap/include/mach/mailbox.h
+++ b/arch/arm/plat-omap/include/mach/mailbox.h
@@ -53,7 +53,7 @@ struct omap_mbox {
mbox_msg_t seq_snd, seq_rcv;
- struct device dev;
+ struct device *dev;
struct omap_mbox*next;
void*priv;
@@ -67,7 +67,7 @@ void omap_mbox_init_seq(struct omap_mbox *);
struct omap_mbox *omap_mbox_get(const char *);
void omap_mbox_put(struct omap_mbox *);
-int omap_mbox_register(struct omap_mbox *);
+int omap_mbox_register(struct device *parent, struct omap_mbox *);
int omap_mbox_unregister(struct omap_mbox *);
#endif /* MAILBOX_H */
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index b52ce05..5e8cd65 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -1,10 +1,9 @@
/*
* OMAP mailbox driver
*
- * Copyright (C) 2006 Nokia Corporation. All rights reserved.
+ * Copyright (C) 2006-2008 Nokia Corporation. All rights reserved.
*
- * Contact: Toshihiro Kobayashi toshihiro.kobaya...@nokia.com
- * Restructured by Hiroshi DOYU hiroshi.d...@nokia.com
+ * Contact: Hiroshi DOYU hiroshi.d...@nokia.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -136,7 +135,7 @@ static void mbox_rx_work(struct work_struct *work)
unsigned long flags;
if (mbox-rxq-callback == NULL) {
- sysfs_notify(mbox-dev.kobj, NULL, mbox);
+ sysfs_notify(mbox-dev-kobj, NULL, mbox);
return;
}
@@ -204,7 +203,7 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox)
/* no more messages in the fifo. clear IRQ source. */
ack_mbox_irq(mbox, IRQ_RX);
enable_mbox_irq(mbox, IRQ_RX);
- nomem:
+nomem:
schedule_work(mbox-rxq-work);
}
@@ -286,7 +285,7 @@ static ssize_t mbox_show(struct class *class, char *buf)
static CLASS_ATTR(mbox, S_IRUGO, mbox_show, NULL);
static struct class omap_mbox_class = {
- .name = omap_mbox,
+ .name = omap-mailbox,
};
static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox,
@@ -333,21 +332,6 @@ static int omap_mbox_init(struct omap_mbox *mbox)
return ret;
}
- mbox-dev.class = omap_mbox_class;
- dev_set_name(mbox-dev, %s, mbox-name);
- dev_set_drvdata(mbox-dev, mbox);
-
- ret = device_register(mbox-dev);
- if (unlikely(ret))
- goto fail_device_reg;
-
- ret = device_create_file(mbox-dev, dev_attr_mbox);
- if (unlikely(ret)) {
- printk(KERN_ERR
- device_create_file failed: %d\n, ret);
- goto fail_create_mbox;
- }
-
ret = request_irq(mbox-irq, mbox_interrupt, IRQF_DISABLED,
mbox-name, mbox);
if (unlikely(ret)) {
@@ -377,10 +361,6 @@ static int omap_mbox_init(struct omap_mbox *mbox)
fail_alloc_txq:
free_irq(mbox-irq, mbox);
fail_request_irq:
- device_remove_file(mbox-dev, dev_attr_mbox);
- fail_create_mbox:
- device_unregister(mbox-dev);
- fail_device_reg:
if (unlikely(mbox-ops-shutdown))
mbox-ops-shutdown(mbox);
@@ -393,8 +373,6 @@ static void omap_mbox_fini(struct omap_mbox *mbox)
mbox_queue_free(mbox-rxq);
free_irq(mbox-irq, mbox);
- device_remove_file(mbox-dev, dev_attr_mbox);
- class_unregister(omap_mbox_class);
if (unlikely(mbox-ops-shutdown))
mbox-ops-shutdown(mbox);
@@ -440,7 +418,7 @@ void omap_mbox_put(struct omap_mbox *mbox)
}
EXPORT_SYMBOL(omap_mbox_put);
-int omap_mbox_register(struct omap_mbox *mbox)
+int omap_mbox_register(struct device *parent, struct omap_mbox *mbox)
{
int ret = 0;
struct omap_mbox **tmp;
@@ -450,14 +428,31 @@ int omap_mbox_register(struct omap_mbox *mbox)
if (mbox-next)
return -EBUSY;
+ mbox-dev = device_create(omap_mbox_class,
+ parent, 0, mbox, %s, mbox-name);
+ if (IS_ERR(mbox-dev))
+ return PTR_ERR(mbox-dev);
+
+ ret = device_create_file(mbox-dev, dev_attr_mbox);
+ if (ret)
+ goto err_sysfs;
+
write_lock(mboxes_lock);
tmp = find_mboxes(mbox-name);
-
[PATCH 05/10] omap mailbox: fix empty struct device for omap1
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/mach-omap1/devices.c |2 +-
arch/arm/mach-omap1/mailbox.c | 31 +--
2 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 77382d8..b4b6106 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -86,7 +86,7 @@ static struct resource mbox_resources[] = {
};
static struct platform_device mbox_device = {
- .name = mailbox,
+ .name = omap1-mailbox,
.id = -1,
.num_resources = ARRAY_SIZE(mbox_resources),
.resource = mbox_resources,
diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c
index 59abbf3..87539db 100644
--- a/arch/arm/mach-omap1/mailbox.c
+++ b/arch/arm/mach-omap1/mailbox.c
@@ -1,7 +1,7 @@
/*
* Mailbox reservation modules for DSP
*
- * Copyright (C) 2006 Nokia Corporation
+ * Copyright (C) 2006-2008 Nokia Corporation
* Written by: Hiroshi DOYU hiroshi.d...@nokia.com
*
* This file is subject to the terms and conditions of the GNU General Public
@@ -17,6 +17,8 @@
#include mach/mailbox.h
#include mach/irqs.h
+#define DRV_NAME omap1-mailbox
+
#define MAILBOX_ARM2DSP1 0x00
#define MAILBOX_ARM2DSP1b 0x04
#define MAILBOX_DSP2ARM1 0x08
@@ -27,7 +29,7 @@
#define MAILBOX_DSP2ARM1_Flag 0x1c
#define MAILBOX_DSP2ARM2_Flag 0x20
-unsigned long mbox_base;
+static void __iomem *mbox_base;
struct omap_mbox1_fifo {
unsigned long cmd;
@@ -40,14 +42,14 @@ struct omap_mbox1_priv {
struct omap_mbox1_fifo rx_fifo;
};
-static inline int mbox_read_reg(unsigned int reg)
+static inline int mbox_read_reg(size_t ofs)
{
- return __raw_readw(mbox_base + reg);
+ return __raw_readw(mbox_base + ofs);
}
-static inline void mbox_write_reg(unsigned int val, unsigned int reg)
+static inline void mbox_write_reg(u32 val, size_t ofs)
{
- __raw_writew(val, mbox_base + reg);
+ __raw_writew(val, mbox_base + ofs);
}
/* msg */
@@ -143,7 +145,7 @@ struct omap_mbox mbox_dsp_info = {
};
EXPORT_SYMBOL(mbox_dsp_info);
-static int __init omap1_mbox_probe(struct platform_device *pdev)
+static int __devinit omap1_mbox_probe(struct platform_device *pdev)
{
struct resource *res;
int ret = 0;
@@ -170,12 +172,10 @@ static int __init omap1_mbox_probe(struct platform_device
*pdev)
}
mbox_dsp_info.irq = res-start;
- ret = omap_mbox_register(mbox_dsp_info);
-
- return ret;
+ return omap_mbox_register(pdev-dev, mbox_dsp_info);
}
-static int omap1_mbox_remove(struct platform_device *pdev)
+static int __devexit omap1_mbox_remove(struct platform_device *pdev)
{
omap_mbox_unregister(mbox_dsp_info);
@@ -184,9 +184,9 @@ static int omap1_mbox_remove(struct platform_device *pdev)
static struct platform_driver omap1_mbox_driver = {
.probe = omap1_mbox_probe,
- .remove = omap1_mbox_remove,
+ .remove = __devexit_p(omap1_mbox_remove),
.driver = {
- .name = mailbox,
+ .name = DRV_NAME,
},
};
@@ -203,4 +203,7 @@ static void __exit omap1_mbox_exit(void)
module_init(omap1_mbox_init);
module_exit(omap1_mbox_exit);
-MODULE_LICENSE(GPL);
+MODULE_LICENSE(GPL v2);
+MODULE_DESCRIPTION(omap mailbox: omap1 architecture specific functions);
+MODULE_AUTHOR(Hiroshi DOYU hiroshi.d...@nokia.com);
+MODULE_ALIAS(platform:DRV_NAME);
--
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[PATCH 06/10] omap mailbox: fix empty struct device for omap2
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/mach-omap2/devices.c |2 +-
arch/arm/mach-omap2/mailbox.c | 15 +--
2 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 05baccd..698dd13 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -61,7 +61,7 @@ static struct resource omap3_mbox_resources[] = {
};
static struct platform_device mbox_device = {
- .name = mailbox,
+ .name = omap2-mailbox,
.id = -1,
};
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index c73fa89..a877305 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -18,6 +18,8 @@
#include mach/mailbox.h
#include mach/irqs.h
+#define DRV_NAME omap2-mailbox
+
#define MAILBOX_REVISION 0x000
#define MAILBOX_SYSCONFIG 0x010
#define MAILBOX_SYSSTATUS 0x014
@@ -234,7 +236,7 @@ static struct omap_mbox mbox_iva_info = {
};
#endif
-static int __init omap2_mbox_probe(struct platform_device *pdev)
+static int __devinit omap2_mbox_probe(struct platform_device *pdev)
{
struct resource *res;
int ret;
@@ -258,7 +260,7 @@ static int __init omap2_mbox_probe(struct platform_device
*pdev)
}
mbox_dsp_info.irq = res-start;
- ret = omap_mbox_register(mbox_dsp_info);
+ ret = omap_mbox_register(pdev-dev, mbox_dsp_info);
if (ret)
goto err_dsp;
@@ -272,7 +274,7 @@ static int __init omap2_mbox_probe(struct platform_device
*pdev)
goto err_iva1;
}
mbox_iva_info.irq = res-start;
- ret = omap_mbox_register(mbox_iva_info);
+ ret = omap_mbox_register(pdev-dev, mbox_iva_info);
if (ret)
goto err_iva1;
}
@@ -286,7 +288,7 @@ err_dsp:
return ret;
}
-static int omap2_mbox_remove(struct platform_device *pdev)
+static int __devexit omap2_mbox_remove(struct platform_device *pdev)
{
#if defined(CONFIG_ARCH_OMAP2420)
omap_mbox_unregister(mbox_iva_info);
@@ -298,9 +300,9 @@ static int omap2_mbox_remove(struct platform_device *pdev)
static struct platform_driver omap2_mbox_driver = {
.probe = omap2_mbox_probe,
- .remove = omap2_mbox_remove,
+ .remove = __devexit_p(omap2_mbox_remove),
.driver = {
- .name = mailbox,
+ .name = DRV_NAME,
},
};
@@ -320,3 +322,4 @@ module_exit(omap2_mbox_exit);
MODULE_LICENSE(GPL v2);
MODULE_DESCRIPTION(omap mailbox: omap2/3 architecture specific functions);
MODULE_AUTHOR(Hiroshi DOYU hiroshi.d...@nokia.com, Paul Mundt);
+MODULE_ALIAS(platform:DRV_NAME);
--
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[PATCH 07/10] omap mailbox: add save_/restore_ctx() for PM
To preserve the registers during off-mode
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/mach-omap2/mailbox.c | 35 +
arch/arm/plat-omap/include/mach/mailbox.h | 23 +++
2 files changed, 58 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index a877305..544dde9 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -32,6 +32,8 @@
#define MAILBOX_IRQ_NEWMSG(u) (1 (2 * (u)))
#define MAILBOX_IRQ_NOTFULL(u) (1 (2 * (u) + 1))
+#define MBOX_REG_SIZE 0x120
+
static void __iomem *mbox_base;
struct omap_mbox2_fifo {
@@ -47,6 +49,7 @@ struct omap_mbox2_priv {
unsigned long irqstatus;
u32 newmsg_bit;
u32 notfull_bit;
+ char ctx[MBOX_REG_SIZE];
};
static struct clk *mbox_ick_handle;
@@ -167,6 +170,36 @@ static int omap2_mbox_is_irq(struct omap_mbox *mbox,
return (enable status bit);
}
+static void omap2_mbox_save_ctx(struct omap_mbox *mbox)
+{
+ int i;
+ struct omap_mbox2_priv *p = mbox-priv;
+
+ for (i = 0; i MBOX_REG_SIZE; i += sizeof(u32)) {
+ u32 val;
+
+ val = mbox_read_reg(i);
+ *(u32 *)(p-ctx + i) = val;
+
+ dev_dbg(mbox-dev, %s\t[%02d] %08x\n, __func__, i, val);
+ }
+}
+
+static void omap2_mbox_restore_ctx(struct omap_mbox *mbox)
+{
+ int i;
+ struct omap_mbox2_priv *p = mbox-priv;
+
+ for (i = 0; i MBOX_REG_SIZE; i += sizeof(u32)) {
+ u32 val;
+
+ val = *(u32 *)(p-ctx + i);
+ mbox_write_reg(val, i);
+
+ dev_dbg(mbox-dev, %s\t[%02d] %08x\n, __func__, i, val);
+ }
+}
+
static struct omap_mbox_ops omap2_mbox_ops = {
.type = OMAP_MBOX_TYPE2,
.startup= omap2_mbox_startup,
@@ -179,6 +212,8 @@ static struct omap_mbox_ops omap2_mbox_ops = {
.disable_irq= omap2_mbox_disable_irq,
.ack_irq= omap2_mbox_ack_irq,
.is_irq = omap2_mbox_is_irq,
+ .save_ctx = omap2_mbox_save_ctx,
+ .restore_ctx= omap2_mbox_restore_ctx,
};
/*
diff --git a/arch/arm/plat-omap/include/mach/mailbox.h
b/arch/arm/plat-omap/include/mach/mailbox.h
index 577db68..b7a6991 100644
--- a/arch/arm/plat-omap/include/mach/mailbox.h
+++ b/arch/arm/plat-omap/include/mach/mailbox.h
@@ -33,6 +33,9 @@ struct omap_mbox_ops {
void(*disable_irq)(struct omap_mbox *mbox, omap_mbox_irq_t
irq);
void(*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
+ /* ctx */
+ void(*save_ctx)(struct omap_mbox *mbox);
+ void(*restore_ctx)(struct omap_mbox *mbox);
};
struct omap_mbox_queue {
@@ -70,4 +73,24 @@ void omap_mbox_put(struct omap_mbox *);
int omap_mbox_register(struct device *parent, struct omap_mbox *);
int omap_mbox_unregister(struct omap_mbox *);
+static inline void omap_mbox_save_ctx(struct omap_mbox *mbox)
+{
+ if (!mbox-ops-save_ctx) {
+ dev_err(mbox-dev, %s:\tno save\n, __func__);
+ return;
+ }
+
+ mbox-ops-save_ctx(mbox);
+}
+
+static inline void omap_mbox_restore_ctx(struct omap_mbox *mbox)
+{
+ if (!mbox-ops-restore_ctx) {
+ dev_err(mbox-dev, %s:\tno restore\n, __func__);
+ return;
+ }
+
+ mbox-ops-restore_ctx(mbox);
+}
+
#endif /* MAILBOX_H */
--
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[PATCH 02/10] omap mailbox: add initial omap3 support
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/mach-omap2/devices.c | 36
arch/arm/mach-omap2/mailbox.c | 65 +---
arch/arm/plat-omap/Kconfig |8 +++
arch/arm/plat-omap/include/mach/omap34xx.h |1
4 files changed, 77 insertions(+), 33 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 9d7216f..05baccd 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -28,13 +28,14 @@
#include mach/eac.h
#include mach/mmc.h
-#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
-#define OMAP2_MBOX_BASEIO_ADDRESS(OMAP24XX_MAILBOX_BASE)
+#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
-static struct resource mbox_resources[] = {
+#define MBOX_REG_SIZE 0x120
+
+static struct resource omap2_mbox_resources[] = {
{
- .start = OMAP2_MBOX_BASE,
- .end= OMAP2_MBOX_BASE + 0x11f,
+ .start = OMAP24XX_MAILBOX_BASE,
+ .end= OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
.flags = IORESOURCE_MEM,
},
{
@@ -47,20 +48,39 @@ static struct resource mbox_resources[] = {
},
};
+static struct resource omap3_mbox_resources[] = {
+ {
+ .start = OMAP34XX_MAILBOX_BASE,
+ .end= OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_24XX_MAIL_U0_MPU,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
static struct platform_device mbox_device = {
.name = mailbox,
.id = -1,
- .num_resources = ARRAY_SIZE(mbox_resources),
- .resource = mbox_resources,
};
static inline void omap_init_mbox(void)
{
+ if (cpu_is_omap2420()) {
+ mbox_device.num_resources = ARRAY_SIZE(omap2_mbox_resources);
+ mbox_device.resource = omap2_mbox_resources;
+ } else if (cpu_is_omap3430()) {
+ mbox_device.num_resources = ARRAY_SIZE(omap3_mbox_resources);
+ mbox_device.resource = omap3_mbox_resources;
+ } else {
+ return;
+ }
platform_device_register(mbox_device);
}
#else
static inline void omap_init_mbox(void) { }
-#endif
+#endif /* CONFIG_OMAP_MBOX_FWK */
#if defined(CONFIG_OMAP_STI)
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 0609e2d..3176bb7 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -30,7 +30,7 @@
#define MAILBOX_IRQ_NEWMSG(u) (1 (2 * (u)))
#define MAILBOX_IRQ_NOTFULL(u) (1 (2 * (u) + 1))
-static unsigned long mbox_base;
+static void __iomem *mbox_base;
struct omap_mbox2_fifo {
unsigned long msg;
@@ -52,14 +52,14 @@ static struct clk *mbox_ick_handle;
static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq);
-static inline unsigned int mbox_read_reg(unsigned int reg)
+static inline unsigned int mbox_read_reg(size_t ofs)
{
- return __raw_readl(mbox_base + reg);
+ return __raw_readl(mbox_base + ofs);
}
-static inline void mbox_write_reg(unsigned int val, unsigned int reg)
+static inline void mbox_write_reg(u32 val, size_t ofs)
{
- __raw_writel(val, mbox_base + reg);
+ __raw_writel(val, mbox_base + ofs);
}
/* Mailbox H/W preparations */
@@ -208,7 +208,7 @@ struct omap_mbox mbox_dsp_info = {
};
EXPORT_SYMBOL(mbox_dsp_info);
-/* IVA */
+#if defined(CONFIG_ARCH_OMAP2420) /* IVA */
static struct omap_mbox2_priv omap2_mbox_iva_priv = {
.tx_fifo = {
.msg= MAILBOX_MESSAGE(2),
@@ -229,17 +229,12 @@ static struct omap_mbox mbox_iva_info = {
.ops= omap2_mbox_ops,
.priv = omap2_mbox_iva_priv,
};
+#endif
static int __init omap2_mbox_probe(struct platform_device *pdev)
{
struct resource *res;
- int ret = 0;
-
- if (pdev-num_resources != 3) {
- dev_err(pdev-dev, invalid number of resources: %d\n,
- pdev-num_resources);
- return -ENODEV;
- }
+ int ret;
/* MBOX base */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -247,34 +242,54 @@ static int __init omap2_mbox_probe(struct platform_device
*pdev)
dev_err(pdev-dev, invalid mem resource\n);
return -ENODEV;
}
- mbox_base = res-start;
+ mbox_base = ioremap(res-start, res-end - res-start);
+ if (!mbox_base)
+ return -ENOMEM;
- /* DSP IRQ */
+ /* DSP or IVA2 IRQ */
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (unlikely(!res)) {
[PATCH 08/10] omap mailbox: move mailbox.h into mailbox.c
no need to keep mailbox.h separately.
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/plat-omap/mailbox.c | 86
arch/arm/plat-omap/mailbox.h | 100 --
2 files changed, 85 insertions(+), 101 deletions(-)
delete mode 100644 arch/arm/plat-omap/mailbox.h
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 5e8cd65..db5a0c2 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -31,11 +31,95 @@
#include linux/delay.h
#include linux/io.h
#include mach/mailbox.h
-#include mailbox.h
static struct omap_mbox *mboxes;
static DEFINE_RWLOCK(mboxes_lock);
+/*
+ * Mailbox sequence bit API
+ */
+#if defined(CONFIG_ARCH_OMAP1)
+# define MBOX_USE_SEQ_BIT
+#elif defined(CONFIG_ARCH_OMAP2)
+# define MBOX_USE_SEQ_BIT
+#endif
+
+#ifdef MBOX_USE_SEQ_BIT
+/* seq_rcv should be initialized with any value other than
+ * 0 and 1 31, to allow either value for the first
+ * message. */
+static inline void mbox_seq_init(struct omap_mbox *mbox)
+{
+ /* any value other than 0 and 1 31 */
+ mbox-seq_rcv = 0x;
+}
+
+static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
+{
+ /* add seq_snd to msg */
+ *msg = (*msg 0x7fff) | mbox-seq_snd;
+ /* flip seq_snd */
+ mbox-seq_snd ^= 1 31;
+}
+
+static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
+{
+ mbox_msg_t seq = msg (1 31);
+ if (seq == mbox-seq_rcv)
+ return -1;
+ mbox-seq_rcv = seq;
+ return 0;
+}
+#else
+static inline void mbox_seq_init(struct omap_mbox *mbox)
+{
+}
+static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
+{
+}
+static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
+{
+ return 0;
+}
+#endif
+
+/* Mailbox FIFO handle functions */
+static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
+{
+ return mbox-ops-fifo_read(mbox);
+}
+static inline void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
+{
+ mbox-ops-fifo_write(mbox, msg);
+}
+static inline int mbox_fifo_empty(struct omap_mbox *mbox)
+{
+ return mbox-ops-fifo_empty(mbox);
+}
+static inline int mbox_fifo_full(struct omap_mbox *mbox)
+{
+ return mbox-ops-fifo_full(mbox);
+}
+
+/* Mailbox IRQ handle functions */
+static inline void enable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
+{
+ mbox-ops-enable_irq(mbox, irq);
+}
+static inline void disable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t
irq)
+{
+ mbox-ops-disable_irq(mbox, irq);
+}
+static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
+{
+ if (mbox-ops-ack_irq)
+ mbox-ops-ack_irq(mbox, irq);
+}
+static inline int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
+{
+ return mbox-ops-is_irq(mbox, irq);
+}
+
/* Mailbox Sequence Bit function */
void omap_mbox_init_seq(struct omap_mbox *mbox)
{
diff --git a/arch/arm/plat-omap/mailbox.h b/arch/arm/plat-omap/mailbox.h
deleted file mode 100644
index 67c6740..000
--- a/arch/arm/plat-omap/mailbox.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Mailbox internal functions
- *
- * Copyright (C) 2006 Nokia Corporation
- * Written by: Hiroshi DOYU hiroshi.d...@nokia.com
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#ifndef __ARCH_ARM_PLAT_MAILBOX_H
-#define __ARCH_ARM_PLAT_MAILBOX_H
-
-/*
- * Mailbox sequence bit API
- */
-#if defined(CONFIG_ARCH_OMAP1)
-# define MBOX_USE_SEQ_BIT
-#elif defined(CONFIG_ARCH_OMAP2)
-# define MBOX_USE_SEQ_BIT
-#endif
-
-#ifdef MBOX_USE_SEQ_BIT
-/* seq_rcv should be initialized with any value other than
- * 0 and 1 31, to allow either value for the first
- * message. */
-static inline void mbox_seq_init(struct omap_mbox *mbox)
-{
- /* any value other than 0 and 1 31 */
- mbox-seq_rcv = 0x;
-}
-
-static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
-{
- /* add seq_snd to msg */
- *msg = (*msg 0x7fff) | mbox-seq_snd;
- /* flip seq_snd */
- mbox-seq_snd ^= 1 31;
-}
-
-static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
-{
- mbox_msg_t seq = msg (1 31);
- if (seq == mbox-seq_rcv)
- return -1;
- mbox-seq_rcv = seq;
- return 0;
-}
-#else
-static inline void mbox_seq_init(struct omap_mbox *mbox)
-{
-}
-static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
-{
-}
-static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
-{
- return 0;
-}
-#endif
-
-/* Mailbox FIFO handle functions */
-static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
-{
- return mbox-ops-fifo_read(mbox);
-}
-static inline void
[PATCH 10/10] omap mailbox: remove unnecessary header file inclusion
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com --- arch/arm/plat-omap/mailbox.c |6 +- 1 files changed, 1 insertions(+), 5 deletions(-) diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c index 79f5fb7..feb286c 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/arch/arm/plat-omap/mailbox.c @@ -21,15 +21,11 @@ * */ -#include linux/init.h #include linux/module.h -#include linux/sched.h #include linux/interrupt.h #include linux/device.h -#include linux/blkdev.h -#include linux/err.h #include linux/delay.h -#include linux/io.h + #include mach/mailbox.h static int enable_seq_bit; -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 09/10] omap mailbox: convert sequence bit checking to module paramter
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/plat-omap/mailbox.c | 35 ---
1 files changed, 16 insertions(+), 19 deletions(-)
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index db5a0c2..79f5fb7 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -32,30 +32,34 @@
#include linux/io.h
#include mach/mailbox.h
+static int enable_seq_bit;
+module_param(enable_seq_bit, bool, 0);
+MODULE_PARM_DESC(enable_seq_bit, Enable sequence bit checking.);
+
static struct omap_mbox *mboxes;
static DEFINE_RWLOCK(mboxes_lock);
/*
* Mailbox sequence bit API
*/
-#if defined(CONFIG_ARCH_OMAP1)
-# define MBOX_USE_SEQ_BIT
-#elif defined(CONFIG_ARCH_OMAP2)
-# define MBOX_USE_SEQ_BIT
-#endif
-#ifdef MBOX_USE_SEQ_BIT
/* seq_rcv should be initialized with any value other than
* 0 and 1 31, to allow either value for the first
* message. */
static inline void mbox_seq_init(struct omap_mbox *mbox)
{
+ if (!enable_seq_bit)
+ return;
+
/* any value other than 0 and 1 31 */
mbox-seq_rcv = 0x;
}
static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
{
+ if (!enable_seq_bit)
+ return;
+
/* add seq_snd to msg */
*msg = (*msg 0x7fff) | mbox-seq_snd;
/* flip seq_snd */
@@ -64,24 +68,17 @@ static inline void mbox_seq_toggle(struct omap_mbox *mbox,
mbox_msg_t * msg)
static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
{
- mbox_msg_t seq = msg (1 31);
+ mbox_msg_t seq;
+
+ if (!enable_seq_bit)
+ return 0;
+
+ seq = msg (1 31);
if (seq == mbox-seq_rcv)
return -1;
mbox-seq_rcv = seq;
return 0;
}
-#else
-static inline void mbox_seq_init(struct omap_mbox *mbox)
-{
-}
-static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
-{
-}
-static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
-{
- return 0;
-}
-#endif
/* Mailbox FIFO handle functions */
static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
--
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[PATCH 0/6] arm: omap iommu: add initial support
The following patches add initial support of omap iommu. Some of TI OMAP series have the peripheral devices with their own MMU(iommu), which is composed of its own tlb and optional h/w pagetable(twl). These MMUs don't depend on mpu(arm) mmu at all, but their algorithms are somewhat similar and they share the same physical address space. This patch provides with common in-kernel iommu APIs such OMAP peripheral devices(Camera ISP, IVA1, IVA2, DSP and the equivalent ones in the latest OMAP successors) to handle peripheral device iommus in the same manner. --- Hiroshi DOYU (6): omap2 iommu: entries for Kconfig and Makefile omap iommu: entries for Kconfig and Makefile omap iommu: simple virtual address space management omap iommu: omap3 iommu device registration omap iommu: omap2 architecture specific functions omap iommu: tlb and pagetable primitives arch/arm/include/asm/io.h|6 arch/arm/mach-omap2/Makefile |5 arch/arm/mach-omap2/iommu2.c | 325 +++ arch/arm/mach-omap2/omap3-iommu.c| 111 arch/arm/mm/ioremap.c| 11 arch/arm/plat-omap/Kconfig |8 arch/arm/plat-omap/Makefile |1 arch/arm/plat-omap/include/mach/iommu.h | 157 + arch/arm/plat-omap/include/mach/iommu2.h | 94 +++ arch/arm/plat-omap/include/mach/iovmm.h | 94 +++ arch/arm/plat-omap/iommu.c | 913 ++ arch/arm/plat-omap/iopgtable.h | 72 ++ arch/arm/plat-omap/iovmm.c | 892 + 13 files changed, 2689 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-omap2/iommu2.c create mode 100644 arch/arm/mach-omap2/omap3-iommu.c create mode 100644 arch/arm/plat-omap/include/mach/iommu.h create mode 100644 arch/arm/plat-omap/include/mach/iommu2.h create mode 100644 arch/arm/plat-omap/include/mach/iovmm.h create mode 100644 arch/arm/plat-omap/iommu.c create mode 100644 arch/arm/plat-omap/iopgtable.h create mode 100644 arch/arm/plat-omap/iovmm.c -- Hiroshi DOYU -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/6] omap iommu: tlb and pagetable primitives
This patch provides:
- iotlb_*() : iommu tlb operations
- iopgtable_*() : iommu pagetable(twl) operations
- iommu_*() : the other generic operations
and the entry points to register and acquire iommu object.
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/plat-omap/include/mach/iommu.h | 157 +
arch/arm/plat-omap/iommu.c | 913 +++
arch/arm/plat-omap/iopgtable.h | 72 ++
3 files changed, 1142 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/plat-omap/include/mach/iommu.h
create mode 100644 arch/arm/plat-omap/iommu.c
create mode 100644 arch/arm/plat-omap/iopgtable.h
diff --git a/arch/arm/plat-omap/include/mach/iommu.h
b/arch/arm/plat-omap/include/mach/iommu.h
new file mode 100644
index 000..8bd5c58
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/iommu.h
@@ -0,0 +1,157 @@
+/*
+ * omap iommu: main structures
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ *
+ * Written by Hiroshi DOYU hiroshi.d...@nokia.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __MACH_IOMMU_H
+#define __MACH_IOMMU_H
+
+struct iotlb_entry {
+ u32 da;
+ u32 pa;
+ u32 pgsz, prsvd, valid;
+ union {
+ u16 ap;
+ struct {
+ u32 endian, elsz, mixed;
+ };
+ };
+};
+
+struct iommu {
+ const char *name;
+ struct module *owner;
+ struct clk *clk;
+ void __iomem*regbase;
+ struct device *dev;
+
+ unsigned intrefcount;
+ struct mutexiommu_lock; /* global for this whole object */
+
+ /*
+* We don't change iopgd for a situation like pgd for a task,
+* but share it globally for each iommu.
+*/
+ u32 *iopgd;
+ spinlock_t page_table_lock; /* protect iopgd */
+
+ int nr_tlb_entries;
+
+ struct list_headmmap;
+ struct mutexmmap_lock; /* protect mmap */
+
+ int (*isr)(struct iommu *obj);
+
+ void *ctx; /* iommu context: registres saved area */
+};
+
+struct cr_regs {
+ union {
+ struct {
+ u16 cam_l;
+ u16 cam_h;
+ };
+ u32 cam;
+ };
+ union {
+ struct {
+ u16 ram_l;
+ u16 ram_h;
+ };
+ u32 ram;
+ };
+};
+
+struct iotlb_lock {
+ short base;
+ short vict;
+};
+
+/* architecture specific functions */
+struct iommu_functions {
+ unsigned long version;
+
+ int (*enable)(struct iommu *obj);
+ void (*disable)(struct iommu *obj);
+ u32 (*fault_isr)(struct iommu *obj, u32 *ra);
+
+ void (*tlb_read_cr)(struct iommu *obj, struct cr_regs *cr);
+ void (*tlb_load_cr)(struct iommu *obj, struct cr_regs *cr);
+
+ struct cr_regs *(*alloc_cr)(struct iommu *obj, struct iotlb_entry *e);
+ int (*cr_valid)(struct cr_regs *cr);
+ u32 (*cr_to_virt)(struct cr_regs *cr);
+ void (*cr_to_e)(struct cr_regs *cr, struct iotlb_entry *e);
+ ssize_t (*dump_cr)(struct iommu *obj, struct cr_regs *cr, char *buf);
+
+ u32 (*get_pte_attr)(struct iotlb_entry *e);
+
+ void (*save_ctx)(struct iommu *obj);
+ void (*restore_ctx)(struct iommu *obj);
+ ssize_t (*dump_ctx)(struct iommu *obj, char *buf);
+};
+
+struct iommu_platform_data {
+ char*name;
+ char*clk_name;
+ int nr_tlb_entries;
+};
+
+#include mach/iommu2.h
+
+/*
+ * utilities for super page(16MB, 1MB, 64KB and 4KB)
+ */
+
+#define iopgsz_max(bytes) \
+ (((bytes) = SZ_16M) ? SZ_16M : \
+((bytes) = SZ_1M) ? SZ_1M : \
+((bytes) = SZ_64K) ? SZ_64K : \
+((bytes) = SZ_4K) ? SZ_4K : 0)
+
+#define bytes_to_iopgsz(bytes) \
+ (((bytes) == SZ_16M) ? MMU_CAM_PGSZ_16M : \
+((bytes) == SZ_1M) ? MMU_CAM_PGSZ_1M : \
+((bytes) == SZ_64K) ? MMU_CAM_PGSZ_64K : \
+((bytes) == SZ_4K) ? MMU_CAM_PGSZ_4K : -1)
+
+#define iopgsz_to_bytes(iopgsz)\
+ (((iopgsz) == MMU_CAM_PGSZ_16M) ? SZ_16M : \
+((iopgsz) == MMU_CAM_PGSZ_1M) ? SZ_1M : \
+((iopgsz) == MMU_CAM_PGSZ_64K) ? SZ_64K : \
+((iopgsz) == MMU_CAM_PGSZ_4K) ? SZ_4K : 0)
+
+#define iopgsz_ok(bytes) (bytes_to_iopgsz(bytes) = 0)
+
+/*
+ * global functions
+ */
+extern u32 iommu_arch_version(void);
+
+extern int load_iotlb_entry(struct iommu *obj, struct iotlb_entry *e);
+extern void flush_iotlb_page(struct iommu *obj, u32 da);
+extern void flush_iotlb_range(struct iommu *obj, u32 start, u32 end);
+extern void
[PATCH 2/6] omap iommu: omap2 architecture specific functions
The structure 'arch_mmu' accommodates the difference between omap1 and
omap2/3.
This patch provides omap2/3 specific functions
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/mach-omap2/iommu2.c | 325 ++
arch/arm/plat-omap/include/mach/iommu2.h | 94 +
2 files changed, 419 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/iommu2.c
create mode 100644 arch/arm/plat-omap/include/mach/iommu2.h
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
new file mode 100644
index 000..daaa6f5
--- /dev/null
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -0,0 +1,325 @@
+/*
+ * omap iommu: omap2/3 architecture specific functions
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ *
+ * Written by Hiroshi DOYU hiroshi.d...@nokia.com,
+ * Paul Mundt and Toshihiro Kobayashi
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/err.h
+#include linux/io.h
+#include linux/device.h
+#include linux/jiffies.h
+#include linux/module.h
+#include linux/stringify.h
+
+#include mach/iommu.h
+#include mach/iommu2.h
+
+/*
+ * omap2 architecture specific register bit definitions
+ */
+#define IOMMU_ARCH_VERSION 0x0011
+
+/* SYSCONF */
+#define MMU_SYS_IDLE_SHIFT 3
+#define MMU_SYS_IDLE_FORCE (0 MMU_SYS_IDLE_SHIFT)
+#define MMU_SYS_IDLE_NONE (1 MMU_SYS_IDLE_SHIFT)
+#define MMU_SYS_IDLE_SMART (2 MMU_SYS_IDLE_SHIFT)
+#define MMU_SYS_IDLE_MASK (3 MMU_SYS_IDLE_SHIFT)
+
+#define MMU_SYS_SOFTRESET (1 1)
+#define MMU_SYS_AUTOIDLE 1
+
+/* SYSSTATUS */
+#define MMU_SYS_RESETDONE 1
+
+/* IRQSTATUS IRQENABLE */
+#define MMU_IRQ_MULTIHITFAULT (1 4)
+#define MMU_IRQ_TABLEWALKFAULT (1 3)
+#define MMU_IRQ_EMUMISS(1 2)
+#define MMU_IRQ_TRANSLATIONFAULT (1 1)
+#define MMU_IRQ_TLBMISS(1 0)
+#define MMU_IRQ_MASK \
+ (MMU_IRQ_MULTIHITFAULT | MMU_IRQ_TABLEWALKFAULT | MMU_IRQ_EMUMISS | \
+MMU_IRQ_TRANSLATIONFAULT)
+
+/* MMU_CNTL */
+#define MMU_CNTL_SHIFT 1
+#define MMU_CNTL_MASK (7 MMU_CNTL_SHIFT)
+#define MMU_CNTL_EML_TLB (1 3)
+#define MMU_CNTL_TWL_EN(1 2)
+#define MMU_CNTL_MMU_EN(1 1)
+
+#define get_cam_va_mask(pgsz) \
+ (((pgsz) == MMU_CAM_PGSZ_16M) ? 0xff00 :\
+((pgsz) == MMU_CAM_PGSZ_1M) ? 0xfff0 :\
+((pgsz) == MMU_CAM_PGSZ_64K) ? 0x :\
+((pgsz) == MMU_CAM_PGSZ_4K) ? 0xf000 : 0)
+
+static int omap2_iommu_enable(struct iommu *obj)
+{
+ u32 l, pa;
+ unsigned long timeout;
+
+ if (!obj-iopgd || !IS_ALIGNED((u32)obj-iopgd, SZ_16K))
+ return -EINVAL;
+
+ pa = virt_to_phys(obj-iopgd);
+ if (!IS_ALIGNED(pa, SZ_16K))
+ return -EINVAL;
+
+ iommu_write_reg(obj, MMU_SYS_SOFTRESET, MMU_SYSCONFIG);
+
+ timeout = jiffies + msecs_to_jiffies(20);
+ do {
+ l = iommu_read_reg(obj, MMU_SYSSTATUS);
+ if (l MMU_SYS_RESETDONE)
+ break;
+ } while (time_after(jiffies, timeout));
+
+ if (!(l MMU_SYS_RESETDONE)) {
+ dev_err(obj-dev, can't take mmu out of reset\n);
+ return -ENODEV;
+ }
+
+ l = iommu_read_reg(obj, MMU_REVISION);
+ dev_info(obj-dev, %s: version %d.%d\n, obj-name,
+(l 4) 0xf, l 0xf);
+
+ l = iommu_read_reg(obj, MMU_SYSCONFIG);
+ l = ~MMU_SYS_IDLE_MASK;
+ l |= (MMU_SYS_IDLE_SMART | MMU_SYS_AUTOIDLE);
+ iommu_write_reg(obj, l, MMU_SYSCONFIG);
+
+ iommu_write_reg(obj, MMU_IRQ_MASK, MMU_IRQENABLE);
+ iommu_write_reg(obj, pa, MMU_TTB);
+
+ l = iommu_read_reg(obj, MMU_CNTL);
+ l = ~MMU_CNTL_MASK;
+ l |= (MMU_CNTL_MMU_EN | MMU_CNTL_TWL_EN);
+ iommu_write_reg(obj, l, MMU_CNTL);
+
+ return 0;
+}
+
+static void omap2_iommu_disable(struct iommu *obj)
+{
+ u32 l = iommu_read_reg(obj, MMU_CNTL);
+
+ l = ~MMU_CNTL_MASK;
+ iommu_write_reg(obj, l, MMU_CNTL);
+ iommu_write_reg(obj, MMU_SYS_IDLE_FORCE, MMU_SYSCONFIG);
+
+ dev_dbg(obj-dev, %s is shutting down\n, obj-name);
+}
+
+static u32 omap2_iommu_fault_isr(struct iommu *obj, u32 *ra)
+{
+ int i;
+ u32 stat, da;
+ const char *err_msg[] = {
+ tlb miss,
+ translation fault,
+ emulation miss,
+ table walk fault,
+ multi hit fault,
+ };
+
+ stat = iommu_read_reg(obj, MMU_IRQSTATUS);
+ stat = MMU_IRQ_MASK;
+ if (!stat)
+ return 0;
+
+ da = iommu_read_reg(obj, MMU_FAULT_AD);
+ *ra = da;
+
+ dev_err(obj-dev, %s:\tda:%08x , __func__, da);
+
+ for (i = 0; i
[PATCH 3/6] omap iommu: omap3 iommu device registration
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/mach-omap2/omap3-iommu.c | 111 +
1 files changed, 111 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/omap3-iommu.c
diff --git a/arch/arm/mach-omap2/omap3-iommu.c
b/arch/arm/mach-omap2/omap3-iommu.c
new file mode 100644
index 000..52d0e56
--- /dev/null
+++ b/arch/arm/mach-omap2/omap3-iommu.c
@@ -0,0 +1,111 @@
+/*
+ * omap iommu: omap3 device registration
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ *
+ * Written by Hiroshi DOYU hiroshi.d...@nokia.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/io.h
+#include linux/platform_device.h
+
+#include mach/iommu.h
+
+#define DEVNAME omap-iommu
+
+/* Camera ISP MMU */
+#define OMAP3_MMU1_BASE0x480bd400
+#define OMAP3_MMU1_IRQ 24
+
+/* IVA2.2 MMU */
+#define OMAP3_MMU2_BASE0x5d00
+#define OMAP3_MMU2_IRQ 28
+
+static struct resource iommu1_res[] = { /* Camera ISP MMU */
+ {
+ .start = OMAP3_MMU1_BASE,
+ .end= OMAP3_MMU1_BASE + MMU_REG_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = OMAP3_MMU1_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct resource iommu2_res[] = { /* IVA2.2 MMU */
+ {
+ .start = OMAP3_MMU2_BASE,
+ .end= OMAP3_MMU2_BASE + MMU_REG_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = OMAP3_MMU2_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct iommu_platform_data omap3_iommu_pdata[] = {
+ {
+ .name = isp,
+ .nr_tlb_entries = 8,
+ .clk_name = cam_ick,
+ },
+ {
+ .name = iva2,
+ .nr_tlb_entries = 32,
+ .clk_name = iva2_ck,
+ },
+};
+
+static void omap3_iommu_release(struct device *dev)
+{
+}
+
+static struct platform_device omap3_iommu_pdev[] = {
+ {
+ .name = DEVNAME,
+ .id = 1,
+ .num_resources = ARRAY_SIZE(iommu1_res),
+ .resource = iommu1_res,
+ .dev= {
+ .release = omap3_iommu_release,
+ .platform_data = omap3_iommu_pdata[0],
+ },
+ },
+ {
+ .name = DEVNAME,
+ .id = 2,
+ .num_resources = ARRAY_SIZE(iommu2_res),
+ .resource = iommu2_res,
+ .dev= {
+ .release = omap3_iommu_release,
+ .platform_data = omap3_iommu_pdata[1],
+ },
+ },
+};
+
+static int __init omap3_iommu_init(void)
+{
+ int i;
+ for (i = 0; i ARRAY_SIZE(omap3_iommu_pdev); i++)
+ platform_device_register(omap3_iommu_pdev[i]);
+ return 0;
+}
+module_init(omap3_iommu_init);
+
+static void __exit omap3_iommu_exit(void)
+{
+ int i;
+ for (i = 0; i ARRAY_SIZE(omap3_iommu_pdev); i++)
+ platform_device_unregister(omap3_iommu_pdev[i]);
+}
+module_exit(omap3_iommu_exit);
+
+MODULE_AUTHOR(Hiroshi DOYU);
+MODULE_DESCRIPTION(omap iommu: omap3 device registration);
+MODULE_LICENSE(GPL v2);
--
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the body of a message to majord...@vger.kernel.org
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[PATCH 5/6] omap iommu: entries for Kconfig and Makefile
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com --- arch/arm/plat-omap/Kconfig |8 arch/arm/plat-omap/Makefile |1 + 2 files changed, 9 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 46d3b0b..bacdc32 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -104,6 +104,14 @@ config OMAP_MCBSP Say Y here if you want support for the OMAP Multichannel Buffered Serial Port. +config OMAP_IOMMU + tristate IOMMU support + depends on ARCH_OMAP + default n + help + Say Y here if you want to use OMAP IOMMU support for IVA2 and + Camera in OMAP3. + choice prompt System timer default OMAP_MPU_TIMER diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index deaff58..e2453e2 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -13,6 +13,7 @@ obj- := obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o +obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o obj-$(CONFIG_CPU_FREQ) += cpu-omap.o obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/6] omap iommu: simple virtual address space management
This patch provides a device drivers, which has a omap iommu, with
address mapping APIs between device virtual address(iommu), physical
address and MPU virtual address.
There are 4 possible patterns for iommu virtual address(iova/da) mapping.
|iova/mapping iommu_ page
| dapa va (d)-(p)-(v) functiontype
---
1 | c c c1 - 1 - 1_kmap() / _kunmap() s
2 | c c,a c1 - 1 - 1 _kmalloc()/ _kfree()s
3 | c d c1 - n - 1_vmap() / _vunmap() s
4 | c d,a c1 - n - 1 _vmalloc()/ _vfree()n*
'iova': device iommu virtual address
'da': alias of 'iova'
'pa': physical address
'va': mpu virtual address
'c':contiguous memory area
'd':dicontiguous memory area
'a':anonymous memory allocation
'()': optional feature
'n':a normal page(4KB) size is used.
's':multiple iommu superpage(16MB, 1MB, 64KB, 4KB) size is used.
'*':not yet, but feasible.
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/include/asm/io.h |6
arch/arm/mm/ioremap.c | 11
arch/arm/plat-omap/include/mach/iovmm.h | 94 +++
arch/arm/plat-omap/iovmm.c | 892 +++
4 files changed, 1003 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/plat-omap/include/mach/iovmm.h
create mode 100644 arch/arm/plat-omap/iovmm.c
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index d2a59cf..cbdadfe 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -75,6 +75,12 @@ extern void __iomem * __arm_ioremap(unsigned long, size_t,
unsigned int);
extern void __iounmap(volatile void __iomem *addr);
/*
+ * external interface to remap single page with appropriate type
+ */
+extern int ioremap_page(unsigned long virt, unsigned long phys,
+ unsigned int mtype);
+
+/*
* Bad read/write accesses...
*/
extern void __readwrite_bug(const char *fn);
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 18373f7..ad2a0c1 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -110,6 +110,17 @@ static int remap_area_pages(unsigned long start, unsigned
long pfn,
return err;
}
+int ioremap_page(unsigned long virt, unsigned long phys, unsigned int mtype)
+{
+ const struct mem_type *type;
+
+ type = get_mem_type(mtype);
+ if (!type)
+ return -EINVAL;
+
+ return remap_area_pages(virt, __phys_to_pfn(phys), PAGE_SIZE, type);
+}
+EXPORT_SYMBOL(ioremap_page);
void __check_kvm_seq(struct mm_struct *mm)
{
diff --git a/arch/arm/plat-omap/include/mach/iovmm.h
b/arch/arm/plat-omap/include/mach/iovmm.h
new file mode 100644
index 000..314488d
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/iovmm.h
@@ -0,0 +1,94 @@
+/*
+ * omap iommu: simple virtual address space management
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ *
+ * Written by Hiroshi DOYU hiroshi.d...@nokia.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __IOMMU_MMAP_H
+#define __IOMMU_MMAP_H
+
+struct iovm_struct {
+ struct iommu*iommu; /* iommu object which this belongs to */
+ u32 da_start; /* area definition */
+ u32 da_end;
+ u32 flags; /* IOVMF_: see below */
+ struct list_headlist; /* linked in ascending order */
+ const struct sg_table *sgt; /* keep 'page' - 'da' mapping */
+ void*va; /* mpu side mapped address */
+};
+
+/*
+ * IOVMF_FLAGS: attribute for iommu virtual memory area(iovma)
+ *
+ * lower 16 bit is used for h/w and upper 16 bit is for s/w.
+ */
+#define IOVMF_SW_SHIFT 16
+#define IOVMF_HW_SIZE (1 IOVMF_SW_SHIFT)
+#define IOVMF_HW_MASK (IOVMF_HW_SIZE - 1)
+#define IOVMF_SW_MASK (~IOVMF_HW_MASK)UL
+
+/*
+ * iovma: h/w flags derived from cam and ram attribute
+ */
+#define IOVMF_CAM_MASK (~((1 10) - 1))
+#define IOVMF_RAM_MASK (~IOVMF_CAM_MASK)
+
+#define IOVMF_PGSZ_MASK(3 0)
+#define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M
+#define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K
+#define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K
+#define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M
+
+#define IOVMF_ENDIAN_MASK (1 9)
+#define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG
+#define IOVMF_ENDIAN_LITTLEMMU_RAM_ENDIAN_LITTLE
+
+#define IOVMF_ELSZ_MASK(3 7)
+#define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8
[PATCH 6/6] omap2 iommu: entries for Kconfig and Makefile
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com --- arch/arm/mach-omap2/Makefile |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index bbd12bc..443e71f 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -24,6 +24,11 @@ endif obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o +obj-$(CONFIG_OMAP_IOMMU) += iommu2.o +ifeq ($(CONFIG_ARCH_OMAP3),y) +obj-$(CONFIG_OMAP_IOMMU) += omap3-iommu.o +endif + # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC)+= board-generic.o obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Git tree updated to v2.6.29-rc1, omap-2.6.28 branch added
* Tony Lindgren t...@atomide.com [090116 10:13]: * David Brownell davi...@pacbell.net [090116 09:59]: On Thursday 15 January 2009, Tony Lindgren wrote: Then when it tries to boot, (a) the HSMMC driver reports error -110 then chokes, so no root FS; and then (b) MUSB misdetects the high speed hub as full speed then chokes, so no network links either. That's on a trusty Beagle config. I don't think I'll be upgrading anything else just yet... Hmm, that sounds conservative! :) You're just trying to get me to find out what's broken and fix it! I'm on to that particular dastardly plot... ;) Oh no, busted! It'd be somewhat usable if the MMC were live. Seems to work on at least overo, no ideas what might have happened to it on beagle. MMC seems to work also on omap3430sdp. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: lowmemory android driver not needed?
On Thu, Jan 15, 2009 at 03:44:04PM -0800, Greg KH wrote: On Thu, Jan 15, 2009 at 07:02:48PM +0530, Trilok Soni wrote: And there is one more lowmem driver developed by Nokia for Nokia 8xx tablets it seems. CCed Tony Lindgren, Juha and Viktor. http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=blob;f=security/lowmem.c;h=ae78a530af39703e335ad769f1e6f097f63ec6dd;hb=HEAD As we can't stack LSMs, using the lsm interface for a simple memory driver seems pretty wasteful :) The heuristics and tunables are more what ended up being useful with this module, which could trivially be abstracted out. The focus of the lowmem module was mostly giving userspace an opportunity to change its behaviour, and to try to save critical state. I don't know how well this would map to the Android use cases, though. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] Fix compile error in usb-ehci.c
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Friday, January 16, 2009 12:58 PM To: Gadiyar, Anand Cc: linux-omap@vger.kernel.org Subject: Re: [PATCH] Fix compile error in usb-ehci.c * Gadiyar, Anand gadi...@ti.com [090115 20:48]: From: Anand Gadiyar gadi...@ti.com Fix this compile error Can you please resend via the usb list? Isn't this omap specific? I don't mind sending this through the USB list, except that I think it has nothing to do with USB. Acked-by: Tony Lindgren t...@atomide.com CC arch/arm/mach-omap2/usb-ehci.o arch/arm/mach-omap2/usb-ehci.c:39: error: 'INT_34XX_EHCI_IRQ' undeclared here (not in a function) make[1]: *** [arch/arm/mach-omap2/usb-ehci.o] Error 1 make: *** [arch/arm/mach-omap2] Error 2 Signed-off-by: Anand Gadiyar gadi...@ti.com --- diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c index 489439d..6af0b02 100644 --- a/arch/arm/mach-omap2/usb-ehci.c +++ b/arch/arm/mach-omap2/usb-ehci.c @@ -25,6 +25,7 @@ #include linux/usb/musb.h #include mach/hardware.h +#include mach/irqs.h #include mach/pm.h #include mach/usb.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] Fix compile error in usb-ehci.c
From: Anand Gadiyar gadi...@ti.com Fix this compile error Can you please resend via the usb list? Isn't this omap specific? I don't mind sending this through the USB list, except that I think it has nothing to do with USB. Scratch this. I saw your next mail too late. - Anand -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] ASoC: Fix the power update function for snd_soc_dapm_value_mux
* Takashi Iwai ti...@suse.de [090116 11:16]: At Fri, 16 Jan 2009 09:48:06 +0200, Peter Ujfalusi wrote: Modify the check for the mux type to also handle the snd_soc_dapm_value_mux type in a same way as the snd_soc_dapm_mux. Signed-off-by: Peter Ujfalusi peter.ujfal...@nokia.com Signed-off-by: Takashi Iwai ti...@suse.de FYI, it's already in Linus tree. Thanks, will get it on the next merge then. Tony thanks, Takashi --- sound/soc/soc-dapm.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 493a4e8..a2f1da8 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -720,7 +720,8 @@ static int dapm_mux_update_power(struct snd_soc_dapm_widget *widget, struct snd_soc_dapm_path *path; int found = 0; - if (widget-id != snd_soc_dapm_mux) + if (widget-id != snd_soc_dapm_mux + widget-id != snd_soc_dapm_value_mux) return -ENODEV; if (!snd_soc_test_bits(widget-codec, e-reg, mask, val)) -- 1.6.1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 01/10] omap mailbox: cleanup omap2 register definition with macro
2009/1/16 Hiroshi DOYU hiroshi.d...@nokia.com:
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/mach-omap2/mailbox.c | 77
+++--
1 files changed, 29 insertions(+), 48 deletions(-)
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 32b7af3..0609e2d 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -18,40 +18,19 @@
#include mach/mailbox.h
#include mach/irqs.h
-#define MAILBOX_REVISION 0x00
-#define MAILBOX_SYSCONFIG 0x10
-#define MAILBOX_SYSSTATUS 0x14
-#define MAILBOX_MESSAGE_0 0x40
-#define MAILBOX_MESSAGE_1 0x44
-#define MAILBOX_MESSAGE_2 0x48
-#define MAILBOX_MESSAGE_3 0x4c
-#define MAILBOX_MESSAGE_4 0x50
-#define MAILBOX_MESSAGE_5 0x54
-#define MAILBOX_FIFOSTATUS_0 0x80
-#define MAILBOX_FIFOSTATUS_1 0x84
-#define MAILBOX_FIFOSTATUS_2 0x88
-#define MAILBOX_FIFOSTATUS_3 0x8c
-#define MAILBOX_FIFOSTATUS_4 0x90
-#define MAILBOX_FIFOSTATUS_5 0x94
-#define MAILBOX_MSGSTATUS_00xc0
-#define MAILBOX_MSGSTATUS_10xc4
-#define MAILBOX_MSGSTATUS_20xc8
-#define MAILBOX_MSGSTATUS_30xcc
-#define MAILBOX_MSGSTATUS_40xd0
-#define MAILBOX_MSGSTATUS_50xd4
-#define MAILBOX_IRQSTATUS_00x100
-#define MAILBOX_IRQENABLE_00x104
-#define MAILBOX_IRQSTATUS_10x108
-#define MAILBOX_IRQENABLE_10x10c
-#define MAILBOX_IRQSTATUS_20x110
-#define MAILBOX_IRQENABLE_20x114
-#define MAILBOX_IRQSTATUS_30x118
-#define MAILBOX_IRQENABLE_30x11c
+#define MAILBOX_REVISION 0x000
+#define MAILBOX_SYSCONFIG 0x010
+#define MAILBOX_SYSSTATUS 0x014
+#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
+#define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
+#define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
+#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
+#define MAILBOX_IRQENABLE(u) (0x108 + 8 * (u))
^^^
shouldn't this be
#define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
-static unsigned long mbox_base;
+#define MAILBOX_IRQ_NEWMSG(u) (1 (2 * (u)))
+#define MAILBOX_IRQ_NOTFULL(u) (1 (2 * (u) + 1))
-#define MAILBOX_IRQ_NOTFULL(n) (1 (2 * (n) + 1))
-#define MAILBOX_IRQ_NEWMSG(n) (1 (2 * (n)))
+static unsigned long mbox_base;
struct omap_mbox2_fifo {
unsigned long msg;
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Re: lowmemory android driver not needed?
And there is one more lowmem driver developed by Nokia for Nokia 8xx
tablets it seems. CCed Tony Lindgren, Juha and Viktor.
http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=blob;f=security/lowmem.c;h=ae78a530af39703e335ad769f1e6f097f63ec6dd;hb=HEAD
quick review.
325 static struct security_operations lowmem_security_ops = {
326 /* Use the capability functions for some of the hooks */
327 .ptrace_may_access = cap_ptrace_may_access,
328 .ptrace_traceme = cap_ptrace_traceme,
329 .capget = cap_capget,
330 .capset_check = cap_capset_check,
331 .capset_set = cap_capset_set,
332 .capable = cap_capable,
333
334 .bprm_apply_creds = cap_bprm_apply_creds,
335 .bprm_set_security = cap_bprm_set_security,
336
337 .task_post_setuid = cap_task_post_setuid,
338 .task_reparent_to_init = cap_task_reparent_to_init,
339 .vm_enough_memory = low_vm_enough_memory,
340 };
.vm_enough_memory is the hook of virtual memory accounting, not rss.
modern almost linux application and glibc largely use virtual address space
than actual resident memory.
then, vm_enough_memory don't provide proper hook.
57 static ctl_table lowmem_table[] = {
58 {
59 .ctl_name = VM_LOWMEM_DENY_PAGES,
60 .procname = lowmem_deny_watermark_pages,
61 .data = deny_pages,
62 .maxlen = sizeof(long),
63 .mode = 0644,
64 .child = NULL,
65 .proc_handler = proc_dointvec,
66 .strategy = sysctl_intvec,
67 }, {
you can set .ctl_name to CTL_UNNUMBERED.
249 static int low_vm_enough_memory(struct mm_struct *mm, long pages)
250 {
251 unsigned long free, allowed;
252 int cap_sys_admin = 0, notify;
253
254 if (cap_capable(current, CAP_SYS_ADMIN) == 0)
255 cap_sys_admin = 1;
256
257 allowed = totalram_pages - hugetlb_total_pages();
258 allowed_pages = allowed;
259
260 /* We activate ourselves only after both parameters have been
261 * configured. */
262 if (deny_pages == 0 || notify_low_pages == 0 || notify_high_pages
== 0)
263 return __vm_enough_memory(mm, pages, cap_sys_admin);
264
265 vm_acct_memory(pages);
266
267 /* Easily freed pages when under VM pressure or direct reclaim */
268 free = global_page_state(NR_FILE_PAGES);
this line assume file page can evictable. but it is not true.
we should consider mlocked file page.
269 free += nr_swap_pages;
270 free += global_page_state(NR_SLAB_RECLAIMABLE);
271
272 if (likely(free notify_low_pages))
273 goto enough_memory;
274
275 /* No luck, lets make it more expensive and try again.. */
276 free += nr_free_pages();
277
278 if (free deny_pages) {
279 int i;
280
281 lowmem_free_pages = free;
282 low_watermark_state(1);
283 high_watermark_state(1);
284 /* Memory allocations by root are always allowed */
285 if (cap_sys_admin)
286 return 0;
287
288 /* OOM unkillable process is allowed to consume memory */
289 if (current-oomkilladj == OOM_DISABLE)
290 return 0;
No generic assumption.
292 /* uids from allowed_uids vector are also allowed no
matter what */
293 for (i = 0; i LOWMEM_MAX_UIDS allowed_uids[i]; i++)
294 if (current-uid == allowed_uids[i])
295 return 0;
Oops, LOWMEM_MAX_UIDS is ugly restriction.
297 vm_unacct_memory(pages);
298 if (printk_ratelimit()) {
299 printk(MY_NAME : denying memory allocation to
process %d (%s )\n,
300current-pid, current-comm);
301 }
302 return -ENOMEM;
303 }
304
305 enough_memory:
306 /* See if we need to notify level 1 */
307 low_watermark_state(free notify_low_pages);
308
309 /*
310 * In the level 2 notification case things are more complicated,
311 * as the level that we drop the state and send a notification
312 * should be lower than when it is first triggered. Having this
313 * on the same watermark level ends up bouncing back and forth
314 * when applications are being stupid.
315 */
316 notify = free notify_high_pages;
317 if (notify || free - nr_decay_pages notify_high_pages)
318 high_watermark_state(notify);
319
320 /* We have plenty of memory */
321 lowmem_free_pages = free;
It seems racy.
if this code run on
Re: [PATCH 01/10] omap mailbox: cleanup omap2 register definition with macro
From: ext roel kluin roel.kl...@gmail.com Subject: Re: [PATCH 01/10] omap mailbox: cleanup omap2 register definition with macro Date: Fri, 16 Jan 2009 10:56:01 +0100 [...] +#define MAILBOX_SYSCONFIG 0x010 +#define MAILBOX_SYSSTATUS 0x014 +#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m)) +#define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m)) +#define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m)) +#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u)) +#define MAILBOX_IRQENABLE(u) (0x108 + 8 * (u)) ^^^ shouldn't this be #define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u)) Right. I'll fix, thanks. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/1] ASoC patch on top of linux-omap 2.6.29-rc1 (TWL4030 related)
On Fri, Jan 16, 2009 at 09:27:12AM +0200, Tony Lindgren wrote: In general that would be best, as then I know it's been acked and on it's way to the mainline kernel via alsa already. Meaning it's safe for me to apply to linux-omap without increasing the diff to mainline kernel. Linus has already merged it, FWIW. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: lowmemory android driver not needed?
also quick review to lowmemorykiller.c
#include linux/module.h
#include linux/kernel.h
#include linux/mm.h
#include linux/oom.h
#include linux/sched.h
static int lowmem_shrink(int nr_to_scan, gfp_t gfp_mask);
static struct shrinker lowmem_shrinker = {
.shrink = lowmem_shrink,
.seeks = DEFAULT_SEEKS * 16
};
why do you choice *16?
static uint32_t lowmem_debug_level = 2;
static int lowmem_adj[6] = {
why do you choice [6]?
0,
1,
6,
12,
};
static int lowmem_adj_size = 4;
static size_t lowmem_minfree[6] = {
3*512, // 6MB
2*1024, // 8MB
4*1024, // 16MB
16*1024, // 64MB
};
static int lowmem_minfree_size = 4;
#define lowmem_print(level, x...) do { if(lowmem_debug_level = (level))
printk(x); } while(0)
module_param_named(cost, lowmem_shrinker.seeks, int, S_IRUGO | S_IWUSR);
module_param_array_named(adj, lowmem_adj, int, lowmem_adj_size, S_IRUGO |
S_IWUSR);
module_param_array_named(minfree, lowmem_minfree, uint, lowmem_minfree_size,
S_IRUGO | S_IWUSR);
module_param_named(debug_level, lowmem_debug_level, uint, S_IRUGO | S_IWUSR);
static int lowmem_shrink(int nr_to_scan, gfp_t gfp_mask)
{
struct task_struct *p;
struct task_struct *selected = NULL;
int rem = 0;
int tasksize;
int i;
int min_adj = OOM_ADJUST_MAX + 1;
int selected_tasksize = 0;
int array_size = ARRAY_SIZE(lowmem_adj);
int other_free = global_page_state(NR_FREE_PAGES) +
global_page_state(NR_FILE_PAGES);
I think you don't consider mlocked page (and/or other unevictable page).
if much mlocked file page exist, other_free can become large value.
then, this routine don't kill any process.
if(lowmem_adj_size array_size)
array_size = lowmem_adj_size;
if(lowmem_minfree_size array_size)
array_size = lowmem_minfree_size;
for(i = 0; i array_size; i++) {
if(other_free lowmem_minfree[i]) {
min_adj = lowmem_adj[i];
break;
}
}
if(nr_to_scan 0)
lowmem_print(3, lowmem_shrink %d, %x, ofree %d, ma %d\n,
nr_to_scan, gfp_mask, other_fr ee, min_adj);
read_lock(tasklist_lock);
for_each_process(p) {
Oops. too long locking.
shrink_slab() is freqentlly called function. I don't like costly operation.
if(p-oomkilladj = 0 p-mm) {
tasksize = get_mm_rss(p-mm);
if(nr_to_scan 0 tasksize 0 p-oomkilladj =
min_adj) {
if(selected == NULL ||
p-oomkilladj selected-oomkilladj ||
(p-oomkilladj == selected-oomkilladj
tasksize selected_tasksize)) {
selected = p;
selected_tasksize = tasksize;
lowmem_print(2, select %d (%s), adj
%d, size %d, to kill\n,
p-pid, p-comm,
p-oomkilladj, tasksize);
}
}
rem += tasksize;
this code mean,
shrinker-shrink(0, gfp_mask) indicate to recalculate total rss every time.
it is too CPU and battery wasting.
}
}
if(selected != NULL) {
lowmem_print(1, send sigkill to %d (%s), adj %d, size %d\n,
selected-pid, selected-comm,
selected-oomkilladj, selected_tasksize);
force_sig(SIGKILL, selected);
rem -= selected_tasksize;
}
lowmem_print(4, lowmem_shrink %d, %x, return %d\n, nr_to_scan,
gfp_mask, rem);
read_unlock(tasklist_lock);
return rem;
}
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Re: [PATCH 01/10] omap mailbox: cleanup omap2 register definition with macro
Updated one attached.
From: ext Hiroshi DOYU hiroshi.d...@nokia.com
Subject: Re: [PATCH 01/10] omap mailbox: cleanup omap2 register definition with
macro
Date: Fri, 16 Jan 2009 14:15:24 +0200 (EET)
From: ext roel kluin roel.kl...@gmail.com
Subject: Re: [PATCH 01/10] omap mailbox: cleanup omap2 register definition
with macro
Date: Fri, 16 Jan 2009 10:56:01 +0100
[...]
+#define MAILBOX_SYSCONFIG 0x010
+#define MAILBOX_SYSSTATUS 0x014
+#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
+#define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
+#define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
+#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
+#define MAILBOX_IRQENABLE(u) (0x108 + 8 * (u))
^^^
shouldn't this be
#define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
Right. I'll fix, thanks.
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omap mailbox: cleanup omap2 register definition with macro
From: Hiroshi DOYU hiroshi.d...@nokia.com
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
---
arch/arm/mach-omap2/mailbox.c | 77 +++--
1 files changed, 29 insertions(+), 48 deletions(-)
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 32b7af3..85c3ab8 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -1,9 +1,9 @@
/*
- * Mailbox reservation modules for OMAP2
+ * Mailbox reservation modules for OMAP2/3
*
- * Copyright (C) 2006 Nokia Corporation
+ * Copyright (C) 2006-2008 Nokia Corporation
* Written by: Hiroshi DOYU hiroshi.d...@nokia.com
- *and Paul Mundt paul.mu...@nokia.com
+ *and Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
@@ -18,40 +18,19 @@
#include mach/mailbox.h
#include mach/irqs.h
-#define MAILBOX_REVISION 0x00
-#define MAILBOX_SYSCONFIG 0x10
-#define MAILBOX_SYSSTATUS 0x14
-#define MAILBOX_MESSAGE_0 0x40
-#define MAILBOX_MESSAGE_1 0x44
-#define MAILBOX_MESSAGE_2 0x48
-#define MAILBOX_MESSAGE_3 0x4c
-#define MAILBOX_MESSAGE_4 0x50
-#define MAILBOX_MESSAGE_5 0x54
-#define MAILBOX_FIFOSTATUS_0 0x80
-#define MAILBOX_FIFOSTATUS_1 0x84
-#define MAILBOX_FIFOSTATUS_2 0x88
-#define MAILBOX_FIFOSTATUS_3 0x8c
-#define MAILBOX_FIFOSTATUS_4 0x90
-#define MAILBOX_FIFOSTATUS_5 0x94
-#define MAILBOX_MSGSTATUS_00xc0
-#define MAILBOX_MSGSTATUS_10xc4
-#define MAILBOX_MSGSTATUS_20xc8
-#define MAILBOX_MSGSTATUS_30xcc
-#define MAILBOX_MSGSTATUS_40xd0
-#define MAILBOX_MSGSTATUS_50xd4
-#define MAILBOX_IRQSTATUS_00x100
-#define MAILBOX_IRQENABLE_00x104
-#define MAILBOX_IRQSTATUS_10x108
-#define MAILBOX_IRQENABLE_10x10c
-#define MAILBOX_IRQSTATUS_20x110
-#define MAILBOX_IRQENABLE_20x114
-#define MAILBOX_IRQSTATUS_30x118
-#define MAILBOX_IRQENABLE_30x11c
+#define MAILBOX_REVISION 0x000
+#define MAILBOX_SYSCONFIG 0x010
+#define MAILBOX_SYSSTATUS 0x014
+#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
+#define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
+#define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
+#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
+#define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
-static unsigned long mbox_base;
+#define MAILBOX_IRQ_NEWMSG(u) (1 (2 * (u)))
+#define MAILBOX_IRQ_NOTFULL(u) (1 (2 * (u) + 1))
-#define MAILBOX_IRQ_NOTFULL(n) (1 (2 * (n) + 1))
-#define MAILBOX_IRQ_NEWMSG(n) (1 (2 * (n)))
+static unsigned long mbox_base;
struct omap_mbox2_fifo {
unsigned long msg;
@@ -209,15 +188,15 @@ static struct omap_mbox_ops omap2_mbox_ops = {
/* DSP */
static struct omap_mbox2_priv omap2_mbox_dsp_priv = {
.tx_fifo = {
- .msg= MAILBOX_MESSAGE_0,
- .fifo_stat = MAILBOX_FIFOSTATUS_0,
+ .msg= MAILBOX_MESSAGE(0),
+ .fifo_stat = MAILBOX_FIFOSTATUS(0),
},
.rx_fifo = {
- .msg= MAILBOX_MESSAGE_1,
- .msg_stat = MAILBOX_MSGSTATUS_1,
+ .msg= MAILBOX_MESSAGE(1),
+ .msg_stat = MAILBOX_MSGSTATUS(1),
},
- .irqenable = MAILBOX_IRQENABLE_0,
- .irqstatus =
RE: new PM branch available
I did some testing today on my 3.0GP 3430SDP. This is with the omap_3430sdp_min_defconfig. 1) Idle. echo -n 1 /sys/power/clocks_off_while_idle echo -n 1 /sys/power/enable_off Could not hit RET. something seems to be still active. Not sure if it could be something to do with this error that's thrown while bootup 6Disabling unused clock dpll5_ck Disabling unused clock dpll5_ck 3clock: dpll5_ck failed transition to 'locked' clock: dpll5_ck failed transition to 'locked' Further doing a echo -n 1 /sys/power/sleep_while_idle causes a hang after the 5 odd secs of UART inactivity. Is'nt this option supposed to affect only the suspend path behavior? Is CPUidle disabled in the default defconfig now? 2) Suspend echo -n 1 /sys/power/clocks_off_while_idle Hangs on a echo mem /sys/power/state Goes into suspend, but cannot recover 3) DVFS Both VDD1 and VDD2 DVFS seem to function fine. -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Kevin Hilman Sent: Wednesday, January 14, 2009 3:22 AM To: linux-omap@vger.kernel.org Subject: new PM branch available Hello, The latest PM branch is now available[1]. I've done basic testing of retention and off-mode (suspend and dynamic idle) on Beagle and custom HW. My SDP has something still keeping CORE active that others have not seen, but I have yet to debug. Any other reports from SDP testing would be appreciated. Notable changes/updates - rebased on latest clock updates and fixes from Paul - clockfw pre- and post- notifiers - DVFS for VDD2 Full git shortlog below[2] Enjoy, Kevin [1] See branch 'pm' in my git repo: git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-om ap-pm.git which is also mirrored as the branch 'pm' of the normal linux-omap repo (but will not sync until 03:30 GMT) [2] git shortlog: Carlos Chinea (1): OMAP3:PM: Update SSI omapdev record Jouni Hogander (5): OMAP3: PM: Use pwrdm_set_next_pwrst instead of set_pwrdm_state in idle loop OMAP3: PM: Fix wrong sequence in suspend. OMAP3: PM: Do not build suspend code if SUSPEND is not enabled OMAP: PM: Build fails if PM is not enabled OMAP2: PM: Fix omap2 build Kalle Jokiniemi (3): OMAP: PM: sysfs interface for enabling voltage off in idle OMAP3: PM: Fix cpu idle init sequencing OMAP: SRF: Fixes to shared resource framework (Ver.3) Kevin Hilman (4): OMAP3: PM: CPUidle: obey enable_off_mode flag OMAP3: PM: CPUidle: restrict C-states on UART activity OMAP3: PM: decouple PER and CORE context save and restore OMAP2/3: PM: system_rev - omap_rev() Paul Walmsley (29): OMAP2/3 clock: implement clock notifier infrastructure OMAP clock: add notifier infrastructure OMAP2/3 clock: store planned clock rates into temporary rate storage OMAP2/3 clock: add clk post-rate-change notifiers OMAP2/3 clock: add clock pre-rate-change notification OMAP2/3 clock: add clock prepare-rate-change notifications OMAP2/3 clock: add clock abort-rate-change notifications OMAP2/3 PM: create the OMAP PM interface and add a default OMAP PM no-op layer. OMAP2/3 omapdev: add basic omapdev structure OMAP242x omapdev: add OMAP242x omapdev records OMAP243x omapdev: add OMAP243x omapdev records OMAP3xxx omapdev: add OMAP3xxx omapdev records OMAP2/3 omapdev: add code to walk the omapdev records ARM: MMU: add a Non-cacheable Normal executable memory type OMAP3 SRAM: mark OCM RAM as Non-cacheable Normal memory OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpll OMAP3 clock: add interconnect barriers to CORE DPLL M2 change OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change OMAP3 SDRC: Add 166MHz, 83MHz SDRC settings for the BeagleBoard OMAP3 SDRC: initialize SDRC_POWER at boot OMAP3 SRAM: renumber registers to make space for argument passing OMAP3 clock: only unlock SDRC DLL if SDRC clk 83MHz OMAP3 clock: use pr_debug() rather than pr_info() in some clock change code OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize OMAP3 clock: initialize SDRC timings at kernel start OMAP3 clock: add a short delay when lowering CORE clk rate OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change OMAP3 SRAM: add more comments on the SRAM code OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers Peter 'p2' De Schrijver (12): OMAP: PM counter infrastructure. OMAP: PM: Hook into PM counters OMAP: PM: Add closures to clkdm_for_each and pwrdm_for_each. OMAP: PM: Add pm-debug counters OMAP: PM debug: make powerdomains use PM-debug counters OMAP: PM: Add definitions for ETK pads and observability registers OMAP: Debug
RE: DSP/IOMMU needs 128-byte alignment from user-space buffers?
Hi Hari, Is this document ready? Can you please send this for information? Regards, Kishore. -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Kanigeri, Hari Sent: Thursday, December 18, 2008 7:01 PM To: Felipe Contreras Cc: linux-omap@vger.kernel.org; Hiroshi DOYU Subject: RE: DSP/IOMMU needs 128-byte alignment from user-space buffers? Hi Felipe, So if I'm understanding correctly there's no problem with unaligned DMM buffers if the DSP software is just reading; the problem is when writing data back to ARM. --- That is my understanding too. For read only buffer there shouldn't be an issue with data corruption. I heard that some folks at TI are working on documenting this cache alignement issues to share with you. Please hold on. Thank you, Best regards, Hari -Original Message- From: Felipe Contreras [mailto:felipe.contre...@gmail.com] Sent: Wednesday, December 17, 2008 3:21 PM To: Kanigeri, Hari Cc: linux-omap@vger.kernel.org; Hiroshi DOYU Subject: Re: DSP/IOMMU needs 128-byte alignment from user-space buffers? On Wed, Dec 17, 2008 at 10:37 PM, Kanigeri, Hari h-kanige...@ti.com wrote: Hi Felipe, I received information from TI saying that user-space buffers need to be 128-byte aligned for the DSP to work properly. Is this true or is it some kind of limitation on their MMU code that might be solved by Hiroshi's iommu? This impacts quite drastically user-space applications like GStreamer since a memory copy would be required to achieve that 128-byte alignment. They also claim that adding 128-byte padding at the beginning and at the end achieves the same purpose. This is to address the memory corruption that might arise when using DMM (Dynamic memory mapping) feature. When the DSP processes data, the DSP cache controller loads 128-Byte chunks (lines) from SDRAM and writes the data back in 128-Byte chunks. If a DMM buffer does not start and end on a 128-Byte boundary, the data preceding the start address from the 128-Byte boundary to the Start Address and the data at addresses trailing the end address from the End Address to the next 128-Byte boundary will be loaded and written back as well. If the DMM buffer was allocated on the heap of a process running on the ARM, the preceding and trailing data, if modified by the ARM (or other non-DSP entity) during DSP processing, will be overwritten by the DSP cache controller, when the 128-Byte chunks are written back to SDRAM. This can lead to heap corruption. Thanks for the explanation. So it doesn't have anything to do with IOMMU; it's the software running on the DSP that has this limitation. I think if you request the buffer from OMX component, this issue will be taken as there is an additional 256 bytes padding. Yes, but in that case a memcpy would be unavoidable in many cases, like trying to render the result of video decoding on Xv. If the Xv buffer is unaligned; a dedicated DMM would need to be allocated, and then the data coming from DSP would need to be copied to the Xv buffer. That has a huge performance penalty. So if I'm understanding correctly there's no problem with unaligned DMM buffers if the DSP software is just reading; the problem is when writing data back to ARM. -- Felipe Contreras -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html SASKEN BUSINESS DISCLAIMER - This message may contain confidential, proprietary or legally privileged information. In case you are not the original intended Recipient of the message, you must not, directly or indirectly, use, Disclose, distribute, print, or copy any part of this message and you are requested to delete it and inform the sender. Any views expressed in this message are those of the individual sender unless otherwise stated. Nothing contained in this message shall be construed as an offer or acceptance of any offer by Sasken Communication Technologies Limited (Sasken) unless sent with that express intent and with due authority of Sasken. Sasken has taken enough precautions to prevent the spread of viruses. However the company accepts no liability for any damage caused by any virus transmitted by this email -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: lowmemory android driver not needed?
On Fri, Jan 16, 2009 at 08:16:51PM +0900, KOSAKI Motohiro wrote: As far as I know, embedded guys strong want to lowmem notification mecanism. I think the big server guys also want the same thing :) At least, I and my mem_notify receive multiple contact from embedded and JavaVM developer. (include sun javavm engineer) In ideal, I think linux MM should care this requirement directly. I agree. LSM and driver notifier is easy breakable because these component deeply depend on MM. Agreed. (eg, I developed /dev/mem_notify patch last year. but this patch don't work on 2.6.28 because split-lru patch series totally changed MM reclaim processing.) Unfortunately, we don't have any consensus of memory notification requirement. various people have various requirement. so, if I can discuss it and we get consensus, I'm glad. Care to work on your mem_notify patch again and bring it up to date? That would be a good place to start working from, right? thanks, greg k-h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] Fix compile error in usb-musb.c
On Fri, Jan 16, 2009 at 09:37:38AM +0200, Tony Lindgren wrote: * Tony Lindgren t...@atomide.com [090116 09:29]: * Gadiyar, Anand gadi...@ti.com [090115 20:48]: From: Anand Gadiyar gadi...@ti.com Fix this compile error This one should go via the usb list too. Uh, looks like my usb filter is set too sensitive :) This is the platform code part, I'll apply this and queue it up in omap-fixes. I think it's time to send this via greg so we can get musb working on beagle. No otg though due to missing CONFIG_PM for omap3. Any plans to get that upstream ?? Maybe it's better to get PM there first and avoid compile issues without CONFIG_PM=y -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] Fix compile error in usb-musb.c
On Fri, Jan 16, 2009 at 09:37:38AM +0200, Tony Lindgren wrote: * Tony Lindgren t...@atomide.com [090116 09:29]: * Gadiyar, Anand gadi...@ti.com [090115 20:48]: From: Anand Gadiyar gadi...@ti.com Fix this compile error This one should go via the usb list too. Uh, looks like my usb filter is set too sensitive :) This is the platform code part, I'll apply this and queue it up in omap-fixes. I think it's time to send this via greg so we can get musb working on beagle. No otg though due to missing CONFIG_PM for omap3. Any plans to get that upstream ?? Maybe it's better to get PM there first and avoid compile issues without CONFIG_PM=y I still don't get it. Why Greg? It's a one-line compile fix for God's sake - nothing even remotely related to a change in USB - it's platform code that got broken for some reason. And Tony's already going to queue it up. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 02/10] omap mailbox: add initial omap3 support
Hi Hiroshi,
On Fri, Jan 16, 2009 at 10:27:11AM +0200, Hiroshi DOYU wrote:
static inline void omap_init_mbox(void)
{
+ if (cpu_is_omap2420()) {
+ mbox_device.num_resources = ARRAY_SIZE(omap2_mbox_resources);
+ mbox_device.resource = omap2_mbox_resources;
+ } else if (cpu_is_omap3430()) {
+ mbox_device.num_resources = ARRAY_SIZE(omap3_mbox_resources);
+ mbox_device.resource = omap3_mbox_resources;
+ } else {
how about a pr_info() or pr_err() here ?? Something like:
pr_err(%s: platform not supported yet\n, __func__);
+ return;
+ }
platform_device_register(mbox_device);
}
#else
static inline void omap_init_mbox(void) { }
-#endif
+#endif /* CONFIG_OMAP_MBOX_FWK */
#if defined(CONFIG_OMAP_STI)
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 0609e2d..3176bb7 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -30,7 +30,7 @@
#define MAILBOX_IRQ_NEWMSG(u)(1 (2 * (u)))
#define MAILBOX_IRQ_NOTFULL(u) (1 (2 * (u) + 1))
-static unsigned long mbox_base;
+static void __iomem *mbox_base;
struct omap_mbox2_fifo {
unsigned long msg;
@@ -52,14 +52,14 @@ static struct clk *mbox_ick_handle;
static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq);
-static inline unsigned int mbox_read_reg(unsigned int reg)
+static inline unsigned int mbox_read_reg(size_t ofs)
{
- return __raw_readl(mbox_base + reg);
+ return __raw_readl(mbox_base + ofs);
}
-static inline void mbox_write_reg(unsigned int val, unsigned int reg)
+static inline void mbox_write_reg(u32 val, size_t ofs)
{
- __raw_writel(val, mbox_base + reg);
+ __raw_writel(val, mbox_base + ofs);
}
/* Mailbox H/W preparations */
@@ -208,7 +208,7 @@ struct omap_mbox mbox_dsp_info = {
};
EXPORT_SYMBOL(mbox_dsp_info);
-/* IVA */
+#if defined(CONFIG_ARCH_OMAP2420) /* IVA */
would be nice to have something like if (cpu_has_iva()) { ... } and move
this check to a later location e.g. on probe(), but this wouldn't prevent
this patch from going in now. Just a suggestion for later improvements.
static struct omap_mbox2_priv omap2_mbox_iva_priv = {
.tx_fifo = {
.msg= MAILBOX_MESSAGE(2),
@@ -229,17 +229,12 @@ static struct omap_mbox mbox_iva_info = {
.ops= omap2_mbox_ops,
.priv = omap2_mbox_iva_priv,
};
+#endif
[snip]
- /* IVA IRQ */
- res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
- if (unlikely(!res)) {
- dev_err(pdev-dev, invalid irq resource\n);
- return -ENODEV;
+ if (ret)
+ goto err_dsp;
+
+#if defined(CONFIG_ARCH_OMAP2420) /* IVA */
+ if (cpu_is_omap2420()) {
+ /* IVA IRQ */
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
platform_get_irq(pdev, 0) would look more standard, I think.
--
balbi
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[PATCH 0/3v4] Add support for OMAP35x processors
These patches provide support for the OMAP35x processors. I have tried to address the comments received in the recent discussions. Specifically: - Variants of OMAP35x are detected run-time - OMAP35x would build for OMAP3430 SDP as well. Any minor incompatibilities can be addressed separately. I have still not made updates for Beagle, Overo and Pandora boards. Will do so, once these changes get green signal. Best regards, Sanjeev Sanjeev Premi (3): Add support for OMAP35x processors Runitme check for OMAP35x Updates for OMAP3EVM arch/arm/configs/omap3_evm_defconfig |1 + arch/arm/mach-omap2/Kconfig | 28 -- arch/arm/mach-omap2/board-omap3evm.c |2 +- arch/arm/mach-omap2/id.c | 90 -- arch/arm/plat-omap/common.c | 19 ++ arch/arm/plat-omap/include/mach/common.h |1 + arch/arm/plat-omap/include/mach/cpu.h| 88 - 7 files changed, 203 insertions(+), 26 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3v4] Add support for OMAP35x processors
This patch adds basic support for the OMAP35x Applications Processors: OMAP3503, OMAP3515, OMAP3525 and OMAP3530 (See: http://focus.ti.com/general/docs/gencontent.tsp?contentId=46725) Signed-off-by: Sanjeev Premi pr...@ti.com --- arch/arm/mach-omap2/Kconfig | 28 +++- 1 files changed, 23 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 0a86a88..1362830 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -28,6 +28,23 @@ config ARCH_OMAP3430 select ARCH_OMAP_OTG select CPU_V7 +config ARCH_OMAP35XX + bool OMAP35x Family + select ARCH_OMAP3 + select ARCH_OMAP34XX + select ARCH_OMAP3430 + select NEON + help + OMAP35x family of processors based on ARM Cortex-A8 + in combination with IVA2.2 core and OpenGL ES2.0 + compatible graphics engine. + OMAP3503 - ARM Cortex-A8 + OMAP3515 - ARM Cortex-A8 + SGX + OMAP3525 - ARM Cortex-A8 + IVA2.2 + OMAP3530 - ARM Cortex-A8 + IVA2.2 + SGX + + ARM Cortex-A8 contains NEON SIMD coprocessor. + comment OMAP Board Type depends on ARCH_OMAP2 || ARCH_OMAP3 @@ -105,21 +122,21 @@ config MACH_OMAP_2430SDP bool OMAP 2430 SDP board depends on ARCH_OMAP2 ARCH_OMAP2430 -config MACH_OMAP_LDP - bool OMAP3 LDP board - depends on ARCH_OMAP3 ARCH_OMAP34XX - config MACH_OMAP2EVM bool OMAP 2530 EVM board depends on ARCH_OMAP2 ARCH_OMAP24XX +config MACH_OMAP_LDP + bool OMAP3 LDP board + depends on ARCH_OMAP3 ARCH_OMAP34XX + config MACH_OMAP_3430SDP bool OMAP 3430 SDP board depends on ARCH_OMAP3 ARCH_OMAP34XX config MACH_OMAP3EVM bool OMAP 3530 EVM board - depends on ARCH_OMAP3 ARCH_OMAP34XX + depends on ARCH_OMAP35XX config MACH_OMAP3_BEAGLE bool OMAP3 BEAGLE board @@ -132,3 +149,4 @@ config MACH_OVERO config MACH_OMAP3_PANDORA bool OMAP3 Pandora depends on ARCH_OMAP3 ARCH_OMAP34XX + -- 1.5.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3v4] Runtime check for OMAP35x
Added runtime check via omap2_set_globals_35xx()
Also added runtime check for the OMAP35x variants.
Signed-off-by: Sanjeev Premi pr...@ti.com
---
arch/arm/mach-omap2/id.c | 90 --
arch/arm/plat-omap/common.c | 19 ++
arch/arm/plat-omap/include/mach/common.h |1 +
arch/arm/plat-omap/include/mach/cpu.h| 88 -
4 files changed, 178 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 2c5e0a3..5815c33 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -152,9 +152,11 @@ void __init omap24xx_check_revision(void)
pr_info(\n);
}
+#define OMAP_CTRL_STATUS OMAP2_IO_ADDRESS(0x4800244C)
+
void __init omap34xx_check_revision(void)
{
- u32 cpuid, idcode;
+ u32 cpuid, idcode, ctrl_status;
u16 hawkeye;
u8 rev;
char *rev_name = ES1.0;
@@ -180,24 +182,76 @@ void __init omap34xx_check_revision(void)
hawkeye = (idcode 12) 0x;
rev = (idcode 28) 0xff;
+ /*
+* The OMAP35x family was derived off the OMAP34xx ES2.0 Si.
+* Added specific check for the OMAP35x family here.
+*/
+
if (hawkeye == 0xb7ae) {
- switch (rev) {
- case 0:
- omap_revision = OMAP3430_REV_ES2_0;
- rev_name = ES2.0;
- break;
- case 2:
- omap_revision = OMAP3430_REV_ES2_1;
- rev_name = ES2.1;
- break;
- case 3:
- omap_revision = OMAP3430_REV_ES3_0;
- rev_name = ES3.0;
- break;
- default:
- /* Use the latest known revision as default */
- omap_revision = OMAP3430_REV_ES3_0;
- rev_name = Unknown revision\n;
+ if (cpu_is_omap35xx()) {
+ omap_revision = OMAP35XX_CLASS ;
+
+ /*
+* Get the chip ID
+*/
+ ctrl_status = __raw_readl(OMAP_CTRL_STATUS);
+
+ switch (ctrl_status) {
+ case 0x05C00 :
+ omap_revision |= OMAP3503_MASK;
+ break;
+ case 0x01C00 :
+ omap_revision |= OMAP3515_MASK;
+ break;
+ case 0x04C00 :
+ omap_revision |= OMAP3525_MASK;
+ break;
+ case 0x00C00 :
+ omap_revision |= OMAP3530_MASK;
+ break;
+ }
+
+ /*
+* Get the silicon version information
+*/
+ switch (rev) {
+ case 1:
+ omap_revision |= OMAP35XX_MASK_ES2_0;
+ rev_name = ES2.0;
+ break;
+ case 2:
+ omap_revision |= OMAP35XX_MASK_ES2_1;
+ rev_name = ES2.1;
+ break;
+ case 3:
+ omap_revision |= OMAP35XX_MASK_ES3_0;
+ rev_name = ES3.0;
+ break;
+ default:
+ /* Use the latest known revision as default */
+ omap_revision |= OMAP35XX_MASK_ES3_0;
+ rev_name = Unknown revision\n;
+ }
+ }
+ else {
+ switch (rev) {
+ case 0:
+ omap_revision = OMAP3430_REV_ES2_0;
+ rev_name = ES2.0;
+ break;
+ case 2:
+ omap_revision = OMAP3430_REV_ES2_1;
+ rev_name = ES2.1;
+ break;
+ case 3:
+ omap_revision = OMAP3430_REV_ES3_0;
+ rev_name = ES3.0;
+ break;
+ default:
+ /* Use the latest known revision as default */
+ omap_revision = OMAP3430_REV_ES3_0;
+ rev_name = Unknown revision\n;
+ }
}
}
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 8c53125..1056d3d 100644
--- a/arch/arm/plat-omap/common.c
+++
[PATCH 3/3v4] Updates for OMAP3EVM
Includes:
- Updates to default board configuration.
- Call function omap2_set_globals_35xx()
Signed-off-by: Sanjeev Premi pr...@ti.com
---
arch/arm/configs/omap3_evm_defconfig |1 +
arch/arm/mach-omap2/board-omap3evm.c |2 +-
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/configs/omap3_evm_defconfig
b/arch/arm/configs/omap3_evm_defconfig
index f276c3a..6f67996 100644
--- a/arch/arm/configs/omap3_evm_defconfig
+++ b/arch/arm/configs/omap3_evm_defconfig
@@ -206,6 +206,7 @@ CONFIG_OMAP_LL_DEBUG_UART1=y
CONFIG_OMAP_SERIAL_WAKE=y
CONFIG_ARCH_OMAP34XX=y
CONFIG_ARCH_OMAP3430=y
+CONFIG_ARCH_OMAP35XX=y
#
# OMAP Board Type
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index e4e60e2..7fb3eef 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -264,7 +264,7 @@ static void __init omap3_evm_init(void)
static void __init omap3_evm_map_io(void)
{
- omap2_set_globals_343x();
+ omap2_set_globals_35xx();
omap2_map_common_io();
}
--
1.5.6
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OMAP3 SDP support in mainline
Tony, Are there any plans to get 3430SDP support in mainline? - Anand-- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] Fix compile error in usb-musb.c
On Fri, Jan 16, 2009 at 09:08:57PM +0530, Gadiyar, Anand wrote: I still don't get it. Why Greg? It's a one-line compile fix for God's sake - nothing even remotely related to a change in USB - it's platform code that got broken for some reason. And Tony's already going to queue it up. I'm talking about pushing the whole file via musb patches ;-) -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Beagle defconfig broken in mainline
I'm not sure if this has been reported before. I just tried compiling mainline for the beagleboard and got this error. - Anand CC arch/arm/mach-omap2/board-omap3beagle.o arch/arm/mach-omap2/board-omap3beagle.c: In function 'beagle_twl_gpio_setup': arch/arm/mach-omap2/board-omap3beagle.c:132: error: 'TWL4030_GPIO_MAX' undeclared (first use in this function) arch/arm/mach-omap2/board-omap3beagle.c:132: error: (Each undeclared identifier is reported only once arch/arm/mach-omap2/board-omap3beagle.c:132: error: for each function it appears in.) arch/arm/mach-omap2/board-omap3beagle.c: At top level: arch/arm/mach-omap2/board-omap3beagle.c:141: error: variable 'beagle_gpio_data' has initializer but incomplete type arch/arm/mach-omap2/board-omap3beagle.c:142: error: unknown field 'gpio_base' specified in initializer arch/arm/mach-omap2/board-omap3beagle.c:142: warning: excess elements in struct initializer arch/arm/mach-omap2/board-omap3beagle.c:142: warning: (near initialization for 'beagle_gpio_data') arch/arm/mach-omap2/board-omap3beagle.c:143: error: unknown field 'irq_base' specified in initializer arch/arm/mach-omap2/board-omap3beagle.c:143: warning: excess elements in struct initializer arch/arm/mach-omap2/board-omap3beagle.c:143: warning: (near initialization for 'beagle_gpio_data') arch/arm/mach-omap2/board-omap3beagle.c:144: error: unknown field 'irq_end' specified in initializer arch/arm/mach-omap2/board-omap3beagle.c:144: warning: excess elements in struct initializer arch/arm/mach-omap2/board-omap3beagle.c:144: warning: (near initialization for 'beagle_gpio_data') arch/arm/mach-omap2/board-omap3beagle.c:145: error: unknown field 'use_leds' specified in initializer arch/arm/mach-omap2/board-omap3beagle.c:145: warning: excess elements in struct initializer arch/arm/mach-omap2/board-omap3beagle.c:145: warning: (near initialization for 'beagle_gpio_data') arch/arm/mach-omap2/board-omap3beagle.c:146: error: unknown field 'pullups' specified in initializer arch/arm/mach-omap2/board-omap3beagle.c:146: warning: excess elements in struct initializer arch/arm/mach-omap2/board-omap3beagle.c:146: warning: (near initialization for 'beagle_gpio_data') arch/arm/mach-omap2/board-omap3beagle.c:147: error: unknown field 'pulldowns' specified in initializer arch/arm/mach-omap2/board-omap3beagle.c:148: warning: excess elements in struct initializer arch/arm/mach-omap2/board-omap3beagle.c:148: warning: (near initialization for 'beagle_gpio_data') arch/arm/mach-omap2/board-omap3beagle.c:149: error: unknown field 'setup' specified in initializer arch/arm/mach-omap2/board-omap3beagle.c:149: warning: excess elements in struct initializer arch/arm/mach-omap2/board-omap3beagle.c:149: warning: (near initialization for 'beagle_gpio_data') arch/arm/mach-omap2/board-omap3beagle.c:152: error: variable 'beagle_twldata' has initializer but incomplete type arch/arm/mach-omap2/board-omap3beagle.c:153: error: unknown field 'irq_base' specified in initializer arch/arm/mach-omap2/board-omap3beagle.c:153: warning: excess elements in struct initializer arch/arm/mach-omap2/board-omap3beagle.c:153: warning: (near initialization for 'beagle_twldata') arch/arm/mach-omap2/board-omap3beagle.c:154: error: unknown field 'irq_end' specified in initializer arch/arm/mach-omap2/board-omap3beagle.c:154: warning: excess elements in struct initializer arch/arm/mach-omap2/board-omap3beagle.c:154: warning: (near initialization for 'beagle_twldata') arch/arm/mach-omap2/board-omap3beagle.c:157: error: unknown field 'gpio' specified in initializer arch/arm/mach-omap2/board-omap3beagle.c:157: warning: excess elements in struct initializer arch/arm/mach-omap2/board-omap3beagle.c:157: warning: (near initialization for 'beagle_twldata') arch/arm/mach-omap2/board-omap3beagle.c: In function 'omap3_beagle_init': arch/arm/mach-omap2/board-omap3beagle.c:308: error: 'gpio' undeclared (first use in this function) make[1]: *** [arch/arm/mach-omap2/board-omap3beagle.o] Error 1 make: *** [arch/arm/mach-omap2] Error 2-- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] Fix compile error in usb-musb.c
On Fri, Jan 16, 2009 at 09:08:57PM +0530, Gadiyar, Anand wrote: I still don't get it. Why Greg? It's a one-line compile fix for God's sake - nothing even remotely related to a change in USB - it's platform code that got broken for some reason. And Tony's already going to queue it up. I'm talking about pushing the whole file via musb patches ;-) Oh, ok. Sorry. - Anand -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Reading OMAP3 CONTROL_RAND_KEY_0 register hangs
Woodruff, Richard wrote: With OMAP3530 on BeagleBoard we like to read OMAP3's CONTROL_RAND_KEY_0 (0x4800 2318) register with something like printf (attempting cpu_uid read\n); u32 cpu_uid = *((u32 *) 0x48002318); /* u32 cpu_uid = readl(ctrl_base-randkey_0); */ printf (cpu_uid read done\n); This address is not accessible out side of secure mode along with some other qualifiers. Trying to access is futile and will result in an abort. The control register range is full of readable and aborting addresses. Is there any hint in TRM (spruf98b.pdf) identifying/marking which registers are readable in normal and which are only accessible in secure mode? Thanks Dirk -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] Wait for SDRC ready iso a blind delay
This patch improves the wakeup SRAM code polling the SDRC to become ready
instead of just waiting for a fixed amount of time.
Now with signoff :)
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/sleep34xx.S | 51 +--
1 files changed, 38 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 0c33e30..33ee85b 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -30,6 +30,7 @@
#include mach/pm.h
#include mach/control.h
+#include cm.h
#include prm.h
#include sdrc.h
@@ -38,6 +39,8 @@
#define PM_PREPWSTST_CORE_P0x48306AE8
#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \
OMAP3430_PM_PREPWSTST)
+#define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1)
+
/*
* This is the physical address of the register as specified
* by the _P. To be used while the MMU is still disabled.
@@ -57,6 +60,8 @@
#define SDRC_MR_1_P(OMAP343X_SDRC_BASE + SDRC_MR_1)
#define SDRC_EMR2_1_P (OMAP343X_SDRC_BASE + SDRC_EMR2_1)
#define SDRC_MANUAL_1_P(OMAP343X_SDRC_BASE + SDRC_MANUAL_1)
+#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
+#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
.text
/* Function call to get the restore pointer for resume from OFF */
@@ -192,7 +197,7 @@ loop:
nop
nop
nop
- bl i_dll_wait
+ bl wait_sdrc_ok
ldmfd sp!, {r0-r12, pc} @ restore regs and return
restore_es3:
@@ -651,21 +656,41 @@ skip_l2_inval:
nop
nop
nop
- bl i_dll_wait
+ bl wait_sdrc_ok
/* restore regs and return */
ldmfd sp!, {r0-r12, pc}
-i_dll_wait:
- ldr r4, clk_stabilize_delay
-
-i_dll_delay:
- subsr4, r4, #0x1
- bne i_dll_delay
- ldr r4, sdrc_power
- ldr r5, [r4]
- bic r5, r5, #0x40
- str r5, [r4]
- bx lr
+/* Make sure SDRC accesses are ok */
+wait_sdrc_ok:
+ldr r4, cm_idlest1_core
+ldr r5, [r4]
+and r5, r5, #0x2
+cmp r5, #0
+bne wait_sdrc_ok
+ldr r4, sdrc_power
+ldr r5, [r4]
+bic r5, r5, #0x40
+str r5, [r4]
+wait_dll_lock:
+/* Is dll in lock mode? */
+ldr r4, sdrc_dlla_ctrl
+ldr r5, [r4]
+tst r5, #0x4
+bxnelr
+/* wait till dll locks */
+ldr r4, sdrc_dlla_status
+ldr r5, [r4]
+and r5, r5, #0x4
+cmp r5, #0x4
+bne wait_dll_lock
+bx lr
+
+cm_idlest1_core:
+ .word CM_IDLEST1_CORE_V
+sdrc_dlla_status:
+ .word SDRC_DLLA_STATUS_V
+sdrc_dlla_ctrl:
+ .word SDRC_DLLA_CTRL_V
pm_prepwstst_core:
.word PM_PREPWSTST_CORE_V
pm_prepwstst_core_p:
--
1.5.6.3
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Re: new PM branch available
Nayak, Rajendra rna...@ti.com writes: I did some testing today on my 3.0GP 3430SDP. This is with the omap_3430sdp_min_defconfig. 1) Idle. echo -n 1 /sys/power/clocks_off_while_idle echo -n 1 /sys/power/enable_off Could not hit RET. something seems to be still active. Not sure if it could be something to do with this error that's thrown while bootup 6Disabling unused clock dpll5_ck Disabling unused clock dpll5_ck 3clock: dpll5_ck failed transition to 'locked' clock: dpll5_ck failed transition to 'locked' This is the same results I see on my SDP. Looking at the registers, I am pretty sure it is the D2D clockdomain that still has activity, but due to very poor Stacked-mode docs and no responses to the D2D questions asked to TI I have not been able to figure this one out. Help debugging this would be greatly appreciated. Further doing a echo -n 1 /sys/power/sleep_while_idle causes a hang after the 5 odd secs of UART inactivity. Is'nt this option supposed to affect only the suspend path behavior? No, this affects the common idle loop, with and without CPUidle. Is CPUidle disabled in the default defconfig now? 2) Suspend echo -n 1 /sys/power/clocks_off_while_idle Hangs on a echo mem /sys/power/state Goes into suspend, but cannot recover I'm pretty sure all the hangs going into RET are related. Kevin 3) DVFS Both VDD1 and VDD2 DVFS seem to function fine. -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Kevin Hilman Sent: Wednesday, January 14, 2009 3:22 AM To: linux-omap@vger.kernel.org Subject: new PM branch available Hello, The latest PM branch is now available[1]. I've done basic testing of retention and off-mode (suspend and dynamic idle) on Beagle and custom HW. My SDP has something still keeping CORE active that others have not seen, but I have yet to debug. Any other reports from SDP testing would be appreciated. Notable changes/updates - rebased on latest clock updates and fixes from Paul - clockfw pre- and post- notifiers - DVFS for VDD2 Full git shortlog below[2] Enjoy, Kevin [1] See branch 'pm' in my git repo: git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-om ap-pm.git which is also mirrored as the branch 'pm' of the normal linux-omap repo (but will not sync until 03:30 GMT) [2] git shortlog: Carlos Chinea (1): OMAP3:PM: Update SSI omapdev record Jouni Hogander (5): OMAP3: PM: Use pwrdm_set_next_pwrst instead of set_pwrdm_state in idle loop OMAP3: PM: Fix wrong sequence in suspend. OMAP3: PM: Do not build suspend code if SUSPEND is not enabled OMAP: PM: Build fails if PM is not enabled OMAP2: PM: Fix omap2 build Kalle Jokiniemi (3): OMAP: PM: sysfs interface for enabling voltage off in idle OMAP3: PM: Fix cpu idle init sequencing OMAP: SRF: Fixes to shared resource framework (Ver.3) Kevin Hilman (4): OMAP3: PM: CPUidle: obey enable_off_mode flag OMAP3: PM: CPUidle: restrict C-states on UART activity OMAP3: PM: decouple PER and CORE context save and restore OMAP2/3: PM: system_rev - omap_rev() Paul Walmsley (29): OMAP2/3 clock: implement clock notifier infrastructure OMAP clock: add notifier infrastructure OMAP2/3 clock: store planned clock rates into temporary rate storage OMAP2/3 clock: add clk post-rate-change notifiers OMAP2/3 clock: add clock pre-rate-change notification OMAP2/3 clock: add clock prepare-rate-change notifications OMAP2/3 clock: add clock abort-rate-change notifications OMAP2/3 PM: create the OMAP PM interface and add a default OMAP PM no-op layer. OMAP2/3 omapdev: add basic omapdev structure OMAP242x omapdev: add OMAP242x omapdev records OMAP243x omapdev: add OMAP243x omapdev records OMAP3xxx omapdev: add OMAP3xxx omapdev records OMAP2/3 omapdev: add code to walk the omapdev records ARM: MMU: add a Non-cacheable Normal executable memory type OMAP3 SRAM: mark OCM RAM as Non-cacheable Normal memory OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpll OMAP3 clock: add interconnect barriers to CORE DPLL M2 change OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change OMAP3 SDRC: Add 166MHz, 83MHz SDRC settings for the BeagleBoard OMAP3 SDRC: initialize SDRC_POWER at boot OMAP3 SRAM: renumber registers to make space for argument passing OMAP3 clock: only unlock SDRC DLL if SDRC clk 83MHz OMAP3 clock: use pr_debug() rather than pr_info() in some clock change code OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize OMAP3 clock: initialize SDRC timings at kernel start OMAP3 clock: add a short delay when lowering CORE clk rate OMAP3 clock/SDRC: program SDRC_MR register during SDRC
[PATCH] n800-bt: include board-nokia.h
Fixes compilation error:
arch/arm/mach-omap2/board-n800-bt.c: In function 'n800_bt_init':
arch/arm/mach-omap2/board-n800-bt.c:36: error: 'OMAP_TAG_NOKIA_BT' undeclared
(first use in this function)
arch/arm/mach-omap2/board-n800-bt.c:36: error: (Each undeclared identifier is
reported only once
arch/arm/mach-omap2/board-n800-bt.c:36: error: for each function it appears in.)
arch/arm/mach-omap2/board-n800-bt.c:36: error: invalid application of 'sizeof'
to incomplete type 'struct omap_bluetooth_config'
Signed-off-by: Kalle Valo kalle.v...@nokia.com
---
arch/arm/mach-omap2/board-n800-bt.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-n800-bt.c
b/arch/arm/mach-omap2/board-n800-bt.c
index 61afd2b..da3a7bb 100644
--- a/arch/arm/mach-omap2/board-n800-bt.c
+++ b/arch/arm/mach-omap2/board-n800-bt.c
@@ -22,6 +22,7 @@
#include linux/kernel.h
#include linux/platform_device.h
#include mach/board.h
+#include mach/board-nokia.h
static struct platform_device n800_bt_device = {
.name = hci_h4p,
--
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Question on how to best access a chip on init that needs VAUX1 power?
On the OMAP board I have, I want to access production information (model, serial number, MAC addresses, etc), and the part requires 3v which is powered off of VAUX1. I need to pull this out at initialization time, but I have to wait until the twl4030 driver is running or I get twl4030: client 3 is not initialized when I try to turn on the power. Looking at the twl4030-core.c code, I see its invoked via initcall_subsys(). I'd like to have my code invoked before the other devices come up (so I can provide a MAC address to the ethernet, etc). I'm trying initcall_sysbys_sync() to have my code called after the twl4040 initializes, but before the devices come up. Is the the right way to approach this? -- Peter Barada pet...@logicpd.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: Question on how to best access a chip on init that needs VAUX1 power?
Subject: Question on how to best access a chip on init that needs VAUX1 power? On the OMAP board I have, I want to access production information (model, serial number, MAC addresses, etc), and the part requires 3v which is powered off of VAUX1. I need to pull this out at initialization time, but I have to wait until the twl4030 driver is running or I get twl4030: client 3 is not initialized when I try to turn on the power. Looking at the twl4030-core.c code, I see its invoked via initcall_subsys(). I'd like to have my code invoked before the other devices come up (so I can provide a MAC address to the ethernet, etc). I'm trying initcall_sysbys_sync() to have my code called after the twl4040 initializes, but before the devices come up. You can access this info from u-boot with i2c api. For development you want the mac address available at that time anyway. When you program it into Ethernet chip for many it will stick so kernel will see the right thing. u-boot also has simple utility to read from mtd which has u-boot environment where you could have stored it away. Regards, Richard W. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: Question on how to best access a chip on init that needs VAUX1 power?
On Fri, 2009-01-16 at 14:17 -0600, Woodruff, Richard wrote: Subject: Question on how to best access a chip on init that needs VAUX1 power? On the OMAP board I have, I want to access production information (model, serial number, MAC addresses, etc), and the part requires 3v which is powered off of VAUX1. I need to pull this out at initialization time, but I have to wait until the twl4030 driver is running or I get twl4030: client 3 is not initialized when I try to turn on the power. Looking at the twl4030-core.c code, I see its invoked via initcall_subsys(). I'd like to have my code invoked before the other devices come up (so I can provide a MAC address to the ethernet, etc). I'm trying initcall_sysbys_sync() to have my code called after the twl4040 initializes, but before the devices come up. You can access this info from u-boot with i2c api. For development you want the mac address available at that time anyway. When you program it into Ethernet chip for many it will stick so kernel will see the right thing. That is if I initialize the ethernet in u-boot. To save on power, I'd like to leave the ethernet alone until the user needs it(and at that point can modprobe the driver). I still need the data to setup wireless in the kernel (its mac address, trim values, etc)... u-boot also has simple utility to read from mtd which has u-boot environment where you could have stored it away. Ultimately I should just pull the block of data in u-boot, extract what I need for u-boot, and then pass it to the kernel. Outside of creating a specific ATAG for this, what's the best way to pass a block of data from u-boot to the kernel? Regards, Richard W. -- Peter Barada pet...@logicpd.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Question on how to best access a chip on init that needs VAUX1 power?
On Friday 16 January 2009, Peter Barada wrote: I'm trying initcall_sysbys_sync() to have my code called after the twl4040 initializes, but before the devices come up. Is the the right way to approach this? Well, subsys_initcall() ... that should work. Declare the VAUX1 regulator in the normal way, and you can either hook up VAUX1 to the relevant device node and have it turn on the regulator, or just mark it as always_on. - Dave -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: Question on how to best access a chip on init that needs VAUX1 power?
u-boot also has simple utility to read from mtd which has u-boot environment where you could have stored it away. Ultimately I should just pull the block of data in u-boot, extract what I need for u-boot, and then pass it to the kernel. Outside of creating a specific ATAG for this, what's the best way to pass a block of data from u-boot to the kernel? Outside of ATAG I don't know what the best way is. There were some omap specific tags which were recently deemed not the right way. You should inquire on u-boot list and see what some of the ports there do. As a thought the on chip SRAM would provide an easy way to pass the information up. Regards, Richard W. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Question on how to best access a chip on init that needs VAUX1 power?
On Friday 16 January 2009, Peter Barada wrote: Ultimately I should just pull the block of data in u-boot, extract what I need for u-boot, and then pass it to the kernel. Outside of creating a specific ATAG for this, what's the best way to pass a block of data from u-boot to the kernel? kernel command line parameters. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] Fix compile error in usb-musb.c
On Friday 16 January 2009, Felipe Balbi wrote: I think it's time to send this via greg so we can get musb working on beagle. No otg though due to missing CONFIG_PM for omap3. Any plans to get that upstream ?? So why not just enable PM=y in the configuration? It's not actually required to do much, beyond not being broken. - Dave -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[OMAPZOOM][PATCH] OMAP3ISP: Fix lsc_initialized flag setting
From 551a60b7f66bdf314702062214345464679e6481 Mon Sep 17 00:00:00 2001
From: Sergio Aguirre saagui...@ti.com
Date: Fri, 16 Jan 2009 16:17:07 -0600
Subject: [PATCH] OMAP3ISP: Fix lsc_initialized flag setting
This patch fixes an incorrect clearing of the lsc_initialized
flag, so when loading an equal or lower size LSC table from abstraction
layer, the flag doesn't get cleared anymore.
The leakage comes because on ispccdc_cleanup(), the unmmap was
conditioned when lsc_initialized was set to 1.
Based on Fix by Margarita Olaya on Internal TI tree.
Signed-off-by: Margarita Olaya magi.ol...@ti.com
Signed-off-by: Sergio Aguirre saagui...@ti.com
---
drivers/media/video/isp/ispccdc.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/media/video/isp/ispccdc.c
b/drivers/media/video/isp/ispccdc.c
index 75a4a06..fab4f72 100644
--- a/drivers/media/video/isp/ispccdc.c
+++ b/drivers/media/video/isp/ispccdc.c
@@ -270,11 +270,12 @@ int omap34xx_isp_ccdc_config(void *userspace_add)
ispccdc_lsc_config)))
goto copy_from_user_err;
down(ispccdc_mutex);
- lsc_initialized = 0;
if (lsc_config.size = old_size)
size_mismatch = 0;
- else
+ else {
size_mismatch = 1;
+ lsc_initialized = 0;
+ }
up(ispccdc_mutex);
ispccdc_config_lsc(lsc_config);
}
--
1.5.6.5
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RE: [PATCH] ARM: OMAP3: Enable writing to XCCR and RCCR McBSP registers for OMAP 2430/34xx
On Thu, 8 Jan 2009, Lopez Cruz, Misael wrote: * Lopez Cruz, Misael x0052...@ti.com [081219 04:53]: This patch enables writing to McBSP Transmit Configuration Control Register (XCCR) and Receive Configuration Control Register (RCCR) for 2430/34xx platforms. It also adds XCCR, RCCR entries in McBSP register configuration structure and bit definitions for both registers. Pushing to l-o. Can you briefly describe what happens with ASoC if these registers are not used? We may be able to send this as a fix to mainline during the -rc cycle. If we enable the writing to those registers for 2430/34xx and don't set the default values (setting 0 as a consequence) in ASoC driver, the Transmit/Receive DMA mode gets disabled and the the transmission/reception doesn't happen, ending with a write error: Input/Output error when playing with 'aplay'. -Misa-- Something is wrong with this patch, at least on Beagle. When starting audio playback, there is a several second pause, then a console message: ALSA sound/core/pcm_native.c:1493: playback drain error (DMA or IRQ trouble?) No audio emerges from the board. With this patch reverted, a very basic audio test here seems to work. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
