[patch-2.6.35-rc4+ 0/4] musb and ehci_omap patches
Greg, These are the bug fix patches recently acked by Felipe except one on ULPI (PATCH 3/4) which is trivial. Thanks, Ajay Ajay Kumar Gupta (3): usb: musb: fix compilation warning in host only mode usb: ulpi: fix compilation warning usb: ehci_omap: fix device detect issue with modules Anand Gadiyar (1): usb: musb: use correct register widths in register dumps drivers/usb/host/ehci-omap.c| 36 drivers/usb/musb/musb_core.c|7 +++ drivers/usb/musb/musb_debugfs.c | 32 include/linux/usb/ulpi.h|1 + 4 files changed, 56 insertions(+), 20 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] usb: musb: use correct register widths in register dumps
From: Anand Gadiyar gadi...@ti.com
DMA_ADDR and DMA_COUNT are 32-bit registers, not 16-bit.
Marking them as 16-bit in the table causes only the lower
16-bits to be dumped and this is misleading.
Signed-off-by: Anand Gadiyar gadi...@ti.com
Acked-by: Felipe Balbi felipe.ba...@nokia.com
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
drivers/usb/musb/musb_debugfs.c | 32
1 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/usb/musb/musb_debugfs.c b/drivers/usb/musb/musb_debugfs.c
index bba76af..c79a5e3 100644
--- a/drivers/usb/musb/musb_debugfs.c
+++ b/drivers/usb/musb/musb_debugfs.c
@@ -92,29 +92,29 @@ static const struct musb_register_map musb_regmap[] = {
{ LS_EOF1,0x7E, 8 },
{ SOFT_RST, 0x7F, 8 },
{ DMA_CNTLch0,0x204, 16 },
- { DMA_ADDRch0,0x208, 16 },
- { DMA_COUNTch0, 0x20C, 16 },
+ { DMA_ADDRch0,0x208, 32 },
+ { DMA_COUNTch0, 0x20C, 32 },
{ DMA_CNTLch1,0x214, 16 },
- { DMA_ADDRch1,0x218, 16 },
- { DMA_COUNTch1, 0x21C, 16 },
+ { DMA_ADDRch1,0x218, 32 },
+ { DMA_COUNTch1, 0x21C, 32 },
{ DMA_CNTLch2,0x224, 16 },
- { DMA_ADDRch2,0x228, 16 },
- { DMA_COUNTch2, 0x22C, 16 },
+ { DMA_ADDRch2,0x228, 32 },
+ { DMA_COUNTch2, 0x22C, 32 },
{ DMA_CNTLch3,0x234, 16 },
- { DMA_ADDRch3,0x238, 16 },
- { DMA_COUNTch3, 0x23C, 16 },
+ { DMA_ADDRch3,0x238, 32 },
+ { DMA_COUNTch3, 0x23C, 32 },
{ DMA_CNTLch4,0x244, 16 },
- { DMA_ADDRch4,0x248, 16 },
- { DMA_COUNTch4, 0x24C, 16 },
+ { DMA_ADDRch4,0x248, 32 },
+ { DMA_COUNTch4, 0x24C, 32 },
{ DMA_CNTLch5,0x254, 16 },
- { DMA_ADDRch5,0x258, 16 },
- { DMA_COUNTch5, 0x25C, 16 },
+ { DMA_ADDRch5,0x258, 32 },
+ { DMA_COUNTch5, 0x25C, 32 },
{ DMA_CNTLch6,0x264, 16 },
- { DMA_ADDRch6,0x268, 16 },
- { DMA_COUNTch6, 0x26C, 16 },
+ { DMA_ADDRch6,0x268, 32 },
+ { DMA_COUNTch6, 0x26C, 32 },
{ DMA_CNTLch7,0x274, 16 },
- { DMA_ADDRch7,0x278, 16 },
- { DMA_COUNTch7, 0x27C, 16 },
+ { DMA_ADDRch7,0x278, 32 },
+ { DMA_COUNTch7, 0x27C, 32 },
{ }/* Terminating Entry */
};
--
1.6.2.4
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[PATCH 2/4] usb: musb: fix compilation warning in host only mode
Fixes below compilation warning when host only configuration is
selected.
drivers/usb/musb/musb_core.c: In function 'musb_stage0_irq':
drivers/usb/musb/musb_core.c:711: warning: unused variable 'mbase'
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Acked-by: Felipe Balbi felipe.ba...@nokia.com
---
drivers/usb/musb/musb_core.c |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 3b795c5..540c766 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -704,7 +704,6 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8
int_usb,
#ifdef CONFIG_USB_MUSB_HDRC_HCD
if (int_usb MUSB_INTR_CONNECT) {
struct usb_hcd *hcd = musb_to_hcd(musb);
- void __iomem *mbase = musb-mregs;
handled = IRQ_HANDLED;
musb-is_active = 1;
@@ -717,9 +716,9 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8
int_usb,
if (is_peripheral_active(musb)) {
/* REVISIT HNP; just force disconnect */
}
- musb_writew(mbase, MUSB_INTRTXE, musb-epmask);
- musb_writew(mbase, MUSB_INTRRXE, musb-epmask 0xfffe);
- musb_writeb(mbase, MUSB_INTRUSBE, 0xf7);
+ musb_writew(musb-mregs, MUSB_INTRTXE, musb-epmask);
+ musb_writew(musb-mregs, MUSB_INTRRXE, musb-epmask 0xfffe);
+ musb_writeb(musb-mregs, MUSB_INTRUSBE, 0xf7);
#endif
musb-port1_status = ~(USB_PORT_STAT_LOW_SPEED
|USB_PORT_STAT_HIGH_SPEED
--
1.6.2.4
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Re: [PATCH 11/15] wireless: wl1271: introduce platform device support
On 07/07/2010 04:52 PM, ext Nicolas Pitre wrote: On Wed, 7 Jul 2010, Roger Quadros wrote: On 07/06/2010 08:42 PM, ext Nicolas Pitre wrote: On Tue, 6 Jul 2010, Roger Quadros wrote: OK, this is how I see it. - Treat the non-removable card as non-removable. So no need to do card detect emulation. - Treat the GPIO power enable on wl1271 as VMMC supply. Use fixed regulator framework to define this regulator supply. Even though you mention that it is not actually a supply, it fits well in the fixed supply framework. - When the host controller is enumerated, the mmc core will power up the slot, find the sdio card, and probe the function driver (i.e. wl1271_sdio). - if interface is not in use, the function driver must release the sdio host, and this should eventually disable the vmmc supply. - Whenever the wlan interface must be brought up, wl1271_sdio, can claim the sdio host. this will cause the vmmc supply to be enabled, for as long as the interface is up. Does this address all issues? This is mostly all good, except that claiming/releasing the SDIO host is about access to the bus. It must be claimed right before doing any IO, and released right after that, even when the card is expected to remain powered. This is not the proper place to hook power control. Agreed, but is it so that SDIO power may be removed between a host_release and claim? This appears so from omap_hsmmc host controller. No, it is not because a host is not claimed that power should be dropped. The host claim/release is meant to provide exclusive access to the card that's all. If the OMAP controller is dropping power to the card upon host-disable() then it is wrong. AFAICS only the OMAP controller is playing such games at the moment and I suspect the semantics might not be all right. Shutting down the _controller_ when it is idle might be a good thing, but not power to the _card_. Only the function driver might know when it is fine to lose power. I completely agree with you Nicolas. omap_hsmmc needs to be fixed so that it does not control MMC/SDIO slot supply voltage. It should deal with only the mmc controller power savings and not the card/function power savings. regards, -roger -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/9 v3] omap: generic: introduce a single check_revision
Hi, On Wed, Jul 07, 2010 at 07:24:16PM +0200, ext Nishanth Menon wrote: I am not sure.. if you would like drivers to be modprobabe, there may be quirks that you'd want to enable based on cpu_is_omapxxx checks. so it probably does not make sense to __initdata the revision/feature variables. can't you pass the quirks via pdata, then ? -- balbi DefectiveByDesign.org -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/9] omap: improve OMAP3_HAS_FEATURE
* Nishanth Menon n...@ti.com [100707 16:44]:
overall, we will face this in the future. there are OMAP generic
features and OMAP family specific features. currently OMAP3 has
34xx, 35xx series and 3630 and 37xx series. in future we may see
similar things for OMAP4+ as well.. we need a differentiator when it
comes to omap3 specific features Vs omap generic feature.
Sounds it will get more complex.. We should probably set it up
with something like this then:
#define FEAT_MPU_L2_OUTERBIT(1)
#define FEAT_MPU_L2 BIT(0)
...
#define FEAT_IVA2BIT(1)
#define FEAT_IVA BIT(0)
...
#define FEAT_L3_192 BIT(0)
...
struct omap_feature {
u32 mpu;/* MPU features */
u32 iva;/* IVA features */
u32 l3_max_clk;
...
};
I think I understand your intent here is to introduce per IP based
feature - that is really not necessary yet (we dont really have a
usecase needing this level of complexity yet). it will be a natural
evolution when we need to have such a feature handling.
But we already have a problem where we need to check for various
revisions and features and use cpu_is_omap. It would be nice to
just call omap_has_feature without having to worry about which omap
it is.
currently a need for errata handling per ip is required, and we have
a mechanism (quirks) to handle it on a IP basis. here the intent was
to identify OMAP specific features in some common way.
OK. I'll post an experimental series shortly, let's see if that
works for you.
Regards,
Tony
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[RFC 0/5] Introduce omap_has_feature
Hi, Here's a quick experimental patches on testing features with omap_has_feature as discussed based on earlier patches by Nishant Menon. These still need to be thought through a bit on how we want to implement it. Regards, Tony --- Nishanth Menon (1): omap2/3: id: fix sparse warning Tony Lindgren (4): omap: Implement common omap_has_feature omap: Replace omap3_has_ macros with omap_has_feature omap: Remove old omap3_has_ macros omap: Allow testing for omap type with omap_has_feature arch/arm/mach-omap2/clock3xxx_data.c |2 - arch/arm/mach-omap2/id.c | 70 +++-- arch/arm/mach-omap2/pm34xx.c |2 - arch/arm/plat-omap/common.c | 15 +++ arch/arm/plat-omap/include/plat/cpu.h | 69 ++--- 5 files changed, 104 insertions(+), 54 deletions(-) -- Signature -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/5] omap2/3: id: fix sparse warning
From: Nishanth Menon n...@ti.com
omap24xx_check_revision, omap3_check_features,
omap3_check_revision, omap4_check_revision, omap3_cpuinfo
are not used elsewhere, it should be static
Also fixes the following sparse warnings:
arch/arm/mach-omap2/id.c:105:13: warning: symbol 'omap24xx_check_revision' was
not declared. Should it be static?
arch/arm/mach-omap2/id.c:167:13: warning: symbol 'omap3_check_features' was not
declared. Should it be static?
arch/arm/mach-omap2/id.c:189:13: warning: symbol 'omap3_check_revision' was not
declared. Should it be static?
arch/arm/mach-omap2/id.c:270:13: warning: symbol 'omap4_check_revision' was not
declared. Should it be static?
arch/arm/mach-omap2/id.c:300:13: warning: symbol 'omap3_cpuinfo' was not
declared. Should it be static?
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/id.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 16dbb9e..fd1904b 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -112,7 +112,7 @@ void omap_get_die_id(struct omap_die_id *odi)
odi-id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
}
-void __init omap24xx_check_revision(void)
+static void __init omap24xx_check_revision(void)
{
int i, j;
u32 idcode, prod_id;
@@ -172,7 +172,7 @@ void __init omap24xx_check_revision(void)
omap3_features |= OMAP3_HAS_ ##feat;\
}
-void __init omap3_check_features(void)
+static void __init omap3_check_features(void)
{
u32 status;
@@ -196,7 +196,7 @@ void __init omap3_check_features(void)
*/
}
-void __init omap3_check_revision(void)
+static void __init omap3_check_revision(void)
{
u32 cpuid, idcode;
u16 hawkeye;
@@ -277,7 +277,7 @@ void __init omap3_check_revision(void)
}
}
-void __init omap4_check_revision(void)
+static void __init omap4_check_revision(void)
{
u32 idcode;
u16 hawkeye;
@@ -307,7 +307,7 @@ void __init omap4_check_revision(void)
if (omap3_has_ ##feat())\
printk(#feat );
-void __init omap3_cpuinfo(void)
+static void __init omap3_cpuinfo(void)
{
u8 rev = GET_OMAP_REVISION();
char cpu_name[16], cpu_rev[16];
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[PATCH 2/5] omap: Implement common omap_has_feature
Implement common omap_has_feature.
Intended to replace omap3_has_ functions
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/id.c | 32
arch/arm/plat-omap/common.c | 15 +++
arch/arm/plat-omap/include/plat/cpu.h |3 +++
3 files changed, 50 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index fd1904b..a2e5965 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -29,7 +29,9 @@
static struct omap_chip_id omap_chip;
static unsigned int omap_revision;
+static u32 omap_features;
+/* REVISIT: Get rid of omap3_features */
u32 omap3_features;
unsigned int omap_rev(void)
@@ -112,6 +114,12 @@ void omap_get_die_id(struct omap_die_id *odi)
odi-id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
}
+u32 omap2_has_feature(u32 feat_mask)
+{
+ /* REVISIT: Add necessary omap2 feature tests here */
+ return ((feat_mask omap_features) == feat_mask);
+}
+
static void __init omap24xx_check_revision(void)
{
int i, j;
@@ -164,6 +172,15 @@ static void __init omap24xx_check_revision(void)
if ((omap_rev() 8) 0x0f)
pr_info(ES%x, (omap_rev() 12) 0xf);
pr_info(\n);
+
+ omap_features = 0;
+ omap_init_features(omap2_has_feature);
+}
+
+u32 omap3_has_feature(u32 feat_mask)
+{
+ /* REVISIT: Add necessary omap3 feature tests here */
+ return ((feat_mask omap_features) == feat_mask);
}
#define OMAP3_CHECK_FEATURE(status,feat) \
@@ -194,6 +211,11 @@ static void __init omap3_check_features(void)
* TODO: Get additional info (where applicable)
* e.g. Size of L2 cache.
*/
+
+ /* REVISIT: Get rid of omap3_features */
+ omap_features = omap3_features;
+
+ omap_init_features(omap3_has_feature);
}
static void __init omap3_check_revision(void)
@@ -277,6 +299,12 @@ static void __init omap3_check_revision(void)
}
}
+u32 omap4_has_feature(u32 feat_mask)
+{
+ /* REVISIT: Add necessary omap4 feature tests here */
+ return ((feat_mask omap_features) == feat_mask);
+}
+
static void __init omap4_check_revision(void)
{
u32 idcode;
@@ -297,6 +325,10 @@ static void __init omap4_check_revision(void)
omap_revision = OMAP4430_REV_ES1_0;
omap_chip.oc |= CHIP_IS_OMAP4430ES1;
pr_info(OMAP%04x %s\n, omap_rev() 16, rev_name);
+
+ omap_features = 0;
+ omap_init_features(omap4_has_feature);
+
return;
}
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 893a53a..d00b242 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -89,6 +89,21 @@ void __init omap_reserve(void)
omap_vram_reserve_sdram_lmb();
}
+static int (*_omap_check_feature)(u32 feat_mask);
+
+u32 omap_has_feature(u32 feat_mask)
+{
+ if (!_omap_check_feature)
+ return 0;
+
+ return _omap_check_feature(feat_mask);
+}
+
+void __init omap_init_features(u32 (*check_feature)(u32 feat))
+{
+ _omap_check_feature = check_feature;
+}
+
/*
* 32KHz clocksource ... always available, on pretty most chips except
* OMAP 730 and 1510. Other timers could be used as clocksources, with
diff --git a/arch/arm/plat-omap/include/plat/cpu.h
b/arch/arm/plat-omap/include/plat/cpu.h
index aa2f4f0..127df06 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -49,6 +49,9 @@ struct omap_chip_id {
u8 type;
};
+u32 omap_has_feature(u32 feat_mask);
+void omap_init_features(u32 (*check_feature)(u32 feat));
+
#define OMAP_CHIP_INIT(x) { .oc = x }
/*
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[PATCH 3/5] omap: Replace omap3_has_ macros with omap_has_feature
Replace omap3_has_ macros with omap_has_feature
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/clock3xxx_data.c |2 +-
arch/arm/mach-omap2/id.c | 22 +++---
arch/arm/mach-omap2/pm34xx.c |2 +-
arch/arm/plat-omap/include/plat/cpu.h | 12 ++--
4 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index c226798..2d2248f 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3435,7 +3435,7 @@ int __init omap3xxx_clk_init(void)
cpu_clkflg |= CK_3505;
}
- if (omap3_has_192mhz_clk())
+ if (omap_has_feature(OMAP3_HAS_192MHZ_CLK))
omap_96m_alwon_fck = omap_96m_alwon_fck_3630;
if (cpu_is_omap3630()) {
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index a2e5965..11184cf 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -336,7 +336,7 @@ static void __init omap4_check_revision(void)
}
#define OMAP3_SHOW_FEATURE(feat) \
- if (omap3_has_ ##feat())\
+ if (omap_has_feature(feat)) \
printk(#feat );
static void __init omap3_cpuinfo(void)
@@ -356,20 +356,20 @@ static void __init omap3_cpuinfo(void)
/*
* AM35xx devices
*/
- if (omap3_has_sgx()) {
+ if (omap_has_feature(OMAP3_HAS_SGX)) {
omap_revision = OMAP3517_REV(rev);
strcpy(cpu_name, AM3517);
} else {
/* Already set in omap3_check_revision() */
strcpy(cpu_name, AM3505);
}
- } else if (omap3_has_iva() omap3_has_sgx()) {
+ } else if (omap_has_feature(OMAP3_HAS_IVA | OMAP3_HAS_SGX)) {
/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
strcpy(cpu_name, OMAP3430/3530);
- } else if (omap3_has_iva()) {
+ } else if (omap_has_feature(OMAP3_HAS_IVA)) {
omap_revision = OMAP3525_REV(rev);
strcpy(cpu_name, OMAP3525);
- } else if (omap3_has_sgx()) {
+ } else if (omap_has_feature(OMAP3_HAS_SGX)) {
omap_revision = OMAP3515_REV(rev);
strcpy(cpu_name, OMAP3515);
} else {
@@ -400,12 +400,12 @@ static void __init omap3_cpuinfo(void)
/* Print verbose information */
pr_info(%s ES%s (, cpu_name, cpu_rev);
- OMAP3_SHOW_FEATURE(l2cache);
- OMAP3_SHOW_FEATURE(iva);
- OMAP3_SHOW_FEATURE(sgx);
- OMAP3_SHOW_FEATURE(neon);
- OMAP3_SHOW_FEATURE(isp);
- OMAP3_SHOW_FEATURE(192mhz_clk);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_L2CACHE);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_IVA);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_SGX);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_NEON);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_ISP);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_192MHZ_CLK);
printk()\n);
}
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fb4994a..32e1005 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -385,7 +385,7 @@ void omap_sram_idle(void)
/* Enable IO-PAD and IO-CHAIN wakeups */
per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
- if (omap3_has_io_wakeup() \
+ if (omap_has_feature(OMAP3_HAS_IO_WAKEUP) \
(per_next_state PWRDM_POWER_ON ||
core_next_state PWRDM_POWER_ON)) {
prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
diff --git a/arch/arm/plat-omap/include/plat/cpu.h
b/arch/arm/plat-omap/include/plat/cpu.h
index 127df06..efee323 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -334,14 +334,14 @@ IS_OMAP_TYPE(3517, 0x3517)
# undef cpu_is_omap3517
# define cpu_is_omap3430() is_omap3430()
# define cpu_is_omap3503() (cpu_is_omap3430()\
- (!omap3_has_iva())\
- (!omap3_has_sgx()))
+(!omap_has_feature(OMAP3_HAS_IVA)
\
+
(!omap_has_feature(OMAP3_HAS_SGX)))
# define cpu_is_omap3515() (cpu_is_omap3430()\
- (!omap3_has_iva())\
- (omap3_has_sgx()))
+
(!omap_has_feature(OMAP3_HAS_IVA))\
+
(omap_has_feature(OMAP3_HAS_SGX)))
# define cpu_is_omap3525() (cpu_is_omap3430()\
-
[PATCH 4/5] omap: Remove old omap3_has_ macros
Remove old omap3_has_ macros. Please use omap_has_feature()
instead.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/id.c | 14 --
arch/arm/plat-omap/include/plat/cpu.h | 16
2 files changed, 4 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 11184cf..123ed1e 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -31,9 +31,6 @@ static struct omap_chip_id omap_chip;
static unsigned int omap_revision;
static u32 omap_features;
-/* REVISIT: Get rid of omap3_features */
-u32 omap3_features;
-
unsigned int omap_rev(void)
{
return omap_revision;
@@ -186,14 +183,14 @@ u32 omap3_has_feature(u32 feat_mask)
#define OMAP3_CHECK_FEATURE(status,feat) \
if (((status OMAP3_ ##feat## _MASK) \
OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \
- omap3_features |= OMAP3_HAS_ ##feat;\
+ omap_features |= OMAP3_HAS_ ##feat; \
}
static void __init omap3_check_features(void)
{
u32 status;
- omap3_features = 0;
+ omap_features = 0;
status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS);
@@ -203,18 +200,15 @@ static void __init omap3_check_features(void)
OMAP3_CHECK_FEATURE(status, NEON);
OMAP3_CHECK_FEATURE(status, ISP);
if (cpu_is_omap3630())
- omap3_features |= OMAP3_HAS_192MHZ_CLK;
+ omap_features |= OMAP3_HAS_192MHZ_CLK;
if (!cpu_is_omap3505() !cpu_is_omap3517())
- omap3_features |= OMAP3_HAS_IO_WAKEUP;
+ omap_features |= OMAP3_HAS_IO_WAKEUP;
/*
* TODO: Get additional info (where applicable)
* e.g. Size of L2 cache.
*/
- /* REVISIT: Get rid of omap3_features */
- omap_features = omap3_features;
-
omap_init_features(omap3_has_feature);
}
diff --git a/arch/arm/plat-omap/include/plat/cpu.h
b/arch/arm/plat-omap/include/plat/cpu.h
index efee323..96eac4d 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -439,8 +439,6 @@ void omap2_check_revision(void);
/*
* Runtime detection of OMAP3 features
*/
-extern u32 omap3_features;
-
#define OMAP3_HAS_L2CACHE BIT(0)
#define OMAP3_HAS_IVA BIT(1)
#define OMAP3_HAS_SGX BIT(2)
@@ -449,18 +447,4 @@ extern u32 omap3_features;
#define OMAP3_HAS_192MHZ_CLK BIT(5)
#define OMAP3_HAS_IO_WAKEUPBIT(6)
-#define OMAP3_HAS_FEATURE(feat,flag) \
-static inline unsigned int omap3_has_ ##feat(void) \
-{ \
- return (omap3_features OMAP3_HAS_ ##flag);\
-} \
-
-OMAP3_HAS_FEATURE(l2cache, L2CACHE)
-OMAP3_HAS_FEATURE(sgx, SGX)
-OMAP3_HAS_FEATURE(iva, IVA)
-OMAP3_HAS_FEATURE(neon, NEON)
-OMAP3_HAS_FEATURE(isp, ISP)
-OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
-OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
-
#endif
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[PATCH 5/5] omap: Allow testing for omap type with omap_has_feature
Allow testing for omap type with omap_has_feature. This can be used to leave out cpu_is_omap checks. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/plat-omap/include/plat/cpu.h | 38 ++--- 1 files changed, 30 insertions(+), 8 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 96eac4d..c117c3c 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -437,14 +437,36 @@ int omap_chip_is(struct omap_chip_id oci); void omap2_check_revision(void); /* - * Runtime detection of OMAP3 features + * Runtime detection of OMAP features */ -#define OMAP3_HAS_L2CACHE BIT(0) -#define OMAP3_HAS_IVA BIT(1) -#define OMAP3_HAS_SGX BIT(2) -#define OMAP3_HAS_NEON BIT(3) -#define OMAP3_HAS_ISP BIT(4) -#define OMAP3_HAS_192MHZ_CLK BIT(5) -#define OMAP3_HAS_IO_WAKEUPBIT(6) +#define OMAP_FEAT_CLASS_OMAP1 BIT(24) +#define OMAP_FEAT_CLASS_OMAP2 BIT(25) +#define OMAP_FEAT_CLASS_OMAP3 BIT(26) +#define OMAP_FEAT_CLASS_OMAP4 BIT(27) + +#define OMAP_HAS_L2CACHE BIT(0) +#define OMAP_HAS_IVA BIT(1) +#define OMAP_HAS_SGX BIT(2) +#define OMAP_HAS_NEON BIT(3) +#define OMAP_HAS_ISP BIT(4) +#define OMAP_HAS_192MHZ_CLKBIT(5) +#define OMAP_HAS_IO_WAKEUP BIT(6) + +#define OMAP2_HAS_IVA OMAP_FEAT_CLASS_OMAP2 | OMAP_HAS_IVA +#define OMAP2_HAS_SGX OMAP_FEAT_CLASS_OMAP2 | OMAP_HAS_SGX + +#define OMAP3_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_L2CACHE +#define OMAP3_HAS_IVA OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_IVA +#define OMAP3_HAS_SGX OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_SGX +#define OMAP3_HAS_NEON OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_NEON +#define OMAP3_HAS_ISP OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_ISP +#define OMAP3_HAS_192MHZ_CLK OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_192MHZ_CLK +#define OMAP3_HAS_IO_WAKEUPOMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_IOWAKEUP + +#define OMAP4_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_L2CACHE +#define OMAP4_HAS_IVA OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_IVA +#define OMAP4_HAS_SGX OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_SGX +#define OMAP4_HAS_NEON OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_NEON +#define OMAP4_HAS_ISP OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_ISP #endif -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 06/15] omap zoom2: wlan board muxing
* Ghorai, Sukumar s-gho...@ti.com [100708 06:34]:
@@ -71,6 +71,21 @@ static struct twl4030_platform_data zoom2_twldata = {
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
+#ifdef CONFIG_OMAP_ZOOM_WLAN
[Ghorai] This is zoom board specific file, So why need this additional flag?
Good point, the ifdef is unnecessary in for both zoom2 and zoom3.
Will update in my queue to remove the ifdefs.
Tony
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Tony mostly offline for the rest of July
Hi all, FYI, I'll be mostly offline after Friday for several weeks. I'll post few more patchsets for review, but will not be merging any other omap code after that for the upcoming merge window. Cheers, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Possible bug in onenand_base ?
Hello,
I made new tests regarding this issue. Looks like the problem is
reading from the OneNAND device.
TEST 1
# modprobe mtd_pagetest dev=4
[ 126.505340]
[ 126.506866] =
[ 126.512756] mtd_pagetest: MTD device: 4
[ 126.520477] mtd_pagetest: MTD device size 262668288, eraseblock
size 262144, page size 4096, count of eraseblocks 1002, pages per
eraseblock 64, OOB size 64
[ 126.535034] mtd_pagetest: scanning for bad eraseblocks
[ 126.540771] mtd_pagetest: scanned 1002 eraseblocks, 0 are bad
[ 126.546630] mtd_pagetest: erasing whole device
[ 128.406890] mtd_pagetest: erased 1002 eraseblocks
[ 128.411712] mtd_pagetest: writing whole device
[ 128.451721] mtd_pagetest: written up to eraseblock 0
[ 137.443817] mtd_pagetest: written up to eraseblock 256
[ 146.440216] mtd_pagetest: written up to eraseblock 512
[ 155.430755] mtd_pagetest: written up to eraseblock 768
[ 163.618225] mtd_pagetest: written 1002 eraseblocks
[ 163.623168] mtd_pagetest: verifying all eraseblocks
[ 163.632965] onenand_wait: ECC error = 0x4488
[ 163.638031] onenand_wait: ECC error = 0x4884
[ 163.642486] onenand_wait: ECC error = 0x
[ 163.647247] onenand_wait: ECC error = 0x
[ 163.651733] mtd_pagetest: error: read failed at 0x0
[ 163.656890] mtd_pagetest: error -74 occurred
[ 163.661224] =
TEST 2
# nandtest -l 262144 /dev/mtd4
ECC corrections: 0
ECC failures : 260
Bad blocks : 0
BBT blocks : 0
: reading...[ 837.103302] onenand_wait: ECC error = 0x8488
[ 837.109832] onenand_wait: ECC error = 0x8488
[ 837.114532] onenand_wait: ECC error = 0x
(...)
[ 837.683624] onenand_wait: ECC error = 0x8448
[ 837.688079] onenand_wait: ECC error = 0x8488
ECC failed at
: checking...
compare failed. seed 1804289383
Byte 0x1 is 5a should be da
Byte 0x3 is 82 should be 92
(...)
I suspect currently OneNAND with 2 planes is broken. Someone with this
type of device can try these tests ?
Thanks in advance,
Enric
2010/5/12 Enric Balletbò i Serra eballe...@gmail.com:
I answer to myself.
DDP (dual die plane) not implies 'ONENAND_HAS_2PLANE'. A device with
a single die can also have '2 planes'. I'm right ?
Sorry for these newbie questions, I'm just introducing to OneNAND devices.
Cheers,
Enric
2010/5/12 Enric Balletbò i Serra eballe...@gmail.com:
Hello,
I have a bit of time to investigate more.
I have two boards with two different OneNAND chips populated.
The first one is a dual Die Plan 4-Gbit (2 dice of 2-Gbit)
[ 26.406890] Muxed OneNAND(DDP) 512MB 1.8V 16-bit (0x58)
[ 26.412170] OneNAND version = 0x0031
[ 26.415771] Chip support all block unlock
[ 26.419830] Chip has 2 plane
The second is a single die of 2-Gbit.
[ 32.897735] Muxed OneNAND 256MB 1.8V 16-bit (0x40)
[ 32.902557] OneNAND version = 0x0031
[ 32.906188] Chip support all block unlock
[ 32.910247] Chip has 2 plane
As I understand the bit 3 of DEVICE_ID register indicates if package
is a single-die or a dual-die, so
- Muxed OneNAND(DDP) 512MB 1.8V 16-bit - device id: 0x58 - bit 3 is
1 - dual-die
- Muxed OneNAND 256MB 1.8V 16-bit - device id: 0x40 - bit 3 is 0
-single-die
The question is, why those devices are reporting 'Chip has 2 plane' ?
Sorry if this is a trivial question but I'm not sure about DDP and '2
plane' concepts. Are the same ?
Cheers,
Enric
2010/5/6 Enric Balletbò i Serra eballe...@gmail.com:
Hi,
2010/5/6 Kyungmin Park kmp...@infradead.org:
Hi,
What's your chip version? maybe some mis-probe it seems to be probed
at 4KiB pagesize OneNAND.
Is a 4-Gbit DDP OneNAND device from Numonyx composed of two 2-Gbit 2KB
page dice stacked together, the device is equipped with two DataRAMs,
and two-plane NAND Flash memory array,
These two component enables simultaneous program of 4KiB (
CONFIG_MTD_ONENAND_2X_PROGRAM)
Cheers,
Enric
Thank you,
Kyungmin Park
On Thu, May 6, 2010 at 8:22 PM, Enric Balletbò i Serra
eballe...@gmail.com wrote:
Hi,
2010/5/6 Kyungmin Park kyungmin.p...@samsung.com:
Hi,
Can you add this statement at below the code?
printk(%s[%d] page %d, %d, %d\n, __func__, __LINE__, page, (int)
onenand_addr(this, block), ((int) addr this-page_shift)
this-page_mask);
Yes,
With this code nandtest fails:
onenand_base.c
377: default:
block = onenand_block(this, addr);
/* (line disabled) page = (int) (addr this-page_shift); */
page = (int) (addr - onenand_addr(this, block))
this-page_shift;
printk(%s[%d] page %d, %d, %d\n, __func__, __LINE__,
page, (int)
onenand_addr(this, block), ((int) addr
this-page_shift)
this-page_mask);
if (ONENAND_IS_2PLANE(this)) {
/* Make the even block number */
block = ~1;
/* Is it the odd plane? */
[PATCH 0/5] omap serial init patches for 2.6.36 merge window
Hi all, Here are some patches dealing with omap serial errata handling. Regards, Tony --- Deepak K (1): omap2/3/4: serial: errata i202: fix for MDR1 access Govindraj R (1): omap3: serial: Add context save and restore for mcr Nishanth Menon (3): omap2/3/4: serial: remove initialization sparse warnings omap2/3/4: serial: kill dev_attr_sleep_timeout sparse warn omap2/3/4: serial: introduce errata handling arch/arm/mach-omap2/serial.c | 80 -- 1 files changed, 69 insertions(+), 11 deletions(-) -- Signature -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/5] omap3: serial: Add context save and restore for mcr
From: Govindraj R govindraj.r...@ti.com
Adds context save/restore for mcr register as state of mcr register
is lost after core off.
Signed-off-by: Govindraj R govindraj.r...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/serial.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 3771254..804dbb2 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -74,6 +74,7 @@ struct omap_uart_state {
u16 sysc;
u16 scr;
u16 wer;
+ u16 mcr;
#endif
};
@@ -197,6 +198,9 @@ static void omap_uart_save_context(struct omap_uart_state
*uart)
uart-sysc = serial_read_reg(p, UART_OMAP_SYSC);
uart-scr = serial_read_reg(p, UART_OMAP_SCR);
uart-wer = serial_read_reg(p, UART_OMAP_WER);
+ serial_write_reg(p, UART_LCR, 0x80);
+ uart-mcr = serial_read_reg(p, UART_MCR);
+ serial_write_reg(p, UART_LCR, lcr);
uart-context_valid = 1;
}
@@ -225,6 +229,8 @@ static void omap_uart_restore_context(struct
omap_uart_state *uart)
serial_write_reg(p, UART_DLM, uart-dlh);
serial_write_reg(p, UART_LCR, 0x0); /* Operational mode */
serial_write_reg(p, UART_IER, uart-ier);
+ serial_write_reg(p, UART_LCR, 0x80);
+ serial_write_reg(p, UART_MCR, uart-mcr);
serial_write_reg(p, UART_FCR, 0xA1);
serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */
serial_write_reg(p, UART_EFR, efr);
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[PATCH 2/5] omap2/3/4: serial: remove initialization sparse warnings
From: Nishanth Menon n...@ti.com
Initialization of pointer should be done with NULL. Removes sparse
warnings:
arch/arm/mach-omap2/serial.c:566:17: warning: Using plain integer as NULL
pointer
arch/arm/mach-omap2/serial.c:567:17: warning: Using plain integer as NULL
pointer
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/serial.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 804dbb2..9476c1c 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -495,8 +495,8 @@ static void omap_uart_idle_init(struct omap_uart_state
*uart)
}
uart-wk_mask = wk_mask;
} else {
- uart-wk_en = 0;
- uart-wk_st = 0;
+ uart-wk_en = NULL;
+ uart-wk_st = NULL;
uart-wk_mask = 0;
uart-padconf = 0;
}
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[PATCH 3/5] omap2/3/4: serial: kill dev_attr_sleep_timeout sparse warn
From: Nishanth Menon n...@ti.com
Remove the following sparse warnings by declaring attr as static:
arch/arm/mach-omap2/serial.c:627:1: warning: symbol 'dev_attr_sleep_timeout'
was not declared. Should it be static?
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/serial.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 9476c1c..584a2ed 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -558,7 +558,8 @@ static ssize_t sleep_timeout_store(struct device *dev,
return n;
}
-DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show, sleep_timeout_store);
+static DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show,
+ sleep_timeout_store);
#define DEV_CREATE_FILE(dev, attr) WARN_ON(device_create_file(dev, attr))
#else
static inline void omap_uart_idle_init(struct omap_uart_state *uart) {}
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[PATCH 4/5] omap2/3/4: serial: introduce errata handling
From: Nishanth Menon n...@ti.com
introduce silicon specific quirks as a errata handling mechanism
as a start UART_ERRATA_FIFO_FULL_ABORT is used to handle the override
for fifo full condition for rx and tx.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/serial.c | 15 ++-
1 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 584a2ed..009b63f 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -37,6 +37,8 @@
#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV0x52
#define UART_OMAP_WER 0x17/* Wake-up enable register */
+#define UART_ERRATA_FIFO_FULL_ABORT(0x1 0)
+
/*
* NOTE: By default the serial timeout is disabled as it causes lost characters
* over the serial ports. This means that the UART clocks will stay on until
@@ -64,6 +66,7 @@ struct omap_uart_state {
struct list_head node;
struct platform_device pdev;
+ u32 errata;
#if defined(CONFIG_ARCH_OMAP3) defined(CONFIG_PM)
int context_valid;
@@ -756,11 +759,13 @@ void __init omap_serial_init_port(int port)
* omap3xxx: Never read empty UART fifo on UARTs
* with IP rev =0x52
*/
- if (cpu_is_omap44xx()) {
- uart-p-serial_in = serial_in_override;
- uart-p-serial_out = serial_out_override;
- } else if ((serial_read_reg(uart-p, UART_OMAP_MVER) 0xFF)
- = UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) {
+ if (cpu_is_omap44xx())
+ uart-errata |= UART_ERRATA_FIFO_FULL_ABORT;
+ else if ((serial_read_reg(uart-p, UART_OMAP_MVER) 0xFF)
+ = UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
+ uart-errata |= UART_ERRATA_FIFO_FULL_ABORT;
+
+ if (uart-errata UART_ERRATA_FIFO_FULL_ABORT) {
uart-p-serial_in = serial_in_override;
uart-p-serial_out = serial_out_override;
}
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[PATCH 5/5] omap2/3/4: serial: errata i202: fix for MDR1 access
From: Deepak K deepa...@ti.com
Errata i202 (OMAP3430 - 1.12, OMAP3630 - 1.6):
UART module MDR1 register access can cause a dummy underrun
condition which could result in a freeze in the case of IrDA
communication or if used as UART, corrupted data.
Workaround is as follows for everytime MDR1 register is changed:
* setup all required UART registers
* setup MDR1.MODE_SELECT bit field
* Wait 5 L4 clk cycles + 5 UART functional clock cycles
* Clear the Tx and RX fifo using FCR register
Note: The following step is not done as I am assuming it is not
needed due to reconfiguration being done and there is no halted
operation perse.
* Read if required, the RESUME register to resume halted operation
Based on an earlier patch at:
http://git.omapzoom.org/?p=kernel/omap.git;a=commitdiff;h=42d4a342c009bd9727c100abc8a4bc3063c22f0c
Signed-off-by: Deepak K deepa...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/serial.c | 52 --
1 files changed, 49 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 009b63f..566e991 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -38,6 +38,7 @@
#define UART_OMAP_WER 0x17/* Wake-up enable register */
#define UART_ERRATA_FIFO_FULL_ABORT(0x1 0)
+#define UART_ERRATA_i202_MDR1_ACCESS (0x1 1)
/*
* NOTE: By default the serial timeout is disabled as it causes lost characters
@@ -184,6 +185,42 @@ static inline void __init omap_uart_reset(struct
omap_uart_state *uart)
#if defined(CONFIG_PM) defined(CONFIG_ARCH_OMAP3)
+/*
+ * Work Around for Errata i202 (3430 - 1.12, 3630 - 1.6)
+ * The access to uart register after MDR1 Access
+ * causes UART to corrupt data.
+ *
+ * Need a delay =
+ * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
+ * give 10 times as much
+ */
+static void omap_uart_mdr1_errataset(struct omap_uart_state *uart, u8 mdr1_val,
+ u8 fcr_val)
+{
+ struct plat_serial8250_port *p = uart-p;
+ u8 timeout = 255;
+
+ serial_write_reg(p, UART_OMAP_MDR1, mdr1_val);
+ udelay(2);
+ serial_write_reg(p, UART_FCR, fcr_val | UART_FCR_CLEAR_XMIT |
+ UART_FCR_CLEAR_RCVR);
+ /*
+* Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
+* TX_FIFO_E bit is 1.
+*/
+ while (UART_LSR_THRE != (serial_read_reg(p, UART_LSR)
+ (UART_LSR_THRE | UART_LSR_DR))) {
+ timeout--;
+ if (!timeout) {
+ /* Should *never* happen. we warn and carry on */
+ dev_crit(uart-pdev.dev, Errata i202: timedout %x\n,
+ serial_read_reg(p, UART_LSR));
+ break;
+ }
+ udelay(1);
+ }
+}
+
static void omap_uart_save_context(struct omap_uart_state *uart)
{
u16 lcr = 0;
@@ -221,7 +258,10 @@ static void omap_uart_restore_context(struct
omap_uart_state *uart)
uart-context_valid = 0;
- serial_write_reg(p, UART_OMAP_MDR1, 0x7);
+ if (uart-errata UART_ERRATA_i202_MDR1_ACCESS)
+ omap_uart_mdr1_errataset(uart, 0x07, 0xA0);
+ else
+ serial_write_reg(p, UART_OMAP_MDR1, 0x7);
serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */
efr = serial_read_reg(p, UART_EFR);
serial_write_reg(p, UART_EFR, UART_EFR_ECB);
@@ -234,14 +274,16 @@ static void omap_uart_restore_context(struct
omap_uart_state *uart)
serial_write_reg(p, UART_IER, uart-ier);
serial_write_reg(p, UART_LCR, 0x80);
serial_write_reg(p, UART_MCR, uart-mcr);
- serial_write_reg(p, UART_FCR, 0xA1);
serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */
serial_write_reg(p, UART_EFR, efr);
serial_write_reg(p, UART_LCR, UART_LCR_WLEN8);
serial_write_reg(p, UART_OMAP_SCR, uart-scr);
serial_write_reg(p, UART_OMAP_WER, uart-wer);
serial_write_reg(p, UART_OMAP_SYSC, uart-sysc);
- serial_write_reg(p, UART_OMAP_MDR1, 0x00); /* UART 16x mode */
+ if (uart-errata UART_ERRATA_i202_MDR1_ACCESS)
+ omap_uart_mdr1_errataset(uart, 0x00, 0xA1);
+ else
+ serial_write_reg(p, UART_OMAP_MDR1, 0x00); /* UART 16x mode */
}
#else
static inline void omap_uart_save_context(struct omap_uart_state *uart) {}
@@ -769,6 +811,10 @@ void __init omap_serial_init_port(int port)
uart-p-serial_in = serial_in_override;
uart-p-serial_out = serial_out_override;
}
+
+ /* Enable the MDR1 errata for OMAP3 */
+ if (cpu_is_omap34xx())
+ uart-errata |= UART_ERRATA_i202_MDR1_ACCESS;
}
/**
--
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Re: Possible bug in onenand_base ?
Hello, 2010/7/8 Artem Bityutskiy dedeki...@gmail.com: On Thu, 2010-07-08 at 11:55 +0200, Enric Balletbò i Serra wrote: Hello, I made new tests regarding this issue. Looks like the problem is reading from the OneNAND device. Did you try older kernel and then bisecting who is responsible for the breakage? Yes, before commit 5988af2319781bc8e0ce418affec4e09cfa77907 (mtd: Flex-OneNAND support) http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=5988af2319781bc8e0ce418affec4e09cfa77907 my OneNAND is working, after the commit, the OneNAND support is broken. Cheers, Enric -- Best Regards, Artem Bityutskiy (Артём Битюцкий) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: linux-next: manual merge of the omap tree with the arm tree
* Stephen Rothwell s...@canb.auug.org.au [100708 04:31]: Hi all, Today's linux-next merge of the omap tree got conflicts in arch/arm/mach-omap2/board-3430sdp.c, arch/arm/mach-omap2/board-3630sdp.c, arch/arm/mach-omap2/board-am3517evm.c, arch/arm/mach-omap2/board-cm-t35.c, arch/arm/mach-omap2/board-devkit8000.c, arch/arm/mach-omap2/board-igep0020.c, arch/arm/mach-omap2/board-ldp.c, arch/arm/mach-omap2/board-omap3beagle.c, arch/arm/mach-omap2/board-omap3evm.c, arch/arm/mach-omap2/board-omap3pandora.c, arch/arm/mach-omap2/board-omap3touchbook.c, arch/arm/mach-omap2/board-overo.c, arch/arm/mach-omap2/board-zoom2.c and arch/arm/mach-omap2/board-zoom3.c between commit 1e6d923b4e5729b73518d241edf87a3ab2d5688c (ARM: OMAP: Convert to use -reserve method to reserve boot time memory) from the arm tree and commit c752ab9d5a5b6899f14fe1c6643c0fe0b499a4ba (omap3: introduce omap3_map_io) from the omap tree. Just context changes. I fixed it up (see below) and can carry the fix as necessary. Thanks, I'll merge with Russell's lmb branch when I have confirmation that it will stay static. P.S. Tony, that omap tree commit has a fairly unuseful changelog and no SOB from its purported author ... Oops, I'll check that. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 3/4]usb: musb: HWMOD database structures addition for OMAP3
From: Hema HK hem...@ti.com
OMAP3 hwmod data stuctures are populated with base address, L3 and L4
interface clocks, IRQs,and sysconfig register details.
Signed-off-by: Hema HK hem...@ti.com
Cc: Felipe Balbi felipe.ba...@nokia.com
Cc: Tony Lindgren t...@atomide.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
Based off pm-wip/hwmods-omap4.
[Review commets incorporated]
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 91 +
1 file changed, 91 insertions(+)
Index: linux-omap-pm/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
===
--- linux-omap-pm.orig/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ linux-omap-pm/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -82,6 +82,15 @@ static struct omap_hwmod omap3xxx_l3_mai
};
static struct omap_hwmod omap3xxx_l4_wkup_hwmod;
+static struct omap_hwmod omap3xxx_usbhsotg_hwmod;
+
+/* L3 - USBHSOTG interface */
+static struct omap_hwmod_ocp_if omap3xxx_usbhsotg__l3 = {
+ .master = omap3xxx_usbhsotg_hwmod,
+ .slave = omap3xxx_l3_main_hwmod,
+ .clk= core_l3_ick,
+ .user = OCP_USER_MPU,
+};
/* L4_CORE - L4_WKUP interface */
static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
@@ -90,6 +99,37 @@ static struct omap_hwmod_ocp_if omap3xxx
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/*
+* USBHSOTG interface data
+*/
+
+static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = {
+ {
+ .pa_start = OMAP34XX_HSUSB_OTG_BASE,
+ .pa_end = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* USBHSOTG - L4_CORE interface */
+static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = {
+ .master = omap3xxx_l4_core_hwmod,
+ .slave = omap3xxx_usbhsotg_hwmod,
+ .clk= l4_ick,
+ .addr = omap3xxx_usbhsotg_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_addrs),
+ .user = OCP_USER_MPU,
+
+};
+
+static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_masters[] = {
+ omap3xxx_usbhsotg__l3,
+};
+
+static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_slaves[] = {
+ omap3xxx_l4_core__usbhsotg,
+};
+
/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {
omap3xxx_l3_main__l4_core,
@@ -197,6 +237,56 @@ static struct omap_hwmod omap3xxx_iva_hw
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};
+/*
+ * USBHSOTG (USBHS)
+ */
+static struct omap_hwmod_class_sysconfig omap3xxx_usbhsotg_sysc = {
+ .rev_offs = 0x0400,
+ .sysc_offs = 0x0404,
+ .syss_offs = 0x0408,
+ .sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE|
+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+ SYSC_HAS_AUTOIDLE,
+ .idlemodes = SIDLE_FORCE | SIDLE_NO | SIDLE_SMART,
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class usbotg_class = {
+ .name = usbotg,
+ .sysc = omap3xxx_usbhsotg_sysc,
+};
+
+/* usb_otg_hs */
+static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = {
+
+ { .name = mc, .irq = 92 },
+ { .name = dma, .irq = 93 },
+
+};
+
+static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
+ .name = usb_otg_hs,
+ .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs),
+ .main_clk = hsotgusb_ick,
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_GRPSEL_HSOTGUSB_MASK,
+ .module_offs = CORE_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT,
+ .idlest_stdby_bit = OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT
+ },
+ },
+ .masters= omap3xxx_usbhsotg_masters,
+ .masters_cnt= ARRAY_SIZE(omap3xxx_usbhsotg_masters),
+ .slaves = omap3xxx_usbhsotg_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_slaves),
+ .class = usbotg_class,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+};
+
static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
omap3xxx_l3_main_hwmod,
omap3xxx_l4_core_hwmod,
@@ -204,6 +294,7 @@ static __initdata struct omap_hwmod *oma
omap3xxx_l4_wkup_hwmod,
omap3xxx_mpu_hwmod,
omap3xxx_iva_hwmod,
+ omap3xxx_usbhsotg_hwmod,
NULL,
};
--
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[PATCH V2 4/4]usb : musb:Using omap_device_build for musb device registration
From: Hema HK hem...@ti.com
Using omap_device_build api instead of platform_device_register for musb
device registration.The device specific resources defined in centralized
database will be used. So removed the resource definitions from the musb
platform file.
Signed-off-by: Hema HK hem...@ti.com
Cc: Felipe Balbi felipe.ba...@nokia.com
Cc: Tony Lindgren t...@atomide.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
Based off pm-wip/hwmods-omap4.
[Review comments incorporated]
arch/arm/mach-omap2/clock44xx_data.c |2
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |2
arch/arm/mach-omap2/usb-musb.c | 97 +++--
3 files changed, 53 insertions(+), 48 deletions(-)
Index: linux-omap-pm/arch/arm/mach-omap2/clock44xx_data.c
===
--- linux-omap-pm.orig/arch/arm/mach-omap2/clock44xx_data.c
+++ linux-omap-pm/arch/arm/mach-omap2/clock44xx_data.c
@@ -2296,7 +2296,7 @@ static struct clk usb_host_fs_fck = {
};
static struct clk usb_otg_ick = {
- .name = usb_otg_ick,
+ .name = usb_otg_hs_ick,
.ops= clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
Index: linux-omap-pm/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
===
--- linux-omap-pm.orig/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ linux-omap-pm/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -4884,7 +4884,7 @@ static __initdata struct omap_hwmod *oma
/* usb_host_hs class */
/* omap44xx_usb_host_hs_hwmod, */
/* usb_otg_hs class */
-/* omap44xx_usb_otg_hs_hwmod, */
+ omap44xx_usb_otg_hs_hwmod,
/* usb_tll_hs class */
/* omap44xx_usb_tll_hs_hwmod, */
/* wd_timer class */
Index: linux-omap-pm/arch/arm/mach-omap2/usb-musb.c
===
--- linux-omap-pm.orig/arch/arm/mach-omap2/usb-musb.c
+++ linux-omap-pm/arch/arm/mach-omap2/usb-musb.c
@@ -30,24 +30,12 @@
#include mach/irqs.h
#include plat/mux.h
#include plat/usb.h
+#include plat/omap_device.h
#ifdef CONFIG_USB_MUSB_SOC
-static struct resource musb_resources[] = {
- [0] = { /* start and end set dynamically */
- .flags = IORESOURCE_MEM,
- },
- [1] = { /* general IRQ */
- .start = INT_243X_HS_USB_MC,
- .flags = IORESOURCE_IRQ,
- .name = mc,
- },
- [2] = { /* DMA IRQ */
- .start = INT_243X_HS_USB_DMA,
- .flags = IORESOURCE_IRQ,
- .name = dma,
- },
-};
+static const char name[] = musb_hdrc;
+#define MAX_OMAP_MUSB_HWMOD_NAME_LEN 16
static struct musb_hdrc_config musb_config = {
.multipoint = 1,
@@ -76,43 +64,60 @@ static struct musb_hdrc_platform_data mu
static u64 musb_dmamask = DMA_BIT_MASK(32);
-static struct platform_device musb_device = {
- .name = musb_hdrc,
- .id = -1,
- .dev = {
- .dma_mask = musb_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = musb_plat,
+static struct omap_device_pm_latency omap_musb_latency[] = {
+ {
+ .deactivate_func = omap_device_idle_hwmods,
+ .activate_func = omap_device_enable_hwmods,
+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
},
- .num_resources = ARRAY_SIZE(musb_resources),
- .resource = musb_resources,
};
void __init usb_musb_init(struct omap_musb_board_data *board_data)
{
- if (cpu_is_omap243x()) {
- musb_resources[0].start = OMAP243X_HS_BASE;
- } else if (cpu_is_omap34xx()) {
- musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
- } else if (cpu_is_omap44xx()) {
- musb_resources[0].start = OMAP44XX_HSUSB_OTG_BASE;
- musb_resources[1].start = OMAP44XX_IRQ_HS_USB_MC_N;
- musb_resources[2].start = OMAP44XX_IRQ_HS_USB_DMA_N;
+ char oh_name[MAX_OMAP_MUSB_HWMOD_NAME_LEN];
+ struct omap_hwmod *oh;
+ struct omap_device *od;
+ struct platform_device *pdev;
+ struct device *dev;
+ int l, bus_id = -1;
+ struct musb_hdrc_platform_data *pdata;
+
+ l = snprintf(oh_name, MAX_OMAP_MUSB_HWMOD_NAME_LEN,
+ usb_otg_hs);
+ WARN(l = MAX_OMAP_MUSB_HWMOD_NAME_LEN,
+ String buffer overflow in MUSB device setup\n);
+ oh = omap_hwmod_lookup(oh_name);
+
+ if (!oh) {
+ pr_err(Could not look up %s\n, oh_name);
+ } else {
+ /*
+* REVISIT: This line can be removed once all the platforms
+* using musb_core.c have been converted to use use clkdev.
Re: Possible bug in onenand_base ?
On Thu, 2010-07-08 at 12:11 +0200, Enric Balletbò i Serra wrote: Hello, 2010/7/8 Artem Bityutskiy dedeki...@gmail.com: On Thu, 2010-07-08 at 11:55 +0200, Enric Balletbò i Serra wrote: Hello, I made new tests regarding this issue. Looks like the problem is reading from the OneNAND device. Did you try older kernel and then bisecting who is responsible for the breakage? Yes, before commit 5988af2319781bc8e0ce418affec4e09cfa77907 (mtd: Flex-OneNAND support) http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=5988af2319781bc8e0ce418affec4e09cfa77907 my OneNAND is working, after the commit, the OneNAND support is broken. Ok, we could revert it, but it is better to fix it. CCing the author of the commit. -- Best Regards, Artem Bityutskiy (Артём Битюцкий) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] usb: musb: Offmode fix for idle path
From: Hema HK hem...@ti.com
With OMAP coreoff support usb was not functional as context was getting
lost after wakeup from coreoff. And also usb was blocking the coreoff
after loading the gadget driver even with no cable connected sometimes.
Added the conext save/restore api in the platform layer which will
be called in the idle and wakeup path.
Changed the usb sysconfig settings as per the usbotg functional spec.
When the device is not used, configure in force idle and force standby mode.
When it is being used, configure in smart standby and smart idle mode.
So while attempting to coreoff the usb is configured to force standby and
force idle mode, after wakeup configured in smart idle and smart standby.
Since clock used for musb is auto gated, there is no need to specifically
enable/disable the clock. Removed enable/disable clock in suspend resume api.
Signed-off-by: Hema HK hem...@ti.com
Signed-off-by: Maulik Mankad x0082...@ti.com
Cc: Felipe Balbi felipe.ba...@nokia.com
Cc: Tony Lindgren t...@atomide.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
Based off : Kevin pm branch.
arch/arm/mach-omap2/pm34xx.c |4
arch/arm/mach-omap2/usb-musb.c| 15 +++
arch/arm/plat-omap/include/plat/usb.h |2 ++
drivers/usb/musb/musb_core.c | 11 ---
drivers/usb/musb/omap2430.c | 32
5 files changed, 49 insertions(+), 15 deletions(-)
Index: linux-omap-pm/arch/arm/mach-omap2/pm34xx.c
===
--- linux-omap-pm.orig/arch/arm/mach-omap2/pm34xx.c
+++ linux-omap-pm/arch/arm/mach-omap2/pm34xx.c
@@ -431,6 +431,8 @@ void omap_sram_idle(void)
if (core_next_state == PWRDM_POWER_OFF) {
omap3_core_save_context();
omap3_prcm_save_context();
+ /* Save MUSB context */
+ musb_context_save_restore(1);
}
}
@@ -479,6 +481,8 @@ void omap_sram_idle(void)
omap3_prcm_restore_context();
omap3_sram_restore_context();
omap2_sms_restore_context();
+ /* Restore MUSB context */
+ musb_context_save_restore(0);
/*
* Errata 1.164 fix : OTG autoidle can prevent
* sleep
Index: linux-omap-pm/arch/arm/mach-omap2/usb-musb.c
===
--- linux-omap-pm.orig/arch/arm/mach-omap2/usb-musb.c
+++ linux-omap-pm/arch/arm/mach-omap2/usb-musb.c
@@ -177,6 +177,21 @@ void __init usb_musb_init(struct omap_mu
usb_musb_pm_init();
}
+void musb_context_save_restore(int save)
+{
+ struct device *dev = musb_device.dev;
+ struct device_driver *drv = dev-driver;
+ if (dev-driver) {
+
+ const struct dev_pm_ops *pm = drv-pm;
+
+ if (save)
+ pm-suspend(dev);
+ else
+ pm-resume_noirq(dev);
+ }
+}
+
#else
void __init usb_musb_init(struct omap_musb_board_data *board_data)
{
Index: linux-omap-pm/arch/arm/plat-omap/include/plat/usb.h
===
--- linux-omap-pm.orig/arch/arm/plat-omap/include/plat/usb.h
+++ linux-omap-pm/arch/arm/plat-omap/include/plat/usb.h
@@ -82,6 +82,8 @@ extern void usb_ohci_init(const struct o
/* This is needed for OMAP3 errata 1.164: enabled autoidle can prevent sleep */
extern void usb_musb_disable_autoidle(void);
+/* For saving and restoring the musb context during off/wakeup*/
+extern void musb_context_save_restore(int save);
#endif
void omap_usb_init(struct omap_usb_config *pdata);
Index: linux-omap-pm/drivers/usb/musb/musb_core.c
===
--- linux-omap-pm.orig/drivers/usb/musb/musb_core.c
+++ linux-omap-pm/drivers/usb/musb/musb_core.c
@@ -2430,11 +2430,6 @@ static int musb_suspend(struct device *d
}
musb_save_context(musb);
-
- if (musb-set_clock)
- musb-set_clock(musb-clock, 0);
- else
- clk_disable(musb-clock);
spin_unlock_irqrestore(musb-lock, flags);
return 0;
}
@@ -2446,12 +2441,6 @@ static int musb_resume_noirq(struct devi
if (!musb-clock)
return 0;
-
- if (musb-set_clock)
- musb-set_clock(musb-clock, 1);
- else
- clk_enable(musb-clock);
-
musb_restore_context(musb);
/* for static cmos like DaVinci, register values were preserved
Index: linux-omap-pm/drivers/usb/musb/omap2430.c
===
--- linux-omap-pm.orig/drivers/usb/musb/omap2430.c
+++ linux-omap-pm/drivers/usb/musb/omap2430.c
@@ -257,15 +257,39 @@ int __init musb_platform_init(struct
[patch-v2.6.36 0/2] musb patches
Greg, These are two patches (acked by Felipe) for v2.6.36 kernel. Sanity tested on OMAP3EVM. Regards, Ajay Anand Gadiyar (2): musb: Kill board specific pinmux from driver file usb: musb: do not override DMA mode in channel program drivers/usb/musb/musbhsdma.c |5 + drivers/usb/musb/omap2430.c |6 -- 2 files changed, 1 insertions(+), 10 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] musb: Kill board specific pinmux from driver file
From: Anand Gadiyar gadi...@ti.com This pin-muxing is best done in the board files. The driver should not do this explicitly. Also, this code causes a warning to be thrown when OMAP2430 and OMAP3/4 support are enabled in the same kernel. Signed-off-by: Anand Gadiyar gadi...@ti.com Acked-by: Felipe Balbi felipe.ba...@nokia.com Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com --- drivers/usb/musb/omap2430.c |6 -- 1 files changed, 0 insertions(+), 6 deletions(-) diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c index e06d65e..2111a24 100644 --- a/drivers/usb/musb/omap2430.c +++ b/drivers/usb/musb/omap2430.c @@ -32,8 +32,6 @@ #include linux/clk.h #include linux/io.h -#include plat/mux.h - #include musb_core.h #include omap2430.h @@ -194,10 +192,6 @@ int __init musb_platform_init(struct musb *musb, void *board_data) u32 l; struct omap_musb_board_data *data = board_data; -#if defined(CONFIG_ARCH_OMAP2430) - omap_cfg_reg(AE5_2430_USB0HS_STP); -#endif - /* We require some kind of external transceiver, hooked * up through ULPI. TWL4030-family PMICs include one, * which needs a driver, drivers aren't always needed. -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] usb: musb: do not override DMA mode in channel program
From: Anand Gadiyar gadi...@ti.com There is no reason for the DMA channel program to override the DMA mode passed down by its caller. Use the passed parameter directly, and let the caller handle the decision on which mode is to be used. Signed-off-by: Anand Gadiyar gadi...@ti.com Acked-by: Felipe Balbi felipe.ba...@nokia.com Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com --- drivers/usb/musb/musbhsdma.c |5 + 1 files changed, 1 insertions(+), 4 deletions(-) diff --git a/drivers/usb/musb/musbhsdma.c b/drivers/usb/musb/musbhsdma.c index dc66e43..6dc107f 100644 --- a/drivers/usb/musb/musbhsdma.c +++ b/drivers/usb/musb/musbhsdma.c @@ -173,10 +173,7 @@ static int dma_channel_program(struct dma_channel *channel, musb_channel-max_packet_sz = packet_sz; channel-status = MUSB_DMA_STATUS_BUSY; - if ((mode == 1) (len = packet_sz)) - configure_channel(channel, packet_sz, 1, dma_addr, len); - else - configure_channel(channel, packet_sz, 0, dma_addr, len); + configure_channel(channel, packet_sz, mode, dma_addr, len); return true; } -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/9 v3] omap: generic: introduce a single check_revision
- Original message -
Hi,
On Wed, Jul 07, 2010 at 07:24:16PM +0200, ext Nishanth Menon wrote:
I am not sure.. if you would like drivers to be modprobabe, there may
be
quirks that you'd want to enable based on cpu_is_omapxxx checks. so it
probably does not make sense to __initdata the revision/feature
variables.
can't you pass the quirks via pdata, then ?
If pdata is passed based on board: Imagine 3630 and uart quirk. Why share
errata xyz over pdata for every board using 3630? Quirks are cpu specific and
not really domain of board..
Regards,
Nishanth Menon
--
balbi
DefectiveByDesign.org
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[RFC] [PATCH] mfd: Support for TWL6030 PWM
From 2c6efcebf2790a4c968309360cfc3559b6d9c110 Mon Sep 17 00:00:00 2001
From: Hemanth V heman...@ti.com
Date: Thu, 8 Jul 2010 17:04:06 +0530
Subject: [PATCH] Add support for TWL6030 PWM
TWL6030 supports PWM (Pulse Width Modulator) which is used
to control charging LED. PWM allows for controlling brightness.
This patch implements the APIs required by leds-pwm driver.
Signed-off-by: Hemanth V heman...@ti.com
---
drivers/mfd/Kconfig |9 +++
drivers/mfd/Makefile |3 +-
drivers/mfd/twl6030-pwm.c | 163 +
3 files changed, 174 insertions(+), 1 deletions(-)
create mode 100644 drivers/mfd/twl6030-pwm.c
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index c7c11ef..4459fe5 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -162,6 +162,15 @@ config TWL6030_GPADC
Say yes here if you want support for the TWL6030 General Purpose
A/D Convertor.
+config TWL6030_PWM
+ tristate TWL6030 PWM (Pulse Width Modulator) Support
+ depends on TWL4030_CORE
+ select HAVE_PWM
+ default n
+ help
+ Say yes here if you want support for TWL6030 PWM.
+ This is used to control charging LED brightness.
+
config MFD_TMIO
bool
default n
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 204a974..e697101 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_TWL4030_CORE)+= twl-core.o twl4030-irq.o
twl6030-irq.o
obj-$(CONFIG_TWL4030_POWER)+= twl4030-power.o
obj-$(CONFIG_TWL4030_CODEC)+= twl4030-codec.o
obj-$(CONFIG_TWL6030_GPADC)+= twl6030-gpadc.o
+obj-$(CONFIG_TWL6030_PWM) += twl6030-pwm.o
obj-$(CONFIG_MFD_MC13783) += mc13783-core.o
@@ -63,4 +64,4 @@ obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o
obj-$(CONFIG_AB4500_CORE) += ab4500-core.o
obj-$(CONFIG_MFD_TIMBERDALE)+= timberdale.o
obj-$(CONFIG_PMIC_ADP5520) += adp5520.o
-obj-$(CONFIG_LPC_SCH) += lpc_sch.o
\ No newline at end of file
+obj-$(CONFIG_LPC_SCH) += lpc_sch.o
diff --git a/drivers/mfd/twl6030-pwm.c b/drivers/mfd/twl6030-pwm.c
new file mode 100644
index 000..5d25bdc
--- /dev/null
+++ b/drivers/mfd/twl6030-pwm.c
@@ -0,0 +1,163 @@
+/*
+ * twl6030_pwm.c
+ * Driver for PHOENIX (TWL6030) Pulse Width Modulator
+ *
+ * Copyright (C) 2010 Texas Instruments
+ * Author: Hemanth V heman...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/i2c/twl.h
+#include linux/slab.h
+
+#define LED_PWM_CTRL1 0xF4
+#define LED_PWM_CTRL2 0xF5
+
+/* Max value for CTRL1 register */
+#define PWM_CTRL1_MAX 255
+
+/* Pull down disable */
+#define PWM_CTRL2_DIS_PD (1 6)
+
+/* Current control 2.5 milli Amps */
+#define PWM_CTRL2_CURR_02 (2 4)
+
+/* LED supply source */
+#define PWM_CTRL2_SRC_VAC (1 2)
+
+/* LED modes */
+#define PWM_CTRL2_MODE_HW (0 0)
+#define PWM_CTRL2_MODE_SW (1 0)
+#define PWM_CTRL2_MODE_DIS (2 0)
+
+#define PWM_CTRL2_MODE_MASK0x3
+
+struct pwm_device {
+ const char *label;
+ unsigned int pwm_id;
+};
+
+int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
+{
+ u8 duty_cycle;
+ int ret;
+
+ if (pwm == NULL || period_ns == 0 || duty_ns period_ns)
+ return -EINVAL;
+
+ duty_cycle = (duty_ns * PWM_CTRL1_MAX) / period_ns;
+
+ ret = twl_i2c_write_u8(TWL6030_MODULE_ID1, duty_cycle, LED_PWM_CTRL1);
+
+ if (ret 0) {
+ pr_err(%s: Failed to configure PWM, Error %d\n,
+ pwm-label, ret);
+ return ret;
+ }
+ return 0;
+}
+EXPORT_SYMBOL(pwm_config);
+
+int pwm_enable(struct pwm_device *pwm)
+{
+ u8 val;
+ int ret;
+
+ ret = twl_i2c_read_u8(TWL6030_MODULE_ID1, val, LED_PWM_CTRL2);
+ if (ret 0) {
+ pr_err(%s: Failed to enable PWM, Error %d\n, pwm-label, ret);
+ return ret;
+ }
+
+ /* Change mode to software control */
+ val = ~PWM_CTRL2_MODE_MASK;
+ val |= PWM_CTRL2_MODE_SW;
+
+ ret = twl_i2c_write_u8(TWL6030_MODULE_ID1, val, LED_PWM_CTRL2);
+ if (ret 0) {
+ pr_err(%s: Failed to enable PWM, Error %d\n, pwm-label, ret);
+ return ret;
+ }
+
+ twl_i2c_read_u8(TWL6030_MODULE_ID1, val, LED_PWM_CTRL2);
+
Re: [PATCH 3/9 v3] omap: generic: introduce a single check_revision
* Menon, Nishanth n...@ti.com [100708 14:49]: - Original message - Hi, On Wed, Jul 07, 2010 at 07:24:16PM +0200, ext Nishanth Menon wrote: I am not sure.. if you would like drivers to be modprobabe, there may be quirks that you'd want to enable based on cpu_is_omapxxx checks. so it probably does not make sense to __initdata the revision/feature variables. can't you pass the quirks via pdata, then ? If pdata is passed based on board: Imagine 3630 and uart quirk. Why share errata xyz over pdata for every board using 3630? Quirks are cpu specific and not really domain of board.. We should be able to handle the quirks by passing some flag or function pointer from platform data. The drivers should be arch independent, using cpu_is_omap tests anywhere under drivers/* is wrong and should be fixed. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/9 v3] omap: generic: introduce a single check_revision
On Thu, Jul 08, 2010 at 01:57:36PM +0200, ext Menon, Nishanth wrote: If pdata is passed based on board: Imagine 3630 and uart quirk. Why share errata xyz over pdata for every board using 3630? Quirks are cpu specific and not really domain of board.. look at usb-musb.c, it groups the generic part and only asks boards to pass the board-specific bits (usb mode and power). -- balbi DefectiveByDesign.org -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 09/13] tsl2563 ALS support for Nokia N900
Hi Tony, On Wed, 2010-07-07 at 11:44 +0200, ext Tony Lindgren wrote: From: Ameya Palande ameya.pala...@nokia.com This commit will enable usage of tsl2563 ambient light sensor on Nokia N900. Signed-off-by: Ameya Palande ameya.pala...@nokia.com Signed-off-by: Tony Lindgren t...@atomide.com This patch is not correct, sorry for that. You can drop this one. Mathias Nyman will send a new one with correction. Thanks! Cheers, Ameya. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: musb: Offmode fix for idle path
Hello.
Hema HK wrote:
With OMAP coreoff support usb was not functional as context was getting
lost after wakeup from coreoff. And also usb was blocking the coreoff
USB is an acronym.
after loading the gadget driver even with no cable connected sometimes.
Added the conext save/restore api in the platform layer which will
API is an acronym.
be called in the idle and wakeup path.
Changed the usb sysconfig settings as per the usbotg functional spec.
Do you mean the OTG supplement to USB 2.0 spec. or something else?
When the device is not used, configure in force idle and force standby mode.
When it is being used, configure in smart standby and smart idle mode.
So while attempting to coreoff the usb is configured to force standby and
force idle mode, after wakeup configured in smart idle and smart standby.
Since clock used for musb is auto gated, there is no need to specifically
enable/disable the clock. Removed enable/disable clock in suspend resume api.
I'm not sure it's auto-gated on all platforms...
Signed-off-by: Hema HK hem...@ti.com
Signed-off-by: Maulik Mankad x0082...@ti.com
Cc: Felipe Balbi felipe.ba...@nokia.com
Cc: Tony Lindgren t...@atomide.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Index: linux-omap-pm/arch/arm/mach-omap2/usb-musb.c
===
--- linux-omap-pm.orig/arch/arm/mach-omap2/usb-musb.c
+++ linux-omap-pm/arch/arm/mach-omap2/usb-musb.c
@@ -177,6 +177,21 @@ void __init usb_musb_init(struct omap_mu
usb_musb_pm_init();
}
+void musb_context_save_restore(int save)
+{
+ struct device *dev = musb_device.dev;
+ struct device_driver *drv = dev-driver;
Need an empty line here.
+ if (dev-driver) {
You've just assigned that to 'drv' -- why not use it?
Index: linux-omap-pm/arch/arm/plat-omap/include/plat/usb.h
===
--- linux-omap-pm.orig/arch/arm/plat-omap/include/plat/usb.h
+++ linux-omap-pm/arch/arm/plat-omap/include/plat/usb.h
@@ -82,6 +82,8 @@ extern void usb_ohci_init(const struct o
/* This is needed for OMAP3 errata 1.164: enabled autoidle can prevent sleep */
extern void usb_musb_disable_autoidle(void);
+/* For saving and restoring the musb context during off/wakeup*/
+extern void musb_context_save_restore(int save);
#endif
void omap_usb_init(struct omap_usb_config *pdata);
Index: linux-omap-pm/drivers/usb/musb/musb_core.c
===
--- linux-omap-pm.orig/drivers/usb/musb/musb_core.c
+++ linux-omap-pm/drivers/usb/musb/musb_core.c
@@ -2430,11 +2430,6 @@ static int musb_suspend(struct device *d
}
musb_save_context(musb);
-
- if (musb-set_clock)
- musb-set_clock(musb-clock, 0);
- else
- clk_disable(musb-clock);
spin_unlock_irqrestore(musb-lock, flags);
return 0;
}
@@ -2446,12 +2441,6 @@ static int musb_resume_noirq(struct devi
if (!musb-clock)
return 0;
-
- if (musb-set_clock)
- musb-set_clock(musb-clock, 1);
- else
- clk_enable(musb-clock);
-
OK, maybe for OMAP the clock is auto-gated but what about the other
platforms?
musb_restore_context(musb);
/* for static cmos like DaVinci, register values were preserved
Index: linux-omap-pm/drivers/usb/musb/omap2430.c
===
--- linux-omap-pm.orig/drivers/usb/musb/omap2430.c
+++ linux-omap-pm/drivers/usb/musb/omap2430.c
@@ -257,15 +257,39 @@ int __init musb_platform_init(struct mus
void musb_platform_save_context(struct musb *musb,
struct musb_context_registers *musb_context)
{
- musb_context-otg_sysconfig = musb_readl(musb-mregs, OTG_SYSCONFIG);
- musb_context-otg_forcestandby = musb_readl(musb-mregs,
OTG_FORCESTDBY);
+ /*
+* As per the specification, configure it to forced standby
+* and force idle mode when no activity on usb.
+*/
+ void __iomem *musb_base = musb-mregs;
Need an empty line here.
+ musb_writel(musb_base, OTG_FORCESTDBY, 0);
+ musb_writel(musb_base, OTG_SYSCONFIG, musb_readl(musb_base,
+ OTG_SYSCONFIG) ~(NOSTDBY | SMARTSTDBY));
+
+ musb_writel(musb_base, OTG_SYSCONFIG, musb_readl(musb_base,
+ OTG_SYSCONFIG) ~(AUTOIDLE));
Parens around AUTOIDLE are not useful.
+
+ musb_writel(musb_base, OTG_SYSCONFIG, musb_readl(musb_base,
+ OTG_SYSCONFIG) ~(NOIDLE | SMARTIDLE));
+
+ musb_writel(musb_base, OTG_FORCESTDBY, 1);
}
void musb_platform_restore_context(struct musb *musb,
struct musb_context_registers *musb_context)
{
- musb_writel(musb-mregs, OTG_SYSCONFIG, musb_context-otg_sysconfig);
- musb_writel(musb-mregs,
RE: [PATCH] usb: musb: Offmode fix for idle path
Hema,
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Kalliguddi, Hema
Sent: Thursday, July 08, 2010 3:59 PM
To: linux-...@vger.kernel.org; linux-omap@vger.kernel.org
Cc: Kalliguddi, Hema; Mankad, Maulik Ojas; Felipe Balbi; Tony Lindgren; Kevin
Hilman
Subject: [PATCH] usb: musb: Offmode fix for idle path
From: Hema HK hem...@ti.com
With OMAP coreoff support usb was not functional as context was getting
lost after wakeup from coreoff. And also usb was blocking the coreoff
after loading the gadget driver even with no cable connected sometimes.
Added the conext save/restore api in the platform layer which will
be called in the idle and wakeup path.
Changed the usb sysconfig settings as per the usbotg functional spec.
When the device is not used, configure in force idle and force standby mode.
When it is being used, configure in smart standby and smart idle mode.
So while attempting to coreoff the usb is configured to force standby and
force idle mode, after wakeup configured in smart idle and smart standby.
Since clock used for musb is auto gated, there is no need to specifically
enable/disable the clock. Removed enable/disable clock in suspend resume api.
Signed-off-by: Hema HK hem...@ti.com
Signed-off-by: Maulik Mankad x0082...@ti.com
Cc: Felipe Balbi felipe.ba...@nokia.com
Cc: Tony Lindgren t...@atomide.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
Based off : Kevin pm branch.
arch/arm/mach-omap2/pm34xx.c |4
arch/arm/mach-omap2/usb-musb.c| 15 +++
arch/arm/plat-omap/include/plat/usb.h |2 ++
drivers/usb/musb/musb_core.c | 11 ---
drivers/usb/musb/omap2430.c | 32
5 files changed, 49 insertions(+), 15 deletions(-)
Index: linux-omap-pm/arch/arm/mach-omap2/pm34xx.c
=
==
--- linux-omap-pm.orig/arch/arm/mach-omap2/pm34xx.c
+++ linux-omap-pm/arch/arm/mach-omap2/pm34xx.c
@@ -431,6 +431,8 @@ void omap_sram_idle(void)
if (core_next_state == PWRDM_POWER_OFF) {
omap3_core_save_context();
omap3_prcm_save_context();
+ /* Save MUSB context */
+ musb_context_save_restore(1);
Do you really need to save and restore USB context in every OS Idle? Can't it
be done on a need basis like when USB is connected?
}
}
@@ -479,6 +481,8 @@ void omap_sram_idle(void)
omap3_prcm_restore_context();
omap3_sram_restore_context();
omap2_sms_restore_context();
+ /* Restore MUSB context */
+ musb_context_save_restore(0);
/*
* Errata 1.164 fix : OTG autoidle can prevent
* sleep
Index: linux-omap-pm/arch/arm/mach-omap2/usb-musb.c
=
==
--- linux-omap-pm.orig/arch/arm/mach-omap2/usb-musb.c
+++ linux-omap-pm/arch/arm/mach-omap2/usb-musb.c
@@ -177,6 +177,21 @@ void __init usb_musb_init(struct omap_mu
usb_musb_pm_init();
}
+void musb_context_save_restore(int save)
+{
+ struct device *dev = musb_device.dev;
+ struct device_driver *drv = dev-driver;
+ if (dev-driver) {
+
+ const struct dev_pm_ops *pm = drv-pm;
+
+ if (save)
+ pm-suspend(dev);
+ else
+ pm-resume_noirq(dev);
+ }
+}
+
#else
void __init usb_musb_init(struct omap_musb_board_data *board_data)
{
Index: linux-omap-pm/arch/arm/plat-omap/include/plat/usb.h
=
==
--- linux-omap-pm.orig/arch/arm/plat-omap/include/plat/usb.h
+++ linux-omap-pm/arch/arm/plat-omap/include/plat/usb.h
@@ -82,6 +82,8 @@ extern void usb_ohci_init(const struct o
/* This is needed for OMAP3 errata 1.164: enabled autoidle can prevent sleep
*/
extern void usb_musb_disable_autoidle(void);
+/* For saving and restoring the musb context during off/wakeup*/
+extern void musb_context_save_restore(int save);
#endif
void omap_usb_init(struct omap_usb_config *pdata);
Index: linux-omap-pm/drivers/usb/musb/musb_core.c
=
==
--- linux-omap-pm.orig/drivers/usb/musb/musb_core.c
+++ linux-omap-pm/drivers/usb/musb/musb_core.c
@@ -2430,11 +2430,6 @@ static int musb_suspend(struct device *d
}
musb_save_context(musb);
-
- if (musb-set_clock)
- musb-set_clock(musb-clock, 0);
- else
- clk_disable(musb-clock);
spin_unlock_irqrestore(musb-lock, flags);
return 0;
}
@@ -2446,12 +2441,6 @@ static int musb_resume_noirq(struct
Re: [PATCH] [omap1] omap7xx clocks, mux, serial fixes
* Tony Lindgren t...@atomide.com [100705 16:16]: * Cory Maccarrone darkstar6...@gmail.com [100602 01:27]: This change adds in the necessary clocks and mux pins for UART control on omap7xx devices. I also made a change in the serial code to only try and initialize two UARTs in omap_serial_init, as these devices don't have three. Was about to queue this one and then noticed you might want to update this according to Paul's recent patch OMAP1: clock: some cleanup for the enable_bit? Hmm, I guess you don't have documentation for the bits.. I'll queue this one, the bits can be patched later. Looks like the other patches need updating though to apply. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/13] omap updates for 2.6.36 merge window
Hi all, Here are some omap updates for the upcoming merge window. Regards, Tony --- Cory Maccarrone (1): omap1: omap7xx clocks, mux, serial fixes Grazvydas Ignotas (1): omap: mux: fix multipath gpio handling Kan-Ru Chen (3): omap: Add new interface omap_get_die_id omap: Use omap_get_die_id() to get the DIE ids omap: Devkit8000: Use DIE id to initialize dm9000 MAC address Mike Rapoport (1): omap3: introduce omap3_map_io Nishanth Menon (1): omap2/3: id: fix sparse warning Samu Onkalo (1): omap: dma: Support for prefetch in destination synchronizedtransfer Sergio Aguirre (1): omap3: Unify omap2_set_globals_3[43,6x]x functions Steve Sakoman (1): omap: Overo: Fix support for second ethernet port Tony Lindgren (2): omap: Add back UART MDR1 check into uncompress.h omap2: Fix GPIO numbers and smc91x for 2430sdp stanley.miao (1): OMAP3: AM3505/3517 do not have IO wakeup capability arch/arm/mach-omap1/clock_data.c | 20 ++ arch/arm/mach-omap1/mux.c|4 ++ arch/arm/mach-omap1/serial.c |7 arch/arm/mach-omap2/board-2430sdp.c |6 +-- arch/arm/mach-omap2/board-3430sdp.c |8 +--- arch/arm/mach-omap2/board-3630sdp.c |8 +--- arch/arm/mach-omap2/board-am3517evm.c|8 +--- arch/arm/mach-omap2/board-cm-t35.c |8 +--- arch/arm/mach-omap2/board-devkit8000.c | 22 --- arch/arm/mach-omap2/board-igep0020.c |8 +--- arch/arm/mach-omap2/board-ldp.c |8 +--- arch/arm/mach-omap2/board-omap3beagle.c |8 +--- arch/arm/mach-omap2/board-omap3evm.c |8 +--- arch/arm/mach-omap2/board-omap3pandora.c |8 +--- arch/arm/mach-omap2/board-omap3stalker.c |8 +--- arch/arm/mach-omap2/board-omap3touchbook.c |8 +--- arch/arm/mach-omap2/board-overo.c| 50 +- arch/arm/mach-omap2/board-rx51.c |2 + arch/arm/mach-omap2/board-zoom2.c|8 +--- arch/arm/mach-omap2/board-zoom3.c|8 +--- arch/arm/mach-omap2/id.c | 36 --- arch/arm/mach-omap2/include/mach/id.h| 22 +++ arch/arm/mach-omap2/mux.c| 38 ++-- arch/arm/mach-omap2/pm34xx.c |7 ++-- arch/arm/plat-omap/common.c | 10 +++-- arch/arm/plat-omap/dma.c | 11 -- arch/arm/plat-omap/gpio.c|4 ++ arch/arm/plat-omap/include/plat/common.h |5 ++- arch/arm/plat-omap/include/plat/cpu.h|2 + arch/arm/plat-omap/include/plat/dma.h|1 + arch/arm/plat-omap/include/plat/mux.h|4 ++ arch/arm/plat-omap/include/plat/uncompress.h |6 +++ 32 files changed, 202 insertions(+), 159 deletions(-) create mode 100644 arch/arm/mach-omap2/include/mach/id.h -- Signature -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/13] omap: Add back UART MDR1 check into uncompress.h
Recent DEBUG_LL and uncompress.h changes removed the check_port() as pointed out by Cory Maccarrone darkstar6...@gmail.com. This causes some boards to not boot, so add back the MDR1 register check. The MDR1 register tells the mode of omap uart. Based on an earlier patch by Cory Maccarrone darkstar6...@gmail.com. Tested-by: Cory Maccarrone darkstar6...@gmail.com Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/plat-omap/include/plat/uncompress.h |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index bbedd71..ddf723b 100644 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h @@ -25,6 +25,8 @@ #include plat/serial.h +#define MDR1_MODE_MASK 0x07 + static volatile u8 *uart_base; static int uart_shift; @@ -42,6 +44,10 @@ static void putc(int c) if (!uart_base) return; + /* Check for UART 16x mode */ + if ((uart_base[UART_OMAP_MDR1 uart_shift] MDR1_MODE_MASK) != 0) + return; + while (!(uart_base[UART_LSR uart_shift] UART_LSR_THRE)) barrier(); uart_base[UART_TX uart_shift] = c; -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 02/13] omap1: omap7xx clocks, mux, serial fixes
From: Cory Maccarrone darkstar6...@gmail.com
This change adds in the necessary clocks and mux pins for UART
control on omap7xx devices. I also made a change in the serial
code to only try and initialize two UARTs in omap_serial_init, as
these devices don't have three.
Signed-off-by: Cory Maccarrone darkstar6...@gmail.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/clock_data.c | 20
arch/arm/mach-omap1/mux.c |4
arch/arm/mach-omap1/serial.c |7 +++
arch/arm/plat-omap/include/plat/mux.h |4
4 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index ca4bd86..af54114 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -551,6 +551,24 @@ static struct clk usb_dc_ck7xx = {
.enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT,
};
+static struct clk uart1_7xx = {
+ .name = uart1_ck,
+ .ops= clkops_generic,
+ /* Direct from ULPD, no parent */
+ .rate = 1200,
+ .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+ .enable_bit = 9,
+};
+
+static struct clk uart2_7xx = {
+ .name = uart2_ck,
+ .ops= clkops_generic,
+ /* Direct from ULPD, no parent */
+ .rate = 1200,
+ .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+ .enable_bit = 11,
+};
+
static struct clk mclk_1510 = {
.name = mclk,
.ops= clkops_generic,
@@ -697,7 +715,9 @@ static struct omap_clk omap_clks[] = {
/* ULPD clocks */
CLK(NULL, uart1_ck, uart1_1510,CK_1510 | CK_310),
CLK(NULL, uart1_ck, uart1_16xx.clk, CK_16XX),
+ CLK(NULL, uart1_ck, uart1_7xx, CK_7XX),
CLK(NULL, uart2_ck, uart2_ck, CK_16XX | CK_1510 |
CK_310),
+ CLK(NULL, uart2_ck, uart2_7xx, CK_7XX),
CLK(NULL, uart3_ck, uart3_1510,CK_1510 | CK_310),
CLK(NULL, uart3_ck, uart3_16xx.clk, CK_16XX),
CLK(NULL, usb_clko, usb_clko, CK_16XX | CK_1510 |
CK_310),
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 3e98835..7835add 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -70,6 +70,10 @@ MUX_CFG_7XX(SPI_7XX_3, 6, 13,4, 12, 1,
0)
MUX_CFG_7XX(SPI_7XX_4, 6, 17,4, 16, 1, 0)
MUX_CFG_7XX(SPI_7XX_5, 8, 25,0, 24, 0, 0)
MUX_CFG_7XX(SPI_7XX_6, 9,5,0,4, 0, 0)
+
+/* UART pins */
+MUX_CFG_7XX(UART_7XX_1, 3, 21,0, 20, 0, 0)
+MUX_CFG_7XX(UART_7XX_2, 8,1,6,0, 0, 0)
};
#define OMAP7XX_PINS_SZARRAY_SIZE(omap7xx_pins)
#else
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 349de90..b78d074 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -122,6 +122,13 @@ void __init omap_serial_init(void)
for (i = 0; i ARRAY_SIZE(serial_platform_data) - 1; i++) {
+ /* Don't look at UARTs higher than 2 for omap7xx */
+ if (cpu_is_omap7xx() i 1) {
+ serial_platform_data[i].membase = NULL;
+ serial_platform_data[i].mapbase = 0;
+ continue;
+ }
+
/* Static mapping, never released */
serial_platform_data[i].membase =
ioremap(serial_platform_data[i].mapbase, SZ_2K);
diff --git a/arch/arm/plat-omap/include/plat/mux.h
b/arch/arm/plat-omap/include/plat/mux.h
index e1da7b1..aeba717 100644
--- a/arch/arm/plat-omap/include/plat/mux.h
+++ b/arch/arm/plat-omap/include/plat/mux.h
@@ -173,6 +173,10 @@ enum omap7xx_index {
SPI_7XX_4,
SPI_7XX_5,
SPI_7XX_6,
+
+ /* UART */
+ UART_7XX_1,
+ UART_7XX_2,
};
enum omap1xxx_index {
--
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[PATCH 03/13] omap2: Fix GPIO numbers and smc91x for 2430sdp
Fix GPIO numbers and smc91x for 2430sdp. The earlier code
had cut and paste errors from 3430sdp code. Also, 2430
has five GPIO banks for a total of 160 GPIO lines.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/board-2430sdp.c |6 +-
arch/arm/plat-omap/gpio.c |4 +++-
2 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c
b/arch/arm/mach-omap2/board-2430sdp.c
index 71bf509..ba188cf 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -122,11 +122,7 @@ static struct omap_smc91x_platform_data board_smc91x_data
= {
static void __init board_smc91x_init(void)
{
- if (omap_rev() OMAP3430_REV_ES1_0)
- board_smc91x_data.gpio_irq = 6;
- else
- board_smc91x_data.gpio_irq = 29;
-
+ omap_mux_init_gpio(149, OMAP_PIN_INPUT);
gpmc_smc91x_init(board_smc91x_data);
}
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 9b7e354..7951eef 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -390,7 +390,9 @@ static inline int gpio_valid(int gpio)
return 0;
if (cpu_is_omap7xx() gpio 192)
return 0;
- if (cpu_is_omap24xx() gpio 128)
+ if (cpu_is_omap2420() gpio 128)
+ return 0;
+ if (cpu_is_omap2430() gpio 160)
return 0;
if ((cpu_is_omap34xx() || cpu_is_omap44xx()) gpio 192)
return 0;
--
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[PATCH 04/13] omap: Overo: Fix support for second ethernet port
From: Steve Sakoman sako...@gmail.com
The original patch got truncated when applied from patchwork.kernel.org
as discussed at:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg28953.html
This patch supplies the missing chunks.
Signed-off-by: Steve Sakoman sako...@gmail.com
[t...@atomide.com: added more info to the patch description]
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/board-overo.c | 42 +++--
1 files changed, 40 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-overo.c
b/arch/arm/mach-omap2/board-overo.c
index 79ac414..4ceeb56 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -166,9 +166,26 @@ static struct platform_device overo_smsc911x_device = {
},
};
+static struct platform_device overo_smsc911x2_device = {
+ .name = smsc911x,
+ .id = 1,
+ .num_resources = ARRAY_SIZE(overo_smsc911x2_resources),
+ .resource = overo_smsc911x2_resources,
+ .dev= {
+ .platform_data = overo_smsc911x_config,
+ },
+};
+
+static struct platform_device *smsc911x_devices[] = {
+ overo_smsc911x_device,
+ overo_smsc911x2_device,
+};
+
static inline void __init overo_init_smsc911x(void)
{
- unsigned long cs_mem_base;
+ unsigned long cs_mem_base, cs_mem_base2;
+
+ /* set up first smsc911x chip */
if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, cs_mem_base) 0) {
printk(KERN_ERR Failed request for GPMC mem for smsc911x\n);
@@ -189,7 +206,28 @@ static inline void __init overo_init_smsc911x(void)
overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO);
overo_smsc911x_resources[1].end = 0;
- platform_device_register(overo_smsc911x_device);
+ /* set up second smsc911x chip */
+
+ if (gpmc_cs_request(OVERO_SMSC911X2_CS, SZ_16M, cs_mem_base2) 0) {
+ printk(KERN_ERR Failed request for GPMC mem for smsc911x2\n);
+ return;
+ }
+
+ overo_smsc911x2_resources[0].start = cs_mem_base2 + 0x0;
+ overo_smsc911x2_resources[0].end = cs_mem_base2 + 0xff;
+
+ if ((gpio_request(OVERO_SMSC911X2_GPIO, SMSC911X2 IRQ) == 0)
+ (gpio_direction_input(OVERO_SMSC911X2_GPIO) == 0)) {
+ gpio_export(OVERO_SMSC911X2_GPIO, 0);
+ } else {
+ printk(KERN_ERR could not obtain gpio for SMSC911X2 IRQ\n);
+ return;
+ }
+
+ overo_smsc911x2_resources[1].start =
OMAP_GPIO_IRQ(OVERO_SMSC911X2_GPIO);
+ overo_smsc911x2_resources[1].end = 0;
+
+ platform_add_devices(smsc911x_devices, ARRAY_SIZE(smsc911x_devices));
}
#else
--
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[PATCH 05/13] omap2/3: id: fix sparse warning
From: Nishanth Menon n...@ti.com
omap24xx_check_revision, omap3_check_features,
omap3_check_revision, omap4_check_revision, omap3_cpuinfo
are not used elsewhere, it should be static
Also fixes the following sparse warnings:
arch/arm/mach-omap2/id.c:105:13: warning: symbol 'omap24xx_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:167:13: warning: symbol 'omap3_check_features'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:189:13: warning: symbol 'omap3_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:270:13: warning: symbol 'omap4_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:300:13: warning: symbol 'omap3_cpuinfo'
was not declared. Should it be static?
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/id.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 37b8a1a..c7bf0e1 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -102,7 +102,7 @@ static struct omap_id omap_ids[] __initdata = {
static void __iomem *tap_base;
static u16 tap_prod_id;
-void __init omap24xx_check_revision(void)
+static void __init omap24xx_check_revision(void)
{
int i, j;
u32 idcode, prod_id;
@@ -164,7 +164,7 @@ void __init omap24xx_check_revision(void)
omap3_features |= OMAP3_HAS_ ##feat;\
}
-void __init omap3_check_features(void)
+static void __init omap3_check_features(void)
{
u32 status;
@@ -186,7 +186,7 @@ void __init omap3_check_features(void)
*/
}
-void __init omap3_check_revision(void)
+static void __init omap3_check_revision(void)
{
u32 cpuid, idcode;
u16 hawkeye;
@@ -267,7 +267,7 @@ void __init omap3_check_revision(void)
}
}
-void __init omap4_check_revision(void)
+static void __init omap4_check_revision(void)
{
u32 idcode;
u16 hawkeye;
@@ -297,7 +297,7 @@ void __init omap4_check_revision(void)
if (omap3_has_ ##feat())\
printk(#feat );
-void __init omap3_cpuinfo(void)
+static void __init omap3_cpuinfo(void)
{
u8 rev = GET_OMAP_REVISION();
char cpu_name[16], cpu_rev[16];
--
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[PATCH 06/13] omap3: Unify omap2_set_globals_3[43,6x]x functions
From: Sergio Aguirre saagui...@ti.com
The only difference between them is the physical address of the
uart4 port, which is only present in 36xx chips.
We don't really need to care about keeping these 2 functions, since
the decision to use uart4 is more cleanly done later when we do have
access to omap_revision variable.
Signed-off-by: Sergio Aguirre saagui...@ti.com
Acked-by: Kevin Hilman khil...@deeprootsystems.com
[t...@atomide.com: added comment for the uart4_phys]
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/board-3430sdp.c|2 +-
arch/arm/mach-omap2/board-3630sdp.c|2 +-
arch/arm/mach-omap2/board-am3517evm.c |2 +-
arch/arm/mach-omap2/board-cm-t35.c |2 +-
arch/arm/mach-omap2/board-devkit8000.c |2 +-
arch/arm/mach-omap2/board-igep0020.c |2 +-
arch/arm/mach-omap2/board-ldp.c|2 +-
arch/arm/mach-omap2/board-omap3beagle.c|2 +-
arch/arm/mach-omap2/board-omap3evm.c |2 +-
arch/arm/mach-omap2/board-omap3pandora.c |2 +-
arch/arm/mach-omap2/board-omap3stalker.c |2 +-
arch/arm/mach-omap2/board-omap3touchbook.c |2 +-
arch/arm/mach-omap2/board-overo.c |2 +-
arch/arm/mach-omap2/board-rx51.c |2 +-
arch/arm/mach-omap2/board-zoom2.c |2 +-
arch/arm/mach-omap2/board-zoom3.c |2 +-
arch/arm/plat-omap/common.c| 10 ++
arch/arm/plat-omap/include/plat/common.h |3 +--
18 files changed, 19 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index f474a80..e3c2ffd 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -805,7 +805,7 @@ static void __init omap_3430sdp_init(void)
static void __init omap_3430sdp_map_io(void)
{
- omap2_set_globals_343x();
+ omap2_set_globals_3xxx();
omap34xx_map_common_io();
}
diff --git a/arch/arm/mach-omap2/board-3630sdp.c
b/arch/arm/mach-omap2/board-3630sdp.c
index f267dc0..1942951 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -67,7 +67,7 @@ static const struct ehci_hcd_omap_platform_data ehci_pdata
__initconst = {
static void __init omap_sdp_map_io(void)
{
- omap2_set_globals_36xx();
+ omap2_set_globals_3xxx();
omap34xx_map_common_io();
}
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index af383a8..f326d59 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -463,7 +463,7 @@ static void __init am3517_evm_init(void)
static void __init am3517_evm_map_io(void)
{
- omap2_set_globals_343x();
+ omap2_set_globals_3xxx();
omap34xx_map_common_io();
}
diff --git a/arch/arm/mach-omap2/board-cm-t35.c
b/arch/arm/mach-omap2/board-cm-t35.c
index e679a2c..6692ba0 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -710,7 +710,7 @@ static void __init cm_t35_init_irq(void)
static void __init cm_t35_map_io(void)
{
- omap2_set_globals_343x();
+ omap2_set_globals_3xxx();
omap34xx_map_common_io();
}
diff --git a/arch/arm/mach-omap2/board-devkit8000.c
b/arch/arm/mach-omap2/board-devkit8000.c
index ca4d521..461635b 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -810,7 +810,7 @@ static void __init devkit8000_init(void)
static void __init devkit8000_map_io(void)
{
- omap2_set_globals_343x();
+ omap2_set_globals_3xxx();
omap34xx_map_common_io();
}
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index d55c57b..7eefbc3 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -534,7 +534,7 @@ static void __init igep2_init(void)
static void __init igep2_map_io(void)
{
- omap2_set_globals_343x();
+ omap2_set_globals_3xxx();
omap34xx_map_common_io();
}
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index fefd7e6..f7c0a2a 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -408,7 +408,7 @@ static void __init omap_ldp_init(void)
static void __init omap_ldp_map_io(void)
{
- omap2_set_globals_343x();
+ omap2_set_globals_3xxx();
omap34xx_map_common_io();
}
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 69b154c..518a3f7 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -509,7 +509,7 @@ static void __init omap3_beagle_init(void)
static void __init omap3_beagle_map_io(void)
{
- omap2_set_globals_343x();
+ omap2_set_globals_3xxx();
omap34xx_map_common_io();
}
diff --git
[PATCH 07/13] omap3: introduce omap3_map_io
From: Mike Rapoport m...@compulab.co.il
Most OMAP3-based boards use exactly the same code for .map_io method in
the machine_desc structure.
This patch introduces omap3_map_io and updates board-* files to use it
as .map_io method.
Signed-off-by: Mike Rapoport m...@compulab.co.il
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/board-3430sdp.c|8 +---
arch/arm/mach-omap2/board-3630sdp.c|8 +---
arch/arm/mach-omap2/board-am3517evm.c |8 +---
arch/arm/mach-omap2/board-cm-t35.c |8 +---
arch/arm/mach-omap2/board-devkit8000.c |8 +---
arch/arm/mach-omap2/board-igep0020.c |8 +---
arch/arm/mach-omap2/board-ldp.c|8 +---
arch/arm/mach-omap2/board-omap3beagle.c|8 +---
arch/arm/mach-omap2/board-omap3evm.c |8 +---
arch/arm/mach-omap2/board-omap3pandora.c |8 +---
arch/arm/mach-omap2/board-omap3stalker.c |8 +---
arch/arm/mach-omap2/board-omap3touchbook.c |8 +---
arch/arm/mach-omap2/board-overo.c |8 +---
arch/arm/mach-omap2/board-zoom2.c |8 +---
arch/arm/mach-omap2/board-zoom3.c |8 +---
arch/arm/plat-omap/common.c|6 ++
arch/arm/plat-omap/include/plat/common.h |2 ++
17 files changed, 23 insertions(+), 105 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index e3c2ffd..e51f8e3 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -803,18 +803,12 @@ static void __init omap_3430sdp_init(void)
usb_ehci_init(ehci_pdata);
}
-static void __init omap_3430sdp_map_io(void)
-{
- omap2_set_globals_3xxx();
- omap34xx_map_common_io();
-}
-
MACHINE_START(OMAP_3430SDP, OMAP3430 3430SDP board)
/* Maintainer: Syed Khasim - Texas Instruments Inc */
.phys_io= 0x4800,
.io_pg_offst= ((0xfa00) 18) 0xfffc,
.boot_params= 0x8100,
- .map_io = omap_3430sdp_map_io,
+ .map_io = omap3_map_io,
.init_irq = omap_3430sdp_init_irq,
.init_machine = omap_3430sdp_init,
.timer = omap_timer,
diff --git a/arch/arm/mach-omap2/board-3630sdp.c
b/arch/arm/mach-omap2/board-3630sdp.c
index 1942951..8b7c2f9 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -65,12 +65,6 @@ static const struct ehci_hcd_omap_platform_data ehci_pdata
__initconst = {
.reset_gpio_port[2] = -EINVAL
};
-static void __init omap_sdp_map_io(void)
-{
- omap2_set_globals_3xxx();
- omap34xx_map_common_io();
-}
-
static struct omap_board_config_kernel sdp_config[] __initdata = {
};
@@ -106,7 +100,7 @@ MACHINE_START(OMAP_3630SDP, OMAP 3630SDP board)
.phys_io= 0x4800,
.io_pg_offst= ((0xfa00) 18) 0xfffc,
.boot_params= 0x8100,
- .map_io = omap_sdp_map_io,
+ .map_io = omap3_map_io,
.init_irq = omap_sdp_init_irq,
.init_machine = omap_sdp_init,
.timer = omap_timer,
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index f326d59..bbfdc6e 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -461,17 +461,11 @@ static void __init am3517_evm_init(void)
am3517_evm_ethernet_init(am3517_evm_emac_pdata);
}
-static void __init am3517_evm_map_io(void)
-{
- omap2_set_globals_3xxx();
- omap34xx_map_common_io();
-}
-
MACHINE_START(OMAP3517EVM, OMAP3517/AM3517 EVM)
.phys_io= 0x4800,
.io_pg_offst= ((0xd800) 18) 0xfffc,
.boot_params= 0x8100,
- .map_io = am3517_evm_map_io,
+ .map_io = omap3_map_io,
.init_irq = am3517_evm_init_irq,
.init_machine = am3517_evm_init,
.timer = omap_timer,
diff --git a/arch/arm/mach-omap2/board-cm-t35.c
b/arch/arm/mach-omap2/board-cm-t35.c
index 6692ba0..79d6b15 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -708,12 +708,6 @@ static void __init cm_t35_init_irq(void)
omap_gpio_init();
}
-static void __init cm_t35_map_io(void)
-{
- omap2_set_globals_3xxx();
- omap34xx_map_common_io();
-}
-
static struct omap_board_mux board_mux[] __initdata = {
/* nCS and IRQ for CM-T35 ethernet */
OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
@@ -836,7 +830,7 @@ MACHINE_START(CM_T35, Compulab CM-T35)
.phys_io= 0x4800,
.io_pg_offst= ((0xd800) 18) 0xfffc,
.boot_params= 0x8100,
- .map_io = cm_t35_map_io,
+ .map_io = omap3_map_io,
.init_irq = cm_t35_init_irq,
.init_machine = cm_t35_init,
[PATCH 08/13] omap: mux: fix multipath gpio handling
From: Grazvydas Ignotas nota...@gmail.com
OMAP3530 CBB package can have GPIO126 muxed on 2 pins: mmc1_dat4 and
cam_strobe. This causes a problem with current multipath GPIO mux
handling, which muxes both pins as GPIO126 and makes the GPIO unusable.
Fix this by not muxing any pins if multipath GPIO is detected and
just print a warning instead. It's up to board files to set correct
mux using omap_mux_init_signal and pin name.
Signed-off-by: Grazvydas Ignotas nota...@gmail.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/mux.c | 38 --
1 files changed, 20 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index be52fab..ab403b2 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -87,6 +87,9 @@ static char *omap_mux_options;
int __init omap_mux_init_gpio(int gpio, int val)
{
struct omap_mux_entry *e;
+ struct omap_mux *gpio_mux;
+ u16 old_mode;
+ u16 mux_mode;
int found = 0;
if (!gpio)
@@ -95,34 +98,33 @@ int __init omap_mux_init_gpio(int gpio, int val)
list_for_each_entry(e, muxmodes, node) {
struct omap_mux *m = e-mux;
if (gpio == m-gpio) {
- u16 old_mode;
- u16 mux_mode;
-
- old_mode = omap_mux_read(m-reg_offset);
- mux_mode = val ~(OMAP_MUX_NR_MODES - 1);
- if (omap_mux_flags MUXABLE_GPIO_MODE3)
- mux_mode |= OMAP_MUX_MODE3;
- else
- mux_mode |= OMAP_MUX_MODE4;
- printk(KERN_DEBUG mux: Setting signal
- %s.gpio%i 0x%04x - 0x%04x\n,
- m-muxnames[0], gpio, old_mode, mux_mode);
- omap_mux_write(mux_mode, m-reg_offset);
+ gpio_mux = m;
found++;
}
}
- if (found == 1)
- return 0;
+ if (found == 0) {
+ printk(KERN_ERR mux: Could not set gpio%i\n, gpio);
+ return -ENODEV;
+ }
if (found 1) {
- printk(KERN_ERR mux: Multiple gpio paths for gpio%i\n, gpio);
+ printk(KERN_INFO mux: Multiple gpio paths (%d) for gpio%i\n,
+ found, gpio);
return -EINVAL;
}
- printk(KERN_ERR mux: Could not set gpio%i\n, gpio);
+ old_mode = omap_mux_read(gpio_mux-reg_offset);
+ mux_mode = val ~(OMAP_MUX_NR_MODES - 1);
+ if (omap_mux_flags MUXABLE_GPIO_MODE3)
+ mux_mode |= OMAP_MUX_MODE3;
+ else
+ mux_mode |= OMAP_MUX_MODE4;
+ printk(KERN_DEBUG mux: Setting signal %s.gpio%i 0x%04x - 0x%04x\n,
+ gpio_mux-muxnames[0], gpio, old_mode, mux_mode);
+ omap_mux_write(mux_mode, gpio_mux-reg_offset);
- return -ENODEV;
+ return 0;
}
int __init omap_mux_init_signal(char *muxname, int val)
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[PATCH 09/13] omap: dma: Support for prefetch in destination synchronizedtransfer
From: Samu Onkalo samu.p.onk...@nokia.com
Omap DMA controller can prefetch data in advance in case of
destination synchronized data transfer. This may increase
performance when target HW block doesn't have fifo.
Data is waiting for transfer request in DMA fifo instead of read from memory.
Signed-off-by: Samu Onkalo samu.p.onk...@nokia.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/plat-omap/dma.c | 11 +++
arch/arm/plat-omap/include/plat/dma.h |1 +
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index f7f571e..ec7eddf 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -290,7 +290,7 @@ void omap_set_dma_transfer_params(int lch, int data_type,
int elem_count,
val = dma_read(CCR(lch));
/* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */
- val = ~((3 19) | 0x1f);
+ val = ~((1 23) | (3 19) | 0x1f);
val |= (dma_trigger ~0x1f) 14;
val |= dma_trigger 0x1f;
@@ -304,11 +304,14 @@ void omap_set_dma_transfer_params(int lch, int data_type,
int elem_count,
else
val = ~(1 18);
- if (src_or_dst_synch)
+ if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) {
+ val = ~(1 24); /* dest synch */
+ val |= (1 23); /* Prefetch */
+ } else if (src_or_dst_synch) {
val |= 1 24; /* source synch */
- else
+ } else {
val = ~(1 24); /* dest synch */
-
+ }
dma_write(val, CCR(lch));
}
diff --git a/arch/arm/plat-omap/include/plat/dma.h
b/arch/arm/plat-omap/include/plat/dma.h
index 02232ca..af3a039 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -345,6 +345,7 @@
#define OMAP_DMA_SYNC_BLOCK0x02
#define OMAP_DMA_SYNC_PACKET 0x03
+#define OMAP_DMA_DST_SYNC_PREFETCH 0x02
#define OMAP_DMA_SRC_SYNC 0x01
#define OMAP_DMA_DST_SYNC 0x00
--
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[PATCH 11/13] omap: Add new interface omap_get_die_id
From: Kan-Ru Chen ka...@0xlab.org
Allow DIE id to be get and used by others.
Signed-off-by: Kan-Ru Chen ka...@0xlab.org
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/id.c | 10 ++
arch/arm/mach-omap2/include/mach/id.h | 22 ++
2 files changed, 32 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/include/mach/id.h
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index ccaa1ed..d079ccf 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -25,6 +25,8 @@
#include plat/control.h
#include plat/cpu.h
+#include mach/id.h
+
static struct omap_chip_id omap_chip;
static unsigned int omap_revision;
@@ -102,6 +104,14 @@ static struct omap_id omap_ids[] __initdata = {
static void __iomem *tap_base;
static u16 tap_prod_id;
+void omap_get_die_id(struct omap_die_id *odi)
+{
+ odi-id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0);
+ odi-id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1);
+ odi-id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2);
+ odi-id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
+}
+
static void __init omap24xx_check_revision(void)
{
int i, j;
diff --git a/arch/arm/mach-omap2/include/mach/id.h
b/arch/arm/mach-omap2/include/mach/id.h
new file mode 100644
index 000..02ed3aa
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/id.h
@@ -0,0 +1,22 @@
+/*
+ * OMAP2 CPU identification code
+ *
+ * Copyright (C) 2010 Kan-Ru Chen ka...@0xlab.org
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef OMAP2_ARCH_ID_H
+#define OMAP2_ARCH_ID_H
+
+struct omap_die_id {
+ u32 id_0;
+ u32 id_1;
+ u32 id_2;
+ u32 id_3;
+};
+
+void omap_get_die_id(struct omap_die_id *odi);
+
+#endif
--
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[PATCH 12/13] omap: Use omap_get_die_id() to get the DIE ids
From: Kan-Ru Chen ka...@0xlab.org Signed-off-by: Kan-Ru Chen ka...@0xlab.org Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap2/id.c | 14 ++ 1 files changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index d079ccf..fd1904b 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -118,24 +118,22 @@ static void __init omap24xx_check_revision(void) u32 idcode, prod_id; u16 hawkeye; u8 dev_type, rev; + struct omap_die_id odi; idcode = read_tap_reg(OMAP_TAP_IDCODE); prod_id = read_tap_reg(tap_prod_id); hawkeye = (idcode 12) 0x; rev = (idcode 28) 0x0f; dev_type = (prod_id 16) 0x0f; + omap_get_die_id(odi); pr_debug(OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n, idcode, rev, hawkeye, (idcode 1) 0x7ff); - pr_debug(OMAP_TAP_DIE_ID_0: 0x%08x\n, -read_tap_reg(OMAP_TAP_DIE_ID_0)); + pr_debug(OMAP_TAP_DIE_ID_0: 0x%08x\n, odi.id_0); pr_debug(OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n, -read_tap_reg(OMAP_TAP_DIE_ID_1), -(read_tap_reg(OMAP_TAP_DIE_ID_1) 28) 0xf); - pr_debug(OMAP_TAP_DIE_ID_2: 0x%08x\n, -read_tap_reg(OMAP_TAP_DIE_ID_2)); - pr_debug(OMAP_TAP_DIE_ID_3: 0x%08x\n, -read_tap_reg(OMAP_TAP_DIE_ID_3)); +odi.id_1, (odi.id_1 28) 0xf); + pr_debug(OMAP_TAP_DIE_ID_2: 0x%08x\n, odi.id_2); + pr_debug(OMAP_TAP_DIE_ID_3: 0x%08x\n, odi.id_3); pr_debug(OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n, prod_id, dev_type); -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 10/13] OMAP3: AM3505/3517 do not have IO wakeup capability
From: stanley.miao stanley.m...@windriver.com
AM3505/3517 doesn't have IO wakeup capability, so we do not need to set
the bit OMAP3430_EN_IO and the bit OMAP3430_EN_IO_CHAIN in the register
PM_WKEN_WKUP when the system enters suspend state.
Tested on AM3517EVM and OMAP3530EVM.
Signed-off-by: Stanley.Miao stanley.m...@windriver.com
Acked-by: Kevin Hilman khil...@deeprootsystems.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/id.c |2 ++
arch/arm/mach-omap2/pm34xx.c |7 ---
arch/arm/plat-omap/include/plat/cpu.h |2 ++
3 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index c7bf0e1..ccaa1ed 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -179,6 +179,8 @@ static void __init omap3_check_features(void)
OMAP3_CHECK_FEATURE(status, ISP);
if (cpu_is_omap3630())
omap3_features |= OMAP3_HAS_192MHZ_CLK;
+ if (!cpu_is_omap3505() !cpu_is_omap3517())
+ omap3_features |= OMAP3_HAS_IO_WAKEUP;
/*
* TODO: Get additional info (where applicable)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index b88737f..fb4994a 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -385,8 +385,9 @@ void omap_sram_idle(void)
/* Enable IO-PAD and IO-CHAIN wakeups */
per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
- if (per_next_state PWRDM_POWER_ON ||
- core_next_state PWRDM_POWER_ON) {
+ if (omap3_has_io_wakeup() \
+ (per_next_state PWRDM_POWER_ON ||
+ core_next_state PWRDM_POWER_ON)) {
prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
omap3_enable_io_chain();
}
@@ -479,7 +480,7 @@ void omap_sram_idle(void)
}
/* Disable IO-PAD and IO-CHAIN wakeup */
- if (core_next_state PWRDM_POWER_ON) {
+ if (omap3_has_io_wakeup() core_next_state PWRDM_POWER_ON) {
prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
omap3_disable_io_chain();
}
diff --git a/arch/arm/plat-omap/include/plat/cpu.h
b/arch/arm/plat-omap/include/plat/cpu.h
index 7514174..aa2f4f0 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -444,6 +444,7 @@ extern u32 omap3_features;
#define OMAP3_HAS_NEON BIT(3)
#define OMAP3_HAS_ISP BIT(4)
#define OMAP3_HAS_192MHZ_CLK BIT(5)
+#define OMAP3_HAS_IO_WAKEUPBIT(6)
#define OMAP3_HAS_FEATURE(feat,flag) \
static inline unsigned int omap3_has_ ##feat(void) \
@@ -457,5 +458,6 @@ OMAP3_HAS_FEATURE(iva, IVA)
OMAP3_HAS_FEATURE(neon, NEON)
OMAP3_HAS_FEATURE(isp, ISP)
OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
+OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
#endif
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[PATCH 13/13] omap: Devkit8000: Use DIE id to initialize dm9000 MAC address
From: Kan-Ru Chen ka...@0xlab.org
The devkit8000 boards often come with empty EEPROM thus without
valid ethernet MAC address. The DIE id to MAC formula is copied from
u-boot.
Signed-off-by: Kan-Ru Chen ka...@0xlab.org
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/board-devkit8000.c | 14 ++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-devkit8000.c
b/arch/arm/mach-omap2/board-devkit8000.c
index 19da458..4b7103a 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -33,6 +33,7 @@
#include linux/i2c/twl.h
#include mach/hardware.h
+#include mach/id.h
#include asm/mach-types.h
#include asm/mach/arch.h
#include asm/mach/map.h
@@ -556,6 +557,9 @@ static struct platform_device omap_dm9000_dev = {
static void __init omap_dm9000_init(void)
{
+ unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
+ struct omap_die_id odi;
+
if (gpio_request(OMAP_DM9000_GPIO_IRQ, dm9000 irq) 0) {
printk(KERN_ERR Failed to request GPIO%d for dm9000 IRQ\n,
OMAP_DM9000_GPIO_IRQ);
@@ -563,6 +567,16 @@ static void __init omap_dm9000_init(void)
}
gpio_direction_input(OMAP_DM9000_GPIO_IRQ);
+
+ /* init the mac address using DIE id */
+ omap_get_die_id(odi);
+
+ eth_addr[0] = 0x02; /* locally administered */
+ eth_addr[1] = odi.id_1 0xff;
+ eth_addr[2] = (odi.id_0 0xff00) 24;
+ eth_addr[3] = (odi.id_0 0x00ff) 16;
+ eth_addr[4] = (odi.id_0 0xff00) 8;
+ eth_addr[5] = (odi.id_0 0x00ff);
}
static struct platform_device *devkit8000_devices[] __initdata = {
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[PATCH] omap: rx51: Platform support for tsl2563 ALS
From: Mathias Nyman mathias.ny...@nokia.com
This will enable usage of tsl2563 ambient light sensor on Nokia N900.
Signed-off-by: Ameya Palande ameya.pala...@nokia.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c | 14 ++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 3c3f975..a3a396c 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -35,6 +35,8 @@
#include sound/tlv320aic3x.h
#include sound/tpa6130a2-plat.h
+#include ../drivers/staging/iio/light/tsl2563.h
+
#include mux.h
#include hsmmc.h
@@ -53,6 +55,12 @@ enum {
static struct wl12xx_platform_data wl1251_pdata;
+#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
+static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
+ .cover_comp_gain = 16,
+};
+#endif
+
static struct omap2_mcspi_device_config wl1251_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1,
@@ -714,6 +722,12 @@ static struct i2c_board_info __initdata
rx51_peripherals_i2c_board_info_2[] = {
I2C_BOARD_INFO(tlv320aic3x, 0x18),
.platform_data = rx51_aic3x_data,
},
+#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
+ {
+ I2C_BOARD_INFO(tsl2563, 0x29),
+ .platform_data = rx51_tsl2563_platform_data,
+ },
+#endif
{
I2C_BOARD_INFO(tpa6130a2, 0x60),
.platform_data = rx51_tpa6130a2_data,
--
1.7.0.4
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Re: [PATCH 3/9 v3] omap: generic: introduce a single check_revision
Tony Lindgren had written, on 07/08/2010 07:21 AM, the following: * Menon, Nishanth n...@ti.com [100708 14:49]: - Original message - Hi, On Wed, Jul 07, 2010 at 07:24:16PM +0200, ext Nishanth Menon wrote: I am not sure.. if you would like drivers to be modprobabe, there may be quirks that you'd want to enable based on cpu_is_omapxxx checks. so it probably does not make sense to __initdata the revision/feature variables. can't you pass the quirks via pdata, then ? If pdata is passed based on board: Imagine 3630 and uart quirk. Why share errata xyz over pdata for every board using 3630? Quirks are cpu specific and not really domain of board.. We should be able to handle the quirks by passing some flag or function pointer from platform data. The drivers should be arch independent, using cpu_is_omap tests anywhere under drivers/* is wrong and should be fixed. there are two forms of quirks: a) quirks which can be detected based on IP rev b) quirks which are silicon integration related - only cpu_is_ can be used to detect them. for a) - I disagree that pdata should be used (this was my original contention) for b) the question IMHO is: How is pdata provided to the driver - that is important. IMHO, pdata taken into drivers could have quirks, but if the quirk addition is done from board files, I disagree, then should be done in arch/arm/mach-omap[12]/somefile.c where somefile.c is common for all boards (e.g. device.c) and that allows the driver to be cpu independent and allows board files not to have redundant information. BUT, features *should* be kept distinct from quirks for readability purposes. -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/5] omap: Implement common omap_has_feature
Tony Lindgren had written, on 07/08/2010 04:37 AM, the following:
Implement common omap_has_feature.
Intended to replace omap3_has_ functions
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/id.c | 32
arch/arm/plat-omap/common.c | 15 +++
arch/arm/plat-omap/include/plat/cpu.h |3 +++
3 files changed, 50 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index fd1904b..a2e5965 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -29,7 +29,9 @@
static struct omap_chip_id omap_chip;
static unsigned int omap_revision;
+static u32 omap_features;
+/* REVISIT: Get rid of omap3_features */
u32 omap3_features;
unsigned int omap_rev(void)
@@ -112,6 +114,12 @@ void omap_get_die_id(struct omap_die_id *odi)
odi-id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
}
+u32 omap2_has_feature(u32 feat_mask)
+{
+ /* REVISIT: Add necessary omap2 feature tests here */
+ return ((feat_mask omap_features) == feat_mask);
+}
+
I did consider this path initially,
a) Additional functional call overhead here. some of the calls to
has_feature() will get called through pretty active paths, we would like
it to be minimized to compile time optimized inline function as much as
possible.(no reason why this cant me a inline macro in cpu.h?) -
the original series received a similar comment:
http://marc.info/?l=linux-omapm=125018002127428w=2
static void __init omap24xx_check_revision(void)
{
int i, j;
@@ -164,6 +172,15 @@ static void __init omap24xx_check_revision(void)
if ((omap_rev() 8) 0x0f)
pr_info(ES%x, (omap_rev() 12) 0xf);
pr_info(\n);
+
+ omap_features = 0;
+ omap_init_features(omap2_has_feature);
+}
+
+u32 omap3_has_feature(u32 feat_mask)
+{
+ /* REVISIT: Add necessary omap3 feature tests here */
+ return ((feat_mask omap_features) == feat_mask);
}
#define OMAP3_CHECK_FEATURE(status,feat)\
@@ -194,6 +211,11 @@ static void __init omap3_check_features(void)
* TODO: Get additional info (where applicable)
* e.g. Size of L2 cache.
*/
+
+ /* REVISIT: Get rid of omap3_features */
+ omap_features = omap3_features;
+
+ omap_init_features(omap3_has_feature);
}
static void __init omap3_check_revision(void)
@@ -277,6 +299,12 @@ static void __init omap3_check_revision(void)
}
}
+u32 omap4_has_feature(u32 feat_mask)
+{
+ /* REVISIT: Add necessary omap4 feature tests here */
+ return ((feat_mask omap_features) == feat_mask);
+}
+
static void __init omap4_check_revision(void)
{
u32 idcode;
@@ -297,6 +325,10 @@ static void __init omap4_check_revision(void)
omap_revision = OMAP4430_REV_ES1_0;
omap_chip.oc |= CHIP_IS_OMAP4430ES1;
pr_info(OMAP%04x %s\n, omap_rev() 16, rev_name);
+
+ omap_features = 0;
+ omap_init_features(omap4_has_feature);
+
return;
}
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 893a53a..d00b242 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -89,6 +89,21 @@ void __init omap_reserve(void)
omap_vram_reserve_sdram_lmb();
}
+static int (*_omap_check_feature)(u32 feat_mask);
+
+u32 omap_has_feature(u32 feat_mask)
+{
+ if (!_omap_check_feature)
+ return 0;
+
+ return _omap_check_feature(feat_mask);
+}
+
+void __init omap_init_features(u32 (*check_feature)(u32 feat))
+{
+ _omap_check_feature = check_feature;
+}
+
/*
* 32KHz clocksource ... always available, on pretty most chips except
* OMAP 730 and 1510. Other timers could be used as clocksources, with
diff --git a/arch/arm/plat-omap/include/plat/cpu.h
b/arch/arm/plat-omap/include/plat/cpu.h
index aa2f4f0..127df06 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -49,6 +49,9 @@ struct omap_chip_id {
u8 type;
};
+u32 omap_has_feature(u32 feat_mask);
the above crib - it is better as an static inline function instead of
explicit function call.
+void omap_init_features(u32 (*check_feature)(u32 feat));
+
#define OMAP_CHIP_INIT(x) { .oc = x }
/*
--
Regards,
Nishanth Menon
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Re: [PATCH 3/5] omap: Replace omap3_has_ macros with omap_has_feature
Tony Lindgren had written, on 07/08/2010 04:37 AM, the following:
Replace omap3_has_ macros with omap_has_feature
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/clock3xxx_data.c |2 +-
arch/arm/mach-omap2/id.c | 22 +++---
arch/arm/mach-omap2/pm34xx.c |2 +-
arch/arm/plat-omap/include/plat/cpu.h | 12 ++--
4 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index c226798..2d2248f 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3435,7 +3435,7 @@ int __init omap3xxx_clk_init(void)
cpu_clkflg |= CK_3505;
}
- if (omap3_has_192mhz_clk())
+ if (omap_has_feature(OMAP3_HAS_192MHZ_CLK))
omap_96m_alwon_fck = omap_96m_alwon_fck_3630;
if (cpu_is_omap3630()) {
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index a2e5965..11184cf 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -336,7 +336,7 @@ static void __init omap4_check_revision(void)
}
#define OMAP3_SHOW_FEATURE(feat) \
- if (omap3_has_ ##feat())\
+ if (omap_has_feature(feat)) \
printk(#feat );
static void __init omap3_cpuinfo(void)
@@ -356,20 +356,20 @@ static void __init omap3_cpuinfo(void)
/*
* AM35xx devices
*/
- if (omap3_has_sgx()) {
+ if (omap_has_feature(OMAP3_HAS_SGX)) {
omap_revision = OMAP3517_REV(rev);
strcpy(cpu_name, AM3517);
} else {
/* Already set in omap3_check_revision() */
strcpy(cpu_name, AM3505);
}
- } else if (omap3_has_iva() omap3_has_sgx()) {
+ } else if (omap_has_feature(OMAP3_HAS_IVA | OMAP3_HAS_SGX)) {
/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
strcpy(cpu_name, OMAP3430/3530);
- } else if (omap3_has_iva()) {
+ } else if (omap_has_feature(OMAP3_HAS_IVA)) {
omap_revision = OMAP3525_REV(rev);
strcpy(cpu_name, OMAP3525);
- } else if (omap3_has_sgx()) {
+ } else if (omap_has_feature(OMAP3_HAS_SGX)) {
omap_revision = OMAP3515_REV(rev);
strcpy(cpu_name, OMAP3515);
} else {
@@ -400,12 +400,12 @@ static void __init omap3_cpuinfo(void)
/* Print verbose information */
pr_info(%s ES%s (, cpu_name, cpu_rev);
- OMAP3_SHOW_FEATURE(l2cache);
- OMAP3_SHOW_FEATURE(iva);
- OMAP3_SHOW_FEATURE(sgx);
- OMAP3_SHOW_FEATURE(neon);
- OMAP3_SHOW_FEATURE(isp);
- OMAP3_SHOW_FEATURE(192mhz_clk);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_L2CACHE);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_IVA);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_SGX);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_NEON);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_ISP);
+ OMAP3_SHOW_FEATURE(OMAP3_HAS_192MHZ_CLK);
printk()\n);
}
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fb4994a..32e1005 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -385,7 +385,7 @@ void omap_sram_idle(void)
/* Enable IO-PAD and IO-CHAIN wakeups */
per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
- if (omap3_has_io_wakeup() \
+ if (omap_has_feature(OMAP3_HAS_IO_WAKEUP) \
(per_next_state PWRDM_POWER_ON ||
core_next_state PWRDM_POWER_ON)) {
prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
diff --git a/arch/arm/plat-omap/include/plat/cpu.h
b/arch/arm/plat-omap/include/plat/cpu.h
index 127df06..efee323 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -334,14 +334,14 @@ IS_OMAP_TYPE(3517, 0x3517)
# undef cpu_is_omap3517
# define cpu_is_omap3430() is_omap3430()
# define cpu_is_omap3503() (cpu_is_omap3430()\
- (!omap3_has_iva())\
- (!omap3_has_sgx()))
+(!omap_has_feature(OMAP3_HAS_IVA)
\
+
(!omap_has_feature(OMAP3_HAS_SGX)))
# define cpu_is_omap3515() (cpu_is_omap3430()\
- (!omap3_has_iva())\
- (omap3_has_sgx()))
+ (!omap_has_feature(OMAP3_HAS_IVA))
\
+
(omap_has_feature(OMAP3_HAS_SGX)))
# define cpu_is_omap3525() (cpu_is_omap3430()
Re: [PATCH 4/5] omap: Remove old omap3_has_ macros
Tony Lindgren had written, on 07/08/2010 04:38 AM, the following:
Remove old omap3_has_ macros. Please use omap_has_feature()
instead.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/id.c | 14 --
arch/arm/plat-omap/include/plat/cpu.h | 16
2 files changed, 4 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 11184cf..123ed1e 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -31,9 +31,6 @@ static struct omap_chip_id omap_chip;
static unsigned int omap_revision;
static u32 omap_features;
-/* REVISIT: Get rid of omap3_features */
-u32 omap3_features;
-
unsigned int omap_rev(void)
{
return omap_revision;
@@ -186,14 +183,14 @@ u32 omap3_has_feature(u32 feat_mask)
#define OMAP3_CHECK_FEATURE(status,feat) \
if (((status OMAP3_ ##feat## _MASK) \
OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \
- omap3_features |= OMAP3_HAS_ ##feat;\
+ omap_features |= OMAP3_HAS_ ##feat; \
}
static void __init omap3_check_features(void)
{
u32 status;
- omap3_features = 0;
+ omap_features = 0;
status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS);
@@ -203,18 +200,15 @@ static void __init omap3_check_features(void)
OMAP3_CHECK_FEATURE(status, NEON);
OMAP3_CHECK_FEATURE(status, ISP);
if (cpu_is_omap3630())
- omap3_features |= OMAP3_HAS_192MHZ_CLK;
+ omap_features |= OMAP3_HAS_192MHZ_CLK;
if (!cpu_is_omap3505() !cpu_is_omap3517())
- omap3_features |= OMAP3_HAS_IO_WAKEUP;
+ omap_features |= OMAP3_HAS_IO_WAKEUP;
/*
* TODO: Get additional info (where applicable)
* e.g. Size of L2 cache.
*/
- /* REVISIT: Get rid of omap3_features */
- omap_features = omap3_features;
-
omap_init_features(omap3_has_feature);
}
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index efee323..96eac4d 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -439,8 +439,6 @@ void omap2_check_revision(void);
/*
* Runtime detection of OMAP3 features
*/
-extern u32 omap3_features;
-
#define OMAP3_HAS_L2CACHE BIT(0)
#define OMAP3_HAS_IVA BIT(1)
#define OMAP3_HAS_SGX BIT(2)
@@ -449,18 +447,4 @@ extern u32 omap3_features;
#define OMAP3_HAS_192MHZ_CLK BIT(5)
#define OMAP3_HAS_IO_WAKEUPBIT(6)
-#define OMAP3_HAS_FEATURE(feat,flag) \
-static inline unsigned int omap3_has_ ##feat(void) \
-{ \
- return (omap3_features OMAP3_HAS_ ##flag);\
-} \
-
-OMAP3_HAS_FEATURE(l2cache, L2CACHE)
-OMAP3_HAS_FEATURE(sgx, SGX)
-OMAP3_HAS_FEATURE(iva, IVA)
-OMAP3_HAS_FEATURE(neon, NEON)
-OMAP3_HAS_FEATURE(isp, ISP)
-OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
-OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
-
#endif
Acked-by: Nishanth Menon n...@ti.com
--
Regards,
Nishanth Menon
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Re: [PATCH 5/5] omap: Allow testing for omap type with omap_has_feature
Tony Lindgren had written, on 07/08/2010 04:38 AM, the following: Allow testing for omap type with omap_has_feature. This can be used to leave out cpu_is_omap checks. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/plat-omap/include/plat/cpu.h | 38 ++--- 1 files changed, 30 insertions(+), 8 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 96eac4d..c117c3c 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -437,14 +437,36 @@ int omap_chip_is(struct omap_chip_id oci); void omap2_check_revision(void); /* - * Runtime detection of OMAP3 features + * Runtime detection of OMAP features */ -#define OMAP3_HAS_L2CACHE BIT(0) -#define OMAP3_HAS_IVA BIT(1) -#define OMAP3_HAS_SGX BIT(2) -#define OMAP3_HAS_NEON BIT(3) -#define OMAP3_HAS_ISP BIT(4) -#define OMAP3_HAS_192MHZ_CLK BIT(5) -#define OMAP3_HAS_IO_WAKEUPBIT(6) +#define OMAP_FEAT_CLASS_OMAP1 BIT(24) +#define OMAP_FEAT_CLASS_OMAP2 BIT(25) +#define OMAP_FEAT_CLASS_OMAP3 BIT(26) +#define OMAP_FEAT_CLASS_OMAP4 BIT(27) + +#define OMAP_HAS_L2CACHE BIT(0) +#define OMAP_HAS_IVA BIT(1) +#define OMAP_HAS_SGX BIT(2) +#define OMAP_HAS_NEON BIT(3) +#define OMAP_HAS_ISP BIT(4) +#define OMAP_HAS_192MHZ_CLKBIT(5) +#define OMAP_HAS_IO_WAKEUP BIT(6) + +#define OMAP2_HAS_IVA OMAP_FEAT_CLASS_OMAP2 | OMAP_HAS_IVA +#define OMAP2_HAS_SGX OMAP_FEAT_CLASS_OMAP2 | OMAP_HAS_SGX + +#define OMAP3_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_L2CACHE +#define OMAP3_HAS_IVA OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_IVA +#define OMAP3_HAS_SGX OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_SGX +#define OMAP3_HAS_NEON OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_NEON +#define OMAP3_HAS_ISP OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_ISP +#define OMAP3_HAS_192MHZ_CLK OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_192MHZ_CLK +#define OMAP3_HAS_IO_WAKEUPOMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_IOWAKEUP + +#define OMAP4_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_L2CACHE +#define OMAP4_HAS_IVA OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_IVA +#define OMAP4_HAS_SGX OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_SGX +#define OMAP4_HAS_NEON OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_NEON +#define OMAP4_HAS_ISP OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_ISP #endif here is my contention: there will be two ways to use this: omap_has_feature(OMAP_HAS_SGX) and omap_has_feature(OMAP3_HAS_SGX) OMAP_HAS_SGX should return true or false no matter what omap silicon it is. OMAP3_HAS_SGX usage is meant for what? it is a mixture of cpu_is_omap3() and omap_has_feature(OMAP_HAS_SGX) - tries to do two things in one shot. which defeats why we are trying to introduce a generic omap_has_feature in the first place. a) confusing as there seems to be two standards b) redundant information use cpu_is_omapxyz() if needed. IMHO: +#define OMAP_HAS_L2CACHE BIT(0) +#define OMAP_HAS_IVA BIT(1) +#define OMAP_HAS_SGX BIT(2) +#define OMAP_HAS_NEON BIT(3) +#define OMAP_HAS_ISP BIT(4) +#define OMAP3_HAS_192MHZ_CLK BIT(5) +#define OMAP_HAS_IO_WAKEUP BIT(6) and later if needed +#define OMAP4_SOME_NEW_OMAP4ONLY_FEATURE BIT(7) where OMAP3_HAS is indicative that this is a OMAP3 *only* feature and should be used to differentiate between various omap3 silicon. Benefits: a) distinction b/w omap generic and omap family specific features b) you get to define 32 features instead of reserving 24-32 for OMAP classes. -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 5/5] omap: Allow testing for omap type with omap_has_feature
On Thu, Jul 8, 2010 at 8:33 PM, Nishanth Menon n...@ti.com wrote:
Tony Lindgren had written, on 07/08/2010 04:38 AM, the following:
Allow testing for omap type with omap_has_feature. This
can be used to leave out cpu_is_omap checks.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/plat-omap/include/plat/cpu.h | 38
++---
1 files changed, 30 insertions(+), 8 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/cpu.h
b/arch/arm/plat-omap/include/plat/cpu.h
index 96eac4d..c117c3c 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -437,14 +437,36 @@ int omap_chip_is(struct omap_chip_id oci);
void omap2_check_revision(void);
/*
- * Runtime detection of OMAP3 features
+ * Runtime detection of OMAP features
*/
-#define OMAP3_HAS_L2CACHE BIT(0)
-#define OMAP3_HAS_IVA BIT(1)
-#define OMAP3_HAS_SGX BIT(2)
-#define OMAP3_HAS_NEON BIT(3)
-#define OMAP3_HAS_ISP BIT(4)
-#define OMAP3_HAS_192MHZ_CLK BIT(5)
-#define OMAP3_HAS_IO_WAKEUP BIT(6)
+#define OMAP_FEAT_CLASS_OMAP1 BIT(24)
+#define OMAP_FEAT_CLASS_OMAP2 BIT(25)
+#define OMAP_FEAT_CLASS_OMAP3 BIT(26)
+#define OMAP_FEAT_CLASS_OMAP4 BIT(27)
+
+#define OMAP_HAS_L2CACHE BIT(0)
+#define OMAP_HAS_IVA BIT(1)
+#define OMAP_HAS_SGX BIT(2)
+#define OMAP_HAS_NEON BIT(3)
+#define OMAP_HAS_ISP BIT(4)
+#define OMAP_HAS_192MHZ_CLK BIT(5)
+#define OMAP_HAS_IO_WAKEUP BIT(6)
+
+#define OMAP2_HAS_IVA OMAP_FEAT_CLASS_OMAP2 |
OMAP_HAS_IVA
+#define OMAP2_HAS_SGX OMAP_FEAT_CLASS_OMAP2 |
OMAP_HAS_SGX
+
+#define OMAP3_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_L2CACHE
+#define OMAP3_HAS_IVA OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_IVA
+#define OMAP3_HAS_SGX OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_SGX
+#define OMAP3_HAS_NEON OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_NEON
+#define OMAP3_HAS_ISP OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_ISP
+#define OMAP3_HAS_192MHZ_CLK OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_192MHZ_CLK
+#define OMAP3_HAS_IO_WAKEUP OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_IOWAKEUP
+
+#define OMAP4_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP4 |
OMAP_HAS_L2CACHE
+#define OMAP4_HAS_IVA OMAP_FEAT_CLASS_OMAP4 |
OMAP_HAS_IVA
+#define OMAP4_HAS_SGX OMAP_FEAT_CLASS_OMAP4 |
OMAP_HAS_SGX
+#define OMAP4_HAS_NEON OMAP_FEAT_CLASS_OMAP4 |
OMAP_HAS_NEON
+#define OMAP4_HAS_ISP OMAP_FEAT_CLASS_OMAP4 |
OMAP_HAS_ISP
#endif
here is my contention:
there will be two ways to use this:
omap_has_feature(OMAP_HAS_SGX) and omap_has_feature(OMAP3_HAS_SGX)
OMAP_HAS_SGX should return true or false no matter what omap silicon it is.
OMAP3_HAS_SGX usage is meant for what? it is a mixture of cpu_is_omap3() and
omap_has_feature(OMAP_HAS_SGX) - tries to do two things in one shot. which
defeats why we are trying to introduce a generic omap_has_feature in the
first place.
a) confusing as there seems to be two standards
b) redundant information use cpu_is_omapxyz() if needed.
IMHO:
+#define OMAP_HAS_L2CACHE BIT(0)
+#define OMAP_HAS_IVA BIT(1)
+#define OMAP_HAS_SGX BIT(2)
+#define OMAP_HAS_NEON BIT(3)
+#define OMAP_HAS_ISP BIT(4)
+#define OMAP3_HAS_192MHZ_CLK BIT(5)
+#define OMAP_HAS_IO_WAKEUP BIT(6)
and later if needed
+#define OMAP4_SOME_NEW_OMAP4ONLY_FEATURE BIT(7)
where OMAP3_HAS is indicative that this is a OMAP3 *only* feature and should
be used to differentiate between various omap3 silicon.
Benefits:
a) distinction b/w omap generic and omap family specific features
b) you get to define 32 features instead of reserving 24-32 for OMAP
classes.
I still can't grok the need for the distinction in (a), and for
+#define OMAP4_SOME_NEW_OMAP4ONLY_FEATURE BIT(7) etc.
If that OMAP4ONLY_FEATURE has to be checked, then the code
to use it will also be OMAP4 specific.
IOW, as a user, there are 2 ways to use omap_has_()
void a_generic_funciton_for_all_omaps() {
if (cpu_has__feature()
/* Do generic stuff */
}
void a_omap_4_specific_function() {
if (omap_has_that_new_feature()
/* Do omap_4 specific stuff */
}
In a_generic_function_for_all_omaps(), if there is a need for checking
OMAP4_has_,
then the code will eventually be ugly. There is going to be a
cpu_is_() overload, for things
not expressed through features framework.
I did read the other thread
http://marc.info/?l=linux-omapm=127858108626850w=2
and it's been discussed before as well. But I can't see a genuine
Re: [PATCH 5/5] omap: Allow testing for omap type with omap_has_feature
S, Venkatraman had written, on 07/08/2010 11:15 AM, the following:
On Thu, Jul 8, 2010 at 8:33 PM, Nishanth Menon n...@ti.com wrote:
Tony Lindgren had written, on 07/08/2010 04:38 AM, the following:
Allow testing for omap type with omap_has_feature. This
can be used to leave out cpu_is_omap checks.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/plat-omap/include/plat/cpu.h | 38
++---
1 files changed, 30 insertions(+), 8 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/cpu.h
b/arch/arm/plat-omap/include/plat/cpu.h
index 96eac4d..c117c3c 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -437,14 +437,36 @@ int omap_chip_is(struct omap_chip_id oci);
void omap2_check_revision(void);
/*
- * Runtime detection of OMAP3 features
+ * Runtime detection of OMAP features
*/
-#define OMAP3_HAS_L2CACHE BIT(0)
-#define OMAP3_HAS_IVA BIT(1)
-#define OMAP3_HAS_SGX BIT(2)
-#define OMAP3_HAS_NEON BIT(3)
-#define OMAP3_HAS_ISP BIT(4)
-#define OMAP3_HAS_192MHZ_CLK BIT(5)
-#define OMAP3_HAS_IO_WAKEUPBIT(6)
+#define OMAP_FEAT_CLASS_OMAP1 BIT(24)
+#define OMAP_FEAT_CLASS_OMAP2 BIT(25)
+#define OMAP_FEAT_CLASS_OMAP3 BIT(26)
+#define OMAP_FEAT_CLASS_OMAP4 BIT(27)
+
+#define OMAP_HAS_L2CACHE BIT(0)
+#define OMAP_HAS_IVA BIT(1)
+#define OMAP_HAS_SGX BIT(2)
+#define OMAP_HAS_NEON BIT(3)
+#define OMAP_HAS_ISP BIT(4)
+#define OMAP_HAS_192MHZ_CLKBIT(5)
+#define OMAP_HAS_IO_WAKEUP BIT(6)
+
+#define OMAP2_HAS_IVA OMAP_FEAT_CLASS_OMAP2 |
OMAP_HAS_IVA
+#define OMAP2_HAS_SGX OMAP_FEAT_CLASS_OMAP2 |
OMAP_HAS_SGX
+
+#define OMAP3_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_L2CACHE
+#define OMAP3_HAS_IVA OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_IVA
+#define OMAP3_HAS_SGX OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_SGX
+#define OMAP3_HAS_NEON OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_NEON
+#define OMAP3_HAS_ISP OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_ISP
+#define OMAP3_HAS_192MHZ_CLK OMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_192MHZ_CLK
+#define OMAP3_HAS_IO_WAKEUPOMAP_FEAT_CLASS_OMAP3 |
OMAP_HAS_IOWAKEUP
+
+#define OMAP4_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP4 |
OMAP_HAS_L2CACHE
+#define OMAP4_HAS_IVA OMAP_FEAT_CLASS_OMAP4 |
OMAP_HAS_IVA
+#define OMAP4_HAS_SGX OMAP_FEAT_CLASS_OMAP4 |
OMAP_HAS_SGX
+#define OMAP4_HAS_NEON OMAP_FEAT_CLASS_OMAP4 |
OMAP_HAS_NEON
+#define OMAP4_HAS_ISP OMAP_FEAT_CLASS_OMAP4 |
OMAP_HAS_ISP
#endif
here is my contention:
there will be two ways to use this:
omap_has_feature(OMAP_HAS_SGX) and omap_has_feature(OMAP3_HAS_SGX)
OMAP_HAS_SGX should return true or false no matter what omap silicon it is.
OMAP3_HAS_SGX usage is meant for what? it is a mixture of cpu_is_omap3() and
omap_has_feature(OMAP_HAS_SGX) - tries to do two things in one shot. which
defeats why we are trying to introduce a generic omap_has_feature in the
first place.
a) confusing as there seems to be two standards
b) redundant information use cpu_is_omapxyz() if needed.
IMHO:
+#define OMAP_HAS_L2CACHE BIT(0)
+#define OMAP_HAS_IVA BIT(1)
+#define OMAP_HAS_SGX BIT(2)
+#define OMAP_HAS_NEON BIT(3)
+#define OMAP_HAS_ISP BIT(4)
+#define OMAP3_HAS_192MHZ_CLK BIT(5)
+#define OMAP_HAS_IO_WAKEUP BIT(6)
and later if needed
+#define OMAP4_SOME_NEW_OMAP4ONLY_FEATURE BIT(7)
where OMAP3_HAS is indicative that this is a OMAP3 *only* feature and should
be used to differentiate between various omap3 silicon.
Benefits:
a) distinction b/w omap generic and omap family specific features
b) you get to define 32 features instead of reserving 24-32 for OMAP
classes.
I still can't grok the need for the distinction in (a), and for
+#define OMAP4_SOME_NEW_OMAP4ONLY_FEATURE BIT(7) etc.
OMAP_HAS_192MHZ_CLK - does not indicate if this is omap3 ONLY feature
(e.g. 3430 does not have it, 3630 has it) but we know that omap4, 2, 1
etc dont need it.
in terms of readability, when i see omap_has_feature(OMAP3_HAS_xyz), I
can immediately review the code/read the code with the context of omap3
alone Vs if this code was used in omap4/2/1 context question why it is
so and we can all improve.
e.g. if a generic clock code meant for all omaps used 192MHZ, I would
question why is cpu specific feature being used there. which is easier
with a OMAP3_ tag.
If that OMAP4ONLY_FEATURE has to be checked, then the code
to use it will also be OMAP4 specific.
IOW, as a user, there are 2 ways to use omap_has_()
void a_generic_funciton_for_all_omaps() {
RE: Tony mostly offline for the rest of July
Tony Lindgren wrote: Hi all, FYI, I'll be mostly offline after Friday for several weeks. I'll post few more patchsets for review, but will not be merging any other omap code after that for the upcoming merge window. Cheers, Tony Tony, The 3630 ES1.1 ID code patch is pending in patchworks for a while [1]. I missed pinging you on this earlier. It would be nice to queue this up for the merge window as well. https://patchwork.kernel.org/patch/95684/ Also, we now have ES1.2 silicon as well; should I submit an updated patch now, or just a delta patch later? - Anand -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 5/5] omap: Allow testing for omap type with omap_has_feature
On Thu, Jul 8, 2010 at 9:58 PM, Nishanth Menon n...@ti.com wrote: S, Venkatraman had written, on 07/08/2010 11:15 AM, the following: On Thu, Jul 8, 2010 at 8:33 PM, Nishanth Menon n...@ti.com wrote: Tony Lindgren had written, on 07/08/2010 04:38 AM, the following: Allow testing for omap type with omap_has_feature. This can be used to leave out cpu_is_omap checks. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/plat-omap/include/plat/cpu.h | 38 ++--- 1 files changed, 30 insertions(+), 8 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 96eac4d..c117c3c 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -437,14 +437,36 @@ int omap_chip_is(struct omap_chip_id oci); void omap2_check_revision(void); /* - * Runtime detection of OMAP3 features + * Runtime detection of OMAP features */ -#define OMAP3_HAS_L2CACHE BIT(0) -#define OMAP3_HAS_IVA BIT(1) -#define OMAP3_HAS_SGX BIT(2) -#define OMAP3_HAS_NEON BIT(3) -#define OMAP3_HAS_ISP BIT(4) -#define OMAP3_HAS_192MHZ_CLK BIT(5) -#define OMAP3_HAS_IO_WAKEUP BIT(6) +#define OMAP_FEAT_CLASS_OMAP1 BIT(24) +#define OMAP_FEAT_CLASS_OMAP2 BIT(25) +#define OMAP_FEAT_CLASS_OMAP3 BIT(26) +#define OMAP_FEAT_CLASS_OMAP4 BIT(27) + +#define OMAP_HAS_L2CACHE BIT(0) +#define OMAP_HAS_IVA BIT(1) +#define OMAP_HAS_SGX BIT(2) +#define OMAP_HAS_NEON BIT(3) +#define OMAP_HAS_ISP BIT(4) +#define OMAP_HAS_192MHZ_CLK BIT(5) +#define OMAP_HAS_IO_WAKEUP BIT(6) + +#define OMAP2_HAS_IVA OMAP_FEAT_CLASS_OMAP2 | OMAP_HAS_IVA +#define OMAP2_HAS_SGX OMAP_FEAT_CLASS_OMAP2 | OMAP_HAS_SGX + +#define OMAP3_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_L2CACHE +#define OMAP3_HAS_IVA OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_IVA +#define OMAP3_HAS_SGX OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_SGX +#define OMAP3_HAS_NEON OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_NEON +#define OMAP3_HAS_ISP OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_ISP +#define OMAP3_HAS_192MHZ_CLK OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_192MHZ_CLK +#define OMAP3_HAS_IO_WAKEUP OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_IOWAKEUP + +#define OMAP4_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_L2CACHE +#define OMAP4_HAS_IVA OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_IVA +#define OMAP4_HAS_SGX OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_SGX +#define OMAP4_HAS_NEON OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_NEON +#define OMAP4_HAS_ISP OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_ISP #endif here is my contention: there will be two ways to use this: omap_has_feature(OMAP_HAS_SGX) and omap_has_feature(OMAP3_HAS_SGX) OMAP_HAS_SGX should return true or false no matter what omap silicon it is. OMAP3_HAS_SGX usage is meant for what? it is a mixture of cpu_is_omap3() and omap_has_feature(OMAP_HAS_SGX) - tries to do two things in one shot. which defeats why we are trying to introduce a generic omap_has_feature in the first place. a) confusing as there seems to be two standards b) redundant information use cpu_is_omapxyz() if needed. IMHO: +#define OMAP_HAS_L2CACHE BIT(0) +#define OMAP_HAS_IVA BIT(1) +#define OMAP_HAS_SGX BIT(2) +#define OMAP_HAS_NEON BIT(3) +#define OMAP_HAS_ISP BIT(4) +#define OMAP3_HAS_192MHZ_CLK BIT(5) +#define OMAP_HAS_IO_WAKEUP BIT(6) and later if needed +#define OMAP4_SOME_NEW_OMAP4ONLY_FEATURE BIT(7) where OMAP3_HAS is indicative that this is a OMAP3 *only* feature and should be used to differentiate between various omap3 silicon. Benefits: a) distinction b/w omap generic and omap family specific features b) you get to define 32 features instead of reserving 24-32 for OMAP classes. I still can't grok the need for the distinction in (a), and for +#define OMAP4_SOME_NEW_OMAP4ONLY_FEATURE BIT(7) etc. OMAP_HAS_192MHZ_CLK - does not indicate if this is omap3 ONLY feature (e.g. 3430 does not have it, 3630 has it) but we know that omap4, 2, 1 etc dont need it. in terms of readability, when i see omap_has_feature(OMAP3_HAS_xyz), I can immediately review the code/read the code with the context of omap3 alone Vs if this code was used in omap4/2/1 context question why it is so and we can all improve. e.g. if a generic clock code meant for all omaps used 192MHZ, I would question why is cpu specific feature being used there. which is easier with a OMAP3_ tag. If we extend this analogy, I can write
Re: [PATCH 5/5] omap: Allow testing for omap type with omap_has_feature
Venkatraman S had written, on 07/08/2010 02:28 PM, the following: On Thu, Jul 8, 2010 at 9:58 PM, Nishanth Menon n...@ti.com wrote: S, Venkatraman had written, on 07/08/2010 11:15 AM, the following: On Thu, Jul 8, 2010 at 8:33 PM, Nishanth Menon n...@ti.com wrote: Tony Lindgren had written, on 07/08/2010 04:38 AM, the following: Allow testing for omap type with omap_has_feature. This can be used to leave out cpu_is_omap checks. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/plat-omap/include/plat/cpu.h | 38 ++--- 1 files changed, 30 insertions(+), 8 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 96eac4d..c117c3c 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -437,14 +437,36 @@ int omap_chip_is(struct omap_chip_id oci); void omap2_check_revision(void); /* - * Runtime detection of OMAP3 features + * Runtime detection of OMAP features */ -#define OMAP3_HAS_L2CACHE BIT(0) -#define OMAP3_HAS_IVA BIT(1) -#define OMAP3_HAS_SGX BIT(2) -#define OMAP3_HAS_NEON BIT(3) -#define OMAP3_HAS_ISP BIT(4) -#define OMAP3_HAS_192MHZ_CLK BIT(5) -#define OMAP3_HAS_IO_WAKEUPBIT(6) +#define OMAP_FEAT_CLASS_OMAP1 BIT(24) +#define OMAP_FEAT_CLASS_OMAP2 BIT(25) +#define OMAP_FEAT_CLASS_OMAP3 BIT(26) +#define OMAP_FEAT_CLASS_OMAP4 BIT(27) + +#define OMAP_HAS_L2CACHE BIT(0) +#define OMAP_HAS_IVA BIT(1) +#define OMAP_HAS_SGX BIT(2) +#define OMAP_HAS_NEON BIT(3) +#define OMAP_HAS_ISP BIT(4) +#define OMAP_HAS_192MHZ_CLKBIT(5) +#define OMAP_HAS_IO_WAKEUP BIT(6) + +#define OMAP2_HAS_IVA OMAP_FEAT_CLASS_OMAP2 | OMAP_HAS_IVA +#define OMAP2_HAS_SGX OMAP_FEAT_CLASS_OMAP2 | OMAP_HAS_SGX + +#define OMAP3_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_L2CACHE +#define OMAP3_HAS_IVA OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_IVA +#define OMAP3_HAS_SGX OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_SGX +#define OMAP3_HAS_NEON OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_NEON +#define OMAP3_HAS_ISP OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_ISP +#define OMAP3_HAS_192MHZ_CLK OMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_192MHZ_CLK +#define OMAP3_HAS_IO_WAKEUPOMAP_FEAT_CLASS_OMAP3 | OMAP_HAS_IOWAKEUP + +#define OMAP4_HAS_L2CACHE OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_L2CACHE +#define OMAP4_HAS_IVA OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_IVA +#define OMAP4_HAS_SGX OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_SGX +#define OMAP4_HAS_NEON OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_NEON +#define OMAP4_HAS_ISP OMAP_FEAT_CLASS_OMAP4 | OMAP_HAS_ISP #endif here is my contention: there will be two ways to use this: omap_has_feature(OMAP_HAS_SGX) and omap_has_feature(OMAP3_HAS_SGX) OMAP_HAS_SGX should return true or false no matter what omap silicon it is. OMAP3_HAS_SGX usage is meant for what? it is a mixture of cpu_is_omap3() and omap_has_feature(OMAP_HAS_SGX) - tries to do two things in one shot. which defeats why we are trying to introduce a generic omap_has_feature in the first place. a) confusing as there seems to be two standards b) redundant information use cpu_is_omapxyz() if needed. IMHO: +#define OMAP_HAS_L2CACHE BIT(0) +#define OMAP_HAS_IVA BIT(1) +#define OMAP_HAS_SGX BIT(2) +#define OMAP_HAS_NEON BIT(3) +#define OMAP_HAS_ISP BIT(4) +#define OMAP3_HAS_192MHZ_CLK BIT(5) +#define OMAP_HAS_IO_WAKEUP BIT(6) and later if needed +#define OMAP4_SOME_NEW_OMAP4ONLY_FEATURE BIT(7) where OMAP3_HAS is indicative that this is a OMAP3 *only* feature and should be used to differentiate between various omap3 silicon. Benefits: a) distinction b/w omap generic and omap family specific features b) you get to define 32 features instead of reserving 24-32 for OMAP classes. I still can't grok the need for the distinction in (a), and for +#define OMAP4_SOME_NEW_OMAP4ONLY_FEATURE BIT(7) etc. OMAP_HAS_192MHZ_CLK - does not indicate if this is omap3 ONLY feature (e.g. 3430 does not have it, 3630 has it) but we know that omap4, 2, 1 etc dont need it. in terms of readability, when i see omap_has_feature(OMAP3_HAS_xyz), I can immediately review the code/read the code with the context of omap3 alone Vs if this code was used in omap4/2/1 context question why it is so and we can all improve. e.g. if a generic clock code meant for all omaps used 192MHZ, I would question why is cpu specific feature being used there. which is easier with a OMAP3_ tag. If we extend this analogy, I can write omap_dma_driver_init(OMAP3_NUM_CHANNELS)
Re: [PATCH 11/15] wireless: wl1271: introduce platform device support
Hi Nicolas and Roger, On Tue, Jul 6, 2010 at 8:42 PM, Nicolas Pitre n...@fluxnic.net wrote: On Tue, 6 Jul 2010, Roger Quadros wrote: If the Power enable GPIO can be treated as SDIO slot supply (i.e. vmmc), then the SDIO/MMC core should tackle it, just like it deals with supply for slots with removable cards. ... Another function pair would be needed instead, which would do almost like the suspend/resume code is already doing. Something like: Thanks a lot for your review and comments, and for taking the time to present your approach. I like it ! It'd allow us to lose the software (or fake if you want ;) card detect mechanism, which is something that should have been added to each platform we wanted to support. We would only need to make it possible to deliver board-specific data to the function driver (e.g., in the case of the wl1271, we need irq and board_ref_clock data). That would require some board-level platform-data configuration, which will be specific to the controller to which the device is hardwired to. This data should propagate through the host controller to the SDIO core so it would eventually be accessible by the function driver (e.g. via func-dev.pdata). We'll adapt and post follow-up patches. Thanks again, Ohad. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 06/15] omap zoom2: wlan board muxing
On Thu, Jul 8, 2010 at 12:45 PM, Tony Lindgren t...@atomide.com wrote:
* Ghorai, Sukumar s-gho...@ti.com [100708 06:34]:
@@ -71,6 +71,21 @@ static struct twl4030_platform_data zoom2_twldata = {
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
+#ifdef CONFIG_OMAP_ZOOM_WLAN
[Ghorai] This is zoom board specific file, So why need this additional flag?
Good point, the ifdef is unnecessary in for both zoom2 and zoom3.
Will update in my queue to remove the ifdefs.
Thanks a lot, Tony.
Tony
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Re: [PATCH 15/15] omap: zoom: enable WLAN device
On Thu, Jul 8, 2010 at 6:39 AM, Ghorai, Sukumar s-gho...@ti.com wrote: [Ghorai] In general we can avoid OMAP_ZOOM_WLAN and MMC_EMBEDDED_SDIO as kconfig option. 1st one is board specific and 2nd one could be generic sdio code. As I mentioned in other patch too. Thanks, will get rid of the extra config options. -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-mmc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 01/10] OMAP2420: DMA: HWMOD: Add hwmod data structures
This patch adds OMAP2420 DMA hwmod structures.
Signed-off-by: Manjunatha GK manj...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 95 +++-
1 files changed, 93 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 8c90b27..294d5cc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -16,6 +16,9 @@
#include plat/cpu.h
#include plat/dma.h
+#include mach/irqs.h
+#include mach/dma.h
+
#include omap_hwmod_common_data.h
#include prm-regbits-24xx.h
@@ -32,6 +35,7 @@
static struct omap_hwmod omap2420_mpu_hwmod;
static struct omap_hwmod omap2420_l3_main_hwmod;
static struct omap_hwmod omap2420_l4_core_hwmod;
+static struct omap_hwmod omap2420_dma_system_hwmod;
/* L3 - L4_CORE interface */
static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
@@ -136,11 +140,100 @@ static struct omap_hwmod omap2420_mpu_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
};
+static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x002c,
+ .syss_offs = 0x0028,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+ SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+ SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2420_dma_hwmod_class = {
+ .name = dma,
+ .sysc = omap2420_dma_sysc,
+};
+
+/* system dma */
+
+/* dma attributes */
+static struct omap_dma_dev_attr dma_dev_attr = {
+ .dma_dev_attr = DMA_LINKED_LCH | GLOBAL_PRIORITY |
+ IS_CSSA_32 | IS_CDSA_32,
+ .dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT,
+};
+
+static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
+ { .name = dma_0, .irq = INT_24XX_SDMA_IRQ0 },
+ { .name = dma_1, .irq = INT_24XX_SDMA_IRQ1 },
+ { .name = dma_2, .irq = INT_24XX_SDMA_IRQ2 },
+ { .name = dma_3, .irq = INT_24XX_SDMA_IRQ3 },
+};
+
+static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
+ {
+ .pa_start = 0x48056000,
+ .pa_end = 0x4a0560ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* dma_system - L3 */
+static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
+ .master = omap2420_dma_system_hwmod,
+ .slave = omap2420_l3_main_hwmod,
+ .clk= l3_div_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system master ports */
+static struct omap_hwmod_ocp_if *omap2420_dma_system_masters[] = {
+ omap2420_dma_system__l3,
+};
+
+/* l4_cfg - dma_system */
+static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
+ .master = omap2420_l4_core_hwmod,
+ .slave = omap2420_dma_system_hwmod,
+ .clk= l4_div_ck,
+ .addr = omap2420_dma_system_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system slave ports */
+static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
+ omap2420_l4_core__dma_system,
+};
+
+static struct omap_hwmod omap2420_dma_system_hwmod = {
+ .name = dma,
+ .class = omap2420_dma_hwmod_class,
+ .mpu_irqs = omap2420_dma_system_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs),
+ .main_clk = l3_div_ck,
+ .prcm = {
+ .omap2 = {
+ /* .clkctrl_reg = NULL, */
+ },
+ },
+ .slaves = omap2420_dma_system_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves),
+ .masters= omap2420_dma_system_masters,
+ .masters_cnt= ARRAY_SIZE(omap2420_dma_system_masters),
+ .dev_attr = dma_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
static __initdata struct omap_hwmod *omap2420_hwmods[] = {
omap2420_l3_main_hwmod,
omap2420_l4_core_hwmod,
omap2420_l4_wkup_hwmod,
omap2420_mpu_hwmod,
+ omap2420_dma_system_hwmod,
NULL,
};
@@ -148,5 +241,3 @@ int __init omap2420_hwmod_init(void)
{
return omap_hwmod_init(omap2420_hwmods);
}
-
-
--
1.7.0.4
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the
[RFC PATCH 00/10] OMAP: DMA: HWMOD and convert into platform driver
This patch series is to convert existing OMAP DMA library into platform driver for all the OMAP1 and OMAP2 plus processors as per alignment with Benoit, Paul and Kevin. The platform device model for OMAP2 plus will makes use of hwmod data base and it is based on the reference branch: git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git Branch: pm-wip/hwmods-omap4 commit f1c79ab452ed9cf7b5ff6488335c1ddf15d5c92a Author: Benoit Cousson b-cous...@ti.com OMAP4: hwmod: Enable omap_hwmod build for OMAP4 The proposal is to: 1. Convert DMA library into platform driver in hwmod way 2. Clean up API's to remove cpu_is_ checks. 3. Make use of DMA engine(See Documentation/crypto/async-tx-api.txt) This series is going to cover 1 2 and 3 will be taken up once these changes becomes stable and thoroughly tested on all omap boards. The API's are cleaned up to remove cpu_is_ checks and code is moved to corresponding respective mach-omap folders. Basic tests are performed with this patch series on OMAP3630(Zoom3) board. All other major defconfigs are build tested. OMAP4 boot seems to be broken on above branch for both MMC and ethernet. List of TODO's: 1. To perform more tests on OMAP4 once the branch is bootable. 2. OMAP2 boot and basic dma tests It will be helpful is some one tests and provides feedback on OMAP1 and OMAP2 boards since I don't have OMAP1 board. Manjunatha GK (10): OMAP2420: DMA: HWMOD: Add hwmod data structures OMAP2430: DMA: HWMOD: Add hwmod data structures OMAP3: DMA: HWMOD: Add hwmod data structures OMAP4: DMA: HWMOD: update OMAP4 data base OMAP1: DMA: Introduce DMA driver as platform driver OMAP2/3/4: DMA: HWMOD: Device registration OMAP2/3/4: DMA: Move chain API's to mach-omap2 OMAP: DMA: Move IRQ handlers to mach-omap OMAP: DMA: API's Clean up OMAP: DMA: Cleanup DMA library and enable DMA platform driver arch/arm/mach-omap1/Makefile |2 +- arch/arm/mach-omap1/dma.c | 595 + arch/arm/mach-omap1/include/mach/dma.h | 80 ++ arch/arm/mach-omap2/Makefile |2 +- arch/arm/mach-omap2/dma.c | 1268 ++ arch/arm/mach-omap2/include/mach/dma.h | 103 ++ arch/arm/mach-omap2/omap_hwmod_2420_data.c | 95 ++- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 93 ++- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 90 ++ arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 21 +- arch/arm/plat-omap/dma.c | 1968 ++-- arch/arm/plat-omap/include/plat/dma.h | 438 +++ 12 files changed, 2920 insertions(+), 1835 deletions(-) create mode 100644 arch/arm/mach-omap1/dma.c create mode 100644 arch/arm/mach-omap1/include/mach/dma.h create mode 100644 arch/arm/mach-omap2/dma.c create mode 100644 arch/arm/mach-omap2/include/mach/dma.h Signed-off-by: Basak, Partha p-bas...@ti.com Cc: Benoit Cousson b-cous...@ti.com Cc: Kevin Hilman khil...@deeprootsystems.com Cc: Paul Walmsley p...@pwsan.com Cc: Santosh Shilimkar santosh.shilim...@ti.com Cc: Rajendra Nayak rna...@ti.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 09/10] OMAP: DMA: API's Clean up
This patch will clean up API's in plat-omap dma library
The API's are cleaned up for eliminating cpu_is_
checks and machine specific API/code is moved to corresponding mach-omap
directories.
Note: The code in plat-omap dma library will be removed in another patch.
This is to avoid build break.
Signed-off-by: Manjunatha GK manj...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap1/dma.c | 253 ++
arch/arm/mach-omap2/dma.c | 296 -
2 files changed, 548 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index fb5bf0d..dd03937 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -170,11 +170,149 @@ static struct omap_dma_reg_offset dma_reg_offset[] = {
};
struct omap_dma_reg_offset *r = (struct omap_dma_reg_offset *)dma_reg_offset;
+static inline void enable_lnk(int lch);
+static inline void disable_lnk(int lch);
+static inline void omap_enable_channel_irq(int lch);
+static irqreturn_t omap_dma_irq_handler(int irq, void *dev_id);
static struct omap_dma_lch *omap1_dma_chan;
static void __iomem *dma_base;
static int enable_1510_mode;
+static inline int get_gdma_dev(int req)
+{
+ u32 reg = OMAP_FUNC_MUX_ARM_BASE + ((req - 1) / 5) * 4;
+ int shift = ((req - 1) % 5) * 6;
+
+ return ((omap_readl(reg) shift) 0x3f) + 1;
+}
+
+static inline void set_gdma_dev(int req, int dev)
+{
+ u32 reg = OMAP_FUNC_MUX_ARM_BASE + ((req - 1) / 5) * 4;
+ int shift = ((req - 1) % 5) * 6;
+ u32 l;
+
+ l = omap_readl(reg);
+ l = ~(0x3f shift);
+ l |= (dev - 1) shift;
+ omap_writel(l, reg);
+}
+
+static void sync_device_set(int dev_id, int free_ch)
+{
+ u32 reg;
+
+ reg = (r-lch_base * free_ch) + r-common_ch.ccr;
+ if (cpu_is_omap16xx()) {
+ /* If the sync device is set, configure it dynamically. */
+ if (dev_id != 0) {
+ set_gdma_dev(free_ch + 1, dev_id);
+ dev_id = free_ch + 1;
+ }
+ /*
+* Disable the 1510 compatibility mode and set the sync device
+* id.
+*/
+ omap1_dma_write(dev_id | (1 10), reg);
+ } else if (cpu_is_omap7xx() || cpu_is_omap15xx()) {
+ omap1_dma_write(dev_id, reg);
+ }
+}
+
+static inline void omap_enable_channel_irq(int lch)
+{
+ u32 reg;
+
+ /* Clear CSR */
+ reg = (r-lch_base * lch) + r-common_ch.csr;
+ omap1_dma_read(reg);
+
+ /* Enable some nice interrupts. */
+ reg = (r-lch_base * lch) + r-common_ch.cicr;
+ omap1_dma_write(omap1_dma_chan[lch].enabled_irqs, reg);
+}
+
+static inline void enable_lnk(int lch)
+{
+ u32 reg, l;
+
+ reg = (r-lch_base * lch) + r-common_ch.clnk_ctrl;
+ l = omap1_dma_read(reg);
+
+ if (omap1_dma_chan[lch].next_linked_ch != -1)
+ l = omap1_dma_chan[lch].next_linked_ch | (1 15);
+
+ /* Set the ENABLE_LNK bits */
+ if (omap1_dma_chan[lch].next_lch != -1)
+ l = omap1_dma_chan[lch].next_lch | (1 15);
+
+ omap1_dma_write(l, reg);
+}
+
+static inline void disable_lnk(int lch)
+{
+ u32 reg, l;
+
+ reg = (r-lch_base * lch) + r-common_ch.clnk_ctrl;
+ l = omap1_dma_read(reg);
+
+ /* Clear CSR */
+ reg = (r-lch_base * lch) + r-common_ch.cicr;
+ omap1_dma_write(0, reg);
+
+ /* Clear the ENABLE_LNK bit */
+ l = ~(1 15);
+
+ reg = (r-lch_base * lch) + r-common_ch.clnk_ctrl;
+ omap1_dma_write(l, reg);
+ omap1_dma_chan[lch].flags = ~OMAP_DMA_ACTIVE;
+}
+
+static void clear_lch_regs(int lch)
+{
+ int reg_count;
+ u32 ch_reg_base, reg;
+
+ ch_reg_base = r-lch_base * lch;
+
+ for (reg_count = 0; reg_count 0x2c; reg_count += 2) {
+ reg = ch_reg_base + reg_count;
+ omap1_dma_write(0, reg);
+ }
+}
+
+static void clear_ccr_csr(int lch)
+{
+ u32 reg;
+ int l;
+
+ reg = (r-lch_base * lch) + r-common_ch.ccr;
+ l = omap1_dma_read(reg);
+ l = ~OMAP_DMA_CCR_EN;
+ omap1_dma_write(l, reg);
+
+ /* Clear pending interrupts */
+ reg = r-lch_base + r-common_ch.csr;
+ omap1_dma_read(reg);
+}
+
+static int set_prio_lch(int lch, unsigned char read_prio,
+ unsigned char write_prio)
+{
+ u32 l = 0;
+ l |= ((read_prio 0x1) 6);
+ return l;
+}
+
+static int dma_running(int dma_chan_count)
+{
+ if (omap_lcd_dma_running())
+ return 1;
+
+ return 0;
+}
+
static int omap1_dma_handle_ch(int ch)
{
u32 csr;
@@ -246,6 +384,121
[RFC PATCH 02/10] OMAP2430: DMA: HWMOD: Add hwmod data structures
This patch adds OMAP2430 DMA hwmod structures.
Signed-off-by: Manjunatha GK manj...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 93 +++-
1 files changed, 92 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index c0f3311..30998c6 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -12,10 +12,12 @@
* XXX these should be marked initdata for multi-OMAP kernels
*/
#include plat/omap_hwmod.h
-#include mach/irqs.h
#include plat/cpu.h
#include plat/dma.h
+#include mach/irqs.h
+#include mach/dma.h
+
#include omap_hwmod_common_data.h
#include prm-regbits-24xx.h
@@ -32,6 +34,7 @@
static struct omap_hwmod omap2430_mpu_hwmod;
static struct omap_hwmod omap2430_l3_main_hwmod;
static struct omap_hwmod omap2430_l4_core_hwmod;
+static struct omap_hwmod omap2430_dma_system_hwmod;
/* L3 - L4_CORE interface */
static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
@@ -137,12 +140,100 @@ static struct omap_hwmod omap2430_mpu_hwmod = {
.masters_cnt= ARRAY_SIZE(omap2430_mpu_masters),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
};
+static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x002c,
+ .syss_offs = 0x0028,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+ SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+ SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2430_dma_hwmod_class = {
+ .name = dma,
+ .sysc = omap2430_dma_sysc,
+};
+
+/* dma_system */
+
+/* dma attributes */
+static struct omap_dma_dev_attr dma_dev_attr = {
+ .dma_dev_attr = DMA_LINKED_LCH | GLOBAL_PRIORITY |
+ IS_CSSA_32 | IS_CDSA_32,
+ .dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT,
+};
+
+static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
+ { .name = dma_0, .irq = INT_24XX_SDMA_IRQ0 },
+ { .name = dma_1, .irq = INT_24XX_SDMA_IRQ1 },
+ { .name = dma_2, .irq = INT_24XX_SDMA_IRQ2 },
+ { .name = dma_3, .irq = INT_24XX_SDMA_IRQ3 },
+};
+
+static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
+ {
+ .pa_start = 0x48056000,
+ .pa_end = 0x4a0560ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* dma_system - L3 */
+static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
+ .master = omap2430_dma_system_hwmod,
+ .slave = omap2430_l3_main_hwmod,
+ .clk= l3_div_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system master ports */
+static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = {
+ omap2430_dma_system__l3,
+};
+
+/* l4_cfg - dma_system */
+static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
+ .master = omap2430_l4_core_hwmod,
+ .slave = omap2430_dma_system_hwmod,
+ .clk= l4_div_ck,
+ .addr = omap2430_dma_system_addrs,
+ .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system slave ports */
+static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
+ omap2430_l4_core__dma_system,
+};
+
+static struct omap_hwmod omap2430_dma_system_hwmod = {
+ .name = dma,
+ .class = omap2430_dma_hwmod_class,
+ .mpu_irqs = omap2430_dma_system_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs),
+ .main_clk = l3_div_ck,
+ .prcm = {
+ .omap2 = {
+ /*.clkctrl_reg = NULL, */
+ },
+ },
+ .slaves = omap2430_dma_system_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves),
+ .masters= omap2430_dma_system_masters,
+ .masters_cnt= ARRAY_SIZE(omap2430_dma_system_masters),
+ .dev_attr = dma_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
static __initdata struct omap_hwmod *omap2430_hwmods[] = {
omap2430_l3_main_hwmod,
omap2430_l4_core_hwmod,
omap2430_l4_wkup_hwmod,
omap2430_mpu_hwmod,
+ omap2430_dma_system_hwmod,
NULL,
};
--
1.7.0.4
--
To unsubscribe
[RFC PATCH 06/10] OMAP2/3/4: DMA: HWMOD: Device registration
This patch converts omap2/3/4 dma driver into platform
devices through using omap hwmod, omap device and runtime pm
frameworks.
Signed-off-by: Manjunatha GK manj...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/dma.c | 200
arch/arm/mach-omap2/include/mach/dma.h | 76
2 files changed, 276 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/dma.c
create mode 100644 arch/arm/mach-omap2/include/mach/dma.h
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
new file mode 100644
index 000..548321b
--- /dev/null
+++ b/arch/arm/mach-omap2/dma.c
@@ -0,0 +1,200 @@
+/*
+ * dma.c - OMAP2 specific DMA code
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * Author:
+ * Manjunatha GK manj...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/err.h
+#include linux/slab.h
+#include linux/pm_runtime.h
+#include linux/io.h
+#include linux/module.h
+#include linux/init.h
+#include linux/sched.h
+#include linux/spinlock.h
+#include linux/errno.h
+#include linux/interrupt.h
+#include linux/irq.h
+
+#include mach/dma.h
+
+#include plat/irqs.h
+#include plat/omap_hwmod.h
+#include plat/omap_device.h
+#include plat/dma.h
+
+struct omap_device_pm_latency omap2_dma_latency[] = {
+ {
+ .deactivate_func = omap_device_idle_hwmods,
+ .activate_func = omap_device_enable_hwmods,
+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+ },
+};
+
+struct omap_dma_reg_offset dma_reg_offset[] = {
+ {
+ .lch_base = OMAP_DMA4_CH_BASE,
+ .gcr= OMAP_DMA4_GCR,
+ .ocp_sysconfig = OMAP_DMA4_OCP_SYSCONFIG,
+ .rev= OMAP_DMA4_REVISION,
+ .common_ch = {
+ .csdp = OMAP_DMA4_CSDP,
+ .ccr= OMAP_DMA4_CCR,
+ .cicr = OMAP_DMA4_CICR,
+ .csr= OMAP_DMA4_CSR,
+ .csfi = OMAP_DMA4_CSFI,
+ .csei = OMAP_DMA4_CSEI,
+ .cdac = OMAP_DMA4_CDAC,
+ .cdei = OMAP_DMA4_CDEI,
+ .cdfi = OMAP_DMA4_CDFI,
+ .clnk_ctrl = OMAP_DMA4_CLNK_CTRL,
+ .cen= OMAP_DMA4_CEN,
+ .cfn= OMAP_DMA4_CFN,
+ },
+ .ch_specific= {
+ .cssa = OMAP_DMA4_CSSA,
+ .cdsa = OMAP_DMA4_CDSA,
+ },
+ .irqreg = {
+ .irq_status_l0 = OMAP_DMA4_IRQSTATUS_L0,
+ .irq_enable_l0 = OMAP_DMA4_IRQENABLE_L0,
+ },
+
+ .reg_caps = {
+ .caps_0 = OMAP_DMA4_CAPS_0,
+ },
+ },
+};
+struct omap_dma_reg_offset *r = (struct omap_dma_reg_offset *)dma_reg_offset;
+
+struct omap_dma_dev_attr *d;
+
+static struct omap_system_dma_plat_info *omap2_pdata;
+static void __iomem *dma_base;
+static struct dma_link_info *dma_linked_lch;
+static u32 dma_chan_count;
+
+/* One time initializations */
+static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *user)
+{
+ struct omap_device *od;
+ struct omap_system_dma_plat_info *pdata;
+ struct resource *mem;
+ char *name = dma;
+
+ pdata = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
+ if (!pdata) {
+ pr_err(%s: Unable to allocate pdata for %s:%s\n,
+ __func__, name, oh-name);
+ return -ENOMEM;
+ }
+
+
+ pdata-dma_attr = (struct omap_dma_dev_attr *)oh-dev_attr;
+
+ pdata-dma_reg_offset = r;
+
+ pdata-disable_irq_lch = disable_irq_lch;
+ pdata-enable_irq_lch = enable_irq_lch;
+ pdata-dma_handle_ch= omap2_dma_handle_ch;
+ pdata-clear_lch_regs = NULL;
+ pdata-dma_running = dma_running;
+ pdata-set_prio_lch = set_prio_lch;
+ pdata-dma_irq_register = dma_irq_register;
+ pdata-enable_lnk = omap_enable_lnk;
+ pdata-disable_lnk = omap_disable_lnk;
+ pdata-enable_channel_irq = omap_enable_channel_irq;
+ pdata-disable_channel_irq = omap_disable_channel_irq;
+ pdata-clear_ccr_csr= NULL;
+ pdata-sync_device_set = NULL;
+
+ /* Handling Errata's for all OMAP2PLUS processors */
+ pdata-errata = 0;
+
+ if (cpu_is_omap242x() ||
+
[RFC PATCH 04/10] OMAP4: DMA: HWMOD: update OMAP4 data base
The OMAP4 hwmod data base is updated with DMA controller attributes.
Also, irq name are changed from 0 to dma_0, 1-dma_1 ... in order provide
meaningful name to irq names.
Signed-off-by: Manjunatha GK manj...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 21 -
1 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 20f5f8c..46d83f5 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -22,6 +22,9 @@
#include plat/omap_hwmod.h
#include plat/cpu.h
+#include plat/dma.h
+
+#include mach/dma.h
#include omap_hwmod_common_data.h
@@ -750,12 +753,19 @@ static struct omap_hwmod_class omap44xx_dma_hwmod_class =
{
.sysc = omap44xx_dma_sysc,
};
+/* dma attributes */
+static struct omap_dma_dev_attr dma_dev_attr = {
+ .dma_dev_attr = DMA_LINKED_LCH | GLOBAL_PRIORITY |
+ IS_CSSA_32 | IS_CDSA_32,
+ .dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT,
+};
+
/* dma_system */
static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = {
- { .name = 0, .irq = 12 + OMAP44XX_IRQ_GIC_START },
- { .name = 1, .irq = 13 + OMAP44XX_IRQ_GIC_START },
- { .name = 2, .irq = 14 + OMAP44XX_IRQ_GIC_START },
- { .name = 3, .irq = 15 + OMAP44XX_IRQ_GIC_START },
+ { .name = dma_0, .irq = 12 + OMAP44XX_IRQ_GIC_START },
+ { .name = dma_1, .irq = 13 + OMAP44XX_IRQ_GIC_START },
+ { .name = dma_2, .irq = 14 + OMAP44XX_IRQ_GIC_START },
+ { .name = dma_3, .irq = 15 + OMAP44XX_IRQ_GIC_START },
};
static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = {
@@ -801,6 +811,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
.slaves_cnt = ARRAY_SIZE(omap44xx_dma_system_slaves),
.masters= omap44xx_dma_system_masters,
.masters_cnt= ARRAY_SIZE(omap44xx_dma_system_masters),
+ .dev_attr = dma_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -4789,7 +4800,7 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
/* counter class */
omap44xx_counter_32k_hwmod,
/* dma class */
-/* omap44xx_dma_system_hwmod, */
+ omap44xx_dma_system_hwmod,
/* dmic class */
/* omap44xx_dmic_hwmod, */
/* dsp class */
--
1.7.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 08/10] OMAP: DMA: Move IRQ handlers to mach-omap
The DMA IRQ handling is completely differnet between
omap1 and omap2 plus processors hence the IRQ handlers are
moved to respective dma.c in mach-omap directories.
Signed-off-by: Manjunatha GK manj...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap1/dma.c | 71 +
arch/arm/mach-omap2/dma.c | 111 +
2 files changed, 182 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index 57be4f5..fb5bf0d 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -175,6 +175,77 @@ static struct omap_dma_lch *omap1_dma_chan;
static void __iomem *dma_base;
static int enable_1510_mode;
+static int omap1_dma_handle_ch(int ch)
+{
+ u32 csr;
+ u32 reg, ch_reg_base;
+
+ ch_reg_base = r-lch_base * ch;
+
+ if (enable_1510_mode ch = 6) {
+ csr = omap1_dma_chan[ch].saved_csr;
+ omap1_dma_chan[ch].saved_csr = 0;
+ } else {
+ reg = ch_reg_base + r-common_ch.csr;
+ csr = omap1_dma_read(reg);
+ }
+ if (enable_1510_mode ch = 2 (csr 7) != 0) {
+ omap1_dma_chan[ch + 6].saved_csr = csr 7;
+ csr = 0x7f;
+ }
+ if ((csr 0x3f) == 0)
+ return 0;
+ if (unlikely(omap1_dma_chan[ch].dev_id == -1)) {
+ printk(KERN_WARNING Spurious interrupt from DMA channel
+ %d (CSR %04x)\n, ch, csr);
+ return 0;
+ }
+ if (unlikely(csr OMAP1_DMA_TOUT_IRQ))
+ printk(KERN_WARNING DMA timeout with device %d\n,
+ omap1_dma_chan[ch].dev_id);
+ if (unlikely(csr OMAP_DMA_DROP_IRQ))
+ printk(KERN_WARNING DMA synchronization event drop occurred
+ with device %d\n, omap1_dma_chan[ch].dev_id);
+ if (likely(csr OMAP_DMA_BLOCK_IRQ))
+ omap1_dma_chan[ch].flags = ~OMAP_DMA_ACTIVE;
+
+ if (likely(omap1_dma_chan[ch].callback != NULL))
+ omap1_dma_chan[ch].callback(ch, csr, omap1_dma_chan[ch].data);
+
+ return 1;
+}
+
+static irqreturn_t omap_dma_irq_handler(int irq, void *dev_id)
+{
+ int ch = ((int) dev_id) - 1;
+ int handled = 0;
+
+ for (;;) {
+ int handled_now = 0;
+
+ handled_now += omap1_dma_handle_ch(ch);
+
+ if (enable_1510_mode
+ omap1_dma_chan[ch + 6].saved_csr)
+ handled_now += omap1_dma_handle_ch(ch + 6);
+
+ if (!handled_now)
+ break;
+ handled += handled_now;
+ }
+ return handled ? IRQ_HANDLED : IRQ_NONE;
+}
+
+static int dma_irq_register(int dma_irq, int irq_count,
+ void __iomem *omap_dma_base, struct omap_dma_lch *dma_chan)
+{
+ int ret = request_irq(dma_irq, omap_dma_irq_handler, 0, DMA,
+ (void *) (irq_count+1));
+ dma_base = omap_dma_base;
+ omap1_dma_chan = dma_chan;
+ return ret;
+}
+
static int __init omap1_system_dma_init(void)
{
struct platform_device *pdev;
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index f5fe0f5..42a96cf 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -134,6 +134,117 @@ static void __iomem *dma_base;
static struct dma_link_info *dma_linked_lch;
static u32 dma_chan_count;
+static int omap2_dma_handle_ch(int ch)
+{
+ u32 reg, ch_reg_base, status;
+
+ ch_reg_base = (r-lch_base * ch);
+ reg = ch_reg_base + r-common_ch.csr;
+ status = omap2_dma_read(reg);
+
+ if (!status) {
+ if (printk_ratelimit())
+ printk(KERN_WARNING Spurious DMA IRQ for lch %d\n,
+ ch);
+ omap2_dma_write(1 ch, r-irqreg.irq_status_l0);
+ return 0;
+ }
+ if (unlikely(dma_chan[ch].dev_id == -1)) {
+ if (printk_ratelimit())
+ printk(KERN_WARNING IRQ %04x for non-allocated DMA
+ channel %d\n, status, ch);
+ return 0;
+ }
+ if (unlikely(status OMAP_DMA_DROP_IRQ))
+ printk(KERN_INFO
+ DMA synchronization event drop occurred with device
+ %d\n, dma_chan[ch].dev_id);
+ if (unlikely(status OMAP2_DMA_TRANS_ERR_IRQ)) {
+ printk(KERN_INFO DMA transaction error with device %d\n,
+ dma_chan[ch].dev_id);
+
+ if (omap2_pdata-errata DMA_CH_DISABLE_ERRATA) {
+
[RFC PATCH 05/10] OMAP1: DMA: Introduce DMA driver as platform driver
This patch introduces OMAP1 DMA driver as platform device
and adds support for registering through platform device
layer.
Signed-off-by: Manjunatha GK manj...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap1/dma.c | 271
arch/arm/mach-omap1/include/mach/dma.h | 80 ++
arch/arm/plat-omap/include/plat/dma.h | 118 ++
3 files changed, 469 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap1/dma.c
create mode 100644 arch/arm/mach-omap1/include/mach/dma.h
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
new file mode 100644
index 000..57be4f5
--- /dev/null
+++ b/arch/arm/mach-omap1/dma.c
@@ -0,0 +1,271 @@
+/*
+ * dma.c - OMAP1/OMAP7xx-specific DMA code
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * Author:
+ * Manjunatha GK manj...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/err.h
+#include linux/slab.h
+#include linux/pm_runtime.h
+#include linux/io.h
+#include linux/module.h
+#include linux/init.h
+#include linux/sched.h
+#include linux/spinlock.h
+#include linux/errno.h
+#include linux/interrupt.h
+#include linux/irq.h
+
+#include mach/dma.h
+
+#include plat/irqs.h
+#include plat/dma.h
+#include plat/tc.h
+
+#define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec)
+
+#define omap1_dma_read(reg)__raw_readw(dma_base + reg)
+#define omap1_dma_write(val, reg) __raw_writew(val, dma_base + reg)
+
+static struct resource res[] __initdata = {
+ [0] = {
+ .start = OMAP1_DMA_BASE,
+ .end= OMAP1_DMA_BASE + SZ_2K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = system_dma_0,
+ .start = INT_DMA_CH0_6,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .name = system_dma_1,
+ .start = INT_DMA_CH1_7,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .name = system_dma_2,
+ .start = INT_DMA_CH2_8,
+ .flags = IORESOURCE_IRQ,
+ },
+ [4] = {
+ .name = system_dma_3,
+ .start = INT_DMA_CH3,
+ .flags = IORESOURCE_IRQ,
+ },
+ [5] = {
+ .name = system_dma_4,
+ .start = INT_DMA_CH4,
+ .flags = IORESOURCE_IRQ,
+ },
+ [6] = {
+ .name = system_dma_5,
+ .start = INT_DMA_CH5,
+ .flags = IORESOURCE_IRQ,
+ },
+ [7] = {
+ .name = system_dma_6,
+ .start = INT_DMA_LCD,
+ .flags = IORESOURCE_IRQ,
+ },
+ /* irq's for omap16xx and omap7xx */
+ [8] = {
+ .name = system_dma_7,
+ .start = 53 + IH2_BASE,
+ .flags = IORESOURCE_IRQ,
+ },
+ [9] = {
+ .name = system_dma_8,
+ .start = 54 + IH2_BASE,
+ .flags = IORESOURCE_IRQ,
+ },
+ [10] = {
+ .name = system_dma_9,
+ .start = 55 + IH2_BASE,
+ .flags = IORESOURCE_IRQ,
+ },
+ [11] = {
+ .name = system_dma_10,
+ .start = 56 + IH2_BASE,
+ .flags = IORESOURCE_IRQ,
+ },
+ [12] = {
+ .name = system_dma_11,
+ .start = 57 + IH2_BASE,
+ .flags = IORESOURCE_IRQ,
+ },
+ [13] = {
+ .name = system_dma_12,
+ .start = 58 + IH2_BASE,
+ .flags = IORESOURCE_IRQ,
+ },
+ [14] = {
+ .name = system_dma_13,
+ .start = 59 + IH2_BASE,
+ .flags = IORESOURCE_IRQ,
+ },
+ [15] = {
+ .name = system_dma_14,
+ .start = 60 + IH2_BASE,
+ .flags = IORESOURCE_IRQ,
+ },
+ [16] = {
+ .name = system_dma_15,
+ .start = 61 + IH2_BASE,
+ .flags = IORESOURCE_IRQ,
+ },
+ [17] = {
+ .name = system_dma_16,
+ .start = 62 + IH2_BASE,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct omap_dma_reg_offset dma_reg_offset[] = {
+ {
+ .lch_base = OMAP1_DMA_CH_BASE,
+ .gcr= OMAP1_DMA_GCR,
+ .gscr = OMAP1_DMA_GSCR,
+ .grst = OMAP1_DMA_GRST,
+ .hw_id = OMAP1_DMA_HW_ID,
+ .ch_specific = {
[RFC PATCH 03/10] OMAP3: DMA: HWMOD: Add hwmod data structures
This patch adds OMAP3 DMA hwmod structures.
Signed-off-by: Manjunatha GK manj...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 90
1 files changed, 90 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index d3bf85b..ca23219 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -17,6 +17,7 @@
#include mach/irqs.h
#include plat/cpu.h
#include plat/dma.h
+#include mach/dma.h
#include omap_hwmod_common_data.h
@@ -36,6 +37,7 @@ static struct omap_hwmod omap3xxx_iva_hwmod;
static struct omap_hwmod omap3xxx_l3_main_hwmod;
static struct omap_hwmod omap3xxx_l4_core_hwmod;
static struct omap_hwmod omap3xxx_l4_per_hwmod;
+static struct omap_hwmod omap3xxx_dma_system_hwmod;
/* L3 - L4_CORE interface */
static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
@@ -69,6 +71,14 @@ static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[]
= {
omap3xxx_l3_main__l4_per,
};
+/* dma_system - L3 */
+static struct omap_hwmod_ocp_if omap3xxx_dma_system__l3 = {
+ .master = omap3xxx_dma_system_hwmod,
+ .slave = omap3xxx_l3_main_hwmod,
+ .clk= l3_div_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* L3 */
static struct omap_hwmod omap3xxx_l3_main_hwmod = {
.name = l3_main,
@@ -197,6 +207,85 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};
+/* dma attributes */
+static struct omap_dma_dev_attr dma_dev_attr = {
+ .dma_dev_attr = DMA_LINKED_LCH | GLOBAL_PRIORITY |
+ IS_CSSA_32 | IS_CDSA_32,
+ .dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT,
+};
+
+static struct omap_hwmod_class_sysconfig omap3xxx_dma_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x002c,
+ .syss_offs = 0x0028,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+ SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+ SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap3xxx_dma_hwmod_class = {
+ .name = dma,
+ .sysc = omap3xxx_dma_sysc,
+};
+
+/* dma_system */
+static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = {
+ { .name = dma_0, .irq = INT_24XX_SDMA_IRQ0 },
+ { .name = dma_1, .irq = INT_24XX_SDMA_IRQ1 },
+ { .name = dma_2, .irq = INT_24XX_SDMA_IRQ2 },
+ { .name = dma_3, .irq = INT_24XX_SDMA_IRQ3 },
+};
+
+static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
+ {
+ .pa_start = 0x48056000,
+ .pa_end = 0x4a0560ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* dma_system master ports */
+static struct omap_hwmod_ocp_if *omap3xxx_dma_system_masters[] = {
+ omap3xxx_dma_system__l3,
+};
+
+/* l4_cfg - dma_system */
+static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = {
+ .master = omap3xxx_l4_core_hwmod,
+ .slave = omap3xxx_dma_system_hwmod,
+ .clk= l4_div_ck,
+ .addr = omap3xxx_dma_system_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_dma_system_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* dma_system slave ports */
+static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = {
+ omap3xxx_l4_core__dma_system,
+};
+
+static struct omap_hwmod omap3xxx_dma_system_hwmod = {
+ .name = dma,
+ .class = omap3xxx_dma_hwmod_class,
+ .mpu_irqs = omap3xxx_dma_system_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dma_system_irqs),
+ .main_clk = l3_div_ck,
+ .prcm = {
+ .omap2 = {
+ /* .clkctrl_reg = NULL, */
+ },
+ },
+ .slaves = omap3xxx_dma_system_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_dma_system_slaves),
+ .masters= omap3xxx_dma_system_masters,
+ .masters_cnt= ARRAY_SIZE(omap3xxx_dma_system_masters),
+ .dev_attr = dma_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
omap3xxx_l3_main_hwmod,
omap3xxx_l4_core_hwmod,
@@ -204,6 +293,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
[RFC PATCH 07/10] OMAP2/3/4: DMA: Move chain API's to mach-omap2
The DMA chaining feature is supported from omap2 plus processors and not
supported in omap1. Moving DMA chain API's to mach-omap2.
Note: Existing DMA chain API's in plat-omap will be cleaned up in another
patch. This make sure that build is not broken with individual patches.
Signed-off-by: Manjunatha GK manj...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/dma.c | 663
arch/arm/mach-omap2/include/mach/dma.h | 27 ++
2 files changed, 690 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index 548321b..f5fe0f5 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -30,6 +30,59 @@
#include plat/omap_device.h
#include plat/dma.h
+#define omap2_dma_read(reg)__raw_readl(dma_base + reg)
+#define omap2_dma_write(val, reg) __raw_writel(val, dma_base + reg)
+
+enum { DMA_CH_ALLOC_DONE, DMA_CH_PARAMS_SET_DONE, DMA_CH_STARTED,
+ DMA_CH_QUEUED, DMA_CH_NOTSTARTED, DMA_CH_PAUSED, DMA_CH_LINK_ENABLED
+};
+
+enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
+
+/* Chain handling macros */
+#define OMAP_DMA_CHAIN_QINIT(chain_id) \
+ do {\
+ dma_linked_lch[chain_id].q_head = \
+ dma_linked_lch[chain_id].q_tail = \
+ dma_linked_lch[chain_id].q_count = 0; \
+ } while (0)
+#define OMAP_DMA_CHAIN_QFULL(chain_id) \
+ (dma_linked_lch[chain_id].no_of_lchs_linked == \
+ dma_linked_lch[chain_id].q_count)
+#define OMAP_DMA_CHAIN_QLAST(chain_id) \
+ do {\
+ ((dma_linked_lch[chain_id].no_of_lchs_linked-1) == \
+ dma_linked_lch[chain_id].q_count) \
+ } while (0)
+#define OMAP_DMA_CHAIN_QEMPTY(chain_id)
\
+ (0 == dma_linked_lch[chain_id].q_count)
+#define __OMAP_DMA_CHAIN_INCQ(end) \
+ ((end) = ((end)+1) % dma_linked_lch[chain_id].no_of_lchs_linked)
+#define OMAP_DMA_CHAIN_INCQHEAD(chain_id) \
+ do {\
+ __OMAP_DMA_CHAIN_INCQ(dma_linked_lch[chain_id].q_head); \
+ dma_linked_lch[chain_id].q_count--; \
+ } while (0)
+
+#define OMAP_DMA_CHAIN_INCQTAIL(chain_id) \
+ do {\
+ __OMAP_DMA_CHAIN_INCQ(dma_linked_lch[chain_id].q_tail); \
+ dma_linked_lch[chain_id].q_count++; \
+ } while (0)
+
+struct dma_link_info {
+ int *linked_dmach_q;
+ int no_of_lchs_linked;
+
+ int q_count;
+ int q_tail;
+ int q_head;
+
+ int chain_state;
+ int chain_mode;
+
+};
+
struct omap_device_pm_latency omap2_dma_latency[] = {
{
.deactivate_func = omap_device_idle_hwmods,
@@ -81,6 +134,616 @@ static void __iomem *dma_base;
static struct dma_link_info *dma_linked_lch;
static u32 dma_chan_count;
+/* Create chain of DMA channesls */
+static void create_dma_lch_chain(int lch_head, int lch_queue)
+{
+ u32 reg, ch_reg_base, l;
+
+ /* Check if this is the first link in chain */
+ if (dma_chan[lch_head].next_linked_ch == -1) {
+ dma_chan[lch_head].next_linked_ch = lch_queue;
+ dma_chan[lch_head].prev_linked_ch = lch_queue;
+ dma_chan[lch_queue].next_linked_ch = lch_head;
+ dma_chan[lch_queue].prev_linked_ch = lch_head;
+ }
+
+ /* a link exists, link the new channel in circular chain */
+ else {
+ dma_chan[lch_queue].next_linked_ch =
+ dma_chan[lch_head].next_linked_ch;
+ dma_chan[lch_queue].prev_linked_ch = lch_head;
+ dma_chan[lch_head].next_linked_ch = lch_queue;
+ dma_chan[dma_chan[lch_queue].next_linked_ch].
+ prev_linked_ch = lch_queue;
+ }
+
+ ch_reg_base = r-lch_base * lch_head;
+ reg = ch_reg_base + r-common_ch.clnk_ctrl;
+ l = omap2_dma_read(reg);
+ l = ~(0x1f);
+ l |= lch_queue;
+ omap2_dma_write(l, reg);
+
+ ch_reg_base = r-lch_base * lch_queue;
+ reg = ch_reg_base + r-common_ch.clnk_ctrl;
+ l = omap2_dma_read(reg);
+ l = ~(0x1f);
+ l |=
Re: [RFC 1/3 v3] mm: iommu: An API to unify IOMMU, CPU and device memory management
Russell King - ARM Linux wrote: On Wed, Jul 07, 2010 at 03:44:27PM -0700, Zach Pfeffer wrote: The DMA API handles the allocation and use of DMA channels. It can configure physical transfer settings, manage scatter-gather lists, etc. You're confused about what the DMA API is. You're talking about the DMA engine subsystem (drivers/dma) not the DMA API (see Documentation/DMA-API.txt, include/linux/dma-mapping.h, and arch/arm/include/asm/dma-mapping.h) Thanks for the clarification. The VCM allows all device buffers to be passed between all devices in the system without passing those buffers through each domain's API. This means that instead of writing code to interoperate between DMA engines, IOMMU mapped spaces, CPUs and physically addressed devices the user can simply target a device with a buffer using the same API regardless of how that device maps or otherwise accesses the buffer. With the DMA API, if we have a SG list which refers to the physical pages (as a struct page, offset, length tuple), the DMA API takes care of dealing with CPU caches and IOMMUs to make the data in the buffer visible to the target device. It provides you with a set of cookies referring to the SG lists, which may be coalesced if the IOMMU can do so. If you have a kernel virtual address, the DMA API has single buffer mapping/unmapping functions to do the same thing, and provide you with a cookie to pass to the device to refer to that buffer. These cookies are whatever the device needs to be able to access the buffer - for instance, if system SDRAM is located at 0xc000 virtual, 0x8000 physical and 0x4000 as far as the DMA device is concerned, then the cookie for a buffer at 0xc000 virtual will be 0x4000 and not 0x8000. It sounds like I've got some work to do. I appreciate the feedback. The problem I'm trying to solve boils down to this: map a set of contiguous physical buffers to an aligned IOMMU address. I need to allocate the set of physical buffers in a particular way: use 1 MB contiguous physical memory, then 64 KB, then 4 KB, etc. and I need to align the IOMMU address in a particular way. I also need to swap out the IOMMU address spaces and map the buffers into the kernel. I have this all solved, but it sounds like I'll need to migrate to the DMA API to upstream it. -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
