[RFC] add BUG_ON_MAPPABLE_NULL macro
Introduce BUG_ON_MAPPABLE_NULL in order to eliminate redundant BUG_ON
code, checking for NULL addresses, on architectures where the zero
address can never be mapped.
Originally proposed by Russell King li...@arm.linux.org.uk
Signed-off-by: Ohad Ben-Cohen o...@wizery.com
---
Compile tested on ARM and x86-64.
Relevant threads:
1. Original proposal by Russell - http://lkml.org/lkml/2010/1/21/238
2. Recent discussion - https://lkml.org/lkml/2010/11/26/78
Notes:
* Implementation still feels hacky, especially since we don't care about the
len param of arch_mmap_check.
* Just like BUG_ON, this new macro is compiled out on !CONFIG_BUG. We might
want to add a CONFIG_BUG commentary, so users will at least be aware of the
security implications of compiling this out.
* To get an (extremely!) rough upper bound of the profit of this macro, I did:
1. find . -name '*.[ch]' | xargs sed -i 's/BUG_ON(!/BUG_ON_MAPPABLE_NULL(!/'
2. removed some obviously bogus sed hits
With omap2plus_defconfig, uImage shrank by ~4Kb (obviously this doesn't include
the potential gain in modules)
arch/arm/include/asm/mman.h |2 +
include/asm-generic/bug.h | 46 +++
2 files changed, 48 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/mman.h b/arch/arm/include/asm/mman.h
index 41f99c5..f0c5d58 100644
--- a/arch/arm/include/asm/mman.h
+++ b/arch/arm/include/asm/mman.h
@@ -1,4 +1,6 @@
#include asm-generic/mman.h
+#include asm/pgtable.h
+#include asm/errno.h
#define arch_mmap_check(addr, len, flags) \
(((flags) MAP_FIXED (addr) FIRST_USER_ADDRESS) ? -EINVAL : 0)
diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h
index c2c9ba0..0171a30 100644
--- a/include/asm-generic/bug.h
+++ b/include/asm-generic/bug.h
@@ -2,6 +2,11 @@
#define _ASM_GENERIC_BUG_H
#include linux/compiler.h
+#include asm/mman.h
+
+#ifndef arch_mmap_check
+#define arch_mmap_check(addr, len, flags) (0)
+#endif
#ifdef CONFIG_BUG
@@ -53,6 +58,47 @@ struct bug_entry {
#define BUG_ON(condition) do { if (unlikely(condition)) BUG(); } while(0)
#endif
+/**
+ * BUG_ON_MAPPABLE_NULL() - BUG_ON(condition) only if address 0 is mappable
+ * @condition: condition to check, should contain a NULL check
+ *
+ * In general, NULL dereference Oopses are not desirable, since they take down
+ * the system with them and make the user extremely unhappy. So as a general
+ * rule drivers should avoid dereferencing NULL pointers by doing a simple
+ * check (when appropriate), and just return an error rather than crash.
+ * This way the system, despite having reduced functionality, will just keep
+ * running rather than immediately reboot.
+ *
+ * _Critical_ kernel code, OTOH, that should not (/cannot) keep running when
+ * given an unexpected NULL pointer, should just crash. On some architectures,
+ * a NULL dereference will always reliably produce an Oops. On others, where
+ * the zero address can be mmapped, an Oops is not guaranteed. Relying on
+ * NULL dereference Oopses to happen on these architectures might lead to
+ * data corruptions (system will keep running despite a critical bug and
+ * the results will be horribly undefined). In addition, these situations
+ * can also have security implications - we have seen several privilege
+ * escalation exploits with which an attacker gained full control over the
+ * system due to NULL dereference bugs.
+ *
+ * This macro will BUG_ON if @condition is true on architectures where the zero
+ * address can be mapped. On other architectures, where the zero address
+ * can never be mapped, this macro is compiled out. It only makes sense to
+ * use this macro if @condition contains a NULL check, in order to optimize
that
+ * check out on architectures where the zero address can never be mapped.
+ * On such architectures, those checks are not necessary, since the code
+ * itself will reliably reproduce an Oops as soon as the NULL address will
+ * be dereferenced.
+ *
+ * As with BUG_ON, use this macro only if @condition cannot be tolerated.
+ * If proceeding with degraded functionality is an option, it's much
+ * better to just simply check for @condition and return some error code rather
+ * than crash the system.
+ */
+#define BUG_ON_MAPPABLE_NULL(cond) do { \
+ if (arch_mmap_check(0, 1, MAP_FIXED) == 0) \
+ BUG_ON(cond); \
+} while (0)
+
/*
* WARN(), WARN_ON(), WARN_ON_ONCE, and so on can be used to report
* significant issues that need prompt attention if they should ever
--
1.7.0.4
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[PATCH 0/5] ARM: GIC: cleanup
This patch series cleans up the GIC code, consolidating some of the per-platform practices into the common GIC code. One notable change is to the initialization methods - we used to require platforms to pass in the address of the per-CPU interfaces despite them always being identical between all cores. This was nonsense, as even in the extremely unlikely event that they were different, we aren't storing them in a per-CPU manner. The GIC initialization methods are now simpler: one call to gic_init() from the boot CPU, and a call to gic_secondary_init() as each secondary CPU starts - and no need for platforms to keep track of the address anymore. One question remains on this: on platforms where there are more than one GIC, do these have separate CPU interfaces as well? We also consolidate gic_cpu_base_addr to save platforms using that - but only for the first GIC, and therefore we can have a common get_irqnr_preamble assembler macro for platforms which make use of this. Lastly, we move the GIC data to __read_mostly - and when we have support for this feature, we benefit from avoiding potential cache line ping-pongs between cores for data so marked. arch/arm/common/gic.c | 59 +--- arch/arm/include/asm/hardware/entry-macro-gic.S |7 +++ arch/arm/include/asm/hardware/gic.h |6 ++- arch/arm/mach-cns3xxx/core.c |7 +-- arch/arm/mach-cns3xxx/core.h |1 - arch/arm/mach-cns3xxx/include/mach/entry-macro.S |5 -- arch/arm/mach-msm/board-msm8x60.c |7 +-- arch/arm/mach-omap2/include/mach/entry-macro.S|1 + arch/arm/mach-omap2/include/mach/omap4-common.h |1 - arch/arm/mach-omap2/omap-smp.c|2 +- arch/arm/mach-omap2/omap4-common.c| 11 ++-- arch/arm/mach-realview/core.c |3 - arch/arm/mach-realview/core.h |1 - arch/arm/mach-realview/include/mach/entry-macro.S |5 -- arch/arm/mach-realview/platsmp.c |2 +- arch/arm/mach-realview/realview_eb.c | 14 ++--- arch/arm/mach-realview/realview_pb1176.c | 11 ++-- arch/arm/mach-realview/realview_pb11mp.c | 10 ++-- arch/arm/mach-realview/realview_pba8.c|6 +- arch/arm/mach-realview/realview_pbx.c | 13 ++--- arch/arm/mach-s5pv310/cpu.c |6 +-- arch/arm/mach-s5pv310/include/mach/smp.h |2 - arch/arm/mach-s5pv310/platsmp.c |2 +- arch/arm/mach-tegra/include/mach/entry-macro.S|2 +- arch/arm/mach-tegra/irq.c |4 +- arch/arm/mach-tegra/platsmp.c |2 +- arch/arm/mach-ux500/cpu.c |4 +- arch/arm/mach-ux500/include/mach/entry-macro.S|1 + arch/arm/mach-ux500/platsmp.c |2 +- arch/arm/mach-vexpress/core.h |2 - arch/arm/mach-vexpress/ct-ca9x4.c |7 +-- arch/arm/mach-vexpress/include/mach/entry-macro.S |5 -- arch/arm/mach-vexpress/platsmp.c |2 +- 33 files changed, 100 insertions(+), 113 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/5] ARM: GIC: provide a single initialization function for boot CPU
Provide gic_init() which initializes the GIC distributor and current
CPU's GIC interface for the boot (or single) CPU.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/common/gic.c| 11 +--
arch/arm/include/asm/hardware/gic.h |2 +-
arch/arm/mach-cns3xxx/core.c |4 ++--
arch/arm/mach-msm/board-msm8x60.c|3 +--
arch/arm/mach-omap2/omap4-common.c |4 ++--
arch/arm/mach-realview/realview_eb.c | 12 ++--
arch/arm/mach-realview/realview_pb1176.c | 10 ++
arch/arm/mach-realview/realview_pb11mp.c |9 +
arch/arm/mach-realview/realview_pba8.c |5 +++--
arch/arm/mach-realview/realview_pbx.c| 11 +--
arch/arm/mach-s5pv310/cpu.c |3 +--
arch/arm/mach-tegra/irq.c|4 ++--
arch/arm/mach-ux500/cpu.c|4 ++--
arch/arm/mach-vexpress/ct-ca9x4.c|3 +--
14 files changed, 46 insertions(+), 39 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 772f95f..41dce4f 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -207,8 +207,8 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned
int irq)
set_irq_chained_handler(irq, gic_handle_cascade_irq);
}
-void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
- unsigned int irq_start)
+static void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
+ unsigned int irq_start)
{
unsigned int max_irq, i;
u32 cpumask = 1 smp_processor_id();
@@ -306,6 +306,13 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void
__iomem *base)
writel(1, base + GIC_CPU_CTRL);
}
+void __init gic_init(unsigned int gic_nr, unsigned int irq_start,
+ void __iomem *dist_base, void __iomem *cpu_base)
+{
+ gic_dist_init(gic_nr, dist_base, irq_start);
+ gic_cpu_init(gic_nr, cpu_base);
+}
+
#ifdef CONFIG_SMP
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
{
diff --git a/arch/arm/include/asm/hardware/gic.h
b/arch/arm/include/asm/hardware/gic.h
index 7f34333..387c6ae 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -33,8 +33,8 @@
#define GIC_DIST_SOFTINT 0xf00
#ifndef __ASSEMBLY__
-void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int
irq_start);
void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
+void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
#endif
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index 9ca4d58..e9c4915 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -74,8 +74,8 @@ void __iomem *gic_cpu_base_addr;
void __init cns3xxx_init_irq(void)
{
gic_cpu_base_addr = __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT);
- gic_dist_init(0, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), 29);
- gic_cpu_init(0, gic_cpu_base_addr);
+ gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
+ gic_cpu_base_addr);
}
void cns3xxx_power_off(void)
diff --git a/arch/arm/mach-msm/board-msm8x60.c
b/arch/arm/mach-msm/board-msm8x60.c
index 7486a68..aaf8ec8 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -44,9 +44,8 @@ static void __init msm8x60_init_irq(void)
{
unsigned int i;
- gic_dist_init(0, MSM_QGIC_DIST_BASE, GIC_PPI_START);
gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE;
- gic_cpu_init(0, MSM_QGIC_CPU_BASE);
+ gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, gic_cpu_base_addr);
/* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
writel(0xD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
diff --git a/arch/arm/mach-omap2/omap4-common.c
b/arch/arm/mach-omap2/omap4-common.c
index 2f89555..3fd3df7 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -35,12 +35,12 @@ void __init gic_init_irq(void)
/* Static mapping, never released */
gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
BUG_ON(!gic_dist_base_addr);
- gic_dist_init(0, gic_dist_base_addr, 29);
/* Static mapping, never released */
gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
BUG_ON(!gic_cpu_base_addr);
- gic_cpu_init(0, gic_cpu_base_addr);
+
+ gic_init(0, 29, gic_dist_base_addr, gic_cpu_base_addr);
}
#ifdef CONFIG_CACHE_L2X0
diff --git a/arch/arm/mach-realview/realview_eb.c
b/arch/arm/mach-realview/realview_eb.c
index f269710..241bcbc 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -365,20 +365,20 @@ static void __init gic_init_irq(void)
[PATCH 2/5] ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init
We don't need to re-pass the base address for the CPU interfaces to the
GIC for secondary CPUs, as it will never be different from the boot CPU
- and even if it was, we'd overwrite the boot CPU's base address.
Get rid of this argument, and rename to gic_secondary_init().
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/common/gic.c |7 ++-
arch/arm/include/asm/hardware/gic.h |2 +-
arch/arm/mach-omap2/omap-smp.c |2 +-
arch/arm/mach-realview/platsmp.c|2 +-
arch/arm/mach-s5pv310/platsmp.c |2 +-
arch/arm/mach-tegra/platsmp.c |2 +-
arch/arm/mach-ux500/platsmp.c |2 +-
arch/arm/mach-vexpress/platsmp.c|2 +-
8 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 41dce4f..12b6a08 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -276,7 +276,7 @@ static void __init gic_dist_init(unsigned int gic_nr, void
__iomem *base,
writel(1, base + GIC_DIST_CTRL);
}
-void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
+static void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
{
void __iomem *dist_base;
int i;
@@ -313,6 +313,11 @@ void __init gic_init(unsigned int gic_nr, unsigned int
irq_start,
gic_cpu_init(gic_nr, cpu_base);
}
+void __cpuinit gic_secondary_init(unsigned int gic_nr)
+{
+ gic_cpu_init(gic_nr, gic_data[gic_nr].cpu_base);
+}
+
#ifdef CONFIG_SMP
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
{
diff --git a/arch/arm/include/asm/hardware/gic.h
b/arch/arm/include/asm/hardware/gic.h
index 387c6ae..48876a3 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -33,8 +33,8 @@
#define GIC_DIST_SOFTINT 0xf00
#ifndef __ASSEMBLY__
-void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);
+void gic_secondary_init(unsigned int);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
#endif
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 9e9f70e..9fbac2c 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -50,7 +50,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, gic_cpu_base_addr);
+ gic_secondary_init(0);
/*
* Synchronise with the boot thread.
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 0092658..6da8a2e 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -69,7 +69,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, gic_cpu_base_addr);
+ gic_secondary_init(0);
/*
* let the primary processor know we're out of the
diff --git a/arch/arm/mach-s5pv310/platsmp.c b/arch/arm/mach-s5pv310/platsmp.c
index d357c19..15929c1 100644
--- a/arch/arm/mach-s5pv310/platsmp.c
+++ b/arch/arm/mach-s5pv310/platsmp.c
@@ -54,7 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, gic_cpu_base_addr);
+ gic_secondary_init(0);
/*
* let the primary processor know we're out of the
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 1c0fd92..3b7376c 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -48,7 +48,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x100);
+ gic_secondary_init(0);
/*
* Synchronise with the boot thread.
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 9e4c678..b5077b4 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -44,7 +44,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
+ gic_secondary_init(0);
/*
* let the primary processor know we're out of the
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 6709706..dfb5910 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -51,7 +51,7 @@ void __cpuinit
[PATCH 3/5] ARM: GIC: consolidate gic_cpu_base_addr to common GIC code
Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt. Move this into the common GIC code.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/common/gic.c |5 +
arch/arm/include/asm/hardware/gic.h |2 ++
arch/arm/mach-cns3xxx/core.c|5 +
arch/arm/mach-cns3xxx/core.h|1 -
arch/arm/mach-msm/board-msm8x60.c |6 ++
arch/arm/mach-omap2/include/mach/omap4-common.h |1 -
arch/arm/mach-omap2/omap4-common.c |9 +
arch/arm/mach-realview/core.c |3 ---
arch/arm/mach-realview/core.h |1 -
arch/arm/mach-realview/realview_eb.c|6 ++
arch/arm/mach-realview/realview_pb1176.c|3 +--
arch/arm/mach-realview/realview_pb11mp.c|3 +--
arch/arm/mach-realview/realview_pba8.c |1 -
arch/arm/mach-realview/realview_pbx.c |2 --
arch/arm/mach-s5pv310/cpu.c |3 ---
arch/arm/mach-s5pv310/include/mach/smp.h|2 --
arch/arm/mach-vexpress/core.h |2 --
arch/arm/mach-vexpress/ct-ca9x4.c |6 ++
18 files changed, 21 insertions(+), 40 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 12b6a08..c48634a 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -35,6 +35,9 @@
static DEFINE_SPINLOCK(irq_controller_lock);
+/* Address of GIC 0 CPU interface */
+void __iomem *gic_cpu_base_addr;
+
struct gic_chip_data {
unsigned int irq_offset;
void __iomem *dist_base;
@@ -309,6 +312,8 @@ static void __cpuinit gic_cpu_init(unsigned int gic_nr,
void __iomem *base)
void __init gic_init(unsigned int gic_nr, unsigned int irq_start,
void __iomem *dist_base, void __iomem *cpu_base)
{
+ if (gic_nr == 0)
+ gic_cpu_base_addr = cpu_base;
gic_dist_init(gic_nr, dist_base, irq_start);
gic_cpu_init(gic_nr, cpu_base);
}
diff --git a/arch/arm/include/asm/hardware/gic.h
b/arch/arm/include/asm/hardware/gic.h
index 48876a3..a82a777 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -33,6 +33,8 @@
#define GIC_DIST_SOFTINT 0xf00
#ifndef __ASSEMBLY__
+extern void __iomem *gic_cpu_base_addr;
+
void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);
void gic_secondary_init(unsigned int);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index e9c4915..da30078 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -69,13 +69,10 @@ void __init cns3xxx_map_io(void)
}
/* used by entry-macro.S */
-void __iomem *gic_cpu_base_addr;
-
void __init cns3xxx_init_irq(void)
{
- gic_cpu_base_addr = __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT);
gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
- gic_cpu_base_addr);
+__io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));
}
void cns3xxx_power_off(void)
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h
index 6b33ec1..ef9e511 100644
--- a/arch/arm/mach-cns3xxx/core.h
+++ b/arch/arm/mach-cns3xxx/core.h
@@ -11,7 +11,6 @@
#ifndef __CNS3XXX_CORE_H
#define __CNS3XXX_CORE_H
-extern void __iomem *gic_cpu_base_addr;
extern struct sys_timer cns3xxx_timer;
void __init cns3xxx_map_io(void);
diff --git a/arch/arm/mach-msm/board-msm8x60.c
b/arch/arm/mach-msm/board-msm8x60.c
index aaf8ec8..9b5eb2b 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -28,8 +28,6 @@
#include mach/board.h
#include mach/msm_iomap.h
-void __iomem *gic_cpu_base_addr;
-
unsigned long clk_get_max_axi_khz(void)
{
return 0;
@@ -44,8 +42,8 @@ static void __init msm8x60_init_irq(void)
{
unsigned int i;
- gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE;
- gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, gic_cpu_base_addr);
+ gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
+(void *)MSM_QGIC_CPU_BASE);
/* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
writel(0xD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h
b/arch/arm/mach-omap2/include/mach/omap4-common.h
index 2744dfe..5b0270b 100644
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ b/arch/arm/mach-omap2/include/mach/omap4-common.h
@@ -24,7 +24,6 @@
extern void __iomem *l2cache_base;
#endif
-extern void __iomem *gic_cpu_base_addr;
extern void __iomem *gic_dist_base_addr;
extern void __init gic_init_irq(void);
diff --git a/arch/arm/mach-omap2/omap4-common.c
b/arch/arm/mach-omap2/omap4-common.c
index
[PATCH 4/5] ARM: GIC: move gic_data[] initialization into gic_init()
This avoids writing unnecessarily to gic_data[] from other CPUs,
making this a mostly read-only variable.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/common/gic.c | 48
1 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index c48634a..b6a1d09 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -36,7 +36,7 @@
static DEFINE_SPINLOCK(irq_controller_lock);
/* Address of GIC 0 CPU interface */
-void __iomem *gic_cpu_base_addr;
+void __iomem *gic_cpu_base_addr __read_mostly;
struct gic_chip_data {
unsigned int irq_offset;
@@ -48,7 +48,7 @@ struct gic_chip_data {
#define MAX_GIC_NR 1
#endif
-static struct gic_chip_data gic_data[MAX_GIC_NR];
+static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
static inline void __iomem *gic_dist_base(unsigned int irq)
{
@@ -210,21 +210,16 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned
int irq)
set_irq_chained_handler(irq, gic_handle_cascade_irq);
}
-static void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
+static void __init gic_dist_init(struct gic_chip_data *gic,
unsigned int irq_start)
{
unsigned int max_irq, i;
+ void __iomem *base = gic-dist_base;
u32 cpumask = 1 smp_processor_id();
- if (gic_nr = MAX_GIC_NR)
- BUG();
-
cpumask |= cpumask 8;
cpumask |= cpumask 16;
- gic_data[gic_nr].dist_base = base;
- gic_data[gic_nr].irq_offset = (irq_start - 1) ~31;
-
writel(0, base + GIC_DIST_CTRL);
/*
@@ -269,9 +264,9 @@ static void __init gic_dist_init(unsigned int gic_nr, void
__iomem *base,
/*
* Setup the Linux IRQ subsystem.
*/
- for (i = irq_start; i gic_data[gic_nr].irq_offset + max_irq; i++) {
+ for (i = irq_start; i gic-irq_offset + max_irq; i++) {
set_irq_chip(i, gic_chip);
- set_irq_chip_data(i, gic_data[gic_nr]);
+ set_irq_chip_data(i, gic);
set_irq_handler(i, handle_level_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
}
@@ -279,19 +274,12 @@ static void __init gic_dist_init(unsigned int gic_nr,
void __iomem *base,
writel(1, base + GIC_DIST_CTRL);
}
-static void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
+static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
{
- void __iomem *dist_base;
+ void __iomem *dist_base = gic-dist_base;
+ void __iomem *base = gic-cpu_base;
int i;
- if (gic_nr = MAX_GIC_NR)
- BUG();
-
- dist_base = gic_data[gic_nr].dist_base;
- BUG_ON(!dist_base);
-
- gic_data[gic_nr].cpu_base = base;
-
/*
* Deal with the banked PPI and SGI interrupts - disable all
* PPI interrupts, ensure all SGI interrupts are enabled.
@@ -312,15 +300,27 @@ static void __cpuinit gic_cpu_init(unsigned int gic_nr,
void __iomem *base)
void __init gic_init(unsigned int gic_nr, unsigned int irq_start,
void __iomem *dist_base, void __iomem *cpu_base)
{
+ struct gic_chip_data *gic;
+
+ BUG_ON(gic_nr = MAX_GIC_NR);
+
+ gic = gic_data[gic_nr];
+ gic-dist_base = dist_base;
+ gic-cpu_base = cpu_base;
+ gic-irq_offset = (irq_start - 1) ~31;
+
if (gic_nr == 0)
gic_cpu_base_addr = cpu_base;
- gic_dist_init(gic_nr, dist_base, irq_start);
- gic_cpu_init(gic_nr, cpu_base);
+
+ gic_dist_init(gic, irq_start);
+ gic_cpu_init(gic);
}
void __cpuinit gic_secondary_init(unsigned int gic_nr)
{
- gic_cpu_init(gic_nr, gic_data[gic_nr].cpu_base);
+ BUG_ON(gic_nr = MAX_GIC_NR);
+
+ gic_cpu_init(gic_data[gic_nr]);
}
#ifdef CONFIG_SMP
--
1.6.2.5
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[PATCH 5/5] ARM: GIC: private a standard get_irqnr_preamble assembler macro
Provide a standard get_irqnr_preamble assembler macro for platforms to use, which retrieves the base address of the GIC CPU interface from gic_cpu_base_addr. Allow platforms to override this by defining HAVE_GET_IRQNR_PREAMBLE. Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk --- arch/arm/include/asm/hardware/entry-macro-gic.S |7 +++ arch/arm/mach-cns3xxx/include/mach/entry-macro.S |5 - arch/arm/mach-omap2/include/mach/entry-macro.S|1 + arch/arm/mach-realview/include/mach/entry-macro.S |5 - arch/arm/mach-tegra/include/mach/entry-macro.S|2 +- arch/arm/mach-ux500/include/mach/entry-macro.S|1 + arch/arm/mach-vexpress/include/mach/entry-macro.S |5 - 7 files changed, 10 insertions(+), 16 deletions(-) diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S index 05587f1..c115b82 100644 --- a/arch/arm/include/asm/hardware/entry-macro-gic.S +++ b/arch/arm/include/asm/hardware/entry-macro-gic.S @@ -10,6 +10,13 @@ #include asm/hardware/gic.h +#ifndef HAVE_GET_IRQNR_PREAMBLE + .macro get_irqnr_preamble, base, tmp + ldr \base, =gic_cpu_base_addr + ldr \base, [\base] + .endm +#endif + /* * The interrupt numbering scheme is defined in the * interrupt controller spec. To wit: diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S index e793c33..6bd83ed 100644 --- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S +++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S @@ -14,10 +14,5 @@ .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index 2e358df..d54c4f8 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -170,6 +170,7 @@ omap_irq_base: .word 0 #ifdef CONFIG_ARCH_OMAP4 +#define HAVE_GET_IRQNR_PREAMBLE #include asm/hardware/entry-macro-gic.S .macro get_irqnr_preamble, base, tmp diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S index 4417b10..4071164 100644 --- a/arch/arm/mach-realview/include/mach/entry-macro.S +++ b/arch/arm/mach-realview/include/mach/entry-macro.S @@ -13,11 +13,6 @@ .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S index dc09249..dd165c5 100644 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ b/arch/arm/mach-tegra/include/mach/entry-macro.S @@ -16,7 +16,7 @@ #include mach/io.h #if defined(CONFIG_ARM_GIC) - +#define HAVE_GET_IRQNR_PREAMBLE #include asm/hardware/entry-macro-gic.S /* Uses the GIC interrupt controller built into the cpu */ diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S index 3cc3cdf..a37f585 100644 --- a/arch/arm/mach-ux500/include/mach/entry-macro.S +++ b/arch/arm/mach-ux500/include/mach/entry-macro.S @@ -11,6 +11,7 @@ * warranty of any kind, whether express or implied. */ #include mach/hardware.h +#define HAVE_GET_IRQNR_PREAMBLE #include asm/hardware/entry-macro-gic.S .macro disable_fiq diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S index 19d5ac8..73c1129 100644 --- a/arch/arm/mach-vexpress/include/mach/entry-macro.S +++ b/arch/arm/mach-vexpress/include/mach/entry-macro.S @@ -3,10 +3,5 @@ .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm -- 1.6.2.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/2] Support for __read_mostly
This patch set adds support for __read_mostly - a separate section which is used to hold data which is hardly ever written. The idea behind this feature is to reduce the amount of cache line bouncing between SMP cores by avoiding this data sharing cache lines with data which is written more frequently. As long as a cache line is not dirtied, several cores can keep a copy of the data in their caches. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] ARM: move high-usage mostly read variables in setup.c to __read_mostly
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk --- arch/arm/kernel/setup.c | 16 1 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 336f14e..8075e59 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -75,9 +75,9 @@ extern void reboot_setup(char *str); unsigned int processor_id; EXPORT_SYMBOL(processor_id); -unsigned int __machine_arch_type; +unsigned int __machine_arch_type __read_mostly; EXPORT_SYMBOL(__machine_arch_type); -unsigned int cacheid; +unsigned int cacheid __read_mostly; EXPORT_SYMBOL(cacheid); unsigned int __atags_pointer __initdata; @@ -91,24 +91,24 @@ EXPORT_SYMBOL(system_serial_low); unsigned int system_serial_high; EXPORT_SYMBOL(system_serial_high); -unsigned int elf_hwcap; +unsigned int elf_hwcap __read_mostly; EXPORT_SYMBOL(elf_hwcap); #ifdef MULTI_CPU -struct processor processor; +struct processor processor __read_mostly; #endif #ifdef MULTI_TLB -struct cpu_tlb_fns cpu_tlb; +struct cpu_tlb_fns cpu_tlb __read_mostly; #endif #ifdef MULTI_USER -struct cpu_user_fns cpu_user; +struct cpu_user_fns cpu_user __read_mostly; #endif #ifdef MULTI_CACHE -struct cpu_cache_fns cpu_cache; +struct cpu_cache_fns cpu_cache __read_mostly; #endif #ifdef CONFIG_OUTER_CACHE -struct outer_cache_fns outer_cache; +struct outer_cache_fns outer_cache __read_mostly; EXPORT_SYMBOL(outer_cache); #endif -- 1.6.2.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] ARM: implement support for read-mostly sections
As our SMP implementation uses MESI protocols. Grouping together data which is mostly only read together means that we avoid unnecessary cache line bouncing when this code shares a cache line with other data. In other words, cache lines associated with read-mostly data are expected to spend most of their time in shared state. Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk --- arch/arm/include/asm/cache.h |2 ++ arch/arm/kernel/vmlinux.lds.S |1 + 2 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index 9d61220..75fe66b 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -23,4 +23,6 @@ #define ARCH_SLAB_MINALIGN 8 #endif +#define __read_mostly __attribute__((__section__(.data..read_mostly))) + #endif diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index cead889..1581f6d 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -167,6 +167,7 @@ SECTIONS NOSAVE_DATA CACHELINE_ALIGNED_DATA(32) + READ_MOSTLY_DATA(32) /* * The exception fixup table (might need resorting at runtime) -- 1.6.2.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 1/1] serial: omap-serial: Add support for kernel debugger
The kgdb invokes the poll_put_char and poll_get_char when communicating
with the host. This patch also changes the initialization order because the
kgdb will check at the very beginning, if there is a valid serial
driver.
Signed-off-by: Cosmin Cojocar cosmin.cojo...@gmail.com
---
I fixed the conflicts from Makefile when applying it to the linux-next
tree. This patch is against the linux-next tree.
drivers/serial/Makefile |2 +-
drivers/serial/omap-serial.c | 38 --
2 files changed, 33 insertions(+), 7 deletions(-)
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index f9b26df..8ea92e9 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -80,6 +80,7 @@ obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o
obj-$(CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL) += nwpserial.o
obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
+obj-$(CONFIG_SERIAL_OMAP) += omap-serial.o
obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o
obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
obj-$(CONFIG_SERIAL_TIMBERDALE)+= timbuart.o
@@ -89,6 +90,5 @@ obj-$(CONFIG_SERIAL_ALTERA_UART) += altera_uart.o
obj-$(CONFIG_SERIAL_VT8500) += vt8500_serial.o
obj-$(CONFIG_SERIAL_MRST_MAX3110) += mrst_max3110.o
obj-$(CONFIG_SERIAL_MFD_HSU) += mfd.o
-obj-$(CONFIG_SERIAL_OMAP) += omap-serial.o
obj-$(CONFIG_SERIAL_IFX6X60) += ifx6x60.o
obj-$(CONFIG_SERIAL_PCH_UART) += pch_uart.o
diff --git a/drivers/serial/omap-serial.c b/drivers/serial/omap-serial.c
index 1201eff..7f2f010 100644
--- a/drivers/serial/omap-serial.c
+++ b/drivers/serial/omap-serial.c
@@ -866,12 +866,6 @@ serial_omap_type(struct uart_port *port)
return up-name;
}
-#ifdef CONFIG_SERIAL_OMAP_CONSOLE
-
-static struct uart_omap_port *serial_omap_console_ports[4];
-
-static struct uart_driver serial_omap_reg;
-
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
static inline void wait_for_xmitr(struct uart_omap_port *up)
@@ -905,6 +899,34 @@ static inline void wait_for_xmitr(struct uart_omap_port
*up)
}
}
+#ifdef CONFIG_CONSOLE_POLL
+
+static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
+{
+ struct uart_omap_port *up = (struct uart_omap_port *)port;
+ wait_for_xmitr(up);
+ serial_out(up, UART_TX, ch);
+}
+
+static int serial_omap_poll_get_char(struct uart_port *port)
+{
+ struct uart_omap_port *up = (struct uart_omap_port *)port;
+ unsigned int status = serial_in(up, UART_LSR);
+
+ if (!(status UART_LSR_DR))
+ return NO_POLL_CHAR;
+
+ return serial_in(up, UART_RX);
+}
+
+#endif /* CONFIG_CONSOLE_POLL */
+
+#ifdef CONFIG_SERIAL_OMAP_CONSOLE
+
+static struct uart_omap_port *serial_omap_console_ports[4];
+
+static struct uart_driver serial_omap_reg;
+
static void serial_omap_console_putchar(struct uart_port *port, int ch)
{
struct uart_omap_port *up = (struct uart_omap_port *)port;
@@ -1022,6 +1044,10 @@ static struct uart_ops serial_omap_pops = {
.request_port = serial_omap_request_port,
.config_port= serial_omap_config_port,
.verify_port= serial_omap_verify_port,
+#ifdef CONFIG_CONSOLE_POLL
+ .poll_put_char = serial_omap_poll_put_char,
+ .poll_get_char = serial_omap_poll_get_char,
+#endif
};
static struct uart_driver serial_omap_reg = {
--
1.6.3.3
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[PATCH 0/2] OMAP1: amsdelta: reserve memory for videobuf_contig
Latest developements seem to allow for reserving a block of memory on boot to be used as a device dedicated dma coherent memory. This may be required for videobuf_config based video drivers avoid problems with allocating dma coherent memory after system memory gets fragmented. This set extends the OMAP1 camera resource initialization code with a function that can be used for reserving a block of memory early, then declared as the camera device dedicated dma coherent memory. An example use case is provided for Amstrad Delta camera. arch/arm/mach-omap1/board-ams-delta.c | 12 +- arch/arm/mach-omap1/devices.c | 36 ++ arch/arm/mach-omap1/include/mach/camera.h |1 3 files changed, 48 insertions(+), 1 deletion(-) Thanks, Janusz -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] OMAP1: allow reserving memory for camera
OMAP1 camera driver, when starting up in its videobuf_contig mode, may have
problems with allocating dma coherent memory after system memory gets
fragmented if there is no dedicated memory declared as a dma coherent memory
block associated with the device. To solve this issue, allow for removing a
block of memory from system memory early on boot, then, if reserved this way,
declare it as the device dedicated dma coherent memory.
An example use case on Amstrad Delta will be provided with patch 2/2.
Created and tested against linux-2.6.37-rc4.
Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl
---
arch/arm/mach-omap1/devices.c | 36 ++
arch/arm/mach-omap1/include/mach/camera.h |1
2 files changed, 37 insertions(+)
--- linux-2.6.37-rc4/arch/arm/mach-omap1/devices.c.orig 2010-12-04
18:00:39.0 +0100
+++ linux-2.6.37-rc4/arch/arm/mach-omap1/devices.c 2010-12-04
22:22:13.0 +0100
@@ -16,6 +16,7 @@
#include linux/platform_device.h
#include linux/io.h
#include linux/spi/spi.h
+#include linux/memblock.h
#include mach/hardware.h
#include asm/mach/map.h
@@ -222,13 +223,48 @@ static struct platform_device omap1_came
.resource = omap1_camera_resources,
};
+static phys_addr_t omap1_camera_phys_mempool_base;
+static phys_addr_t omap1_camera_phys_mempool_size;
+
+void __init omap1_camera_reserve(phys_addr_t size)
+{
+ phys_addr_t paddr;
+
+ if (!size)
+ return;
+
+ paddr = memblock_alloc(size, SZ_1M);
+
+ if (!paddr) {
+ pr_err(%s: failed to reserve %x bytes\n, __func__, size);
+ return;
+ }
+ memblock_free(paddr, size);
+ memblock_remove(paddr, size);
+
+ omap1_camera_phys_mempool_base = paddr;
+ omap1_camera_phys_mempool_size = size;
+}
+
void __init omap1_camera_init(void *info)
{
struct platform_device *dev = omap1_camera_device;
+ dma_addr_t paddr = omap1_camera_phys_mempool_base;
+ dma_addr_t size = omap1_camera_phys_mempool_size;
int ret;
dev-dev.platform_data = info;
+ if (paddr) {
+ if (dma_declare_coherent_memory(dev-dev, paddr, paddr, size,
+ DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE))
+ pr_info(%s: reserved %d bytes camera buffer memory\n,
+ __func__, size);
+ else
+ pr_warn(%s: cannot reserve camera buffer memory\n,
+ __func__);
+ }
+
ret = platform_device_register(dev);
if (ret)
dev_err(dev-dev, unable to register device: %d\n, ret);
--- linux-2.6.37-rc4/arch/arm/mach-omap1/include/mach/camera.h.orig
2010-12-04 18:00:39.0 +0100
+++ linux-2.6.37-rc4/arch/arm/mach-omap1/include/mach/camera.h 2010-12-04
22:26:23.0 +0100
@@ -3,6 +3,7 @@
#include media/omap1_camera.h
+void omap1_camera_reserve(phys_addr_t);
void omap1_camera_init(void *);
static inline void omap1_set_camera_info(struct omap1_cam_platform_data *info)
--
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[PATCH 2/2] OMAP1: Amstrad Delta: reserve memory for camera
Patch 1/2 from this set provides a possibility to reserve a block of memory
for use as the OMAP1 camera dedicated dma coherent memory. Use this
functionality to avoid the camera driver switching form videobuf_contig mode
to less efficient videobuf_sg mode in case of dma coherent memory allocation
failure after system memory gets fragmented.
Created and tested against linux-2.6.27-rc4 on top of patch 1/2.
Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl
---
arch/arm/mach-omap1/board-ams-delta.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
--- linux-2.6.37-rc4/arch/arm/mach-omap1/board-ams-delta.c.orig 2010-12-04
18:05:25.0 +0100
+++ linux-2.6.37-rc4/arch/arm/mach-omap1/board-ams-delta.c 2010-12-04
22:19:39.0 +0100
@@ -262,6 +262,16 @@ static struct omap1_cam_platform_data am
.lclk_khz_max = 1334, /* results in 5fps CIF, 10fps QCIF */
};
+void __init amsdelta_reserve(void)
+{
+#if defined(CONFIG_VIDEO_OMAP1) || defined(CONFIG_VIDEO_OMAP1_MODULE)
+ omap1_camera_reserve(PAGE_SIZE get_order(352 * 288 * 2 *
+ OMAP1_CAMERA_MIN_BUF_COUNT(OMAP1_CAM_DMA_CONTIG)));
+#endif
+
+ omap_reserve();
+}
+
static struct platform_device *ams_delta_devices[] __initdata = {
ams_delta_kp_device,
ams_delta_lcd_device,
@@ -366,7 +376,7 @@ MACHINE_START(AMS_DELTA, Amstrad E3 (De
/* Maintainer: Jonathan McDowell nood...@earth.li */
.boot_params= 0x1100,
.map_io = ams_delta_map_io,
- .reserve= omap_reserve,
+ .reserve= amsdelta_reserve,
.init_irq = ams_delta_init_irq,
.init_machine = ams_delta_init,
.timer = omap_timer,
--
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Re: [PATCH 1/5] ARM: GIC: provide a single initialization function for boot CPU
On 5 December 2010 11:34, Russell King - ARM Linux li...@arm.linux.org.uk wrote: Provide gic_init() which initializes the GIC distributor and current CPU's GIC interface for the boot (or single) CPU. Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk Reviewed-by: Catalin Marinas catalin.mari...@arm.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/5] ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init
On 5 December 2010 11:34, Russell King - ARM Linux li...@arm.linux.org.uk wrote: We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk Reviewed-by: Catalin Marinas catalin.mari...@arm.com (minor issue, maybe a comment for gic_secondary_init just in case anyone things about primary and secondary GICs). -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/5] ARM: GIC: consolidate gic_cpu_base_addr to common GIC code
On 5 December 2010 11:34, Russell King - ARM Linux li...@arm.linux.org.uk wrote: Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk Reviewed-by: Catalin Marinas catalin.mari...@arm.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/5] ARM: GIC: move gic_data[] initialization into gic_init()
On 5 December 2010 11:35, Russell King - ARM Linux li...@arm.linux.org.uk wrote: This avoids writing unnecessarily to gic_data[] from other CPUs, making this a mostly read-only variable. Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk Reviewed-by: Catalin Marinas catalin.mari...@arm.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 5/5] ARM: GIC: private a standard get_irqnr_preamble assembler macro
On 5 December 2010 11:35, Russell King - ARM Linux li...@arm.linux.org.uk wrote: Provide a standard get_irqnr_preamble assembler macro for platforms to use, which retrieves the base address of the GIC CPU interface from gic_cpu_base_addr. Allow platforms to override this by defining HAVE_GET_IRQNR_PREAMBLE. Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk Reviewed-by: Catalin Marinas catalin.mari...@arm.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] ARM: implement support for read-mostly sections
On 5 December 2010 11:43, Russell King - ARM Linux li...@arm.linux.org.uk wrote: As our SMP implementation uses MESI protocols. Grouping together data which is mostly only read together means that we avoid unnecessary cache line bouncing when this code shares a cache line with other data. In other words, cache lines associated with read-mostly data are expected to spend most of their time in shared state. Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk --- arch/arm/include/asm/cache.h | 2 ++ arch/arm/kernel/vmlinux.lds.S | 1 + 2 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index 9d61220..75fe66b 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -23,4 +23,6 @@ #define ARCH_SLAB_MINALIGN 8 #endif +#define __read_mostly __attribute__((__section__(.data..read_mostly))) + #endif diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index cead889..1581f6d 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -167,6 +167,7 @@ SECTIONS NOSAVE_DATA CACHELINE_ALIGNED_DATA(32) + READ_MOSTLY_DATA(32) Should we change the alignments to 64? -- Catalin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] ARM: implement support for read-mostly sections
On Sun, Dec 05, 2010 at 10:18:27PM +, Catalin Marinas wrote: On 5 December 2010 11:43, Russell King - ARM Linux li...@arm.linux.org.uk wrote: diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index cead889..1581f6d 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -167,6 +167,7 @@ SECTIONS NOSAVE_DATA CACHELINE_ALIGNED_DATA(32) + READ_MOSTLY_DATA(32) Should we change the alignments to 64? When we have some way to tell vmlinux.lds.S what the cache line size is. It should be a separate patch. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/3] OMAP: Introduce Backlight driver for Sharp LS037V7DW01 LCD panel
On Wed, Dec 1, 2010 at 11:32 PM, Tomi Valkeinen tomi.valkei...@nokia.com wrote: Hi, On Tue, 2010-11-30 at 20:07 +0800, ext Bryan Wu wrote: After instroducing generic DPI panel driver for OMAP DSS2 system, we need to split out backlight driver from Sharp LS037V7DW01 panel driver before we move to the generic DPI panel driver. This patchset introcuded backlight driver and cleanup the old Sharp LS037V7DW01 panel driver related code. It's built on mainline 2.6.37-rc4 Bryan Wu (3): Backlight: driver for Sharp LS037V7DW01 panel on OMAP machine OMAP: move Sharp LS LCD panel device to generic DPI panel driver and new backlight driver OMAP: DSS2: remove Sharp LS037V7DW01 panel driver I don't think this is quite the right direction. All the backlight driver does is call a function in the board file. It's not really a sharp ls backlight driver, but rather generic one. I'm not even sure if it needs the dssdev pointer. Since dssdev struct contains backlight releated fields, I passed that into the driver. It can be replaced by a backlight related platform data struct. Then we can remove those backlight related fields from dssdev struct. This kind of backlight is, in a sense, totally separate component from the panel itself. All they have in common is that they are packaged in the same physical display module, and they usually share the same connector. I have seen three kinds of backlights on OMAP devices: - on/off GPIO (like on 3430 SDP) It seems like that we need a gpio_bl.c driver for this kind of usage. - PWM based (zoom seems to have this) I failed to find any PWM or Backlight code in ZOOM boards source file. Is that possible to us pwm_bl.c driver which is used by pxa? - Panel controlled (Taal-panel. Also PWM based, but OMAP doesn't see that) Yeah, I don't plan to reform this driver at this time. The first two could (should?) be totally separate backlights from the panel itself. For those, a generic backlight driver could perhaps work. The third one needs to be quite tied to the panel driver, and I'm not sure how easy it would be to have a separate driver for that. OK, I totally understand you concern now. How about a GPIO based backlight driver for the first 2 cases. Thanks, -- Bryan Wu bryan...@canonical.com Kernel Developer +86.138-1617-6545 Mobile Ubuntu Kernel Team Canonical Ltd. www.canonical.com Ubuntu - Linux for human beings | www.ubuntu.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 1/8] ARM: SCU: Add common routines for secondary CPUbootup
-Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Russell King - ARM Linux Sent: Saturday, December 04, 2010 2:18 PM To: Tony Lindgren; Kukjin Kim; Srinidhi Kasagar; Jamie Iles; Anton Vorontsov; linux-ker...@vger.kernel.org; linux-samsung- s...@vger.kernel.org; Colin Cross; linux-te...@vger.kernel.org; Uwe Kleine- König; linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org Subject: Re: [PATCH 1/8] ARM: SCU: Add common routines for secondary CPUbootup On Thu, Dec 02, 2010 at 06:01:50PM +, Russell King - ARM Linux wrote: On Thu, Dec 02, 2010 at 05:38:24PM +, Russell King - ARM Linux wrote: What if a platform, for what ever reason, wants to have 3 CPUs, numbered 0, 2, 3 ? That's the reason why the code which sets the possible and present maps isn't in the ARM core code - Eg, we don't know if a platform wants to keep CPU 1 in AMP mode to run some special software on it. I don't think it's worth it because I think trying to considate this is going to cripple the code structure in the future. I don't think this is particularly worth it either: As Catalin has pointed out: http://lists.arm.linux.org.uk/lurker/message/20101202.162840.5465758c.en.h tml The SCU is part of the core, and if you consult the TRMs for the MPCore devices, it is actually different in ARM11 MPCore vs Cortex-A9 MPCore. Cortex-A15 doesn't have a MMIO addressable SCU at all. So, this is about as far as I want to go with stripping out the common code from the various platforms (this includes my previous SMP series): http://lists.arm.linux.org.uk/lurker/message/20101203.200746.31424430.en.h tml This results in a net reduction of 242 LOC, as shown in the following diffstat: arch/arm/include/asm/hardirq.h| 18 ++ arch/arm/include/asm/mach/irq.h |2 +- arch/arm/include/asm/smp.h| 17 +- arch/arm/include/asm/smp_mpidr.h | 17 -- arch/arm/kernel/entry-armv.S |2 +- arch/arm/kernel/fiq.c |5 +- arch/arm/kernel/head.S| 39 +++-- arch/arm/kernel/irq.c | 23 ++- arch/arm/kernel/smp.c | 243 - arch/arm/mach-msm/include/mach/smp.h |4 +- arch/arm/mach-omap2/omap-hotplug.c| 14 +-- arch/arm/mach-omap2/omap-smp.c| 66 ++-- arch/arm/mach-realview/hotplug.c | 18 +-- arch/arm/mach-realview/include/mach/smp.h |5 +- arch/arm/mach-realview/platsmp.c | 95 +++- arch/arm/mach-s5pv310/hotplug.c | 18 +-- arch/arm/mach-s5pv310/include/mach/smp.h |5 +- arch/arm/mach-s5pv310/platsmp.c | 46 +- arch/arm/mach-tegra/hotplug.c | 18 +-- arch/arm/mach-tegra/include/mach/smp.h| 12 +-- arch/arm/mach-tegra/platsmp.c | 33 +--- arch/arm/mach-ux500/hotplug.c | 18 +-- arch/arm/mach-ux500/include/mach/smp.h|5 +- arch/arm/mach-ux500/platsmp.c | 57 ++- arch/arm/mach-vexpress/include/mach/smp.h |5 +- arch/arm/mach-vexpress/platsmp.c | 54 ++- arch/arm/plat-omap/include/plat/smp.h |5 +- 27 files changed, 301 insertions(+), 543 deletions(-) Can someone also explain why OMAP uses different file naming from everyone else? It's annoying as (eg) arch/arm/*/platsmp.c for editing the platform SMP support files gets everyone except OMAP. Nothing specific Russell?. Its just to keep in sync with the way other files are named under omap directories. We could rename this if it helps. Regards, Ssantosh -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v2 01/17] OMAP2420: hwmod data: add DSS DISPC RFBI VENC
Tony, -Original Message- From: Guruswamy, Senthilvadivu Sent: Monday, November 29, 2010 5:21 PM To: khil...@deeprootsystems.com; tomi.valkei...@nokia.com; p...@pwsan.com; Hiremath, Vaibhav; linux-omap@vger.kernel.org Cc: Guruswamy, Senthilvadivu Subject: [PATCH v2 01/17] OMAP2420: hwmod data: add DSS DISPC RFBI VENC From: Senthilvadivu Guruswamy svad...@ti.com Database generated for OMAP2420 Display Sub System. Since dss is also considered as an IP as dispc,rfbi, name it as dss_dss. Signed-off-by: Senthilvadivu Guruswamy svad...@ti.com Acked-by: Benoit Cousson b-cous...@ti.com --- The first 4 patches are reviewed by Acked by Benoit. These patches are also tested on 2420-N800, 2430SDP, 3430SDP as mentioned in cover letter. Could you please let me know what is needed further to push this changes to l-o. Regards, Senthil arch/arm/mach-omap2/omap_hwmod_2420_data.c | 283 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
