Re: [PATCH 00/18][V3] ARM: OMAP3/4 : cpuidle34xx and cpuidle44xx cleanups
On 05/01/2012 12:58 AM, Kevin Hilman wrote: Daniel Lezcanodaniel.lezc...@linaro.org writes: On 04/24/2012 04:05 PM, Daniel Lezcano wrote: This patchset makes some cleanup on these cpuidle drivers and consolidate the code across both architecture. Tested on OMAP3 (igepV2). Partially tested on OMAP4 (pandaboard), without offlining the cpu1. Without offlining CPU1, none of this code is executed. Can you test with CPU1 offlined? Unfortunately my OMAP4 board burned :/ I am waiting for a new one. Rob tested the series but when he unplugged the cpu1, the kernel panics for another reason. I guess the problem should have been fixed since the last testing. Rob ? Do you mind the test the series again, the problem you were facing when unplugging the cpu1 may have been fixed. Mike ? if you have time, is it possible you test it on your board ? Hi, could be this patchset considered for inclusion ? Yes. This is a good series, and a great cleanup. Unfortunately, there is lots of OMAP PM code to review at the moment so there's a bit of a lag in my ability to review and test. Ok, sure. I understand, no pressure :) Thanks a lot. -- Daniel -- http://www.linaro.org/ Linaro.org │ Open source software for ARM SoCs Follow Linaro: http://www.facebook.com/pages/Linaro Facebook | http://twitter.com/#!/linaroorg Twitter | http://www.linaro.org/linaro-blog/ Blog -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 0/6] PM QoS: implement the OMAP low level constraints management code
Hi Kevin, On Tue, May 1, 2012 at 1:15 AM, Kevin Hilman khil...@ti.com wrote: Hi Jean, jean.pi...@newoldbits.com writes: From: Jean Pihet j-pi...@ti.com . Implement the devices wake-up latency constraints using the global device PM QoS notification handler which applies the constraints to the underlying layer, . Implement the low level code which controls the power domains next functional power states [3], through the hwmod and pwrdm layers, . Add cpuidle and power domains wake-up latency figures for OMAP3, cf. comments in the code and [1] for the details on where the numbers are magically coming from, . Implement the relation between the cpuidle and per-device PM QoS frameworks in the OMAP3 specific idle callbacks. The chosen C-state shall satisfy the following conditions: . the 'valid' field is enabled, . it satisfies the enable_off_mode flag, . the next state for MPU and CORE power domains is not lower than the state programmed by the per-device PM QoS. I've just been through this series and it looks good to me. Reviewed-by: Kevin Hilman khil...@ti.com Thx for reviewing! ToDo: 1. support OMAP4 chipset when the low power modes will be supported Have you been able to do this with Tero's latest CORE RET and device off series? No I still have to port Tero's latest patch set on top of the functional power states and the constraints code. This is on my ToDoNext list ;p Kevin Thanks, Jean -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] arm: omap: Use only valid power domain states
Hi Mark,
On Mon, Apr 30, 2012 at 11:25 PM, Mark A. Greer mgr...@animalcreek.com wrote:
From: Mark A. Greer mgr...@animalcreek.com
Some parts of the OMAP code assume that all power
domains support certain states (e.g., RET OFF).
This isn't always true (e.g., the am35x family of
SoC's) so those assumptions need to be removed.
Remove those assumptions by looking up the deepest
state that a power domain can be in whereever its
being blindly set. The 'max()' of the deepest
state and what the code formerly wanted to set it
to, is the correct state. If the code formerly
wanted to set it to PWRDM_POWER_OFF, then the
deepest possible state will be used (i.e., no
need to perform the 'max()').
The code still assumes that ON is a valid state.
Signed-off-by: Mark A. Greer mgr...@animalcreek.com
---
These patches apply on top of Kevin's patch series,
[PATCH/RFT 0/8] ARM: OMAP: remove IP checks from SoC family detection
Tested on an am3517 evm and am37x evm.
arch/arm/mach-omap2/cpuidle34xx.c | 19 +--
arch/arm/mach-omap2/pm34xx.c | 15 +--
arch/arm/mach-omap2/powerdomain.c | 25 +
arch/arm/mach-omap2/powerdomain.h | 2 ++
4 files changed, 49 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 5358664..2c91711 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -175,19 +175,25 @@ static int next_valid_state(struct cpuidle_device *dev,
struct cpuidle_state_usage *curr_usage = dev-states_usage[index];
struct cpuidle_state *curr = drv-states[index];
struct omap3_idle_statedata *cx = cpuidle_get_statedata(curr_usage);
- u32 mpu_deepest_state = PWRDM_POWER_RET;
- u32 core_deepest_state = PWRDM_POWER_RET;
+ u32 mpu_deepest_state, mpu_deepest_possible;
+ u32 core_deepest_state, core_deepest_possible;
int next_index = -1;
+ mpu_deepest_possible = pwrdm_get_deepest_state(mpu_pd);
+ mpu_deepest_state = max_t(u32, mpu_deepest_possible, PWRDM_POWER_RET);
I do not think you need to change the pwrdm API and the cpuidle code for that.
Instead you should use the pwrst* fields in the power domains data
files, which allow to specify the allowed states.
After reading the rest of your patches it seems you are addressing the
issue in a subsequent patch 'arm: omap3: am35x: Set proper powerdomain
states'.
+
+ core_deepest_possible = pwrdm_get_deepest_state(core_pd);
+ core_deepest_state = max_t(u32, core_deepest_possible,
PWRDM_POWER_RET);
+
if (enable_off_mode) {
- mpu_deepest_state = PWRDM_POWER_OFF;
+ mpu_deepest_state = mpu_deepest_possible;
/*
* Erratum i583: valable for ES rev Es1.2 on 3630.
* CORE OFF mode is not supported in a stable form, restrict
* instead the CORE state to RET.
*/
if (!IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583))
- core_deepest_state = PWRDM_POWER_OFF;
+ core_deepest_state = core_deepest_possible;
}
/* Check if current state is valid */
@@ -422,8 +428,9 @@ int __init omap3_idle_init(void)
pr_warn(%s: core off state C7 disabled due to i583\n,
__func__);
}
- cx-mpu_state = PWRDM_POWER_OFF;
- cx-core_state = PWRDM_POWER_OFF;
+
+ cx-mpu_state = pwrdm_get_deepest_state(mpu_pd);
+ cx-core_state = pwrdm_get_deepest_state(core_pd);
drv-state_count = OMAP3_NUM_STATES;
cpuidle_register_driver(omap3_idle_driver);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ec92676..40d8d07 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -614,12 +614,11 @@ void omap3_pm_off_mode_enable(int enable)
struct power_state *pwrst;
u32 state;
- if (enable)
- state = PWRDM_POWER_OFF;
- else
- state = PWRDM_POWER_RET;
-
list_for_each_entry(pwrst, pwrst_list, node) {
+ state = pwrdm_get_deepest_state(pwrst-pwrdm);
+ if (!enable)
+ state = max_t(u32, state, PWRDM_POWER_RET);
+
if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)
pwrst-pwrdm == core_pwrdm
state == PWRDM_POWER_OFF) {
@@ -660,6 +659,7 @@ int omap3_pm_set_suspend_state(struct powerdomain *pwrdm,
int state)
static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
{
struct power_state *pwrst;
+ u32 state;
if (!pwrdm-pwrsts)
return 0;
@@ -668,7 +668,10 @@ static int __init pwrdms_setup(struct powerdomain
*pwrdm, void *unused)
if (!pwrst)
Re: [PATCH 00/18][V3] ARM: OMAP3/4 : cpuidle34xx and cpuidle44xx cleanups
On Tue, May 1, 2012 at 11:16 AM, Daniel Lezcano daniel.lezc...@linaro.org wrote: On 05/01/2012 12:58 AM, Kevin Hilman wrote: Daniel Lezcanodaniel.lezc...@linaro.org writes: On 04/24/2012 04:05 PM, Daniel Lezcano wrote: This patchset makes some cleanup on these cpuidle drivers and consolidate the code across both architecture. Tested on OMAP3 (igepV2). Partially tested on OMAP4 (pandaboard), without offlining the cpu1. Without offlining CPU1, none of this code is executed. Can you test with CPU1 offlined? Unfortunately my OMAP4 board burned :/ I am waiting for a new one. Rob tested the series but when he unplugged the cpu1, the kernel panics for another reason. I guess the problem should have been fixed since the last testing. Rob ? Do you mind the test the series again, the problem you were facing when unplugging the cpu1 may have been fixed. I'd rather have someone from the OMAP community that understands the internals test this - adding Santosh to see if he can bring some engineering time to bear on this series. Mike ? if you have time, is it possible you test it on your board ? And Mike and Rajendra, if you could help with this, it would be great. We'd really like to get various platform cpuidle driver changes in for 3.5 so that Daniel can take a stab at more consolidation for the core in the next cycle. /Amit -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] Fix build breakage in omap-usb-host.c
Hi Russ, On Sun, Apr 22, 2012 at 01:48:18AM -0700, Russ Dill wrote: 'ARM: OMAP3: USB: Fix the EHCI ULPI PHY reset issue' removes the include for linux/gpio.h from omap-usb-host.c. This include indirectly includes plat/cpu.h which is required by omap-usb-host.c. Fix the build breakage by including it directly. Signed-off-by: Russ Dill russ.d...@ti.com Patch applied, thanks. I'm planning to send an MFD pull request including this fix to Linus, in time for rc6. Cheers, Samuel. -- Intel Open Source Technology Centre http://oss.intel.com/ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/18][V3] ARM: OMAP3/4 : cpuidle34xx and cpuidle44xx cleanups
On 05/01/2012 11:55 AM, Shilimkar, Santosh wrote: On May 1, 2012 1:46 PM, Daniel Lezcanodaniel.lezc...@linaro.org wrote: On 05/01/2012 12:58 AM, Kevin Hilman wrote: Daniel Lezcanodaniel.lezc...@linaro.org writes: On 04/24/2012 04:05 PM, Daniel Lezcano wrote: This patchset makes some cleanup on these cpuidle drivers and consolidate the code across both architecture. Tested on OMAP3 (igepV2). Partially tested on OMAP4 (pandaboard), without offlining the cpu1. Without offlining CPU1, none of this code is executed. Can you test with CPU1 offlined? Unfortunately my OMAP4 board burned :/ I am waiting for a new one. Rob tested the series but when he unplugged the cpu1, the kernel panics for another reason. I guess the problem should have been fixed since the last testing. Rob ? Do you mind the test the series again, the problem you were facing when unplugging the cpu1 may have been fixed. Have already tested this series on omap4 with cpu offline as well as with couple idle series on top of it. I haven't finished omap3 testing and hence not reported yet. Omap4 continies to work with subject series. Great ! I tested it on omap3 igepv2 board and it works fine too. Thanks for testing -- Daniel. -- http://www.linaro.org/ Linaro.org │ Open source software for ARM SoCs Follow Linaro:http://www.facebook.com/pages/Linaro Facebook | http://twitter.com/#!/linaroorg Twitter | http://www.linaro.org/linaro-blog/ Blog -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] arm: omap: add minimal support for Nokia RM-696
Hi! Add minimal support for Nokia RM-696 board. Signed-off-by: Aaro Koskinen aaro.koski...@nokia.com --- The patch is based boot-tested with 3.3-rc6. arch/arm/mach-omap2/Kconfig |3 ++- arch/arm/mach-omap2/board-rm680.c| 14 +- arch/arm/plat-omap/include/plat/uncompress.h |1 + 3 files changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index e20c8ab..b740c2e 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -245,10 +245,11 @@ config MACH_NOKIA_N8X0 select MACH_NOKIA_N810_WIMAX config MACH_NOKIA_RM680 - bool Nokia RM-680 board + bool Nokia RM-680/696 board depends on ARCH_OMAP3 default y select OMAP_PACKAGE_CBB + select MACH_NOKIA_RM696 AFAICT, this is nokia N9. At least help text should state that... config MACH_NOKIA_RX51 bool Nokia RX-51 board diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index 8678b38..094473e 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c @@ -1,5 +1,5 @@ /* - * Board support file for Nokia RM-680. + * Board support file for Nokia RM-680/696. * And a comment. -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Audio support on OMAP 3430LDP or 4430SDP boards
On Mon, Apr 30, 2012 at 10:26:45AM +0300, Peter Ujfalusi wrote: On 04/29/2012 11:35 PM, Russell King - ARM Linux wrote: Please can someone at TI take a current mainline kernel, build it, and test out audio support on the 4430SDP - specifically output through the headset jack into a line input, and report when it works. Thanks. Try to use my attached aconf for SDP4430 to configure the HS playback. Note that the HS is not a line out, so on your line-in device it will cause distortion. If you have a headset/headphone you will have better quality. alsactl -f blaze.aconf restore This had no effect on its own. To play samples with aplay: aplay -Dplughw:0,0 wav file The sample format fot Legacy McPDM is S32_LE, 96KHz, 24bit (32 bit sample with 24 LSB). The slow pace audio playback is because at this point we do not have the full audio stack up. The AESS IP does not have driver. You need to disable CONFIG_OMAP_RESET_CLOCKS. This will fic the audio playback speed. But with that configuration file and that option disabled, I now get audio output via the HS jack. Bellowhead sounds a lot better now. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/39] OMAP GPMC driver conversion
Hi, GPMC driver conversion patch series. Some peripherals has GPMC helper functions, these has been modified to cater to the needs of GPMC driver. All the boards using GPMC has been adapted to use the new GPMC driver. GPMC HWMOD entry for OMAP2/3 has been added. On OMAP3, kernel does spit omap_hwmod: gpmc: cannot be enabled for reset (3), but peripherals connected via GPMC are working. Really shaky about OMAP2 GPMC HWMOD entry. Would be helpful if someone can help me in resolving warning on OMAP3 verify whether OMAP2 entry is proper. The series adapts to HWMOD. Drivers, NAND OneNAND of OMAP has been modified to make use of GPMC changes cleaned up the now unnecessary exported symbol usages. This series has been made on top of, 5e136da Linux-omap rebuilt: Updated to -rc5, A patch by Javier Martinez Canillas jav...@dowhile0.org, OMAP3: igep0020: Add support for Micron NAND Flash storage memory, has also been incorporated into the series as this was necessary for igep0020 board. This has been tested on omap3 evm (SMSC911x) beagle board (NAND) I would need help to get these changes tested on other boards using GPMC. Expected problematic boards are those having OMAP2xxx SoCs, apollon board. In the case of apollon, in addition to it being OMAP2xxx, it was modified to use gpmc_smc91x_init instead of directly writing to configuration registers. Additional features that currently boards in mainline does not make use of like, waitpin interrupt handling, changes to leverage revision 6 IP differences has not been incorporated. GPMC driver now provides NAND driver with GPMC-NAND registers so that OMAP NAND driver can handle those by itself instead of using exported symbols. Acquiring CS for NAND has also been incorporated, it has been made as a separate patch as it is felt that this should probably go away, explained in the relevant patch. GPMC (General Purpose Memory Controller) in brief: GPMC is an unified memory controller dedicated to interfacing external memory devices like Asynchronous SRAM like memories and application specific integrated circuit devices. Asynchronous, synchronous, and page mode burst NOR flash devices NAND flash Pseudo-SRAM devices GPMC details can be referred in AM335X Technical Reference Manual @ http://www.ti.com/lit/pdf/spruh73 v4: Handle wait pin (except for interrupts), enhance configuration timing interface of GPMC to take care of all boards. Dynamic allocation of interrupt instead of static. Convert remaining peripherals to work with GPMC driver. Handle acquiring NAND CS#, adapt to HWMOD, update HWMOD OMAP2/3 entries, other minor commenst on v3. v3: Single device structure passed from platform for peripherals using multiple CS instead of using multiple device structure having a few redundant data, handle interrupts, GPMC NAND handling by GPMC NAND driver instead of GPMC driver v2: Avoid code movement that kept similar code together (for easy review) TODO: Cleanup Regards Afzal Afzal Mohammed (38): ARM: OMAP2+: gpmc: driver conversion ARM: OMAP2+: gpmc: Adapt to HWMOD ARM: OMAP2+: gpmc: register details for nand driver ARM: OMAP2+: gpmc: Acquire NAND CS value ARM: OMAP2+: nand: create platform data structure ARM: OMAP2+: onenand: return value in init function ARM: OMAP2+: gpmc-nand: Adapt to use gpmc driver ARM: OMAP2+: gpmc-onenand: Adapt to use gpmc driver ARM: OMAP2+: flash: Adapt to gpmc driver ARM: OMAP2+: gpmc-smsc911x: Adapt to use gpmc driver ARM: OMAP2+: gpmc-smc91x: Adapt to use gpmc driver ARM: OMAP2+: gpmc-tusb6010: Adapt to gpmc driver ARM: OMAP3: hwmod data: add gpmc ARM: OMAP2xxx: hwmod data: add gpmc mtd: nand: omap2: obtain memory from resource mtd: nand: omap2: use gpmc provided irqs mtd: nand: omap2: handle nand on gpmc mtd: onenand: omap: obtain memory from resource ARM: OMAP2+: board omap3evm: gpmc driver adaptation ARM: OMAP2+: board omap3beagle: gpmc driver adaptation ARM: OMAP2+: board apollon: gpmc driver adaptation ARM: OMAP2+: board h4: gpmc driver adaptation ARM: OMAP2+: board 3630sdp: gpmc driver adaptation ARM: OMAP2+: board 3430sdp: gpmc driver adaptation ARM: OMAP2+: board 2430sdp: gpmc driver adaptation ARM: OMAP2+: board cm-t3517: gpmc driver adaptation ARM: OMAP2+: board cm-t35: gpmc driver adaptation ARM: OMAP2+: board ldp: gpmc driver adaptation ARM: OMAP2+: board n8x0: gpmc driver adaptation ARM: OMAP2+: board omap3logic: gpmc driver adaptation ARM: OMAP2+: board omap3pandora: gpmc driver adaptation ARM: OMAP2+: board omap3stalker: gpmc driver adaptation ARM: OMAP2+: board omap4pcm049: gpmc driver adaptation ARM: OMAP2+: board overo: gpmc driver adaptation ARM: OMAP2+: board rm680: gpmc driver adaptation ARM: OMAP2+: board rx51: gpmc driver adaptation ARM: OMAP2+: board zoom-debugboard: gpmc driver adaptation ARM: OMAP2+: board igep0020: gpmc driver adaptation Javier Martinez Canillas (1): OMAP3: igep0020: Add support
[PATCH 02/39] ARM: OMAP2+: gpmc: Adapt to HWMOD
Create API for platforms to adapt gpmc to HWMOD
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 52 +++-
arch/arm/plat-omap/include/plat/gpmc.h |1 +
2 files changed, 38 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 12916f3..c8d07bb 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -33,6 +33,8 @@
#include plat/sdrc.h
+#include plat/omap_device.h
+
/* GPMC register offsets */
#define GPMC_REVISION 0x00
#define GPMC_SYSCONFIG 0x10
@@ -276,6 +278,31 @@ unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns)
return ticks * gpmc_get_fclk_period() / 1000;
}
+int __init omap_init_gpmc(struct gpmc_pdata *pdata)
+{
+ struct omap_hwmod *oh;
+ struct platform_device *pdev;
+ char *name = omap-gpmc;
+ char *oh_name = gpmc;
+
+ pdata-clk_prd = gpmc_get_fclk_period();
+
+ oh = omap_hwmod_lookup(oh_name);
+ if (!oh) {
+ pr_err(Could not look up %s\n, oh_name);
+ return -ENODEV;
+ }
+
+ pdev = omap_device_build(name, -1, oh, pdata,
+ sizeof(*pdata), NULL, 0, 0);
+ if (IS_ERR(pdev)) {
+ WARN(1, Can't build omap_device for %s:%s.\n,
+ name, oh-name);
+ return PTR_ERR(pdev);
+ }
+
+ return 0;
+}
#ifdef DEBUG
static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
int time, const char *name)
@@ -843,24 +870,19 @@ static __devinit void gpmc_mem_init(void)
static int __init gpmc_init(void)
{
- int ret = -EINVAL;
- char *ck = NULL;
-
- if (cpu_is_omap24xx()) {
- ck = core_l3_ck;
- } else if (cpu_is_omap34xx()) {
- ck = gpmc_fck;
- } else if (cpu_is_omap44xx()) {
- ck = gpmc_ck;
- }
+ char *oh_name = gpmc;
+ struct omap_hwmod *oh;
- if (WARN_ON(!ck))
- return ret;
+ oh = omap_hwmod_lookup(oh_name);
+ if (!oh) {
+ pr_err(Could not look up %s\n, oh_name);
+ return -ENODEV;
+ }
- gpmc_l3_clk = clk_get(NULL, ck);
+ gpmc_l3_clk = clk_get(NULL, oh-main_clk);
if (IS_ERR(gpmc_l3_clk)) {
- printk(KERN_ERR Could not get GPMC clock %s\n, ck);
- BUG();
+ pr_err(error: clk_get on %s\n, oh-main_clk);
+ return -EINVAL;
}
clk_enable(gpmc_l3_clk);
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h
b/arch/arm/plat-omap/include/plat/gpmc.h
index 2eedd99..c5cf020 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -217,6 +217,7 @@ struct gpmc_pdata {
};
extern int gpmc_cs_reconfigure(char *name, int id, struct gpmc_cs_data *cs);
+extern int omap_init_gpmc(struct gpmc_pdata *pdata);
extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns);
extern unsigned int gpmc_ps_to_ticks(unsigned int time_ps);
--
1.7.10
--
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[PATCH 01/39] ARM: OMAP2+: gpmc: driver conversion
Convert GPMC code to driver. Boards using GPMC should provide driver with type of configuration, timing, CS. Platform devices would then be created for each connected peripheral (details also to be passed by board so that it reaches respective driver). And GPMC driver would populate memory resource details for the connected peripheral driver. Boards should inform gpmc driver with platform data destined for peripheral driver. gpmc driver will provide the same information to peripheral driver. A peripheral connected to GPMC can have multiple address spaces using different chip select. Hence GPMC driver has been provided capability to create platform device for peripheral using mutiple CS. The peripheral that made it necessary was tusb6010. Interrupts of GPMC are presented to drivers of connected peripherals as resource. A fictitious interrupt controller chip handles these interrupts at GPMC hardware level. Clients can use normal interrupt APIs. Platform information of peripheral passed to GPMC driver should indicate interrupts to be used via flags. Driver is capable of configuring waitpin, waitpin details has to be provided per CS. Wait pin has been considered as exclusive resource as multiple peripherals should not using the same pin, at the same it is valid for mutiple CS to use same waitpin provided they are a part of single peripheral (eg. tusb6010) An exported symbol for reconfiguring GPMC settings has been provided. OneNAND is the one that neccessitated this. Acquiring CS# for NAND is done on a few boards. It means, depending on bootloader to embed this information. Probably CS# being used can be set in the Kernel, and acquiring it can be removed. If ever this capbility is needed, GPMC driver has to be made aware of handling it. Modifications has been made keeping in mind that the driver would have to move to driver folder. This explains requirement of clk_prd field; even though clk_prd variable is not necessary as gpmc_get_fclk_period is present in the same file as of now, this will help in moving the driver easily to drivers folder. Code related to GPMC clock may have to continue live in platform folders as input clock is beyond the control of GPMC and calculating timing for the peripheral may need other helpers. This explains presence of 'gpmc_cs_calc_divider' along with 'gpmc_calc_divider', both doing same work, latter meant to go with driver, former for calculation in platform code. Thanks to Vaibhav Hiremath Jonathan Hunter on their various good suggestions which resulted in improving the code. Cc: Vaibhav Hiremath hvaib...@ti.com Cc: Jon Hunter jon-hun...@ti.com Signed-off-by: Afzal Mohammed af...@ti.com --- arch/arm/mach-omap2/gpmc.c | 877 arch/arm/plat-omap/include/plat/gpmc.h | 93 +++- 2 files changed, 872 insertions(+), 98 deletions(-) diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 580e684..12916f3 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -14,8 +14,11 @@ */ #undef DEBUG +#include linux/platform_device.h + #include linux/irq.h #include linux/kernel.h +#include linux/slab.h #include linux/init.h #include linux/err.h #include linux/clk.h @@ -53,6 +56,45 @@ #define GPMC_CS0_OFFSET0x60 #define GPMC_CS_SIZE 0x30 +/* GPMC register bits */ +#defineGPMC_CONFIG1_TIMEPARAGRANULARITYBIT(4) +#defineGPMC_CONFIG1_DEVICETYPE_NAND GPMC_CONFIG1_DEVICETYPE(0x2) +#defineGPMC_CONFIG1_WAIT_PIN_SEL_MASK GPMC_CONFIG1_WAIT_PIN_SEL(0x3) +#defineGPMC_CONFIG1_WAIT_MON_TIME(val) ((val 0x3) 18) +#defineGPMC_CONFIG1_WRITEMULTIPLE BIT(28) +#defineGPMC_CONFIG1_READMULTIPLE BIT(30) +#defineGPMC_CONFIG1_WRAPBURST BIT(31) +#defineGPMC_CONFIG_WAITPIN_POLARITY_SHIFT 0x8 +#defineGPMC_CONFIG1_WAITPIN_MONITOR_TIME(val) ((val 0x3) 18) +#defineGPMC_CONFIG1_WAITPIN_MONITOR_TIME_1 \ + GPMC_CONFIG1_WAITPIN_MONITOR_TIME(0x1) +#defineGPMC_CONFIG1_WAITPIN_MONITOR_TIME_2 \ + GPMC_CONFIG1_WAITPIN_MONITOR_TIME(0x2) +#defineGPMC_CONFIG1_CLOCKACTIVATION_TIME(val) ((val 0x3) 25) +#defineGPMC_CONFIG1_CLOCKACTIVATION_TIME_1 \ + GPMC_CONFIG1_CLOCKACTIVATION_TIME(0x1) +#defineGPMC_CONFIG1_CLOCKACTIVATION_TIME_2 \ + GPMC_CONFIG1_CLOCKACTIVATION_TIME(0x2) + +#defineGPMC_CONFIG2_CSEXTRADELAY BIT(7) + +#defineGPMC_CONFIG3_ADVEXTRADELAY BIT(7) + +#defineGPMC_CONFIG4_OEEXTRADELAY BIT(7) +#defineGPMC_CONFIG4_WEEXTRADELAY BIT(23) + +#defineGPMC_CONFIG6_CYCLE2CYCLEDIFFCSENBIT(6) +#defineGPMC_CONFIG6_CYCLE2CYCLESAMECSENBIT(7) + +#define
[PATCH 03/39] ARM: OMAP2+: gpmc: register details for nand driver
If peripheral connected is NAND, update NAND drivers platform data
with NAND related register addresses so that NAND driver can handle
GPMC NAND operations by itself
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 25 +
arch/arm/plat-omap/include/plat/gpmc.h | 16
arch/arm/plat-omap/include/plat/nand.h |1 +
3 files changed, 42 insertions(+)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index c8d07bb..657ce95 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -30,6 +30,7 @@
#include asm/mach-types.h
#include plat/gpmc.h
+#include plat/nand.h
#include plat/sdrc.h
@@ -891,6 +892,28 @@ static int __init gpmc_init(void)
}
postcore_initcall(gpmc_init);
+static __devinit void gpmc_update_nand_reg(struct gpmc *gpmc,
+ struct omap_nand_platform_data *nand)
+{
+ int cs = nand-cs;
+
+ nand-reg.gpmc_status = gpmc-io_base + GPMC_STATUS;
+ nand-reg.gpmc_nand_command = gpmc-io_base + GPMC_CS0_OFFSET +
+ GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs;
+ nand-reg.gpmc_nand_address = gpmc-io_base + GPMC_CS0_OFFSET +
+ GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs;
+ nand-reg.gpmc_nand_data = gpmc-io_base + GPMC_CS0_OFFSET +
+ GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs;
+ nand-reg.gpmc_prefetch_config1 = gpmc-io_base + GPMC_PREFETCH_CONFIG1;
+ nand-reg.gpmc_prefetch_config2 = gpmc-io_base + GPMC_PREFETCH_CONFIG2;
+ nand-reg.gpmc_prefetch_control = gpmc-io_base + GPMC_PREFETCH_CONTROL;
+ nand-reg.gpmc_prefetch_status = gpmc-io_base + GPMC_PREFETCH_STATUS;
+ nand-reg.gpmc_ecc_config = gpmc-io_base + GPMC_ECC_CONFIG;
+ nand-reg.gpmc_ecc_control = gpmc-io_base + GPMC_ECC_CONTROL;
+ nand-reg.gpmc_ecc_size_config = gpmc-io_base + GPMC_ECC_SIZE_CONFIG;
+ nand-reg.gpmc_ecc1_result = gpmc-io_base + GPMC_ECC1_RESULT;
+}
+
static inline int gpmc_waitpin_is_reserved(struct gpmc *gpmc, unsigned waitpin)
{
return gpmc-waitpin_map (0x1 waitpin);
@@ -1427,6 +1450,8 @@ static __devinit int gpmc_probe(struct platform_device
*pdev)
for (i = 0, gdq = gp-device_pdata, gd = gpmc-device;
(i gp-num_device) (*gdq); i++, gdq++) {
+ if ((*gdq)-is_nand)
+ gpmc_update_nand_reg(gpmc, (*gdq)-pdata);
ret = gpmc_setup_device(gpmc, gd, *gdq);
if (IS_ERR_VALUE(ret))
dev_err(gpmc-dev, gpmc setup on %s failed\n,
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h
b/arch/arm/plat-omap/include/plat/gpmc.h
index c5cf020..976a8f0 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -207,6 +207,7 @@ struct gpmc_device_pdata {
unsignedper_res_cnt;
struct gpmc_cs_data *cs_data;
unsignednum_cs;
+ boolis_nand;
};
struct gpmc_pdata {
@@ -216,6 +217,21 @@ struct gpmc_pdata {
struct gpmc_device_pdata**device_pdata;
};
+struct gpmc_nand_regs {
+ void __iomem*gpmc_status;
+ void __iomem*gpmc_nand_command;
+ void __iomem*gpmc_nand_address;
+ void __iomem*gpmc_nand_data;
+ void __iomem*gpmc_prefetch_config1;
+ void __iomem*gpmc_prefetch_config2;
+ void __iomem*gpmc_prefetch_control;
+ void __iomem*gpmc_prefetch_status;
+ void __iomem*gpmc_ecc_config;
+ void __iomem*gpmc_ecc_control;
+ void __iomem*gpmc_ecc_size_config;
+ void __iomem*gpmc_ecc1_result;
+};
+
extern int gpmc_cs_reconfigure(char *name, int id, struct gpmc_cs_data *cs);
extern int omap_init_gpmc(struct gpmc_pdata *pdata);
diff --git a/arch/arm/plat-omap/include/plat/nand.h
b/arch/arm/plat-omap/include/plat/nand.h
index 67fc506..86e4d9c 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -29,6 +29,7 @@ struct omap_nand_platform_data {
unsigned long phys_base;
int devsize;
enum omap_ecc ecc_opt;
+ struct gpmc_nand_regs reg;
};
/* minimum size for IO mapping */
--
1.7.10
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[PATCH 04/39] ARM: OMAP2+: gpmc: Acquire NAND CS value
Some boards depend on bootloader to update chip select value for NAND.
It is felt that Kernel should not depend on bootloader to get CS, as
for a particular board CS is hardwired and is fixed, hence this can
directly be updated in Kernel. But as CS value for boards that depend
on this behaviour is not available, educate gpmc driver to acquire
chip select value for NAND. this ideally should be removed once CS
for those boards are available.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 657ce95..ecd3384 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -892,6 +892,30 @@ static int __init gpmc_init(void)
}
postcore_initcall(gpmc_init);
+static __devinit int gpmc_acquire_nand_cs(struct gpmc *gpmc,
+ struct gpmc_device_pdata *gdp)
+{
+ int cs = 0;
+ struct omap_nand_platform_data *nand = gdp-pdata;
+
+ if ((nand-cs = 0) (nand-cs GPMC_CS_NUM))
+ return 0;
+
+ while (cs GPMC_CS_NUM) {
+ u32 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
+
+ if ((l GPMC_CONFIG1_DEVICETYPE(~0)) ==
+ GPMC_CONFIG1_DEVICETYPE_NAND) {
+ dev_info(gpmc-dev, found NAND on CS: %d\n, cs);
+ nand-cs = cs;
+ gdp-cs_data-cs = cs;
+ return 0;
+ }
+ cs++;
+ }
+ return -ENODEV;
+}
+
static __devinit void gpmc_update_nand_reg(struct gpmc *gpmc,
struct omap_nand_platform_data *nand)
{
@@ -1450,8 +1474,14 @@ static __devinit int gpmc_probe(struct platform_device
*pdev)
for (i = 0, gdq = gp-device_pdata, gd = gpmc-device;
(i gp-num_device) (*gdq); i++, gdq++) {
- if ((*gdq)-is_nand)
+ if ((*gdq)-is_nand) {
+ ret = gpmc_acquire_nand_cs(gpmc, *gdq);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(gpmc-dev, CS error: %d\n, ret);
+ continue;
+ }
gpmc_update_nand_reg(gpmc, (*gdq)-pdata);
+ }
ret = gpmc_setup_device(gpmc, gd, *gdq);
if (IS_ERR_VALUE(ret))
dev_err(gpmc-dev, gpmc setup on %s failed\n,
--
1.7.10
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[PATCH 05/39] ARM: OMAP2+: nand: create platform data structure
New API for updating nand platform data. This has
been created by unifying the two existing ones and
taking out gpmc hardware handling.
From now on, platforms can call omap_nand_init to
initialize platform nand structures, it's fields.
Or can statically create the same.
Acquiring gpmc CS for has been removed. Acquiring CS
is done in GPMC driver. To leverage this feature,
pass CS # as any value outside the allowed range of
0 - 7 (this is valid only for connected NAND),
eg. GPMC_CS_NUM (8)
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-devkit8000.c |6 ++-
arch/arm/mach-omap2/board-flash.c | 61 ++--
arch/arm/mach-omap2/board-flash.h | 13 --
arch/arm/mach-omap2/board-ldp.c|4 +-
arch/arm/mach-omap2/board-omap3beagle.c|6 ++-
arch/arm/mach-omap2/board-omap3touchbook.c |6 ++-
arch/arm/mach-omap2/board-overo.c |5 ++-
arch/arm/mach-omap2/board-zoom.c |5 ++-
arch/arm/mach-omap2/common-board-devices.c | 46 -
arch/arm/mach-omap2/common-board-devices.h |1 -
10 files changed, 60 insertions(+), 93 deletions(-)
diff --git a/arch/arm/mach-omap2/board-devkit8000.c
b/arch/arm/mach-omap2/board-devkit8000.c
index a2010f0..aa352d1 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -59,6 +59,7 @@
#include mux.h
#include hsmmc.h
+#include board-flash.h
#include common-board-devices.h
#define OMAP_DM9000_GPIO_IRQ 25
@@ -648,8 +649,9 @@ static void __init devkit8000_init(void)
usb_musb_init(NULL);
usbhs_init(usbhs_bdata);
- omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
-ARRAY_SIZE(devkit8000_nand_partitions));
+ board_nand_init(devkit8000_nand_partitions,
+ ARRAY_SIZE(devkit8000_nand_partitions), GPMC_CS_NUM,
+ NAND_BUSWIDTH_16, NULL);
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal(sdrc_cke0, OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-flash.c
b/arch/arm/mach-omap2/board-flash.c
index 0349fd2..091aaf6 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -108,45 +108,45 @@ __init board_onenand_init(struct mtd_partition
*nor_parts, u8 nr_parts, u8 cs)
defined(CONFIG_MTD_NAND_OMAP2_MODULE)
/* Note that all values in this struct are in nanoseconds */
-static struct gpmc_timings nand_timings = {
+struct gpmc_timings nand_default_timings[1] = {
+ {
+ .sync_clk = 0,
- .sync_clk = 0,
+ .cs_on = 0,
+ .cs_rd_off = 36,
+ .cs_wr_off = 36,
- .cs_on = 0,
- .cs_rd_off = 36,
- .cs_wr_off = 36,
+ .adv_on = 6,
+ .adv_rd_off = 24,
+ .adv_wr_off = 36,
- .adv_on = 6,
- .adv_rd_off = 24,
- .adv_wr_off = 36,
+ .we_off = 30,
+ .oe_off = 48,
- .we_off = 30,
- .oe_off = 48,
+ .access = 54,
+ .rd_cycle = 72,
+ .wr_cycle = 72,
- .access = 54,
- .rd_cycle = 72,
- .wr_cycle = 72,
-
- .wr_access = 30,
- .wr_data_mux_bus = 0,
+ .wr_access = 30,
+ .wr_data_mux_bus = 0,
+ },
};
-static struct omap_nand_platform_data board_nand_data = {
- .gpmc_t = nand_timings,
+static struct omap_nand_platform_data omap_nand_data = {
+ .gpmc_t = nand_default_timings,
};
-void
-__init board_nand_init(struct mtd_partition *nand_parts,
- u8 nr_parts, u8 cs, int nand_type)
+struct omap_nand_platform_data *
+__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
+ int nand_type, struct gpmc_timings *gpmc_t)
{
- board_nand_data.cs = cs;
- board_nand_data.parts = nand_parts;
- board_nand_data.nr_parts= nr_parts;
- board_nand_data.devsize = nand_type;
-
- board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
- board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
- gpmc_nand_init(board_nand_data);
+ omap_nand_data.cs = cs;
+ omap_nand_data.parts= nand_parts;
+ omap_nand_data.nr_parts = nr_parts;
+ omap_nand_data.devsize = nand_type;
+ omap_nand_data.gpmc_t = gpmc_t;
+
+ return omap_nand_data;
}
#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
@@ -243,5 +243,6 @@ void __init board_flash_init(struct flash_partitions
partition_info[],
pr_err(NAND: Unable to find configuration in GPMC\n);
else
board_nand_init(partition_info[2].parts,
- partition_info[2].nr_parts, nandcs, nand_type);
+
[PATCH 06/39] ARM: OMAP2+: onenand: return value in init function
Modify board_onenand_init to return platform data. This
would be required for boards to be able to pass it to
gpmc driver so that it finally reaches onenand driver.
Also un-static the function so that boards can use it.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-flash.c | 14 --
arch/arm/mach-omap2/board-flash.h | 12
2 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/board-flash.c
b/arch/arm/mach-omap2/board-flash.c
index 091aaf6..8727c05 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -87,22 +87,16 @@ static struct omap_onenand_platform_data board_onenand_data
= {
.dma_channel= -1, /* disable DMA in OMAP OneNAND driver */
};
-static void
-__init board_onenand_init(struct mtd_partition *onenand_parts,
- u8 nr_parts, u8 cs)
+struct omap_onenand_platform_data * __init
+board_onenand_init(struct mtd_partition *onenand_parts, u8 nr_parts, u8 cs)
{
board_onenand_data.cs = cs;
board_onenand_data.parts= onenand_parts;
board_onenand_data.nr_parts = nr_parts;
- gpmc_onenand_init(board_onenand_data);
-}
-#else
-static void
-__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
-{
+ return board_onenand_data;
}
-#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
+#endif
#if defined(CONFIG_MTD_NAND_OMAP2) || \
defined(CONFIG_MTD_NAND_OMAP2_MODULE)
diff --git a/arch/arm/mach-omap2/board-flash.h
b/arch/arm/mach-omap2/board-flash.h
index 052964c..75ba49f 100644
--- a/arch/arm/mach-omap2/board-flash.h
+++ b/arch/arm/mach-omap2/board-flash.h
@@ -52,3 +52,15 @@ board_nand_init(struct mtd_partition *nand_parts,
return NULL;
}
#endif
+
+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
+ defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
+extern struct omap_onenand_platform_data * __init
+board_onenand_init(struct mtd_partition *onenand_parts, u8 nr_parts, u8 cs);
+#else
+static inline struct omap_onenand_platform_data *
+__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
+{
+ return NULL;
+}
+#endif
--
1.7.10
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[PATCH 07/39] ARM: OMAP2+: gpmc-nand: Adapt to use gpmc driver
Currently gpmc is configured in platform for nand.
As configuring gpmc has been moved to gpmc driver,
populate details needed for the driver to configure
gpmc. gpmc driver would configure based on this
information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc-nand.c| 84
arch/arm/plat-omap/include/plat/nand.h |8 +--
2 files changed, 35 insertions(+), 57 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 386dec8..190cdc1 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -21,24 +21,30 @@
#include plat/board.h
#include plat/gpmc.h
-static struct resource gpmc_nand_resource = {
- .flags = IORESOURCE_MEM,
+
+static struct gpmc_cs_data gpmc_nand_cs_info = {
+ .have_config= true,
+ .config = GPMC_DEVICETYPE_NAND,
+ .irq_config = GPMC_IRQ_FIFOEVENTENABLE | GPMC_IRQ_COUNT_EVENT,
};
-static struct platform_device gpmc_nand_device = {
+static struct gpmc_device_pdata gpmc_nand_info = {
.name = omap2-nand,
.id = 0,
- .num_resources = 1,
- .resource = gpmc_nand_resource,
+ .cs_data= gpmc_nand_cs_info,
+ .num_cs = 1,
+ .is_nand= true,
};
-static int omap2_nand_gpmc_retime(struct omap_nand_platform_data
*gpmc_nand_data)
-{
- struct gpmc_timings t;
- int err;
+static struct gpmc_timings t;
- if (!gpmc_nand_data-gpmc_t)
+static struct gpmc_timings *
+gpmc_nand_retime(struct omap_nand_platform_data *gpmc_nand_data)
+{
+ if (!gpmc_nand_data-gpmc_t) {
+ pr_warn(gpmc timings not provided\n);
return 0;
+ }
memset(t, 0, sizeof(t));
t.sync_clk = gpmc_nand_data-gpmc_t-sync_clk;
@@ -68,56 +74,26 @@ static int omap2_nand_gpmc_retime(struct
omap_nand_platform_data *gpmc_nand_data
t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data-gpmc_t-cs_wr_off);
t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data-gpmc_t-wr_cycle);
- /* Configure GPMC */
- if (gpmc_nand_data-devsize == NAND_BUSWIDTH_16)
- gpmc_cs_configure(gpmc_nand_data-cs, GPMC_CONFIG_DEV_SIZE, 1);
- else
- gpmc_cs_configure(gpmc_nand_data-cs, GPMC_CONFIG_DEV_SIZE, 0);
- gpmc_cs_configure(gpmc_nand_data-cs,
- GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
- err = gpmc_cs_set_timings(gpmc_nand_data-cs, t);
- if (err)
- return err;
-
- return 0;
+ return t;
}
-int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
+struct gpmc_device_pdata *
+__init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
{
- int err = 0;
- struct device *dev = gpmc_nand_device.dev;
+ gpmc_nand_info.pdata = gpmc_nand_data;
+ gpmc_nand_info.pdata_size = sizeof(*gpmc_nand_data);
- gpmc_nand_device.dev.platform_data = gpmc_nand_data;
+ gpmc_nand_cs_info.cs = gpmc_nand_data-cs;
+ gpmc_nand_cs_info.mem_size = NAND_IO_SIZE;
- err = gpmc_cs_request(gpmc_nand_data-cs, NAND_IO_SIZE,
- gpmc_nand_data-phys_base);
- if (err 0) {
- dev_err(dev, Cannot request GPMC CS\n);
- return err;
- }
+ gpmc_nand_cs_info.timing = gpmc_nand_retime(gpmc_nand_data);
-/* Set timings in GPMC */
- err = omap2_nand_gpmc_retime(gpmc_nand_data);
- if (err 0) {
- dev_err(dev, Unable to set gpmc timings: %d\n, err);
- return err;
- }
-
- /* Enable RD PIN Monitoring Reg */
- if (gpmc_nand_data-dev_ready) {
- gpmc_cs_configure(gpmc_nand_data-cs, GPMC_CONFIG_RDY_BSY, 1);
- }
-
- err = platform_device_register(gpmc_nand_device);
- if (err 0) {
- dev_err(dev, Unable to register NAND device\n);
- goto out_free_cs;
- }
-
- return 0;
+ if (gpmc_nand_data-devsize == NAND_BUSWIDTH_16)
+ gpmc_nand_cs_info.config |= GPMC_DEVICESIZE_16;
-out_free_cs:
- gpmc_cs_free(gpmc_nand_data-cs);
+ if (gpmc_nand_data-dev_ready)
+ gpmc_nand_cs_info.config |= GPMC_WAIT_READ_MON |
+ GPMC_WAIT_WRITE_MON;
- return err;
+ return gpmc_nand_info;
}
diff --git a/arch/arm/plat-omap/include/plat/nand.h
b/arch/arm/plat-omap/include/plat/nand.h
index 86e4d9c..30c61c9 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -36,10 +36,12 @@ struct omap_nand_platform_data {
#defineNAND_IO_SIZE4
#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
-extern int gpmc_nand_init(struct omap_nand_platform_data *d);
+extern struct gpmc_device_pdata *
+gpmc_nand_init(struct
[PATCH 08/39] ARM: OMAP2+: gpmc-onenand: Adapt to use gpmc driver
Currently gpmc is configured in platform for onenand. As configuring
gpmc has been moved to gpmc driver, populate details needed for the
driver to configure gpmc. gpmc driver would configure based on this
information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc-onenand.c| 111 +++--
arch/arm/plat-omap/include/plat/onenand.h |7 +-
2 files changed, 61 insertions(+), 57 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c
b/arch/arm/mach-omap2/gpmc-onenand.c
index a0fa9bb..d7775d5 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -25,9 +25,17 @@
static struct omap_onenand_platform_data *gpmc_onenand_data;
-static struct platform_device gpmc_onenand_device = {
+#define ONENAND_IO_SIZESZ_128K
+
+static struct gpmc_cs_data gpmc_onenand_cs_info = {
+ .mem_size = ONENAND_IO_SIZE,
+};
+
+static struct gpmc_device_pdata gpmc_onenand_info = {
.name = omap2-onenand,
.id = -1,
+ .cs_data= gpmc_onenand_cs_info,
+ .num_cs = 1,
};
static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
@@ -79,13 +87,17 @@ static int omap2_onenand_set_async_mode(int cs, void
__iomem *onenand_base)
t.wr_cycle = t.cs_wr_off + gpmc_round_ns_to_ticks(t_cez);
/* Configure GPMC for asynchronous read */
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
- GPMC_CONFIG1_DEVICESIZE_16 |
- GPMC_CONFIG1_MUXADDDATA);
-
- err = gpmc_cs_set_timings(cs, t);
- if (err)
+ gpmc_onenand_cs_info.have_config = true;
+ gpmc_onenand_cs_info.config = GPMC_DEVICESIZE_16 |
+ GPMC_MUXADDDATA |
+ GPMC_DEVICETYPE_NOR;
+ gpmc_onenand_cs_info.timing = t;
+ err = gpmc_cs_reconfigure(gpmc_onenand_info.name,
+ gpmc_onenand_info.id, gpmc_onenand_cs_info);
+ if (err) {
+ pr_err(%s: gpmc_cs_reconfigure failed\n, __func__);
return err;
+ }
/* Ensure sync read and sync write are disabled */
reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
@@ -180,7 +192,6 @@ static int omap2_onenand_set_sync_mode(struct
omap_onenand_platform_data *cfg,
int first_time = 0, hf = 0, vhf = 0, sync_read = 0, sync_write = 0;
int err, ticks_cez;
int cs = cfg-cs, freq = *freq_ptr;
- u32 reg;
bool clk_dep = false;
if (cfg-flags ONENAND_SYNC_READ) {
@@ -276,27 +287,10 @@ static int omap2_onenand_set_sync_mode(struct
omap_onenand_platform_data *cfg,
sync_read, sync_write, hf, vhf);
if (div == 1) {
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG2);
- reg |= (1 7);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG2, reg);
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG3);
- reg |= (1 7);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG3, reg);
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG4);
- reg |= (1 7);
- reg |= (1 23);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG4, reg);
- } else {
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG2);
- reg = ~(1 7);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG2, reg);
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG3);
- reg = ~(1 7);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG3, reg);
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG4);
- reg = ~(1 7);
- reg = ~(1 23);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG4, reg);
+ t.control.cs_extra_delay = true;
+ t.control.adv_extra_delay = true;
+ t.control.oe_extra_delay = true;
+ t.control.we_extra_delay = true;
}
/* Set synchronous read timings */
@@ -348,24 +342,31 @@ static int omap2_onenand_set_sync_mode(struct
omap_onenand_platform_data *cfg,
}
/* Configure GPMC for synchronous read */
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
- GPMC_CONFIG1_WRAPBURST_SUPP |
- GPMC_CONFIG1_READMULTIPLE_SUPP |
- (sync_read ? GPMC_CONFIG1_READTYPE_SYNC : 0) |
- (sync_write ? GPMC_CONFIG1_WRITEMULTIPLE_SUPP : 0) |
- (sync_write ? GPMC_CONFIG1_WRITETYPE_SYNC : 0) |
- GPMC_CONFIG1_CLKACTIVATIONTIME(fclk_offset) |
- GPMC_CONFIG1_PAGE_LEN(2) |
- (cpu_is_omap34xx() ? 0 :
- (GPMC_CONFIG1_WAIT_READ_MON |
-GPMC_CONFIG1_WAIT_PIN_SEL(0))) |
-
[PATCH 09/39] ARM: OMAP2+: flash: Adapt to gpmc driver
gpmc driver has been converted to driver. Modify board_flash_init
so that it can setup gpmc driver platform details for boards
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-3430sdp.c |2 +-
arch/arm/mach-omap2/board-3630sdp.c |3 +-
arch/arm/mach-omap2/board-flash.c | 89 +++
arch/arm/mach-omap2/board-flash.h | 11 +++--
4 files changed, 58 insertions(+), 47 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index da75f23..ac2e398 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -620,7 +620,7 @@ static void __init omap_3430sdp_init(void)
omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
usb_musb_init(NULL);
board_smc91x_init();
- board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
+ board_flash_init(sdp_flash_partitions, chip_sel_3430, 0, NULL);
sdp3430_display_init();
enable_board_wakeup_source();
usbhs_init(usbhs_bdata);
diff --git a/arch/arm/mach-omap2/board-3630sdp.c
b/arch/arm/mach-omap2/board-3630sdp.c
index 6ef350d..74195b7 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -204,7 +204,8 @@ static void __init omap_sdp_init(void)
h8mbx00u0mer0em_sdrc_params);
zoom_display_init();
board_smc91x_init();
- board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16);
+ board_flash_init(sdp_flash_partitions, chip_sel_sdp,
+ NAND_BUSWIDTH_16, NULL);
enable_board_wakeup_source();
usbhs_init(usbhs_bdata);
}
diff --git a/arch/arm/mach-omap2/board-flash.c
b/arch/arm/mach-omap2/board-flash.c
index 8727c05..8deead9 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -39,46 +39,33 @@ static struct physmap_flash_data board_nor_data = {
.width = 2,
};
-static struct resource board_nor_resource = {
- .flags = IORESOURCE_MEM,
+static struct gpmc_cs_data gpmc_nor_cs_data = {
};
-static struct platform_device board_nor_device = {
+static struct gpmc_device_pdata gpmc_nor_data = {
.name = physmap-flash,
.id = 0,
- .dev= {
- .platform_data = board_nor_data,
- },
- .num_resources = 1,
- .resource = board_nor_resource,
+ .cs_data= gpmc_nor_cs_data,
+ .num_cs = 1,
};
-static void
-__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
+static __init struct gpmc_device_pdata *
+gpmc_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
{
- int err;
-
board_nor_data.parts= nor_parts;
board_nor_data.nr_parts = nr_parts;
- /* Configure start address and size of NOR device */
- if (omap_rev() = OMAP3430_REV_ES1_0) {
- err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
- (unsigned long *)board_nor_resource.start);
- board_nor_resource.end = board_nor_resource.start
- + FLASH_SIZE_SDPV2 - 1;
- } else {
- err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
- (unsigned long *)board_nor_resource.start);
- board_nor_resource.end = board_nor_resource.start
- + FLASH_SIZE_SDPV1 - 1;
- }
- if (err 0) {
- pr_err(NOR: Can't request GPMC CS\n);
- return;
- }
- if (platform_device_register(board_nor_device) 0)
- pr_err(Unable to register NOR device\n);
+ gpmc_nor_cs_data.cs = cs;
+
+ if (omap_rev() = OMAP3430_REV_ES1_0)
+ gpmc_nor_cs_data.mem_size = FLASH_SIZE_SDPV2;
+ else
+ gpmc_nor_cs_data.mem_size = FLASH_SIZE_SDPV1;
+
+ gpmc_nor_data.pdata = board_nor_data;
+ gpmc_nor_data.pdata_size = sizeof(board_nor_data);
+
+ return gpmc_nor_data;
}
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
@@ -183,8 +170,11 @@ unmap:
*
* @return - void.
*/
-void __init board_flash_init(struct flash_partitions partition_info[],
- char chip_sel_board[][GPMC_CS_NUM], int nand_type)
+__init struct gpmc_device_pdata **board_flash_init(
+ struct flash_partitions partition_info[],
+ char chip_sel_board[][GPMC_CS_NUM],
+ int nand_type,
+ struct gpmc_device_pdata **gpmc_data)
{
u8 cs = 0;
u8 norcs = GPMC_CS_NUM + 1;
@@ -193,13 +183,18 @@ void __init board_flash_init(struct flash_partitions
partition_info[],
u8 idx;
unsigned char *config_sel = NULL;
+ if (gpmc_data ==
[PATCH 10/39] ARM: OMAP2+: gpmc-smsc911x: Adapt to use gpmc driver
gpmc has been converted to driver. And all gpmc related
configuration would be done by gpmc driver. Provide
gpmc driver with sufficient information so that it can
configure.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc-smsc911x.c | 59 ---
arch/arm/plat-omap/include/plat/gpmc-smsc911x.h |9 +++-
2 files changed, 39 insertions(+), 29 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c
b/arch/arm/mach-omap2/gpmc-smsc911x.c
index b6c77be..2c89685 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -24,13 +24,8 @@
#include plat/gpmc.h
#include plat/gpmc-smsc911x.h
-static struct resource gpmc_smsc911x_resources[] = {
- [0] = {
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
- },
+static struct resource gpmc_smsc911x_resources = {
+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
};
static struct smsc911x_platform_config gpmc_smsc911x_config = {
@@ -44,26 +39,42 @@ static struct smsc911x_platform_config gpmc_smsc911x_config
= {
* assume that pin multiplexing is done in the board-*.c file,
* or in the bootloader.
*/
-void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg)
+__init struct gpmc_device_pdata *
+gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg)
{
- struct platform_device *pdev;
- unsigned long cs_mem_base;
int ret;
+ struct gpmc_device_pdata *gpmc_pdev;
+ struct gpmc_cs_data *gpmc_cs;
- if (gpmc_cs_request(gpmc_cfg-cs, SZ_16M, cs_mem_base) 0) {
- pr_err(Failed to request GPMC mem region\n);
- return;
+ gpmc_pdev = kzalloc(sizeof(*gpmc_pdev), GFP_KERNEL);
+ if (gpmc_pdev == NULL)
+ return gpmc_pdev;
+
+ gpmc_cs = kzalloc(sizeof(*gpmc_cs), GFP_KERNEL);
+ if (gpmc_pdev == NULL) {
+ kfree(gpmc_pdev);
+ return NULL;
}
- gpmc_smsc911x_resources[0].start = cs_mem_base + 0x0;
- gpmc_smsc911x_resources[0].end = cs_mem_base + 0xff;
+ gpmc_pdev-cs_data = gpmc_cs;
+ gpmc_pdev-num_cs = 1;
+ gpmc_pdev-name = smsc911x;
+ gpmc_pdev-id = gpmc_cfg-id;
+ gpmc_pdev-pdata = gpmc_smsc911x_config;
+ gpmc_pdev-pdata_size = sizeof(gpmc_smsc911x_config);
+
+ gpmc_cs-cs = gpmc_cfg-cs;
+ gpmc_cs-mem_size = 0x100;
+
+ gpmc_pdev-per_res = gpmc_smsc911x_resources;
+ gpmc_pdev-per_res_cnt = 1;
if (gpio_request_one(gpmc_cfg-gpio_irq, GPIOF_IN, smsc911x irq)) {
pr_err(Failed to request IRQ GPIO%d\n, gpmc_cfg-gpio_irq);
goto free1;
}
- gpmc_smsc911x_resources[1].start = gpio_to_irq(gpmc_cfg-gpio_irq);
+ gpmc_smsc911x_resources.start = gpio_to_irq(gpmc_cfg-gpio_irq);
if (gpio_is_valid(gpmc_cfg-gpio_reset)) {
ret = gpio_request_one(gpmc_cfg-gpio_reset,
@@ -81,21 +92,15 @@ void __init gpmc_smsc911x_init(struct
omap_smsc911x_platform_data *gpmc_cfg)
gpmc_smsc911x_config.flags = gpmc_cfg-flags ? : SMSC911X_USE_16BIT;
- pdev = platform_device_register_resndata(NULL, smsc911x, gpmc_cfg-id,
-gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources),
-gpmc_smsc911x_config, sizeof(gpmc_smsc911x_config));
- if (!pdev) {
- pr_err(Unable to register platform device\n);
- gpio_free(gpmc_cfg-gpio_reset);
- goto free2;
- }
-
- return;
+ return gpmc_pdev;
free2:
gpio_free(gpmc_cfg-gpio_irq);
free1:
- gpmc_cs_free(gpmc_cfg-cs);
+ kfree(gpmc_cs);
+ kfree(gpmc_pdev);
pr_err(Could not initialize smsc911x device\n);
+
+ return NULL;
}
diff --git a/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h
b/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h
index ea6c9c8..66dc7f1 100644
--- a/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h
+++ b/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h
@@ -11,6 +11,8 @@
* published by the Free Software Foundation.
*/
+#includeplat/gpmc.h
+
#ifndef __ASM_ARCH_OMAP_GPMC_SMSC911X_H__
struct omap_smsc911x_platform_data {
@@ -23,12 +25,15 @@ struct omap_smsc911x_platform_data {
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
-extern void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d);
+extern struct gpmc_device_pdata *
+gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d);
#else
-static inline void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d)
+static inline struct gpmc_device_pdata *
+gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d)
{
+ return NULL;
}
#endif
--
1.7.10
--
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[PATCH 11/39] ARM: OMAP2+: gpmc-smc91x: Adapt to use gpmc driver
Currently gpmc is configured in platform for smc91x. As configuring
gpmc has been moved to gpmc driver, populate details needed for the
driver to configure gpmc. gpmc driver would configure based on this
information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-2430sdp.c |2 +-
arch/arm/mach-omap2/board-3430sdp.c |1 +
arch/arm/mach-omap2/board-3630sdp.c |1 +
arch/arm/mach-omap2/gpmc-smc91x.c | 87 +++--
arch/arm/plat-omap/include/plat/gpmc-smc91x.h | 10 ++-
5 files changed, 47 insertions(+), 54 deletions(-)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c
b/arch/arm/mach-omap2/board-2430sdp.c
index e658f83..68679a8 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -175,7 +175,7 @@ static struct omap_smc91x_platform_data board_smc91x_data =
{
.gpio_irq = 149,
.flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
IORESOURCE_IRQ_LOWLEVEL,
-
+ .skip_timing= true,
};
static void __init board_smc91x_init(void)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index ac2e398..367a466 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -434,6 +434,7 @@ static struct omap_smc91x_platform_data board_smc91x_data =
{
.cs = 3,
.flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
IORESOURCE_IRQ_LOWLEVEL,
+ .skip_timing= true,
};
static void __init board_smc91x_init(void)
diff --git a/arch/arm/mach-omap2/board-3630sdp.c
b/arch/arm/mach-omap2/board-3630sdp.c
index 74195b7..143e47f 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -32,6 +32,7 @@
static struct omap_smc91x_platform_data board_smc91x_data = {
.cs = 3,
.flags = GPMC_MUX_ADD_DATA | IORESOURCE_IRQ_LOWLEVEL,
+ .skip_timing= true,
};
static void __init board_smc91x_init(void)
diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c
b/arch/arm/mach-omap2/gpmc-smc91x.c
index ba10c24..9389df1 100644
--- a/arch/arm/mach-omap2/gpmc-smc91x.c
+++ b/arch/arm/mach-omap2/gpmc-smc91x.c
@@ -23,13 +23,8 @@
static struct omap_smc91x_platform_data *gpmc_cfg;
-static struct resource gpmc_smc91x_resources[] = {
- [0] = {
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .flags = IORESOURCE_IRQ,
- },
+static struct resource gpmc_smc91x_resource = {
+ .flags = IORESOURCE_IRQ,
};
static struct smc91x_platdata gpmc_smc91x_info = {
@@ -38,14 +33,17 @@ static struct smc91x_platdata gpmc_smc91x_info = {
.ledb = RPC_LED_TX_RX,
};
-static struct platform_device gpmc_smc91x_device = {
+static struct gpmc_cs_data gpmc_smc91x_cs_data;
+
+static struct gpmc_device_pdata gpmc_smc91x_data = {
.name = smc91x,
.id = -1,
- .dev= {
- .platform_data = gpmc_smc91x_info,
- },
- .num_resources = ARRAY_SIZE(gpmc_smc91x_resources),
- .resource = gpmc_smc91x_resources,
+ .pdata = gpmc_smc91x_info,
+ .pdata_size = sizeof(gpmc_smc91x_info),
+ .per_res= gpmc_smc91x_resource,
+ .per_res_cnt= 1,
+ .cs_data= gpmc_smc91x_cs_data,
+ .num_cs = 1,
};
/*
@@ -54,9 +52,10 @@ static struct platform_device gpmc_smc91x_device = {
* http://www.smsc.com/main/catalog/lan91c96.html
* REVISIT: Level shifters can add at least to the access latency.
*/
-static int smc91c96_gpmc_retime(void)
+static void smc91c96_gpmc_retime(void)
{
- struct gpmc_timings t;
+ /* GPMC timing configuration after this function dies, hence static */
+ static struct gpmc_timings t;
const int t3 = 10; /* Figure 12.2 read and 12.4 write */
const int t4_r = 20;/* Figure 12.2 read */
const int t4_w = 5; /* Figure 12.4 write */
@@ -65,7 +64,6 @@ static int smc91c96_gpmc_retime(void)
const int t7 = 5; /* Figure 12.4 write */
const int t8 = 5; /* Figure 12.4 write */
const int t20 = 185;/* Figure 12.2 read and 12.4 write */
- u32 l;
memset(t, 0, sizeof(t));
@@ -93,16 +91,17 @@ static int smc91c96_gpmc_retime(void)
t.cs_wr_off = t.we_off + t4_w;
t.wr_cycle = t20 - t.we_on;
- l = GPMC_CONFIG1_DEVICESIZE_16;
+ gpmc_smc91x_cs_data.have_config = true;
+ gpmc_smc91x_cs_data.config = GPMC_DEVICESIZE_16;
if (gpmc_cfg-flags GPMC_MUX_ADD_DATA)
- l |= GPMC_CONFIG1_MUXADDDATA;
+ gpmc_smc91x_cs_data.config |= GPMC_MUXADDDATA;
if (gpmc_cfg-flags GPMC_READ_MON)
- l |= GPMC_CONFIG1_WAIT_READ_MON;
+
[PATCH 12/39] ARM: OMAP2+: gpmc-tusb6010: Adapt to gpmc driver
Currently gpmc is configured in platform for tusb6010. As configuring
gpmc has been moved to gpmc driver, populate details needed for the
driver to configure gpmc. gpmc driver would configure based on this
information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/usb-tusb6010.c | 177 ++--
include/linux/usb/musb.h |4 +-
2 files changed, 70 insertions(+), 111 deletions(-)
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c
b/arch/arm/mach-omap2/usb-tusb6010.c
index db84a46..d7817d2 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -22,6 +22,24 @@
#include mux.h
+static struct resource tusb_resources = {
+ .name = mc,
+ .flags = IORESOURCE_IRQ,
+};
+
+#defineTUSB_GPMC_CS_ASYNC_IDX 1
+#defineTUSB_GPMC_CS_SYNC_IDX 2
+#defineTUSB_GPMC_CS_NUM2
+
+static struct gpmc_cs_data gpmc_tusb_cs_data[TUSB_GPMC_CS_NUM];
+
+static struct gpmc_device_pdata gpmc_tusb_data = {
+ .name = musb-tusb,
+ .id = -1,
+ .per_res= tusb_resources,
+ .per_res_cnt= 1,
+};
+
static u8 async_cs, sync_cs;
static unsignedrefclk_psec;
@@ -51,9 +69,9 @@ next_clk(unsigned t1_NS, unsigned t2_ps, unsigned fclk_ps)
/* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */
-static int tusb_set_async_mode(unsigned sysclk_ps, unsigned fclk_ps)
+static void tusb_set_async_mode(unsigned sysclk_ps, unsigned fclk_ps)
{
- struct gpmc_timings t;
+ static struct gpmc_timings t;
unsignedt_acsnh_advnh = sysclk_ps + 3000;
unsignedtmp;
@@ -106,12 +124,12 @@ static int tusb_set_async_mode(unsigned sysclk_ps,
unsigned fclk_ps)
tmp = t.cs_wr_off * 1000 + 7000 /* t_acsn_rdy_z */;
t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);
- return gpmc_cs_set_timings(async_cs, t);
+ gpmc_tusb_cs_data[TUSB_GPMC_CS_ASYNC_IDX].timing = t;
}
static int tusb_set_sync_mode(unsigned sysclk_ps, unsigned fclk_ps)
{
- struct gpmc_timings t;
+ static struct gpmc_timings t;
unsignedt_scsnh_advnh = sysclk_ps + 3000;
unsignedtmp;
@@ -174,71 +192,30 @@ static int tusb_set_sync_mode(unsigned sysclk_ps,
unsigned fclk_ps)
tmp = t.cs_wr_off * 1000 + 7000 /* t_scsn_rdy_z */;
t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);
- return gpmc_cs_set_timings(sync_cs, t);
+ gpmc_tusb_cs_data[TUSB_GPMC_CS_SYNC_IDX].timing = t;
+
+ return 0;
}
extern unsigned long gpmc_get_fclk_period(void);
/* tusb driver calls this when it changes the chip's clocking */
-int tusb6010_platform_retime(unsigned is_refclk)
+static int tusb6010_platform_retime(unsigned is_refclk)
{
- static const char error[] =
- KERN_ERR tusb6010 %s retime error %d\n;
-
unsignedfclk_ps = gpmc_get_fclk_period();
unsignedsysclk_ps;
- int status;
if (!refclk_psec || fclk_ps == 0)
return -ENODEV;
sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
- status = tusb_set_async_mode(sysclk_ps, fclk_ps);
- if (status 0) {
- printk(error, async, status);
- goto done;
- }
- status = tusb_set_sync_mode(sysclk_ps, fclk_ps);
- if (status 0)
- printk(error, sync, status);
-done:
- return status;
+ tusb_set_async_mode(sysclk_ps, fclk_ps);
+ return tusb_set_sync_mode(sysclk_ps, fclk_ps);
}
-EXPORT_SYMBOL_GPL(tusb6010_platform_retime);
-
-static struct resource tusb_resources[] = {
- /* Order is significant! The start/end fields
-* are updated during setup..
-*/
- { /* Asynchronous access */
- .flags = IORESOURCE_MEM,
- },
- { /* Synchronous access */
- .flags = IORESOURCE_MEM,
- },
- { /* IRQ */
- .name = mc,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 tusb_dmamask = ~(u32)0;
-
-static struct platform_device tusb_device = {
- .name = musb-tusb,
- .id = -1,
- .dev = {
- .dma_mask = tusb_dmamask,
- .coherent_dma_mask = 0x,
- },
- .num_resources = ARRAY_SIZE(tusb_resources),
- .resource = tusb_resources,
-};
-
/* this may be called only from board-*.c setup code */
-int __init
+__init struct gpmc_device_pdata *
tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
unsigned ps_refclk, unsigned waitpin,
unsigned async, unsigned sync,
@@ -249,82 +226,72 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data
*data,
KERN_ERR tusb6010 init error %d, %d\n;
/*
[PATCH 13/39] ARM: OMAP3: hwmod data: add gpmc
Add gpmc hwmod and associated interconnect data
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 52
1 file changed, 52 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 0c65079..4da8394 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1981,6 +1981,40 @@ static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
};
/*
+ * 'gpmc' class
+ * general purpose memory controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap3xxx_gpmc_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap3xxx_gpmc_hwmod_class = {
+ .name = gpmc,
+ .sysc = omap3xxx_gpmc_sysc,
+};
+
+static struct omap_hwmod_irq_info omap3xxx_gpmc_irqs[] = {
+ { .irq = 20 },
+ { .irq = -1 }
+};
+
+static struct omap_hwmod omap3xxx_gpmc_hwmod = {
+ .name = gpmc,
+ .class = omap3xxx_gpmc_hwmod_class,
+ .clkdm_name = l3_init_clkdm,
+ .mpu_irqs = omap3xxx_gpmc_irqs,
+ .main_clk = gpmc_fck,
+ .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
+};
+
+/*
* interfaces
*/
@@ -3059,6 +3093,23 @@ static struct omap_hwmod_ocp_if
omap3xxx_l4_core__usb_tll_hs = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_addr_space omap3xxx_gpmc_addrs[] = {
+ {
+ .pa_start = 0x6E00,
+ .pa_end = 0x6E000FFF,
+ .flags = ADDR_TYPE_RT
+ },
+ { }
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l3_main__gpmc = {
+ .master = omap3xxx_l3_main_hwmod,
+ .slave = omap3xxx_gpmc_hwmod,
+ .clk= core_l3_ick,
+ .addr = omap3xxx_gpmc_addrs,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
omap3xxx_l3_main__l4_core,
omap3xxx_l3_main__l4_per,
@@ -3103,6 +3154,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[]
__initdata = {
omap34xx_l4_core__mcspi2,
omap34xx_l4_core__mcspi3,
omap34xx_l4_core__mcspi4,
+ omap3xxx_l3_main__gpmc,
NULL,
};
--
1.7.10
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[PATCH 14/39] ARM: OMAP2xxx: hwmod data: add gpmc
Add gpmc hwmod and associated interconnect data
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 18 +
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 18 +
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 41
arch/arm/mach-omap2/omap_hwmod_common_data.h |1 +
arch/arm/mach-omap2/prcm-common.h |2 +
5 files changed, 80 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 2c087ff..55c8c7b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -428,6 +428,23 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 =
{
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_addr_space omap2420_gpmc_addrs[] = {
+ {
+ .pa_start = 0x6800A000,
+ .pa_end = 0x6800AFFF,
+ .flags = ADDR_TYPE_RT
+ },
+ { }
+};
+
+static struct omap_hwmod_ocp_if omap2420_l3__gpmc = {
+ .master = omap2xxx_l3_main_hwmod,
+ .slave = omap2xxx_gpmc_hwmod,
+ .clk= core_l3_ck,
+ .addr = omap2420_gpmc_addrs,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
omap2xxx_l3_main__l4_core,
omap2xxx_mpu__l3_main,
@@ -468,6 +485,7 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[]
__initdata = {
omap2420_l4_core__mailbox,
omap2420_l4_core__mcbsp1,
omap2420_l4_core__mcbsp2,
+ omap2420_l3__gpmc,
NULL,
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 71d9f88..dd224cca 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -838,6 +838,23 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 =
{
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_addr_space omap2430_gpmc_addrs[] = {
+ {
+ .pa_start = 0x6E00,
+ .pa_end = 0x6E000FFF,
+ .flags = ADDR_TYPE_RT
+ },
+ { }
+};
+
+static struct omap_hwmod_ocp_if omap2430_l3__gpmc = {
+ .master = omap2xxx_l3_main_hwmod,
+ .slave = omap2xxx_gpmc_hwmod,
+ .clk= core_l3_ck,
+ .addr = omap2430_gpmc_addrs,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
omap2xxx_l3_main__l4_core,
omap2xxx_mpu__l3_main,
@@ -886,6 +903,7 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[]
__initdata = {
omap2430_l4_core__mcbsp3,
omap2430_l4_core__mcbsp4,
omap2430_l4_core__mcbsp5,
+ omap2430_l3__gpmc,
NULL,
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index 45aaa07..e75da40 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -175,6 +175,26 @@ struct omap_hwmod_class omap2xxx_mcspi_class = {
};
/*
+ * 'gpmc' class
+ * general purpose memory controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap2xxx_gpmc_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2xxx_gpmc_hwmod_class = {
+ .name = gpmc,
+ .sysc = omap2xxx_gpmc_sysc,
+};
+
+/*
* IP blocks
*/
@@ -732,3 +752,24 @@ struct omap_hwmod omap2xxx_mcspi2_hwmod = {
.class = omap2xxx_mcspi_class,
.dev_attr = omap_mcspi2_dev_attr,
};
+
+/* gpmc */
+static struct omap_hwmod_irq_info omap2xxx_gpmc_irqs[] = {
+ { .irq = 20 },
+ { .irq = -1 }
+};
+
+struct omap_hwmod omap2xxx_gpmc_hwmod = {
+ .name = gpmc,
+ .class = omap2xxx_gpmc_hwmod_class,
+ .mpu_irqs = omap2xxx_gpmc_irqs,
+ .main_clk = gpmc_fck,
+ .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 3,
+ .module_bit = OMAP24XX_EN_GPMC_MASK,
+ .module_offs = CORE_MOD,
+ },
+ },
+};
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h
b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index 7aa9156..63e0134
[PATCH 15/39] mtd: nand: omap2: obtain memory from resource
gpmc being converted to driver, provides drivers
of peripheral connected memory space used by the
peripheral as memory resource.
Modify nand omap driver to obtain memory detials
from resource structure.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/plat-omap/include/plat/nand.h |1 -
drivers/mtd/nand/omap2.c | 20 ++--
2 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/nand.h
b/arch/arm/plat-omap/include/plat/nand.h
index 30c61c9..570c4f4 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -26,7 +26,6 @@ struct omap_nand_platform_data {
booldev_ready;
int gpmc_irq;
enum nand_ioxfer_type;
- unsigned long phys_base;
int devsize;
enum omap_ecc ecc_opt;
struct gpmc_nand_regs reg;
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index c2b0bba..be4b321 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -118,6 +118,7 @@ struct omap_nand_info {
int gpmc_cs;
unsigned long phys_base;
+ unsigned long mem_size;
struct completion comp;
int dma_ch;
int gpmc_irq;
@@ -931,6 +932,7 @@ static int __devinit omap_nand_probe(struct platform_device
*pdev)
struct omap_nand_platform_data *pdata;
int err;
int i, offset;
+ struct resource *res;
pdata = pdev-dev.platform_data;
if (pdata == NULL) {
@@ -950,7 +952,6 @@ static int __devinit omap_nand_probe(struct platform_device
*pdev)
info-pdev = pdev;
info-gpmc_cs = pdata-cs;
- info-phys_base = pdata-phys_base;
info-mtd.priv = info-nand;
info-mtd.name = dev_name(pdev-dev);
@@ -959,16 +960,23 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
info-nand.options = pdata-devsize;
info-nand.options |= NAND_SKIP_BBTSCAN;
- /* NAND write protect off */
- gpmc_cs_configure(info-gpmc_cs, GPMC_CONFIG_WP, 0);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res == NULL) {
+ err = -EINVAL;
+ dev_err(pdev-dev, error getting memory resource\n);
+ goto out_free_info;
+ }
+
+ info-phys_base = res-start;
+ info-mem_size = resource_size(res);
- if (!request_mem_region(info-phys_base, NAND_IO_SIZE,
+ if (!request_mem_region(info-phys_base, info-mem_size,
pdev-dev.driver-name)) {
err = -EBUSY;
goto out_free_info;
}
- info-nand.IO_ADDR_R = ioremap(info-phys_base, NAND_IO_SIZE);
+ info-nand.IO_ADDR_R = ioremap(info-phys_base, info-mem_size);
if (!info-nand.IO_ADDR_R) {
err = -ENOMEM;
goto out_release_mem_region;
@@ -1110,7 +1118,7 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
return 0;
out_release_mem_region:
- release_mem_region(info-phys_base, NAND_IO_SIZE);
+ release_mem_region(info-phys_base, info-mem_size);
out_free_info:
kfree(info);
--
1.7.10
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[PATCH 16/39] mtd: nand: omap2: use gpmc provided irqs
GPMC driver provides it's clientsd with interrupts that can be used
through struct resource. Make use of it for irq mode functionality.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/mtd/nand/omap2.c | 67 +-
1 file changed, 42 insertions(+), 25 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index be4b321..440536b 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -121,7 +121,8 @@ struct omap_nand_info {
unsigned long mem_size;
struct completion comp;
int dma_ch;
- int gpmc_irq;
+ int gpmc_irq_fifo;
+ int gpmc_irq_count;
enum {
OMAP_NAND_IO_READ = 0, /* read */
OMAP_NAND_IO_WRITE, /* write */
@@ -472,13 +473,11 @@ static irqreturn_t omap_nand_irq(int this_irq, void *dev)
{
struct omap_nand_info *info = (struct omap_nand_info *) dev;
u32 bytes;
- u32 irq_stat;
- irq_stat = gpmc_read_status(GPMC_GET_IRQ_STATUS);
bytes = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);
bytes = bytes 0xFFFC; /* io in multiple of 4 bytes */
if (info-iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */
- if (irq_stat 0x2)
+ if (this_irq == info-gpmc_irq_count)
goto done;
if (info-buf_len (info-buf_len bytes))
@@ -495,20 +494,17 @@ static irqreturn_t omap_nand_irq(int this_irq, void *dev)
(u32 *)info-buf, bytes 2);
info-buf = info-buf + bytes;
- if (irq_stat 0x2)
+ if (this_irq == info-gpmc_irq_count)
goto done;
}
- gpmc_cs_configure(info-gpmc_cs, GPMC_SET_IRQ_STATUS, irq_stat);
return IRQ_HANDLED;
done:
complete(info-comp);
- /* disable irq */
- gpmc_cs_configure(info-gpmc_cs, GPMC_ENABLE_IRQ, 0);
- /* clear status */
- gpmc_cs_configure(info-gpmc_cs, GPMC_SET_IRQ_STATUS, irq_stat);
+ disable_irq_nosync(info-gpmc_irq_fifo);
+ disable_irq_nosync(info-gpmc_irq_count);
return IRQ_HANDLED;
}
@@ -542,9 +538,9 @@ static void omap_read_buf_irq_pref(struct mtd_info *mtd,
u_char *buf, int len)
goto out_copy;
info-buf_len = len;
- /* enable irq */
- gpmc_cs_configure(info-gpmc_cs, GPMC_ENABLE_IRQ,
- (GPMC_IRQ_FIFOEVENTENABLE | GPMC_IRQ_COUNT_EVENT));
+
+ enable_irq(info-gpmc_irq_count);
+ enable_irq(info-gpmc_irq_fifo);
/* waiting for read to complete */
wait_for_completion(info-comp);
@@ -591,12 +587,13 @@ static void omap_write_buf_irq_pref(struct mtd_info *mtd,
goto out_copy;
info-buf_len = len;
- /* enable irq */
- gpmc_cs_configure(info-gpmc_cs, GPMC_ENABLE_IRQ,
- (GPMC_IRQ_FIFOEVENTENABLE | GPMC_IRQ_COUNT_EVENT));
+
+ enable_irq(info-gpmc_irq_count);
+ enable_irq(info-gpmc_irq_fifo);
/* waiting for write to complete */
wait_for_completion(info-comp);
+
/* wait for data to flushed-out before reset the prefetch */
tim = 0;
limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
@@ -982,6 +979,14 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
goto out_release_mem_region;
}
+ info-gpmc_irq_fifo = platform_get_irq(pdev, 0);
+ if (info-gpmc_irq_fifo == -ENXIO)
+ dev_warn(pdev-dev, error getting FIFO IRQ\n);
+
+ info-gpmc_irq_count = platform_get_irq(pdev, 1);
+ if (info-gpmc_irq_fifo == -ENXIO)
+ dev_warn(pdev-dev, error getting TERMINALCOUNT IRQ\n);
+
info-nand.controller = info-controller;
info-nand.IO_ADDR_W = info-nand.IO_ADDR_R;
@@ -1037,17 +1042,24 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
break;
case NAND_OMAP_PREFETCH_IRQ:
- err = request_irq(pdata-gpmc_irq,
- omap_nand_irq, IRQF_SHARED, gpmc-nand, info);
+ err = request_irq(info-gpmc_irq_fifo, omap_nand_irq,
+ IRQF_SHARED, gpmc-nand-fifo, info);
if (err) {
dev_err(pdev-dev, requesting irq(%d) error:%d,
- pdata-gpmc_irq, err);
+ info-gpmc_irq_fifo, err);
goto out_release_mem_region;
- } else {
- info-gpmc_irq = pdata-gpmc_irq;
- info-nand.read_buf = omap_read_buf_irq_pref;
- info-nand.write_buf =
[PATCH 17/39] mtd: nand: omap2: handle nand on gpmc
GPMC driver has been modified to fill NAND platform data with GPMC
NAND register details. As these registers are accessible in NAND
driver itself, configure NAND in GPMC by itself.
Note: Verfying that other CS have not yet enabled for prefetch ecc
has to be incorporated. Currently this causes no issues as there are
no boards that use NAND on multiple CS. With GPMC modifications,
perhaps it would be better to consider NAND connected on multiple CS
as a single peripheral using multiple CS. This would make handling
multiple CS issues easier.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/mtd/nand/omap2.c | 209 --
1 file changed, 165 insertions(+), 44 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 440536b..34fb726 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -129,8 +129,79 @@ struct omap_nand_info {
} iomode;
u_char *buf;
int buf_len;
+ struct gpmc_nand_regs reg;
};
+#definePREFETCH_CONFIG1_CS_SHIFT 24
+#defineECC_CONFIG_CS_SHIFT 1
+#defineCS_MASK 0x7
+#defineENABLE_PREFETCH (0x1 7)
+#defineDMA_MPU_MODE_SHIFT 2
+#defineECCSIZE1_SHIFT 22
+#defineECC1RESULTSIZE 0x1
+#defineECC_CLEAR_SHIFT 8
+#defineECC10x1
+
+/**
+ * omap_prefetch_enable - configures and starts prefetch transfer
+ * @cs: cs (chip select) number
+ * @fifo_th: fifo threshold to be used for read/ write
+ * @dma_mode: dma mode enable (1) or disable (0)
+ * @u32_count: number of bytes to be transferred
+ * @is_write: prefetch read(0) or write post(1) mode
+ */
+static int omap_prefetch_enable(int cs, int fifo_th, int dma_mode,
+ unsigned int u32_count, int is_write, struct omap_nand_info *info)
+{
+ u32 val;
+
+ if (fifo_th PREFETCH_FIFOTHRESHOLD_MAX) {
+ pr_err(gpmc: fifo threshold is not supported\n);
+ return -1;
+ } else if (!(readl(info-reg.gpmc_prefetch_control))) {
+ /* Set the amount of bytes to be prefetched */
+ writel(u32_count, info-reg.gpmc_prefetch_config2);
+
+ /* Set dma/mpu mode, the prefetch read / post write and
+* enable the engine. Set which cs is has requested for.
+*/
+ val = ((cs PREFETCH_CONFIG1_CS_SHIFT) |
+ PREFETCH_FIFOTHRESHOLD(fifo_th) |
+ ENABLE_PREFETCH |
+ (dma_mode DMA_MPU_MODE_SHIFT) |
+ (0x1 is_write));
+ writel(val, info-reg.gpmc_prefetch_config1);
+
+ /* Start the prefetch engine */
+ writel(0x1, info-reg.gpmc_prefetch_control);
+ } else {
+ return -EBUSY;
+ }
+
+ return 0;
+}
+
+/**
+ * omap_prefetch_reset - disables and stops the prefetch engine
+ */
+static int omap_prefetch_reset(int cs, struct omap_nand_info *info)
+{
+ u32 config1;
+
+ /* check if the same module/cs is trying to reset */
+ config1 = readl(info-reg.gpmc_prefetch_config1);
+ if (((config1 PREFETCH_CONFIG1_CS_SHIFT) CS_MASK) != cs)
+ return -EINVAL;
+
+ /* Stop the PFPW engine */
+ writel(0x0, info-reg.gpmc_prefetch_control);
+
+ /* Reset/disable the PFPW engine */
+ writel(0x0, info-reg.gpmc_prefetch_config1);
+
+ return 0;
+}
+
/**
* omap_hwcontrol - hardware specific access to control-lines
* @mtd: MTD device structure
@@ -149,13 +220,13 @@ static void omap_hwcontrol(struct mtd_info *mtd, int cmd,
unsigned int ctrl)
if (cmd != NAND_CMD_NONE) {
if (ctrl NAND_CLE)
- gpmc_nand_write(info-gpmc_cs, GPMC_NAND_COMMAND, cmd);
+ writeb(cmd, info-reg.gpmc_nand_command);
else if (ctrl NAND_ALE)
- gpmc_nand_write(info-gpmc_cs, GPMC_NAND_ADDRESS, cmd);
+ writeb(cmd, info-reg.gpmc_nand_address);
else /* NAND_NCE */
- gpmc_nand_write(info-gpmc_cs, GPMC_NAND_DATA, cmd);
+ writeb(cmd, info-reg.gpmc_nand_data);
}
}
@@ -189,7 +260,8 @@ static void omap_write_buf8(struct mtd_info *mtd, const
u_char *buf, int len)
iowrite8(*p++, info-nand.IO_ADDR_W);
/* wait until buffer is available for write */
do {
- status = gpmc_read_status(GPMC_STATUS_BUFFER);
+ status = readl(info-reg.gpmc_status)
+ GPMC_STATUS_BUFF_EMPTY;
} while (!status);
[PATCH 18/39] mtd: onenand: omap: obtain memory from resource
gpmc being converted to driver, provides drivers of peripheral
connected memory space used by the peripheral as memory resource.
Modify nand omap driver to obtain memory detials from resource
structure. And so remove usage of gpmc exported symbols.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/mtd/onenand/omap2.c | 29 -
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 398a827..3ff893d 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -48,13 +48,13 @@
#define DRIVER_NAME omap2-onenand
-#define ONENAND_IO_SIZESZ_128K
#define ONENAND_BUFRAM_SIZE(1024 * 5)
struct omap2_onenand {
struct platform_device *pdev;
int gpmc_cs;
unsigned long phys_base;
+ unsigned int mem_size;
int gpio_irq;
struct mtd_info mtd;
struct onenand_chip onenand;
@@ -626,6 +626,7 @@ static int __devinit omap2_onenand_probe(struct
platform_device *pdev)
struct omap2_onenand *c;
struct onenand_chip *this;
int r;
+ struct resource *res;
pdata = pdev-dev.platform_data;
if (pdata == NULL) {
@@ -647,20 +648,24 @@ static int __devinit omap2_onenand_probe(struct
platform_device *pdev)
c-gpio_irq = 0;
}
- r = gpmc_cs_request(c-gpmc_cs, ONENAND_IO_SIZE, c-phys_base);
- if (r 0) {
- dev_err(pdev-dev, Cannot request GPMC CS\n);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res == NULL) {
+ r = -EINVAL;
+ dev_err(pdev-dev, error getting memory resource\n);
goto err_kfree;
}
- if (request_mem_region(c-phys_base, ONENAND_IO_SIZE,
+ c-phys_base = res-start;
+ c-mem_size = resource_size(res);
+
+ if (request_mem_region(c-phys_base, c-mem_size,
pdev-dev.driver-name) == NULL) {
- dev_err(pdev-dev, Cannot reserve memory region at 0x%08lx,
- size: 0x%x\n, c-phys_base, ONENAND_IO_SIZE);
+ dev_err(pdev-dev, Cannot reserve memory region at 0x%08lx,
size: 0x%x\n,
+ c-phys_base, c-mem_size);
r = -EBUSY;
- goto err_free_cs;
+ goto err_kfree;
}
- c-onenand.base = ioremap(c-phys_base, ONENAND_IO_SIZE);
+ c-onenand.base = ioremap(c-phys_base, c-mem_size);
if (c-onenand.base == NULL) {
r = -ENOMEM;
goto err_release_mem_region;
@@ -776,9 +781,7 @@ err_release_gpio:
err_iounmap:
iounmap(c-onenand.base);
err_release_mem_region:
- release_mem_region(c-phys_base, ONENAND_IO_SIZE);
-err_free_cs:
- gpmc_cs_free(c-gpmc_cs);
+ release_mem_region(c-phys_base, c-mem_size);
err_kfree:
kfree(c);
@@ -800,7 +803,7 @@ static int __devexit omap2_onenand_remove(struct
platform_device *pdev)
gpio_free(c-gpio_irq);
}
iounmap(c-onenand.base);
- release_mem_region(c-phys_base, ONENAND_IO_SIZE);
+ release_mem_region(c-phys_base, c-mem_size);
gpmc_cs_free(c-gpmc_cs);
kfree(c);
--
1.7.10
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[PATCH 19/39] ARM: OMAP2+: board omap3evm: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index fd1b481..b00765e 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -43,6 +43,7 @@
#include plat/board.h
#include plat/usb.h
+#include plat/gpmc.h
#include common.h
#include plat/mcspi.h
#include video/omapdss.h
@@ -102,6 +103,12 @@ static void __init omap3_evm_get_revision(void)
}
}
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
#include plat/gpmc-smsc911x.h
@@ -122,7 +129,11 @@ static inline void __init omap3evm_init_smsc911x(void)
smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
}
- gpmc_smsc911x_init(smsc911x_cfg);
+ *gpmc_device_data = gpmc_smsc911x_init(smsc911x_cfg);
+ if (*gpmc_device_data)
+ gpmc_data.num_device++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
@@ -679,6 +690,7 @@ static void __init omap3_evm_init(void)
usbhs_init(usbhs_bdata);
omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
omap3evm_init_smsc911x();
+ omap_init_gpmc(gpmc_data);
omap3_evm_display_init();
omap3_evm_wl12xx_init();
}
--
1.7.10
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[PATCH 20/39] ARM: OMAP2+: board omap3beagle: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 671ac1c..74bc7f6 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -517,8 +517,16 @@ static void __init beagle_opp_init(void)
return;
}
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static void __init omap3_beagle_init(void)
{
+ struct omap_nand_platform_data *nand_data;
+
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap3_beagle_init_rev();
@@ -543,9 +551,17 @@ static void __init omap3_beagle_init(void)
usb_musb_init(NULL);
usbhs_init(usbhs_bdata);
- board_nand_init(omap3beagle_nand_partitions,
+ nand_data = board_nand_init(omap3beagle_nand_partitions,
ARRAY_SIZE(omap3beagle_nand_partitions), GPMC_CS_NUM,
NAND_BUSWIDTH_16, NULL);
+ if (nand_data != NULL) {
+ *gpmc_device_data = gpmc_nand_init(nand_data);
+ if (*gpmc_device_data)
+ gpmc_data.num_device++;
+ } else
+ pr_err(error: %s: nand init\n, __func__);
+
+ omap_init_gpmc(gpmc_data);
/* Ensure msecure is mux'd to be able to set the RTC. */
omap_mux_init_signal(sys_drm_msecure, OMAP_PIN_OFF_OUTPUT_HIGH);
--
1.7.10
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[PATCH 21/39] ARM: OMAP2+: board apollon: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board code to
provide gpmc driver with required information. It is believed that
apollon board was added before gpmc-smc91x helper functions were
added. Reuse the now available gpmc_smc91x_init adapted for gpmc
driver.
Note: Timing values were hardcoded and written onto registers,
whether making use of gpmc_smc91x_init would configure timing
properly has to be tested.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-apollon.c | 152 +--
1 file changed, 38 insertions(+), 114 deletions(-)
diff --git a/arch/arm/mach-omap2/board-apollon.c
b/arch/arm/mach-omap2/board-apollon.c
index 768ece2..6a402e1 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -39,6 +39,7 @@
#include plat/board.h
#include common.h
#include plat/gpmc.h
+#include plat/gpmc-smc91x.h
#include video/omapdss.h
#include video/omap-panel-generic-dpi.h
@@ -58,6 +59,12 @@
#define APOLLON_ETH_CS 1
#define APOLLON_ETHR_GPIO_IRQ 74
+static struct gpmc_device_pdata *gpmc_device_data[2];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct mtd_partition apollon_partitions[] = {
{
.name = X-Loader + U-Boot,
@@ -97,57 +104,26 @@ static struct onenand_platform_data apollon_flash_data = {
.nr_parts = ARRAY_SIZE(apollon_partitions),
};
-static struct resource apollon_flash_resource[] = {
- [0] = {
- .flags = IORESOURCE_MEM,
- },
+static struct gpmc_cs_data apollon_gpmc_onenand_cs_data = {
+ .cs = APOLLON_FLASH_CS,
+ .mem_size = SZ_128K,
};
-static struct platform_device apollon_onenand_device = {
+static struct gpmc_device_pdata apollon_gpmc_onenand_data = {
.name = onenand-flash,
.id = -1,
- .dev= {
- .platform_data = apollon_flash_data,
- },
- .num_resources = ARRAY_SIZE(apollon_flash_resource),
- .resource = apollon_flash_resource,
-};
-
-static void __init apollon_flash_init(void)
-{
- unsigned long base;
-
- if (gpmc_cs_request(APOLLON_FLASH_CS, SZ_128K, base) 0) {
- printk(KERN_ERR Cannot request OneNAND GPMC CS\n);
- return;
- }
- apollon_flash_resource[0].start = base;
- apollon_flash_resource[0].end = base + SZ_128K - 1;
-}
-
-static struct smc91x_platdata appolon_smc91x_info = {
- .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
- .leda = RPC_LED_100_10,
- .ledb = RPC_LED_TX_RX,
+ .pdata = apollon_flash_data,
+ .pdata_size = sizeof(apollon_flash_data),
+ .cs_data= apollon_gpmc_onenand_cs_data,
+ .num_cs = 1,
};
-static struct resource apollon_smc91x_resources[] = {
- [0] = {
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
- },
-};
-
-static struct platform_device apollon_smc91x_device = {
- .name = smc91x,
- .id = -1,
- .dev= {
- .platform_data = appolon_smc91x_info,
- },
- .num_resources = ARRAY_SIZE(apollon_smc91x_resources),
- .resource = apollon_smc91x_resources,
+static struct omap_smc91x_platform_data apollon_smc91x_data = {
+ .gpio_irq = APOLLON_ETHR_GPIO_IRQ,
+ .cs = APOLLON_ETH_CS,
+ .wait_pin = GPMC_WAITPIN_1,
+ .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHEDGE |
+ GPMC_MUXADDDATA,
};
static struct omap_led_config apollon_led_config[] = {
@@ -185,74 +161,9 @@ static struct platform_device apollon_led_device = {
};
static struct platform_device *apollon_devices[] __initdata = {
- apollon_onenand_device,
- apollon_smc91x_device,
apollon_led_device,
};
-static inline void __init apollon_init_smc91x(void)
-{
- unsigned long base;
-
- unsigned int rate;
- struct clk *gpmc_fck;
- int eth_cs;
- int err;
-
- gpmc_fck = clk_get(NULL, gpmc_fck); /* Always on ENABLE_ON_INIT */
- if (IS_ERR(gpmc_fck)) {
- WARN_ON(1);
- return;
- }
-
- clk_enable(gpmc_fck);
- rate = clk_get_rate(gpmc_fck);
-
- eth_cs = APOLLON_ETH_CS;
-
- /* Make sure CS1 timings are correct */
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200);
-
- if (rate = 16000) {
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
- gpmc_cs_write_reg(eth_cs,
[PATCH 22/39] ARM: OMAP2+: board h4: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Remove unused h4_init_debug too.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-h4.c | 130 +---
1 file changed, 15 insertions(+), 115 deletions(-)
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 0bbbabe..7926082 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -186,22 +186,24 @@ static struct physmap_flash_data h4_flash_data = {
.nr_parts = ARRAY_SIZE(h4_partitions),
};
-static struct resource h4_flash_resource = {
- .flags = IORESOURCE_MEM,
+static struct gpmc_cs_data h4_gpmc_cs_flash_data = {
+ .cs = H4_FLASH_CS,
+ .mem_size = SZ_64M,
};
-static struct platform_device h4_flash_device = {
+static struct gpmc_device_pdata h4_gpmc_flash_data = {
.name = physmap-flash,
.id = 0,
- .dev= {
- .platform_data = h4_flash_data,
- },
- .num_resources = 1,
- .resource = h4_flash_resource,
+ .pdata = h4_flash_data,
+ .pdata_size = sizeof(h4_flash_data),
+ .cs_data= h4_gpmc_cs_flash_data,
+ .num_cs = 1,
};
-static struct platform_device *h4_devices[] __initdata = {
- h4_flash_device,
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
};
static struct panel_generic_dpi_data h4_panel_data = {
@@ -226,109 +228,6 @@ static struct omap_dss_board_info h4_dss_data = {
.default_device = h4_lcd_device,
};
-/* 2420 Sysboot setup (2430 is different) */
-static u32 get_sysboot_value(void)
-{
- return (omap_ctrl_readl(OMAP24XX_CONTROL_STATUS)
- (OMAP2_SYSBOOT_5_MASK | OMAP2_SYSBOOT_4_MASK |
-OMAP2_SYSBOOT_3_MASK | OMAP2_SYSBOOT_2_MASK |
-OMAP2_SYSBOOT_1_MASK | OMAP2_SYSBOOT_0_MASK));
-}
-
-/* H4-2420's always used muxed mode, H4-2422's always use non-muxed
- *
- * Note: OMAP-GIT doesn't correctly do is_cpu_omap2422 and is_cpu_omap2423
- * correctly. The macro needs to look at production_id not just hawkeye.
- */
-static u32 is_gpmc_muxed(void)
-{
- u32 mux;
- mux = get_sysboot_value();
- if ((mux 0xF) == 0xd)
- return 1; /* NAND config (could be either) */
- if (mux 0x2) /* if mux'ed */
- return 1;
- else
- return 0;
-}
-
-static inline void __init h4_init_debug(void)
-{
- int eth_cs;
- unsigned long cs_mem_base;
- unsigned int muxed, rate;
- struct clk *gpmc_fck;
-
- eth_cs = H4_SMC91X_CS;
-
- gpmc_fck = clk_get(NULL, gpmc_fck); /* Always on ENABLE_ON_INIT */
- if (IS_ERR(gpmc_fck)) {
- WARN_ON(1);
- return;
- }
-
- clk_enable(gpmc_fck);
- rate = clk_get_rate(gpmc_fck);
- clk_disable(gpmc_fck);
- clk_put(gpmc_fck);
-
- if (is_gpmc_muxed())
- muxed = 0x200;
- else
- muxed = 0;
-
- /* Make sure CS1 timings are correct */
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1,
- 0x00011000 | muxed);
-
- if (rate = 16000) {
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x04C4);
- } else if (rate = 13000) {
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x04C4);
- } else {/* rate = 1 */
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x03C2);
- }
-
- if (gpmc_cs_request(eth_cs, SZ_16M, cs_mem_base) 0) {
- printk(KERN_ERR Failed to request GPMC mem for smc91x\n);
- goto out;
- }
-
- udelay(100);
-
- omap_mux_init_gpio(92, 0);
- if (debug_card_init(cs_mem_base, H4_ETHR_GPIO_IRQ) 0)
- gpmc_cs_free(eth_cs);
-
-out:
- clk_disable(gpmc_fck);
-
[PATCH 23/39] ARM: OMAP2+: board 3630sdp: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-3630sdp.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3630sdp.c
b/arch/arm/mach-omap2/board-3630sdp.c
index 143e47f..4e0298a 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -27,18 +27,29 @@
#include mux.h
#include sdram-hynix-h8mbx00u0mer-0em.h
+static struct gpmc_device_pdata *gpmc_device_data[4];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
static struct omap_smc91x_platform_data board_smc91x_data = {
.cs = 3,
.flags = GPMC_MUX_ADD_DATA | IORESOURCE_IRQ_LOWLEVEL,
.skip_timing= true,
+ .gpio_irq = 158,
};
static void __init board_smc91x_init(void)
{
- board_smc91x_data.gpio_irq = 158;
- gpmc_smc91x_init(board_smc91x_data);
+ *gpmc_cur = gpmc_smc91x_init(board_smc91x_data);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
@@ -204,9 +215,13 @@ static void __init omap_sdp_init(void)
omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
h8mbx00u0mer0em_sdrc_params);
zoom_display_init();
+
board_smc91x_init();
- board_flash_init(sdp_flash_partitions, chip_sel_sdp,
- NAND_BUSWIDTH_16, NULL);
+ gpmc_data.num_device += board_flash_init(sdp_flash_partitions,
+ chip_sel_sdp, NAND_BUSWIDTH_16,
+ gpmc_cur) - gpmc_cur;
+ omap_init_gpmc(gpmc_data);
+
enable_board_wakeup_source();
usbhs_init(usbhs_bdata);
}
--
1.7.10
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[PATCH 24/39] ARM: OMAP2+: board 3430sdp: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-3430sdp.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index 367a466..cea5ca5 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -59,6 +59,12 @@
#define TWL4030_MSECURE_GPIO 22
+static struct gpmc_device_pdata *gpmc_device_data[4];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
static uint32_t board_keymap[] = {
KEY(0, 0, KEY_LEFT),
KEY(0, 1, KEY_RIGHT),
@@ -444,7 +450,11 @@ static void __init board_smc91x_init(void)
else
board_smc91x_data.gpio_irq = 29;
- gpmc_smc91x_init(board_smc91x_data);
+ *gpmc_cur = gpmc_smc91x_init(board_smc91x_data);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
@@ -621,7 +631,10 @@ static void __init omap_3430sdp_init(void)
omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
usb_musb_init(NULL);
board_smc91x_init();
- board_flash_init(sdp_flash_partitions, chip_sel_3430, 0, NULL);
+ gpmc_data.num_device += board_flash_init(sdp_flash_partitions,
+ chip_sel_3430, 0, gpmc_cur) - gpmc_cur;
+ omap_init_gpmc(gpmc_data);
+
sdp3430_display_init();
enable_board_wakeup_source();
usbhs_init(usbhs_bdata);
--
1.7.10
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[PATCH 25/39] ARM: OMAP2+: board 2430sdp: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-2430sdp.c | 42 +--
1 file changed, 25 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c
b/arch/arm/mach-omap2/board-2430sdp.c
index 68679a8..d94ada4 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -46,9 +46,16 @@
#include hsmmc.h
#include common-board-devices.h
-#define SDP2430_CS0_BASE 0x0400
+#define SDP2430_FLASH_CS 0
#define SECONDARY_LCD_GPIO 147
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct mtd_partition sdp2430_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
{
@@ -86,24 +93,18 @@ static struct physmap_flash_data sdp2430_flash_data = {
.nr_parts = ARRAY_SIZE(sdp2430_partitions),
};
-static struct resource sdp2430_flash_resource = {
- .start = SDP2430_CS0_BASE,
- .end= SDP2430_CS0_BASE + SZ_64M - 1,
- .flags = IORESOURCE_MEM,
+static struct gpmc_cs_data sdp2430_gpmc_cs_flash_data = {
+ .cs = SDP2430_FLASH_CS,
+ .mem_size = SZ_64M,
};
-static struct platform_device sdp2430_flash_device = {
+static struct gpmc_device_pdata sdp2430_gpmc_flash_device = {
.name = physmap-flash,
.id = 0,
- .dev = {
- .platform_data = sdp2430_flash_data,
- },
- .num_resources = 1,
- .resource = sdp2430_flash_resource,
-};
-
-static struct platform_device *sdp2430_devices[] __initdata = {
- sdp2430_flash_device,
+ .pdata = sdp2430_flash_data,
+ .pdata_size = sizeof(sdp2430_flash_data),
+ .cs_data= sdp2430_gpmc_cs_flash_data,
+ .num_cs = 1,
};
/* LCD */
@@ -181,7 +182,11 @@ static struct omap_smc91x_platform_data board_smc91x_data
= {
static void __init board_smc91x_init(void)
{
omap_mux_init_gpio(149, OMAP_PIN_INPUT);
- gpmc_smc91x_init(board_smc91x_data);
+ *gpmc_cur = gpmc_smc91x_init(board_smc91x_data);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
@@ -276,7 +281,9 @@ static void __init omap_2430sdp_init(void)
omap2430_i2c_init();
- platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
+ *gpmc_cur++ = sdp2430_gpmc_flash_device;
+ gpmc_data.num_device++;
+
omap_serial_init();
omap_sdrc_init(NULL, NULL);
omap_hsmmc_init(mmc);
@@ -286,6 +293,7 @@ static void __init omap_2430sdp_init(void)
usb_musb_init(NULL);
board_smc91x_init();
+ omap_init_gpmc(gpmc_data);
/* Turn off secondary LCD backlight */
gpio_request_one(SECONDARY_LCD_GPIO, GPIOF_OUT_INIT_LOW,
--
1.7.10
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[PATCH 26/39] ARM: OMAP2+: board cm-t3517: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-cm-t3517.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c
b/arch/arm/mach-omap2/board-cm-t3517.c
index 9e66e16..6aa6b4a 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -234,6 +234,11 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
},
};
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
static struct omap_nand_platform_data cm_t3517_nand_data = {
.parts = cm_t3517_nand_partitions,
.nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions),
@@ -242,8 +247,8 @@ static struct omap_nand_platform_data cm_t3517_nand_data = {
static void __init cm_t3517_init_nand(void)
{
- if (gpmc_nand_init(cm_t3517_nand_data) 0)
- pr_err(CM-T3517: NAND initialization failed\n);
+ *gpmc_device_data = gpmc_nand_init(cm_t3517_nand_data);
+ gpmc_data.num_device++;
}
#else
static inline void cm_t3517_init_nand(void) {}
@@ -289,6 +294,7 @@ static void __init cm_t3517_init(void)
omap_board_config_size = ARRAY_SIZE(cm_t3517_config);
cm_t3517_init_leds();
cm_t3517_init_nand();
+ omap_init_gpmc(gpmc_data);
cm_t3517_init_rtc();
cm_t3517_init_usbh();
cm_t3517_init_hecc();
--
1.7.10
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[PATCH 27/39] ARM: OMAP2+: board cm-t35: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-cm-t35.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-cm-t35.c
b/arch/arm/mach-omap2/board-cm-t35.c
index 909a8b9..5b0b637 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -66,6 +66,13 @@
#include linux/smsc911x.h
#include plat/gpmc-smsc911x.h
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
.id = 0,
.cs = CM_T35_SMSC911X_CS,
@@ -99,8 +106,17 @@ static void __init cm_t35_init_ethernet(void)
regulator_register_fixed(1, sb_t35_smsc911x_supplies,
ARRAY_SIZE(sb_t35_smsc911x_supplies));
- gpmc_smsc911x_init(cm_t35_smsc911x_cfg);
- gpmc_smsc911x_init(sb_t35_smsc911x_cfg);
+ *gpmc_cur = gpmc_smsc911x_init(cm_t35_smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: initilaizing gpmc smsc911x instance 1\n);
+
+ *gpmc_cur = gpmc_smsc911x_init(sb_t35_smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: initilaizing gpmc smsc911x instance 2\n);
}
#else
static inline void __init cm_t35_init_ethernet(void) { return; }
@@ -658,6 +674,7 @@ static void __init cm_t3x_common_init(void)
cm_t35_init_i2c();
omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
cm_t35_init_ethernet();
+ omap_init_gpmc(gpmc_data);
cm_t35_init_led();
cm_t35_init_display();
--
1.7.10
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[PATCH 28/39] ARM: OMAP2+: board ldp: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-ldp.c | 26 +++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index b76f28d..1ebc024 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -43,6 +43,7 @@
#include asm/delay.h
#include plat/usb.h
#include plat/gpmc-smsc911x.h
+#include plat/nand.h
#include video/omapdss.h
#include video/omap-panel-generic-dpi.h
@@ -58,6 +59,13 @@
#define DEBUG_BASE 0x0800
#define LDP_ETHR_START DEBUG_BASE
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static uint32_t board_keymap[] = {
KEY(0, 0, KEY_1),
KEY(1, 0, KEY_2),
@@ -180,7 +188,9 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
static inline void __init ldp_init_smsc911x(void)
{
- gpmc_smsc911x_init(smsc911x_cfg);
+ *gpmc_cur = gpmc_smsc911x_init(smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
}
/* LCD */
@@ -418,6 +428,8 @@ static struct regulator_consumer_supply dummy_supplies[] = {
static void __init omap_ldp_init(void)
{
+ struct omap_nand_platform_data *nand_data;
+
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
ldp_init_smsc911x();
@@ -427,8 +439,16 @@ static void __init omap_ldp_init(void)
omap_serial_init();
omap_sdrc_init(NULL, NULL);
usb_musb_init(NULL);
- board_nand_init(ldp_nand_partitions, ARRAY_SIZE(ldp_nand_partitions),
- ZOOM_NAND_CS, 0, nand_default_timings);
+
+ nand_data = board_nand_init(ldp_nand_partitions,
+ ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS,
+ 0, nand_default_timings);
+ if (nand_data != NULL) {
+ *gpmc_cur++ = gpmc_nand_init(nand_data);
+ gpmc_data.num_device++;
+ }
+
+ omap_init_gpmc(gpmc_data);
omap_hsmmc_init(mmc);
ldp_display_init();
--
1.7.10
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[PATCH 29/39] ARM: OMAP2+: board n8x0: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-n8x0.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 94f6077..d3d866a 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -36,6 +36,7 @@
#include plat/onenand.h
#include plat/mmc.h
#include plat/serial.h
+#include plat/gpmc.h
#include mux.h
@@ -45,6 +46,13 @@
#define TUSB6010_GPIO_ENABLE 0
#define TUSB6010_DMACHAN 0x3f
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_USB_MUSB_TUSB6010) ||
defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
/*
* Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
@@ -114,10 +122,12 @@ static void __init n8x0_usb_init(void)
}
tusb_set_power(0);
- ret = tusb6010_setup_interface(tusb_data, TUSB6010_REFCLK_19, 2,
+ *gpmc_cur = tusb6010_setup_interface(tusb_data, TUSB6010_REFCLK_19, 2,
TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
- if (ret != 0)
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
goto err;
printk(announce);
@@ -785,7 +795,9 @@ static void __init n8x0_init_machine(void)
ARRAY_SIZE(n810_i2c_board_info_2));
board_serial_init();
omap_sdrc_init(NULL, NULL);
- gpmc_onenand_init(board_onenand_data);
+ *gpmc_cur++ = gpmc_onenand_init(board_onenand_data);
+ gpmc_data.num_device++;
+ omap_init_gpmc(gpmc_data);
n8x0_mmc_init();
n8x0_usb_init();
}
--
1.7.10
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[PATCH 30/39] ARM: OMAP2+: board omap3logic: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap3logic.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-omap3logic.c
b/arch/arm/mach-omap2/board-omap3logic.c
index 9b3c141..9867fc8 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -55,6 +55,12 @@
#define OMAP3_TORPEDO_MMC_GPIO_CD 127
#define OMAP3_TORPEDO_SMSC911X_GPIO_IRQ129
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct regulator_consumer_supply omap3logic_vmmc1_supply[] = {
REGULATOR_SUPPLY(vmmc, omap_hsmmc.0),
};
@@ -180,7 +186,11 @@ static inline void __init board_smsc911x_init(void)
return;
}
- gpmc_smsc911x_init(board_smsc911x_data);
+ *gpmc_device_data = gpmc_smsc911x_init(board_smsc911x_data);
+ if (*gpmc_device_data)
+ gpmc_data.num_device++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#ifdef CONFIG_OMAP_MUX
@@ -204,6 +214,7 @@ static void __init omap3logic_init(void)
omap_sdrc_init(NULL, NULL);
board_mmc_init();
board_smsc911x_init();
+ omap_init_gpmc(gpmc_data);
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal(sdrc_cke0, OMAP_PIN_OUTPUT);
--
1.7.10
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[PATCH 31/39] ARM: OMAP2+: board omap3pandora: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap3pandora.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c
b/arch/arm/mach-omap2/board-omap3pandora.c
index 33d995d..25b2de6 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -57,6 +57,12 @@
#define PANDORA_WIFI_NRESET_GPIO 23
#define OMAP3_PANDORA_TS_GPIO 94
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct mtd_partition omap3pandora_nand_partitions[] = {
{
.name = xloader,
@@ -607,8 +613,9 @@ static void __init omap3pandora_init(void)
omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
usbhs_init(usbhs_bdata);
usb_musb_init(NULL);
- gpmc_nand_init(pandora_nand_data);
-
+ *gpmc_device_data = gpmc_nand_init(pandora_nand_data);
+ gpmc_data.num_device++;
+ omap_init_gpmc(gpmc_data);
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal(sdrc_cke0, OMAP_PIN_OUTPUT);
omap_mux_init_signal(sdrc_cke1, OMAP_PIN_OUTPUT);
--
1.7.10
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[PATCH 32/39] ARM: OMAP2+: board omap3stalker: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap3stalker.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c
b/arch/arm/mach-omap2/board-omap3stalker.c
index 4dffc95..5e92d54 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -56,6 +56,12 @@
#include hsmmc.h
#include common-board-devices.h
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
#include plat/gpmc-smsc911x.h
@@ -74,7 +80,11 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
static inline void __init omap3stalker_init_eth(void)
{
omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP);
- gpmc_smsc911x_init(smsc911x_cfg);
+ *gpmc_device_data = gpmc_smsc911x_init(smsc911x_cfg);
+ if (*gpmc_device_data)
+ gpmc_data.num_device++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
@@ -443,6 +453,7 @@ static void __init omap3_stalker_init(void)
omap_mux_init_gpio(18, OMAP_PIN_INPUT_PULLUP);
omap3stalker_init_eth();
+ omap_init_gpmc(gpmc_data);
omap3_stalker_display_init();
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal(sdr_cke0, OMAP_PIN_OUTPUT);
--
1.7.10
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[PATCH 33/39] ARM: OMAP2+: board omap4pcm049: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap4pcm049.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-omap4pcm049.c
b/arch/arm/mach-omap2/board-omap4pcm049.c
index 81de7d5..b4ead86 100644
--- a/arch/arm/mach-omap2/board-omap4pcm049.c
+++ b/arch/arm/mach-omap2/board-omap4pcm049.c
@@ -130,6 +130,12 @@ static struct omap2_hsmmc_info mmc[] = {
}, {} /* Terminator */
};
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY(vddvario, smsc911x.0),
@@ -147,7 +153,11 @@ static inline void __init pcm049_init_smsc911x(void)
{
omap_mux_init_gpio(OMAP4_PCM049_ETH_GPIO_IRQ, OMAP_PIN_INPUT);
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
- gpmc_smsc911x_init(board_smsc911x_data);
+ *gpmc_device_data = gpmc_smsc911x_init(board_smsc911x_data);
+ if (*gpmc_device_data)
+ gpmc_data.num_device++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
static inline void __init pcm049_init_smsc911x(void) { return; }
@@ -562,6 +572,7 @@ static void __init pcm049_init(void)
pm_power_off = pcm049_power_off;
omap4_mux_init(board_mux, NULL, OMAP_PACKAGE_CBS);
pcm049_init_smsc911x();
+ omap_init_gpmc(gpmc_data);
pcm049_i2c_init();
platform_add_devices(pcm049_devices, ARRAY_SIZE(pcm049_devices));
board_serial_init();
--
1.7.10
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[PATCH 34/39] ARM: OMAP2+: board overo: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-overo.c | 29 ++---
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/board-overo.c
b/arch/arm/mach-omap2/board-overo.c
index e08479a..fa0197e 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -72,6 +72,13 @@
#define OVERO_SMSC911X2_CS 4
#define OVERO_SMSC911X2_GPIO 65
+static struct gpmc_device_pdata *gpmc_device_data[3];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
@@ -137,8 +144,16 @@ static struct omap_smsc911x_platform_data smsc911x2_cfg = {
static void __init overo_init_smsc911x(void)
{
- gpmc_smsc911x_init(smsc911x_cfg);
- gpmc_smsc911x_init(smsc911x2_cfg);
+ *gpmc_cur = gpmc_smsc911x_init(smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: %s: smsc911x instance 1 setup\n, __func__);
+ *gpmc_cur = gpmc_smsc911x_init(smsc911x2_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: %s: smsc911x instance 1 setup\n, __func__);
}
#else
@@ -509,6 +524,7 @@ static struct regulator_consumer_supply dummy_supplies[] = {
static void __init overo_init(void)
{
int ret;
+ struct omap_nand_platform_data *nand_data;
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -518,12 +534,19 @@ static void __init overo_init(void)
omap_serial_init();
omap_sdrc_init(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
- board_nand_init(overo_nand_partitions,
+
+ nand_data = board_nand_init(overo_nand_partitions,
ARRAY_SIZE(overo_nand_partitions), GPMC_CS_NUM, 0, NULL);
+ if (nand_data != NULL) {
+ *gpmc_cur++ = gpmc_nand_init(nand_data);
+ gpmc_data.num_device++;
+ }
+
usb_musb_init(NULL);
usbhs_init(usbhs_bdata);
overo_spi_init();
overo_init_smsc911x();
+ omap_init_gpmc(gpmc_data);
overo_display_init();
overo_init_led();
overo_init_keys();
--
1.7.10
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[PATCH 35/39] ARM: OMAP2+: board rm680: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-rm680.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-rm680.c
b/arch/arm/mach-omap2/board-rm680.c
index ae53d71..e28e606 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -33,6 +33,12 @@
#include sdram-nokia.h
#include common-board-devices.h
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
REGULATOR_SUPPLY(vmmc, omap_hsmmc.1),
};
@@ -119,7 +125,8 @@ static void __init rm680_peripherals_init(void)
platform_add_devices(rm680_peripherals_devices,
ARRAY_SIZE(rm680_peripherals_devices));
rm680_i2c_init();
- gpmc_onenand_init(board_onenand_data);
+ *gpmc_device_data = gpmc_onenand_init(board_onenand_data);
+ gpmc_data.num_device++;
omap_hsmmc_init(mmc);
}
@@ -141,6 +148,7 @@ static void __init rm680_init(void)
usb_musb_init(NULL);
rm680_peripherals_init();
+ omap_init_gpmc(gpmc_data);
}
MACHINE_START(NOKIA_RM680, Nokia RM-680 board)
--
1.7.10
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[PATCH 36/39] ARM: OMAP2+: board rx51: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index ae957c9..af7909e 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -73,6 +73,13 @@ enum {
static struct wl12xx_platform_data wl1251_pdata;
static struct tsc2005_platform_data tsc2005_pdata;
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
.cover_comp_gain = 16,
@@ -1039,7 +1046,11 @@ static void __init board_smc91x_init(void)
omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
- gpmc_smc91x_init(board_smc91x_data);
+ *gpmc_cur = gpmc_smc91x_init(board_smc91x_data);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: gpmc smsc911x setup\n);
}
#else
@@ -1136,8 +1147,10 @@ void __init rx51_peripherals_init(void)
{
rx51_i2c_init();
regulator_has_full_constraints();
- gpmc_onenand_init(board_onenand_data);
+ *gpmc_cur++ = gpmc_onenand_init(board_onenand_data);
+ gpmc_data.num_device++;
board_smc91x_init();
+ omap_init_gpmc(gpmc_data);
rx51_add_gpio_keys();
rx51_init_wl1251();
rx51_init_tsc2005();
--
1.7.10
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[PATCH 37/39] ARM: OMAP2+: board zoom-debugboard: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-zoom-debugboard.c | 47 +++
1 file changed, 27 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c
b/arch/arm/mach-omap2/board-zoom-debugboard.c
index f64f441..dae7df2 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -31,6 +31,13 @@
#define DEBUG_BASE 0x0800
#define ZOOM_ETHR_STARTDEBUG_BASE
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct omap_smsc911x_platform_data zoom_smsc911x_cfg = {
.cs = ZOOM_SMSC911X_CS,
.gpio_irq = ZOOM_SMSC911X_GPIO,
@@ -40,7 +47,11 @@ static struct omap_smsc911x_platform_data zoom_smsc911x_cfg
= {
static inline void __init zoom_init_smsc911x(void)
{
- gpmc_smsc911x_init(zoom_smsc911x_cfg);
+ *gpmc_cur = gpmc_smsc911x_init(zoom_smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: %s: gpmc smsc911x setup\n, __func__);
}
static struct plat_serial8250_port serial_platform_data[] = {
@@ -56,18 +67,22 @@ static struct plat_serial8250_port serial_platform_data[] =
{
}
};
-static struct platform_device zoom_debugboard_serial_device = {
+static struct gpmc_cs_data zoom_debugboard_gpmc_cs_serial_data = {
+ .cs = ZOOM_QUADUART_CS,
+ .mem_size = SZ_1M,
+};
+
+static struct gpmc_device_pdata zoom_debugboard_gpmc_serial_data = {
.name = serial8250,
.id = PLAT8250_DEV_PLATFORM,
- .dev= {
- .platform_data = serial_platform_data,
- },
+ .pdata = serial_platform_data,
+ .pdata_size = sizeof(serial_platform_data),
+ .cs_data= zoom_debugboard_gpmc_cs_serial_data,
+ .num_cs = 1,
};
static inline void __init zoom_init_quaduart(void)
{
- int quart_cs;
- unsigned long cs_mem_base;
int quart_gpio = 0;
if (gpio_request_one(ZOOM_QUADUART_RST_GPIO,
@@ -78,14 +93,6 @@ static inline void __init zoom_init_quaduart(void)
return;
}
- quart_cs = ZOOM_QUADUART_CS;
-
- if (gpmc_cs_request(quart_cs, SZ_1M, cs_mem_base) 0) {
- printk(KERN_ERR Failed to request GPMC mem
- for Quad UART(TL16CP754C)\n);
- return;
- }
-
quart_gpio = ZOOM_QUADUART_GPIO;
if (gpio_request_one(quart_gpio, GPIOF_IN, TL16CP754C GPIO) 0)
@@ -93,6 +100,9 @@ static inline void __init zoom_init_quaduart(void)
quart_gpio);
serial_platform_data[0].irq = gpio_to_irq(102);
+
+ *gpmc_cur++ = zoom_debugboard_gpmc_serial_data;
+ gpmc_data.num_device++;
}
static inline int omap_zoom_debugboard_detect(void)
@@ -116,10 +126,6 @@ static inline int omap_zoom_debugboard_detect(void)
return ret;
}
-static struct platform_device *zoom_devices[] __initdata = {
- zoom_debugboard_serial_device,
-};
-
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY(vddvario, smsc911x.0),
REGULATOR_SUPPLY(vdd33a, smsc911x.0),
@@ -133,5 +139,6 @@ int __init zoom_debugboard_init(void)
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
zoom_init_smsc911x();
zoom_init_quaduart();
- return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices));
+ omap_init_gpmc(gpmc_data);
+ return 0;
}
--
1.7.10
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[PATCH 38/39] OMAP3: igep0020: Add support for Micron NAND Flash storage memory
From: Javier Martinez Canillas jav...@dowhile0.org
IGEP-based boards can have two different flash memories, a OneNAND or
a NAND device. The boot configuration pins (sys_boot) are used to
specify which memory is available.
Also, this patch removes unnecesary code for registering the OneNAND.
af...@ti.com: Update to use modified board_nand_init
Signed-off-by: Javier Martinez Canillas jav...@dowhile0.org
Signed-off-by: Afzal Mohammed af...@ti.com
fixup: igep
---
arch/arm/mach-omap2/board-igep0020.c | 75 ++
1 file changed, 31 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index 930c0d3..6d171ca 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -24,6 +24,8 @@
#include linux/i2c/twl.h
#include linux/mmc/host.h
+#include linux/mtd/nand.h
+
#include asm/mach-types.h
#include asm/mach/arch.h
@@ -39,6 +41,8 @@
#include hsmmc.h
#include sdram-numonyx-m65kam.h
#include common-board-devices.h
+#include board-flash.h
+#include control.h
#define IGEP2_SMSC911X_CS 5
#define IGEP2_SMSC911X_GPIO 176
@@ -60,6 +64,10 @@
#define IGEP3_GPIO_LED1_RED16
#define IGEP3_GPIO_USBH_NRESET 183
+#define IGEP_SYSBOOT_MASK 0x1f
+#define IGEP_SYSBOOT_NAND 0x0f
+#define IGEP_SYSBOOT_ONENAND0x10
+
/*
* IGEP2 Hardware Revision Table
*
@@ -110,8 +118,10 @@ static void __init igep2_get_revision(void)
gpio_free(IGEP2_GPIO_LED1_RED);
}
-#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
- defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
+ defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) || \
+ defined(CONFIG_MTD_NAND_OMAP2) || \
+ defined(CONFIG_MTD_NAND_OMAP2_MODULE)
#define ONENAND_MAP 0x2000
@@ -123,7 +133,7 @@ static void __init igep2_get_revision(void)
* So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048)
*/
-static struct mtd_partition igep_onenand_partitions[] = {
+static struct mtd_partition igep_flash_partitions[] = {
{
.name = X-Loader,
.offset = 0,
@@ -151,50 +161,27 @@ static struct mtd_partition igep_onenand_partitions[] = {
},
};
-static struct omap_onenand_platform_data igep_onenand_data = {
- .parts = igep_onenand_partitions,
- .nr_parts = ARRAY_SIZE(igep_onenand_partitions),
- .dma_channel= -1, /* disable DMA in OMAP OneNAND driver */
-};
-
-static struct platform_device igep_onenand_device = {
- .name = omap2-onenand,
- .id = -1,
- .dev = {
- .platform_data = igep_onenand_data,
- },
-};
+static inline u32 igep_get_sysboot_value(void)
+{
+ return omap_ctrl_readl(OMAP343X_CONTROL_STATUS) IGEP_SYSBOOT_MASK;
+}
static void __init igep_flash_init(void)
{
- u8 cs = 0;
- u8 onenandcs = GPMC_CS_NUM + 1;
-
- for (cs = 0; cs GPMC_CS_NUM; cs++) {
- u32 ret;
- ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
-
- /* Check if NAND/oneNAND is configured */
- if ((ret 0xC00) == 0x800)
- /* NAND found */
- pr_err(IGEP: Unsupported NAND found\n);
- else {
- ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
- if ((ret 0x3F) == (ONENAND_MAP 24))
- /* ONENAND found */
- onenandcs = cs;
- }
- }
-
- if (onenandcs GPMC_CS_NUM) {
- pr_err(IGEP: Unable to find configuration in GPMC\n);
- return;
- }
-
- igep_onenand_data.cs = onenandcs;
-
- if (platform_device_register(igep_onenand_device) 0)
- pr_err(IGEP: Unable to register OneNAND device\n);
+ u32 mux;
+ mux = igep_get_sysboot_value();
+
+ if (mux == IGEP_SYSBOOT_NAND) {
+ pr_info(IGEP: initializing NAND memory device\n);
+ board_nand_init(igep_flash_partitions,
+ ARRAY_SIZE(igep_flash_partitions),
+ 0, NAND_BUSWIDTH_16, NULL);
+ } else if (mux == IGEP_SYSBOOT_ONENAND) {
+ pr_info(IGEP: initializing OneNAND memory device\n);
+ board_onenand_init(igep_flash_partitions,
+ ARRAY_SIZE(igep_flash_partitions), 0);
+ } else
+ pr_err(IGEP: Flash: unsupported sysboot sequence found\n);
}
#else
--
1.7.10
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[PATCH 39/39] ARM: OMAP2+: board igep0020: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-igep0020.c | 32
1 file changed, 28 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index 6d171ca..91de8ce 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -36,6 +36,7 @@
#include video/omapdss.h
#include video/omap-panel-dvi.h
#include plat/onenand.h
+#include plat/nand.h
#include mux.h
#include hsmmc.h
@@ -118,6 +119,13 @@ static void __init igep2_get_revision(void)
gpio_free(IGEP2_GPIO_LED1_RED);
}
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) || \
defined(CONFIG_MTD_NAND_OMAP2) || \
@@ -172,14 +180,26 @@ static void __init igep_flash_init(void)
mux = igep_get_sysboot_value();
if (mux == IGEP_SYSBOOT_NAND) {
+ struct omap_nand_platform_data *nand_data;
+
pr_info(IGEP: initializing NAND memory device\n);
- board_nand_init(igep_flash_partitions,
+ nand_data = board_nand_init(igep_flash_partitions,
ARRAY_SIZE(igep_flash_partitions),
- 0, NAND_BUSWIDTH_16, NULL);
+ 0, NAND_BUSWIDTH_16, nand_default_timings);
+ if (nand_data != NULL) {
+ *gpmc_cur++ = gpmc_nand_init(nand_data);
+ gpmc_data.num_device++;
+ }
} else if (mux == IGEP_SYSBOOT_ONENAND) {
+ struct omap_onenand_platform_data *onenand_data;
+
pr_info(IGEP: initializing OneNAND memory device\n);
- board_onenand_init(igep_flash_partitions,
+ onenand_data = board_onenand_init(igep_flash_partitions,
ARRAY_SIZE(igep_flash_partitions), 0);
+ if (onenand_data != NULL) {
+ *gpmc_cur++ = gpmc_onenand_init(onenand_data);
+ gpmc_data.num_device++;
+ }
} else
pr_err(IGEP: Flash: unsupported sysboot sequence found\n);
}
@@ -202,7 +222,11 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
static inline void __init igep2_init_smsc911x(void)
{
- gpmc_smsc911x_init(smsc911x_cfg);
+ *gpmc_cur = gpmc_smsc911x_init(smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: gpmc smsc911x setup\n);
}
#else
--
1.7.10
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[PATCH v4 00/39] OMAP GPMC driver conversion
Hi, GPMC driver conversion patch series. Some peripherals has GPMC helper functions, these has been modified to cater to the needs of GPMC driver. All the boards using GPMC has been adapted to use the new GPMC driver. GPMC HWMOD entry for OMAP2/3 has been added. On OMAP3, kernel does spit omap_hwmod: gpmc: cannot be enabled for reset (3), but peripherals connected via GPMC are working. Really shaky about OMAP2 GPMC HWMOD entry. Would be helpful if someone can help me in resolving warning on OMAP3 verify whether OMAP2 entry is proper. The series adapts to HWMOD. Drivers, NAND OneNAND of OMAP has been modified to make use of GPMC changes cleaned up the now unnecessary exported symbol usages. This series has been made on top of, 5e136da Linux-omap rebuilt: Updated to -rc5, A patch by Javier Martinez Canillas jav...@dowhile0.org, OMAP3: igep0020: Add support for Micron NAND Flash storage memory, has also been incorporated into the series as this was necessary for igep0020 board. This has been tested on omap3 evm (SMSC911x) beagle board (NAND) I would need help to get these changes tested on other boards using GPMC. Expected problematic boards are those having OMAP2xxx SoCs, apollon board. In the case of apollon, in addition to it being OMAP2xxx, it was modified to use gpmc_smc91x_init instead of directly writing to configuration registers. Additional features that currently boards in mainline does not make use of like, waitpin interrupt handling, changes to leverage revision 6 IP differences has not been incorporated. GPMC driver now provides NAND driver with GPMC-NAND registers so that OMAP NAND driver can handle those by itself instead of using exported symbols. Acquiring CS for NAND has also been incorporated, it has been made as a separate patch as it is felt that this should probably go away, explained in the relevant patch. GPMC (General Purpose Memory Controller) in brief: GPMC is an unified memory controller dedicated to interfacing external memory devices like Asynchronous SRAM like memories and application specific integrated circuit devices. Asynchronous, synchronous, and page mode burst NOR flash devices NAND flash Pseudo-SRAM devices GPMC details can be referred in AM335X Technical Reference Manual @ http://www.ti.com/lit/pdf/spruh73 v4: Handle wait pin (except for interrupts), enhance configuration timing interface of GPMC to take care of all boards. Dynamic allocation of interrupt instead of static. Convert remaining peripherals to work with GPMC driver. Handle acquiring NAND CS#, adapt to HWMOD, update HWMOD OMAP2/3 entries, other minor commenst on v3. v3: Single device structure passed from platform for peripherals using multiple CS instead of using multiple device structure having a few redundant data, handle interrupts, GPMC NAND handling by GPMC NAND driver instead of GPMC driver v2: Avoid code movement that kept similar code together (for easy review) TODO: Cleanup Regards Afzal Afzal Mohammed (38): ARM: OMAP2+: gpmc: driver conversion ARM: OMAP2+: gpmc: Adapt to HWMOD ARM: OMAP2+: gpmc: register details for nand driver ARM: OMAP2+: gpmc: Acquire NAND CS value ARM: OMAP2+: nand: create platform data structure ARM: OMAP2+: onenand: return value in init function ARM: OMAP2+: gpmc-nand: Adapt to use gpmc driver ARM: OMAP2+: gpmc-onenand: Adapt to use gpmc driver ARM: OMAP2+: flash: Adapt to gpmc driver ARM: OMAP2+: gpmc-smsc911x: Adapt to use gpmc driver ARM: OMAP2+: gpmc-smc91x: Adapt to use gpmc driver ARM: OMAP2+: gpmc-tusb6010: Adapt to gpmc driver ARM: OMAP3: hwmod data: add gpmc ARM: OMAP2xxx: hwmod data: add gpmc mtd: nand: omap2: obtain memory from resource mtd: nand: omap2: use gpmc provided irqs mtd: nand: omap2: handle nand on gpmc mtd: onenand: omap: obtain memory from resource ARM: OMAP2+: board omap3evm: gpmc driver adaptation ARM: OMAP2+: board omap3beagle: gpmc driver adaptation ARM: OMAP2+: board apollon: gpmc driver adaptation ARM: OMAP2+: board h4: gpmc driver adaptation ARM: OMAP2+: board 3630sdp: gpmc driver adaptation ARM: OMAP2+: board 3430sdp: gpmc driver adaptation ARM: OMAP2+: board 2430sdp: gpmc driver adaptation ARM: OMAP2+: board cm-t3517: gpmc driver adaptation ARM: OMAP2+: board cm-t35: gpmc driver adaptation ARM: OMAP2+: board ldp: gpmc driver adaptation ARM: OMAP2+: board n8x0: gpmc driver adaptation ARM: OMAP2+: board omap3logic: gpmc driver adaptation ARM: OMAP2+: board omap3pandora: gpmc driver adaptation ARM: OMAP2+: board omap3stalker: gpmc driver adaptation ARM: OMAP2+: board omap4pcm049: gpmc driver adaptation ARM: OMAP2+: board overo: gpmc driver adaptation ARM: OMAP2+: board rm680: gpmc driver adaptation ARM: OMAP2+: board rx51: gpmc driver adaptation ARM: OMAP2+: board zoom-debugboard: gpmc driver adaptation ARM: OMAP2+: board igep0020: gpmc driver adaptation Javier Martinez Canillas (1): OMAP3: igep0020: Add support
[PATCH v4 02/39] ARM: OMAP2+: gpmc: Adapt to HWMOD
Create API for platforms to adapt gpmc to HWMOD
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 52 +++-
arch/arm/plat-omap/include/plat/gpmc.h |1 +
2 files changed, 38 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 12916f3..c8d07bb 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -33,6 +33,8 @@
#include plat/sdrc.h
+#include plat/omap_device.h
+
/* GPMC register offsets */
#define GPMC_REVISION 0x00
#define GPMC_SYSCONFIG 0x10
@@ -276,6 +278,31 @@ unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns)
return ticks * gpmc_get_fclk_period() / 1000;
}
+int __init omap_init_gpmc(struct gpmc_pdata *pdata)
+{
+ struct omap_hwmod *oh;
+ struct platform_device *pdev;
+ char *name = omap-gpmc;
+ char *oh_name = gpmc;
+
+ pdata-clk_prd = gpmc_get_fclk_period();
+
+ oh = omap_hwmod_lookup(oh_name);
+ if (!oh) {
+ pr_err(Could not look up %s\n, oh_name);
+ return -ENODEV;
+ }
+
+ pdev = omap_device_build(name, -1, oh, pdata,
+ sizeof(*pdata), NULL, 0, 0);
+ if (IS_ERR(pdev)) {
+ WARN(1, Can't build omap_device for %s:%s.\n,
+ name, oh-name);
+ return PTR_ERR(pdev);
+ }
+
+ return 0;
+}
#ifdef DEBUG
static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
int time, const char *name)
@@ -843,24 +870,19 @@ static __devinit void gpmc_mem_init(void)
static int __init gpmc_init(void)
{
- int ret = -EINVAL;
- char *ck = NULL;
-
- if (cpu_is_omap24xx()) {
- ck = core_l3_ck;
- } else if (cpu_is_omap34xx()) {
- ck = gpmc_fck;
- } else if (cpu_is_omap44xx()) {
- ck = gpmc_ck;
- }
+ char *oh_name = gpmc;
+ struct omap_hwmod *oh;
- if (WARN_ON(!ck))
- return ret;
+ oh = omap_hwmod_lookup(oh_name);
+ if (!oh) {
+ pr_err(Could not look up %s\n, oh_name);
+ return -ENODEV;
+ }
- gpmc_l3_clk = clk_get(NULL, ck);
+ gpmc_l3_clk = clk_get(NULL, oh-main_clk);
if (IS_ERR(gpmc_l3_clk)) {
- printk(KERN_ERR Could not get GPMC clock %s\n, ck);
- BUG();
+ pr_err(error: clk_get on %s\n, oh-main_clk);
+ return -EINVAL;
}
clk_enable(gpmc_l3_clk);
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h
b/arch/arm/plat-omap/include/plat/gpmc.h
index 2eedd99..c5cf020 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -217,6 +217,7 @@ struct gpmc_pdata {
};
extern int gpmc_cs_reconfigure(char *name, int id, struct gpmc_cs_data *cs);
+extern int omap_init_gpmc(struct gpmc_pdata *pdata);
extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns);
extern unsigned int gpmc_ps_to_ticks(unsigned int time_ps);
--
1.7.10
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[PATCH v4 03/39] ARM: OMAP2+: gpmc: register details for nand driver
If peripheral connected is NAND, update NAND drivers platform data
with NAND related register addresses so that NAND driver can handle
GPMC NAND operations by itself
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 25 +
arch/arm/plat-omap/include/plat/gpmc.h | 16
arch/arm/plat-omap/include/plat/nand.h |1 +
3 files changed, 42 insertions(+)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index c8d07bb..657ce95 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -30,6 +30,7 @@
#include asm/mach-types.h
#include plat/gpmc.h
+#include plat/nand.h
#include plat/sdrc.h
@@ -891,6 +892,28 @@ static int __init gpmc_init(void)
}
postcore_initcall(gpmc_init);
+static __devinit void gpmc_update_nand_reg(struct gpmc *gpmc,
+ struct omap_nand_platform_data *nand)
+{
+ int cs = nand-cs;
+
+ nand-reg.gpmc_status = gpmc-io_base + GPMC_STATUS;
+ nand-reg.gpmc_nand_command = gpmc-io_base + GPMC_CS0_OFFSET +
+ GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs;
+ nand-reg.gpmc_nand_address = gpmc-io_base + GPMC_CS0_OFFSET +
+ GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs;
+ nand-reg.gpmc_nand_data = gpmc-io_base + GPMC_CS0_OFFSET +
+ GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs;
+ nand-reg.gpmc_prefetch_config1 = gpmc-io_base + GPMC_PREFETCH_CONFIG1;
+ nand-reg.gpmc_prefetch_config2 = gpmc-io_base + GPMC_PREFETCH_CONFIG2;
+ nand-reg.gpmc_prefetch_control = gpmc-io_base + GPMC_PREFETCH_CONTROL;
+ nand-reg.gpmc_prefetch_status = gpmc-io_base + GPMC_PREFETCH_STATUS;
+ nand-reg.gpmc_ecc_config = gpmc-io_base + GPMC_ECC_CONFIG;
+ nand-reg.gpmc_ecc_control = gpmc-io_base + GPMC_ECC_CONTROL;
+ nand-reg.gpmc_ecc_size_config = gpmc-io_base + GPMC_ECC_SIZE_CONFIG;
+ nand-reg.gpmc_ecc1_result = gpmc-io_base + GPMC_ECC1_RESULT;
+}
+
static inline int gpmc_waitpin_is_reserved(struct gpmc *gpmc, unsigned waitpin)
{
return gpmc-waitpin_map (0x1 waitpin);
@@ -1427,6 +1450,8 @@ static __devinit int gpmc_probe(struct platform_device
*pdev)
for (i = 0, gdq = gp-device_pdata, gd = gpmc-device;
(i gp-num_device) (*gdq); i++, gdq++) {
+ if ((*gdq)-is_nand)
+ gpmc_update_nand_reg(gpmc, (*gdq)-pdata);
ret = gpmc_setup_device(gpmc, gd, *gdq);
if (IS_ERR_VALUE(ret))
dev_err(gpmc-dev, gpmc setup on %s failed\n,
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h
b/arch/arm/plat-omap/include/plat/gpmc.h
index c5cf020..976a8f0 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -207,6 +207,7 @@ struct gpmc_device_pdata {
unsignedper_res_cnt;
struct gpmc_cs_data *cs_data;
unsignednum_cs;
+ boolis_nand;
};
struct gpmc_pdata {
@@ -216,6 +217,21 @@ struct gpmc_pdata {
struct gpmc_device_pdata**device_pdata;
};
+struct gpmc_nand_regs {
+ void __iomem*gpmc_status;
+ void __iomem*gpmc_nand_command;
+ void __iomem*gpmc_nand_address;
+ void __iomem*gpmc_nand_data;
+ void __iomem*gpmc_prefetch_config1;
+ void __iomem*gpmc_prefetch_config2;
+ void __iomem*gpmc_prefetch_control;
+ void __iomem*gpmc_prefetch_status;
+ void __iomem*gpmc_ecc_config;
+ void __iomem*gpmc_ecc_control;
+ void __iomem*gpmc_ecc_size_config;
+ void __iomem*gpmc_ecc1_result;
+};
+
extern int gpmc_cs_reconfigure(char *name, int id, struct gpmc_cs_data *cs);
extern int omap_init_gpmc(struct gpmc_pdata *pdata);
diff --git a/arch/arm/plat-omap/include/plat/nand.h
b/arch/arm/plat-omap/include/plat/nand.h
index 67fc506..86e4d9c 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -29,6 +29,7 @@ struct omap_nand_platform_data {
unsigned long phys_base;
int devsize;
enum omap_ecc ecc_opt;
+ struct gpmc_nand_regs reg;
};
/* minimum size for IO mapping */
--
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[PATCH v4 01/39] ARM: OMAP2+: gpmc: driver conversion
Convert GPMC code to driver. Boards using GPMC should provide driver with type of configuration, timing, CS. Platform devices would then be created for each connected peripheral (details also to be passed by board so that it reaches respective driver). And GPMC driver would populate memory resource details for the connected peripheral driver. Boards should inform gpmc driver with platform data destined for peripheral driver. gpmc driver will provide the same information to peripheral driver. A peripheral connected to GPMC can have multiple address spaces using different chip select. Hence GPMC driver has been provided capability to create platform device for peripheral using mutiple CS. The peripheral that made it necessary was tusb6010. Interrupts of GPMC are presented to drivers of connected peripherals as resource. A fictitious interrupt controller chip handles these interrupts at GPMC hardware level. Clients can use normal interrupt APIs. Platform information of peripheral passed to GPMC driver should indicate interrupts to be used via flags. Driver is capable of configuring waitpin, waitpin details has to be provided per CS. Wait pin has been considered as exclusive resource as multiple peripherals should not using the same pin, at the same it is valid for mutiple CS to use same waitpin provided they are a part of single peripheral (eg. tusb6010) An exported symbol for reconfiguring GPMC settings has been provided. OneNAND is the one that neccessitated this. Acquiring CS# for NAND is done on a few boards. It means, depending on bootloader to embed this information. Probably CS# being used can be set in the Kernel, and acquiring it can be removed. If ever this capbility is needed, GPMC driver has to be made aware of handling it. Modifications has been made keeping in mind that the driver would have to move to driver folder. This explains requirement of clk_prd field; even though clk_prd variable is not necessary as gpmc_get_fclk_period is present in the same file as of now, this will help in moving the driver easily to drivers folder. Code related to GPMC clock may have to continue live in platform folders as input clock is beyond the control of GPMC and calculating timing for the peripheral may need other helpers. This explains presence of 'gpmc_cs_calc_divider' along with 'gpmc_calc_divider', both doing same work, latter meant to go with driver, former for calculation in platform code. Thanks to Vaibhav Hiremath Jonathan Hunter on their various good suggestions which resulted in improving the code. Cc: Vaibhav Hiremath hvaib...@ti.com Cc: Jon Hunter jon-hun...@ti.com Signed-off-by: Afzal Mohammed af...@ti.com --- arch/arm/mach-omap2/gpmc.c | 877 arch/arm/plat-omap/include/plat/gpmc.h | 93 +++- 2 files changed, 872 insertions(+), 98 deletions(-) diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 580e684..12916f3 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -14,8 +14,11 @@ */ #undef DEBUG +#include linux/platform_device.h + #include linux/irq.h #include linux/kernel.h +#include linux/slab.h #include linux/init.h #include linux/err.h #include linux/clk.h @@ -53,6 +56,45 @@ #define GPMC_CS0_OFFSET0x60 #define GPMC_CS_SIZE 0x30 +/* GPMC register bits */ +#defineGPMC_CONFIG1_TIMEPARAGRANULARITYBIT(4) +#defineGPMC_CONFIG1_DEVICETYPE_NAND GPMC_CONFIG1_DEVICETYPE(0x2) +#defineGPMC_CONFIG1_WAIT_PIN_SEL_MASK GPMC_CONFIG1_WAIT_PIN_SEL(0x3) +#defineGPMC_CONFIG1_WAIT_MON_TIME(val) ((val 0x3) 18) +#defineGPMC_CONFIG1_WRITEMULTIPLE BIT(28) +#defineGPMC_CONFIG1_READMULTIPLE BIT(30) +#defineGPMC_CONFIG1_WRAPBURST BIT(31) +#defineGPMC_CONFIG_WAITPIN_POLARITY_SHIFT 0x8 +#defineGPMC_CONFIG1_WAITPIN_MONITOR_TIME(val) ((val 0x3) 18) +#defineGPMC_CONFIG1_WAITPIN_MONITOR_TIME_1 \ + GPMC_CONFIG1_WAITPIN_MONITOR_TIME(0x1) +#defineGPMC_CONFIG1_WAITPIN_MONITOR_TIME_2 \ + GPMC_CONFIG1_WAITPIN_MONITOR_TIME(0x2) +#defineGPMC_CONFIG1_CLOCKACTIVATION_TIME(val) ((val 0x3) 25) +#defineGPMC_CONFIG1_CLOCKACTIVATION_TIME_1 \ + GPMC_CONFIG1_CLOCKACTIVATION_TIME(0x1) +#defineGPMC_CONFIG1_CLOCKACTIVATION_TIME_2 \ + GPMC_CONFIG1_CLOCKACTIVATION_TIME(0x2) + +#defineGPMC_CONFIG2_CSEXTRADELAY BIT(7) + +#defineGPMC_CONFIG3_ADVEXTRADELAY BIT(7) + +#defineGPMC_CONFIG4_OEEXTRADELAY BIT(7) +#defineGPMC_CONFIG4_WEEXTRADELAY BIT(23) + +#defineGPMC_CONFIG6_CYCLE2CYCLEDIFFCSENBIT(6) +#defineGPMC_CONFIG6_CYCLE2CYCLESAMECSENBIT(7) + +#define
[PATCH v4 04/39] ARM: OMAP2+: gpmc: Acquire NAND CS value
Some boards depend on bootloader to update chip select value for NAND.
It is felt that Kernel should not depend on bootloader to get CS, as
for a particular board CS is hardwired and is fixed, hence this can
directly be updated in Kernel. But as CS value for boards that depend
on this behaviour is not available, educate gpmc driver to acquire
chip select value for NAND. this ideally should be removed once CS
for those boards are available.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 657ce95..ecd3384 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -892,6 +892,30 @@ static int __init gpmc_init(void)
}
postcore_initcall(gpmc_init);
+static __devinit int gpmc_acquire_nand_cs(struct gpmc *gpmc,
+ struct gpmc_device_pdata *gdp)
+{
+ int cs = 0;
+ struct omap_nand_platform_data *nand = gdp-pdata;
+
+ if ((nand-cs = 0) (nand-cs GPMC_CS_NUM))
+ return 0;
+
+ while (cs GPMC_CS_NUM) {
+ u32 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
+
+ if ((l GPMC_CONFIG1_DEVICETYPE(~0)) ==
+ GPMC_CONFIG1_DEVICETYPE_NAND) {
+ dev_info(gpmc-dev, found NAND on CS: %d\n, cs);
+ nand-cs = cs;
+ gdp-cs_data-cs = cs;
+ return 0;
+ }
+ cs++;
+ }
+ return -ENODEV;
+}
+
static __devinit void gpmc_update_nand_reg(struct gpmc *gpmc,
struct omap_nand_platform_data *nand)
{
@@ -1450,8 +1474,14 @@ static __devinit int gpmc_probe(struct platform_device
*pdev)
for (i = 0, gdq = gp-device_pdata, gd = gpmc-device;
(i gp-num_device) (*gdq); i++, gdq++) {
- if ((*gdq)-is_nand)
+ if ((*gdq)-is_nand) {
+ ret = gpmc_acquire_nand_cs(gpmc, *gdq);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(gpmc-dev, CS error: %d\n, ret);
+ continue;
+ }
gpmc_update_nand_reg(gpmc, (*gdq)-pdata);
+ }
ret = gpmc_setup_device(gpmc, gd, *gdq);
if (IS_ERR_VALUE(ret))
dev_err(gpmc-dev, gpmc setup on %s failed\n,
--
1.7.10
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[PATCH v4 06/39] ARM: OMAP2+: onenand: return value in init function
Modify board_onenand_init to return platform data. This
would be required for boards to be able to pass it to
gpmc driver so that it finally reaches onenand driver.
Also un-static the function so that boards can use it.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-flash.c | 14 --
arch/arm/mach-omap2/board-flash.h | 12
2 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/board-flash.c
b/arch/arm/mach-omap2/board-flash.c
index 091aaf6..8727c05 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -87,22 +87,16 @@ static struct omap_onenand_platform_data board_onenand_data
= {
.dma_channel= -1, /* disable DMA in OMAP OneNAND driver */
};
-static void
-__init board_onenand_init(struct mtd_partition *onenand_parts,
- u8 nr_parts, u8 cs)
+struct omap_onenand_platform_data * __init
+board_onenand_init(struct mtd_partition *onenand_parts, u8 nr_parts, u8 cs)
{
board_onenand_data.cs = cs;
board_onenand_data.parts= onenand_parts;
board_onenand_data.nr_parts = nr_parts;
- gpmc_onenand_init(board_onenand_data);
-}
-#else
-static void
-__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
-{
+ return board_onenand_data;
}
-#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
+#endif
#if defined(CONFIG_MTD_NAND_OMAP2) || \
defined(CONFIG_MTD_NAND_OMAP2_MODULE)
diff --git a/arch/arm/mach-omap2/board-flash.h
b/arch/arm/mach-omap2/board-flash.h
index 052964c..75ba49f 100644
--- a/arch/arm/mach-omap2/board-flash.h
+++ b/arch/arm/mach-omap2/board-flash.h
@@ -52,3 +52,15 @@ board_nand_init(struct mtd_partition *nand_parts,
return NULL;
}
#endif
+
+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
+ defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
+extern struct omap_onenand_platform_data * __init
+board_onenand_init(struct mtd_partition *onenand_parts, u8 nr_parts, u8 cs);
+#else
+static inline struct omap_onenand_platform_data *
+__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
+{
+ return NULL;
+}
+#endif
--
1.7.10
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[PATCH v4 05/39] ARM: OMAP2+: nand: create platform data structure
New API for updating nand platform data. This has
been created by unifying the two existing ones and
taking out gpmc hardware handling.
From now on, platforms can call omap_nand_init to
initialize platform nand structures, it's fields.
Or can statically create the same.
Acquiring gpmc CS for has been removed. Acquiring CS
is done in GPMC driver. To leverage this feature,
pass CS # as any value outside the allowed range of
0 - 7 (this is valid only for connected NAND),
eg. GPMC_CS_NUM (8)
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-devkit8000.c |6 ++-
arch/arm/mach-omap2/board-flash.c | 61 ++--
arch/arm/mach-omap2/board-flash.h | 13 --
arch/arm/mach-omap2/board-ldp.c|4 +-
arch/arm/mach-omap2/board-omap3beagle.c|6 ++-
arch/arm/mach-omap2/board-omap3touchbook.c |6 ++-
arch/arm/mach-omap2/board-overo.c |5 ++-
arch/arm/mach-omap2/board-zoom.c |5 ++-
arch/arm/mach-omap2/common-board-devices.c | 46 -
arch/arm/mach-omap2/common-board-devices.h |1 -
10 files changed, 60 insertions(+), 93 deletions(-)
diff --git a/arch/arm/mach-omap2/board-devkit8000.c
b/arch/arm/mach-omap2/board-devkit8000.c
index a2010f0..aa352d1 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -59,6 +59,7 @@
#include mux.h
#include hsmmc.h
+#include board-flash.h
#include common-board-devices.h
#define OMAP_DM9000_GPIO_IRQ 25
@@ -648,8 +649,9 @@ static void __init devkit8000_init(void)
usb_musb_init(NULL);
usbhs_init(usbhs_bdata);
- omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
-ARRAY_SIZE(devkit8000_nand_partitions));
+ board_nand_init(devkit8000_nand_partitions,
+ ARRAY_SIZE(devkit8000_nand_partitions), GPMC_CS_NUM,
+ NAND_BUSWIDTH_16, NULL);
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal(sdrc_cke0, OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-flash.c
b/arch/arm/mach-omap2/board-flash.c
index 0349fd2..091aaf6 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -108,45 +108,45 @@ __init board_onenand_init(struct mtd_partition
*nor_parts, u8 nr_parts, u8 cs)
defined(CONFIG_MTD_NAND_OMAP2_MODULE)
/* Note that all values in this struct are in nanoseconds */
-static struct gpmc_timings nand_timings = {
+struct gpmc_timings nand_default_timings[1] = {
+ {
+ .sync_clk = 0,
- .sync_clk = 0,
+ .cs_on = 0,
+ .cs_rd_off = 36,
+ .cs_wr_off = 36,
- .cs_on = 0,
- .cs_rd_off = 36,
- .cs_wr_off = 36,
+ .adv_on = 6,
+ .adv_rd_off = 24,
+ .adv_wr_off = 36,
- .adv_on = 6,
- .adv_rd_off = 24,
- .adv_wr_off = 36,
+ .we_off = 30,
+ .oe_off = 48,
- .we_off = 30,
- .oe_off = 48,
+ .access = 54,
+ .rd_cycle = 72,
+ .wr_cycle = 72,
- .access = 54,
- .rd_cycle = 72,
- .wr_cycle = 72,
-
- .wr_access = 30,
- .wr_data_mux_bus = 0,
+ .wr_access = 30,
+ .wr_data_mux_bus = 0,
+ },
};
-static struct omap_nand_platform_data board_nand_data = {
- .gpmc_t = nand_timings,
+static struct omap_nand_platform_data omap_nand_data = {
+ .gpmc_t = nand_default_timings,
};
-void
-__init board_nand_init(struct mtd_partition *nand_parts,
- u8 nr_parts, u8 cs, int nand_type)
+struct omap_nand_platform_data *
+__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
+ int nand_type, struct gpmc_timings *gpmc_t)
{
- board_nand_data.cs = cs;
- board_nand_data.parts = nand_parts;
- board_nand_data.nr_parts= nr_parts;
- board_nand_data.devsize = nand_type;
-
- board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
- board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
- gpmc_nand_init(board_nand_data);
+ omap_nand_data.cs = cs;
+ omap_nand_data.parts= nand_parts;
+ omap_nand_data.nr_parts = nr_parts;
+ omap_nand_data.devsize = nand_type;
+ omap_nand_data.gpmc_t = gpmc_t;
+
+ return omap_nand_data;
}
#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
@@ -243,5 +243,6 @@ void __init board_flash_init(struct flash_partitions
partition_info[],
pr_err(NAND: Unable to find configuration in GPMC\n);
else
board_nand_init(partition_info[2].parts,
- partition_info[2].nr_parts, nandcs, nand_type);
+
[PATCH v4 07/39] ARM: OMAP2+: gpmc-nand: Adapt to use gpmc driver
Currently gpmc is configured in platform for nand.
As configuring gpmc has been moved to gpmc driver,
populate details needed for the driver to configure
gpmc. gpmc driver would configure based on this
information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc-nand.c| 84
arch/arm/plat-omap/include/plat/nand.h |8 +--
2 files changed, 35 insertions(+), 57 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 386dec8..190cdc1 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -21,24 +21,30 @@
#include plat/board.h
#include plat/gpmc.h
-static struct resource gpmc_nand_resource = {
- .flags = IORESOURCE_MEM,
+
+static struct gpmc_cs_data gpmc_nand_cs_info = {
+ .have_config= true,
+ .config = GPMC_DEVICETYPE_NAND,
+ .irq_config = GPMC_IRQ_FIFOEVENTENABLE | GPMC_IRQ_COUNT_EVENT,
};
-static struct platform_device gpmc_nand_device = {
+static struct gpmc_device_pdata gpmc_nand_info = {
.name = omap2-nand,
.id = 0,
- .num_resources = 1,
- .resource = gpmc_nand_resource,
+ .cs_data= gpmc_nand_cs_info,
+ .num_cs = 1,
+ .is_nand= true,
};
-static int omap2_nand_gpmc_retime(struct omap_nand_platform_data
*gpmc_nand_data)
-{
- struct gpmc_timings t;
- int err;
+static struct gpmc_timings t;
- if (!gpmc_nand_data-gpmc_t)
+static struct gpmc_timings *
+gpmc_nand_retime(struct omap_nand_platform_data *gpmc_nand_data)
+{
+ if (!gpmc_nand_data-gpmc_t) {
+ pr_warn(gpmc timings not provided\n);
return 0;
+ }
memset(t, 0, sizeof(t));
t.sync_clk = gpmc_nand_data-gpmc_t-sync_clk;
@@ -68,56 +74,26 @@ static int omap2_nand_gpmc_retime(struct
omap_nand_platform_data *gpmc_nand_data
t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data-gpmc_t-cs_wr_off);
t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data-gpmc_t-wr_cycle);
- /* Configure GPMC */
- if (gpmc_nand_data-devsize == NAND_BUSWIDTH_16)
- gpmc_cs_configure(gpmc_nand_data-cs, GPMC_CONFIG_DEV_SIZE, 1);
- else
- gpmc_cs_configure(gpmc_nand_data-cs, GPMC_CONFIG_DEV_SIZE, 0);
- gpmc_cs_configure(gpmc_nand_data-cs,
- GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
- err = gpmc_cs_set_timings(gpmc_nand_data-cs, t);
- if (err)
- return err;
-
- return 0;
+ return t;
}
-int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
+struct gpmc_device_pdata *
+__init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
{
- int err = 0;
- struct device *dev = gpmc_nand_device.dev;
+ gpmc_nand_info.pdata = gpmc_nand_data;
+ gpmc_nand_info.pdata_size = sizeof(*gpmc_nand_data);
- gpmc_nand_device.dev.platform_data = gpmc_nand_data;
+ gpmc_nand_cs_info.cs = gpmc_nand_data-cs;
+ gpmc_nand_cs_info.mem_size = NAND_IO_SIZE;
- err = gpmc_cs_request(gpmc_nand_data-cs, NAND_IO_SIZE,
- gpmc_nand_data-phys_base);
- if (err 0) {
- dev_err(dev, Cannot request GPMC CS\n);
- return err;
- }
+ gpmc_nand_cs_info.timing = gpmc_nand_retime(gpmc_nand_data);
-/* Set timings in GPMC */
- err = omap2_nand_gpmc_retime(gpmc_nand_data);
- if (err 0) {
- dev_err(dev, Unable to set gpmc timings: %d\n, err);
- return err;
- }
-
- /* Enable RD PIN Monitoring Reg */
- if (gpmc_nand_data-dev_ready) {
- gpmc_cs_configure(gpmc_nand_data-cs, GPMC_CONFIG_RDY_BSY, 1);
- }
-
- err = platform_device_register(gpmc_nand_device);
- if (err 0) {
- dev_err(dev, Unable to register NAND device\n);
- goto out_free_cs;
- }
-
- return 0;
+ if (gpmc_nand_data-devsize == NAND_BUSWIDTH_16)
+ gpmc_nand_cs_info.config |= GPMC_DEVICESIZE_16;
-out_free_cs:
- gpmc_cs_free(gpmc_nand_data-cs);
+ if (gpmc_nand_data-dev_ready)
+ gpmc_nand_cs_info.config |= GPMC_WAIT_READ_MON |
+ GPMC_WAIT_WRITE_MON;
- return err;
+ return gpmc_nand_info;
}
diff --git a/arch/arm/plat-omap/include/plat/nand.h
b/arch/arm/plat-omap/include/plat/nand.h
index 86e4d9c..30c61c9 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -36,10 +36,12 @@ struct omap_nand_platform_data {
#defineNAND_IO_SIZE4
#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
-extern int gpmc_nand_init(struct omap_nand_platform_data *d);
+extern struct gpmc_device_pdata *
+gpmc_nand_init(struct
[PATCH v4 08/39] ARM: OMAP2+: gpmc-onenand: Adapt to use gpmc driver
Currently gpmc is configured in platform for onenand. As configuring
gpmc has been moved to gpmc driver, populate details needed for the
driver to configure gpmc. gpmc driver would configure based on this
information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc-onenand.c| 111 +++--
arch/arm/plat-omap/include/plat/onenand.h |7 +-
2 files changed, 61 insertions(+), 57 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c
b/arch/arm/mach-omap2/gpmc-onenand.c
index a0fa9bb..d7775d5 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -25,9 +25,17 @@
static struct omap_onenand_platform_data *gpmc_onenand_data;
-static struct platform_device gpmc_onenand_device = {
+#define ONENAND_IO_SIZESZ_128K
+
+static struct gpmc_cs_data gpmc_onenand_cs_info = {
+ .mem_size = ONENAND_IO_SIZE,
+};
+
+static struct gpmc_device_pdata gpmc_onenand_info = {
.name = omap2-onenand,
.id = -1,
+ .cs_data= gpmc_onenand_cs_info,
+ .num_cs = 1,
};
static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
@@ -79,13 +87,17 @@ static int omap2_onenand_set_async_mode(int cs, void
__iomem *onenand_base)
t.wr_cycle = t.cs_wr_off + gpmc_round_ns_to_ticks(t_cez);
/* Configure GPMC for asynchronous read */
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
- GPMC_CONFIG1_DEVICESIZE_16 |
- GPMC_CONFIG1_MUXADDDATA);
-
- err = gpmc_cs_set_timings(cs, t);
- if (err)
+ gpmc_onenand_cs_info.have_config = true;
+ gpmc_onenand_cs_info.config = GPMC_DEVICESIZE_16 |
+ GPMC_MUXADDDATA |
+ GPMC_DEVICETYPE_NOR;
+ gpmc_onenand_cs_info.timing = t;
+ err = gpmc_cs_reconfigure(gpmc_onenand_info.name,
+ gpmc_onenand_info.id, gpmc_onenand_cs_info);
+ if (err) {
+ pr_err(%s: gpmc_cs_reconfigure failed\n, __func__);
return err;
+ }
/* Ensure sync read and sync write are disabled */
reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
@@ -180,7 +192,6 @@ static int omap2_onenand_set_sync_mode(struct
omap_onenand_platform_data *cfg,
int first_time = 0, hf = 0, vhf = 0, sync_read = 0, sync_write = 0;
int err, ticks_cez;
int cs = cfg-cs, freq = *freq_ptr;
- u32 reg;
bool clk_dep = false;
if (cfg-flags ONENAND_SYNC_READ) {
@@ -276,27 +287,10 @@ static int omap2_onenand_set_sync_mode(struct
omap_onenand_platform_data *cfg,
sync_read, sync_write, hf, vhf);
if (div == 1) {
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG2);
- reg |= (1 7);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG2, reg);
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG3);
- reg |= (1 7);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG3, reg);
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG4);
- reg |= (1 7);
- reg |= (1 23);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG4, reg);
- } else {
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG2);
- reg = ~(1 7);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG2, reg);
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG3);
- reg = ~(1 7);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG3, reg);
- reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG4);
- reg = ~(1 7);
- reg = ~(1 23);
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG4, reg);
+ t.control.cs_extra_delay = true;
+ t.control.adv_extra_delay = true;
+ t.control.oe_extra_delay = true;
+ t.control.we_extra_delay = true;
}
/* Set synchronous read timings */
@@ -348,24 +342,31 @@ static int omap2_onenand_set_sync_mode(struct
omap_onenand_platform_data *cfg,
}
/* Configure GPMC for synchronous read */
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
- GPMC_CONFIG1_WRAPBURST_SUPP |
- GPMC_CONFIG1_READMULTIPLE_SUPP |
- (sync_read ? GPMC_CONFIG1_READTYPE_SYNC : 0) |
- (sync_write ? GPMC_CONFIG1_WRITEMULTIPLE_SUPP : 0) |
- (sync_write ? GPMC_CONFIG1_WRITETYPE_SYNC : 0) |
- GPMC_CONFIG1_CLKACTIVATIONTIME(fclk_offset) |
- GPMC_CONFIG1_PAGE_LEN(2) |
- (cpu_is_omap34xx() ? 0 :
- (GPMC_CONFIG1_WAIT_READ_MON |
-GPMC_CONFIG1_WAIT_PIN_SEL(0))) |
-
[PATCH v4 09/39] ARM: OMAP2+: flash: Adapt to gpmc driver
gpmc driver has been converted to driver. Modify board_flash_init
so that it can setup gpmc driver platform details for boards
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-3430sdp.c |2 +-
arch/arm/mach-omap2/board-3630sdp.c |3 +-
arch/arm/mach-omap2/board-flash.c | 89 +++
arch/arm/mach-omap2/board-flash.h | 11 +++--
4 files changed, 58 insertions(+), 47 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index da75f23..ac2e398 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -620,7 +620,7 @@ static void __init omap_3430sdp_init(void)
omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
usb_musb_init(NULL);
board_smc91x_init();
- board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
+ board_flash_init(sdp_flash_partitions, chip_sel_3430, 0, NULL);
sdp3430_display_init();
enable_board_wakeup_source();
usbhs_init(usbhs_bdata);
diff --git a/arch/arm/mach-omap2/board-3630sdp.c
b/arch/arm/mach-omap2/board-3630sdp.c
index 6ef350d..74195b7 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -204,7 +204,8 @@ static void __init omap_sdp_init(void)
h8mbx00u0mer0em_sdrc_params);
zoom_display_init();
board_smc91x_init();
- board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16);
+ board_flash_init(sdp_flash_partitions, chip_sel_sdp,
+ NAND_BUSWIDTH_16, NULL);
enable_board_wakeup_source();
usbhs_init(usbhs_bdata);
}
diff --git a/arch/arm/mach-omap2/board-flash.c
b/arch/arm/mach-omap2/board-flash.c
index 8727c05..8deead9 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -39,46 +39,33 @@ static struct physmap_flash_data board_nor_data = {
.width = 2,
};
-static struct resource board_nor_resource = {
- .flags = IORESOURCE_MEM,
+static struct gpmc_cs_data gpmc_nor_cs_data = {
};
-static struct platform_device board_nor_device = {
+static struct gpmc_device_pdata gpmc_nor_data = {
.name = physmap-flash,
.id = 0,
- .dev= {
- .platform_data = board_nor_data,
- },
- .num_resources = 1,
- .resource = board_nor_resource,
+ .cs_data= gpmc_nor_cs_data,
+ .num_cs = 1,
};
-static void
-__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
+static __init struct gpmc_device_pdata *
+gpmc_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
{
- int err;
-
board_nor_data.parts= nor_parts;
board_nor_data.nr_parts = nr_parts;
- /* Configure start address and size of NOR device */
- if (omap_rev() = OMAP3430_REV_ES1_0) {
- err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
- (unsigned long *)board_nor_resource.start);
- board_nor_resource.end = board_nor_resource.start
- + FLASH_SIZE_SDPV2 - 1;
- } else {
- err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
- (unsigned long *)board_nor_resource.start);
- board_nor_resource.end = board_nor_resource.start
- + FLASH_SIZE_SDPV1 - 1;
- }
- if (err 0) {
- pr_err(NOR: Can't request GPMC CS\n);
- return;
- }
- if (platform_device_register(board_nor_device) 0)
- pr_err(Unable to register NOR device\n);
+ gpmc_nor_cs_data.cs = cs;
+
+ if (omap_rev() = OMAP3430_REV_ES1_0)
+ gpmc_nor_cs_data.mem_size = FLASH_SIZE_SDPV2;
+ else
+ gpmc_nor_cs_data.mem_size = FLASH_SIZE_SDPV1;
+
+ gpmc_nor_data.pdata = board_nor_data;
+ gpmc_nor_data.pdata_size = sizeof(board_nor_data);
+
+ return gpmc_nor_data;
}
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
@@ -183,8 +170,11 @@ unmap:
*
* @return - void.
*/
-void __init board_flash_init(struct flash_partitions partition_info[],
- char chip_sel_board[][GPMC_CS_NUM], int nand_type)
+__init struct gpmc_device_pdata **board_flash_init(
+ struct flash_partitions partition_info[],
+ char chip_sel_board[][GPMC_CS_NUM],
+ int nand_type,
+ struct gpmc_device_pdata **gpmc_data)
{
u8 cs = 0;
u8 norcs = GPMC_CS_NUM + 1;
@@ -193,13 +183,18 @@ void __init board_flash_init(struct flash_partitions
partition_info[],
u8 idx;
unsigned char *config_sel = NULL;
+ if (gpmc_data ==
[PATCH v4 10/39] ARM: OMAP2+: gpmc-smsc911x: Adapt to use gpmc driver
gpmc has been converted to driver. And all gpmc related
configuration would be done by gpmc driver. Provide
gpmc driver with sufficient information so that it can
configure.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/gpmc-smsc911x.c | 59 ---
arch/arm/plat-omap/include/plat/gpmc-smsc911x.h |9 +++-
2 files changed, 39 insertions(+), 29 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c
b/arch/arm/mach-omap2/gpmc-smsc911x.c
index b6c77be..2c89685 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -24,13 +24,8 @@
#include plat/gpmc.h
#include plat/gpmc-smsc911x.h
-static struct resource gpmc_smsc911x_resources[] = {
- [0] = {
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
- },
+static struct resource gpmc_smsc911x_resources = {
+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
};
static struct smsc911x_platform_config gpmc_smsc911x_config = {
@@ -44,26 +39,42 @@ static struct smsc911x_platform_config gpmc_smsc911x_config
= {
* assume that pin multiplexing is done in the board-*.c file,
* or in the bootloader.
*/
-void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg)
+__init struct gpmc_device_pdata *
+gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg)
{
- struct platform_device *pdev;
- unsigned long cs_mem_base;
int ret;
+ struct gpmc_device_pdata *gpmc_pdev;
+ struct gpmc_cs_data *gpmc_cs;
- if (gpmc_cs_request(gpmc_cfg-cs, SZ_16M, cs_mem_base) 0) {
- pr_err(Failed to request GPMC mem region\n);
- return;
+ gpmc_pdev = kzalloc(sizeof(*gpmc_pdev), GFP_KERNEL);
+ if (gpmc_pdev == NULL)
+ return gpmc_pdev;
+
+ gpmc_cs = kzalloc(sizeof(*gpmc_cs), GFP_KERNEL);
+ if (gpmc_pdev == NULL) {
+ kfree(gpmc_pdev);
+ return NULL;
}
- gpmc_smsc911x_resources[0].start = cs_mem_base + 0x0;
- gpmc_smsc911x_resources[0].end = cs_mem_base + 0xff;
+ gpmc_pdev-cs_data = gpmc_cs;
+ gpmc_pdev-num_cs = 1;
+ gpmc_pdev-name = smsc911x;
+ gpmc_pdev-id = gpmc_cfg-id;
+ gpmc_pdev-pdata = gpmc_smsc911x_config;
+ gpmc_pdev-pdata_size = sizeof(gpmc_smsc911x_config);
+
+ gpmc_cs-cs = gpmc_cfg-cs;
+ gpmc_cs-mem_size = 0x100;
+
+ gpmc_pdev-per_res = gpmc_smsc911x_resources;
+ gpmc_pdev-per_res_cnt = 1;
if (gpio_request_one(gpmc_cfg-gpio_irq, GPIOF_IN, smsc911x irq)) {
pr_err(Failed to request IRQ GPIO%d\n, gpmc_cfg-gpio_irq);
goto free1;
}
- gpmc_smsc911x_resources[1].start = gpio_to_irq(gpmc_cfg-gpio_irq);
+ gpmc_smsc911x_resources.start = gpio_to_irq(gpmc_cfg-gpio_irq);
if (gpio_is_valid(gpmc_cfg-gpio_reset)) {
ret = gpio_request_one(gpmc_cfg-gpio_reset,
@@ -81,21 +92,15 @@ void __init gpmc_smsc911x_init(struct
omap_smsc911x_platform_data *gpmc_cfg)
gpmc_smsc911x_config.flags = gpmc_cfg-flags ? : SMSC911X_USE_16BIT;
- pdev = platform_device_register_resndata(NULL, smsc911x, gpmc_cfg-id,
-gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources),
-gpmc_smsc911x_config, sizeof(gpmc_smsc911x_config));
- if (!pdev) {
- pr_err(Unable to register platform device\n);
- gpio_free(gpmc_cfg-gpio_reset);
- goto free2;
- }
-
- return;
+ return gpmc_pdev;
free2:
gpio_free(gpmc_cfg-gpio_irq);
free1:
- gpmc_cs_free(gpmc_cfg-cs);
+ kfree(gpmc_cs);
+ kfree(gpmc_pdev);
pr_err(Could not initialize smsc911x device\n);
+
+ return NULL;
}
diff --git a/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h
b/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h
index ea6c9c8..66dc7f1 100644
--- a/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h
+++ b/arch/arm/plat-omap/include/plat/gpmc-smsc911x.h
@@ -11,6 +11,8 @@
* published by the Free Software Foundation.
*/
+#includeplat/gpmc.h
+
#ifndef __ASM_ARCH_OMAP_GPMC_SMSC911X_H__
struct omap_smsc911x_platform_data {
@@ -23,12 +25,15 @@ struct omap_smsc911x_platform_data {
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
-extern void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d);
+extern struct gpmc_device_pdata *
+gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d);
#else
-static inline void gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d)
+static inline struct gpmc_device_pdata *
+gpmc_smsc911x_init(struct omap_smsc911x_platform_data *d)
{
+ return NULL;
}
#endif
--
1.7.10
--
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[PATCH v4 11/39] ARM: OMAP2+: gpmc-smc91x: Adapt to use gpmc driver
Currently gpmc is configured in platform for smc91x. As configuring
gpmc has been moved to gpmc driver, populate details needed for the
driver to configure gpmc. gpmc driver would configure based on this
information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-2430sdp.c |2 +-
arch/arm/mach-omap2/board-3430sdp.c |1 +
arch/arm/mach-omap2/board-3630sdp.c |1 +
arch/arm/mach-omap2/gpmc-smc91x.c | 87 +++--
arch/arm/plat-omap/include/plat/gpmc-smc91x.h | 10 ++-
5 files changed, 47 insertions(+), 54 deletions(-)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c
b/arch/arm/mach-omap2/board-2430sdp.c
index e658f83..68679a8 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -175,7 +175,7 @@ static struct omap_smc91x_platform_data board_smc91x_data =
{
.gpio_irq = 149,
.flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
IORESOURCE_IRQ_LOWLEVEL,
-
+ .skip_timing= true,
};
static void __init board_smc91x_init(void)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index ac2e398..367a466 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -434,6 +434,7 @@ static struct omap_smc91x_platform_data board_smc91x_data =
{
.cs = 3,
.flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
IORESOURCE_IRQ_LOWLEVEL,
+ .skip_timing= true,
};
static void __init board_smc91x_init(void)
diff --git a/arch/arm/mach-omap2/board-3630sdp.c
b/arch/arm/mach-omap2/board-3630sdp.c
index 74195b7..143e47f 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -32,6 +32,7 @@
static struct omap_smc91x_platform_data board_smc91x_data = {
.cs = 3,
.flags = GPMC_MUX_ADD_DATA | IORESOURCE_IRQ_LOWLEVEL,
+ .skip_timing= true,
};
static void __init board_smc91x_init(void)
diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c
b/arch/arm/mach-omap2/gpmc-smc91x.c
index ba10c24..9389df1 100644
--- a/arch/arm/mach-omap2/gpmc-smc91x.c
+++ b/arch/arm/mach-omap2/gpmc-smc91x.c
@@ -23,13 +23,8 @@
static struct omap_smc91x_platform_data *gpmc_cfg;
-static struct resource gpmc_smc91x_resources[] = {
- [0] = {
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .flags = IORESOURCE_IRQ,
- },
+static struct resource gpmc_smc91x_resource = {
+ .flags = IORESOURCE_IRQ,
};
static struct smc91x_platdata gpmc_smc91x_info = {
@@ -38,14 +33,17 @@ static struct smc91x_platdata gpmc_smc91x_info = {
.ledb = RPC_LED_TX_RX,
};
-static struct platform_device gpmc_smc91x_device = {
+static struct gpmc_cs_data gpmc_smc91x_cs_data;
+
+static struct gpmc_device_pdata gpmc_smc91x_data = {
.name = smc91x,
.id = -1,
- .dev= {
- .platform_data = gpmc_smc91x_info,
- },
- .num_resources = ARRAY_SIZE(gpmc_smc91x_resources),
- .resource = gpmc_smc91x_resources,
+ .pdata = gpmc_smc91x_info,
+ .pdata_size = sizeof(gpmc_smc91x_info),
+ .per_res= gpmc_smc91x_resource,
+ .per_res_cnt= 1,
+ .cs_data= gpmc_smc91x_cs_data,
+ .num_cs = 1,
};
/*
@@ -54,9 +52,10 @@ static struct platform_device gpmc_smc91x_device = {
* http://www.smsc.com/main/catalog/lan91c96.html
* REVISIT: Level shifters can add at least to the access latency.
*/
-static int smc91c96_gpmc_retime(void)
+static void smc91c96_gpmc_retime(void)
{
- struct gpmc_timings t;
+ /* GPMC timing configuration after this function dies, hence static */
+ static struct gpmc_timings t;
const int t3 = 10; /* Figure 12.2 read and 12.4 write */
const int t4_r = 20;/* Figure 12.2 read */
const int t4_w = 5; /* Figure 12.4 write */
@@ -65,7 +64,6 @@ static int smc91c96_gpmc_retime(void)
const int t7 = 5; /* Figure 12.4 write */
const int t8 = 5; /* Figure 12.4 write */
const int t20 = 185;/* Figure 12.2 read and 12.4 write */
- u32 l;
memset(t, 0, sizeof(t));
@@ -93,16 +91,17 @@ static int smc91c96_gpmc_retime(void)
t.cs_wr_off = t.we_off + t4_w;
t.wr_cycle = t20 - t.we_on;
- l = GPMC_CONFIG1_DEVICESIZE_16;
+ gpmc_smc91x_cs_data.have_config = true;
+ gpmc_smc91x_cs_data.config = GPMC_DEVICESIZE_16;
if (gpmc_cfg-flags GPMC_MUX_ADD_DATA)
- l |= GPMC_CONFIG1_MUXADDDATA;
+ gpmc_smc91x_cs_data.config |= GPMC_MUXADDDATA;
if (gpmc_cfg-flags GPMC_READ_MON)
- l |= GPMC_CONFIG1_WAIT_READ_MON;
+
[PATCH v4 12/39] ARM: OMAP2+: gpmc-tusb6010: Adapt to gpmc driver
Currently gpmc is configured in platform for tusb6010. As configuring
gpmc has been moved to gpmc driver, populate details needed for the
driver to configure gpmc. gpmc driver would configure based on this
information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/usb-tusb6010.c | 177 ++--
include/linux/usb/musb.h |4 +-
2 files changed, 70 insertions(+), 111 deletions(-)
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c
b/arch/arm/mach-omap2/usb-tusb6010.c
index db84a46..d7817d2 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -22,6 +22,24 @@
#include mux.h
+static struct resource tusb_resources = {
+ .name = mc,
+ .flags = IORESOURCE_IRQ,
+};
+
+#defineTUSB_GPMC_CS_ASYNC_IDX 1
+#defineTUSB_GPMC_CS_SYNC_IDX 2
+#defineTUSB_GPMC_CS_NUM2
+
+static struct gpmc_cs_data gpmc_tusb_cs_data[TUSB_GPMC_CS_NUM];
+
+static struct gpmc_device_pdata gpmc_tusb_data = {
+ .name = musb-tusb,
+ .id = -1,
+ .per_res= tusb_resources,
+ .per_res_cnt= 1,
+};
+
static u8 async_cs, sync_cs;
static unsignedrefclk_psec;
@@ -51,9 +69,9 @@ next_clk(unsigned t1_NS, unsigned t2_ps, unsigned fclk_ps)
/* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */
-static int tusb_set_async_mode(unsigned sysclk_ps, unsigned fclk_ps)
+static void tusb_set_async_mode(unsigned sysclk_ps, unsigned fclk_ps)
{
- struct gpmc_timings t;
+ static struct gpmc_timings t;
unsignedt_acsnh_advnh = sysclk_ps + 3000;
unsignedtmp;
@@ -106,12 +124,12 @@ static int tusb_set_async_mode(unsigned sysclk_ps,
unsigned fclk_ps)
tmp = t.cs_wr_off * 1000 + 7000 /* t_acsn_rdy_z */;
t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);
- return gpmc_cs_set_timings(async_cs, t);
+ gpmc_tusb_cs_data[TUSB_GPMC_CS_ASYNC_IDX].timing = t;
}
static int tusb_set_sync_mode(unsigned sysclk_ps, unsigned fclk_ps)
{
- struct gpmc_timings t;
+ static struct gpmc_timings t;
unsignedt_scsnh_advnh = sysclk_ps + 3000;
unsignedtmp;
@@ -174,71 +192,30 @@ static int tusb_set_sync_mode(unsigned sysclk_ps,
unsigned fclk_ps)
tmp = t.cs_wr_off * 1000 + 7000 /* t_scsn_rdy_z */;
t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);
- return gpmc_cs_set_timings(sync_cs, t);
+ gpmc_tusb_cs_data[TUSB_GPMC_CS_SYNC_IDX].timing = t;
+
+ return 0;
}
extern unsigned long gpmc_get_fclk_period(void);
/* tusb driver calls this when it changes the chip's clocking */
-int tusb6010_platform_retime(unsigned is_refclk)
+static int tusb6010_platform_retime(unsigned is_refclk)
{
- static const char error[] =
- KERN_ERR tusb6010 %s retime error %d\n;
-
unsignedfclk_ps = gpmc_get_fclk_period();
unsignedsysclk_ps;
- int status;
if (!refclk_psec || fclk_ps == 0)
return -ENODEV;
sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
- status = tusb_set_async_mode(sysclk_ps, fclk_ps);
- if (status 0) {
- printk(error, async, status);
- goto done;
- }
- status = tusb_set_sync_mode(sysclk_ps, fclk_ps);
- if (status 0)
- printk(error, sync, status);
-done:
- return status;
+ tusb_set_async_mode(sysclk_ps, fclk_ps);
+ return tusb_set_sync_mode(sysclk_ps, fclk_ps);
}
-EXPORT_SYMBOL_GPL(tusb6010_platform_retime);
-
-static struct resource tusb_resources[] = {
- /* Order is significant! The start/end fields
-* are updated during setup..
-*/
- { /* Asynchronous access */
- .flags = IORESOURCE_MEM,
- },
- { /* Synchronous access */
- .flags = IORESOURCE_MEM,
- },
- { /* IRQ */
- .name = mc,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 tusb_dmamask = ~(u32)0;
-
-static struct platform_device tusb_device = {
- .name = musb-tusb,
- .id = -1,
- .dev = {
- .dma_mask = tusb_dmamask,
- .coherent_dma_mask = 0x,
- },
- .num_resources = ARRAY_SIZE(tusb_resources),
- .resource = tusb_resources,
-};
-
/* this may be called only from board-*.c setup code */
-int __init
+__init struct gpmc_device_pdata *
tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
unsigned ps_refclk, unsigned waitpin,
unsigned async, unsigned sync,
@@ -249,82 +226,72 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data
*data,
KERN_ERR tusb6010 init error %d, %d\n;
/*
[PATCH v4 14/39] ARM: OMAP2xxx: hwmod data: add gpmc
Add gpmc hwmod and associated interconnect data
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 18 +
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 18 +
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 41
arch/arm/mach-omap2/omap_hwmod_common_data.h |1 +
arch/arm/mach-omap2/prcm-common.h |2 +
5 files changed, 80 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 2c087ff..55c8c7b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -428,6 +428,23 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 =
{
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_addr_space omap2420_gpmc_addrs[] = {
+ {
+ .pa_start = 0x6800A000,
+ .pa_end = 0x6800AFFF,
+ .flags = ADDR_TYPE_RT
+ },
+ { }
+};
+
+static struct omap_hwmod_ocp_if omap2420_l3__gpmc = {
+ .master = omap2xxx_l3_main_hwmod,
+ .slave = omap2xxx_gpmc_hwmod,
+ .clk= core_l3_ck,
+ .addr = omap2420_gpmc_addrs,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
omap2xxx_l3_main__l4_core,
omap2xxx_mpu__l3_main,
@@ -468,6 +485,7 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[]
__initdata = {
omap2420_l4_core__mailbox,
omap2420_l4_core__mcbsp1,
omap2420_l4_core__mcbsp2,
+ omap2420_l3__gpmc,
NULL,
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 71d9f88..dd224cca 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -838,6 +838,23 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 =
{
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_addr_space omap2430_gpmc_addrs[] = {
+ {
+ .pa_start = 0x6E00,
+ .pa_end = 0x6E000FFF,
+ .flags = ADDR_TYPE_RT
+ },
+ { }
+};
+
+static struct omap_hwmod_ocp_if omap2430_l3__gpmc = {
+ .master = omap2xxx_l3_main_hwmod,
+ .slave = omap2xxx_gpmc_hwmod,
+ .clk= core_l3_ck,
+ .addr = omap2430_gpmc_addrs,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
omap2xxx_l3_main__l4_core,
omap2xxx_mpu__l3_main,
@@ -886,6 +903,7 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[]
__initdata = {
omap2430_l4_core__mcbsp3,
omap2430_l4_core__mcbsp4,
omap2430_l4_core__mcbsp5,
+ omap2430_l3__gpmc,
NULL,
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index 45aaa07..e75da40 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -175,6 +175,26 @@ struct omap_hwmod_class omap2xxx_mcspi_class = {
};
/*
+ * 'gpmc' class
+ * general purpose memory controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap2xxx_gpmc_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2xxx_gpmc_hwmod_class = {
+ .name = gpmc,
+ .sysc = omap2xxx_gpmc_sysc,
+};
+
+/*
* IP blocks
*/
@@ -732,3 +752,24 @@ struct omap_hwmod omap2xxx_mcspi2_hwmod = {
.class = omap2xxx_mcspi_class,
.dev_attr = omap_mcspi2_dev_attr,
};
+
+/* gpmc */
+static struct omap_hwmod_irq_info omap2xxx_gpmc_irqs[] = {
+ { .irq = 20 },
+ { .irq = -1 }
+};
+
+struct omap_hwmod omap2xxx_gpmc_hwmod = {
+ .name = gpmc,
+ .class = omap2xxx_gpmc_hwmod_class,
+ .mpu_irqs = omap2xxx_gpmc_irqs,
+ .main_clk = gpmc_fck,
+ .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 3,
+ .module_bit = OMAP24XX_EN_GPMC_MASK,
+ .module_offs = CORE_MOD,
+ },
+ },
+};
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h
b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index 7aa9156..63e0134
[PATCH v4 15/39] mtd: nand: omap2: obtain memory from resource
gpmc being converted to driver, provides drivers
of peripheral connected memory space used by the
peripheral as memory resource.
Modify nand omap driver to obtain memory detials
from resource structure.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/plat-omap/include/plat/nand.h |1 -
drivers/mtd/nand/omap2.c | 20 ++--
2 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/nand.h
b/arch/arm/plat-omap/include/plat/nand.h
index 30c61c9..570c4f4 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -26,7 +26,6 @@ struct omap_nand_platform_data {
booldev_ready;
int gpmc_irq;
enum nand_ioxfer_type;
- unsigned long phys_base;
int devsize;
enum omap_ecc ecc_opt;
struct gpmc_nand_regs reg;
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index c2b0bba..be4b321 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -118,6 +118,7 @@ struct omap_nand_info {
int gpmc_cs;
unsigned long phys_base;
+ unsigned long mem_size;
struct completion comp;
int dma_ch;
int gpmc_irq;
@@ -931,6 +932,7 @@ static int __devinit omap_nand_probe(struct platform_device
*pdev)
struct omap_nand_platform_data *pdata;
int err;
int i, offset;
+ struct resource *res;
pdata = pdev-dev.platform_data;
if (pdata == NULL) {
@@ -950,7 +952,6 @@ static int __devinit omap_nand_probe(struct platform_device
*pdev)
info-pdev = pdev;
info-gpmc_cs = pdata-cs;
- info-phys_base = pdata-phys_base;
info-mtd.priv = info-nand;
info-mtd.name = dev_name(pdev-dev);
@@ -959,16 +960,23 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
info-nand.options = pdata-devsize;
info-nand.options |= NAND_SKIP_BBTSCAN;
- /* NAND write protect off */
- gpmc_cs_configure(info-gpmc_cs, GPMC_CONFIG_WP, 0);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res == NULL) {
+ err = -EINVAL;
+ dev_err(pdev-dev, error getting memory resource\n);
+ goto out_free_info;
+ }
+
+ info-phys_base = res-start;
+ info-mem_size = resource_size(res);
- if (!request_mem_region(info-phys_base, NAND_IO_SIZE,
+ if (!request_mem_region(info-phys_base, info-mem_size,
pdev-dev.driver-name)) {
err = -EBUSY;
goto out_free_info;
}
- info-nand.IO_ADDR_R = ioremap(info-phys_base, NAND_IO_SIZE);
+ info-nand.IO_ADDR_R = ioremap(info-phys_base, info-mem_size);
if (!info-nand.IO_ADDR_R) {
err = -ENOMEM;
goto out_release_mem_region;
@@ -1110,7 +1118,7 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
return 0;
out_release_mem_region:
- release_mem_region(info-phys_base, NAND_IO_SIZE);
+ release_mem_region(info-phys_base, info-mem_size);
out_free_info:
kfree(info);
--
1.7.10
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[PATCH v4 13/39] ARM: OMAP3: hwmod data: add gpmc
Add gpmc hwmod and associated interconnect data
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 52
1 file changed, 52 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 0c65079..4da8394 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1981,6 +1981,40 @@ static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
};
/*
+ * 'gpmc' class
+ * general purpose memory controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap3xxx_gpmc_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap3xxx_gpmc_hwmod_class = {
+ .name = gpmc,
+ .sysc = omap3xxx_gpmc_sysc,
+};
+
+static struct omap_hwmod_irq_info omap3xxx_gpmc_irqs[] = {
+ { .irq = 20 },
+ { .irq = -1 }
+};
+
+static struct omap_hwmod omap3xxx_gpmc_hwmod = {
+ .name = gpmc,
+ .class = omap3xxx_gpmc_hwmod_class,
+ .clkdm_name = l3_init_clkdm,
+ .mpu_irqs = omap3xxx_gpmc_irqs,
+ .main_clk = gpmc_fck,
+ .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
+};
+
+/*
* interfaces
*/
@@ -3059,6 +3093,23 @@ static struct omap_hwmod_ocp_if
omap3xxx_l4_core__usb_tll_hs = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_addr_space omap3xxx_gpmc_addrs[] = {
+ {
+ .pa_start = 0x6E00,
+ .pa_end = 0x6E000FFF,
+ .flags = ADDR_TYPE_RT
+ },
+ { }
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l3_main__gpmc = {
+ .master = omap3xxx_l3_main_hwmod,
+ .slave = omap3xxx_gpmc_hwmod,
+ .clk= core_l3_ick,
+ .addr = omap3xxx_gpmc_addrs,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
omap3xxx_l3_main__l4_core,
omap3xxx_l3_main__l4_per,
@@ -3103,6 +3154,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[]
__initdata = {
omap34xx_l4_core__mcspi2,
omap34xx_l4_core__mcspi3,
omap34xx_l4_core__mcspi4,
+ omap3xxx_l3_main__gpmc,
NULL,
};
--
1.7.10
--
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[PATCH v4 16/39] mtd: nand: omap2: use gpmc provided irqs
GPMC driver provides it's clientsd with interrupts that can be used
through struct resource. Make use of it for irq mode functionality.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/mtd/nand/omap2.c | 67 +-
1 file changed, 42 insertions(+), 25 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index be4b321..440536b 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -121,7 +121,8 @@ struct omap_nand_info {
unsigned long mem_size;
struct completion comp;
int dma_ch;
- int gpmc_irq;
+ int gpmc_irq_fifo;
+ int gpmc_irq_count;
enum {
OMAP_NAND_IO_READ = 0, /* read */
OMAP_NAND_IO_WRITE, /* write */
@@ -472,13 +473,11 @@ static irqreturn_t omap_nand_irq(int this_irq, void *dev)
{
struct omap_nand_info *info = (struct omap_nand_info *) dev;
u32 bytes;
- u32 irq_stat;
- irq_stat = gpmc_read_status(GPMC_GET_IRQ_STATUS);
bytes = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);
bytes = bytes 0xFFFC; /* io in multiple of 4 bytes */
if (info-iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */
- if (irq_stat 0x2)
+ if (this_irq == info-gpmc_irq_count)
goto done;
if (info-buf_len (info-buf_len bytes))
@@ -495,20 +494,17 @@ static irqreturn_t omap_nand_irq(int this_irq, void *dev)
(u32 *)info-buf, bytes 2);
info-buf = info-buf + bytes;
- if (irq_stat 0x2)
+ if (this_irq == info-gpmc_irq_count)
goto done;
}
- gpmc_cs_configure(info-gpmc_cs, GPMC_SET_IRQ_STATUS, irq_stat);
return IRQ_HANDLED;
done:
complete(info-comp);
- /* disable irq */
- gpmc_cs_configure(info-gpmc_cs, GPMC_ENABLE_IRQ, 0);
- /* clear status */
- gpmc_cs_configure(info-gpmc_cs, GPMC_SET_IRQ_STATUS, irq_stat);
+ disable_irq_nosync(info-gpmc_irq_fifo);
+ disable_irq_nosync(info-gpmc_irq_count);
return IRQ_HANDLED;
}
@@ -542,9 +538,9 @@ static void omap_read_buf_irq_pref(struct mtd_info *mtd,
u_char *buf, int len)
goto out_copy;
info-buf_len = len;
- /* enable irq */
- gpmc_cs_configure(info-gpmc_cs, GPMC_ENABLE_IRQ,
- (GPMC_IRQ_FIFOEVENTENABLE | GPMC_IRQ_COUNT_EVENT));
+
+ enable_irq(info-gpmc_irq_count);
+ enable_irq(info-gpmc_irq_fifo);
/* waiting for read to complete */
wait_for_completion(info-comp);
@@ -591,12 +587,13 @@ static void omap_write_buf_irq_pref(struct mtd_info *mtd,
goto out_copy;
info-buf_len = len;
- /* enable irq */
- gpmc_cs_configure(info-gpmc_cs, GPMC_ENABLE_IRQ,
- (GPMC_IRQ_FIFOEVENTENABLE | GPMC_IRQ_COUNT_EVENT));
+
+ enable_irq(info-gpmc_irq_count);
+ enable_irq(info-gpmc_irq_fifo);
/* waiting for write to complete */
wait_for_completion(info-comp);
+
/* wait for data to flushed-out before reset the prefetch */
tim = 0;
limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
@@ -982,6 +979,14 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
goto out_release_mem_region;
}
+ info-gpmc_irq_fifo = platform_get_irq(pdev, 0);
+ if (info-gpmc_irq_fifo == -ENXIO)
+ dev_warn(pdev-dev, error getting FIFO IRQ\n);
+
+ info-gpmc_irq_count = platform_get_irq(pdev, 1);
+ if (info-gpmc_irq_fifo == -ENXIO)
+ dev_warn(pdev-dev, error getting TERMINALCOUNT IRQ\n);
+
info-nand.controller = info-controller;
info-nand.IO_ADDR_W = info-nand.IO_ADDR_R;
@@ -1037,17 +1042,24 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
break;
case NAND_OMAP_PREFETCH_IRQ:
- err = request_irq(pdata-gpmc_irq,
- omap_nand_irq, IRQF_SHARED, gpmc-nand, info);
+ err = request_irq(info-gpmc_irq_fifo, omap_nand_irq,
+ IRQF_SHARED, gpmc-nand-fifo, info);
if (err) {
dev_err(pdev-dev, requesting irq(%d) error:%d,
- pdata-gpmc_irq, err);
+ info-gpmc_irq_fifo, err);
goto out_release_mem_region;
- } else {
- info-gpmc_irq = pdata-gpmc_irq;
- info-nand.read_buf = omap_read_buf_irq_pref;
- info-nand.write_buf =
[PATCH v4 17/39] mtd: nand: omap2: handle nand on gpmc
GPMC driver has been modified to fill NAND platform data with GPMC
NAND register details. As these registers are accessible in NAND
driver itself, configure NAND in GPMC by itself.
Note: Verfying that other CS have not yet enabled for prefetch ecc
has to be incorporated. Currently this causes no issues as there are
no boards that use NAND on multiple CS. With GPMC modifications,
perhaps it would be better to consider NAND connected on multiple CS
as a single peripheral using multiple CS. This would make handling
multiple CS issues easier.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/mtd/nand/omap2.c | 209 --
1 file changed, 165 insertions(+), 44 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 440536b..34fb726 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -129,8 +129,79 @@ struct omap_nand_info {
} iomode;
u_char *buf;
int buf_len;
+ struct gpmc_nand_regs reg;
};
+#definePREFETCH_CONFIG1_CS_SHIFT 24
+#defineECC_CONFIG_CS_SHIFT 1
+#defineCS_MASK 0x7
+#defineENABLE_PREFETCH (0x1 7)
+#defineDMA_MPU_MODE_SHIFT 2
+#defineECCSIZE1_SHIFT 22
+#defineECC1RESULTSIZE 0x1
+#defineECC_CLEAR_SHIFT 8
+#defineECC10x1
+
+/**
+ * omap_prefetch_enable - configures and starts prefetch transfer
+ * @cs: cs (chip select) number
+ * @fifo_th: fifo threshold to be used for read/ write
+ * @dma_mode: dma mode enable (1) or disable (0)
+ * @u32_count: number of bytes to be transferred
+ * @is_write: prefetch read(0) or write post(1) mode
+ */
+static int omap_prefetch_enable(int cs, int fifo_th, int dma_mode,
+ unsigned int u32_count, int is_write, struct omap_nand_info *info)
+{
+ u32 val;
+
+ if (fifo_th PREFETCH_FIFOTHRESHOLD_MAX) {
+ pr_err(gpmc: fifo threshold is not supported\n);
+ return -1;
+ } else if (!(readl(info-reg.gpmc_prefetch_control))) {
+ /* Set the amount of bytes to be prefetched */
+ writel(u32_count, info-reg.gpmc_prefetch_config2);
+
+ /* Set dma/mpu mode, the prefetch read / post write and
+* enable the engine. Set which cs is has requested for.
+*/
+ val = ((cs PREFETCH_CONFIG1_CS_SHIFT) |
+ PREFETCH_FIFOTHRESHOLD(fifo_th) |
+ ENABLE_PREFETCH |
+ (dma_mode DMA_MPU_MODE_SHIFT) |
+ (0x1 is_write));
+ writel(val, info-reg.gpmc_prefetch_config1);
+
+ /* Start the prefetch engine */
+ writel(0x1, info-reg.gpmc_prefetch_control);
+ } else {
+ return -EBUSY;
+ }
+
+ return 0;
+}
+
+/**
+ * omap_prefetch_reset - disables and stops the prefetch engine
+ */
+static int omap_prefetch_reset(int cs, struct omap_nand_info *info)
+{
+ u32 config1;
+
+ /* check if the same module/cs is trying to reset */
+ config1 = readl(info-reg.gpmc_prefetch_config1);
+ if (((config1 PREFETCH_CONFIG1_CS_SHIFT) CS_MASK) != cs)
+ return -EINVAL;
+
+ /* Stop the PFPW engine */
+ writel(0x0, info-reg.gpmc_prefetch_control);
+
+ /* Reset/disable the PFPW engine */
+ writel(0x0, info-reg.gpmc_prefetch_config1);
+
+ return 0;
+}
+
/**
* omap_hwcontrol - hardware specific access to control-lines
* @mtd: MTD device structure
@@ -149,13 +220,13 @@ static void omap_hwcontrol(struct mtd_info *mtd, int cmd,
unsigned int ctrl)
if (cmd != NAND_CMD_NONE) {
if (ctrl NAND_CLE)
- gpmc_nand_write(info-gpmc_cs, GPMC_NAND_COMMAND, cmd);
+ writeb(cmd, info-reg.gpmc_nand_command);
else if (ctrl NAND_ALE)
- gpmc_nand_write(info-gpmc_cs, GPMC_NAND_ADDRESS, cmd);
+ writeb(cmd, info-reg.gpmc_nand_address);
else /* NAND_NCE */
- gpmc_nand_write(info-gpmc_cs, GPMC_NAND_DATA, cmd);
+ writeb(cmd, info-reg.gpmc_nand_data);
}
}
@@ -189,7 +260,8 @@ static void omap_write_buf8(struct mtd_info *mtd, const
u_char *buf, int len)
iowrite8(*p++, info-nand.IO_ADDR_W);
/* wait until buffer is available for write */
do {
- status = gpmc_read_status(GPMC_STATUS_BUFFER);
+ status = readl(info-reg.gpmc_status)
+ GPMC_STATUS_BUFF_EMPTY;
} while (!status);
[PATCH v4 18/39] mtd: onenand: omap: obtain memory from resource
gpmc being converted to driver, provides drivers of peripheral
connected memory space used by the peripheral as memory resource.
Modify nand omap driver to obtain memory detials from resource
structure. And so remove usage of gpmc exported symbols.
Signed-off-by: Afzal Mohammed af...@ti.com
---
drivers/mtd/onenand/omap2.c | 29 -
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 398a827..3ff893d 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -48,13 +48,13 @@
#define DRIVER_NAME omap2-onenand
-#define ONENAND_IO_SIZESZ_128K
#define ONENAND_BUFRAM_SIZE(1024 * 5)
struct omap2_onenand {
struct platform_device *pdev;
int gpmc_cs;
unsigned long phys_base;
+ unsigned int mem_size;
int gpio_irq;
struct mtd_info mtd;
struct onenand_chip onenand;
@@ -626,6 +626,7 @@ static int __devinit omap2_onenand_probe(struct
platform_device *pdev)
struct omap2_onenand *c;
struct onenand_chip *this;
int r;
+ struct resource *res;
pdata = pdev-dev.platform_data;
if (pdata == NULL) {
@@ -647,20 +648,24 @@ static int __devinit omap2_onenand_probe(struct
platform_device *pdev)
c-gpio_irq = 0;
}
- r = gpmc_cs_request(c-gpmc_cs, ONENAND_IO_SIZE, c-phys_base);
- if (r 0) {
- dev_err(pdev-dev, Cannot request GPMC CS\n);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res == NULL) {
+ r = -EINVAL;
+ dev_err(pdev-dev, error getting memory resource\n);
goto err_kfree;
}
- if (request_mem_region(c-phys_base, ONENAND_IO_SIZE,
+ c-phys_base = res-start;
+ c-mem_size = resource_size(res);
+
+ if (request_mem_region(c-phys_base, c-mem_size,
pdev-dev.driver-name) == NULL) {
- dev_err(pdev-dev, Cannot reserve memory region at 0x%08lx,
- size: 0x%x\n, c-phys_base, ONENAND_IO_SIZE);
+ dev_err(pdev-dev, Cannot reserve memory region at 0x%08lx,
size: 0x%x\n,
+ c-phys_base, c-mem_size);
r = -EBUSY;
- goto err_free_cs;
+ goto err_kfree;
}
- c-onenand.base = ioremap(c-phys_base, ONENAND_IO_SIZE);
+ c-onenand.base = ioremap(c-phys_base, c-mem_size);
if (c-onenand.base == NULL) {
r = -ENOMEM;
goto err_release_mem_region;
@@ -776,9 +781,7 @@ err_release_gpio:
err_iounmap:
iounmap(c-onenand.base);
err_release_mem_region:
- release_mem_region(c-phys_base, ONENAND_IO_SIZE);
-err_free_cs:
- gpmc_cs_free(c-gpmc_cs);
+ release_mem_region(c-phys_base, c-mem_size);
err_kfree:
kfree(c);
@@ -800,7 +803,7 @@ static int __devexit omap2_onenand_remove(struct
platform_device *pdev)
gpio_free(c-gpio_irq);
}
iounmap(c-onenand.base);
- release_mem_region(c-phys_base, ONENAND_IO_SIZE);
+ release_mem_region(c-phys_base, c-mem_size);
gpmc_cs_free(c-gpmc_cs);
kfree(c);
--
1.7.10
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[PATCH v4 19/39] ARM: OMAP2+: board omap3evm: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index fd1b481..b00765e 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -43,6 +43,7 @@
#include plat/board.h
#include plat/usb.h
+#include plat/gpmc.h
#include common.h
#include plat/mcspi.h
#include video/omapdss.h
@@ -102,6 +103,12 @@ static void __init omap3_evm_get_revision(void)
}
}
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
#include plat/gpmc-smsc911x.h
@@ -122,7 +129,11 @@ static inline void __init omap3evm_init_smsc911x(void)
smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
}
- gpmc_smsc911x_init(smsc911x_cfg);
+ *gpmc_device_data = gpmc_smsc911x_init(smsc911x_cfg);
+ if (*gpmc_device_data)
+ gpmc_data.num_device++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
@@ -679,6 +690,7 @@ static void __init omap3_evm_init(void)
usbhs_init(usbhs_bdata);
omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
omap3evm_init_smsc911x();
+ omap_init_gpmc(gpmc_data);
omap3_evm_display_init();
omap3_evm_wl12xx_init();
}
--
1.7.10
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[PATCH v4 20/39] ARM: OMAP2+: board omap3beagle: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 671ac1c..74bc7f6 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -517,8 +517,16 @@ static void __init beagle_opp_init(void)
return;
}
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static void __init omap3_beagle_init(void)
{
+ struct omap_nand_platform_data *nand_data;
+
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap3_beagle_init_rev();
@@ -543,9 +551,17 @@ static void __init omap3_beagle_init(void)
usb_musb_init(NULL);
usbhs_init(usbhs_bdata);
- board_nand_init(omap3beagle_nand_partitions,
+ nand_data = board_nand_init(omap3beagle_nand_partitions,
ARRAY_SIZE(omap3beagle_nand_partitions), GPMC_CS_NUM,
NAND_BUSWIDTH_16, NULL);
+ if (nand_data != NULL) {
+ *gpmc_device_data = gpmc_nand_init(nand_data);
+ if (*gpmc_device_data)
+ gpmc_data.num_device++;
+ } else
+ pr_err(error: %s: nand init\n, __func__);
+
+ omap_init_gpmc(gpmc_data);
/* Ensure msecure is mux'd to be able to set the RTC. */
omap_mux_init_signal(sys_drm_msecure, OMAP_PIN_OFF_OUTPUT_HIGH);
--
1.7.10
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[PATCH v4 21/39] ARM: OMAP2+: board apollon: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board code to
provide gpmc driver with required information. It is believed that
apollon board was added before gpmc-smc91x helper functions were
added. Reuse the now available gpmc_smc91x_init adapted for gpmc
driver.
Note: Timing values were hardcoded and written onto registers,
whether making use of gpmc_smc91x_init would configure timing
properly has to be tested.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-apollon.c | 152 +--
1 file changed, 38 insertions(+), 114 deletions(-)
diff --git a/arch/arm/mach-omap2/board-apollon.c
b/arch/arm/mach-omap2/board-apollon.c
index 768ece2..6a402e1 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -39,6 +39,7 @@
#include plat/board.h
#include common.h
#include plat/gpmc.h
+#include plat/gpmc-smc91x.h
#include video/omapdss.h
#include video/omap-panel-generic-dpi.h
@@ -58,6 +59,12 @@
#define APOLLON_ETH_CS 1
#define APOLLON_ETHR_GPIO_IRQ 74
+static struct gpmc_device_pdata *gpmc_device_data[2];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct mtd_partition apollon_partitions[] = {
{
.name = X-Loader + U-Boot,
@@ -97,57 +104,26 @@ static struct onenand_platform_data apollon_flash_data = {
.nr_parts = ARRAY_SIZE(apollon_partitions),
};
-static struct resource apollon_flash_resource[] = {
- [0] = {
- .flags = IORESOURCE_MEM,
- },
+static struct gpmc_cs_data apollon_gpmc_onenand_cs_data = {
+ .cs = APOLLON_FLASH_CS,
+ .mem_size = SZ_128K,
};
-static struct platform_device apollon_onenand_device = {
+static struct gpmc_device_pdata apollon_gpmc_onenand_data = {
.name = onenand-flash,
.id = -1,
- .dev= {
- .platform_data = apollon_flash_data,
- },
- .num_resources = ARRAY_SIZE(apollon_flash_resource),
- .resource = apollon_flash_resource,
-};
-
-static void __init apollon_flash_init(void)
-{
- unsigned long base;
-
- if (gpmc_cs_request(APOLLON_FLASH_CS, SZ_128K, base) 0) {
- printk(KERN_ERR Cannot request OneNAND GPMC CS\n);
- return;
- }
- apollon_flash_resource[0].start = base;
- apollon_flash_resource[0].end = base + SZ_128K - 1;
-}
-
-static struct smc91x_platdata appolon_smc91x_info = {
- .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
- .leda = RPC_LED_100_10,
- .ledb = RPC_LED_TX_RX,
+ .pdata = apollon_flash_data,
+ .pdata_size = sizeof(apollon_flash_data),
+ .cs_data= apollon_gpmc_onenand_cs_data,
+ .num_cs = 1,
};
-static struct resource apollon_smc91x_resources[] = {
- [0] = {
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
- },
-};
-
-static struct platform_device apollon_smc91x_device = {
- .name = smc91x,
- .id = -1,
- .dev= {
- .platform_data = appolon_smc91x_info,
- },
- .num_resources = ARRAY_SIZE(apollon_smc91x_resources),
- .resource = apollon_smc91x_resources,
+static struct omap_smc91x_platform_data apollon_smc91x_data = {
+ .gpio_irq = APOLLON_ETHR_GPIO_IRQ,
+ .cs = APOLLON_ETH_CS,
+ .wait_pin = GPMC_WAITPIN_1,
+ .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHEDGE |
+ GPMC_MUXADDDATA,
};
static struct omap_led_config apollon_led_config[] = {
@@ -185,74 +161,9 @@ static struct platform_device apollon_led_device = {
};
static struct platform_device *apollon_devices[] __initdata = {
- apollon_onenand_device,
- apollon_smc91x_device,
apollon_led_device,
};
-static inline void __init apollon_init_smc91x(void)
-{
- unsigned long base;
-
- unsigned int rate;
- struct clk *gpmc_fck;
- int eth_cs;
- int err;
-
- gpmc_fck = clk_get(NULL, gpmc_fck); /* Always on ENABLE_ON_INIT */
- if (IS_ERR(gpmc_fck)) {
- WARN_ON(1);
- return;
- }
-
- clk_enable(gpmc_fck);
- rate = clk_get_rate(gpmc_fck);
-
- eth_cs = APOLLON_ETH_CS;
-
- /* Make sure CS1 timings are correct */
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200);
-
- if (rate = 16000) {
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
- gpmc_cs_write_reg(eth_cs,
[PATCH v4 22/39] ARM: OMAP2+: board h4: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Remove unused h4_init_debug too.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-h4.c | 130 +---
1 file changed, 15 insertions(+), 115 deletions(-)
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 0bbbabe..7926082 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -186,22 +186,24 @@ static struct physmap_flash_data h4_flash_data = {
.nr_parts = ARRAY_SIZE(h4_partitions),
};
-static struct resource h4_flash_resource = {
- .flags = IORESOURCE_MEM,
+static struct gpmc_cs_data h4_gpmc_cs_flash_data = {
+ .cs = H4_FLASH_CS,
+ .mem_size = SZ_64M,
};
-static struct platform_device h4_flash_device = {
+static struct gpmc_device_pdata h4_gpmc_flash_data = {
.name = physmap-flash,
.id = 0,
- .dev= {
- .platform_data = h4_flash_data,
- },
- .num_resources = 1,
- .resource = h4_flash_resource,
+ .pdata = h4_flash_data,
+ .pdata_size = sizeof(h4_flash_data),
+ .cs_data= h4_gpmc_cs_flash_data,
+ .num_cs = 1,
};
-static struct platform_device *h4_devices[] __initdata = {
- h4_flash_device,
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
};
static struct panel_generic_dpi_data h4_panel_data = {
@@ -226,109 +228,6 @@ static struct omap_dss_board_info h4_dss_data = {
.default_device = h4_lcd_device,
};
-/* 2420 Sysboot setup (2430 is different) */
-static u32 get_sysboot_value(void)
-{
- return (omap_ctrl_readl(OMAP24XX_CONTROL_STATUS)
- (OMAP2_SYSBOOT_5_MASK | OMAP2_SYSBOOT_4_MASK |
-OMAP2_SYSBOOT_3_MASK | OMAP2_SYSBOOT_2_MASK |
-OMAP2_SYSBOOT_1_MASK | OMAP2_SYSBOOT_0_MASK));
-}
-
-/* H4-2420's always used muxed mode, H4-2422's always use non-muxed
- *
- * Note: OMAP-GIT doesn't correctly do is_cpu_omap2422 and is_cpu_omap2423
- * correctly. The macro needs to look at production_id not just hawkeye.
- */
-static u32 is_gpmc_muxed(void)
-{
- u32 mux;
- mux = get_sysboot_value();
- if ((mux 0xF) == 0xd)
- return 1; /* NAND config (could be either) */
- if (mux 0x2) /* if mux'ed */
- return 1;
- else
- return 0;
-}
-
-static inline void __init h4_init_debug(void)
-{
- int eth_cs;
- unsigned long cs_mem_base;
- unsigned int muxed, rate;
- struct clk *gpmc_fck;
-
- eth_cs = H4_SMC91X_CS;
-
- gpmc_fck = clk_get(NULL, gpmc_fck); /* Always on ENABLE_ON_INIT */
- if (IS_ERR(gpmc_fck)) {
- WARN_ON(1);
- return;
- }
-
- clk_enable(gpmc_fck);
- rate = clk_get_rate(gpmc_fck);
- clk_disable(gpmc_fck);
- clk_put(gpmc_fck);
-
- if (is_gpmc_muxed())
- muxed = 0x200;
- else
- muxed = 0;
-
- /* Make sure CS1 timings are correct */
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1,
- 0x00011000 | muxed);
-
- if (rate = 16000) {
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x04C4);
- } else if (rate = 13000) {
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x04C4);
- } else {/* rate = 1 */
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
- gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x03C2);
- }
-
- if (gpmc_cs_request(eth_cs, SZ_16M, cs_mem_base) 0) {
- printk(KERN_ERR Failed to request GPMC mem for smc91x\n);
- goto out;
- }
-
- udelay(100);
-
- omap_mux_init_gpio(92, 0);
- if (debug_card_init(cs_mem_base, H4_ETHR_GPIO_IRQ) 0)
- gpmc_cs_free(eth_cs);
-
-out:
- clk_disable(gpmc_fck);
-
[PATCH v4 23/39] ARM: OMAP2+: board 3630sdp: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-3630sdp.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3630sdp.c
b/arch/arm/mach-omap2/board-3630sdp.c
index 143e47f..4e0298a 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -27,18 +27,29 @@
#include mux.h
#include sdram-hynix-h8mbx00u0mer-0em.h
+static struct gpmc_device_pdata *gpmc_device_data[4];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
static struct omap_smc91x_platform_data board_smc91x_data = {
.cs = 3,
.flags = GPMC_MUX_ADD_DATA | IORESOURCE_IRQ_LOWLEVEL,
.skip_timing= true,
+ .gpio_irq = 158,
};
static void __init board_smc91x_init(void)
{
- board_smc91x_data.gpio_irq = 158;
- gpmc_smc91x_init(board_smc91x_data);
+ *gpmc_cur = gpmc_smc91x_init(board_smc91x_data);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
@@ -204,9 +215,13 @@ static void __init omap_sdp_init(void)
omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
h8mbx00u0mer0em_sdrc_params);
zoom_display_init();
+
board_smc91x_init();
- board_flash_init(sdp_flash_partitions, chip_sel_sdp,
- NAND_BUSWIDTH_16, NULL);
+ gpmc_data.num_device += board_flash_init(sdp_flash_partitions,
+ chip_sel_sdp, NAND_BUSWIDTH_16,
+ gpmc_cur) - gpmc_cur;
+ omap_init_gpmc(gpmc_data);
+
enable_board_wakeup_source();
usbhs_init(usbhs_bdata);
}
--
1.7.10
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[PATCH v4 24/39] ARM: OMAP2+: board 3430sdp: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-3430sdp.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index 367a466..cea5ca5 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -59,6 +59,12 @@
#define TWL4030_MSECURE_GPIO 22
+static struct gpmc_device_pdata *gpmc_device_data[4];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
static uint32_t board_keymap[] = {
KEY(0, 0, KEY_LEFT),
KEY(0, 1, KEY_RIGHT),
@@ -444,7 +450,11 @@ static void __init board_smc91x_init(void)
else
board_smc91x_data.gpio_irq = 29;
- gpmc_smc91x_init(board_smc91x_data);
+ *gpmc_cur = gpmc_smc91x_init(board_smc91x_data);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
@@ -621,7 +631,10 @@ static void __init omap_3430sdp_init(void)
omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
usb_musb_init(NULL);
board_smc91x_init();
- board_flash_init(sdp_flash_partitions, chip_sel_3430, 0, NULL);
+ gpmc_data.num_device += board_flash_init(sdp_flash_partitions,
+ chip_sel_3430, 0, gpmc_cur) - gpmc_cur;
+ omap_init_gpmc(gpmc_data);
+
sdp3430_display_init();
enable_board_wakeup_source();
usbhs_init(usbhs_bdata);
--
1.7.10
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[PATCH v4 25/39] ARM: OMAP2+: board 2430sdp: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-2430sdp.c | 42 +--
1 file changed, 25 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c
b/arch/arm/mach-omap2/board-2430sdp.c
index 68679a8..d94ada4 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -46,9 +46,16 @@
#include hsmmc.h
#include common-board-devices.h
-#define SDP2430_CS0_BASE 0x0400
+#define SDP2430_FLASH_CS 0
#define SECONDARY_LCD_GPIO 147
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct mtd_partition sdp2430_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
{
@@ -86,24 +93,18 @@ static struct physmap_flash_data sdp2430_flash_data = {
.nr_parts = ARRAY_SIZE(sdp2430_partitions),
};
-static struct resource sdp2430_flash_resource = {
- .start = SDP2430_CS0_BASE,
- .end= SDP2430_CS0_BASE + SZ_64M - 1,
- .flags = IORESOURCE_MEM,
+static struct gpmc_cs_data sdp2430_gpmc_cs_flash_data = {
+ .cs = SDP2430_FLASH_CS,
+ .mem_size = SZ_64M,
};
-static struct platform_device sdp2430_flash_device = {
+static struct gpmc_device_pdata sdp2430_gpmc_flash_device = {
.name = physmap-flash,
.id = 0,
- .dev = {
- .platform_data = sdp2430_flash_data,
- },
- .num_resources = 1,
- .resource = sdp2430_flash_resource,
-};
-
-static struct platform_device *sdp2430_devices[] __initdata = {
- sdp2430_flash_device,
+ .pdata = sdp2430_flash_data,
+ .pdata_size = sizeof(sdp2430_flash_data),
+ .cs_data= sdp2430_gpmc_cs_flash_data,
+ .num_cs = 1,
};
/* LCD */
@@ -181,7 +182,11 @@ static struct omap_smc91x_platform_data board_smc91x_data
= {
static void __init board_smc91x_init(void)
{
omap_mux_init_gpio(149, OMAP_PIN_INPUT);
- gpmc_smc91x_init(board_smc91x_data);
+ *gpmc_cur = gpmc_smc91x_init(board_smc91x_data);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
@@ -276,7 +281,9 @@ static void __init omap_2430sdp_init(void)
omap2430_i2c_init();
- platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
+ *gpmc_cur++ = sdp2430_gpmc_flash_device;
+ gpmc_data.num_device++;
+
omap_serial_init();
omap_sdrc_init(NULL, NULL);
omap_hsmmc_init(mmc);
@@ -286,6 +293,7 @@ static void __init omap_2430sdp_init(void)
usb_musb_init(NULL);
board_smc91x_init();
+ omap_init_gpmc(gpmc_data);
/* Turn off secondary LCD backlight */
gpio_request_one(SECONDARY_LCD_GPIO, GPIOF_OUT_INIT_LOW,
--
1.7.10
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[PATCH v4 26/39] ARM: OMAP2+: board cm-t3517: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-cm-t3517.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c
b/arch/arm/mach-omap2/board-cm-t3517.c
index 9e66e16..6aa6b4a 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -234,6 +234,11 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
},
};
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
static struct omap_nand_platform_data cm_t3517_nand_data = {
.parts = cm_t3517_nand_partitions,
.nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions),
@@ -242,8 +247,8 @@ static struct omap_nand_platform_data cm_t3517_nand_data = {
static void __init cm_t3517_init_nand(void)
{
- if (gpmc_nand_init(cm_t3517_nand_data) 0)
- pr_err(CM-T3517: NAND initialization failed\n);
+ *gpmc_device_data = gpmc_nand_init(cm_t3517_nand_data);
+ gpmc_data.num_device++;
}
#else
static inline void cm_t3517_init_nand(void) {}
@@ -289,6 +294,7 @@ static void __init cm_t3517_init(void)
omap_board_config_size = ARRAY_SIZE(cm_t3517_config);
cm_t3517_init_leds();
cm_t3517_init_nand();
+ omap_init_gpmc(gpmc_data);
cm_t3517_init_rtc();
cm_t3517_init_usbh();
cm_t3517_init_hecc();
--
1.7.10
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[PATCH v4 27/39] ARM: OMAP2+: board cm-t35: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-cm-t35.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-cm-t35.c
b/arch/arm/mach-omap2/board-cm-t35.c
index 909a8b9..5b0b637 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -66,6 +66,13 @@
#include linux/smsc911x.h
#include plat/gpmc-smsc911x.h
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
.id = 0,
.cs = CM_T35_SMSC911X_CS,
@@ -99,8 +106,17 @@ static void __init cm_t35_init_ethernet(void)
regulator_register_fixed(1, sb_t35_smsc911x_supplies,
ARRAY_SIZE(sb_t35_smsc911x_supplies));
- gpmc_smsc911x_init(cm_t35_smsc911x_cfg);
- gpmc_smsc911x_init(sb_t35_smsc911x_cfg);
+ *gpmc_cur = gpmc_smsc911x_init(cm_t35_smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: initilaizing gpmc smsc911x instance 1\n);
+
+ *gpmc_cur = gpmc_smsc911x_init(sb_t35_smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: initilaizing gpmc smsc911x instance 2\n);
}
#else
static inline void __init cm_t35_init_ethernet(void) { return; }
@@ -658,6 +674,7 @@ static void __init cm_t3x_common_init(void)
cm_t35_init_i2c();
omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
cm_t35_init_ethernet();
+ omap_init_gpmc(gpmc_data);
cm_t35_init_led();
cm_t35_init_display();
--
1.7.10
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[PATCH v4 28/39] ARM: OMAP2+: board ldp: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-ldp.c | 26 +++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index b76f28d..1ebc024 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -43,6 +43,7 @@
#include asm/delay.h
#include plat/usb.h
#include plat/gpmc-smsc911x.h
+#include plat/nand.h
#include video/omapdss.h
#include video/omap-panel-generic-dpi.h
@@ -58,6 +59,13 @@
#define DEBUG_BASE 0x0800
#define LDP_ETHR_START DEBUG_BASE
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static uint32_t board_keymap[] = {
KEY(0, 0, KEY_1),
KEY(1, 0, KEY_2),
@@ -180,7 +188,9 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
static inline void __init ldp_init_smsc911x(void)
{
- gpmc_smsc911x_init(smsc911x_cfg);
+ *gpmc_cur = gpmc_smsc911x_init(smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
}
/* LCD */
@@ -418,6 +428,8 @@ static struct regulator_consumer_supply dummy_supplies[] = {
static void __init omap_ldp_init(void)
{
+ struct omap_nand_platform_data *nand_data;
+
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
ldp_init_smsc911x();
@@ -427,8 +439,16 @@ static void __init omap_ldp_init(void)
omap_serial_init();
omap_sdrc_init(NULL, NULL);
usb_musb_init(NULL);
- board_nand_init(ldp_nand_partitions, ARRAY_SIZE(ldp_nand_partitions),
- ZOOM_NAND_CS, 0, nand_default_timings);
+
+ nand_data = board_nand_init(ldp_nand_partitions,
+ ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS,
+ 0, nand_default_timings);
+ if (nand_data != NULL) {
+ *gpmc_cur++ = gpmc_nand_init(nand_data);
+ gpmc_data.num_device++;
+ }
+
+ omap_init_gpmc(gpmc_data);
omap_hsmmc_init(mmc);
ldp_display_init();
--
1.7.10
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[PATCH v4 29/39] ARM: OMAP2+: board n8x0: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-n8x0.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 94f6077..d3d866a 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -36,6 +36,7 @@
#include plat/onenand.h
#include plat/mmc.h
#include plat/serial.h
+#include plat/gpmc.h
#include mux.h
@@ -45,6 +46,13 @@
#define TUSB6010_GPIO_ENABLE 0
#define TUSB6010_DMACHAN 0x3f
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_USB_MUSB_TUSB6010) ||
defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
/*
* Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
@@ -114,10 +122,12 @@ static void __init n8x0_usb_init(void)
}
tusb_set_power(0);
- ret = tusb6010_setup_interface(tusb_data, TUSB6010_REFCLK_19, 2,
+ *gpmc_cur = tusb6010_setup_interface(tusb_data, TUSB6010_REFCLK_19, 2,
TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
- if (ret != 0)
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
goto err;
printk(announce);
@@ -785,7 +795,9 @@ static void __init n8x0_init_machine(void)
ARRAY_SIZE(n810_i2c_board_info_2));
board_serial_init();
omap_sdrc_init(NULL, NULL);
- gpmc_onenand_init(board_onenand_data);
+ *gpmc_cur++ = gpmc_onenand_init(board_onenand_data);
+ gpmc_data.num_device++;
+ omap_init_gpmc(gpmc_data);
n8x0_mmc_init();
n8x0_usb_init();
}
--
1.7.10
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[PATCH v4 30/39] ARM: OMAP2+: board omap3logic: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap3logic.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-omap3logic.c
b/arch/arm/mach-omap2/board-omap3logic.c
index 9b3c141..9867fc8 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -55,6 +55,12 @@
#define OMAP3_TORPEDO_MMC_GPIO_CD 127
#define OMAP3_TORPEDO_SMSC911X_GPIO_IRQ129
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct regulator_consumer_supply omap3logic_vmmc1_supply[] = {
REGULATOR_SUPPLY(vmmc, omap_hsmmc.0),
};
@@ -180,7 +186,11 @@ static inline void __init board_smsc911x_init(void)
return;
}
- gpmc_smsc911x_init(board_smsc911x_data);
+ *gpmc_device_data = gpmc_smsc911x_init(board_smsc911x_data);
+ if (*gpmc_device_data)
+ gpmc_data.num_device++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#ifdef CONFIG_OMAP_MUX
@@ -204,6 +214,7 @@ static void __init omap3logic_init(void)
omap_sdrc_init(NULL, NULL);
board_mmc_init();
board_smsc911x_init();
+ omap_init_gpmc(gpmc_data);
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal(sdrc_cke0, OMAP_PIN_OUTPUT);
--
1.7.10
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[PATCH v4 31/39] ARM: OMAP2+: board omap3pandora: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap3pandora.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c
b/arch/arm/mach-omap2/board-omap3pandora.c
index 33d995d..25b2de6 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -57,6 +57,12 @@
#define PANDORA_WIFI_NRESET_GPIO 23
#define OMAP3_PANDORA_TS_GPIO 94
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct mtd_partition omap3pandora_nand_partitions[] = {
{
.name = xloader,
@@ -607,8 +613,9 @@ static void __init omap3pandora_init(void)
omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
usbhs_init(usbhs_bdata);
usb_musb_init(NULL);
- gpmc_nand_init(pandora_nand_data);
-
+ *gpmc_device_data = gpmc_nand_init(pandora_nand_data);
+ gpmc_data.num_device++;
+ omap_init_gpmc(gpmc_data);
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal(sdrc_cke0, OMAP_PIN_OUTPUT);
omap_mux_init_signal(sdrc_cke1, OMAP_PIN_OUTPUT);
--
1.7.10
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[PATCH v4 32/39] ARM: OMAP2+: board omap3stalker: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap3stalker.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c
b/arch/arm/mach-omap2/board-omap3stalker.c
index 4dffc95..5e92d54 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -56,6 +56,12 @@
#include hsmmc.h
#include common-board-devices.h
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
#include plat/gpmc-smsc911x.h
@@ -74,7 +80,11 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
static inline void __init omap3stalker_init_eth(void)
{
omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP);
- gpmc_smsc911x_init(smsc911x_cfg);
+ *gpmc_device_data = gpmc_smsc911x_init(smsc911x_cfg);
+ if (*gpmc_device_data)
+ gpmc_data.num_device++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
@@ -443,6 +453,7 @@ static void __init omap3_stalker_init(void)
omap_mux_init_gpio(18, OMAP_PIN_INPUT_PULLUP);
omap3stalker_init_eth();
+ omap_init_gpmc(gpmc_data);
omap3_stalker_display_init();
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal(sdr_cke0, OMAP_PIN_OUTPUT);
--
1.7.10
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[PATCH v4 33/39] ARM: OMAP2+: board omap4pcm049: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-omap4pcm049.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-omap4pcm049.c
b/arch/arm/mach-omap2/board-omap4pcm049.c
index 81de7d5..b4ead86 100644
--- a/arch/arm/mach-omap2/board-omap4pcm049.c
+++ b/arch/arm/mach-omap2/board-omap4pcm049.c
@@ -130,6 +130,12 @@ static struct omap2_hsmmc_info mmc[] = {
}, {} /* Terminator */
};
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY(vddvario, smsc911x.0),
@@ -147,7 +153,11 @@ static inline void __init pcm049_init_smsc911x(void)
{
omap_mux_init_gpio(OMAP4_PCM049_ETH_GPIO_IRQ, OMAP_PIN_INPUT);
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
- gpmc_smsc911x_init(board_smsc911x_data);
+ *gpmc_device_data = gpmc_smsc911x_init(board_smsc911x_data);
+ if (*gpmc_device_data)
+ gpmc_data.num_device++;
+ else
+ pr_err(error: unable to initilaize gpmc smsc911x\n);
}
#else
static inline void __init pcm049_init_smsc911x(void) { return; }
@@ -562,6 +572,7 @@ static void __init pcm049_init(void)
pm_power_off = pcm049_power_off;
omap4_mux_init(board_mux, NULL, OMAP_PACKAGE_CBS);
pcm049_init_smsc911x();
+ omap_init_gpmc(gpmc_data);
pcm049_i2c_init();
platform_add_devices(pcm049_devices, ARRAY_SIZE(pcm049_devices));
board_serial_init();
--
1.7.10
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[PATCH v4 34/39] ARM: OMAP2+: board overo: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-overo.c | 29 ++---
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/board-overo.c
b/arch/arm/mach-omap2/board-overo.c
index e08479a..fa0197e 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -72,6 +72,13 @@
#define OVERO_SMSC911X2_CS 4
#define OVERO_SMSC911X2_GPIO 65
+static struct gpmc_device_pdata *gpmc_device_data[3];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
@@ -137,8 +144,16 @@ static struct omap_smsc911x_platform_data smsc911x2_cfg = {
static void __init overo_init_smsc911x(void)
{
- gpmc_smsc911x_init(smsc911x_cfg);
- gpmc_smsc911x_init(smsc911x2_cfg);
+ *gpmc_cur = gpmc_smsc911x_init(smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: %s: smsc911x instance 1 setup\n, __func__);
+ *gpmc_cur = gpmc_smsc911x_init(smsc911x2_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: %s: smsc911x instance 1 setup\n, __func__);
}
#else
@@ -509,6 +524,7 @@ static struct regulator_consumer_supply dummy_supplies[] = {
static void __init overo_init(void)
{
int ret;
+ struct omap_nand_platform_data *nand_data;
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -518,12 +534,19 @@ static void __init overo_init(void)
omap_serial_init();
omap_sdrc_init(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
- board_nand_init(overo_nand_partitions,
+
+ nand_data = board_nand_init(overo_nand_partitions,
ARRAY_SIZE(overo_nand_partitions), GPMC_CS_NUM, 0, NULL);
+ if (nand_data != NULL) {
+ *gpmc_cur++ = gpmc_nand_init(nand_data);
+ gpmc_data.num_device++;
+ }
+
usb_musb_init(NULL);
usbhs_init(usbhs_bdata);
overo_spi_init();
overo_init_smsc911x();
+ omap_init_gpmc(gpmc_data);
overo_display_init();
overo_init_led();
overo_init_keys();
--
1.7.10
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[PATCH v4 35/39] ARM: OMAP2+: board rm680: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-rm680.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/board-rm680.c
b/arch/arm/mach-omap2/board-rm680.c
index ae53d71..e28e606 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -33,6 +33,12 @@
#include sdram-nokia.h
#include common-board-devices.h
+static struct gpmc_device_pdata *gpmc_device_data[1];
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
REGULATOR_SUPPLY(vmmc, omap_hsmmc.1),
};
@@ -119,7 +125,8 @@ static void __init rm680_peripherals_init(void)
platform_add_devices(rm680_peripherals_devices,
ARRAY_SIZE(rm680_peripherals_devices));
rm680_i2c_init();
- gpmc_onenand_init(board_onenand_data);
+ *gpmc_device_data = gpmc_onenand_init(board_onenand_data);
+ gpmc_data.num_device++;
omap_hsmmc_init(mmc);
}
@@ -141,6 +148,7 @@ static void __init rm680_init(void)
usb_musb_init(NULL);
rm680_peripherals_init();
+ omap_init_gpmc(gpmc_data);
}
MACHINE_START(NOKIA_RM680, Nokia RM-680 board)
--
1.7.10
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[PATCH v4 36/39] ARM: OMAP2+: board rx51: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index ae957c9..af7909e 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -73,6 +73,13 @@ enum {
static struct wl12xx_platform_data wl1251_pdata;
static struct tsc2005_platform_data tsc2005_pdata;
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
.cover_comp_gain = 16,
@@ -1039,7 +1046,11 @@ static void __init board_smc91x_init(void)
omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
- gpmc_smc91x_init(board_smc91x_data);
+ *gpmc_cur = gpmc_smc91x_init(board_smc91x_data);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: gpmc smsc911x setup\n);
}
#else
@@ -1136,8 +1147,10 @@ void __init rx51_peripherals_init(void)
{
rx51_i2c_init();
regulator_has_full_constraints();
- gpmc_onenand_init(board_onenand_data);
+ *gpmc_cur++ = gpmc_onenand_init(board_onenand_data);
+ gpmc_data.num_device++;
board_smc91x_init();
+ omap_init_gpmc(gpmc_data);
rx51_add_gpio_keys();
rx51_init_wl1251();
rx51_init_tsc2005();
--
1.7.10
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[PATCH v4 37/39] ARM: OMAP2+: board zoom-debugboard: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-zoom-debugboard.c | 47 +++
1 file changed, 27 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c
b/arch/arm/mach-omap2/board-zoom-debugboard.c
index f64f441..dae7df2 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -31,6 +31,13 @@
#define DEBUG_BASE 0x0800
#define ZOOM_ETHR_STARTDEBUG_BASE
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
static struct omap_smsc911x_platform_data zoom_smsc911x_cfg = {
.cs = ZOOM_SMSC911X_CS,
.gpio_irq = ZOOM_SMSC911X_GPIO,
@@ -40,7 +47,11 @@ static struct omap_smsc911x_platform_data zoom_smsc911x_cfg
= {
static inline void __init zoom_init_smsc911x(void)
{
- gpmc_smsc911x_init(zoom_smsc911x_cfg);
+ *gpmc_cur = gpmc_smsc911x_init(zoom_smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: %s: gpmc smsc911x setup\n, __func__);
}
static struct plat_serial8250_port serial_platform_data[] = {
@@ -56,18 +67,22 @@ static struct plat_serial8250_port serial_platform_data[] =
{
}
};
-static struct platform_device zoom_debugboard_serial_device = {
+static struct gpmc_cs_data zoom_debugboard_gpmc_cs_serial_data = {
+ .cs = ZOOM_QUADUART_CS,
+ .mem_size = SZ_1M,
+};
+
+static struct gpmc_device_pdata zoom_debugboard_gpmc_serial_data = {
.name = serial8250,
.id = PLAT8250_DEV_PLATFORM,
- .dev= {
- .platform_data = serial_platform_data,
- },
+ .pdata = serial_platform_data,
+ .pdata_size = sizeof(serial_platform_data),
+ .cs_data= zoom_debugboard_gpmc_cs_serial_data,
+ .num_cs = 1,
};
static inline void __init zoom_init_quaduart(void)
{
- int quart_cs;
- unsigned long cs_mem_base;
int quart_gpio = 0;
if (gpio_request_one(ZOOM_QUADUART_RST_GPIO,
@@ -78,14 +93,6 @@ static inline void __init zoom_init_quaduart(void)
return;
}
- quart_cs = ZOOM_QUADUART_CS;
-
- if (gpmc_cs_request(quart_cs, SZ_1M, cs_mem_base) 0) {
- printk(KERN_ERR Failed to request GPMC mem
- for Quad UART(TL16CP754C)\n);
- return;
- }
-
quart_gpio = ZOOM_QUADUART_GPIO;
if (gpio_request_one(quart_gpio, GPIOF_IN, TL16CP754C GPIO) 0)
@@ -93,6 +100,9 @@ static inline void __init zoom_init_quaduart(void)
quart_gpio);
serial_platform_data[0].irq = gpio_to_irq(102);
+
+ *gpmc_cur++ = zoom_debugboard_gpmc_serial_data;
+ gpmc_data.num_device++;
}
static inline int omap_zoom_debugboard_detect(void)
@@ -116,10 +126,6 @@ static inline int omap_zoom_debugboard_detect(void)
return ret;
}
-static struct platform_device *zoom_devices[] __initdata = {
- zoom_debugboard_serial_device,
-};
-
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY(vddvario, smsc911x.0),
REGULATOR_SUPPLY(vdd33a, smsc911x.0),
@@ -133,5 +139,6 @@ int __init zoom_debugboard_init(void)
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
zoom_init_smsc911x();
zoom_init_quaduart();
- return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices));
+ omap_init_gpmc(gpmc_data);
+ return 0;
}
--
1.7.10
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[PATCH v4 39/39] ARM: OMAP2+: board igep0020: gpmc driver adaptation
gpmc code has been converted to driver. Modify the board
code to provide gpmc driver with required information.
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/board-igep0020.c | 32
1 file changed, 28 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index 6d171ca..91de8ce 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -36,6 +36,7 @@
#include video/omapdss.h
#include video/omap-panel-dvi.h
#include plat/onenand.h
+#include plat/nand.h
#include mux.h
#include hsmmc.h
@@ -118,6 +119,13 @@ static void __init igep2_get_revision(void)
gpio_free(IGEP2_GPIO_LED1_RED);
}
+static struct gpmc_device_pdata *gpmc_device_data[2];
+static struct gpmc_device_pdata **gpmc_cur = gpmc_device_data;
+
+static struct gpmc_pdata gpmc_data = {
+ .device_pdata = gpmc_device_data,
+};
+
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) || \
defined(CONFIG_MTD_NAND_OMAP2) || \
@@ -172,14 +180,26 @@ static void __init igep_flash_init(void)
mux = igep_get_sysboot_value();
if (mux == IGEP_SYSBOOT_NAND) {
+ struct omap_nand_platform_data *nand_data;
+
pr_info(IGEP: initializing NAND memory device\n);
- board_nand_init(igep_flash_partitions,
+ nand_data = board_nand_init(igep_flash_partitions,
ARRAY_SIZE(igep_flash_partitions),
- 0, NAND_BUSWIDTH_16, NULL);
+ 0, NAND_BUSWIDTH_16, nand_default_timings);
+ if (nand_data != NULL) {
+ *gpmc_cur++ = gpmc_nand_init(nand_data);
+ gpmc_data.num_device++;
+ }
} else if (mux == IGEP_SYSBOOT_ONENAND) {
+ struct omap_onenand_platform_data *onenand_data;
+
pr_info(IGEP: initializing OneNAND memory device\n);
- board_onenand_init(igep_flash_partitions,
+ onenand_data = board_onenand_init(igep_flash_partitions,
ARRAY_SIZE(igep_flash_partitions), 0);
+ if (onenand_data != NULL) {
+ *gpmc_cur++ = gpmc_onenand_init(onenand_data);
+ gpmc_data.num_device++;
+ }
} else
pr_err(IGEP: Flash: unsupported sysboot sequence found\n);
}
@@ -202,7 +222,11 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
static inline void __init igep2_init_smsc911x(void)
{
- gpmc_smsc911x_init(smsc911x_cfg);
+ *gpmc_cur = gpmc_smsc911x_init(smsc911x_cfg);
+ if (*gpmc_cur)
+ gpmc_data.num_device++, gpmc_cur++;
+ else
+ pr_err(error: gpmc smsc911x setup\n);
}
#else
--
1.7.10
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[PATCH v4 38/39] OMAP3: igep0020: Add support for Micron NAND Flash storage memory
From: Javier Martinez Canillas jav...@dowhile0.org
IGEP-based boards can have two different flash memories, a OneNAND or
a NAND device. The boot configuration pins (sys_boot) are used to
specify which memory is available.
Also, this patch removes unnecesary code for registering the OneNAND.
af...@ti.com: Update to use modified board_nand_init
Signed-off-by: Javier Martinez Canillas jav...@dowhile0.org
Signed-off-by: Afzal Mohammed af...@ti.com
fixup: igep
---
arch/arm/mach-omap2/board-igep0020.c | 75 ++
1 file changed, 31 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index 930c0d3..6d171ca 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -24,6 +24,8 @@
#include linux/i2c/twl.h
#include linux/mmc/host.h
+#include linux/mtd/nand.h
+
#include asm/mach-types.h
#include asm/mach/arch.h
@@ -39,6 +41,8 @@
#include hsmmc.h
#include sdram-numonyx-m65kam.h
#include common-board-devices.h
+#include board-flash.h
+#include control.h
#define IGEP2_SMSC911X_CS 5
#define IGEP2_SMSC911X_GPIO 176
@@ -60,6 +64,10 @@
#define IGEP3_GPIO_LED1_RED16
#define IGEP3_GPIO_USBH_NRESET 183
+#define IGEP_SYSBOOT_MASK 0x1f
+#define IGEP_SYSBOOT_NAND 0x0f
+#define IGEP_SYSBOOT_ONENAND0x10
+
/*
* IGEP2 Hardware Revision Table
*
@@ -110,8 +118,10 @@ static void __init igep2_get_revision(void)
gpio_free(IGEP2_GPIO_LED1_RED);
}
-#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
- defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
+ defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) || \
+ defined(CONFIG_MTD_NAND_OMAP2) || \
+ defined(CONFIG_MTD_NAND_OMAP2_MODULE)
#define ONENAND_MAP 0x2000
@@ -123,7 +133,7 @@ static void __init igep2_get_revision(void)
* So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048)
*/
-static struct mtd_partition igep_onenand_partitions[] = {
+static struct mtd_partition igep_flash_partitions[] = {
{
.name = X-Loader,
.offset = 0,
@@ -151,50 +161,27 @@ static struct mtd_partition igep_onenand_partitions[] = {
},
};
-static struct omap_onenand_platform_data igep_onenand_data = {
- .parts = igep_onenand_partitions,
- .nr_parts = ARRAY_SIZE(igep_onenand_partitions),
- .dma_channel= -1, /* disable DMA in OMAP OneNAND driver */
-};
-
-static struct platform_device igep_onenand_device = {
- .name = omap2-onenand,
- .id = -1,
- .dev = {
- .platform_data = igep_onenand_data,
- },
-};
+static inline u32 igep_get_sysboot_value(void)
+{
+ return omap_ctrl_readl(OMAP343X_CONTROL_STATUS) IGEP_SYSBOOT_MASK;
+}
static void __init igep_flash_init(void)
{
- u8 cs = 0;
- u8 onenandcs = GPMC_CS_NUM + 1;
-
- for (cs = 0; cs GPMC_CS_NUM; cs++) {
- u32 ret;
- ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
-
- /* Check if NAND/oneNAND is configured */
- if ((ret 0xC00) == 0x800)
- /* NAND found */
- pr_err(IGEP: Unsupported NAND found\n);
- else {
- ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
- if ((ret 0x3F) == (ONENAND_MAP 24))
- /* ONENAND found */
- onenandcs = cs;
- }
- }
-
- if (onenandcs GPMC_CS_NUM) {
- pr_err(IGEP: Unable to find configuration in GPMC\n);
- return;
- }
-
- igep_onenand_data.cs = onenandcs;
-
- if (platform_device_register(igep_onenand_device) 0)
- pr_err(IGEP: Unable to register OneNAND device\n);
+ u32 mux;
+ mux = igep_get_sysboot_value();
+
+ if (mux == IGEP_SYSBOOT_NAND) {
+ pr_info(IGEP: initializing NAND memory device\n);
+ board_nand_init(igep_flash_partitions,
+ ARRAY_SIZE(igep_flash_partitions),
+ 0, NAND_BUSWIDTH_16, NULL);
+ } else if (mux == IGEP_SYSBOOT_ONENAND) {
+ pr_info(IGEP: initializing OneNAND memory device\n);
+ board_onenand_init(igep_flash_partitions,
+ ARRAY_SIZE(igep_flash_partitions), 0);
+ } else
+ pr_err(IGEP: Flash: unsupported sysboot sequence found\n);
}
#else
--
1.7.10
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RE: OMAP3EVM not booting on l-o master
Hi Kevin, On Tue, May 01, 2012 at 02:10:28, Hilman, Kevin wrote: Afzal, care to give this one a test as well? It should have the same result but is a more targetted fix. With and ack from Tero and a Tested-by from you, I'll post this to the list and and queue it up for v3.5. Over what commit id, should this patch be applied ?, unable to apply it over 297624c ARM: OMAP3: PM: Remove IO Daisychain control from cpuidle, the one that I tested your previous patch. Regards Afzal From 274ded7fbe573bbbe45db80bdc1989272077c011 Mon Sep 17 00:00:00 2001 From: Kevin Hilman khil...@ti.com Date: Fri, 27 Apr 2012 16:05:51 -0700 Subject: [PATCH] ARM: OMAP3: PM: leave PRCM interrupts disabled until explicitly enabled. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/5] ARM: OMAP2+: PM: implement a caching mechanism on the power domains state registers
From: Jean Pihet j-pi...@ti.com The OMAP3 PRCM registers accesses are known to be slow, with a PRCM register read taking up to 12-14us depending on the OPP. This patch adds a caching mechanism on the power domains state registers. When the cache is cold or has been invalidated a register access is performed, otherwise the register value is retrieved from the registers cache. The API is made of read and write functions for fields in the cache, as well as an invalidate and helper functions to invalidate parts of the cache contents (i.e. previous, current power states and all fields in the cache). The power domain code is converted to use the API to read and write the previous, current and next states for the power domains states, logical and memory states. The PM debug code also uses the caching API instead of the internal pwrdm-state variable. Using the caching mechanism optimizes the performance of the system in the transitions to and from the low power states. Tested on Beagleboard using cpuidle in RET and OFF modes. Based on the linux-omap git tree (3.4.0-rc2) [1] with the changes for the functional power states [2] and the per-device PM QoS support for OMAP [3]. [1] git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git [2] http://marc.info/?l=linux-omapm=133475291911194w=2 [3] http://marc.info/?l=linux-omapm=133475685213067w=2 Jean Pihet (5): ARM: OMAP2+: PM: implement a caching mechanism on the power domains state registers ARM: OMAP2+: PM: use the power domains registers cache for the power states ARM: OMAP2+: PM: use the power domains registers cache for the logic and mem states ARM: OMAP2+: PM: use the power domains registers cache invalidate API ARM: OMAP2+: PM debug: use the power domains registers caching API arch/arm/mach-omap2/pm-debug.c| 16 ++- arch/arm/mach-omap2/pm34xx.c |6 + arch/arm/mach-omap2/powerdomain.c | 272 - arch/arm/mach-omap2/powerdomain.h | 45 ++- 4 files changed, 297 insertions(+), 42 deletions(-) -- 1.7.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/5] ARM: OMAP2+: PM: implement a caching mechanism on the power domains state registers
From: Jean Pihet j-pi...@ti.com
The OMAP3 PRCM registers accesses are known to be slow. A PRCM read
can take up to 12-14us depending on the OPP.
This patch adds a caching mechanism on the power domains state registers.
When the cache is cold or has been invalidated a register access is
performed, otherwise the register value is retrieved from the registers
cache.
The API is made of read and write functions for fields in the cache, as well
as an invalidate function and helper functions to invalidate parts of the
cache contents (i.e. previous, current power states and all fields in the
cache).
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/powerdomain.c | 128 +
arch/arm/mach-omap2/powerdomain.h | 45 -
2 files changed, 171 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 100c422..18e1ffc 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -697,6 +697,134 @@ out:
}
/**
+ * pwrdm_cache_read - read from the registers cache
+ * @pwrdm: struct powerdomain *
+ * @index: index of the data to be read from the cache
+ * @value: data value to be returned
+ *
+ * Returns 0 if the data is read from the cache.
+ * Returns -ENODATA if the data is not present, -EINVAL if the data is
+ * to be read past the end of the cache.
+ */
+static int pwrdm_cache_read(struct powerdomain *pwrdm, int index, int *value)
+{
+ if (index = PWRDM_CACHE_SIZE)
+ return -EINVAL;
+
+ if (!(pwrdm-cache_state (1 index)))
+ return -ENODATA;
+
+ *value = pwrdm-cache[index];
+ return 0;
+}
+
+/**
+ * pwrdm_cache_write - store data to the registers cache
+ * @pwrdm: struct powerdomain *
+ * @index: index of the data to write to the cache
+ * @value: data value to be stored
+ *
+ * Stores the data in the cache and maintains the internal cache state.
+ *
+ * Returns -EINVAL if the data is to be written past the end of the cache,
+ * 0 otherwise.
+ */
+static int pwrdm_cache_write(struct powerdomain *pwrdm, int index, int value)
+{
+ if (index = PWRDM_CACHE_SIZE)
+ return -EINVAL;
+
+ pwrdm-cache[index] = value;
+ pwrdm-cache_state |= (1 index);
+
+ return 0;
+}
+
+/**
+ * pwrdm_invalidate_regs_cache_fields - invalidate fields in the
+ * power domain registers cache
+ * @pwrdm: struct powerdomain *
+ * @mask: cache fields to invalidate, made by OR'ing the
+ * PWRDM_CACHE_* values
+ *
+ * If pwrdm is NULL, invalidate the fields for all power domains,
+ * otherwise invalidate them for the given pwrdm only.
+ *
+ * Invalidates some of the power domain cache fields, thus imposing
+ * an effective re-read from the HW register at the next access.
+ */
+void pwrdm_invalidate_regs_cache_fields(struct powerdomain *pwrdm, int mask)
+{
+ struct powerdomain *temp_pwrdm;
+
+ if (pwrdm) {
+ pwrdm-cache_state = ~mask;
+ } else {
+ list_for_each_entry(temp_pwrdm, pwrdm_list, node)
+ temp_pwrdm-cache_state = ~mask;
+ }
+}
+
+/**
+ * pwrdm_invalidate_regs_cache_fields_prev - invalidate the previous states
+ * in the power domain registers cache
+ * @pwrdm: struct powerdomain *
+ *
+ * If pwrdm is NULL, invalidate the previous states for all power domains,
+ * otherwise invalidate them for the given pwrdm only.
+ *
+ * Invalidates only the previous states of the power domain cache fields,
+ * thus imposing an effective re-read from the HW register at the next access.
+ */
+void pwrdm_invalidate_regs_cache_fields_prev(struct powerdomain *pwrdm)
+{
+ int i;
+
+ pwrdm_invalidate_regs_cache_fields(pwrdm,
+ PWRDM_CACHE_PREV_PWRST |
+ PWRDM_CACHE_PREV_LOGIC_PWRST);
+ for (i = 0; i PWRDM_MAX_MEM_BANKS; i++)
+ pwrdm_invalidate_regs_cache_fields(pwrdm,
+ PWRDM_CACHE_PREV_MEM_PWRST + i);
+}
+
+/**
+ * pwrdm_invalidate_regs_cache_fields_current - invalidate the current
+ * states in the power domains' registers cache
+ *
+ * If pwrdm is NULL, invalidate the current states for all power domains,
+ * otherwise invalidate them for the given pwrdm only.
+ *
+ * Invalidates only the current states of the power domains cache fields,
+ * thus imposing an effective re-read from the HW register at the next access.
+ */
+void pwrdm_invalidate_regs_cache_fields_current(struct powerdomain *pwrdm)
+{
+ int i;
+
+ pwrdm_invalidate_regs_cache_fields(pwrdm, PWRDM_CACHE_PWRST |
+ PWRDM_CACHE_LOGIC_RETST);
+ for (i = 0; i PWRDM_MAX_MEM_BANKS; i++) {
+ pwrdm_invalidate_regs_cache_fields(pwrdm,
+ PWRDM_CACHE_MEM_PWRST + i);
+ pwrdm_invalidate_regs_cache_fields(pwrdm,
+
[PATCH 2/5] ARM: OMAP2+: PM: use the power domains registers cache for the power states
From: Jean Pihet j-pi...@ti.com
Use the caching API for the previous, current and next power domains states.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/powerdomain.c | 32 ++--
1 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 18e1ffc..2058e27 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -854,6 +854,8 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8
pwrst)
smp_processor_id());
/* Program the pwrdm desired target state */
ret = arch_pwrdm-pwrdm_set_next_pwrst(pwrdm, pwrst);
+ if (!ret)
+ pwrdm_cache_write(pwrdm, PWRDM_CACHE_NEXT_PWRST, pwrst);
}
return ret;
@@ -869,13 +871,19 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8
pwrst)
*/
int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
{
- int ret = -EINVAL;
+ int pwrst, ret = -EINVAL;
if (!pwrdm)
return -EINVAL;
- if (arch_pwrdm arch_pwrdm-pwrdm_read_next_pwrst)
+ if (!pwrdm_cache_read(pwrdm, PWRDM_CACHE_NEXT_PWRST, pwrst))
+ return pwrst;
+
+ if (arch_pwrdm arch_pwrdm-pwrdm_read_next_pwrst) {
ret = arch_pwrdm-pwrdm_read_next_pwrst(pwrdm);
+ if (ret = 0)
+ pwrdm_cache_write(pwrdm, PWRDM_CACHE_NEXT_PWRST, ret);
+ }
return ret;
}
@@ -906,13 +914,19 @@ int pwrdm_read_next_func_pwrst(struct powerdomain *pwrdm)
*/
int pwrdm_read_pwrst(struct powerdomain *pwrdm)
{
- int ret = -EINVAL;
+ int pwrst, ret = -EINVAL;
if (!pwrdm)
return -EINVAL;
- if (arch_pwrdm arch_pwrdm-pwrdm_read_pwrst)
+ if (!pwrdm_cache_read(pwrdm, PWRDM_CACHE_PWRST, pwrst))
+ return pwrst;
+
+ if (arch_pwrdm arch_pwrdm-pwrdm_read_pwrst) {
ret = arch_pwrdm-pwrdm_read_pwrst(pwrdm);
+ if (ret = 0)
+ pwrdm_cache_write(pwrdm, PWRDM_CACHE_PWRST, ret);
+ }
return ret;
}
@@ -943,13 +957,19 @@ int pwrdm_read_func_pwrst(struct powerdomain *pwrdm)
*/
int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
{
- int ret = -EINVAL;
+ int pwrst, ret = -EINVAL;
if (!pwrdm)
return -EINVAL;
- if (arch_pwrdm arch_pwrdm-pwrdm_read_prev_pwrst)
+ if (!pwrdm_cache_read(pwrdm, PWRDM_CACHE_PREV_PWRST, pwrst))
+ return pwrst;
+
+ if (arch_pwrdm arch_pwrdm-pwrdm_read_prev_pwrst) {
ret = arch_pwrdm-pwrdm_read_prev_pwrst(pwrdm);
+ if (ret = 0)
+ pwrdm_cache_write(pwrdm, PWRDM_CACHE_PREV_PWRST, ret);
+ }
return ret;
}
--
1.7.7.6
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[PATCH 3/5] ARM: OMAP2+: PM: use the power domains registers cache for the logic and mem states
From: Jean Pihet j-pi...@ti.com
Use the caching API for the previous, current and next
power domains logical and memory states.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/powerdomain.c | 108 -
1 files changed, 82 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 2058e27..9800b2b 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -1011,11 +1011,15 @@ int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8
pwrst)
if (!(pwrdm-pwrsts_logic_ret (1 pwrst)))
return -EINVAL;
- pr_debug(powerdomain: setting next logic powerstate for %s to %0x\n,
+ pr_debug(powerdomain: setting next logic RET state for %s to %0x\n,
pwrdm-name, pwrst);
- if (arch_pwrdm arch_pwrdm-pwrdm_set_logic_retst)
+ if (arch_pwrdm arch_pwrdm-pwrdm_set_logic_retst) {
ret = arch_pwrdm-pwrdm_set_logic_retst(pwrdm, pwrst);
+ if (!ret)
+ pwrdm_cache_write(pwrdm, PWRDM_CACHE_NEXT_LOGIC_RETST,
+ pwrst);
+ }
return ret;
}
@@ -1023,13 +1027,13 @@ int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8
pwrst)
/**
* pwrdm_set_mem_onst - set memory power state while powerdomain ON
* @pwrdm: struct powerdomain * to set
- * @bank: memory bank number to set (0-3)
+ * @bank: memory bank number to set (0-PWRDM_MAX_MEM_BANKS)
* @pwrst: one of the PWRDM_LOGIC_MEM_PWRST_* macros
*
* Set the next power state @pwrst that memory bank @bank of the
* powerdomain @pwrdm will enter when the powerdomain enters the ON
- * state. @bank will be a number from 0 to 3, and represents different
- * types of memory, depending on the powerdomain. Returns -EINVAL if
+ * state. @bank represents different types of memory, depending on
+ * the powerdomain. Returns -EINVAL if
* the powerdomain pointer is null or the target power state is not
* not supported for this memory bank, -EEXIST if the target memory
* bank does not exist or is not controllable, or returns 0 upon
@@ -1051,8 +1055,12 @@ int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8
bank, u8 pwrst)
pr_debug(powerdomain: setting next memory powerstate for domain %s
bank %0x while pwrdm-ON to %0x\n, pwrdm-name, bank, pwrst);
- if (arch_pwrdm arch_pwrdm-pwrdm_set_mem_onst)
+ if (arch_pwrdm arch_pwrdm-pwrdm_set_mem_onst) {
ret = arch_pwrdm-pwrdm_set_mem_onst(pwrdm, bank, pwrst);
+ if (!ret)
+ pwrdm_cache_write(pwrdm, PWRDM_CACHE_MEM_ONST + bank,
+ pwrst);
+ }
return ret;
}
@@ -1060,13 +1068,13 @@ int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8
bank, u8 pwrst)
/**
* pwrdm_set_mem_retst - set memory power state while powerdomain in RET
* @pwrdm: struct powerdomain * to set
- * @bank: memory bank number to set (0-3)
+ * @bank: memory bank number to set (0-PWRDM_MAX_MEM_BANKS)
* @pwrst: one of the PWRDM_LOGIC_MEM_PWRST_* macros
*
* Set the next power state @pwrst that memory bank @bank of the
* powerdomain @pwrdm will enter when the powerdomain enters the
- * RETENTION state. Bank will be a number from 0 to 3, and represents
- * different types of memory, depending on the powerdomain. @pwrst
+ * RETENTION state. Bank represents different types of memory,
+ * depending on the powerdomain. @pwrst
* will be either RETENTION or OFF, if supported. Returns -EINVAL if
* the powerdomain pointer is null or the target power state is not
* not supported for this memory bank, -EEXIST if the target memory
@@ -1089,8 +1097,13 @@ int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8
bank, u8 pwrst)
pr_debug(powerdomain: setting next memory powerstate for domain %s
bank %0x while pwrdm-RET to %0x\n, pwrdm-name, bank, pwrst);
- if (arch_pwrdm arch_pwrdm-pwrdm_set_mem_retst)
+ if (arch_pwrdm arch_pwrdm-pwrdm_set_mem_retst) {
ret = arch_pwrdm-pwrdm_set_mem_retst(pwrdm, bank, pwrst);
+ if (!ret)
+ pwrdm_cache_write(pwrdm,
+ PWRDM_CACHE_NEXT_MEM_RETST + bank,
+ pwrst);
+ }
return ret;
}
@@ -1106,13 +1119,19 @@ int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8
bank, u8 pwrst)
*/
int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
{
- int ret = -EINVAL;
+ int retst, ret = -EINVAL;
if (!pwrdm)
return -EINVAL;
- if (arch_pwrdm arch_pwrdm-pwrdm_read_logic_pwrst)
+ if (!pwrdm_cache_read(pwrdm, PWRDM_CACHE_LOGIC_RETST, retst))
+ return retst;
+
+ if (arch_pwrdm arch_pwrdm-pwrdm_read_logic_pwrst) {
ret =
[PATCH 4/5] ARM: OMAP2+: PM: use the power domains registers cache invalidate API
From: Jean Pihet j-pi...@ti.com
The power domains registers cache is partially invalidated when clearing
the previous power states and after coming back from the low power mode,
i.e. after the return from the low level WFI instruction.
Note: this invalidate use scheme is optimized for performance, the states
returned by the state read functions might not reflect the real state if
the power domains registers have not been changed using the API or have
not been changed by the operating system (e.g. the ROM code in case of
secure code execution).
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/pm34xx.c |6 ++
arch/arm/mach-omap2/powerdomain.c |4 +++-
2 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ed73ffc..a222f517 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -353,6 +353,12 @@ void omap_sram_idle(void)
else
omap34xx_do_sram_idle(save_state);
+ /*
+* Invalidate the current states from the regs cache
+* for all power domains
+*/
+ pwrdm_invalidate_regs_cache_fields_current(NULL);
+
/* Restore normal SDRC POWER settings */
if (cpu_is_omap3430() omap_rev() = OMAP3430_REV_ES3_0
(omap_type() == OMAP2_DEVICE_TYPE_EMU ||
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 9800b2b..0b9259b 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -1324,8 +1324,10 @@ int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
pr_debug(powerdomain: clearing previous power state reg for %s\n,
pwrdm-name);
- if (arch_pwrdm arch_pwrdm-pwrdm_clear_all_prev_pwrst)
+ if (arch_pwrdm arch_pwrdm-pwrdm_clear_all_prev_pwrst) {
ret = arch_pwrdm-pwrdm_clear_all_prev_pwrst(pwrdm);
+ pwrdm_invalidate_regs_cache_fields_prev(pwrdm);
+ }
return ret;
}
--
1.7.7.6
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[PATCH 5/5] ARM: OMAP2+: PM debug: use the power domains registers caching API
From: Jean Pihet j-pi...@ti.com
Use the caching API instead of using the internal pwrdm-state field
for PM debug statistics display.
Note: some power domains states mismatch messages can be printed out with
the power domains states statstics, indicating that the power domains are
not controlled by any driver or that the invalidate API is not correctly
used.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/pm-debug.c | 16 +---
1 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 13c00fb..ed9846e 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -96,19 +96,20 @@ static int clkdm_dbg_show_counter(struct clockdomain
*clkdm, void *user)
static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user)
{
struct seq_file *s = (struct seq_file *)user;
- int i;
+ int i, pwrst;
if (strcmp(pwrdm-name, emu_pwrdm) == 0 ||
strcmp(pwrdm-name, wkup_pwrdm) == 0 ||
strncmp(pwrdm-name, dpll, 4) == 0)
return 0;
- if (pwrdm-state != pwrdm_read_func_pwrst(pwrdm))
- printk(KERN_ERR pwrdm state mismatch(%s) %d != %d\n,
- pwrdm-name, pwrdm-state, pwrdm_read_func_pwrst(pwrdm));
+ pwrst = pwrdm_read_func_pwrst(pwrdm);
+ if (pwrdm-state != pwrst)
+ printk(KERN_ERR pwrdm state mismatch(%s): last saved %d !=
current %d\n,
+ pwrdm-name, pwrdm-state, pwrst);
seq_printf(s, %s (%s), pwrdm-name,
- pwrdm_state_names[pwrdm-state]);
+ pwrdm_state_names[pwrst]);
for (i = 0; i PWRDM_MAX_FUNC_PWRSTS; i++)
seq_printf(s, ,%s:%d, pwrdm_state_names[i],
pwrdm-state_counter[i]);
@@ -126,7 +127,7 @@ static int pwrdm_dbg_show_counter(struct powerdomain
*pwrdm, void *user)
static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user)
{
struct seq_file *s = (struct seq_file *)user;
- int i;
+ int i, pwrst;
if (strcmp(pwrdm-name, emu_pwrdm) == 0 ||
strcmp(pwrdm-name, wkup_pwrdm) == 0 ||
@@ -134,9 +135,10 @@ static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm,
void *user)
return 0;
pwrdm_state_switch(pwrdm);
+ pwrst = pwrdm_read_func_pwrst(pwrdm);
seq_printf(s, %s (%s), pwrdm-name,
- pwrdm_state_names[pwrdm-state]);
+ pwrdm_state_names[pwrst]);
for (i = 0; i PWRDM_MAX_FUNC_PWRSTS; i++)
seq_printf(s, ,%s:%lld, pwrdm_state_names[i],
--
1.7.7.6
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Re: OMAP3EVM not booting on l-o master
Mohammed, Afzal af...@ti.com writes:
Hi Kevin,
On Tue, May 01, 2012 at 02:10:28, Hilman, Kevin wrote:
Afzal, care to give this one a test as well? It should have the same
result but is a more targetted fix. With and ack from Tero and a
Tested-by from you, I'll post this to the list and and queue it up for
v3.5.
Over what commit id, should this patch be applied ?, unable to apply it over
297624c ARM: OMAP3: PM: Remove IO Daisychain control from cpuidle, the
one that I tested your previous patch.
Oops, my fault.
Below is a version that applies on top of the IO chain branch currently
in Paul's tree[1].
Kevin
[1] git://git.pwsan.com/linux-2.6 io_chain_devel_3.5
From d94f04eea40686cd9db8e9dbd8dbf3c02edca07f Mon Sep 17 00:00:00 2001
From: Kevin Hilman khil...@ti.com
Date: Tue, 1 May 2012 07:06:42 -0700
Subject: [PATCH] ARM: OMAP3: PM: leave PRCM interrupts disabled until
explicitly enabled.
By default, request_irq() will auto-enable the requested IRQ.
For PRCM interrupts, we may want to avoid that until the PM core code
is fully ready to handle the interrupts. This is particularily true
for IO pad interrupts on OMAP3, which are shared between the hwmod
core and the PRM core.
In order to avoid PRCM IO-chain interrupts until the PM core is ready
to handle them, ready, set the IRQ_NOAUTOEN flag for the PRCM IO-chain
interrupt, which means it will remain disabled after request_irq().
Then, explicitly enable the PRCM interrupts after the request_irq() in
the PM core (but not in the hwmod core.)
Special thanks to Tero Kristo for suggesting to isolate the fix to
only the IO-chain interrupt on OMAP3 instead of all PRCM interrupts.
Cc: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/pm34xx.c |1 +
arch/arm/mach-omap2/prm2xxx_3xxx.c | 10 --
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 3e6b564..745a151 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -685,6 +685,7 @@ static int __init omap3_pm_init(void)
ret = request_irq(omap_prcm_event_to_irq(io),
_prcm_int_handle_io, IRQF_SHARED | IRQF_NO_SUSPEND, pm_io,
omap3_pm_init);
+ enable_irq(omap_prcm_event_to_irq(io));
if (ret) {
pr_err(pm: Failed to request pm_io irq\n);
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c
b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 1471a33..a8c6bd8 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -350,10 +350,16 @@ static void __init omap3xxx_prm_enable_io_wakeup(void)
static int __init omap3xxx_prcm_init(void)
{
+ int ret = 0;
+
if (cpu_is_omap34xx()) {
omap3xxx_prm_enable_io_wakeup();
- return omap_prcm_register_chain_handler(omap3_prcm_irq_setup);
+ ret = omap_prcm_register_chain_handler(omap3_prcm_irq_setup);
+ if (!ret)
+ irq_set_status_flags(omap_prcm_event_to_irq(io),
+IRQ_NOAUTOEN);
}
- return 0;
+
+ return ret;
}
subsys_initcall(omap3xxx_prcm_init);
--
1.7.9.2
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Re: PM related performance degradation on OMAP3
HI Kevin, Grazvydas, On Tue, Apr 24, 2012 at 4:29 PM, Kevin Hilman khil...@ti.com wrote: Jean Pihet jean.pi...@newoldbits.com writes: Hi Grazvydas, Kevin, I did some gather some performance measurements and statistics using custom tracepoints in __omap3_enter_idle. I posted the patches for the power domains registers cache, cf. http://marc.info/?l=linux-omapm=133587781712039w=2. All the details are at http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement#C1_performance_problem:_analysis I updated the page with the measurements results with Kevin's patches and the registers cache patches. The results are showing that: - the registers cache optimizes the low power mode transitions, but is not sufficient to obtain a big gain. A few unused domains are transitioning, which causes a big penalty in the idle path. - khilman's optimizations are really helpful. Furthermore it optimizes farther the registers cache statistics accesses. - the average time in idle now drops to 246us, which is still very large for a cpu intensive C-state. For information with PM disabled the average time in idle is 113us. Regards, Jean . This is great, thanks. [...] Here are the results (BW in MB/s) on Beagleboard: - 4.7: without using DMA, - Using DMA 2.1: [0] 2.1: [1] only C1 2.6: [1]+[2] no pre_ post_ 2.3: [1]+[5] no pwrdm_for_each_clkdm 2.8: [1]+[5]+[2] 3.1: [1]+[5]+[6] no omap_sram_idle 3.1: No IDLE, no omap_sram_idle, all pwrdms to ON So indeed this shows there is some serious performance issue with the C1 C-state. Yes, this confirms what both Grazvytas and I are seeing as well. [...] From the list of contributors, the main ones are: (140us) pwrdm_pre_transition and pwrdm_post_transition, See the series I just posted to address this one: [PATCH/RFT 0/3] ARM: OMAP: PM: reduce overhead of pwrdm pre/post transitions (105us) omap2_gpio_prepare_for_idle and omap2_gpio_resume_after_idle. This could be avoided if PER stays ON in the latency-critical C-states, (78us) pwrdm_for_each_clkdm(mpu, core, deny_idle/allow_idle), (33us estimated) omap_set_pwrdm_state(mpu, core, neon), (11 us) clkdm_allow_idle(mpu). Is this needed? In that same series, I removed this as it appears to be a remnant of a code move (c.f. patch 3 in above series.) Here are a few questions and suggestions: - In case of latency critical C-states could the high-latency code be bypassed in favor of a much simpler version? Pushing the concept a bit farther one could have a C1 state that just relaxes the cpu (no WFI), a C2 state which bypasses a lot of code in __omap3_enter_idle, and the rest of the C-states as we have today, I was thinking a WFI only state, with *all* powerdomains staying on is probably sufficient for C1. Do you see the enter/exit latency from that as even being too hight? - Is it needed to iterate through all the power and clock domains in order to keep them active? No. My series above starts to addresses this, but I think Tero's use-counting series is the final solution since this should really be done when we know the powerdomains are transitioning. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] arm: omap3: am35x: Don't mark missing features as present
Mark A. Greer mgr...@animalcreek.com writes: From: Mark A. Greer mgr...@animalcreek.com The Chip Identification register on the am35x family of SoCs has bits 12, 7:5, and 3:2 marked as reserved and are read as zeroes. Unfortunately, on other omap SoCs, a 0 bit means a feature is Full Use so the OMAP3_CHECK_FEATURE() macro called by omap3_check_features() will incorrectly interpret those zeroes to mean that a feature is present even though it isn't. To fix that, the feature bits that are incorrectly set (namely, OMAP3_HAS_IVA and OMAP3_HAS_ISP) need to be cleared after all of the calls to OMAP3_CHECK_FEATURE() in omap3_check_features() are made. Signed-off-by: Mark A. Greer mgr...@animalcreek.com Looks good, thanks. I'll queue this one up on top of my AM35x cpu_is cleanups (branch: for_3.5/cleanup/am35x-cpu-is) Kevin --- arch/arm/mach-omap2/id.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index d2913e2..20c95b4 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -247,6 +247,17 @@ void __init omap3xxx_check_features(void) omap_features |= OMAP3_HAS_SDRC; /* + * am35x fixups: + * - The am35x Chip ID register has bits 12, 7:5, and 3:2 marked as + * reserved and therefore return 0 when read. Unfortunately, + * OMAP3_CHECK_FEATURE() will interpret some of those zeroes to + * mean that a feature is present even though it isn't so clear + * the incorrectly set feature bits. + */ + if (cpu_is_am35xx()) + omap_features = ~(OMAP3_HAS_IVA | OMAP3_HAS_ISP); + + /* * TODO: Get additional info (where applicable) * e.g. Size of L2 cache. */ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/5] ARM: OMAP2+: PM: implement a caching mechanism on the power domains state registers
Hi Jean, On 05/01/2012 08:07 AM, jean.pi...@newoldbits.com wrote: From: Jean Pihet j-pi...@ti.com The OMAP3 PRCM registers accesses are known to be slow, with a PRCM register read taking up to 12-14us depending on the OPP. This patch adds a caching mechanism on the power domains state registers. When the cache is cold or has been invalidated a register access is performed, otherwise the register value is retrieved from the registers cache. The API is made of read and write functions for fields in the cache, as well as an invalidate and helper functions to invalidate parts of the cache contents (i.e. previous, current power states and all fields in the cache). The power domain code is converted to use the API to read and write the previous, current and next states for the power domains states, logical and memory states. The PM debug code also uses the caching API instead of the internal pwrdm-state variable. Using the caching mechanism optimizes the performance of the system in the transitions to and from the low power states. Looks interesting! A couple high level questions for you ... 1. Do you intend to cache registers that are updated by hardware? 2. If yes to 1, should there be some cache debug mode we can enable to test the cache and registers are in sync for testing? Cheers Jon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/5] ARM: OMAP2+: PM: use the power domains registers cache for the power states
Hi Jean,
On 05/01/2012 08:07 AM, jean.pi...@newoldbits.com wrote:
From: Jean Pihet j-pi...@ti.com
Use the caching API for the previous, current and next power domains states.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/powerdomain.c | 32 ++--
1 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 18e1ffc..2058e27 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -854,6 +854,8 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8
pwrst)
smp_processor_id());
/* Program the pwrdm desired target state */
ret = arch_pwrdm-pwrdm_set_next_pwrst(pwrdm, pwrst);
+ if (!ret)
+ pwrdm_cache_write(pwrdm, PWRDM_CACHE_NEXT_PWRST, pwrst);
}
return ret;
@@ -869,13 +871,19 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8
pwrst)
*/
int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
{
- int ret = -EINVAL;
+ int pwrst, ret = -EINVAL;
if (!pwrdm)
return -EINVAL;
- if (arch_pwrdm arch_pwrdm-pwrdm_read_next_pwrst)
+ if (!pwrdm_cache_read(pwrdm, PWRDM_CACHE_NEXT_PWRST, pwrst))
+ return pwrst;
+
+ if (arch_pwrdm arch_pwrdm-pwrdm_read_next_pwrst) {
ret = arch_pwrdm-pwrdm_read_next_pwrst(pwrdm);
+ if (ret = 0)
+ pwrdm_cache_write(pwrdm, PWRDM_CACHE_NEXT_PWRST, ret);
+ }
return ret;
}
@@ -906,13 +914,19 @@ int pwrdm_read_next_func_pwrst(struct powerdomain
*pwrdm)
*/
int pwrdm_read_pwrst(struct powerdomain *pwrdm)
{
- int ret = -EINVAL;
+ int pwrst, ret = -EINVAL;
if (!pwrdm)
return -EINVAL;
- if (arch_pwrdm arch_pwrdm-pwrdm_read_pwrst)
+ if (!pwrdm_cache_read(pwrdm, PWRDM_CACHE_PWRST, pwrst))
+ return pwrst;
+
+ if (arch_pwrdm arch_pwrdm-pwrdm_read_pwrst) {
ret = arch_pwrdm-pwrdm_read_pwrst(pwrdm);
+ if (ret = 0)
+ pwrdm_cache_write(pwrdm, PWRDM_CACHE_PWRST, ret);
+ }
Do we really want to use the cache for the current state? This is
updated by hardware. In the above it appears that once we have read it
once we will just return this value until the cache is invalidated.
Makes me a little nervous.
Cheers
Jon
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