Re: [PATCH v3 2/4] ARM: dts: Add support for DRA72x family of devices
On Thursday 24 April 2014 06:43 PM, Arnd Bergmann wrote: On Thursday 24 April 2014, Rajendra Nayak wrote: -- DRA742 - compatible = ti,dra7xx, ti,dra7 +- DRA74x + compatible = ti,dra74, ti,dra7 + +- DRA72x + compatible = ti,dra72, ti,dra7 Actually, what I meant was that you should list the fill name of the SoC, e.g. ti,dra742, not just ti,dra74. Leaving out the 'x' is not going to prevent this from breaking when you have a new dra745 that is incompatible. You can always list more strings, e.g. compatible = ti,dra745, ti,dra742, ti,dra74, ti,dra7; if you have a dra745 product that is fully compatible with dra742, but the important part here is that the first string must be the full name. Okay, I will update the device compatibles to something like this.. DRA742 compatible = ti,dra742, ti,dra74, ti,dra7 DRA722 compatible = ti,dra722, ti,dra72, ti,dra7 And the evm compatibles as DRA742 EVM: Software Developement Board for DRA742 compatible = ti,dra7-evm, ti,dra742, ti,dra74, ti,dra7 DRA722 EVM: Software Development Board for DRA722 compatible = ti,dra72-evm, ti,dra722, ti,dra72, ti,dra7 I was also calling the .dtsi files as dra72x.dtsi and dra74x.dtsi, do you suggest I call them dra742.dtsi and dra722.dtsi instead? Just that if we end up with a dra745 which is fully compatible with dra742, as you mentioned above, we would be using a dra742.dtsi for a dra745 device which could be a little confusing. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 3/4] ARM: OMAP2+: Add machine entry for dra72x devices
On Thursday 24 April 2014 10:39 PM, Suman Anna wrote:
Hi Rajendra,
On 04/24/2014 05:06 AM, Nayak, Rajendra wrote:
The only difference from the dra74x devices is the missing .smp entry.
While at it, also fix the use of __initdata (across the file) and replace
them
with __initconst as reported by checkpatch
ERROR: Use of const init definition must use __initconst
+static const char *dra72x_boards_compat[] __initdata = {
Since it looks like you are gonna do another respin, care to separate
out the __initdata to __initconst change for existing ones into a
different patch, and limit this patch to just what the patch subject says.
Sure, I will, if that helps.
regards
Suman
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 45
---
1 file changed, 31 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index b8920b6..dabb9f6 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -43,7 +43,7 @@ static void __init omap_generic_init(void)
}
#ifdef CONFIG_SOC_OMAP2420
-static const char *omap242x_boards_compat[] __initdata = {
+static const char *omap242x_boards_compat[] __initconst = {
ti,omap2420,
NULL,
};
@@ -62,7 +62,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_OMAP2430
-static const char *omap243x_boards_compat[] __initdata = {
+static const char *omap243x_boards_compat[] __initconst = {
ti,omap2430,
NULL,
};
@@ -81,7 +81,7 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP3
-static const char *omap3_boards_compat[] __initdata = {
+static const char *omap3_boards_compat[] __initconst = {
ti,omap3430,
ti,omap3,
NULL,
@@ -100,7 +100,7 @@ DT_MACHINE_START(OMAP3_DT, Generic OMAP3 (Flattened
Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *omap36xx_boards_compat[] __initdata = {
+static const char *omap36xx_boards_compat[] __initconst = {
ti,omap36xx,
NULL,
};
@@ -118,7 +118,7 @@ DT_MACHINE_START(OMAP36XX_DT, Generic OMAP36xx
(Flattened Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *omap3_gp_boards_compat[] __initdata = {
+static const char *omap3_gp_boards_compat[] __initconst = {
ti,omap3-beagle,
timll,omap3-devkit8000,
NULL,
@@ -137,7 +137,7 @@ DT_MACHINE_START(OMAP3_GP_DT, Generic OMAP3-GP
(Flattened Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *am3517_boards_compat[] __initdata = {
+static const char *am3517_boards_compat[] __initconst = {
ti,am3517,
NULL,
};
@@ -157,7 +157,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_AM33XX
-static const char *am33xx_boards_compat[] __initdata = {
+static const char *am33xx_boards_compat[] __initconst = {
ti,am33xx,
NULL,
};
@@ -177,7 +177,7 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP4
-static const char *omap4_boards_compat[] __initdata = {
+static const char *omap4_boards_compat[] __initconst = {
ti,omap4460,
ti,omap4430,
ti,omap4,
@@ -199,7 +199,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_OMAP5
-static const char *omap5_boards_compat[] __initdata = {
+static const char *omap5_boards_compat[] __initconst = {
ti,omap5432,
ti,omap5430,
ti,omap5,
@@ -221,7 +221,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_AM43XX
-static const char *am43_boards_compat[] __initdata = {
+static const char *am43_boards_compat[] __initconst = {
ti,am4372,
ti,am43,
NULL,
@@ -240,13 +240,13 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_DRA7XX
-static const char *dra7xx_boards_compat[] __initdata = {
-ti,dra7xx,
+static const char *dra74x_boards_compat[] __initconst = {
+ti,dra74,
ti,dra7,
NULL,
};
-DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened Device Tree))
+DT_MACHINE_START(DRA74X_DT, Generic DRA74X (Flattened Device Tree))
.reserve= omap_reserve,
.smp= smp_ops(omap4_smp_ops),
.map_io = omap5_map_io,
@@ -255,7 +255,24 @@ DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened
Device Tree))
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
.init_time = omap5_realtime_timer_init,
-.dt_compat = dra7xx_boards_compat,
+.dt_compat = dra74x_boards_compat,
+.restart= omap44xx_restart,
+MACHINE_END
+
+static const char *dra72x_boards_compat[] __initconst = {
+ti,dra72,
+NULL,
+};
+
+DT_MACHINE_START(DRA72_DT, Generic DRA72X (Flattened Device Tree))
+.reserve= omap_reserve,
+.map_io = omap5_map_io,
+.init_early = dra7xx_init_early,
+.init_late = dra7xx_init_late,
+.init_irq = omap_gic_of_init,
+
Re: [PATCH 06/23] ARM: OMAP: add OMAP5 DSI muxing
On 25/04/14 18:31, Tony Lindgren wrote: Chances are any mux register in the syscon area already works with pinctrl-single,pins or pinctrl-single,bits option. The ones in the padconf area should be already mapped so the driver just has to request them. If using the padconf (say omap4_padconf_global for omap4), doesn't that mean we need to have platform specific bits in the driver? Isn't that something we've been trying to remove all the time? Tomi signature.asc Description: OpenPGP digital signature
Re: [PATCH 1/6] drivers: net: cpts: Remove hardcoded clock name for CPTS
On Mon, Apr 28, 2014 at 09:40:20AM +0530, George Cherian wrote: CPTS refclk name is hardcoded, which makes it fail in case of DRA7x Remove the hardcoded clock name for CPTS refclk and get the same from DT. Patch ordering - doesn't this patch depend on patch #2? Thanks, Richard -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 5/6] ARM: AM43xx: clk: Change the cpts ref clock source to dpll_core_m5 clk
On Mon, Apr 28, 2014 at 09:40:24AM +0530, George Cherian wrote: cpsw_cpts_rft_clk has got the choice of 3 clocksources -dpll_core_m4_ck -dpll_core_m5_ck -dpll_disp_m2_ck By default dpll_core_m4_ck is selected, witn this as clock source the CPTS doesnot work properly. It gives clockcheck errors while running PTP. clockcheck: clock jumped backward or running slower than expected! It is strange that I have never seen this error, since I have often tested linuxptp on a beagle bone white. Can you please explain why this clock doesn't work correctly? By selecting dpll_core_m5_ck as the clocksource fixes this issue. In AM335x dpll_core_m5_ck is the default clocksource. The choice of clock source in the CPTS driver originally came from TI. It would be nice to know why that was the wrong choice. Thanks, Richard -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/5] mmc: omap_hsmmc: Enable SDIO IRQ.
Hi Balaji, Tony, all
v10
- bug fix on multi-core, untested
- incorporated changes from Balaji
- use devres / RAII mechanism to configure wake_up /
sdio irq capabilities
- drop pinctrl state 'active'
rely on driver-model states 'default', 'idle'
- add specific 'gpio_dat1' state for am335x SWAKEUP hack
- reorganized patches; +1 patch multi-core bugfix / +1 for pinctrl
- rebased 455c6fdbd21916 / cherry-picks from mmc-next
v9
- extended comment about why wake-irq is needed
- drop double '(' ')' around card_detect_irq
- drop final '.' in in subject line of patch
v8
- rebased on top of Tony Lindgrent...@atomide.com changes
- improved changelog describing the earlier work
- improved wakeup irq setup
- works for am3730 es platform now
- my changes on top:
- compile tested with #undef CONFIG_OF
- disable wake_irq in handler to prevent infinite loop
- fixed typo and added comment about wake-irq
v7
- rebase on 3.14.0-rc3-49726-g77e15ec
- split omap_hsmmc_pin_init due to regression on omap-3730 platform
v6
- rebase on Linux 3.13-rc3
- reformatting debugfs
v5
- fix compile error introduced by last minute one line fix
v4:
- switch to interrupts-extended format
- drop ti,swakeup-missing flag convert to comaptible section
v3:
- removed gpio_irq from platform_data
v2:
- incorparated changes as suggested by reviewers
- simplified workaround for am335x, gpio will now only wake
the module from runtime suspend, not handle the sdio irq
itself
Andreas Fenkart (5):
mmc: omap_hsmmc: Enable SDIO interrupt
mmc: omap_hsmmc: bug: abort runtime suspend if pending sdio irq
detected
mmc: omap_hsmmc: Extend debugfs by SDIO IRQ handling, runtime state
mmc: omap_hsmmc: switch default/idle pinctrl states in runtime hooks
mmc: omap_hsmmc: Pin remux workaround to support SDIO interrupt on
AM335x
.../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 51
drivers/mmc/host/omap_hsmmc.c | 285 ++--
include/linux/platform_data/mmc-omap.h |1 +
3 files changed, 316 insertions(+), 21 deletions(-)
--
1.7.10.4
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[PATCH v10 2/5] mmc: omap_hsmmc: bug: abort runtime suspend if pending sdio irq detected
on multicores, an sdio irq handler could be running in parallel to
runtime suspend. In the worst case it could be waiting for the spinlock
held by the runtime suspend. When runtime suspend is complete and the
functional clock (fclk) turned off, the irq handler will continue and
cause a SIGBUS on the first register access.
Signed-off-by: Andreas Fenkart afenk...@gmail.com
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 700fb91..e675042 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -56,6 +56,7 @@
#define OMAP_HSMMC_RSP54 0x0118
#define OMAP_HSMMC_RSP76 0x011C
#define OMAP_HSMMC_DATA0x0120
+#define OMAP_HSMMC_PSTATE 0x0124
#define OMAP_HSMMC_HCTL0x0128
#define OMAP_HSMMC_SYSCTL 0x012C
#define OMAP_HSMMC_STAT0x0130
@@ -2400,6 +2401,7 @@ static int omap_hsmmc_runtime_suspend(struct device *dev)
{
struct omap_hsmmc_host *host;
unsigned long flags;
+ int ret = 0;
host = platform_get_drvdata(to_platform_device(dev));
omap_hsmmc_context_save(host);
@@ -2411,14 +2413,29 @@ static int omap_hsmmc_runtime_suspend(struct device
*dev)
/* disable sdio irq handling to prevent race */
OMAP_HSMMC_WRITE(host-base, ISE, 0);
OMAP_HSMMC_WRITE(host-base, IE, 0);
- OMAP_HSMMC_WRITE(host-base, STAT, STAT_CLEAR);
+
+ if (!(OMAP_HSMMC_READ(host-base, PSTATE) BIT(21))) {
+ /*
+* dat1 line low, pending sdio irq
+* race condition: possible irq handler running on
+* multi-core, abort
+*/
+ dev_dbg(dev, pending sdio irq, abort suspend\n);
+ OMAP_HSMMC_WRITE(host-base, STAT, STAT_CLEAR);
+ OMAP_HSMMC_WRITE(host-base, ISE, CIRQ_EN);
+ OMAP_HSMMC_WRITE(host-base, IE, CIRQ_EN);
+ pm_runtime_mark_last_busy(dev);
+ ret = -EBUSY;
+ goto abort;
+ }
WARN_ON(host-flags HSMMC_WAKE_IRQ_ENABLED);
enable_irq(host-wake_irq);
host-flags |= HSMMC_WAKE_IRQ_ENABLED;
}
+abort:
spin_unlock_irqrestore(host-irq_lock, flags);
- return 0;
+ return ret;
}
static int omap_hsmmc_runtime_resume(struct device *dev)
--
1.7.10.4
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[PATCH v10 1/5] mmc: omap_hsmmc: Enable SDIO interrupt
There have been various patches floating around for enabling
the SDIO IRQ for hsmmc, but none of them ever got merged.
Probably the reason for not merging the SDIO interrupt patches
has been the lack of wake-up path for SDIO on some omaps that
has also needed remuxing the SDIO DAT1 line to a GPIO making
the patches complex.
This patch adds the minimal SDIO IRQ support to hsmmc for
omaps that do have the wake-up path. For those omaps, the
DAT1 line need to have the wake-up enable bit set, and the
wake-up interrupt is the same as for the MMC controller.
This patch has been tested on am3730 es1.2 with mwifiex
connected to MMC3 with mwifiex waking to Ethernet traffic
from off-idle mode. Note that for omaps that do not have
the SDIO wake-up path, this patch will not work for idle
modes and further patches for remuxing DAT1 to GPIO are
needed.
Based on earlier patches [1][2] by David Vrabel
david.vra...@csr.com, Steve Sakoman st...@sakoman.com
For now, only support SDIO interrupt if we are booted with
a separate wake-irq configued via device tree. This is
because omaps need the wake-irq for idle states, and some
omaps need special quirks. And we don't want to add new
legacy mux platform init code callbacks any longer as we
are moving to DT based booting anyways.
To use it, you need to specify the wake-irq using the
interrupts-extended property.
[1]
http://www.sakoman.com/cgi-bin/gitweb.cgi?p=linux.git;a=commitdiff_plain;h=010810d22f6f49ac03da4ba384969432e0320453
[2] http://comments.gmane.org/gmane.linux.kernel.mmc/20446
Cc: Balaji T K balaj...@ti.com
Signed-off-by: Andreas Fenkart afenk...@gmail.com
Signed-off-by: Tony Lindgren t...@atomide.com
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 272e0ee..700fb91 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -29,6 +29,7 @@
#include linux/timer.h
#include linux/clk.h
#include linux/of.h
+#include linux/of_irq.h
#include linux/of_gpio.h
#include linux/of_device.h
#include linux/omap-dma.h
@@ -36,6 +37,7 @@
#include linux/mmc/core.h
#include linux/mmc/mmc.h
#include linux/io.h
+#include linux/irq.h
#include linux/gpio.h
#include linux/regulator/consumer.h
#include linux/pinctrl/consumer.h
@@ -106,6 +108,7 @@
#define TC_EN (1 1)
#define BWR_EN (1 4)
#define BRR_EN (1 5)
+#define CIRQ_EN(1 8)
#define ERR_EN (1 15)
#define CTO_EN (1 16)
#define CCRC_EN(1 17)
@@ -140,7 +143,6 @@
#define VDD_3V0300 /* 30 uV */
#define VDD_165_195(ffs(MMC_VDD_165_195) - 1)
-#define AUTO_CMD23 (1 1)/* Auto CMD23 support */
/*
* One controller can have multiple slots, like on some omap boards using
* omap.c controller driver. Luckily this is not currently done on any known
@@ -194,6 +196,7 @@ struct omap_hsmmc_host {
u32 sysctl;
u32 capa;
int irq;
+ int wake_irq;
int use_dma, dma_ch;
struct dma_chan *tx_chan;
struct dma_chan *rx_chan;
@@ -206,6 +209,9 @@ struct omap_hsmmc_host {
int req_in_progress;
unsigned long clk_rate;
unsigned intflags;
+#define AUTO_CMD23 (1 0)/* Auto CMD23 support */
+#define HSMMC_SDIO_IRQ_ENABLED (1 1)/* SDIO irq enabled */
+#define HSMMC_WAKE_IRQ_ENABLED (1 2)
struct omap_hsmmc_next next_data;
struct omap_mmc_platform_data *pdata;
};
@@ -510,27 +516,40 @@ static void omap_hsmmc_stop_clock(struct omap_hsmmc_host
*host)
static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host,
struct mmc_command *cmd)
{
- unsigned int irq_mask;
+ u32 irq_mask = INT_EN_MASK;
+ unsigned long flags;
if (host-use_dma)
- irq_mask = INT_EN_MASK ~(BRR_EN | BWR_EN);
- else
- irq_mask = INT_EN_MASK;
+ irq_mask = ~(BRR_EN | BWR_EN);
/* Disable timeout for erases */
if (cmd-opcode == MMC_ERASE)
irq_mask = ~DTO_EN;
+ spin_lock_irqsave(host-irq_lock, flags);
OMAP_HSMMC_WRITE(host-base, STAT, STAT_CLEAR);
OMAP_HSMMC_WRITE(host-base, ISE, irq_mask);
+
+ /* latch pending CIRQ, but don't signal MMC core */
+ if (host-flags HSMMC_SDIO_IRQ_ENABLED)
+ irq_mask |= CIRQ_EN;
OMAP_HSMMC_WRITE(host-base, IE, irq_mask);
+ spin_unlock_irqrestore(host-irq_lock, flags);
}
static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host)
{
- OMAP_HSMMC_WRITE(host-base, ISE, 0);
- OMAP_HSMMC_WRITE(host-base, IE, 0);
+ u32 irq_mask = 0;
+ unsigned long flags;
+
+
[PATCH v10 5/5] mmc: omap_hsmmc: Pin remux workaround to support SDIO interrupt on AM335x
The am335x can't detect pending cirq in PM runtime suspend.
This patch reconfigures dat1 as a GPIO before going to suspend.
SDIO interrupts are detected with the GPIO, the GPIO will only wake
the module from suspend, SDIO irq detection will still happen through the
IP block.
Idea of remuxing the pins by Tony Lindgren. Code contributions from
Tony Lindgren and Balaji T K balaj...@ti.com
Signed-off-by: Andreas Fenkart afenk...@gmail.com
Signed-off-by: Tony Lindgren t...@atomide.com
diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
index ce80561..4767cd1 100644
--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
@@ -56,3 +56,54 @@ Examples:
edma 25;
dma-names = tx, rx;
};
+
+[workaround for missing swakeup on am33xx]
+
+This SOC is missing the swakeup line, it will not detect SDIO irq
+while in suspend.
+
+ --
+ | PRCM |
+ --
+ ^ |
+ swakeup | | fclk
+ | v
+ ----- -
+ | card | -- CIRQ -- | hsmmc | -- IRQ -- | CPU |
+ ----- -
+
+In suspend the fclk is off and the module is disfunctional. Even
+register reads will fail. A small logic in the host will request
+fclk restore, when an external event is detected. Once the clock
+is restored, the host detects the event normally. Since am33xx
+doesn't have this line it never wakes from suspend.
+
+The workaround is to reconfigure the dat1 line as a GPIO upon
+suspend. To make this work, we need to set 1) the named pinctrl
+states default, idle and gpio_dat1, 2) the gpio detecting
+sdio irq in suspend and 3) the compatibe section, see example below.
+The MMC driver will then toggle between gpio_dat1 and default during
+the runtime. If configuration is incomplete, a warning message is
+emitted falling back to polling. Mind not every application
+needs SDIO irq, e.g. MMC cards Affected chips are am335x,
+probably others
+
+
+ mmc1: mmc@48060100 {
+ compatible = ti,am33xx-hsmmc;
+ ...
+ interrupts-extended = intc 64 gpio2 28 0;
+ ...
+ pinctrl-names = default, idle, sleep, gpio_dat1
+ pinctrl-0 = mmc1_pins;
+ pinctrl-1 = mmc1_idle;
+ pinctrl-2 = mmc1_sleep;
+ pinctrl-3 = mmc1_cirq_pin;
+ ...
+ };
+
+ mmc1_cirq_pin: pinmux_cirq_pin {
+ pinctrl-single,pins =
+ 0x0f8 0x3f /* GPIO2_28 */
+ ;
+ };
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 9cc0d21..8661e1f 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -213,7 +213,10 @@ struct omap_hsmmc_host {
#define AUTO_CMD23 (1 0)/* Auto CMD23 support */
#define HSMMC_SDIO_IRQ_ENABLED (1 1)/* SDIO irq enabled */
#define HSMMC_WAKE_IRQ_ENABLED (1 2)
+#define HSMMC_SWAKEUP_QUIRK(1 3)
struct omap_hsmmc_next next_data;
+ struct pinctrl *pinctrl;
+ struct pinctrl_state*gpio_pinmux;
struct omap_mmc_platform_data *pdata;
};
@@ -1744,8 +1747,28 @@ static int omap_hsmmc_configure_wake_irq(struct
omap_hsmmc_host *host)
* and need to remux SDIO DAT1 to GPIO for wake-up from idle.
*/
if (host-pdata-controller_flags OMAP_HSMMC_SWAKEUP_MISSING) {
- ret = -ENODEV;
- goto err;
+ if (IS_ERR(host-dev-pins-default_state)) {
+ dev_info(host-dev, missing default pinctrl state\n);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ host-pinctrl = devm_pinctrl_get(host-dev);
+ if (IS_ERR(host-pinctrl)) {
+ dev_warn(host-dev, no pinctrl handle\n);
+ ret = -ENODEV;
+ goto err;
+ }
+
+ host-gpio_pinmux = pinctrl_lookup_state(host-pinctrl,
+gpio_dat1);
+ if (IS_ERR(host-gpio_pinmux)) {
+ dev_info(host-dev, missing \gpio_dat1\ pinctrl
state\n);
+ ret = -ENODEV;
+ goto err;
+ }
+
+ host-flags |= HSMMC_SWAKEUP_QUIRK;
}
devres_remove_group(host-dev, NULL);
@@ -2438,7 +2461,10 @@ static int omap_hsmmc_runtime_suspend(struct device *dev)
goto abort;
}
- pinctrl_pm_select_idle_state(dev);
+ if (host-flags HSMMC_SWAKEUP_QUIRK)
+
[PATCH v10 3/5] mmc: omap_hsmmc: Extend debugfs by SDIO IRQ handling, runtime state
Add SDIO IRQ entries to debugfs entry. Note that PSTATE shows current
state of data lines, incl. SDIO IRQ pending
Signed-off-by: Andreas Fenkart afenk...@gmail.com
Signed-off-by: Tony Lindgren t...@atomide.com
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index e675042..76fe3bd 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1819,14 +1819,28 @@ static int omap_hsmmc_regs_show(struct seq_file *s,
void *data)
{
struct mmc_host *mmc = s-private;
struct omap_hsmmc_host *host = mmc_priv(mmc);
+ const char *cirq_state;
+ bool suspended;
- seq_printf(s, mmc%d:\n ctx_loss:\t%d\n\nregs:\n,
- mmc-index, host-context_loss);
+ seq_printf(s, mmc%d:\n, mmc-index);
+ if (mmc-caps MMC_CAP_SDIO_IRQ)
+ cirq_state = (host-flags HSMMC_SDIO_IRQ_ENABLED) ?
+ enabled : disabled;
+ else
+ cirq_state = polling;
+ seq_printf(s, sdio irq\t%s\n, cirq_state);
- pm_runtime_get_sync(host-dev);
+ suspended = host-dev-power.runtime_status != RPM_ACTIVE;
+ seq_printf(s, runtime state\t%s\n, (suspended ? idle : active));
+ seq_printf(s, ctx_loss:\t%d\n, host-context_loss);
+
+ pm_runtime_get_sync(host-dev);
+ seq_puts(s, \nregs:\n);
seq_printf(s, CON:\t\t0x%08x\n,
OMAP_HSMMC_READ(host-base, CON));
+ seq_printf(s, PSTATE:\t\t0x%08x\n,
+ OMAP_HSMMC_READ(host-base, PSTATE));
seq_printf(s, HCTL:\t\t0x%08x\n,
OMAP_HSMMC_READ(host-base, HCTL));
seq_printf(s, SYSCTL:\t\t0x%08x\n,
--
1.7.10.4
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[PATCH v10 4/5] mmc: omap_hsmmc: switch default/idle pinctrl states in runtime hooks
These are predefined states of the driver model. When not present,
as if not set in the device tree, they simple become no-ops.
So it is always safe to call them.
This is not the simplest implementation, on AM335x at least, we could
witch to idle at any point in the suspend hook, only the default state
needs to be set before writing to the irq registers or an IRQ might get
lost.
Signed-off-by: Andreas Fenkart afenk...@gmail.com
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 76fe3bd..9cc0d21 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1992,7 +1992,6 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
const struct of_device_id *match;
dma_cap_mask_t mask;
unsigned tx_req, rx_req;
- struct pinctrl *pinctrl;
const struct omap_mmc_of_data *data;
match = of_match_device(of_match_ptr(omap_mmc_of_match), pdev-dev);
@@ -2215,11 +2214,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
}
omap_hsmmc_disable_irq(host);
-
- pinctrl = devm_pinctrl_get_select_default(pdev-dev);
- if (IS_ERR(pinctrl))
- dev_warn(pdev-dev,
- pins are not configured from the driver\n);
+ pinctrl_pm_select_default_state(host-dev);
/*
* For now, only support SDIO interrupt if we have a separate
@@ -2443,9 +2438,13 @@ static int omap_hsmmc_runtime_suspend(struct device *dev)
goto abort;
}
+ pinctrl_pm_select_idle_state(dev);
+
WARN_ON(host-flags HSMMC_WAKE_IRQ_ENABLED);
enable_irq(host-wake_irq);
host-flags |= HSMMC_WAKE_IRQ_ENABLED;
+ } else {
+ pinctrl_pm_select_idle_state(dev);
}
abort:
spin_unlock_irqrestore(host-irq_lock, flags);
@@ -2470,9 +2469,14 @@ static int omap_hsmmc_runtime_resume(struct device *dev)
host-flags = ~HSMMC_WAKE_IRQ_ENABLED;
}
+ pinctrl_pm_select_default_state(host-dev);
+
+ /* irq lost, if pinmux incorrect */
OMAP_HSMMC_WRITE(host-base, STAT, STAT_CLEAR);
OMAP_HSMMC_WRITE(host-base, ISE, CIRQ_EN);
OMAP_HSMMC_WRITE(host-base, IE, CIRQ_EN);
+ } else {
+ pinctrl_pm_select_default_state(host-dev);
}
spin_unlock_irqrestore(host-irq_lock, flags);
return 0;
--
1.7.10.4
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[PATCH v10 0/5] mmc: omap_hsmmc: Enable SDIO IRQ.
Hi Balaji, Tony, all
v10
- bug fix on multi-core, untested
- incorporated changes from Balaji
- use devres / RAII mechanism to configure wake_up /
sdio irq capabilities
- drop pinctrl state 'active'
rely on driver-model states 'default', 'idle'
- add specific 'gpio_dat1' state for am335x SWAKEUP hack
- reorganized patches; +1 patch multi-core bugfix / +1 for pinctrl
- rebased 455c6fdbd21916 / cherry-picks from mmc-next
v9
- extended comment about why wake-irq is needed
- drop double '(' ')' around card_detect_irq
- drop final '.' in in subject line of patch
v8
- rebased on top of Tony Lindgrent...@atomide.com changes
- improved changelog describing the earlier work
- improved wakeup irq setup
- works for am3730 es platform now
- my changes on top:
- compile tested with #undef CONFIG_OF
- disable wake_irq in handler to prevent infinite loop
- fixed typo and added comment about wake-irq
v7
- rebase on 3.14.0-rc3-49726-g77e15ec
- split omap_hsmmc_pin_init due to regression on omap-3730 platform
v6
- rebase on Linux 3.13-rc3
- reformatting debugfs
v5
- fix compile error introduced by last minute one line fix
v4:
- switch to interrupts-extended format
- drop ti,swakeup-missing flag convert to comaptible section
v3:
- removed gpio_irq from platform_data
v2:
- incorparated changes as suggested by reviewers
- simplified workaround for am335x, gpio will now only wake
the module from runtime suspend, not handle the sdio irq
itself
Andreas Fenkart (5):
mmc: omap_hsmmc: Enable SDIO interrupt
mmc: omap_hsmmc: bug: abort runtime suspend if pending sdio irq
detected
mmc: omap_hsmmc: Extend debugfs by SDIO IRQ handling, runtime state
mmc: omap_hsmmc: switch default/idle pinctrl states in runtime hooks
mmc: omap_hsmmc: Pin remux workaround to support SDIO interrupt on
AM335x
.../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 51
drivers/mmc/host/omap_hsmmc.c | 285 ++--
include/linux/platform_data/mmc-omap.h |1 +
3 files changed, 316 insertions(+), 21 deletions(-)
--
1.7.10.4
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Re: [PATCH 4/6] drivers: net: cpsw: Enable Annexe F Time sync
On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote: Enable the Annex F Time Sync explicitly for DRA7x and AM4372. With this enabled the L2 PTP is working. L2 works fine without this bit. If this is needed for V3 hardware, then it should have its own code variant. while at that rename TS_BIT8 to TS_TTL_NONZERO Is this bit finally documented for am335x? Thanks, Richard -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: dts: am33xx: fix DMA support for the second USB interface
From: Yegor Yefremov yegorsli...@googlemail.com
This patch creates unique DMA channels for the second USB
interface, otherwise the second USB interface is not usable
at all.
Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
---
arch/arm/boot/dts/am33xx.dtsi | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 07f283c..e04cbbc 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -548,12 +548,12 @@
cppi41dma 26 1 cppi41dma 27 1
cppi41dma 28 1 cppi41dma 29 1;
dma-names =
- rx1, rx2, rx3, rx4, rx5,
rx6, rx7,
- rx8, rx9, rx10, rx11, rx12,
rx13,
- rx14, rx15,
- tx1, tx2, tx3, tx4, tx5,
tx6, tx7,
- tx8, tx9, tx10, tx11, tx12,
tx13,
- tx14, tx15;
+ rx16, rx17, rx18, rx19, rx20,
rx21, rx22,
+ rx23, rx24, rx25, rx26, rx27,
rx28,
+ rx29, rx30,
+ tx16, tx17, tx18, tx19, tx20,
tx21, tx22,
+ tx23, tx24, tx25, tx26, tx27,
tx28,
+ tx29, tx30;
};
cppi41dma: dma-controller@47402000 {
--
1.7.7
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Re: [PATCH v3 2/4] ARM: dts: Add support for DRA72x family of devices
On Monday 28 April 2014 11:39:22 Rajendra Nayak wrote: DRA742 EVM: Software Developement Board for DRA742 compatible = ti,dra7-evm, ti,dra742, ti,dra74, ti,dra7 DRA722 EVM: Software Development Board for DRA722 compatible = ti,dra72-evm, ti,dra722, ti,dra72, ti,dra7 I was also calling the .dtsi files as dra72x.dtsi and dra74x.dtsi, do you suggest I call them dra742.dtsi and dra722.dtsi instead? Just that if we end up with a dra745 which is fully compatible with dra742, as you mentioned above, we would be using a dra742.dtsi for a dra745 device which could be a little confusing. For the file names, wildcards are ok. Alternatively you could have a dra745.dtsi that does nothing but include dra752.dtsi and override the compatible string (if there is one to start with). Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 2/4] ARM: dts: Add support for DRA72x family of devices
On Monday 28 April 2014 02:20 PM, Arnd Bergmann wrote: On Monday 28 April 2014 11:39:22 Rajendra Nayak wrote: DRA742 EVM: Software Developement Board for DRA742 compatible = ti,dra7-evm, ti,dra742, ti,dra74, ti,dra7 DRA722 EVM: Software Development Board for DRA722 compatible = ti,dra72-evm, ti,dra722, ti,dra72, ti,dra7 I was also calling the .dtsi files as dra72x.dtsi and dra74x.dtsi, do you suggest I call them dra742.dtsi and dra722.dtsi instead? Just that if we end up with a dra745 which is fully compatible with dra742, as you mentioned above, we would be using a dra742.dtsi for a dra745 device which could be a little confusing. For the file names, wildcards are ok. Alternatively you could have a dra745.dtsi that does nothing but include dra752.dtsi and override the compatible string (if there is one to start with). Okay, thanks. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] gpio: always enable GPIO_OMAP on ARCH_OMAP
Commit 4df42de9d3e gpio: omap: add a GPIO_OMAP option instead of using ARCH_OMAP made it possible to build OMAP kernels without the GPIO driver, which at least on OMAP2 and OMAP3 causes build errors because of functions used by the platform power management code: arch/arm/mach-omap2/built-in.o: In function `omap_sram_idle': arch/arm/mach-omap2/pm24xx.c:129: undefined reference to `omap2_gpio_prepare_for_idle' arch/arm/mach-omap2/pm24xx.c:129: undefined reference to `omap2_gpio_resume_after_idle' We presumably always want the GPIO driver on OMAP, so this adds a slightly broader dependency and only allows disabling the driver only when no OMAP2PLUS platform is selected. However, it seems entirely reasonable to include the driver in build tests on other platforms, so we should also allow building it for COMPILE_TEST builds and select the required GENERIC_IRQ_CHIP that may not already be enabled on other platforms. Signed-off-by: Arnd Bergmann a...@arndb.de diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index c58b828..c8c42be 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -244,9 +244,10 @@ config GPIO_OCTEON family of SOCs. config GPIO_OMAP - bool TI OMAP GPIO support + bool TI OMAP GPIO support if COMPILE_TEST !ARCH_OMAP2PLUS default y if ARCH_OMAP - depends on ARM ARCH_OMAP + depends on ARM + select GENERIC_IRQ_CHIP select GPIOLIB_IRQCHIP help Say yes here to enable GPIO support for TI OMAP SoCs. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 00/13] extcon: major rework
On 04/24/2014 09:52 PM, Greg KH wrote: On Mon, Apr 14, 2014 at 01:46:11PM +0200, Robert Baldyga wrote: This patchset adds many improvements to extcon class driver and extcon provider drivers. It changes extcon API to faster and safer by replaceing function taking extcon and cable names with functions working with structures representing this objects. What is faster exactly? How did you measure this? What benchmarks can be run to test this claim? Most of new API functions are O(1), because they take as argument pointer to struct extcon_cable, and operates on it. In contrast, previous API functions needed to compare given cable name with name of each cable specified in extcon controller. This solution was also prone to errors - when you make typo in extcon name or cable name it will not be detected at compilation time. The new API uses names only at initialization, and after that each function takes pointer to struct extcon_cable. The old API is also fragile because defined list of cables could be different in each extcon provider (the same cable could have different name in each extcon provider), so using different extcon providers with different drivers would need doing modifications in drivers. Best regards Robert Baldyga Samsung RD Institute Poland -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RESEND 1/3] mfd: twl6040: Select i2c fast mode as default with regmap patch
All boards using twl6040 configures the i2c bus to 400KHz. While twl6040's defaults to normal mode (100KHz). So far twl6040 has no problem with i2c communication in this configuration it is safer to select fast i2c mode. Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com --- drivers/mfd/twl6040.c | 9 +++-- include/linux/mfd/twl6040.h | 1 + 2 files changed, 8 insertions(+), 2 deletions(-) Applied, thanks. -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RESEND 2/3] mfd: twl6040: Move register patching earlier in probe
Make sure that we patch the ACCCTL register as the first thing when the driver loads, thus configuring I2C fast mode and i2c access for dual access registers. Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com --- drivers/mfd/twl6040.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) Applied, thanks. -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RESEND 3/3] mfd: twl6040: Clear the interrupt ID register before requesting IRQ
If for some reason the boot loader enabled the audpwron GPIO we will have pending IRQs to be handled. This seams to break twl6040 for some reason leading to non working i2c communication (i2c timeouts). Clearing the INTID register after we requested the audpwron GPIO (and set it to low) will ensure that the chip will operate normally in this case as well. Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com --- drivers/mfd/twl6040.c | 3 +++ 1 file changed, 3 insertions(+) Applied, thanks. -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv3 19/41] OMAPDSS: panel-dpi: Add DT support
On 26/04/14 02:53, Tony Lindgren wrote:
* Tomi Valkeinen tomi.valkei...@ti.com [140424 02:53]:
On 18/04/14 18:51, Tony Lindgren wrote:
+ gpio = of_get_gpio(node, 0);
+ if (gpio_is_valid(gpio) || gpio == -ENOENT) {
+ ddata-enable_gpio = gpio;
+ } else {
+ dev_err(pdev-dev, failed to parse enable gpio\n);
+ return gpio;
+ }
We should set the GPIO polarity based on the OF_GPIO_ACTIVE_LOW like
gpio_backlight_probe_dt is doing.
Instead of doing it with the old gpio API, and checking the 'active'
flag everywhere, I think we can use the new gpiod API which handles the
polarity automatically.
I attached prototype patches (based on -rc2) for panel dpi using that
approach. It's a bit messier than I'd like, because for non-DT boot we
need to request the gpio using the old API, and then convert it to
gpio_desc. We can remove that code when all the boards use DT.
I've compiled tested this only, as I don't have DPI panels I could use.
I did try similar approach for TFP410, and it seemed to work fine.
Got these working by updating my test patch to use enable-gpios instead
of gpios, and had to change from GPIO_ACTIVE_LOW to GPIO_ACTIVE_HIGH.
Are we now also breaking legacy booting by reversing the polarity?
I don't think so. The GPIOs should be active-high by default, if I'm not
mistaken, so the polarities should be the same for legacy boot with or
without those patches. Of course, I don't have the boards so I have no
idea if the polarities have been correct even before.
debugfs/gpio shows the actual value of the gpio, so you could check from
there what it is.
In any case, looks like we have some duplicate panel code.. Turns
out most panel dpi users for omap3 board-*.c files are just
sharp-ls037v7dw01 panels but configured in QVGA mode. At least for
EVM and and LDP based on looking at the pictures and the configuration
Hmm, true, board-ldp.c's panel looks very much like sharp-ls037v7dw01.
Which EVM are you talking about?
pins (using the names kernel):
QVGA = lcd MO
reset = lcd RESB
...
Then the enable_gpio should be just a GPIO controlled 3.3V regulator
in most cases. I suggest we move them over to ls037v7dw01 and allow
configuring them both for VGA and QVGA depending on the orientation.
Looking at the panel spec, it has the following pins:
RESB - reset
MO - VGA/QVGA
UD - vertical scanning direction
LR - horizontal scanning direction
INI - power on control
And it needs 3.3V power.
Are you saying that on some boards the gpio used for enable_gpio is
actually used to switch on a 3.3V regulator?
I guess you do have some device with ls037v7dw01 since you've been
patching it?
No, I don't have any boards with that panel.
Tomi
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[PATCH] fbdev: omap2: Fix format string mismatch in display-sysfs.c
Fix two format string mismatch in display-sysfs.c Signed-off-by: Masanari Iida standby2...@gmail.com --- drivers/video/fbdev/omap2/dss/display-sysfs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/video/fbdev/omap2/dss/display-sysfs.c b/drivers/video/fbdev/omap2/dss/display-sysfs.c index 5a2095a..5928bc9 100644 --- a/drivers/video/fbdev/omap2/dss/display-sysfs.c +++ b/drivers/video/fbdev/omap2/dss/display-sysfs.c @@ -184,7 +184,7 @@ static ssize_t display_rotate_show(struct device *dev, if (!dssdev-driver-get_rotate) return -ENOENT; rotate = dssdev-driver-get_rotate(dssdev); - return snprintf(buf, PAGE_SIZE, %u\n, rotate); + return snprintf(buf, PAGE_SIZE, %d\n, rotate); } static ssize_t display_rotate_store(struct device *dev, @@ -215,7 +215,7 @@ static ssize_t display_mirror_show(struct device *dev, if (!dssdev-driver-get_mirror) return -ENOENT; mirror = dssdev-driver-get_mirror(dssdev); - return snprintf(buf, PAGE_SIZE, %u\n, mirror); + return snprintf(buf, PAGE_SIZE, %d\n, mirror); } static ssize_t display_mirror_store(struct device *dev, -- 2.0.0.rc1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] fbdev: omap2: Fix format string mismatch in display-sysfs.c
On Monday, April 28, 2014 7:54 PM, Masanari Iida wrote:
Fix two format string mismatch in display-sysfs.c
Signed-off-by: Masanari Iida standby2...@gmail.com
---
drivers/video/fbdev/omap2/dss/display-sysfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/fbdev/omap2/dss/display-sysfs.c
b/drivers/video/fbdev/omap2/dss/display-
sysfs.c
index 5a2095a..5928bc9 100644
--- a/drivers/video/fbdev/omap2/dss/display-sysfs.c
+++ b/drivers/video/fbdev/omap2/dss/display-sysfs.c
@@ -184,7 +184,7 @@ static ssize_t display_rotate_show(struct device *dev,
if (!dssdev-driver-get_rotate)
return -ENOENT;
rotate = dssdev-driver-get_rotate(dssdev);
According to 'struct omap_dss_driver', get_rotate() returns 'u8'.
Then, how about changing the type of 'rotate' variable from 'int'
to 'u8' as below?
--- a/drivers/video/fbdev/omap2/dss/display-sysfs.c
+++ b/drivers/video/fbdev/omap2/dss/display-sysfs.c
@@ -180,7 +180,7 @@ static ssize_t display_rotate_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
- int rotate;
+ u8 rotate;
if (!dssdev-driver-get_rotate)
return -ENOENT;
rotate = dssdev-driver-get_rotate(dssdev);
Best regards,
Jingoo Han
- return snprintf(buf, PAGE_SIZE, %u\n, rotate);
+ return snprintf(buf, PAGE_SIZE, %d\n, rotate);
}
static ssize_t display_rotate_store(struct device *dev,
@@ -215,7 +215,7 @@ static ssize_t display_mirror_show(struct device *dev,
if (!dssdev-driver-get_mirror)
return -ENOENT;
mirror = dssdev-driver-get_mirror(dssdev);
- return snprintf(buf, PAGE_SIZE, %u\n, mirror);
+ return snprintf(buf, PAGE_SIZE, %d\n, mirror);
}
static ssize_t display_mirror_store(struct device *dev,
--
2.0.0.rc1
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Re: [PATCH 1a/4] mfd: twl4030-power: Add generic reset configuration
The twl4030 PMIC needs to be configured properly for things like
warm reset and deeper idle states so the PMIC manages the regulators
properly based on the hardware triggers from the SoC.
For example, when rebooting an OMAP3530 at 125 MHz, it hangs.
With this patch, TWL4030 will be reset when a warm reset occures.
This way the OMAP3530 does not hang on reboot.
Let's use this as the default when compatible = ti,twl4030-power.
Other more complicated configurations can be added to the driver
based on other compatible flags.
Based on earlier patch by Matthias Brugger matthias@gmail.com:
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/144161.html
For more information about twl4030 configuration for the
power scripts see:
http://www.omappedia.com/wiki/TWL4030_power_scripts
Cc: Matthias Brugger matthias@gmail.com
Cc: Robert Nelson robertcnel...@gmail.com
Cc: Peter De Schrijver pdeschrij...@nvidia.com
Cc: Samuel Ortiz sa...@linux.intel.com
Cc: Lee Jones lee.jo...@linaro.org
Signed-off-by: Tony Lindgren t...@atomide.com
---
Sorry this got accidentally left out, should be the first patch
in the series.
diff --git a/Documentation/devicetree/bindings/mfd/twl4030-power.txt
b/Documentation/devicetree/bindings/mfd/twl4030-power.txt
index 8e15ec3..b906116 100644
--- a/Documentation/devicetree/bindings/mfd/twl4030-power.txt
+++ b/Documentation/devicetree/bindings/mfd/twl4030-power.txt
@@ -5,7 +5,12 @@ to control the power resources, including power scripts. For
now, the
binding only supports the complete shutdown of the system after poweroff.
Required properties:
-- compatible : must be ti,twl4030-power
+- compatible : must be one of the following
+ ti,twl4030-power
+ ti,twl4030-power-reset
+
I think it'll be sensible to wait for a DT Ack for this kind of
change.
+#ifdef CONFIG_OF
+
+/* Generic warm reset configuration for omap3 */
+
+static struct twl4030_ins omap3_wrst_seq[] = {
+ { MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2 },
+ { MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_WRST), 15 },
+ { MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_WRST), 15 },
+ { MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_WRST), 0x60 },
+ { MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2 },
+ { MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_ACTIVE), 2 },
+};
Nit: I'd prefer the number formatting to be unified here i.e. all in
the same base, all 0x10 with leading zero.
+static struct twl4030_script omap3_wrst_script = {
+ .script = omap3_wrst_seq,
+ .size = ARRAY_SIZE(omap3_wrst_seq),
+ .flags = TWL4030_WRST_SCRIPT,
+};
+
+static struct twl4030_script *omap3_reset_scripts[] = {
+ omap3_wrst_script,
+};
+
+static struct twl4030_resconfig omap3_rconfig[] = {
+ { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, .type = -1,
+ .type2 = -1 },
+ { .resource = RES_VDD1, .devgroup = DEV_GRP_P1, .type = -1,
+ .type2 = -1 },
+ { .resource = RES_VDD2, .devgroup = DEV_GRP_P1, .type = -1,
+ .type2 = -1 },
+ { 0, 0},
+};
Nit: May be just my OCD, but this looks a little messy. Perhaps a
simple MACRO might tidy things up, although that seems a little
over-kill for such a small sturct[]. At the very least least please
even up the brackets in the sentinel.
/me goes to organise his soup tins into alphabetical order.
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Re: [PATCH 1/4] mfd: twl4030-power: Add recommended idle configuration
These settings are based on the Recommended Sleep Sequences for the Zoom Platform pdf at: http://omappedia.com/wiki/File:Recommended_Sleep_Sequences_Zoom.pdf These settings assume most of the regulators are under control of Linux, and cuts off VDD1 and VDD2 during off-idle as Linux cannot do it. Linux does it becuase Linux can't do it. Eh? For any board specific changes to these, let's patch them in as changes to the generic data in the follow-up patches. This keeps the board specific changes small. Note that this does not consider the twl5030 errata 27. That can be added later on after it has been tested. Cc: Peter De Schrijver pdeschrij...@nvidia.com Cc: Samuel Ortiz sa...@linux.intel.com Cc: Lee Jones lee.jo...@linaro.org Signed-off-by: Tony Lindgren t...@atomide.com --- .../devicetree/bindings/mfd/twl4030-power.txt | 4 + drivers/mfd/twl4030-power.c| 165 + driver/mfd changes look good to me: Acked-by: Lee Jones lee.jo...@linaro.org -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 2/2] ARM: dts: cm-t54: add WiFi/BT support
Add support of AW-NH387 (mwifiex) WiFi/BT chip connected to MMC3.
Signed-off-by: Dmitry Lifshitz lifsh...@compulab.co.il
---
Changes from V1:
* Platform quirk for deasserting PDN and RST GPIOs of WiFi chip replaced by
appropriate regulators in DT.
arch/arm/boot/dts/omap5-cm-t54.dts | 53 +++-
1 files changed, 52 insertions(+), 1 deletions(-)
diff --git a/arch/arm/boot/dts/omap5-cm-t54.dts
b/arch/arm/boot/dts/omap5-cm-t54.dts
index 787c4aa..570130f 100644
--- a/arch/arm/boot/dts/omap5-cm-t54.dts
+++ b/arch/arm/boot/dts/omap5-cm-t54.dts
@@ -23,6 +23,28 @@
regulator-max-microvolt = 330;
};
+ vwlan_pdn_fixed: fixed-regulator-vwlan-pdn {
+ compatible = regulator-fixed;
+ regulator-name = vwlan_pdn_fixed;
+ regulator-min-microvolt = 330;
+ regulator-max-microvolt = 330;
+ vin-supply = ldo2_reg;
+ gpio = gpio4 13 GPIO_ACTIVE_HIGH; /* gpio4_109 */
+ startup-delay-us = 1000;
+ enable-active-high;
+ };
+
+ vwlan_fixed: fixed-regulator-vwlan {
+ compatible = regulator-fixed;
+ regulator-name = vwlan_fixed;
+ regulator-min-microvolt = 330;
+ regulator-max-microvolt = 330;
+ vin-supply = vwlan_pdn_fixed;
+ gpio = gpio4 14 GPIO_ACTIVE_HIGH; /* gpio4_110 */
+ startup-delay-us = 1000;
+ enable-active-high;
+ };
+
/* HS USB Host PHY on PORT 2 */
hsusb2_phy: hsusb2_phy {
compatible = usb-nop-xceiv;
@@ -92,6 +114,24 @@
;
};
+ mmc3_pins: pinmux_mmc3_pins {
+ pinctrl-single,pins =
+ OMAP5_CORE_IOPAD(0x29a4, PIN_INPUT_PULLUP | MUX_MODE0)
/* wlsdio_clk */
+ OMAP5_CORE_IOPAD(0x29a6, PIN_INPUT_PULLUP | MUX_MODE0)
/* wlsdio_cmd */
+ OMAP5_CORE_IOPAD(0x29a8, PIN_INPUT_PULLUP | MUX_MODE0)
/* wlsdio_data0 */
+ OMAP5_CORE_IOPAD(0x29aa, PIN_INPUT_PULLUP | MUX_MODE0)
/* wlsdio_data1 */
+ OMAP5_CORE_IOPAD(0x29ac, PIN_INPUT_PULLUP | MUX_MODE0)
/* wlsdio_data2 */
+ OMAP5_CORE_IOPAD(0x29ae, PIN_INPUT_PULLUP | MUX_MODE0)
/* wlsdio_data3 */
+ ;
+ };
+
+ wlan_gpios_pins: pinmux_wlan_gpios_pins {
+ pinctrl-single,pins =
+ OMAP5_CORE_IOPAD(0x299c, PIN_OUTPUT_PULLDOWN |
MUX_MODE6) /* gpio4_109 */
+ OMAP5_CORE_IOPAD(0x299e, PIN_OUTPUT_PULLDOWN |
MUX_MODE6) /* gpio4_110 */
+ ;
+ };
+
usbhost_pins: pinmux_usbhost_pins {
pinctrl-single,pins =
OMAP5_CORE_IOPAD(0x28c4, PIN_INPUT | MUX_MODE0) /*
usbb2_hsic_strobe */
@@ -121,6 +161,17 @@
ti,non-removable;
};
+mmc3 {
+ pinctrl-names = default;
+ pinctrl-0 =
+ mmc3_pins
+ wlan_gpios_pins
+ ;
+ vmmc-supply = vwlan_fixed;
+ bus-width = 4;
+ ti,non-removable;
+};
+
mmc4 {
status = disabled;
};
@@ -255,7 +306,7 @@
regulator-name = ldo2;
regulator-min-microvolt = 330;
regulator-max-microvolt = 330;
- regulator-boot-on;
+ startup-delay-us = 1000;
};
ldo3_reg: ldo3 {
--
1.7.5.4
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[PATCH v2 0/2] ARM: dts: sbc-t54: add support for sbc-t54 with cm-t54
Add support for CompuLab CM-T54 CoM and SBC-T54 board: http://compulab.co.il/products/computer-on-modules/cm-t54/ http://compulab.co.il/products/sbcs/sbc-t54/ SBC-T54 is a single board computer based on OMAP5432 CPU. It is implemented with a CM-T54 CoM providing most of the functions, and SB-T54 carrier board providing connectors and several additional functions. Changes from V1: * Used OMAP5_CORE_IOPAD macros for pimnux settings * Added CD and WP support for SD/MMC card on SB-T54 * Platform quirk for deasserting PDN and RST GPIOs of WiFi chip replaced by appropriate regulators in DT. Dmitry Lifshitz (2): ARM: dts: sbc-t54: add support for sbc-t54 with cm-t54 ARM: dts: cm-t54: add WiFi/BT support arch/arm/boot/dts/Makefile |2 + arch/arm/boot/dts/omap5-cm-t54.dts | 414 +++ arch/arm/boot/dts/omap5-sbc-t54.dts | 52 + 3 files changed, 468 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/omap5-cm-t54.dts create mode 100644 arch/arm/boot/dts/omap5-sbc-t54.dts -- 1.7.5.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/2] ARM: dts: sbc-t54: add support for sbc-t54 with cm-t54
Add support for CM-T54 CoM and SBC-T54 board:
http://compulab.co.il/products/computer-on-modules/cm-t54/
http://compulab.co.il/products/sbcs/sbc-t54/
SBC-T54 is a single board computer based on OMAP5432 CPU.
It is implemented with a CM-T54 CoM providing most of the functions,
and SB-T54 carrier board providing connectors and several additional
functions.
Added basic support for:
* PMIC
* LED
* MMC/SD
* eMMC
* USB
* I2C1/4
* SB-T54 and CM-T54 EEPROMs
* RTC
Signed-off-by: Dmitry Lifshitz lifsh...@compulab.co.il
---
Changes from V1:
* Used OMAP5_CORE_IOPAD macros for pimnux settings
* Added CD and WP support for SD/MMC card on SB-T54
arch/arm/boot/dts/Makefile |2 +
arch/arm/boot/dts/omap5-cm-t54.dts | 363 +++
arch/arm/boot/dts/omap5-sbc-t54.dts | 52 +
3 files changed, 417 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/omap5-cm-t54.dts
create mode 100644 arch/arm/boot/dts/omap5-sbc-t54.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0bdeba3..f7b2ec0 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -277,6 +277,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap4-var-som.dtb \
omap4-sdp.dtb \
omap4-sdp-es23plus.dtb \
+ omap5-cm-t54.dtb \
+ omap5-sbc-t54.dtb \
omap5-uevm.dtb \
am335x-evm.dtb \
am335x-evmsk.dtb \
diff --git a/arch/arm/boot/dts/omap5-cm-t54.dts
b/arch/arm/boot/dts/omap5-cm-t54.dts
new file mode 100644
index 000..787c4aa
--- /dev/null
+++ b/arch/arm/boot/dts/omap5-cm-t54.dts
@@ -0,0 +1,363 @@
+/*
+ * Support for CompuLab CM-T54
+ */
+/dts-v1/;
+
+#include omap5.dtsi
+#include dt-bindings/interrupt-controller/irq.h
+#include dt-bindings/interrupt-controller/arm-gic.h
+
+/ {
+ model = CompuLab CM-T54;
+ compatible = compulab,omap5-cm-t54, ti,omap5;
+
+ memory {
+ device_type = memory;
+ reg = 0x8000 0x7F00; /* 2048 MB */
+ };
+
+ vmmcsd_fixed: fixed-regulator-mmcsd {
+ compatible = regulator-fixed;
+ regulator-name = vmmcsd_fixed;
+ regulator-min-microvolt = 330;
+ regulator-max-microvolt = 330;
+ };
+
+ /* HS USB Host PHY on PORT 2 */
+ hsusb2_phy: hsusb2_phy {
+ compatible = usb-nop-xceiv;
+ reset-gpios = gpio3 12 GPIO_ACTIVE_LOW; /* gpio3_76
HUB_RESET */
+ };
+
+ /* HS USB Host PHY on PORT 3 */
+ hsusb3_phy: hsusb3_phy {
+ compatible = usb-nop-xceiv;
+ reset-gpios = gpio3 19 GPIO_ACTIVE_LOW; /* gpio3_83
ETH_RESET */
+ };
+
+ leds {
+ compatible = gpio-leds;
+ led@1 {
+ label = Heartbeat;
+ gpios = gpio3 16 GPIO_ACTIVE_HIGH; /* gpio3_80
ACT_LED */
+ linux,default-trigger = heartbeat;
+ default-state = off;
+ };
+ };
+};
+
+omap5_pmx_core {
+ pinctrl-names = default;
+ pinctrl-0 =
+ led_gpio_pins
+ usbhost_pins
+ ;
+
+ led_gpio_pins: pinmux_led_gpio_pins {
+ pinctrl-single,pins =
+ OMAP5_CORE_IOPAD(0x28b0, PIN_OUTPUT | MUX_MODE6) /*
hsi2_caflag.gpio3_80 */
+ ;
+ };
+
+ i2c1_pins: pinmux_i2c1_pins {
+ pinctrl-single,pins =
+ OMAP5_CORE_IOPAD(0x29f2, PIN_INPUT_PULLUP | MUX_MODE0)
/* i2c1_pmic_scl */
+ OMAP5_CORE_IOPAD(0x29f4, PIN_INPUT_PULLUP | MUX_MODE0)
/* i2c1_pmic_sda */
+ ;
+ };
+
+ mmc1_pins: pinmux_mmc1_pins {
+ pinctrl-single,pins =
+ OMAP5_CORE_IOPAD(0x29e2, PIN_INPUT_PULLUP | MUX_MODE0)
/* sdcard_clk */
+ OMAP5_CORE_IOPAD(0x29e4, PIN_INPUT_PULLUP | MUX_MODE0)
/* sdcard_cmd */
+ OMAP5_CORE_IOPAD(0x29e6, PIN_INPUT_PULLUP | MUX_MODE0)
/* sdcard_data2 */
+ OMAP5_CORE_IOPAD(0x29e8, PIN_INPUT_PULLUP | MUX_MODE0)
/* sdcard_data3 */
+ OMAP5_CORE_IOPAD(0x29ea, PIN_INPUT_PULLUP | MUX_MODE0)
/* sdcard_data0 */
+ OMAP5_CORE_IOPAD(0x29ec, PIN_INPUT_PULLUP | MUX_MODE0)
/* sdcard_data1 */
+ ;
+ };
+
+ mmc2_pins: pinmux_mmc2_pins {
+ pinctrl-single,pins =
+ OMAP5_CORE_IOPAD(0x2840, PIN_INPUT_PULLUP | MUX_MODE0)
/* emmc_clk */
+ OMAP5_CORE_IOPAD(0x2842, PIN_INPUT_PULLUP | MUX_MODE0)
/* emmc_cmd */
+ OMAP5_CORE_IOPAD(0x2844, PIN_INPUT_PULLUP | MUX_MODE0)
/* emmc_data0 */
+ OMAP5_CORE_IOPAD(0x2846, PIN_INPUT_PULLUP | MUX_MODE0)
/* emmc_data1 */
+ OMAP5_CORE_IOPAD(0x2848, PIN_INPUT_PULLUP | MUX_MODE0)
/*
Re: [PATCH 2/4] mfd: twl4030-power: Add support for board specific configuration
With the recommended twl4030 configuration added, we can now add
board specific changes as modifications to the recommended
configuration.
Cc: Peter De Schrijver pdeschrij...@nvidia.com
Cc: Samuel Ortiz sa...@linux.intel.com
Cc: Lee Jones lee.jo...@linaro.org
Signed-off-by: Tony Lindgren t...@atomide.com
---
drivers/mfd/twl4030-power.c | 21 +
include/linux/i2c/twl.h | 1 +
2 files changed, 22 insertions(+)
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index 89a8528..89c6b1a 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -511,13 +511,34 @@ twl4030_power_configure_scripts(const struct
twl4030_power_data *pdata)
return 0;
}
+static void twl4030_patch_rconfig(struct twl4030_resconfig *common,
+ struct twl4030_resconfig *board)
+{
+ while (common-resource) {
+ struct twl4030_resconfig *b = board;
+
+ while (b-resource) {
+ if (b-resource == common-resource) {
+ *common = *b;
+ break;
+ }
+ b++;
+ }
+ common++;
+ }
+}
Forgive my ignorance, as I don't know how 'common' is setup, but we
appear to move to the next 'common' reference them immediately
dereference it without checking to see if it actually exists. Same
with 'b'. What happens if we reach the end of the array? NULL
dereference or does the final element always have a NULLed resource
attribute?
static int
twl4030_power_configure_resources(const struct twl4030_power_data *pdata)
{
struct twl4030_resconfig *resconfig = pdata-resource_config;
+ struct twl4030_resconfig *boardconf = pdata-board_config;
int err;
if (resconfig) {
+ if (boardconf)
+ twl4030_patch_rconfig(resconfig, boardconf);
+
while (resconfig-resource) {
err = twl4030_configure_resource(resconfig);
if (err)
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
index ade1c06..069f78f 100644
--- a/include/linux/i2c/twl.h
+++ b/include/linux/i2c/twl.h
@@ -659,6 +659,7 @@ struct twl4030_power_data {
struct twl4030_script **scripts;
unsigned num;
struct twl4030_resconfig *resource_config;
+ struct twl4030_resconfig *board_config;
#define TWL4030_RESCONFIG_UNDEF ((u8)-1)
bool use_poweroff; /* Board is wired for TWL poweroff */
};
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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Re: [PATCH 3/4] mfd: twl4030power: Add a configuration to turn off oscillator during off-idle
Some oscillators can be turned off during off-idle saving few a little bit power at the cost of the oscillator start up latency. If you board can do this, you can now enable it by using the ti,twl4030-power-idle-osc-off compatible flag. Cc: Peter De Schrijver pdeschrij...@nvidia.com Cc: Samuel Ortiz sa...@linux.intel.com Cc: Lee Jones lee.jo...@linaro.org Signed-off-by: Tony Lindgren t...@atomide.com --- .../devicetree/bindings/mfd/twl4030-power.txt | 6 ++ drivers/mfd/twl4030-power.c | 19 +++ Code in drivers/mfd looks scruffy but fine: Acked-by: Lee Jones lee.jo...@linaro.org -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/5] ASoC: Add support for machine specific trigger callback
From: Jarkko Nikula jarkko.nik...@bitmer.com
Machine specific trigger callback allows to do final stream start/stop
related operations in a machine driver after setting up the codec, DMA and
DAI.
One example could be clock management for linked streams case where machine
driver can start/stop synchronously the linked streams.
Signed-off-by: Jarkko Nikula jarkko.nik...@bitmer.com
Signed-off-by: Stefan Roese s...@denx.de
---
sound/soc/soc-pcm.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c
index 2cedf09..a3a7021 100644
--- a/sound/soc/soc-pcm.c
+++ b/sound/soc/soc-pcm.c
@@ -819,6 +819,13 @@ static int soc_pcm_trigger(struct snd_pcm_substream
*substream, int cmd)
if (ret 0)
return ret;
}
+
+ if (rtd-dai_link-ops rtd-dai_link-ops-trigger) {
+ ret = rtd-dai_link-ops-trigger(substream, cmd);
+ if (ret 0)
+ return ret;
+ }
+
return 0;
}
--
1.9.1
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[PATCH 4/5] DT: Add vendor prefix for HEAD acoustics
Add ha for HEAD acoustics to the list of DT vendor prefixes. Signed-off-by: Stefan Roese s...@denx.de Cc: Thorsten Eisbein thorsten.eisb...@head-acoustics.de --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index abc3080..0cdca38 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -53,6 +53,7 @@ globalscale Globalscale Technologies, Inc. gmtGlobal Mixed-mode Technology, Inc. google Google, Inc. gumstixGumstix, Inc. +ha HEAD acoustics haoyu Haoyu Microelectronic Co. Ltd. hisilicon Hisilicon Limited. honeywell Honeywell -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/5] ASoC: omap: Add HA (HEAD acoustics) DSP add-on card audio driver for TAO3530
From: Jarkko Nikula jarkko.nik...@bitmer.com
HA DSP card which features a HA DSP audio codec is intended to be connected
to TAO-3530 (or BeagleBoard) using McBSP3 for digital audio and I2C bus for
codec control. A GPIO signal from CPU to codec is used to request clock
signals active.
This machine driver has a special feature to support linked streams where
playback and capture can be triggered HW simultaneously. This is implemented
for linked streams by activating/deactivating the clock request signal to
codec only after both streams are ready to start/stop. For non-linked streams
the request signal is active whenever there is a stream active.
Updates from Stefan Roese, 2014-04-28:
Port the HA DSP add-on card audio driver to Linux v3.15-rc. This
includes support for DT based probing. No platform-data code is
needed any more, DT nodes are sufficient.
The GPIO used to synchronize the clock for playback and record
is now configured via the DT as well (no #define any more). When
this GPIO is not configured in the DT, the sync clock feature is
disabled.
The slave mode #define was also moved to a DT configuration
property (ha_dsp_codec_slave). If this property is set in the DT
sound card device node, then this testing slave mode is used.
Otherwise the normal operation is selected.
Also the now recommended card registration via snd_soc_register_card()
is used instead of platform_device_add().
Signed-off-by: Jarkko Nikula jarkko.nik...@bitmer.com
Signed-off-by: Stefan Roese s...@denx.de
Cc: Thorsten Eisbein thorsten.eisb...@head-acoustics.de
---
sound/soc/omap/Kconfig | 11 ++
sound/soc/omap/Makefile | 2 +
sound/soc/omap/ha-dsp-card.c | 307 +++
3 files changed, 320 insertions(+)
create mode 100644 sound/soc/omap/ha-dsp-card.c
diff --git a/sound/soc/omap/Kconfig b/sound/soc/omap/Kconfig
index e006593..86cc869 100644
--- a/sound/soc/omap/Kconfig
+++ b/sound/soc/omap/Kconfig
@@ -117,3 +117,14 @@ config SND_OMAP_SOC_OMAP3_PANDORA
select SND_SOC_TWL4030
help
Say Y if you want to add support for SoC audio on the OMAP3 Pandora.
+
+config SND_OMAP_SOC_HA_DSP_CARD
+ tristate SoC Audio support for HA DSP add-on card
+ depends on TWL4030_CORE SND_OMAP_SOC
+ depends on SND_OMAP_SOC_OMAP_TWL4030
+ select SND_OMAP_SOC_MCBSP
+ select SND_SOC_TWL4030
+ select SND_SOC_HA_DSP
+ help
+ Say Y if you want to add support for Soc audio on HA DSP add-on card
+ for TAO-3530/Thunder or BeagleBoard
diff --git a/sound/soc/omap/Makefile b/sound/soc/omap/Makefile
index a725905..02c0094 100644
--- a/sound/soc/omap/Makefile
+++ b/sound/soc/omap/Makefile
@@ -21,6 +21,7 @@ snd-soc-omap-abe-twl6040-objs := omap-abe-twl6040.o
snd-soc-omap-twl4030-objs := omap-twl4030.o
snd-soc-omap3pandora-objs := omap3pandora.o
snd-soc-omap-hdmi-card-objs := omap-hdmi-card.o
+snd-soc-ha-dsp-card-objs := ha-dsp-card.o
obj-$(CONFIG_SND_OMAP_SOC_N810) += snd-soc-n810.o
obj-$(CONFIG_SND_OMAP_SOC_RX51) += snd-soc-rx51.o
@@ -31,3 +32,4 @@ obj-$(CONFIG_SND_OMAP_SOC_OMAP_ABE_TWL6040) +=
snd-soc-omap-abe-twl6040.o
obj-$(CONFIG_SND_OMAP_SOC_OMAP_TWL4030) += snd-soc-omap-twl4030.o
obj-$(CONFIG_SND_OMAP_SOC_OMAP3_PANDORA) += snd-soc-omap3pandora.o
obj-$(CONFIG_SND_OMAP_SOC_OMAP_HDMI) += snd-soc-omap-hdmi-card.o
+obj-$(CONFIG_SND_OMAP_SOC_HA_DSP_CARD) += snd-soc-ha-dsp-card.o
diff --git a/sound/soc/omap/ha-dsp-card.c b/sound/soc/omap/ha-dsp-card.c
new file mode 100644
index 000..d2656ff
--- /dev/null
+++ b/sound/soc/omap/ha-dsp-card.c
@@ -0,0 +1,307 @@
+/*
+ * ha-dsp-card.c -- SoC audio HA-DSP add-on card for TAO-3530
+ *
+ * Author: Jarkko Nikula jarkko.nik...@bitmer.com
+ *
+ * Additional changes by:
+ * Thorsten Eisbein thorsten.eisb...@head-acoustics.de
+ * Stefan Roese s...@denx.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ */
+
+#include linux/clk.h
+#include linux/platform_device.h
+#include linux/module.h
+#include sound/core.h
+#include sound/pcm.h
+#include sound/pcm_params.h
+#include sound/soc.h
+#include sound/soc-dapm.h
+
+#include asm/mach-types.h
+#include linux/gpio.h
+#include linux/of_gpio.h
+
+#include omap-mcbsp.h
+
+struct ha_dsp_card {
+ int slave;
+ int gpio;
+ int play_act;
+ int rec_act;
+};
+
+static int ha_dsp_card_hw_params(struct snd_pcm_substream *substream,
+struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_pcm_runtime *rtd = substream-private_data;
+ struct snd_soc_dai *codec_dai = rtd-codec_dai;
+ struct snd_soc_dai *cpu_dai = rtd-cpu_dai;
+ struct snd_soc_codec *codec = rtd-codec;
+ struct snd_soc_card *card = codec-card;
+ struct ha_dsp_card *priv = snd_soc_card_get_drvdata(card);
+ unsigned int fmt;
+ int ret;
+
[PATCH 2/5] ASoC: Add HA (HEAD acoustics) DSP codec driver template
From: Jarkko Nikula jarkko.nik...@bitmer.com
This codec driver template represents an I2C controlled multichannel audio
codec that has many typical ASoC codec driver features like volume controls,
mixer stages, mux selection, output power control, in-codec audio routings,
codec bias management and DAI link configuration.
Updates from Stefan Roese, 2014-04-28:
Port the HA DSP codec driver to Linux v3.15-rc. This includes
support for DT based probing. No platform-data code is needed
any more, DT nodes are sufficient.
Signed-off-by: Jarkko Nikula jarkko.nik...@bitmer.com
Signed-off-by: Stefan Roese s...@denx.de
Cc: Thorsten Eisbein thorsten.eisb...@head-acoustics.de
---
sound/soc/codecs/Kconfig | 4 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/ha-dsp.c | 419 ++
sound/soc/codecs/ha-dsp.h | 50 ++
4 files changed, 475 insertions(+)
create mode 100644 sound/soc/codecs/ha-dsp.c
create mode 100644 sound/soc/codecs/ha-dsp.h
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index f0e8401..f357988 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -51,6 +51,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_DA732X if I2C
select SND_SOC_DA9055 if I2C
select SND_SOC_BT_SCO
+ select SND_SOC_HA_DSP if I2C
select SND_SOC_ISABELLE if I2C
select SND_SOC_JZ4740_CODEC
select SND_SOC_LM4857 if I2C
@@ -343,6 +344,9 @@ config SND_SOC_BT_SCO
config SND_SOC_DMIC
tristate
+config SND_SOC_HA_DSP
+ tristate
+
config SND_SOC_HDMI_CODEC
tristate HDMI stub CODEC
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index 3c4d275..f296bec 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -39,6 +39,7 @@ snd-soc-da732x-objs := da732x.o
snd-soc-da9055-objs := da9055.o
snd-soc-bt-sco-objs := bt-sco.o
snd-soc-dmic-objs := dmic.o
+snd-soc-ha-dsp-objs := ha-dsp.o
snd-soc-isabelle-objs := isabelle.o
snd-soc-jz4740-codec-objs := jz4740.o
snd-soc-l3-objs := l3.o
@@ -190,6 +191,7 @@ obj-$(CONFIG_SND_SOC_DA732X)+= snd-soc-da732x.o
obj-$(CONFIG_SND_SOC_DA9055) += snd-soc-da9055.o
obj-$(CONFIG_SND_SOC_BT_SCO) += snd-soc-bt-sco.o
obj-$(CONFIG_SND_SOC_DMIC) += snd-soc-dmic.o
+obj-$(CONFIG_SND_SOC_HA_DSP) += snd-soc-ha-dsp.o
obj-$(CONFIG_SND_SOC_ISABELLE) += snd-soc-isabelle.o
obj-$(CONFIG_SND_SOC_JZ4740_CODEC) += snd-soc-jz4740-codec.o
obj-$(CONFIG_SND_SOC_L3) += snd-soc-l3.o
diff --git a/sound/soc/codecs/ha-dsp.c b/sound/soc/codecs/ha-dsp.c
new file mode 100644
index 000..7cf24dc
--- /dev/null
+++ b/sound/soc/codecs/ha-dsp.c
@@ -0,0 +1,419 @@
+/*
+ * ha-dsp.c -- HA DSP ALSA SoC Audio driver
+ *
+ * Copyright 2011 Head acoustics GmbH
+ *
+ * Author: Jarkko Nikula jarkko.nik...@bitmer.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/module.h
+#include linux/moduleparam.h
+#include linux/init.h
+#include linux/delay.h
+#include linux/pm.h
+#include linux/i2c.h
+#include linux/platform_device.h
+#include linux/regmap.h
+#include linux/slab.h
+#include sound/core.h
+#include sound/pcm.h
+#include sound/pcm_params.h
+#include sound/soc.h
+#include sound/soc-dapm.h
+#include sound/tlv.h
+#include sound/initval.h
+
+#include ha-dsp.h
+
+/* Reset default register values for soc-cache */
+static const struct reg_default ha_dsp_reg_defaults[] = {
+ { 0x00, 0x00 },
+ { 0x01, 0x55 },
+ { 0x02, 0x55 },
+ { 0x03, 0x00 },
+ { 0x04, 0x00 },
+ { 0x05, 0x00 },
+ { 0x06, 0x00 },
+ { 0x07, 0x00 },
+ { 0x08, 0x02 },
+ { 0x09, 0x02 },
+ { 0x0a, 0x02 },
+ { 0x0b, 0x02 },
+ { 0x0c, 0x02 },
+ { 0x0d, 0x02 },
+ { 0x0e, 0x02 },
+ { 0x0f, 0x02 },
+};
+
+/* DSP mode selection */
+static const char *ha_dsp_mode_texts[] = {Mode 1, Mode 2};
+static SOC_ENUM_SINGLE_DECL(ha_dsp_mode_enum, HA_DSP_CTRL, 0,
+ ha_dsp_mode_texts);
+
+/* Monitor output mux selection */
+static const char *ha_dsp_monitor_texts[] = {Off, ADC, DAC};
+static SOC_ENUM_SINGLE_DECL(ha_dsp_monitor_enum, HA_DSP_CTRL, 1,
+ ha_dsp_monitor_texts);
+
+static const struct snd_kcontrol_new ha_dsp_monitor_control =
+ SOC_DAPM_ENUM(Route, ha_dsp_monitor_enum);
+
+/* Output mixers */
+static const struct snd_kcontrol_new ha_dsp_out1_mixer_controls[] = {
+ SOC_DAPM_SINGLE(DAC Switch, HA_DSP_OUT1_CTRL, 1, 1, 0),
+ SOC_DAPM_SINGLE(IN Bypass Switch, HA_DSP_OUT1_CTRL, 2, 1, 0),
+};
+static const struct snd_kcontrol_new ha_dsp_out2_mixer_controls[] = {
+ SOC_DAPM_SINGLE(DAC Switch, HA_DSP_OUT2_CTRL, 1, 1, 0),
+ SOC_DAPM_SINGLE(IN Bypass Switch, HA_DSP_OUT2_CTRL, 2, 1, 0),
+};
+static const struct snd_kcontrol_new
[PATCH 5/5] ASoC: omap: Add DT bindings documentation for HA DSP audio driver
Signed-off-by: Stefan Roese s...@denx.de
Cc: Thorsten Eisbein thorsten.eisb...@head-acoustics.de
---
.../devicetree/bindings/sound/omap3-ha.txt | 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/omap3-ha.txt
diff --git a/Documentation/devicetree/bindings/sound/omap3-ha.txt
b/Documentation/devicetree/bindings/sound/omap3-ha.txt
new file mode 100644
index 000..09eccda
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/omap3-ha.txt
@@ -0,0 +1,27 @@
+OMAP3 HA (HEAD acoustics) audio controller
+
+Required properties:
+- compatible: ha,ha-dsp-card for OMAP3-HA board (TAO3530 based)
+- ti,model: Name of the sound card (for example omap3-ha)
+- ti,mcbsp: phandle for the McBSP node
+- ti,codec: phandle for the twl4030 audio node
+- gpios: GPIO used to sync the clock for playback and record
+
+Optional properties:
+- ha_dsp_codec_slave:
+ Add this property to test the codec in slave mode or without actual codec.
+ This makes it possible to test this driver by letting the OMAP be the DAI
+ link master.
+
+Example:
+sound2 {
+ compatible = ha,ha-dsp-card;
+ ti,model = omap3-ha;
+
+ /* McBSP3 is used for HA-DSP */
+ ti,mcbsp = mcbsp3;
+ ti,codec = soc_audio;
+
+ /* GPIO to sync the clock for playback and record */
+ gpios = gpio2 12 GPIO_ACTIVE_LOW;/* GPIO 44 */
+};
--
1.9.1
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next-20140428 (regression: DEADLOCK)
omap2plus_defconfig shows for the following platform deadlock with
console_lock.
1: am335x-evm: Boot PASS: http://slexy.org/raw/s2biDSRTAP
2: am335x-sk: Boot PASS: http://slexy.org/raw/s20deZjf34
3: am3517-evm: Boot PASS: http://slexy.org/raw/s21NM1bLxs
4: am37x-evm: Boot PASS: http://slexy.org/raw/s2022AFyZ6
5: am43xx-epos: Boot PASS: http://slexy.org/raw/s21Dq284CM
6: BeagleBoard-XM: Boot PASS: http://slexy.org/raw/s2aK24U5ON
7: beagleboard-vanilla: Boot PASS: http://slexy.org/raw/s21j15I8kK
8: beaglebone-black: Boot PASS: http://slexy.org/raw/s21jO02jIK
9: craneboard: Boot PASS: http://slexy.org/raw/s22JGqMSfY
10: DRA7xx-EVM: Boot PASS: http://slexy.org/raw/s260y1Opd1
11: n900: Boot PASS: http://slexy.org/raw/s20IDKmJ6L
12: pandaboard-vanilla: Boot PASS: http://slexy.org/raw/s2dJcyep9A
13:sdp2430: Boot PASS: http://slexy.org/raw/s20Oldnm8I
14:sdp3430: Boot PASS: http://slexy.org/raw/s2Mo7s3ttZ
15: OMAP5432uEVM: Boot PASS: http://slexy.org/raw/s2qXj7HFTJ
=
[ INFO: possible recursive locking detected ]
3.15.0-rc2-next-20140428-2-gd0ca5e6 #1 Not tainted
-
swapper/0/0 is trying to acquire lock:
(console_lock){+.+...}, at: [c07d1124] con_init+0xc/0x28c
but task is already holding lock:
(console_lock){+.+...}, at: [c008c224] vprintk_emit+0x200/0x590
other info that might help us debug this:
Possible unsafe locking scenario:
CPU0
lock(console_lock);
lock(console_lock);
*** DEADLOCK ***
May be due to missing lock nesting notation
1 lock held by swapper/0/0:
#0: (console_lock){+.+...}, at: [c008c224] vprintk_emit+0x200/0x590
--
Regards,
Nishanth Menon
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Re: [PATCH 4/6] drivers: net: cpsw: Enable Annexe F Time sync
On 4/28/2014 1:25 PM, Richard Cochran wrote: On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote: Enable the Annex F Time Sync explicitly for DRA7x and AM4372. With this enabled the L2 PTP is working. L2 works fine without this bit. If this is needed for V3 hardware, then it should have its own code variant. okay while at that rename TS_BIT8 to TS_TTL_NONZERO Is this bit finally documented for am335x? Not for am335x, but for other SoC's it s documented. Thanks, Richard -- -George -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 5/6] ARM: AM43xx: clk: Change the cpts ref clock source to dpll_core_m5 clk
On 4/28/2014 12:40 PM, Richard Cochran wrote: On Mon, Apr 28, 2014 at 09:40:24AM +0530, George Cherian wrote: cpsw_cpts_rft_clk has got the choice of 3 clocksources -dpll_core_m4_ck -dpll_core_m5_ck -dpll_disp_m2_ck By default dpll_core_m4_ck is selected, witn this as clock source the CPTS doesnot work properly. It gives clockcheck errors while running PTP. clockcheck: clock jumped backward or running slower than expected! It is strange that I have never seen this error, since I have often tested linuxptp on a beagle bone white. In beagle bone white (AM335x) CPTS has a choice of 2 clocksource -dpll_core_m5_ck -dpll_core_m4_ck and by default dpll_core_m5_ck is used. Where as in AM437x the default clocksource used is dpll_core_m4_ck . You can change the clocksource in beagle bone white by writing 1 to 0x44e00520 (By default its 0). Can you please explain why this clock doesn't work correctly? By selecting dpll_core_m5_ck as the clocksource fixes this issue. In AM335x dpll_core_m5_ck is the default clocksource. The choice of clock source in the CPTS driver originally came from TI. It would be nice to know why that was the wrong choice. Thanks, Richard -- -George -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[Resend/PATCH] arm: dts: am43x-epos: Add qspi device.
This patch adds qspi nodes for am43xx SOC devices.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
Note,
checpatch gives 1 warning on flash compatible string
mx66l51235l. This flash is supported in m25p80 driver and
the driver is used for other flash devices also. Hence, each
flash compatible is not described in[1], but a genric example
is shown using spansion flash device.
[1]:
Documentation/devicetree/bindings/mtd/m25p80.txt
arch/arm/boot/dts/am4372.dtsi| 11 ++
arch/arm/boot/dts/am43x-epos-evm.dts | 63 ++
2 files changed, 74 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 36d523a..49633ff 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -735,6 +735,17 @@
#size-cells = 1;
status = disabled;
};
+
+ qspi: qspi@4790 {
+ compatible = ti,am4372-qspi;
+ reg = 0x4790 0x100;
+ #address-cells = 1;
+ #size-cells = 0;
+ ti,hwmods = qspi;
+ interrupts = 0 138 0x4;
+ num-cs = 4;
+ status = disabled;
+ };
};
};
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts
b/arch/arm/boot/dts/am43x-epos-evm.dts
index 167dbc8..25cd07c 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -138,6 +138,17 @@
0x160 (PIN_INPUT | MUX_MODE7) /*
spi0_cs1.gpio0_6 */
;
};
+
+ qspi1_default: qspi1_default {
+ pinctrl-single,pins =
+ 0x7c (PIN_INPUT_PULLUP | MUX_MODE3)
+ 0x88 (PIN_INPUT_PULLUP | MUX_MODE2)
+ 0x90 (PIN_INPUT_PULLUP | MUX_MODE3)
+ 0x94 (PIN_INPUT_PULLUP | MUX_MODE3)
+ 0x98 (PIN_INPUT_PULLUP | MUX_MODE3)
+ 0x9c (PIN_INPUT_PULLUP | MUX_MODE3)
+ ;
+ };
};
matrix_keypad: matrix_keypad@0 {
@@ -367,3 +378,55 @@
pinctrl-0 = spi1_pins;
status = okay;
};
+
+qspi {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = qspi1_default;
+
+ spi-max-frequency = 4800;
+ m25p80@0 {
+ compatible = mx66l51235l;
+ spi-max-frequency = 4800;
+ reg = 0;
+ spi-cpol;
+ spi-cpha;
+ spi-tx-bus-width = 1;
+ spi-rx-bus-width = 4;
+ #address-cells = 1;
+ #size-cells = 1;
+
+ /* MTD partition table.
+* The ROM checks the first 512KiB
+* for a valid file to boot(XIP).
+*/
+ partition@0 {
+ label = QSPI.U_BOOT;
+ reg = 0x 0x8;
+ };
+ partition@1 {
+ label = QSPI.U_BOOT.backup;
+ reg = 0x0008 0x0008;
+ };
+ partition@2 {
+ label = QSPI.U-BOOT-SPL_OS;
+ reg = 0x0010 0x0001;
+ };
+ partition@3 {
+ label = QSPI.U_BOOT_ENV;
+ reg = 0x0011 0x0001;
+ };
+ partition@4 {
+ label = QSPI.U-BOOT-ENV.backup;
+ reg = 0x0012 0x0001;
+ };
+ partition@5 {
+ label = QSPI.KERNEL;
+ reg = 0x0013 0x080;
+ };
+ partition@6 {
+ label = QSPI.FILESYSTEM;
+ reg = 0x0093 0x36D;
+ };
+ };
+};
--
1.7.9.5
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[PATCH 1/4] ARM: dts: am335x-bone-common: use phandles for USB and DMA refs
Use phandles instead of unit adresses to reference usb and dma nodes.
This makes the DT more robust and readable.
Signed-off-by: Guido Martínez gu...@vanguardiasur.com.ar
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi
b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 2e7d932..b95bc9a 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -183,28 +183,28 @@
usb {
status = okay;
- control@44e10620 {
+ usb_ctrl_mod {
status = okay;
};
- usb-phy@47401300 {
+ usb0_phy {
status = okay;
};
- usb-phy@47401b00 {
+ usb1_phy {
status = okay;
};
- usb@47401000 {
+ usb0 {
status = okay;
};
- usb@47401800 {
+ usb1 {
status = okay;
dr_mode = host;
};
- dma-controller@47402000 {
+ cppi41dma {
status = okay;
};
};
--
1.9.2
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[PATCH 4/4] ARM: dts: am335x-igep0033: use phandles for USB and DMA refs
Use phandles instead of unit adresses to reference usb and dma nodes.
This makes the DT more robust and readable.
Signed-off-by: Guido Martínez gu...@vanguardiasur.com.ar
---
arch/arm/boot/dts/am335x-igep0033.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi
b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 9f22c18..81cf68b 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -201,28 +201,28 @@
usb {
status = okay;
- control@44e10620 {
+ usb_ctrl_mod {
status = okay;
};
- usb-phy@47401300 {
+ usb0_phy {
status = okay;
};
- usb-phy@47401b00 {
+ usb1_phy {
status = okay;
};
- usb@47401000 {
+ usb0 {
status = okay;
};
- usb@47401800 {
+ usb1 {
status = okay;
dr_mode = host;
};
- dma-controller@47402000 {
+ cppi41dma {
status = okay;
};
};
--
1.9.2
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[PATCH 3/4] ARM: dts: am335x-evmsk: use phandles for USB and DMA refs
Use phandles instead of unit adresses to reference usb and dma nodes.
This makes the DT more robust and readable.
Signed-off-by: Guido Martínez gu...@vanguardiasur.com.ar
---
arch/arm/boot/dts/am335x-evmsk.dts | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts
b/arch/arm/boot/dts/am335x-evmsk.dts
index ab23885..44b8d75 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -364,28 +364,28 @@
usb {
status = okay;
- control@44e10620 {
+ usb_ctrl_mod {
status = okay;
};
- usb-phy@47401300 {
+ usb0_phy {
status = okay;
};
- usb-phy@47401b00 {
+ usb1_phy {
status = okay;
};
- usb@47401000 {
+ usb0 {
status = okay;
};
- usb@47401800 {
+ usb1 {
status = okay;
dr_mode = host;
};
- dma-controller@47402000 {
+ cppi41dma {
status = okay;
};
};
--
1.9.2
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[PATCH v2 6/7] ARM: dts: dra7: Add USB related nodes
Add nodes for the Super Speed USB controllers, omap-control-usb,
USB2 PHY and USB3 PHY devices.
Remove ocp2scp1 address space from hwmod data as it is
now provided via device tree.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 149 ++
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 10 --
2 files changed, 149 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 149b550..4535e54 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -789,6 +789,155 @@
dma-names = tx0, rx0;
status = disabled;
};
+
+ omap_control_usb2phy1: control-phy@4a002300 {
+ compatible = ti,control-phy-usb2;
+ reg = 0x4a002300 0x4;
+ reg-names = power;
+ };
+
+ omap_control_usb3phy1: control-phy@4a002370 {
+ compatible = ti,control-phy-pipe3;
+ reg = 0x4a002370 0x4;
+ reg-names = power;
+ };
+
+ omap_control_usb2phy2: control-phy@0x4a002e74 {
+ compatible = ti,control-phy-usb2-dra7;
+ reg = 0x4a002e74 0x4;
+ reg-names = power;
+ };
+
+ /* OCP2SCP1 */
+ ocp2scp@4a08 {
+ compatible = ti,omap-ocp2scp;
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+ reg = 0x4a08 0x20;
+ ti,hwmods = ocp2scp1;
+
+ usb2_phy1: phy@4a084000 {
+ compatible = ti,omap-usb2;
+ reg = 0x4a084000 0x400;
+ ctrl-module = omap_control_usb2phy1;
+ clocks = usb_phy1_always_on_clk32k,
+usb_otg_ss1_refclk960m;
+ clock-names = wkupclk,
+ refclk;
+ #phy-cells = 0;
+ };
+
+ usb2_phy2: phy@4a085000 {
+ compatible = ti,omap-usb2;
+ reg = 0x4a085000 0x400;
+ ctrl-module = omap_control_usb2phy2;
+ clocks = usb_phy2_always_on_clk32k,
+usb_otg_ss2_refclk960m;
+ clock-names = wkupclk,
+ refclk;
+ #phy-cells = 0;
+ };
+
+ usb3_phy1: phy@4a084400 {
+ compatible = ti,omap-usb3;
+ reg = 0x4a084400 0x80,
+ 0x4a084800 0x64,
+ 0x4a084c00 0x40;
+ reg-names = phy_rx, phy_tx, pll_ctrl;
+ ctrl-module = omap_control_usb3phy1;
+ clocks = usb_phy3_always_on_clk32k,
+sys_clkin1,
+usb_otg_ss1_refclk960m;
+ clock-names = wkupclk,
+ sysclk,
+ refclk;
+ #phy-cells = 0;
+ };
+ };
+
+ omap_dwc3_1@4888 {
+ compatible = ti,dwc3;
+ ti,hwmods = usb_otg_ss1;
+ reg = 0x4888 0x1;
+ interrupts = 0 77 4;
+ #address-cells = 1;
+ #size-cells = 1;
+ utmi-mode = 2;
+ ranges;
+ usb1: usb@4889 {
+ compatible = snps,dwc3;
+ reg = 0x4889 0x17000;
+ interrupts = 0 76 4;
+ phys = usb2_phy1, usb3_phy1;
+ phy-names = usb2-phy, usb3-phy;
+ tx-fifo-resize;
+ maximum-speed = super-speed;
+ dr_mode = otg;
+ };
+ };
+
+ omap_dwc3_2@488c {
+ compatible = ti,dwc3;
+ ti,hwmods = usb_otg_ss2;
+ reg = 0x488c 0x1;
+ interrupts = 0 92 4;
+ #address-cells = 1;
+ #size-cells = 1;
+ utmi-mode
[PATCH v2 5/7] phy: omap-usb2: Add clock names to Documentation binding
Add wkupclk and refclk information to DT binding information.
Signed-off-by: Roger Quadros rog...@ti.com
---
Documentation/devicetree/bindings/phy/ti-phy.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 788fb0f..9ce458f 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -32,6 +32,11 @@ Required properties:
- reg : Address and length of the register set for the device.
- #phy-cells: determine the number of cells that should be given in the
phandle while referencing this phy.
+ - clocks: a list of phandles and clock-specifier pairs, one for each entry in
+ clock-names.
+ - clock-names: should include:
+ * wkupclk - wakeup clock.
+ * refclk - reference clock (optional).
Optional properties:
- ctrl-module : phandle of the control module used by PHY driver to power on
@@ -44,6 +49,8 @@ usb2phy@4a0ad080 {
reg = 0x4a0ad080 0x58;
ctrl-module = omap_control_usb;
#phy-cells = 0;
+ clocks = usb_phy_cm_clk32k, usb_otg_ss_refclk960m;
+ clock-names = wkupclk, refclk;
};
TI PIPE3 PHY
--
1.8.3.2
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[PATCH v2 7/7] dts: dra7-evm: add USB support
Add USB pinmux information and USB modes
for the USB controllers.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7-evm.dts | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 5babba0..1d77815 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -93,6 +93,18 @@
0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
;
};
+
+ usb1_pins: pinmux_usb1_pins {
+pinctrl-single,pins =
+ 0x280 0xc /* usb1_drvvbus, SLOW_SLEW | PULLUPEN |
MODE0 */
+;
+};
+
+ usb2_pins: pinmux_usb2_pins {
+pinctrl-single,pins =
+ 0x284 0xc /* usb2_drvvbus, SLOW_SLEW | PULLUPEN |
MODE0 */
+;
+};
};
i2c1 {
@@ -273,3 +285,15 @@
cpu0 {
cpu0-supply = smps123_reg;
};
+
+usb1 {
+ dr_mode = peripheral;
+ pinctrl-names = default;
+ pinctrl-0 = usb1_pins;
+};
+
+usb2 {
+ dr_mode = host;
+ pinctrl-names = default;
+ pinctrl-0 = usb2_pins;
+};
--
1.8.3.2
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[PATCH v2 2/7] ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss
Add the sysconfig class bits for the Super Speed USB
controllers
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 810c205..067d322 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1731,8 +1731,20 @@ static struct omap_hwmod dra7xx_uart6_hwmod = {
*
*/
+static struct omap_hwmod_class_sysconfig dra7xx_usb_otg_ss_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .sysc_flags = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE |
+ SYSC_HAS_SIDLEMODE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
+ .sysc_fields= omap_hwmod_sysc_type2,
+};
+
static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = {
.name = usb_otg_ss,
+ .sysc = dra7xx_usb_otg_ss_sysc,
};
/* usb_otg_ss1 */
--
1.8.3.2
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[PATCH v2 0/7] USB support for DRA7-evm
Hi, This series enables the 2 USB ports on the DRA7-evm. NOTE: USB1 port is hard coded to work in peripheral mode and USB2 port in host mode. This is due to missing ID pin interrupt in pre ver.E boards. USB1 port doesn't in peripheral mode out of the box due to missing VBUS detection and mailbox write. To test this I had to do a manual write to enable VBUSVALID in the USB_UTMI_OTG_STATUS register. omapconf set bit 0x48880084 1 USB2 port works well in host mode. Patches are based on 3.15-rc3. cheers, -roger Roger Quadros (7): ARM: dts: dra7-clock: Add l3init_960m_gfclk clock gate ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss phy: omap-usb2: Use generic clock names wkupclk and refclk ARM: dts: omap4+: Add clocks to USB2 PHY node phy: omap-usb2: Add clock names to Documentation binding ARM: dts: dra7: Add USB related nodes dts: dra7-evm: add USB support Documentation/devicetree/bindings/phy/ti-phy.txt | 7 ++ arch/arm/boot/dts/dra7-evm.dts | 24 arch/arm/boot/dts/dra7.dtsi | 149 +++ arch/arm/boot/dts/dra7xx-clocks.dtsi | 12 +- arch/arm/boot/dts/omap4.dtsi | 2 + arch/arm/boot/dts/omap5.dtsi | 2 + arch/arm/mach-omap2/omap_hwmod_7xx_data.c| 22 ++-- drivers/phy/phy-omap-usb2.c | 8 +- 8 files changed, 210 insertions(+), 16 deletions(-) -- 1.8.3.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 4/7] ARM: dts: omap4+: Add clocks to USB2 PHY node
The USB2 PHY driver expects named clocks for wakeup clock and reference clock. Provide this information for USB2 PHY nodes in OMAP4 and OMAP5 SoC DTS. Signed-off-by: Roger Quadros rog...@ti.com --- arch/arm/boot/dts/omap4.dtsi | 2 ++ arch/arm/boot/dts/omap5.dtsi | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 649b5cd..f866de9 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -642,6 +642,8 @@ compatible = ti,omap-usb2; reg = 0x4a0ad080 0x58; ctrl-module = omap_control_usb2phy; + clocks = usb_phy_cm_clk32k; + clock-names = wkupclk; #phy-cells = 0; }; }; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index f8c9855..47b714c 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -803,6 +803,8 @@ compatible = ti,omap-usb2; reg = 0x4a084000 0x7c; ctrl-module = omap_control_usb2phy; + clocks = usb_phy_cm_clk32k, usb_otg_ss_refclk960m; + clock-names = wkupclk, refclk; #phy-cells = 0; }; -- 1.8.3.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/7] ARM: dts: dra7-clock: Add l3init_960m_gfclk clock gate
This clock gate description is missing in the older Reference manuals.
It is present on the SoC to provide 960MHz reference clock to the
internal USB PHYs.
Reference: DRA75x_DRA74x_ES1.1_NDA_TRM_vO.pdf, pg. 900,
Table 3-812. CM_COREAON_L3INIT_60M_GFCLK_CLKCTRL
Use l3init_960m_gfclk as parent of usb_otg_ss1_refclk960m and
usb_otg_ss2_refclk960m.
CC: Tero Kristo t-kri...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi
b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index cfb8fc7..c767687 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -1386,6 +1386,14 @@
ti,dividers = 1, 8;
};
+ l3init_960m_gfclk: l3init_960m_gfclk {
+ #clock-cells = 0;
+ compatible = ti,gate-clock;
+ clocks = dpll_usb_clkdcoldo;
+ ti,bit-shift = 8;
+ reg = 0x06c0;
+ };
+
dss_32khz_clk: dss_32khz_clk {
#clock-cells = 0;
compatible = ti,gate-clock;
@@ -1533,7 +1541,7 @@
usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m {
#clock-cells = 0;
compatible = ti,gate-clock;
- clocks = dpll_usb_clkdcoldo;
+ clocks = l3init_960m_gfclk;
ti,bit-shift = 8;
reg = 0x13f0;
};
@@ -1541,7 +1549,7 @@
usb_otg_ss2_refclk960m: usb_otg_ss2_refclk960m {
#clock-cells = 0;
compatible = ti,gate-clock;
- clocks = dpll_usb_clkdcoldo;
+ clocks = l3init_960m_gfclk;
ti,bit-shift = 8;
reg = 0x1340;
};
--
1.8.3.2
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[PATCH v2 3/7] phy: omap-usb2: Use generic clock names wkupclk and refclk
As clocks might be named differently on multiple platforms, use a generic
name in the driver and allow device tree node to specify the platform
specific clock name.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/phy/phy-omap-usb2.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index a2205a8..fb5e515 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -275,16 +275,16 @@ static int omap_usb2_probe(struct platform_device *pdev)
if (IS_ERR(phy_provider))
return PTR_ERR(phy_provider);
- phy-wkupclk = devm_clk_get(phy-dev, usb_phy_cm_clk32k);
+ phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
if (IS_ERR(phy-wkupclk)) {
- dev_err(pdev-dev, unable to get usb_phy_cm_clk32k\n);
+ dev_err(pdev-dev, unable to get wkupclk\n);
return PTR_ERR(phy-wkupclk);
}
clk_prepare(phy-wkupclk);
- phy-optclk = devm_clk_get(phy-dev, usb_otg_ss_refclk960m);
+ phy-optclk = devm_clk_get(phy-dev, refclk);
if (IS_ERR(phy-optclk))
- dev_vdbg(pdev-dev, unable to get refclk960m\n);
+ dev_dbg(pdev-dev, unable to get refclk\n);
else
clk_prepare(phy-optclk);
--
1.8.3.2
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[PATCH 2/4] ARM: dts: am335x-evm: use phandles for USB and DMA refs
Use phandles instead of unit adresses to reference usb and dma nodes.
This makes the DT more robust and readable.
Signed-off-by: Guido Martínez gu...@vanguardiasur.com.ar
---
arch/arm/boot/dts/am335x-evm.dts | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 6028217..e802627 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -331,28 +331,28 @@
usb {
status = okay;
- control@44e10620 {
+ usb_ctrl_mod {
status = okay;
};
- usb-phy@47401300 {
+ usb0_phy {
status = okay;
};
- usb-phy@47401b00 {
+ usb1_phy {
status = okay;
};
- usb@47401000 {
+ usb0 {
status = okay;
};
- usb@47401800 {
+ usb1 {
status = okay;
dr_mode = host;
};
- dma-controller@47402000 {
+ cppi41dma {
status = okay;
};
};
--
1.9.2
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[PATCHv2 0/9] DT support for N900 soundcard (rx51-audio)
Hi, This patchset adds DT support in rx51-audio. I tested it on my Nokia N900 and was able to play a wav file using aplay. I have not tested the whole functionality, but output via speakers, headphones and the related enable controls seem to work. Changes since PATCHv1 [0]: * drop ASoC: tlv320aic3x: fix shared reset pin for DT (already applied) * drop ASoC: RX-51: Convert to table based DAPM setup (similar patch was applied to -next) * remove useless card-dev = NULL; from first patch * split patches from into smaller chunks * introduce new patch, which fixes a checkpatch warning * use gpiod API, which reduces the DT specific bits of the driver * rebase to newer -next checkout [0] https://lkml.org/lkml/2014/4/5/92 -- Sebastian Sebastian Reichel (9): ASoC: omap: rx51: Use static const char * const arrays ASoC: omap: rx51: Add module alias ASoC: omap: rx51: Use devm_snd_soc_register_card ASoC: Allow Aux Codecs to be specified using DT ASoC: omap: rx51: omap_mcbsp_st_add_controls: add id parameter ASoC: omap: rx51: get GPIO numbers via gpiod API ASoC: omap: rx51: Add some error messages ASoC: omap: rx51: Add DT support DTS: OMAP3-N900: Add sound support .../devicetree/bindings/sound/nokia,rx51.txt | 27 +++ arch/arm/boot/dts/omap3-n900.dts | 17 ++ include/sound/soc.h| 13 +- sound/soc/omap/omap-mcbsp.c| 5 +- sound/soc/omap/omap-mcbsp.h| 2 +- sound/soc/omap/rx51.c | 226 +++-- sound/soc/soc-core.c | 68 --- 7 files changed, 271 insertions(+), 87 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/nokia,rx51.txt -- 1.9.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv2 9/9] DTS: OMAP3-N900: Add sound support
This patch adds support for the Nokia N900's sound
system.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
arch/arm/boot/dts/omap3-n900.dts | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 6bc8100..5701f91 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -90,6 +90,19 @@
};
};
};
+
+ sound: n900-audio {
+ compatible = nokia,n900-audio;
+
+ nokia,cpu-dai = mcbsp2;
+ nokia,audio-codec = tlv320aic3x, tlv320aic3x_aux;
+ nokia,headphone-amplifier = tpa6130a2;
+
+ tvout-selection-gpios = gpio2 8 GPIO_ACTIVE_HIGH; /* 40 */
+ jack-detection-gpios = gpio6 17 GPIO_ACTIVE_HIGH; /* 177 */
+ eci-switch-gpios = gpio6 22 GPIO_ACTIVE_HIGH; /* 182 */
+ speaker-amplifier-gpios = twl_gpio 7 GPIO_ACTIVE_HIGH;
+ };
};
omap3_pmx_core {
@@ -662,3 +675,7 @@
};
};
};
+
+mcbsp2 {
+ status = ok;
+};
--
1.9.2
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[PATCHv2 8/9] ASoC: omap: rx51: Add DT support
This patch adds device tree support to the Nokia N900 audio driver and
adds documentation for the DT binding.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
.../devicetree/bindings/sound/nokia,rx51.txt | 27 +++
sound/soc/omap/rx51.c | 53 ++
2 files changed, 80 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/nokia,rx51.txt
diff --git a/Documentation/devicetree/bindings/sound/nokia,rx51.txt
b/Documentation/devicetree/bindings/sound/nokia,rx51.txt
new file mode 100644
index 000..72f93d9
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/nokia,rx51.txt
@@ -0,0 +1,27 @@
+* Nokia N900 audio setup
+
+Required properties:
+- compatible: Should contain nokia,n900-audio
+- nokia,cpu-dai: phandle for the McBSP node
+- nokia,audio-codec: phandles for the main TLV320AIC3X node and the
+ auxiliary TLV320AIC3X node (in this order)
+- nokia,headphone-amplifier: phandle for the TPA6130A2 node
+- tvout-selection-gpios: GPIO for tvout selection
+- jack-detection-gpios: GPIO for jack detection
+- eci-switch-gpios: GPIO for ECI (Enhancement Control Interface) switch
+- speaker-amplifier-gpios: GPIO for speaker amplifier
+
+Example:
+
+sound {
+ compatible = nokia,n900-audio;
+
+ nokia,cpu-dai = mcbsp2;
+ nokia,audio-codec = tlv320aic3x, tlv320aic3x_aux;
+ nokia,headphone-amplifier = tpa6130a2;
+
+ tvout-selection-gpios = gpio2 8 GPIO_ACTIVE_HIGH; /* 40 */
+ jack-detection-gpios = gpio6 17 GPIO_ACTIVE_HIGH; /* 177 */
+ eci-switch-gpios = gpio6 22 GPIO_ACTIVE_HIGH; /* 182 */
+ speaker-amplifier-gpios = twl_gpio 7 GPIO_ACTIVE_HIGH;
+};
diff --git a/sound/soc/omap/rx51.c b/sound/soc/omap/rx51.c
index 110deca..866578b 100644
--- a/sound/soc/omap/rx51.c
+++ b/sound/soc/omap/rx51.c
@@ -386,6 +386,7 @@ static struct snd_soc_card rx51_sound_card = {
static int rx51_soc_probe(struct platform_device *pdev)
{
struct rx51_audio_pdata *pdata;
+ struct device_node *np = pdev-dev.of_node;
struct snd_soc_card *card = rx51_sound_card;
int err;
@@ -394,6 +395,49 @@ static int rx51_soc_probe(struct platform_device *pdev)
card-dev = pdev-dev;
+ if (np) {
+ struct device_node *dai_node;
+
+ dai_node = of_parse_phandle(np, nokia,cpu-dai, 0);
+ if (!dai_node) {
+ dev_err(pdev-dev, McBSP node is not provided\n);
+ return -EINVAL;
+ }
+ rx51_dai[0].cpu_dai_name = NULL;
+ rx51_dai[0].platform_name = NULL;
+ rx51_dai[0].cpu_of_node = dai_node;
+ rx51_dai[0].platform_of_node = dai_node;
+
+ dai_node = of_parse_phandle(np, nokia,audio-codec, 0);
+ if (!dai_node) {
+ dev_err(pdev-dev, Codec node is not provided\n);
+ return -EINVAL;
+ }
+ rx51_dai[0].codec_name = NULL;
+ rx51_dai[0].codec_of_node = dai_node;
+
+ dai_node = of_parse_phandle(np, nokia,audio-codec, 1);
+ if (!dai_node) {
+ dev_err(pdev-dev, Auxiliary Codec node is not
provided\n);
+ return -EINVAL;
+ }
+ rx51_aux_dev[0].codec_name = NULL;
+ rx51_aux_dev[0].codec_of_node = dai_node;
+ rx51_codec_conf[0].dev_name = NULL;
+ rx51_codec_conf[0].of_node = dai_node;
+
+ dai_node = of_parse_phandle(np, nokia,headphone-amplifier, 0);
+ if (!dai_node) {
+ dev_err(pdev-dev, Headphone amplifier node is not
provided\n);
+ return -EINVAL;
+ }
+
+ /* TODO: tpa6130a2a driver supports only a single instance, so
+* this driver ignores the headphone-amplifier node for now.
+* It's already mandatory in the DT binding to be future proof.
+*/
+ }
+
pdata = devm_kzalloc(pdev-dev, sizeof(*pdata), GFP_KERNEL);
if (pdata == NULL) {
dev_err(card-dev, failed to create private data\n);
@@ -463,10 +507,19 @@ static int rx51_soc_remove(struct platform_device *pdev)
return 0;
}
+#if defined(CONFIG_OF)
+static const struct of_device_id rx51_audio_of_match[] = {
+ { .compatible = nokia,n900-audio, },
+ {},
+};
+MODULE_DEVICE_TABLE(of, rx51_audio_of_match);
+#endif
+
static struct platform_driver rx51_soc_driver = {
.driver = {
.name = rx51-audio,
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(rx51_audio_of_match),
},
.probe = rx51_soc_probe,
.remove = rx51_soc_remove,
--
1.9.2
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Re: [PATCH] ARM: OMAP3: clock: Back-propagate rate change from cam_mclk to dpll4_m5 on all OMAP3 platforms
Ping ?
On Monday 21 April 2014 15:06:23 Laurent Pinchart wrote:
From: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
Commit 7b2e1277598e4187c9be3e61fd9b0f0423f97986 (ARM: OMAP3: clock:
Back-propagate rate change from cam_mclk to dpll4_m5) enabled clock
rate back-propagation from cam_mclk do dpll4_m5 on OMAP3630 only.
Perform back-propagation on other OMAP3 platforms as well.
Reported-by: Jean-Philippe François jp.franc...@cynove.com
Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
arch/arm/mach-omap2/cclock3xxx_data.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c
b/arch/arm/mach-omap2/cclock3xxx_data.c index 8f5121b..eb8c75e 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -456,7 +456,8 @@ static struct clk_hw_omap dpll4_m5x2_ck_hw = {
.clkdm_name = dpll4_clkdm,
};
-DEFINE_STRUCT_CLK(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names,
dpll4_m5x2_ck_ops); +DEFINE_STRUCT_CLK_FLAGS(dpll4_m5x2_ck,
dpll4_m5x2_ck_parent_names, + dpll4_m5x2_ck_ops,
CLK_SET_RATE_PARENT);
static struct clk dpll4_m5x2_ck_3630 = {
.name = dpll4_m5x2_ck,
--
Regards,
Laurent Pinchart
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[PATCHv2 6/9] ASoC: omap: rx51: get GPIO numbers via gpiod API
Update the driver to get GPIO numbers from the
devm gpiod API instead of requesting hardcoded
GPIO numbers.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
sound/soc/omap/rx51.c | 114 ++
1 file changed, 79 insertions(+), 35 deletions(-)
diff --git a/sound/soc/omap/rx51.c b/sound/soc/omap/rx51.c
index e140b1b..30cfac0 100644
--- a/sound/soc/omap/rx51.c
+++ b/sound/soc/omap/rx51.c
@@ -26,6 +26,7 @@
#include linux/delay.h
#include linux/gpio.h
#include linux/platform_device.h
+#include linux/gpio/consumer.h
#include linux/module.h
#include sound/core.h
#include sound/jack.h
@@ -38,15 +39,6 @@
#include omap-mcbsp.h
-#define RX51_TVOUT_SEL_GPIO40
-#define RX51_JACK_DETECT_GPIO 177
-#define RX51_ECI_SW_GPIO 182
-/*
- * REVISIT: TWL4030 GPIO base in RX-51. Now statically defined to 192. This
- * gpio is reserved in arch/arm/mach-omap2/board-rx51-peripherals.c
- */
-#define RX51_SPEAKER_AMP_TWL_GPIO (192 + 7)
-
enum {
RX51_JACK_DISABLED,
RX51_JACK_TVOUT,/* tv-out with stereo output */
@@ -54,12 +46,21 @@ enum {
RX51_JACK_HS, /* headset: stereo output with mic */
};
+struct rx51_audio_pdata {
+ struct gpio_desc *tvout_selection_gpio;
+ struct gpio_desc *jack_detection_gpio;
+ struct gpio_desc *eci_sw_gpio;
+ struct gpio_desc *speaker_amp_gpio;
+};
+
static int rx51_spk_func;
static int rx51_dmic_func;
static int rx51_jack_func;
static void rx51_ext_control(struct snd_soc_dapm_context *dapm)
{
+ struct snd_soc_card *card = dapm-card;
+ struct rx51_audio_pdata *pdata = snd_soc_card_get_drvdata(card);
int hp = 0, hs = 0, tvout = 0;
switch (rx51_jack_func) {
@@ -93,7 +94,7 @@ static void rx51_ext_control(struct snd_soc_dapm_context
*dapm)
else
snd_soc_dapm_disable_pin_unlocked(dapm, HS Mic);
- gpio_set_value(RX51_TVOUT_SEL_GPIO, tvout);
+ gpiod_set_value(pdata-tvout_selection_gpio, tvout);
snd_soc_dapm_sync_unlocked(dapm);
@@ -154,10 +155,12 @@ static int rx51_set_spk(struct snd_kcontrol *kcontrol,
static int rx51_spk_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *k, int event)
{
- if (SND_SOC_DAPM_EVENT_ON(event))
- gpio_set_value_cansleep(RX51_SPEAKER_AMP_TWL_GPIO, 1);
- else
- gpio_set_value_cansleep(RX51_SPEAKER_AMP_TWL_GPIO, 0);
+ struct snd_soc_dapm_context *dapm = w-dapm;
+ struct snd_soc_card *card = dapm-card;
+ struct rx51_audio_pdata *pdata = snd_soc_card_get_drvdata(card);
+
+ gpiod_set_raw_value_cansleep(pdata-speaker_amp_gpio,
+!!SND_SOC_DAPM_EVENT_ON(event));
return 0;
}
@@ -223,7 +226,6 @@ static struct snd_soc_jack rx51_av_jack;
static struct snd_soc_jack_gpio rx51_av_jack_gpios[] = {
{
- .gpio = RX51_JACK_DETECT_GPIO,
.name = avdet-gpio,
.report = SND_JACK_HEADSET,
.invert = 1,
@@ -284,6 +286,9 @@ static const struct snd_kcontrol_new aic34_rx51_controls[]
= {
static int rx51_aic34_init(struct snd_soc_pcm_runtime *rtd)
{
struct snd_soc_codec *codec = rtd-codec;
+ struct snd_soc_card *card = codec-card;
+ struct rx51_audio_pdata *pdata = snd_soc_card_get_drvdata(card);
+
struct snd_soc_dapm_context *dapm = codec-dapm;
int err;
@@ -307,6 +312,11 @@ static int rx51_aic34_init(struct snd_soc_pcm_runtime *rtd)
rx51_av_jack);
if (err)
return err;
+
+ /* prepare gpio for snd_soc_jack_add_gpios */
+ rx51_av_jack_gpios[0].gpio = desc_to_gpio(pdata-jack_detection_gpio);
+ devm_gpiod_put(card-dev, pdata-jack_detection_gpio);
+
err = snd_soc_jack_add_gpios(rx51_av_jack,
ARRAY_SIZE(rx51_av_jack_gpios),
rx51_av_jack_gpios);
@@ -365,37 +375,74 @@ static struct snd_soc_card rx51_sound_card = {
static int rx51_soc_probe(struct platform_device *pdev)
{
+ struct rx51_audio_pdata *pdata;
struct snd_soc_card *card = rx51_sound_card;
int err;
if (!machine_is_nokia_rx51()
!of_machine_is_compatible(nokia,omap3-n900))
return -ENODEV;
- err = gpio_request_one(RX51_TVOUT_SEL_GPIO,
- GPIOF_DIR_OUT | GPIOF_INIT_LOW, tvout_sel);
- if (err)
- goto err_gpio_tvout_sel;
- err = gpio_request_one(RX51_ECI_SW_GPIO,
- GPIOF_DIR_OUT | GPIOF_INIT_HIGH, eci_sw);
- if (err)
- goto err_gpio_eci_sw;
-
card-dev = pdev-dev;
+ pdata = devm_kzalloc(pdev-dev, sizeof(*pdata), GFP_KERNEL);
+ if (pdata == NULL) {
+ dev_err(card-dev, failed to create private data\n);
[PATCHv2 7/9] ASoC: omap: rx51: Add some error messages
Add more error messages making it easier to identify problems.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
sound/soc/omap/rx51.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/sound/soc/omap/rx51.c b/sound/soc/omap/rx51.c
index 30cfac0..110deca 100644
--- a/sound/soc/omap/rx51.c
+++ b/sound/soc/omap/rx51.c
@@ -298,20 +298,26 @@ static int rx51_aic34_init(struct snd_soc_pcm_runtime
*rtd)
snd_soc_dapm_nc_pin(dapm, LINE1R);
err = tpa6130a2_add_controls(codec);
- if (err 0)
+ if (err 0) {
+ dev_err(card-dev, Failed to add TPA6130A2 controls\n);
return err;
+ }
snd_soc_limit_volume(codec, TPA6130A2 Headphone Playback Volume, 42);
err = omap_mcbsp_st_add_controls(rtd, 2);
- if (err 0)
+ if (err 0) {
+ dev_err(card-dev, Failed to add MCBSP controls\n);
return err;
+ }
/* AV jack detection */
err = snd_soc_jack_new(codec, AV Jack,
SND_JACK_HEADSET | SND_JACK_VIDEOOUT,
rx51_av_jack);
- if (err)
+ if (err) {
+ dev_err(card-dev, Failed to add AV Jack\n);
return err;
+ }
/* prepare gpio for snd_soc_jack_add_gpios */
rx51_av_jack_gpios[0].gpio = desc_to_gpio(pdata-jack_detection_gpio);
@@ -320,6 +326,10 @@ static int rx51_aic34_init(struct snd_soc_pcm_runtime *rtd)
err = snd_soc_jack_add_gpios(rx51_av_jack,
ARRAY_SIZE(rx51_av_jack_gpios),
rx51_av_jack_gpios);
+ if (err) {
+ dev_err(card-dev, Failed to add GPIOs\n);
+ return err;
+ }
return err;
}
--
1.9.2
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[PATCHv2 5/9] ASoC: omap: rx51: omap_mcbsp_st_add_controls: add id parameter
This is a preparation for DT based booting where the McBSP id
is set to -1 for all McBSP instances.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
sound/soc/omap/omap-mcbsp.c | 5 +++--
sound/soc/omap/omap-mcbsp.h | 2 +-
sound/soc/omap/rx51.c | 2 +-
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index af2764a..71d2266 100644
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -693,7 +693,7 @@ OMAP_MCBSP_SOC_SINGLE_S16_EXT(McBSP #port Sidetone
Channel 1 Volume, \
OMAP_MCBSP_ST_CONTROLS(2);
OMAP_MCBSP_ST_CONTROLS(3);
-int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd)
+int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd, int port_id)
{
struct snd_soc_dai *cpu_dai = rtd-cpu_dai;
struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai);
@@ -703,7 +703,7 @@ int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime
*rtd)
return 0;
}
- switch (mcbsp-id) {
+ switch (port_id) {
case 2: /* McBSP 2 */
return snd_soc_add_dai_controls(cpu_dai,
omap_mcbsp2_st_controls,
@@ -713,6 +713,7 @@ int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime
*rtd)
omap_mcbsp3_st_controls,
ARRAY_SIZE(omap_mcbsp3_st_controls));
default:
+ dev_err(mcbsp-dev, Port %d not supported\n, port_id);
break;
}
diff --git a/sound/soc/omap/omap-mcbsp.h b/sound/soc/omap/omap-mcbsp.h
index ba8386a..2e3369c 100644
--- a/sound/soc/omap/omap-mcbsp.h
+++ b/sound/soc/omap/omap-mcbsp.h
@@ -39,6 +39,6 @@ enum omap_mcbsp_div {
OMAP_MCBSP_CLKGDV, /* Sample rate generator divider */
};
-int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd);
+int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd, int port_id);
#endif
diff --git a/sound/soc/omap/rx51.c b/sound/soc/omap/rx51.c
index bbe3a66..e140b1b 100644
--- a/sound/soc/omap/rx51.c
+++ b/sound/soc/omap/rx51.c
@@ -297,7 +297,7 @@ static int rx51_aic34_init(struct snd_soc_pcm_runtime *rtd)
return err;
snd_soc_limit_volume(codec, TPA6130A2 Headphone Playback Volume, 42);
- err = omap_mcbsp_st_add_controls(rtd);
+ err = omap_mcbsp_st_add_controls(rtd, 2);
if (err 0)
return err;
--
1.9.2
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[PATCHv2 2/9] ASoC: omap: rx51: Add module alias
Add module alias to support driver autoloading. Signed-off-by: Pali Rohár pali.ro...@gmail.com Signed-off-by: Sebastian Reichel s...@kernel.org --- sound/soc/omap/rx51.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/omap/rx51.c b/sound/soc/omap/rx51.c index 1a3f05c..55713d0 100644 --- a/sound/soc/omap/rx51.c +++ b/sound/soc/omap/rx51.c @@ -421,3 +421,4 @@ module_exit(rx51_soc_exit); MODULE_AUTHOR(Nokia Corporation); MODULE_DESCRIPTION(ALSA SoC Nokia RX-51); MODULE_LICENSE(GPL); +MODULE_ALIAS(platform:rx51-audio); -- 1.9.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv2 3/9] ASoC: omap: rx51: Use devm_snd_soc_register_card
This patch converts the rx51 ASoC module to use
devm_snd_soc_register_card.
Signed-off-by: Pali Rohár pali.ro...@gmail.com
Signed-off-by: Sebastian Reichel s...@kernel.org
---
sound/soc/omap/rx51.c | 42 ++
1 file changed, 22 insertions(+), 20 deletions(-)
diff --git a/sound/soc/omap/rx51.c b/sound/soc/omap/rx51.c
index 55713d0..bbe3a66 100644
--- a/sound/soc/omap/rx51.c
+++ b/sound/soc/omap/rx51.c
@@ -363,10 +363,9 @@ static struct snd_soc_card rx51_sound_card = {
.num_dapm_routes = ARRAY_SIZE(audio_map),
};
-static struct platform_device *rx51_snd_device;
-
-static int __init rx51_soc_init(void)
+static int rx51_soc_probe(struct platform_device *pdev)
{
+ struct snd_soc_card *card = rx51_sound_card;
int err;
if (!machine_is_nokia_rx51()
!of_machine_is_compatible(nokia,omap3-n900))
@@ -381,22 +380,16 @@ static int __init rx51_soc_init(void)
if (err)
goto err_gpio_eci_sw;
- rx51_snd_device = platform_device_alloc(soc-audio, -1);
- if (!rx51_snd_device) {
- err = -ENOMEM;
- goto err1;
- }
-
- platform_set_drvdata(rx51_snd_device, rx51_sound_card);
+ card-dev = pdev-dev;
- err = platform_device_add(rx51_snd_device);
- if (err)
- goto err2;
+ err = devm_snd_soc_register_card(card-dev, card);
+ if (err) {
+ dev_err(pdev-dev, snd_soc_register_card failed (%d)\n, err);
+ goto err_snd;
+ }
return 0;
-err2:
- platform_device_put(rx51_snd_device);
-err1:
+err_snd:
gpio_free(RX51_ECI_SW_GPIO);
err_gpio_eci_sw:
gpio_free(RX51_TVOUT_SEL_GPIO);
@@ -405,18 +398,27 @@ err_gpio_tvout_sel:
return err;
}
-static void __exit rx51_soc_exit(void)
+static int rx51_soc_remove(struct platform_device *pdev)
{
snd_soc_jack_free_gpios(rx51_av_jack, ARRAY_SIZE(rx51_av_jack_gpios),
rx51_av_jack_gpios);
- platform_device_unregister(rx51_snd_device);
gpio_free(RX51_ECI_SW_GPIO);
gpio_free(RX51_TVOUT_SEL_GPIO);
+
+ return 0;
}
-module_init(rx51_soc_init);
-module_exit(rx51_soc_exit);
+static struct platform_driver rx51_soc_driver = {
+ .driver = {
+ .name = rx51-audio,
+ .owner = THIS_MODULE,
+ },
+ .probe = rx51_soc_probe,
+ .remove = rx51_soc_remove,
+};
+
+module_platform_driver(rx51_soc_driver);
MODULE_AUTHOR(Nokia Corporation);
MODULE_DESCRIPTION(ALSA SoC Nokia RX-51);
--
1.9.2
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[PATCHv2 4/9] ASoC: Allow Aux Codecs to be specified using DT
This patch adds support for specifying auxiliary codecs and
codec configuration via device tree phandles.
This change adds new fields to snd_soc_aux_dev and snd_soc_codec_conf
and adds support for the changes to SoC core methods.
Signed-off-by: Pavel Machek pa...@ucw.cz
Signed-off-by: Sebastian Reichel s...@kernel.org
---
include/sound/soc.h | 13 +-
sound/soc/soc-core.c | 68
2 files changed, 54 insertions(+), 27 deletions(-)
diff --git a/include/sound/soc.h b/include/sound/soc.h
index 0fadb3c..22dfaef 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -923,7 +923,12 @@ struct snd_soc_dai_link {
};
struct snd_soc_codec_conf {
+ /*
+* specify device either by device name, or by
+* DT/OF node, but not both.
+*/
const char *dev_name;
+ const struct device_node *of_node;
/*
* optional map of kcontrol, widget and path name prefixes that are
@@ -934,7 +939,13 @@ struct snd_soc_codec_conf {
struct snd_soc_aux_dev {
const char *name; /* Codec name */
- const char *codec_name; /* for multi-codec */
+
+ /*
+* specify multi-codec either by device name, or by
+* DT/OF node, but not both.
+*/
+ const char *codec_name;
+ const struct device_node *codec_of_node;
/* codec/machine specific init - e.g. add machine controls */
int (*init)(struct snd_soc_dapm_context *dapm);
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index f18112a..39f6c04 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -1119,10 +1119,12 @@ static void soc_set_name_prefix(struct snd_soc_card
*card,
for (i = 0; i card-num_configs; i++) {
struct snd_soc_codec_conf *map = card-codec_conf[i];
- if (map-dev_name !strcmp(codec-name, map-dev_name)) {
- codec-name_prefix = map-name_prefix;
- break;
- }
+ if (map-of_node codec-dev-of_node != map-of_node)
+ continue;
+ if (map-dev_name strcmp(codec-name, map-dev_name))
+ continue;
+ codec-name_prefix = map-name_prefix;
+ break;
}
}
@@ -1652,52 +1654,66 @@ static void soc_unregister_ac97_dai_link(struct
snd_soc_pcm_runtime *rtd)
}
#endif
-static int soc_check_aux_dev(struct snd_soc_card *card, int num)
+struct snd_soc_codec *soc_find_matching_codec(struct snd_soc_card *card, int
num)
{
struct snd_soc_aux_dev *aux_dev = card-aux_dev[num];
struct snd_soc_codec *codec;
- /* find CODEC from registered CODECs*/
+ /* find CODEC from registered CODECs */
list_for_each_entry(codec, codec_list, list) {
- if (!strcmp(codec-name, aux_dev-codec_name))
- return 0;
+ if (aux_dev-codec_of_node
+ (codec-dev-of_node != aux_dev-codec_of_node))
+ continue;
+ if (aux_dev-codec_name strcmp(codec-name,
aux_dev-codec_name))
+ continue;
+ return codec;
}
- dev_err(card-dev, ASoC: %s not registered\n, aux_dev-codec_name);
+ return NULL;
+}
+
+static int soc_check_aux_dev(struct snd_soc_card *card, int num)
+{
+ struct snd_soc_aux_dev *aux_dev = card-aux_dev[num];
+ const char *codecname = aux_dev-codec_name;
+ struct snd_soc_codec *codec = soc_find_matching_codec(card, num);
+ if (codec)
+ return 0;
+ if (aux_dev-codec_of_node)
+ codecname = of_node_full_name(aux_dev-codec_of_node);
+
+ dev_err(card-dev, ASoC: %s not registered\n, codecname);
return -EPROBE_DEFER;
}
static int soc_probe_aux_dev(struct snd_soc_card *card, int num)
{
struct snd_soc_aux_dev *aux_dev = card-aux_dev[num];
- struct snd_soc_codec *codec;
+ const char *codecname = aux_dev-codec_name;
int ret = -ENODEV;
+ struct snd_soc_codec *codec = soc_find_matching_codec(card, num);
- /* find CODEC from registered CODECs*/
- list_for_each_entry(codec, codec_list, list) {
- if (!strcmp(codec-name, aux_dev-codec_name)) {
- if (codec-probed) {
- dev_err(codec-dev,
- ASoC: codec already probed);
- ret = -EBUSY;
- goto out;
- }
- goto found;
- }
+ if (!codec) {
+ if (aux_dev-codec_of_node)
+ codecname = of_node_full_name(aux_dev-codec_of_node);
+
+ /* codec not found */
+ dev_err(card-dev, ASoC: codec %s not found, codecname);
+ return -EPROBE_DEFER;
+ }
+
+ if
Re: [RFC 0/2] [media] si4713 DT binding
On Sun, Apr 06, 2014 at 01:52:03PM +0200, Sebastian Reichel wrote: This is an RFC patch adding DT support to the si4713 radio transmitter i2c driver. ping? -- Sebastian signature.asc Description: Digital signature
[PATCHv2 1/9] ASoC: omap: rx51: Use static const char * const arrays
Mark the array and the string const by using static const char * const
foo[] instead of static const char* foo[].
Signed-off-by: Sebastian Reichel s...@kernel.org
---
sound/soc/omap/rx51.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/sound/soc/omap/rx51.c b/sound/soc/omap/rx51.c
index add0047..1a3f05c 100644
--- a/sound/soc/omap/rx51.c
+++ b/sound/soc/omap/rx51.c
@@ -258,9 +258,11 @@ static const struct snd_soc_dapm_route audio_map[] = {
{b Mic Bias, NULL, HS Mic}
};
-static const char *spk_function[] = {Off, On};
-static const char *input_function[] = {ADC, Digital Mic};
-static const char *jack_function[] = {Off, TV-OUT, Headphone, Headset};
+static const char * const spk_function[] = {Off, On};
+static const char * const input_function[] = {ADC, Digital Mic};
+static const char * const jack_function[] = {
+ Off, TV-OUT, Headphone, Headset
+};
static const struct soc_enum rx51_enum[] = {
SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(spk_function), spk_function),
--
1.9.2
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Re: [PATCH] ARM: dts: am33xx: fix DMA support for the second USB interface
On 4/28/2014 2:07 PM, yegorsli...@googlemail.com wrote:
From: Yegor Yefremov yegorsli...@googlemail.com
This patch creates unique DMA channels for the second USB
interface, otherwise the second USB interface is not usable
at all.
MUSB_DMA_NUM_CHANNELS is 15, so if you pass any dma-names 15 (
rx15/tx15),
the dma_controller_create in musb_core.c fails and it falls back to PIO
mode.
Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
---
arch/arm/boot/dts/am33xx.dtsi | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 07f283c..e04cbbc 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -548,12 +548,12 @@
cppi41dma 26 1 cppi41dma 27 1
cppi41dma 28 1 cppi41dma 29 1;
dma-names =
- rx1, rx2, rx3, rx4, rx5, rx6,
rx7,
- rx8, rx9, rx10, rx11, rx12,
rx13,
- rx14, rx15,
- tx1, tx2, tx3, tx4, tx5, tx6,
tx7,
- tx8, tx9, tx10, tx11, tx12,
tx13,
- tx14, tx15;
+ rx16, rx17, rx18, rx19, rx20, rx21,
rx22,
+ rx23, rx24, rx25, rx26, rx27,
rx28,
+ rx29, rx30,
+ tx16, tx17, tx18, tx19, tx20, tx21,
tx22,
+ tx23, tx24, tx25, tx26, tx27,
tx28,
+ tx29, tx30;
};
cppi41dma: dma-controller@47402000 {
--
-George
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Re: [PATCH 1/4] ARM: dts: am335x-bone-common: use phandles for USB and DMA refs
On 4/28/2014 7:28 PM, Guido Martínez wrote:
Use phandles instead of unit adresses to reference usb and dma nodes.
This makes the DT more robust and readable.
The series will give dtb build errors
Error: arch/arm/boot/dts/am335x-bone-common.dtsi:186.2-15 syntax error
FATAL ERROR: Unable to parse input tree
Error: arch/arm/boot/dts/am335x-evmsk.dts:367.2-15 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [arch/arm/boot/dts/am335x-bone.dtb] Error 1
make[1]: *** Waiting for unfinished jobs
Error: arch/arm/boot/dts/am335x-evm.dts:334.2-15 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [arch/arm/boot/dts/am335x-evmsk.dtb] Error 1
make[1]: *** [arch/arm/boot/dts/am335x-evm.dtb] Error 1
Error: arch/arm/boot/dts/am335x-igep0033.dtsi:204.2-15 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [arch/arm/boot/dts/am335x-base0033.dtb] Error 1
Error: arch/arm/boot/dts/am335x-bone-common.dtsi:186.2-15 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [arch/arm/boot/dts/am335x-boneblack.dtb] Error 1
make: *** [dtbs] Error 2
Signed-off-by: Guido Martínez gu...@vanguardiasur.com.ar
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi
b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 2e7d932..b95bc9a 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -183,28 +183,28 @@
usb {
status = okay;
- control@44e10620 {
+ usb_ctrl_mod {
status = okay;
};
- usb-phy@47401300 {
+ usb0_phy {
status = okay;
};
- usb-phy@47401b00 {
+ usb1_phy {
status = okay;
};
- usb@47401000 {
+ usb0 {
status = okay;
};
- usb@47401800 {
+ usb1 {
status = okay;
dr_mode = host;
};
- dma-controller@47402000 {
+ cppi41dma {
status = okay;
};
};
Instead the patch should be
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi
b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 2e7d932..06be20a 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -182,31 +182,30 @@
usb {
status = okay;
+};
+usb_ctrl_mod {
+ status = okay;
+};
- control@44e10620 {
- status = okay;
- };
-
- usb-phy@47401300 {
- status = okay;
- };
+usb0_phy {
+ status = okay;
+};
- usb-phy@47401b00 {
- status = okay;
- };
+usb1_phy {
+ status = okay;
+};
- usb@47401000 {
- status = okay;
- };
+usb {
+ status = okay;
+};
- usb@47401800 {
- status = okay;
- dr_mode = host;
- };
+usb1 {
+ status = okay;
+ dr_mode = host;
+};
- dma-controller@47402000 {
- status = okay;
- };
+cppi41dma {
+ status = okay;
};
--
-George
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Re: [PATCH 1/6] drivers: net: cpts: Remove hardcoded clock name for CPTS
On 4/28/2014 8:01 PM, Felipe Balbi wrote:
On Mon, Apr 28, 2014 at 09:40:20AM +0530, George Cherian wrote:
CPTS refclk name is hardcoded, which makes it fail in case of DRA7x
Remove the hardcoded clock name for CPTS refclk and get the same from DT.
Signed-off-by: George Cherian george.cher...@ti.com
---
drivers/net/ethernet/ti/cpts.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/ti/cpts.c b/drivers/net/ethernet/ti/cpts.c
index 2435139..0b6f6f7 100644
--- a/drivers/net/ethernet/ti/cpts.c
+++ b/drivers/net/ethernet/ti/cpts.c
@@ -236,13 +236,11 @@ static void cpts_overflow_check(struct work_struct *work)
schedule_delayed_work(cpts-overflow_work, CPTS_OVERFLOW_PERIOD);
}
-#define CPTS_REF_CLOCK_NAME cpsw_cpts_rft_clk
-
-static void cpts_clk_init(struct cpts *cpts)
+static void cpts_clk_init(struct device *dev, struct cpts *cpts)
{
- cpts-refclk = clk_get(NULL, CPTS_REF_CLOCK_NAME);
+ cpts-refclk = devm_clk_get(dev, cpts);
if (IS_ERR(cpts-refclk)) {
- pr_err(Failed to clk_get %s\n, CPTS_REF_CLOCK_NAME);
+ pr_err(Failed to get cpts refclk\n);
now you have a dev pointer as argument, how about converting this to
dev_err() ?
Yep will do.. in next version.
--
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Re: [PATCH 1/6] drivers: net: cpts: Remove hardcoded clock name for CPTS
On Mon, Apr 28, 2014 at 09:40:20AM +0530, George Cherian wrote:
CPTS refclk name is hardcoded, which makes it fail in case of DRA7x
Remove the hardcoded clock name for CPTS refclk and get the same from DT.
Signed-off-by: George Cherian george.cher...@ti.com
---
drivers/net/ethernet/ti/cpts.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/ti/cpts.c b/drivers/net/ethernet/ti/cpts.c
index 2435139..0b6f6f7 100644
--- a/drivers/net/ethernet/ti/cpts.c
+++ b/drivers/net/ethernet/ti/cpts.c
@@ -236,13 +236,11 @@ static void cpts_overflow_check(struct work_struct
*work)
schedule_delayed_work(cpts-overflow_work, CPTS_OVERFLOW_PERIOD);
}
-#define CPTS_REF_CLOCK_NAME cpsw_cpts_rft_clk
-
-static void cpts_clk_init(struct cpts *cpts)
+static void cpts_clk_init(struct device *dev, struct cpts *cpts)
{
- cpts-refclk = clk_get(NULL, CPTS_REF_CLOCK_NAME);
+ cpts-refclk = devm_clk_get(dev, cpts);
if (IS_ERR(cpts-refclk)) {
- pr_err(Failed to clk_get %s\n, CPTS_REF_CLOCK_NAME);
+ pr_err(Failed to get cpts refclk\n);
now you have a dev pointer as argument, how about converting this to
dev_err() ?
--
balbi
signature.asc
Description: Digital signature
Re: [alsa-devel] [PATCH 2/5] ASoC: Add HA (HEAD acoustics) DSP codec driver template
On 04/28/2014 02:17 PM, Stefan Roese wrote:
From: Jarkko Nikula jarkko.nik...@bitmer.com
This codec driver template represents an I2C controlled multichannel audio
codec that has many typical ASoC codec driver features like volume controls,
mixer stages, mux selection, output power control, in-codec audio routings,
codec bias management and DAI link configuration.
Updates from Stefan Roese, 2014-04-28:
Port the HA DSP codec driver to Linux v3.15-rc. This includes
support for DT based probing. No platform-data code is needed
any more, DT nodes are sufficient.
Signed-off-by: Jarkko Nikula jarkko.nik...@bitmer.com
Signed-off-by: Stefan Roese s...@denx.de
Cc: Thorsten Eisbein thorsten.eisb...@head-acoustics.de
Looks very good. Couple of bits inline.
[...]
+
+#include linux/module.h
+#include linux/moduleparam.h
+#include linux/init.h
+#include linux/delay.h
+#include linux/pm.h
+#include linux/i2c.h
+#include linux/platform_device.h
+#include linux/regmap.h
+#include linux/slab.h
+#include sound/core.h
+#include sound/pcm.h
+#include sound/pcm_params.h
+#include sound/soc.h
+#include sound/soc-dapm.h
+#include sound/tlv.h
+#include sound/initval.h
There seem to be a couple of includes here that are not really needed.
+
+#include ha-dsp.h
[...]
+static const char *ha_dsp_mode_texts[] = {Mode 1, Mode 2};
const char *const
+static SOC_ENUM_SINGLE_DECL(ha_dsp_mode_enum, HA_DSP_CTRL, 0,
+ ha_dsp_mode_texts);
+
+/* Monitor output mux selection */
+static const char *ha_dsp_monitor_texts[] = {Off, ADC, DAC};
const char *const
+static SOC_ENUM_SINGLE_DECL(ha_dsp_monitor_enum, HA_DSP_CTRL, 1,
+ ha_dsp_monitor_texts);
+
[...]
+static const struct snd_soc_dapm_widget ha_dsp_widgets[] = {
+ SND_SOC_DAPM_ADC(ADC, Capture, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_DAC(DAC, Playback, SND_SOC_NOPM, 0, 0),
+
+ SND_SOC_DAPM_MIXER(OUT1 Mixer, SND_SOC_NOPM, 0, 0,
+ ha_dsp_out1_mixer_controls[0],
+ ARRAY_SIZE(ha_dsp_out1_mixer_controls)),
There is the SOC_MIXER_ARRAY() helper macro that you can use here and below.
+ SND_SOC_DAPM_MIXER(OUT2 Mixer, SND_SOC_NOPM, 0, 0,
+ ha_dsp_out2_mixer_controls[0],
+ ARRAY_SIZE(ha_dsp_out2_mixer_controls)),
+ SND_SOC_DAPM_MIXER(OUT3 Mixer, SND_SOC_NOPM, 0, 0,
+ ha_dsp_out3_mixer_controls[0],
+ ARRAY_SIZE(ha_dsp_out3_mixer_controls)),
+ SND_SOC_DAPM_MIXER(OUT4 Mixer, SND_SOC_NOPM, 0, 0,
+ ha_dsp_out4_mixer_controls[0],
+ ARRAY_SIZE(ha_dsp_out4_mixer_controls)),
+ SND_SOC_DAPM_MIXER(OUT5 Mixer, SND_SOC_NOPM, 0, 0,
+ ha_dsp_out5_mixer_controls[0],
+ ARRAY_SIZE(ha_dsp_out5_mixer_controls)),
+ SND_SOC_DAPM_MIXER(OUT6 Mixer, SND_SOC_NOPM, 0, 0,
+ ha_dsp_out6_mixer_controls[0],
+ ARRAY_SIZE(ha_dsp_out6_mixer_controls)),
+ SND_SOC_DAPM_MIXER(OUT7 Mixer, SND_SOC_NOPM, 0, 0,
+ ha_dsp_out7_mixer_controls[0],
+ ARRAY_SIZE(ha_dsp_out7_mixer_controls)),
+ SND_SOC_DAPM_MIXER(OUT8 Mixer, SND_SOC_NOPM, 0, 0,
+ ha_dsp_out8_mixer_controls[0],
+ ARRAY_SIZE(ha_dsp_out8_mixer_controls)),
[...]
+static int ha_dsp_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_pcm_runtime *rtd = substream-private_data;
+ struct snd_soc_codec *codec = rtd-codec;
A codec should never look at the pcm_runtime. The proper way to get a
pointer to the codec in dai callbacks is dai-codec. Or just use dai-dev below.
+
+ dev_dbg(codec-dev, Sample format 0x%X\n, params_format(params));
+ dev_dbg(codec-dev, Channels %d\n, params_channels(params));
+ dev_dbg(codec-dev, Rate %d\n, params_rate(params));
+
+ return 0;
+}
[...]
+static int ha_dsp_set_bias_level(struct snd_soc_codec *codec,
+enum snd_soc_bias_level level)
+{
+ dev_dbg(codec-dev, Changing bias from %d to %d\n,
+ codec-dapm.bias_level, level);
+
+ switch (level) {
+ case SND_SOC_BIAS_ON:
+ break;
+ case SND_SOC_BIAS_PREPARE:
+ /* Set PLL on */
+ break;
+ case SND_SOC_BIAS_STANDBY:
+ /* Set power on, Set PLL off */
+ break;
+ case SND_SOC_BIAS_OFF:
+ /* Set power down */
+ break;
+ }
+ codec-dapm.bias_level = level;
If you don't do anything in set_bias_level, just don't implement the
function. The default implementation if no callback is specified is to set
the bias_level to the requested level.
[PATCH V3 04/20] bus: omap_l3_noc: populate l3-dev and use it
l3-dev is not populated, so populate it and use it to print information
relevant to the device instead of using a generic pr_*.
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
change in V3: none
drivers/bus/omap_l3_noc.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 800486c..37d71b7 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -131,6 +131,7 @@ static int omap_l3_probe(struct platform_device *pdev)
if (!l3)
return -ENOMEM;
+ l3-dev = pdev-dev;
platform_set_drvdata(pdev, l3);
/* Get mem resources */
@@ -140,7 +141,7 @@ static int omap_l3_probe(struct platform_device *pdev)
l3-l3_base[i] = devm_ioremap_resource(pdev-dev, res);
if (IS_ERR(l3-l3_base[i])) {
- dev_err(pdev-dev, ioremap %d failed\n, i);
+ dev_err(l3-dev, ioremap %d failed\n, i);
return PTR_ERR(l3-l3_base[i]);
}
}
@@ -149,19 +150,19 @@ static int omap_l3_probe(struct platform_device *pdev)
* Setup interrupt Handlers
*/
l3-debug_irq = platform_get_irq(pdev, 0);
- ret = devm_request_irq(pdev-dev, l3-debug_irq, l3_interrupt_handler,
+ ret = devm_request_irq(l3-dev, l3-debug_irq, l3_interrupt_handler,
IRQF_DISABLED, l3-dbg-irq, l3);
if (ret) {
- dev_err(pdev-dev, request_irq failed for %d\n,
+ dev_err(l3-dev, request_irq failed for %d\n,
l3-debug_irq);
return ret;
}
l3-app_irq = platform_get_irq(pdev, 1);
- ret = devm_request_irq(pdev-dev, l3-app_irq, l3_interrupt_handler,
+ ret = devm_request_irq(l3-dev, l3-app_irq, l3_interrupt_handler,
IRQF_DISABLED, l3-app-irq, l3);
if (ret)
- dev_err(pdev-dev, request_irq failed for %d\n, l3-app_irq);
+ dev_err(l3-dev, request_irq failed for %d\n, l3-app_irq);
return ret;
}
--
1.7.9.5
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[PATCH V3 18/20] bus: omap_l3_noc: introduce concept of submodule
While OMAP4 and OMAP5 had 3 separate clock domains, DRA7 has only 2
and the first one then is internally divided into 2 sub clock domains.
To better represent this in the driver, we use the concept of submodule.
The address defintions in the devicetree is as per the high level
clock domain(module) base, the sub clockdomain/subdomain which shares
the same register space of a clockdomain is marked in the SoC data as
L3_BASE_IS_SUBMODULE.
L3_BASE_IS_SUBMODULE is used as an indication that it's base address is
the same as the parent module and offsets are considered from the same
base address as they are usually intermingled.
Other than the base address, the submodule is same as a module as it is
functionally so.
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: no change
drivers/bus/omap_l3_noc.c | 17 -
drivers/bus/omap_l3_noc.h |6 +-
2 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 08344b0..0eba07a 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -238,7 +238,7 @@ static int omap_l3_probe(struct platform_device *pdev)
{
const struct of_device_id *of_id;
static struct omap_l3 *l3;
- int ret, i;
+ int ret, i, res_idx;
of_id = of_match_device(l3_noc_match, pdev-dev);
if (!of_id) {
@@ -255,15 +255,22 @@ static int omap_l3_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, l3);
/* Get mem resources */
- for (i = 0; i l3-num_modules; i++) {
- struct resource *res = platform_get_resource(pdev,
-IORESOURCE_MEM, i);
-
+ for (i = 0, res_idx = 0; i l3-num_modules; i++) {
+ struct resource *res;
+
+ if (l3-l3_base[i] == L3_BASE_IS_SUBMODULE) {
+ /* First entry cannot be submodule */
+ BUG_ON(i == 0);
+ l3-l3_base[i] = l3-l3_base[i - 1];
+ continue;
+ }
+ res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx);
l3-l3_base[i] = devm_ioremap_resource(pdev-dev, res);
if (IS_ERR(l3-l3_base[i])) {
dev_err(l3-dev, ioremap %d failed\n, i);
return PTR_ERR(l3-l3_base[i]);
}
+ res_idx++;
}
/*
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index 36dc48b..aced4c5 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -41,6 +41,8 @@
#define L3_TARGET_NOT_SUPPORTEDNULL
+#define L3_BASE_IS_SUBMODULE ((void __iomem *)(1 0))
+
static const char * const l3_transaction_type[] = {
/* 0 0 0 */ Idle,
/* 0 0 1 */ Write,
@@ -96,7 +98,9 @@ struct l3_flagmux_data {
/**
* struct omap_l3 - Description of data relevant for L3 bus.
* @dev: device representing the bus (populated runtime)
- * @l3_base: base addresses of modules (populated runtime)
+ * @l3_base: base addresses of modules (populated runtime if 0)
+ * if set to L3_BASE_IS_SUBMODULE, then uses previous
+ * module index as the base address
* @l3_flag_mux: array containing flag mux data per module
* offset from corresponding module base indexed per
* module.
--
1.7.9.5
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[PATCH V3 05/20] bus: omap_l3_noc: switch over to relaxed variants of readl/writel
Currently we use __raw_readl and writel in this driver. Considering
there is no specific need for a memory barrier, replacing writel
with endian-neutral writel_relaxed and replacing __raw_readls with
the corresponding endian-neutral readl_relaxed allows us to have a
standard set of register operations for the driver.
While at it, simplify address computation using variables for
register.
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
change in V3: commit message improvement based on Felipe's feedback.
no change since V2 repost.
drivers/bus/omap_l3_noc.c | 26 ++
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 37d71b7..c8facb0 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -55,6 +55,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
int err_src = 0;
u32 std_err_main, err_reg, clear, masterid;
void __iomem *base, *l3_targ_base;
+ void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
char *target_name, *master_name = UN IDENTIFIED;
/* Get the Type of interrupt */
@@ -66,8 +67,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
* to determine the source
*/
base = l3-l3_base[i];
- err_reg = __raw_readl(base + l3_flagmux[i] +
- + L3_FLAGMUX_REGERR0 + (inttype 3));
+ err_reg = readl_relaxed(base + l3_flagmux[i] +
+ L3_FLAGMUX_REGERR0 + (inttype 3));
/* Get the corresponding error and analyse */
if (err_reg) {
@@ -76,10 +77,14 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
/* Read the stderrlog_main_source from clk domain */
l3_targ_base = base + *(l3_targ[i] + err_src);
- std_err_main = __raw_readl(l3_targ_base +
- L3_TARG_STDERRLOG_MAIN);
- masterid = __raw_readl(l3_targ_base +
- L3_TARG_STDERRLOG_MSTADDR);
+ l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN;
+ l3_targ_slvofslsb = l3_targ_base +
+ L3_TARG_STDERRLOG_SLVOFSLSB;
+ l3_targ_mstaddr = l3_targ_base +
+ L3_TARG_STDERRLOG_MSTADDR;
+
+ std_err_main = readl_relaxed(l3_targ_stderr);
+ masterid = readl_relaxed(l3_targ_mstaddr);
switch (std_err_main CUSTOM_ERROR) {
case STANDARD_ERROR:
@@ -87,12 +92,10 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
l3_targ_inst_name[i][err_src];
WARN(true, L3 standard error: TARGET:%s at
address 0x%x\n,
target_name,
- __raw_readl(l3_targ_base +
- L3_TARG_STDERRLOG_SLVOFSLSB));
+ readl_relaxed(l3_targ_slvofslsb));
/* clear the std error log*/
clear = std_err_main | CLEAR_STDERR_LOG;
- writel(clear, l3_targ_base +
- L3_TARG_STDERRLOG_MAIN);
+ writel_relaxed(clear, l3_targ_stderr);
break;
case CUSTOM_ERROR:
@@ -107,8 +110,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
master_name, target_name);
/* clear the std error log*/
clear = std_err_main | CLEAR_STDERR_LOG;
- writel(clear, l3_targ_base +
- L3_TARG_STDERRLOG_MAIN);
+ writel_relaxed(clear, l3_targ_stderr);
break;
default:
--
1.7.9.5
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[PATCH V3 17/20] bus: omap_l3_noc: Add information about the context of operation
L3 error may be triggered using Debug interface (example JTAG) or
due to other errors, for example an opcode fetch (due to function
pointer or stack corruption) or a data access (due to some other
failure). NOC registers contain additional information to help aid
debug information.
With this, we can enhance the error information to more detailed form:
L3 Custom Error: MASTER MPU TARGET L4PER2 (Read): Data Access in User mode
during Functional access
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: no change
drivers/bus/omap_l3_noc.c | 18 ++
drivers/bus/omap_l3_noc.h |2 ++
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 9d021d0..08344b0 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -60,15 +60,16 @@ static int l3_handle_target(struct omap_l3 *l3, void
__iomem *base,
{
int k;
u32 std_err_main, clear, masterid;
- u8 op_code;
+ u8 op_code, m_req_info;
void __iomem *l3_targ_base;
void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
- void __iomem *l3_targ_hdr;
+ void __iomem *l3_targ_hdr, *l3_targ_info;
struct l3_target_data *l3_targ_inst;
struct l3_masters_data *master;
char *target_name, *master_name = UN IDENTIFIED;
char *err_description;
char err_string[30] = { 0 };
+ char info_string[60] = { 0 };
/* We DONOT expect err_src to go out of bounds */
BUG_ON(err_src MAX_CLKDM_TARGETS);
@@ -99,6 +100,7 @@ static int l3_handle_target(struct omap_l3 *l3, void __iomem
*base,
l3_targ_mstaddr = l3_targ_base + L3_TARG_STDERRLOG_MSTADDR;
l3_targ_hdr = l3_targ_base + L3_TARG_STDERRLOG_HDR;
+ l3_targ_info = l3_targ_base + L3_TARG_STDERRLOG_INFO;
break;
case CUSTOM_ERROR:
@@ -107,6 +109,7 @@ static int l3_handle_target(struct omap_l3 *l3, void
__iomem *base,
l3_targ_mstaddr = l3_targ_base +
L3_TARG_STDERRLOG_CINFO_MSTADDR;
l3_targ_hdr = l3_targ_base + L3_TARG_STDERRLOG_CINFO_OPCODE;
+ l3_targ_info = l3_targ_base + L3_TARG_STDERRLOG_CINFO_INFO;
break;
default:
@@ -128,13 +131,20 @@ static int l3_handle_target(struct omap_l3 *l3, void
__iomem *base,
op_code = readl_relaxed(l3_targ_hdr) 0x7;
+ m_req_info = readl_relaxed(l3_targ_info) 0xF;
+ snprintf(info_string, sizeof(info_string),
+: %s in %s mode during %s access,
+(m_req_info BIT(0)) ? Opcode Fetch : Data Access,
+(m_req_info BIT(1)) ? Supervisor : User,
+(m_req_info BIT(3)) ? Debug : Functional);
+
WARN(true,
-%s:L3 %s Error: MASTER %s TARGET %s (%s)%s\n,
+%s:L3 %s Error: MASTER %s TARGET %s (%s)%s%s\n,
dev_name(l3-dev),
err_description,
master_name, target_name,
l3_transaction_type[op_code],
-err_string);
+err_string, info_string);
/* clear the std error log*/
clear = std_err_main | CLEAR_STDERR_LOG;
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index 6670fd9..36dc48b 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -31,7 +31,9 @@
#define L3_TARG_STDERRLOG_MAIN 0x48
#define L3_TARG_STDERRLOG_HDR 0x4c
#define L3_TARG_STDERRLOG_MSTADDR 0x50
+#define L3_TARG_STDERRLOG_INFO 0x58
#define L3_TARG_STDERRLOG_SLVOFSLSB0x5c
+#define L3_TARG_STDERRLOG_CINFO_INFO 0x64
#define L3_TARG_STDERRLOG_CINFO_MSTADDR0x68
#define L3_TARG_STDERRLOG_CINFO_OPCODE 0x6c
#define L3_FLAGMUX_REGERR0 0xc
--
1.7.9.5
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[PATCH V3 14/20] bus: omap_l3_noc: improve readability by using helper for slave event parsing
Current interrupt handler does the first level parse to identify the
slave and then handles the slave even identification, reporting and
clearing of event as well. It is hence logical to split the handler
into two where the primary handler just parses the flagmux till it
identifies a slave and the slave handling, reporting and clearing is
done in a helper function.
While at it update the documentation in kerneldoc style.
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: no change
drivers/bus/omap_l3_noc.c | 211 -
1 file changed, 113 insertions(+), 98 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 42e4114..0691e6d 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -26,14 +26,20 @@
#include omap_l3_noc.h
-/*
- * Interrupt Handler for L3 error detection.
- * 1) Identify the L3 clockdomain partition to which the error belongs to.
- * 2) Identify the slave where the error information is logged
- * 3) Print the logged information.
- * 4) Add dump stack to provide kernel trace.
+/**
+ * l3_handle_target() - Handle Target specific parse and reporting
+ * @l3:pointer to l3 struct
+ * @base: base address of clkdm
+ * @flag_mux: flagmux corresponding to the event
+ * @err_src: error source index of the slave (target)
*
- * Two Types of errors :
+ * This does the second part of the error interrupt handling:
+ * 3) Parse in the slave information
+ * 4) Print the logged information.
+ * 5) Add dump stack to provide kernel trace.
+ * 6) Clear the source if known.
+ *
+ * This handles two types of errors:
* 1) Custom errors in L3 :
* Target like DMM/FW/EMIF generates SRESP=ERR error
* 2) Standard L3 error:
@@ -49,22 +55,107 @@
* can be trapped as well. But the trapping is implemented as part
* secure software and hence need not be implemented here.
*/
-static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
+static int l3_handle_target(struct omap_l3 *l3, void __iomem *base,
+ struct l3_flagmux_data *flag_mux, int err_src)
{
-
- struct omap_l3 *l3 = _l3;
- int inttype, i, k;
- int err_src = 0;
- u32 std_err_main, err_reg, clear, masterid;
- void __iomem *base, *l3_targ_base;
+ int k;
+ u32 std_err_main, clear, masterid;
+ void __iomem *l3_targ_base;
void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
- char *target_name, *master_name = UN IDENTIFIED;
struct l3_target_data *l3_targ_inst;
- struct l3_flagmux_data *flag_mux;
struct l3_masters_data *master;
+ char *target_name, *master_name = UN IDENTIFIED;
char *err_description;
char err_string[30] = { 0 };
+ /* We DONOT expect err_src to go out of bounds */
+ BUG_ON(err_src MAX_CLKDM_TARGETS);
+
+ if (err_src flag_mux-num_targ_data) {
+ l3_targ_inst = flag_mux-l3_targ[err_src];
+ target_name = l3_targ_inst-name;
+ l3_targ_base = base + l3_targ_inst-offset;
+ } else {
+ target_name = L3_TARGET_NOT_SUPPORTED;
+ }
+
+ if (target_name == L3_TARGET_NOT_SUPPORTED)
+ return -ENODEV;
+
+ /* Read the stderrlog_main_source from clk domain */
+ l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN;
+ l3_targ_slvofslsb = l3_targ_base + L3_TARG_STDERRLOG_SLVOFSLSB;
+
+ std_err_main = readl_relaxed(l3_targ_stderr);
+
+ switch (std_err_main CUSTOM_ERROR) {
+ case STANDARD_ERROR:
+ err_description = Standard;
+ snprintf(err_string, sizeof(err_string),
+: At Address: 0x%08X ,
+readl_relaxed(l3_targ_slvofslsb));
+
+ l3_targ_mstaddr = l3_targ_base + L3_TARG_STDERRLOG_MSTADDR;
+ break;
+
+ case CUSTOM_ERROR:
+ err_description = Custom;
+
+ l3_targ_mstaddr = l3_targ_base +
+ L3_TARG_STDERRLOG_CINFO_MSTADDR;
+ break;
+
+ default:
+ /* Nothing to be handled here as of now */
+ return 0;
+ }
+
+ /* STDERRLOG_MSTADDR Stores the NTTP master address. */
+ masterid = (readl_relaxed(l3_targ_mstaddr)
+ l3-mst_addr_mask) __ffs(l3-mst_addr_mask);
+
+ for (k = 0, master = l3-l3_masters; k l3-num_masters;
+k++, master++) {
+ if (masterid == master-id) {
+ master_name = master-name;
+ break;
+ }
+ }
+
+ WARN(true,
+%s:L3 %s Error: MASTER %s TARGET %s%s\n,
+dev_name(l3-dev),
+
[PATCH V3 13/20] bus: omap_l3_noc: make error reporting and handling common
The logic between handling CUSTOM_ERROR and STANDARD_ERROR is just the
reporting style.
So make it generic, simplify and standardize the reporting with both
master and target information printed to log.
Handle the register address difference for master code for standard
error and custom error as well.
While at it, fix a minor indentation error.
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: no change
drivers/bus/omap_l3_noc.c | 72 -
drivers/bus/omap_l3_noc.h |3 +-
2 files changed, 47 insertions(+), 28 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 8a1926d..42e4114 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -62,6 +62,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
struct l3_target_data *l3_targ_inst;
struct l3_flagmux_data *flag_mux;
struct l3_masters_data *master;
+ char *err_description;
+ char err_string[30] = { 0 };
/* Get the Type of interrupt */
inttype = irq == l3-app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
@@ -78,6 +80,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
/* Get the corresponding error and analyse */
if (err_reg) {
+ bool std_err = true;
+
/* Identify the source from control status register */
err_src = __ffs(err_reg);
@@ -123,47 +127,61 @@ static irqreturn_t l3_interrupt_handler(int irq, void
*_l3)
l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN;
l3_targ_slvofslsb = l3_targ_base +
L3_TARG_STDERRLOG_SLVOFSLSB;
- l3_targ_mstaddr = l3_targ_base +
- L3_TARG_STDERRLOG_MSTADDR;
std_err_main = readl_relaxed(l3_targ_stderr);
- /* STDERRLOG_MSTADDR Stores the NTTP master address. */
- masterid = (readl_relaxed(l3_targ_mstaddr)
- l3-mst_addr_mask)
- __ffs(l3-mst_addr_mask);
-
switch (std_err_main CUSTOM_ERROR) {
case STANDARD_ERROR:
- WARN(true, L3 standard error: TARGET:%s at
address 0x%x\n,
- target_name,
- readl_relaxed(l3_targ_slvofslsb));
- /* clear the std error log*/
- clear = std_err_main | CLEAR_STDERR_LOG;
- writel_relaxed(clear, l3_targ_stderr);
+ err_description = Standard;
+ snprintf(err_string, sizeof(err_string),
+: At Address: 0x%08X ,
+readl_relaxed(l3_targ_slvofslsb));
+
+ l3_targ_mstaddr = l3_targ_base +
+ L3_TARG_STDERRLOG_MSTADDR;
break;
case CUSTOM_ERROR:
- for (k = 0, master = l3-l3_masters;
-k l3-num_masters; k++, master++) {
- if (masterid == master-id) {
- master_name = master-name;
- break;
- }
- }
- WARN(true, L3 custom error: MASTER:%s
TARGET:%s\n,
- master_name, target_name);
- /* clear the std error log*/
- clear = std_err_main | CLEAR_STDERR_LOG;
- writel_relaxed(clear, l3_targ_stderr);
+ err_description = Custom;
+
+ l3_targ_mstaddr = l3_targ_base +
+ L3_TARG_STDERRLOG_CINFO_MSTADDR;
break;
default:
+ std_err = false;
/* Nothing to be handled here as of now */
break;
}
- /* Error found so break the for loop */
- break;
+
+ if (!std_err)
+ break;
+
+ /* STDERRLOG_MSTADDR Stores the NTTP master address. */
+ masterid = (readl_relaxed(l3_targ_mstaddr)
+
[PATCH V3 10/20] bus: omap_l3_noc: use of_match_data to pick up SoC information
From: Sricharan R r.sricha...@ti.com
DRA7xx SoC has the same l3-noc interconnect ip (as OMAP4 and OMAP5), but
AM437x SoC has just 2 modules instead of 3 which other SoCs have.
So, stop using direct access of array indices and use of-match data and
simplify implementation to benefit future usage.
While at it, rename a few very generic variables to make them omap
specific. This helps us differentiate from DRA7 and AM43xx data in the
future.
NOTE: None of the platforms that use omap_l3_noc are non-device tree
anymore. So, it is safe to assume OF match here.
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
[n...@ti.com: split, refactor and optimize logic]
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: no change
drivers/bus/omap_l3_noc.c | 55 +++---
drivers/bus/omap_l3_noc.h | 72 -
2 files changed, 84 insertions(+), 43 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 7743e86..7e0a988 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -14,12 +14,14 @@
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#include linux/module.h
#include linux/init.h
-#include linux/io.h
-#include linux/platform_device.h
#include linux/interrupt.h
+#include linux/io.h
#include linux/kernel.h
+#include linux/module.h
+#include linux/of_device.h
+#include linux/of.h
+#include linux/platform_device.h
#include linux/slab.h
#include omap_l3_noc.h
@@ -58,17 +60,18 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
char *target_name, *master_name = UN IDENTIFIED;
struct l3_target_data *l3_targ_inst;
+ struct l3_masters_data *master;
/* Get the Type of interrupt */
inttype = irq == l3-app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
- for (i = 0; i L3_MODULES; i++) {
+ for (i = 0; i l3-num_modules; i++) {
/*
* Read the regerr register of the clock domain
* to determine the source
*/
base = l3-l3_base[i];
- err_reg = readl_relaxed(base + l3_flagmux[i] +
+ err_reg = readl_relaxed(base + l3-l3_flagmux[i] +
L3_FLAGMUX_REGERR0 + (inttype 3));
/* Get the corresponding error and analyse */
@@ -79,7 +82,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
/* We DONOT expect err_src to go out of bounds */
BUG_ON(err_src MAX_CLKDM_TARGETS);
- l3_targ_inst = l3_targ[i][err_src];
+ l3_targ_inst = l3-l3_targ[i][err_src];
target_name = l3_targ_inst-name;
l3_targ_base = base + l3_targ_inst-offset;
@@ -101,7 +104,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
inttype ? debug : application,
err_src, i, (unclearable));
- mask_reg = base + l3_flagmux[i] +
+ mask_reg = base + l3-l3_flagmux[i] +
L3_FLAGMUX_MASK0 + (inttype 3);
mask_val = readl_relaxed(mask_reg);
mask_val = ~(1 err_src);
@@ -131,10 +134,12 @@ static irqreturn_t l3_interrupt_handler(int irq, void
*_l3)
break;
case CUSTOM_ERROR:
- for (k = 0; k NUM_OF_L3_MASTERS; k++) {
- if (masterid == l3_masters[k].id)
- master_name =
- l3_masters[k].name;
+ for (k = 0, master = l3-l3_masters;
+k l3-num_masters; k++, master++) {
+ if (masterid == master-id) {
+ master_name = master-name;
+ break;
+ }
}
WARN(true, L3 custom error: MASTER:%s
TARGET:%s\n,
master_name, target_name);
@@ -154,20 +159,34 @@ static irqreturn_t l3_interrupt_handler(int irq, void
*_l3)
return IRQ_HANDLED;
}
+static const struct of_device_id l3_noc_match[] = {
+ {.compatible = ti,omap4-l3-noc, .data = omap_l3_data},
+ {},
Re: [PATCH 1/4] mfd: twl4030-power: Add recommended idle configuration
* Lee Jones lee.jo...@linaro.org [140428 04:42]: These settings are based on the Recommended Sleep Sequences for the Zoom Platform pdf at: http://omappedia.com/wiki/File:Recommended_Sleep_Sequences_Zoom.pdf These settings assume most of the regulators are under control of Linux, and cuts off VDD1 and VDD2 during off-idle as Linux cannot do it. Linux does it becuase Linux can't do it. Eh? Heh yeah that's confusing, will update to: These settings assume most of the regulators are under control of Linux, and twl4030 only cuts off VDD1 and VDD2 during off-idle as Linux cannot do it. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 03/20] bus: omap_l3_noc: remove iclk from omap_l3 struct
we do not use iclk directly anymore. And, even if we had to, we
should be using pm_runtime APIs to do the same to be completely SoC
independent.
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
change in V3: none
drivers/bus/omap_l3_noc.h |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index b3c81f2..31984cf 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -159,7 +159,6 @@ static u32 *l3_targ[L3_MODULES] = {
struct omap_l3 {
struct device *dev;
- struct clk *ick;
/* memory base */
void __iomem *l3_base[L3_MODULES];
--
1.7.9.5
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[PATCH V3 15/20] bus: omap_l3_noc: ignore masked out unclearable targets
From: Afzal Mohammed af...@ti.com
Errors that cannot be cleared (determined by reading REGERR register)
are currently handled by masking it. Documentation states that REGERR
Checks which application/debug error sources are active - it does not
indicate that this is interrupt status - masked out status represented
eventually in the irq line to MPU.
For example:
Lets say module 0 bit 8(0x100) was unclearable, we do the mask it from
generating further errors. However in the following cases:
a) bit 9 of Module 0
OR
b) any bit of Module 1+
occur, the interrupt handler wrongly assumes that the raw interrupt
status of module 0 bit 8 is the root cause of the interrupt, and
returns. This causes unhandled interrupt and resultant infinite
interrupts.
Fix this scenario by storing the events we masked out and masking raw
status with masked ones before identifying and handling the error.
Reported-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
Tested-by: Vaibhav Hiremath hvaib...@gmail.com
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
---
V3: new patch
drivers/bus/omap_l3_noc.c |9 +
drivers/bus/omap_l3_noc.h |4
2 files changed, 13 insertions(+)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 0691e6d..00e4fed 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -169,6 +169,9 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
err_reg = readl_relaxed(base + flag_mux-offset +
L3_FLAGMUX_REGERR0 + (inttype 3));
+ err_reg = ~(inttype ? flag_mux-mask_app_bits :
+ flag_mux-mask_dbg_bits);
+
/* Get the corresponding error and analyse */
if (err_reg) {
/* Identify the source from control status register */
@@ -193,6 +196,12 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
mask_val = readl_relaxed(mask_reg);
mask_val = ~(1 err_src);
writel_relaxed(mask_val, mask_reg);
+
+ /* Mark these bits as to be ignored */
+ if (inttype)
+ flag_mux-mask_app_bits |= 1 err_src;
+ else
+ flag_mux-mask_dbg_bits |= 1 err_src;
}
/* Error found so break the for loop */
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index ea2f51c..4e18307 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -66,11 +66,15 @@ struct l3_target_data {
* target data. unsupported ones are marked with
* L3_TARGET_NOT_SUPPORTED
* @num_targ_data: number of entries in target data
+ * @mask_app_bits: ignore these from raw application irq status
+ * @mask_dbg_bits: ignore these from raw debug irq status
*/
struct l3_flagmux_data {
u32 offset;
struct l3_target_data *l3_targ;
u8 num_targ_data;
+ u32 mask_app_bits;
+ u32 mask_dbg_bits;
};
--
1.7.9.5
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[PATCH V3 00/20] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372
The following V3 of the series is based on v3.15-rc1 + peter's patch series: patch #1: https://patchwork.kernel.org/patch/3923141/ (drivers: bus: omap_l3: Convert to use devm_kzalloc) patch #2: https://patchwork.kernel.org/patch/3923061/ (drivers: bus: omap_l3: Convert to use devm_ioremap_resource() ) patch #3: https://patchwork.kernel.org/patch/3923101/ (drivers: bus: omap_l3: Convert to use devm_request_irq()) patch #4: https://patchwork.kernel.org/patch/3923081/ (drivers: bus: omap_l3: Remove the platform driver's remove function) patch #5: https://patchwork.kernel.org/patch/3923121/ (drivers: bus: omap_l3: Change pr_crit() to dev_err() when IRQ request fails) V1 was originally posted here: http://marc.info/?l=linux-omapm=139749383932575w=2 V2 was originally posted here: http://marc.info/?l=linux-kernelm=139776814925544w=2 V3: has the following changes (w.r.t v2): - fixed relaxed commit message and usage. - AM437x internal documents showed that: - new master information updated into the data - masterid register definition is different from OMAP4-DRA7 - some additional parsing is done in hardware to avoid s/w parsing - Additional testing information showed logic fail for masking unclearable new patch added to series - patch #15 - Picked up previous acks and tested by - minor changes verified This series cleansup omap_l3_noc driver and adds data to support DRA7 and AM437x SoCs. Patches(including Peter's) is available here:(based on v3.15-rc1): https://github.com/nmenon/linux-2.6-playground/commits/l3noc/driver-fixes-v3 DTS patches (once this series is integrated and related DRA7 memory map fixes are done): https://github.com/nmenon/linux-2.6-playground/commits/l3noc/dts-fixes (posted here: http://marc.info/?l=linux-omapm=139750288003978w=2) - no change in dts. Testing branch: everything integrated: https://github.com/nmenon/linux-2.6-playground/commits/l3noc/testing-v3 Test log (omap2plus_defconfig + CONFIG_CRYPTO_DEV_OMAP_DES=y): am43xx-epos: http://slexy.org/raw/s28LkG186D dra7xx-evm: http://slexy.org/raw/s2UV0v7fwn pandaboard-es: http://slexy.org/raw/s213lc55PY pandaboard-vanilla: http://slexy.org/raw/s20AvyGNrA sdp4430: http://slexy.org/raw/s2E0exblmN OMAP5432uEVM: http://slexy.org/raw/s20TRRtKzf Afzal Mohammed (2): bus: omap_l3_noc: ignore masked out unclearable targets bus: omap_l3_noc: Add AM4372 interconnect error data Nishanth Menon (14): bus: omap_l3_noc: Fix copyright information bus: omap_l3_noc: remove iclk from omap_l3 struct bus: omap_l3_noc: populate l3-dev and use it bus: omap_l3_noc: switch over to relaxed variants of readl/writel bus: omap_l3_noc: un-obfuscate l3_targ address computation bus: omap_l3_noc: move L3 master data structure out bus: omap_l3_noc: convert target information into a structure bus: omap_l3_noc: convert flagmux information into a structure bus: omap_l3_noc: fix masterid detection bus: omap_l3_noc: make error reporting and handling common bus: omap_l3_noc: improve readability by using helper for slave event parsing bus: omap_l3_noc: add information about the type of operation bus: omap_l3_noc: Add information about the context of operation bus: omap_l3_noc: introduce concept of submodule Rajendra Nayak (2): bus: omap_l3_noc: Add support for discountinous flag mux input numbers bus: omap_l3_noc: Add DRA7 interconnect error data Sricharan R (2): bus: omap_l3_noc: rename functions and data to omap_l3 bus: omap_l3_noc: use of_match_data to pick up SoC information .../devicetree/bindings/arm/omap/l3-noc.txt|2 + drivers/bus/omap_l3_noc.c | 322 drivers/bus/omap_l3_noc.h | 545 +++- 3 files changed, 642 insertions(+), 227 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 06/20] bus: omap_l3_noc: un-obfuscate l3_targ address computation
just simplify derefencing that is equivalent. Signed-off-by: Nishanth Menon n...@ti.com Acked-by: Santosh Shilimkar santosh.shilim...@ti.com Acked-by: Peter Ujfalusi peter.ujfal...@ti.com Tested-by: Darren Etheridge detheri...@ti.com --- V3: no change drivers/bus/omap_l3_noc.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c index c8facb0..f7d3bf4 100644 --- a/drivers/bus/omap_l3_noc.c +++ b/drivers/bus/omap_l3_noc.c @@ -76,7 +76,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) err_src = __ffs(err_reg); /* Read the stderrlog_main_source from clk domain */ - l3_targ_base = base + *(l3_targ[i] + err_src); + l3_targ_base = base + l3_targ[i][err_src]; l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN; l3_targ_slvofslsb = l3_targ_base + L3_TARG_STDERRLOG_SLVOFSLSB; -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 11/20] bus: omap_l3_noc: convert flagmux information into a structure
This allows us to encompass target information and flag mux offset that
points to the target information into a singular structure. This saves
us the need to look up two different arrays indexed by module ID for
information.
This allows us to reduce the static target information allocation to
just the ones that are documented.
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: no change
drivers/bus/omap_l3_noc.c | 16 +++
drivers/bus/omap_l3_noc.h | 70 +
2 files changed, 56 insertions(+), 30 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 7e0a988..9524452 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -60,6 +60,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
char *target_name, *master_name = UN IDENTIFIED;
struct l3_target_data *l3_targ_inst;
+ struct l3_flagmux_data *flag_mux;
struct l3_masters_data *master;
/* Get the Type of interrupt */
@@ -71,7 +72,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
* to determine the source
*/
base = l3-l3_base[i];
- err_reg = readl_relaxed(base + l3-l3_flagmux[i] +
+ flag_mux = l3-l3_flagmux[i];
+ err_reg = readl_relaxed(base + flag_mux-offset +
L3_FLAGMUX_REGERR0 + (inttype 3));
/* Get the corresponding error and analyse */
@@ -82,9 +84,13 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
/* We DONOT expect err_src to go out of bounds */
BUG_ON(err_src MAX_CLKDM_TARGETS);
- l3_targ_inst = l3-l3_targ[i][err_src];
- target_name = l3_targ_inst-name;
- l3_targ_base = base + l3_targ_inst-offset;
+ if (err_src flag_mux-num_targ_data) {
+ l3_targ_inst = flag_mux-l3_targ[err_src];
+ target_name = l3_targ_inst-name;
+ l3_targ_base = base + l3_targ_inst-offset;
+ } else {
+ target_name = L3_TARGET_NOT_SUPPORTED;
+ }
/*
* If we do not know of a register offset to decode
@@ -104,7 +110,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
inttype ? debug : application,
err_src, i, (unclearable));
- mask_reg = base + l3-l3_flagmux[i] +
+ mask_reg = base + flag_mux-offset +
L3_FLAGMUX_MASK0 + (inttype 3);
mask_val = readl_relaxed(mask_reg);
mask_val = ~(1 err_src);
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index e60865f..64869fe 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -17,8 +17,8 @@
#ifndef __OMAP_L3_NOC_H
#define __OMAP_L3_NOC_H
-#define OMAP_L3_MODULES3
#define MAX_L3_MODULES 3
+#define MAX_CLKDM_TARGETS 31
#define CLEAR_STDERR_LOG (1 31)
#define CUSTOM_ERROR 0x2
@@ -36,8 +36,6 @@
#define L3_TARGET_NOT_SUPPORTEDNULL
-#define MAX_CLKDM_TARGETS 31
-
/**
* struct l3_masters_data - L3 Master information
* @id:ID of the L3 Master
@@ -60,21 +58,32 @@ struct l3_target_data {
char *name;
};
+/**
+ * struct l3_flagmux_data - Flag Mux information
+ * @offset:offset from base for flagmux register
+ * @l3_targ: array indexed by flagmux index (bit offset) pointing to the
+ * target data. unsupported ones are marked with
+ * L3_TARGET_NOT_SUPPORTED
+ * @num_targ_data: number of entries in target data
+ */
+struct l3_flagmux_data {
+ u32 offset;
+ struct l3_target_data *l3_targ;
+ u8 num_targ_data;
+};
+
/**
* struct omap_l3 - Description of data relevant for L3 bus.
* @dev: device representing the bus (populated runtime)
* @l3_base: base addresses of modules (populated runtime)
- * @l3_flag_mux: array containing offsets to flag mux per module
+ * @l3_flag_mux: array containing flag mux data per module
* offset from corresponding module base indexed per
* module.
* @num_modules: number of clock domains / modules.
* @l3_masters:array pointing to master data containing name and
register
*
[PATCH V3 09/20] bus: omap_l3_noc: Add support for discountinous flag mux input numbers
From: Rajendra Nayak rna...@ti.com
On DRA7, unlike on OMAP4 and OMAP5, the flag mux input numbers used
to indicate the source of errors are not continous. Have a way in the
driver to catch these and WARN the user of the flag mux input thats
either undocumented or wrong.
In the similar vein, Timeout errors in AM43x can't be cleared per h/w
team, neither does it have a STDERRLOG_MAIN to clear the error.
Further, the mux bit offset might not even be indexed into our array
of known mux input description, in which case we'd have a abort.
So, define a static range check for bit description and any definition
which has target_name set to NULL (the ones that are not populated or
ones that are specifically marked in the case of discontinous input
numbers), can handle the same gracefully. Upon occurance of error from
such sources, mask it. Otherwise, we'd have an infinite interrupt
source without any means to clear it.
NOTE: follow on patch ensures that these masked bits are ignored.
[n...@ti.com: rebase, squash and improve]
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: changed readl/writel to relaxed version
NOTE: follow on fix for error mask handling not squashed as required
data structure changes are yet to be introduced and doing it at this
point makes the code very ugly.
drivers/bus/omap_l3_noc.c | 31 +++
drivers/bus/omap_l3_noc.h | 11 ---
2 files changed, 39 insertions(+), 3 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 343f002..7743e86 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -75,10 +75,41 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
if (err_reg) {
/* Identify the source from control status register */
err_src = __ffs(err_reg);
+
+ /* We DONOT expect err_src to go out of bounds */
+ BUG_ON(err_src MAX_CLKDM_TARGETS);
+
l3_targ_inst = l3_targ[i][err_src];
target_name = l3_targ_inst-name;
l3_targ_base = base + l3_targ_inst-offset;
+ /*
+* If we do not know of a register offset to decode
+* and clear, then mask.
+*/
+ if (target_name == L3_TARGET_NOT_SUPPORTED) {
+ u32 mask_val;
+ void __iomem *mask_reg;
+
+ /*
+* Certain plaforms may have undocumented
+* status pending on boot.. So dont generate
+* a severe warning here.
+*/
+ dev_err(l3-dev,
+ L3 %s error: target %d mod:%d %s\n,
+ inttype ? debug : application,
+ err_src, i, (unclearable));
+
+ mask_reg = base + l3_flagmux[i] +
+ L3_FLAGMUX_MASK0 + (inttype 3);
+ mask_val = readl_relaxed(mask_reg);
+ mask_val = ~(1 err_src);
+ writel_relaxed(mask_val, mask_reg);
+
+ break;
+ }
+
/* Read the stderrlog_main_source from clk domain */
l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN;
l3_targ_slvofslsb = l3_targ_base +
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index ae28784..66caece 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -30,6 +30,11 @@
#define L3_TARG_STDERRLOG_SLVOFSLSB0x5c
#define L3_TARG_STDERRLOG_MSTADDR 0x68
#define L3_FLAGMUX_REGERR0 0xc
+#define L3_FLAGMUX_MASK0 0x8
+
+#define L3_TARGET_NOT_SUPPORTEDNULL
+
+#define MAX_CLKDM_TARGETS 31
#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0]))
@@ -61,7 +66,7 @@ static u32 l3_flagmux[L3_MODULES] = {
0X0200
};
-static struct l3_target_data l3_target_inst_data_clk1[] = {
+static struct l3_target_data l3_target_inst_data_clk1[MAX_CLKDM_TARGETS] = {
{0x100, DMM1,},
{0x200, DMM2,},
{0x300, ABE,},
@@ -71,7 +76,7 @@ static struct l3_target_data l3_target_inst_data_clk1[] = {
{0x900, L4WAKEUP,},
};
-static struct l3_target_data l3_target_inst_data_clk2[] = {
+static struct l3_target_data
Re: [PATCH 2/4] mfd: twl4030-power: Add support for board specific configuration
* Lee Jones lee.jo...@linaro.org [140428 04:47]:
With the recommended twl4030 configuration added, we can now add
board specific changes as modifications to the recommended
configuration.
Cc: Peter De Schrijver pdeschrij...@nvidia.com
Cc: Samuel Ortiz sa...@linux.intel.com
Cc: Lee Jones lee.jo...@linaro.org
Signed-off-by: Tony Lindgren t...@atomide.com
---
drivers/mfd/twl4030-power.c | 21 +
include/linux/i2c/twl.h | 1 +
2 files changed, 22 insertions(+)
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index 89a8528..89c6b1a 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -511,13 +511,34 @@ twl4030_power_configure_scripts(const struct
twl4030_power_data *pdata)
return 0;
}
+static void twl4030_patch_rconfig(struct twl4030_resconfig *common,
+ struct twl4030_resconfig *board)
+{
+ while (common-resource) {
+ struct twl4030_resconfig *b = board;
+
+ while (b-resource) {
+ if (b-resource == common-resource) {
+ *common = *b;
+ break;
+ }
+ b++;
+ }
+ common++;
+ }
+}
Forgive my ignorance, as I don't know how 'common' is setup, but we
appear to move to the next 'common' reference them immediately
dereference it without checking to see if it actually exists. Same
with 'b'. What happens if we reach the end of the array? NULL
dereference or does the final element always have a NULLed resource
attribute?
Yes there's always a NULL entry at the end of the list always in
this case, and the configured lists are always static in the driver.
Regards,
Tony
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[PATCH V3 01/20] bus: omap_l3_noc: Fix copyright information
This is an embarrassing patch :(. Texas Corporation does not make OMAP. Texas Instruments Inc does. For that matter I dont seem to be able to find a Texas Corporation on the internet either. While at it, update coverage to the current year and update the template to remove redundant information and use the standard boiler plate licensing. Signed-off-by: Nishanth Menon n...@ti.com Acked-by: Santosh Shilimkar santosh.shilim...@ti.com Acked-by: Peter Ujfalusi peter.ujfal...@ti.com Tested-by: Darren Etheridge detheri...@ti.com --- change in V3: none drivers/bus/omap_l3_noc.c | 18 ++ drivers/bus/omap_l3_noc.h | 18 ++ 2 files changed, 12 insertions(+), 24 deletions(-) diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c index 972691a..1eb6d85 100644 --- a/drivers/bus/omap_l3_noc.c +++ b/drivers/bus/omap_l3_noc.c @@ -1,24 +1,18 @@ /* * OMAP4XXX L3 Interconnect error handling driver * - * Copyright (C) 2011 Texas Corporation + * Copyright (C) 2011-2014 Texas Instruments Incorporated - http://www.ti.com/ * Santosh Shilimkar santosh.shilim...@ti.com * Sricharan r.sricha...@ti.com * * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * This program is distributed as is WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA */ #include linux/module.h #include linux/init.h diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h index a6ce34d..cc4b1b1 100644 --- a/drivers/bus/omap_l3_noc.h +++ b/drivers/bus/omap_l3_noc.h @@ -1,24 +1,18 @@ /* * OMAP4XXX L3 Interconnect error handling driver header * - * Copyright (C) 2011 Texas Corporation + * Copyright (C) 2011-2014 Texas Instruments Incorporated - http://www.ti.com/ * Santosh Shilimkar santosh.shilim...@ti.com * sricharan r.sricha...@ti.com * * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * This program is distributed as is WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA */ #ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H #define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 20/20] bus: omap_l3_noc: Add AM4372 interconnect error data
From: Afzal Mohammed af...@ti.com
Add AM4372 information to handle L3 error.
AM4372 has two clk domains 100f and 200s. Provide flagmux and data
associated with it.
NOTE: Timeout doesn't have STDERRLOG_MAIN register. And per hardware
team, L3 timeout error cannot be cleared the normal way (by setting
bit 31 in STDERRLOG_MAIN), instead it may be required to do system
reset. L3 error handler can't help in such scenarios.
Hence indicate timeout target offset as L3_TARGET_NOT_SUPPORTED as
done for undocumented bits.
Signed-off-by: Dave Gerlach d-gerl...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: New master information + masterid parse information update
.../devicetree/bindings/arm/omap/l3-noc.txt|1 +
drivers/bus/omap_l3_noc.c |1 +
drivers/bus/omap_l3_noc.h | 91
3 files changed, 93 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
b/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
index 45d0fc2..974624e 100644
--- a/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
+++ b/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
@@ -7,6 +7,7 @@ Required properties:
- compatible : Should be ti,omap3-l3-smx for OMAP3 family
Should be ti,omap4-l3-noc for OMAP4 family
Should be ti,dra7-l3-noc for DRA7 family
+ Should be ti,am4372-l3-noc for AM43 family
- reg: Contains L3 register address range for each noc domain.
- ti,hwmods: l3_main_1, ... One hwmod for each noc domain.
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 6cdd02e..531ae59 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -231,6 +231,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
static const struct of_device_id l3_noc_match[] = {
{.compatible = ti,omap4-l3-noc, .data = omap_l3_data},
{.compatible = ti,dra7-l3-noc, .data = dra_l3_data},
+ {.compatible = ti,am4372-l3-noc, .data = am4372_l3_data},
{},
};
MODULE_DEVICE_TABLE(of, l3_noc_match);
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index 9562a75..551e010 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -381,4 +381,95 @@ static const struct omap_l3 dra_l3_data = {
.mst_addr_mask = 0xFC,
};
+/* AM4372 data */
+static struct l3_target_data am4372_l3_target_data_200f[] = {
+ {0xf00, EMIF,},
+ {0x1200, DES,},
+ {0x400, OCMCRAM,},
+ {0x700, TPTC0,},
+ {0x800, TPTC1,},
+ {0x900, TPTC2},
+ {0xb00, TPCC,},
+ {0xd00, DEBUGSS,},
+ {0xdead, L3_TARGET_NOT_SUPPORTED,},
+ {0x200, SHA,},
+ {0xc00, SGX530,},
+ {0x500, AES0,},
+ {0xa00, L4_FAST,},
+ {0x300, MPUSS_L2_RAM,},
+ {0x100, ICSS,},
+};
+
+static struct l3_flagmux_data am4372_l3_flagmux_200f = {
+ .offset = 0x1000,
+ .l3_targ = am4372_l3_target_data_200f,
+ .num_targ_data = ARRAY_SIZE(am4372_l3_target_data_200f),
+};
+
+static struct l3_target_data am4372_l3_target_data_100s[] = {
+ {0x100, L4_PER_0,},
+ {0x200, L4_PER_1,},
+ {0x300, L4_PER_2,},
+ {0x400, L4_PER_3,},
+ {0x800, McASP0,},
+ {0x900, McASP1,},
+ {0xC00, MMCHS2,},
+ {0x700, GPMC,},
+ {0xD00, L4_FW,},
+ {0xdead, L3_TARGET_NOT_SUPPORTED,},
+ {0x500, ADCTSC,},
+ {0xE00, L4_WKUP,},
+ {0xA00, MAG_CARD,},
+};
+
+static struct l3_flagmux_data am4372_l3_flagmux_100s = {
+ .offset = 0x600,
+ .l3_targ = am4372_l3_target_data_100s,
+ .num_targ_data = ARRAY_SIZE(am4372_l3_target_data_100s),
+};
+
+static struct l3_masters_data am4372_l3_masters[] = {
+ { 0x0, M1 (128-bit)},
+ { 0x1, M2 (64-bit)},
+ { 0x4, DAP},
+ { 0x5, P1500},
+ { 0xC, ICSS0},
+ { 0xD, ICSS1},
+ { 0x14, Wakeup Processor},
+ { 0x18, TPTC0 Read},
+ { 0x19, TPTC0 Write},
+ { 0x1A, TPTC1 Read},
+ { 0x1B, TPTC1 Write},
+ { 0x1C, TPTC2 Read},
+ { 0x1D, TPTC2 Write},
+ { 0x20, SGX530},
+ { 0x21, OCP WP Traffic Probe},
+ { 0x22, OCP WP DMA Profiling},
+ { 0x23, OCP WP Event Trace},
+ { 0x25, DSS},
+ { 0x28, Crypto DMA RD},
+ { 0x29, Crypto DMA WR},
+ { 0x2C, VPFE0},
+ { 0x2D, VPFE1},
+ { 0x30, GEMAC},
+ { 0x34, USB0 RD},
+ { 0x35, USB0 WR},
+ { 0x36, USB1 RD},
+ { 0x37, USB1 WR},
+};
+
+static struct l3_flagmux_data *am4372_l3_flagmux[] = {
+ am4372_l3_flagmux_200f,
+ am4372_l3_flagmux_100s,
+};
+
+static const struct omap_l3 am4372_l3_data = {
+ .l3_flagmux = am4372_l3_flagmux,
+
[PATCH V3 07/20] bus: omap_l3_noc: move L3 master data structure out
Move the L3 master structure out of the static definition to enable
reuse for other SoCs.
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: no change
drivers/bus/omap_l3_noc.h | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index 31984cf..059c707 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -33,6 +33,16 @@
#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0]))
+/**
+ * struct l3_masters_data - L3 Master information
+ * @id:ID of the L3 Master
+ * @name: master name
+ */
+struct l3_masters_data {
+ u32 id;
+ char *name;
+};
+
static u32 l3_flagmux[L3_MODULES] = {
0x500,
0x1000,
@@ -80,10 +90,7 @@ static u32 l3_targ_inst_clk3[] = {
0x0 /* HOST CLK3 */
};
-static struct l3_masters_data {
- u32 id;
- char name[10];
-} l3_masters[] = {
+static struct l3_masters_data l3_masters[] = {
{ 0x0 , MPU},
{ 0x10, CS_ADP},
{ 0x14, xxx},
--
1.7.9.5
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[PATCH V3 08/20] bus: omap_l3_noc: convert target information into a structure
Currently the target instance information is organized indexed by bit
field offset into multiple arrays.
1. We currently have offsets specific to each target associated with each
clock domains are in seperate arrays:
l3_targ_inst_clk1
l3_targ_inst_clk2
l3_targ_inst_clk3
2. Then they are organized per master index in l3_targ.
3. We have names in l3_targ_inst_name as an array to array of strings
corresponding to the above with offsets.
Simplify the same by defining a structure for information containing
both target offset and name. this is then stored in arrays per domain
and organized into an array indexed off domain.
The array is still indexed based on bit field offset.
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: no change
drivers/bus/omap_l3_noc.c |9 ++--
drivers/bus/omap_l3_noc.h | 129 ++---
2 files changed, 54 insertions(+), 84 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index f7d3bf4..343f002 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -57,6 +57,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
void __iomem *base, *l3_targ_base;
void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
char *target_name, *master_name = UN IDENTIFIED;
+ struct l3_target_data *l3_targ_inst;
/* Get the Type of interrupt */
inttype = irq == l3-app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
@@ -74,9 +75,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
if (err_reg) {
/* Identify the source from control status register */
err_src = __ffs(err_reg);
+ l3_targ_inst = l3_targ[i][err_src];
+ target_name = l3_targ_inst-name;
+ l3_targ_base = base + l3_targ_inst-offset;
/* Read the stderrlog_main_source from clk domain */
- l3_targ_base = base + l3_targ[i][err_src];
l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN;
l3_targ_slvofslsb = l3_targ_base +
L3_TARG_STDERRLOG_SLVOFSLSB;
@@ -88,8 +91,6 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
switch (std_err_main CUSTOM_ERROR) {
case STANDARD_ERROR:
- target_name =
- l3_targ_inst_name[i][err_src];
WARN(true, L3 standard error: TARGET:%s at
address 0x%x\n,
target_name,
readl_relaxed(l3_targ_slvofslsb));
@@ -99,8 +100,6 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
break;
case CUSTOM_ERROR:
- target_name =
- l3_targ_inst_name[i][err_src];
for (k = 0; k NUM_OF_L3_MASTERS; k++) {
if (masterid == l3_masters[k].id)
master_name =
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index 059c707..ae28784 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -43,51 +43,62 @@ struct l3_masters_data {
char *name;
};
+/**
+ * struct l3_target_data - L3 Target information
+ * @offset:Offset from base for L3 Target
+ * @name: Target name
+ *
+ * Target information is organized indexed by bit field definitions.
+ */
+struct l3_target_data {
+ u32 offset;
+ char *name;
+};
+
static u32 l3_flagmux[L3_MODULES] = {
0x500,
0x1000,
0X0200
};
-/* L3 Target standard Error register offsets */
-static u32 l3_targ_inst_clk1[] = {
- 0x100, /* DMM1 */
- 0x200, /* DMM2 */
- 0x300, /* ABE */
- 0x400, /* L4CFG */
- 0x600, /* CLK2 PWR DISC */
- 0x0,/* Host CLK1 */
- 0x900 /* L4 Wakeup */
+static struct l3_target_data l3_target_inst_data_clk1[] = {
+ {0x100, DMM1,},
+ {0x200, DMM2,},
+ {0x300, ABE,},
+ {0x400, L4CFG,},
+ {0x600, CLK2PWRDISC,},
+ {0x0, HOSTCLK1,},
+ {0x900, L4WAKEUP,},
};
-static u32 l3_targ_inst_clk2[] = {
- 0x500, /* CORTEX M3 */
- 0x300, /* DSS */
- 0x100, /* GPMC */
- 0x400, /* ISS */
- 0x700, /* IVAHD */
- 0xD00, /* missing in TRM corresponds to AES1*/
- 0x900, /* L4 PER0*/
- 0x200, /* OCMRAM */
- 0x100, /* missing in TRM corresponds to GPMC sERROR*/
- 0x600, /* SGX */
- 0x800, /* SL2 */
- 0x1600, /* C2C */
[PATCH V3 19/20] bus: omap_l3_noc: Add DRA7 interconnect error data
From: Rajendra Nayak rna...@ti.com
DRA7 is distinctly different from OMAP4 in terms of masters and clock
domain organization. There two main clock domains which is divided as
follows:
0x4400 0x100 is clk1 and clk2 is the sub clock domain
0x4500 0x1000 is clk3
Add all the data needed to handle L3 error handling on DRA7 devices
and mark clk2 as subdomain and provide a compatible flag for
functionality. Other than the data difference the hardware blocks
involved are essentially the same.
Signed-off-by: Rajendra Nayak rna...@ti.com
[n...@ti.com: bugfixes and generic improvements, documentation]
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: update based on masterID register information
.../devicetree/bindings/arm/omap/l3-noc.txt|1 +
drivers/bus/omap_l3_noc.c |1 +
drivers/bus/omap_l3_noc.h | 151
3 files changed, 153 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
b/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
index c0105de..45d0fc2 100644
--- a/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
+++ b/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
@@ -6,6 +6,7 @@ provided by Arteris.
Required properties:
- compatible : Should be ti,omap3-l3-smx for OMAP3 family
Should be ti,omap4-l3-noc for OMAP4 family
+ Should be ti,dra7-l3-noc for DRA7 family
- reg: Contains L3 register address range for each noc domain.
- ti,hwmods: l3_main_1, ... One hwmod for each noc domain.
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 0eba07a..6cdd02e 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -230,6 +230,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
static const struct of_device_id l3_noc_match[] = {
{.compatible = ti,omap4-l3-noc, .data = omap_l3_data},
+ {.compatible = ti,dra7-l3-noc, .data = dra_l3_data},
{},
};
MODULE_DEVICE_TABLE(of, l3_noc_match);
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index aced4c5..9562a75 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -230,4 +230,155 @@ static const struct omap_l3 omap_l3_data = {
.mst_addr_mask = 0xFC,
};
+/* DRA7 data */
+static struct l3_target_data dra_l3_target_data_clk1[] = {
+ {0x2a00, AES1,},
+ {0x0200, DMM_P1,},
+ {0x0600, DSP2_SDMA,},
+ {0x0b00, EVE2,},
+ {0x1300, DMM_P2,},
+ {0x2c00, AES2,},
+ {0x0300, DSP1_SDMA,},
+ {0x0a00, EVE1,},
+ {0x0c00, EVE3,},
+ {0x0d00, EVE4,},
+ {0x2900, DSS,},
+ {0x0100, GPMC,},
+ {0x3700, PCIE1,},
+ {0x1600, IVA_CONFIG,},
+ {0x1800, IVA_SL2IF,},
+ {0x0500, L4_CFG,},
+ {0x1d00, L4_WKUP,},
+ {0x3800, PCIE2,},
+ {0x3300, SHA2_1,},
+ {0x1200, GPU,},
+ {0x1000, IPU1,},
+ {0x1100, IPU2,},
+ {0x2000, TPCC_EDMA,},
+ {0x2e00, TPTC1_EDMA,},
+ {0x2b00, TPTC2_EDMA,},
+ {0x0700, VCP1,},
+ {0x2500, L4_PER2_P3,},
+ {0x0e00, L4_PER3_P3,},
+ {0x2200, MMU1,},
+ {0x1400, PRUSS1,},
+ {0x1500, PRUSS2},
+ {0x0800, VCP1,},
+};
+
+static struct l3_flagmux_data dra_l3_flagmux_clk1 = {
+ .offset = 0x803500,
+ .l3_targ = dra_l3_target_data_clk1,
+ .num_targ_data = ARRAY_SIZE(dra_l3_target_data_clk1),
+};
+
+static struct l3_target_data dra_l3_target_data_clk2[] = {
+ {0x0, HOST CLK1,},
+ {0x0, HOST CLK2,},
+ {0xdead, L3_TARGET_NOT_SUPPORTED,},
+ {0x3400, SHA2_2,},
+ {0x0900, BB2D,},
+ {0xdead, L3_TARGET_NOT_SUPPORTED,},
+ {0x2100, L4_PER1_P3,},
+ {0x1c00, L4_PER1_P1,},
+ {0x1f00, L4_PER1_P2,},
+ {0x2300, L4_PER2_P1,},
+ {0x2400, L4_PER2_P2,},
+ {0x2600, L4_PER3_P1,},
+ {0x2700, L4_PER3_P2,},
+ {0x2f00, MCASP1,},
+ {0x3000, MCASP2,},
+ {0x3100, MCASP3,},
+ {0x2800, MMU2,},
+ {0x0f00, OCMC_RAM1,},
+ {0x1700, OCMC_RAM2,},
+ {0x1900, OCMC_RAM3,},
+ {0x1e00, OCMC_ROM,},
+ {0x3900, QSPI,},
+};
+
+static struct l3_flagmux_data dra_l3_flagmux_clk2 = {
+ .offset = 0x803600,
+ .l3_targ = dra_l3_target_data_clk2,
+ .num_targ_data = ARRAY_SIZE(dra_l3_target_data_clk2),
+};
+
+static struct l3_target_data dra_l3_target_data_clk3[] = {
+ {0x0100, L3_INSTR},
+ {0x0300, DEBUGSS_CT_TBR},
+ {0x0,HOST CLK3},
+};
+
+static struct l3_flagmux_data dra_l3_flagmux_clk3 = {
+ .offset = 0x200,
+ .l3_targ = dra_l3_target_data_clk3,
+ .num_targ_data = ARRAY_SIZE(dra_l3_target_data_clk3),
+};
+
+static struct l3_masters_data dra_l3_masters[] = {
+ { 0x0, MPU },
+ { 0x4, CS_DAP },
+
[PATCH V3 02/20] bus: omap_l3_noc: rename functions and data to omap_l3
From: Sricharan R r.sricha...@ti.com
Since omap_l3_noc driver is now being used for OMAP5 and reusable with
DRA7 and AM437x, using omap4 specific naming is misleading.
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
change in V3: none
drivers/bus/omap_l3_noc.c | 24
drivers/bus/omap_l3_noc.h | 11 ++-
2 files changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 1eb6d85..800486c 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -1,5 +1,5 @@
/*
- * OMAP4XXX L3 Interconnect error handling driver
+ * OMAP L3 Interconnect error handling driver
*
* Copyright (C) 2011-2014 Texas Instruments Incorporated - http://www.ti.com/
* Santosh Shilimkar santosh.shilim...@ti.com
@@ -50,7 +50,7 @@
static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
{
- struct omap4_l3 *l3 = _l3;
+ struct omap_l3 *l3 = _l3;
int inttype, i, k;
int err_src = 0;
u32 std_err_main, err_reg, clear, masterid;
@@ -122,9 +122,9 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
return IRQ_HANDLED;
}
-static int omap4_l3_probe(struct platform_device *pdev)
+static int omap_l3_probe(struct platform_device *pdev)
{
- static struct omap4_l3 *l3;
+ static struct omap_l3 *l3;
int ret, i;
l3 = devm_kzalloc(pdev-dev, sizeof(*l3), GFP_KERNEL);
@@ -176,8 +176,8 @@ MODULE_DEVICE_TABLE(of, l3_noc_match);
#define l3_noc_match NULL
#endif
-static struct platform_driver omap4_l3_driver = {
- .probe = omap4_l3_probe,
+static struct platform_driver omap_l3_driver = {
+ .probe = omap_l3_probe,
.driver = {
.name = omap_l3_noc,
.owner = THIS_MODULE,
@@ -185,14 +185,14 @@ static struct platform_driver omap4_l3_driver = {
},
};
-static int __init omap4_l3_init(void)
+static int __init omap_l3_init(void)
{
- return platform_driver_register(omap4_l3_driver);
+ return platform_driver_register(omap_l3_driver);
}
-postcore_initcall_sync(omap4_l3_init);
+postcore_initcall_sync(omap_l3_init);
-static void __exit omap4_l3_exit(void)
+static void __exit omap_l3_exit(void)
{
- platform_driver_unregister(omap4_l3_driver);
+ platform_driver_unregister(omap_l3_driver);
}
-module_exit(omap4_l3_exit);
+module_exit(omap_l3_exit);
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index cc4b1b1..b3c81f2 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -1,5 +1,5 @@
/*
- * OMAP4XXX L3 Interconnect error handling driver header
+ * OMAP L3 Interconnect error handling driver header
*
* Copyright (C) 2011-2014 Texas Instruments Incorporated - http://www.ti.com/
* Santosh Shilimkar santosh.shilim...@ti.com
@@ -14,8 +14,8 @@
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
-#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
+#ifndef __OMAP_L3_NOC_H
+#define __OMAP_L3_NOC_H
#define L3_MODULES 3
#define CLEAR_STDERR_LOG (1 31)
@@ -157,7 +157,7 @@ static u32 *l3_targ[L3_MODULES] = {
l3_targ_inst_clk3,
};
-struct omap4_l3 {
+struct omap_l3 {
struct device *dev;
struct clk *ick;
@@ -167,4 +167,5 @@ struct omap4_l3 {
int debug_irq;
int app_irq;
};
-#endif
+
+#endif /* __OMAP_L3_NOC_H */
--
1.7.9.5
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Re: [PATCH 1/4] mfd: twl4030-power: Add recommended idle configuration
On Mon, 28 Apr 2014, Tony Lindgren wrote: * Lee Jones lee.jo...@linaro.org [140428 04:42]: These settings are based on the Recommended Sleep Sequences for the Zoom Platform pdf at: http://omappedia.com/wiki/File:Recommended_Sleep_Sequences_Zoom.pdf These settings assume most of the regulators are under control of Linux, and cuts off VDD1 and VDD2 during off-idle as Linux cannot do it. Linux does it becuase Linux can't do it. Eh? Heh yeah that's confusing, will update to: These settings assume most of the regulators are under control of Linux, and twl4030 only cuts off VDD1 and VDD2 during off-idle as Linux cannot do it. +1, thanks. -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 16/20] bus: omap_l3_noc: add information about the type of operation
Today we get error such as
L3 Custom Error: MASTER MPU TARGET L4PER2
But since the actual instruction triggerring the error Vs the point
at which we report error may not be aligned, it makes sense to try
and provide additional information - example the type of operation
that was attempted to being performed can help narrow the debug down
further.
This helps provide log such as:
L3 Custom Error: MASTER MPU TARGET L4PER2 (Read)
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: no change
drivers/bus/omap_l3_noc.c |9 -
drivers/bus/omap_l3_noc.h | 13 +
2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 00e4fed..9d021d0 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -60,8 +60,10 @@ static int l3_handle_target(struct omap_l3 *l3, void __iomem
*base,
{
int k;
u32 std_err_main, clear, masterid;
+ u8 op_code;
void __iomem *l3_targ_base;
void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
+ void __iomem *l3_targ_hdr;
struct l3_target_data *l3_targ_inst;
struct l3_masters_data *master;
char *target_name, *master_name = UN IDENTIFIED;
@@ -96,6 +98,7 @@ static int l3_handle_target(struct omap_l3 *l3, void __iomem
*base,
readl_relaxed(l3_targ_slvofslsb));
l3_targ_mstaddr = l3_targ_base + L3_TARG_STDERRLOG_MSTADDR;
+ l3_targ_hdr = l3_targ_base + L3_TARG_STDERRLOG_HDR;
break;
case CUSTOM_ERROR:
@@ -103,6 +106,7 @@ static int l3_handle_target(struct omap_l3 *l3, void
__iomem *base,
l3_targ_mstaddr = l3_targ_base +
L3_TARG_STDERRLOG_CINFO_MSTADDR;
+ l3_targ_hdr = l3_targ_base + L3_TARG_STDERRLOG_CINFO_OPCODE;
break;
default:
@@ -122,11 +126,14 @@ static int l3_handle_target(struct omap_l3 *l3, void
__iomem *base,
}
}
+ op_code = readl_relaxed(l3_targ_hdr) 0x7;
+
WARN(true,
-%s:L3 %s Error: MASTER %s TARGET %s%s\n,
+%s:L3 %s Error: MASTER %s TARGET %s (%s)%s\n,
dev_name(l3-dev),
err_description,
master_name, target_name,
+l3_transaction_type[op_code],
err_string);
/* clear the std error log*/
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index 4e18307..6670fd9 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -29,14 +29,27 @@
/* L3 TARG register offsets */
#define L3_TARG_STDERRLOG_MAIN 0x48
+#define L3_TARG_STDERRLOG_HDR 0x4c
#define L3_TARG_STDERRLOG_MSTADDR 0x50
#define L3_TARG_STDERRLOG_SLVOFSLSB0x5c
#define L3_TARG_STDERRLOG_CINFO_MSTADDR0x68
+#define L3_TARG_STDERRLOG_CINFO_OPCODE 0x6c
#define L3_FLAGMUX_REGERR0 0xc
#define L3_FLAGMUX_MASK0 0x8
#define L3_TARGET_NOT_SUPPORTEDNULL
+static const char * const l3_transaction_type[] = {
+ /* 0 0 0 */ Idle,
+ /* 0 0 1 */ Write,
+ /* 0 1 0 */ Read,
+ /* 0 1 1 */ ReadEx,
+ /* 1 0 0 */ Read Link,
+ /* 1 0 1 */ Write Non-Posted,
+ /* 1 1 0 */ Write Conditional,
+ /* 1 1 1 */ Write Broadcast,
+};
+
/**
* struct l3_masters_data - L3 Master information
* @id:ID of the L3 Master
--
1.7.9.5
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[PATCH V3 12/20] bus: omap_l3_noc: fix masterid detection
As per Documentation (OMAP4+), then masterid is infact encoded as
follows:
L3_TARG_STDERRLOG_MSTADDR[7:0] STDERRLOG_MSTADDR stores the NTTP
master address. The master address is the concatenation of Prefix
Initiator ConnID. It is defined on 8 bits. The 6 MSBs are used to
distinguish the different initiators.
So, when we matchup currently with the master ID list, we never get a
proper match other than when MPU is the master (thanks to 0).
Now, on other platforms such as AM437x, this tends to be bits[5:0].
Fix this by using the relevant 6MSBits to identify the master ID for
standard and custom errors.
Reported-by: Darren Etheridge detheri...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Tested-by: Darren Etheridge detheri...@ti.com
---
V3: made master id information into a structure field thanks to AM437x
information recently recieved.
drivers/bus/omap_l3_noc.c |6 +-
drivers/bus/omap_l3_noc.h |4
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 9524452..8a1926d 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -127,7 +127,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
L3_TARG_STDERRLOG_MSTADDR;
std_err_main = readl_relaxed(l3_targ_stderr);
- masterid = readl_relaxed(l3_targ_mstaddr);
+
+ /* STDERRLOG_MSTADDR Stores the NTTP master address. */
+ masterid = (readl_relaxed(l3_targ_mstaddr)
+ l3-mst_addr_mask)
+ __ffs(l3-mst_addr_mask);
switch (std_err_main CUSTOM_ERROR) {
case STANDARD_ERROR:
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index 64869fe..ba86924 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -84,6 +84,7 @@ struct l3_flagmux_data {
* @l3_masters:array pointing to master data containing name and
register
* offset for the master.
* @num_master: number of masters
+ * @mst_addr_mask: Mask representing MSTADDR information of NTTP packet
* @debug_irq: irq number of the debug interrupt (populated runtime)
* @app_irq: irq number of the application interrupt (populated runtime)
*/
@@ -96,6 +97,7 @@ struct omap_l3 {
struct l3_masters_data *l3_masters;
int num_masters;
+ u32 mst_addr_mask;
int debug_irq;
int app_irq;
@@ -200,6 +202,8 @@ static const struct omap_l3 omap_l3_data = {
.num_modules = ARRAY_SIZE(omap_l3_flagmux),
.l3_masters = omap_l3_masters,
.num_masters = ARRAY_SIZE(omap_l3_masters),
+ /* The 6 MSBs of register field used to distinguish initiator */
+ .mst_addr_mask = 0xFC,
};
#endif /* __OMAP_L3_NOC_H */
--
1.7.9.5
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Re: [PATCH] usb: dwc3: debugfs: add snapshot to dump requests trbs events
On Mon, Apr 28, 2014 at 04:49:23PM -0400, Zhuang Jin Can wrote:
Adds a debugfs file snapshot to dump dwc3 requests, trbs and events.
you need to explain what are you trying to provide to our users here.
What problem are you trying to solve ?
As ep0 requests are more complex than others. It's not included in this
patch.
For ep0, you could at least print the endpoint phase we are currently
in and if we have requests in flight or not.
Signed-off-by: Zhuang Jin Can jin.can.zhu...@intel.com
---
drivers/usb/dwc3/core.h|4 +
drivers/usb/dwc3/debugfs.c | 192
drivers/usb/dwc3/gadget.h | 41 ++
3 files changed, 237 insertions(+)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 57332e3..9d04ddd 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -849,6 +849,10 @@ struct dwc3_event_devt {
u32 type:4;
u32 reserved15_12:4;
u32 event_info:9;
+
+#define DEVT_EVTINFO_SUPERSPEED (1 4)
+#define DEVT_EVTINFO_HIRD(n) (((n) (0xf 5)) 5)
+
u32 reserved31_25:7;
} __packed;
diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c
index 9ac37fe..078d147 100644
--- a/drivers/usb/dwc3/debugfs.c
+++ b/drivers/usb/dwc3/debugfs.c
@@ -618,6 +618,191 @@ static const struct file_operations
dwc3_link_state_fops = {
.release= single_release,
};
+static void dwc3_dump_requests(struct seq_file *s, struct list_head *head,
+ const char *list_name)
+{
+ struct dwc3_request *req;
+
+ if (list_empty(head)) {
+ seq_printf(s, list %s is empty\n, list_name);
+ return;
+ }
+
+ seq_printf(s, list %s:\n, list_name);
+ list_for_each_entry(req, head, list) {
+ struct usb_request *request = req-request;
+
+ seq_printf(s, usb_request@0x%p: buf@0x%p(dma@0x%pad),
len=%d\n,
+ request, request-buf, request-dma,
+ request-length);
+
+ if (req-queued)
+ seq_printf(s, \tstatus=%d: actual=%d; start_slot=%u:
trb@0x%p(dma@0x%pad)\n,
+ request-status, request-actual,
+ req-start_slot, req-trb,
+ req-trb_dma);
+ }
+}
+
+static void dwc3_dump_trbs(struct seq_file *s, struct dwc3_ep *dep)
+{
+ struct dwc3_trb *trb;
+ int i;
+
+ seq_printf(s, busy_slot = %u, free_slot = %u\n,
+ dep-busy_slot DWC3_TRB_MASK,
+ dep-free_slot DWC3_TRB_MASK);
+
+ for (i = 0; i DWC3_TRB_NUM; i++) {
+ trb = dep-trb_pool[i];
+ if (i == (dep-busy_slot DWC3_TRB_MASK)) {
I really dislike these Yoda Conditionals. Fix this up.
+ seq_puts(s, busy_slot--|\n);
+ seq_puts(s,\\\n);
+ }
+ if (i == (dep-free_slot DWC3_TRB_MASK)) {
+ seq_puts(s, free_slot--|\n);
+ seq_puts(s,\\\n);
+ }
+ seq_printf(s, trb[%02d](dma@0x%pad): %08x(bpl), %08x(bph),
%08x(size), %08x(ctrl)\n,
I'm not sure you need to print out the TRB address. bpl, bph, size and
ctrl are desired though.
+ i, dep-trb_pool_dma + i * sizeof(*trb),
+ trb-bpl, trb-bph, trb-size, trb-ctrl);
this will be pretty difficult to parse by a human. I would rather see
you creating one directory per TRB (and also one directory per
endpoint) which holds the details for that entity, so that it looks
like:
dwc3
|-- current_state (or perhaps a better name, but snapshot isn't very good
either)
|-- ep2
| |-- direction
| |-- maxpacket
| |-- number
| |-- state
| |-- stream_capable
| |-- type
| |-- trbs
| | |-- trb0
| | | |-- bph
| | | |-- bpl
| | | |-- ctrl
| | | |-- size
| | |-- trb1
| | | |-- bph
| | | |-- bpl
| | | |-- ctrl
| | | |-- size
| | |-- trb2
| | | |-- bph
| | | |-- bpl
| | | |-- ctrl
| | | |-- size
| | |-- trb3
| | | |-- bph
| | | |-- bpl
| | | |-- ctrl
| | | |-- size
. . .
. . .
. . .
| |-- request0
| | |-- direction
| | |-- mapped
| | |-- queued
| | |-- trb0(symlink to actual trb directory)
| | |-- ep2 (symlink to actual ep2 directory)
| | |-- usbrequest
| | |-- actual
| | |-- length
| | |-- no_interrupt
| | |-- num_mapped_sgs
| | |-- num_sgs
| | |-- short_not_ok
| | |-- status
| | |--
Re: [PATCH v2 3/7] phy: omap-usb2: Use generic clock names wkupclk and refclk
Hi,
On Mon, Apr 28, 2014 at 05:01:23PM +0300, Roger Quadros wrote:
As clocks might be named differently on multiple platforms, use a generic
name in the driver and allow device tree node to specify the platform
specific clock name.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/phy/phy-omap-usb2.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index a2205a8..fb5e515 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -275,16 +275,16 @@ static int omap_usb2_probe(struct platform_device *pdev)
if (IS_ERR(phy_provider))
return PTR_ERR(phy_provider);
- phy-wkupclk = devm_clk_get(phy-dev, usb_phy_cm_clk32k);
+ phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
doesn't this patch cause a regression ? I mean, you're changing the
clock name before fixing DTS. Also, that DTS has been in a major version
of the kernel, so we need to maintain compatibility with it. How about:
phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
if (IS_ERR(phy-wkupclk)) {
dev_err(pdev-dev, unable to get wkupclk, trying old name\n);
phy-wkupclk = devm_clk_get(phy-dev, usb_phy_cm_clk32k);
if (IS_ERR(phy-wkupclk)) {
dev_err(pdev-dev, unable to get
usb_phy_cm_clk32k\n);
return PTR_ERR(phy-wkupclk);
} else {
dev_warn(pdev-dev, found usb_phy_cm_clk32k, please
fix your DTS\n);
}
}
a bit ugly, but at least we don't cause any regressions. Likewise for
other clocks.
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH v2 4/7] ARM: dts: omap4+: Add clocks to USB2 PHY node
On Mon, Apr 28, 2014 at 05:01:24PM +0300, Roger Quadros wrote: The USB2 PHY driver expects named clocks for wakeup clock and reference clock. Provide this information for USB2 PHY nodes in OMAP4 and OMAP5 SoC DTS. Signed-off-by: Roger Quadros rog...@ti.com Reviewed-by: Felipe Balbi ba...@ti.com --- arch/arm/boot/dts/omap4.dtsi | 2 ++ arch/arm/boot/dts/omap5.dtsi | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 649b5cd..f866de9 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -642,6 +642,8 @@ compatible = ti,omap-usb2; reg = 0x4a0ad080 0x58; ctrl-module = omap_control_usb2phy; + clocks = usb_phy_cm_clk32k; + clock-names = wkupclk; #phy-cells = 0; }; }; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index f8c9855..47b714c 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -803,6 +803,8 @@ compatible = ti,omap-usb2; reg = 0x4a084000 0x7c; ctrl-module = omap_control_usb2phy; + clocks = usb_phy_cm_clk32k, usb_otg_ss_refclk960m; + clock-names = wkupclk, refclk; #phy-cells = 0; }; -- 1.8.3.2 -- balbi signature.asc Description: Digital signature
Re: [PATCH v2 5/7] phy: omap-usb2: Add clock names to Documentation binding
On Mon, Apr 28, 2014 at 05:01:25PM +0300, Roger Quadros wrote:
Add wkupclk and refclk information to DT binding information.
Signed-off-by: Roger Quadros rog...@ti.com
Reviewed-by: Felipe Balbi ba...@ti.com
---
Documentation/devicetree/bindings/phy/ti-phy.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 788fb0f..9ce458f 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -32,6 +32,11 @@ Required properties:
- reg : Address and length of the register set for the device.
- #phy-cells: determine the number of cells that should be given in the
phandle while referencing this phy.
+ - clocks: a list of phandles and clock-specifier pairs, one for each entry
in
+ clock-names.
+ - clock-names: should include:
+ * wkupclk - wakeup clock.
+ * refclk - reference clock (optional).
Optional properties:
- ctrl-module : phandle of the control module used by PHY driver to power on
@@ -44,6 +49,8 @@ usb2phy@4a0ad080 {
reg = 0x4a0ad080 0x58;
ctrl-module = omap_control_usb;
#phy-cells = 0;
+ clocks = usb_phy_cm_clk32k, usb_otg_ss_refclk960m;
+ clock-names = wkupclk, refclk;
};
TI PIPE3 PHY
--
1.8.3.2
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH v2 6/7] ARM: dts: dra7: Add USB related nodes
On Mon, Apr 28, 2014 at 05:01:26PM +0300, Roger Quadros wrote:
Add nodes for the Super Speed USB controllers, omap-control-usb,
USB2 PHY and USB3 PHY devices.
Remove ocp2scp1 address space from hwmod data as it is
now provided via device tree.
Signed-off-by: Roger Quadros rog...@ti.com
Reviewed-by: Felipe Balbi ba...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 149
++
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 10 --
2 files changed, 149 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 149b550..4535e54 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -789,6 +789,155 @@
dma-names = tx0, rx0;
status = disabled;
};
+
+ omap_control_usb2phy1: control-phy@4a002300 {
+ compatible = ti,control-phy-usb2;
+ reg = 0x4a002300 0x4;
+ reg-names = power;
+ };
+
+ omap_control_usb3phy1: control-phy@4a002370 {
+ compatible = ti,control-phy-pipe3;
+ reg = 0x4a002370 0x4;
+ reg-names = power;
+ };
+
+ omap_control_usb2phy2: control-phy@0x4a002e74 {
+ compatible = ti,control-phy-usb2-dra7;
+ reg = 0x4a002e74 0x4;
+ reg-names = power;
+ };
+
+ /* OCP2SCP1 */
+ ocp2scp@4a08 {
+ compatible = ti,omap-ocp2scp;
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+ reg = 0x4a08 0x20;
+ ti,hwmods = ocp2scp1;
+
+ usb2_phy1: phy@4a084000 {
+ compatible = ti,omap-usb2;
+ reg = 0x4a084000 0x400;
+ ctrl-module = omap_control_usb2phy1;
+ clocks = usb_phy1_always_on_clk32k,
+ usb_otg_ss1_refclk960m;
+ clock-names = wkupclk,
+ refclk;
+ #phy-cells = 0;
+ };
+
+ usb2_phy2: phy@4a085000 {
+ compatible = ti,omap-usb2;
+ reg = 0x4a085000 0x400;
+ ctrl-module = omap_control_usb2phy2;
+ clocks = usb_phy2_always_on_clk32k,
+ usb_otg_ss2_refclk960m;
+ clock-names = wkupclk,
+ refclk;
+ #phy-cells = 0;
+ };
+
+ usb3_phy1: phy@4a084400 {
+ compatible = ti,omap-usb3;
+ reg = 0x4a084400 0x80,
+ 0x4a084800 0x64,
+ 0x4a084c00 0x40;
+ reg-names = phy_rx, phy_tx, pll_ctrl;
+ ctrl-module = omap_control_usb3phy1;
+ clocks = usb_phy3_always_on_clk32k,
+ sys_clkin1,
+ usb_otg_ss1_refclk960m;
+ clock-names = wkupclk,
+ sysclk,
+ refclk;
+ #phy-cells = 0;
+ };
+ };
+
+ omap_dwc3_1@4888 {
+ compatible = ti,dwc3;
+ ti,hwmods = usb_otg_ss1;
+ reg = 0x4888 0x1;
+ interrupts = 0 77 4;
+ #address-cells = 1;
+ #size-cells = 1;
+ utmi-mode = 2;
+ ranges;
+ usb1: usb@4889 {
+ compatible = snps,dwc3;
+ reg = 0x4889 0x17000;
+ interrupts = 0 76 4;
+ phys = usb2_phy1, usb3_phy1;
+ phy-names = usb2-phy, usb3-phy;
+ tx-fifo-resize;
+ maximum-speed = super-speed;
+ dr_mode = otg;
+ };
+ };
+
+ omap_dwc3_2@488c {
+ compatible = ti,dwc3;
+ ti,hwmods = usb_otg_ss2;
+ reg = 0x488c 0x1;
+ interrupts = 0 92 4;
+ #address-cells = 1;
+
Re: [PATCH v2 7/7] dts: dra7-evm: add USB support
On Mon, Apr 28, 2014 at 05:01:27PM +0300, Roger Quadros wrote:
Add USB pinmux information and USB modes
for the USB controllers.
Signed-off-by: Roger Quadros rog...@ti.com
Reviewed-by: Felipe Balbi ba...@ti.com
---
arch/arm/boot/dts/dra7-evm.dts | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 5babba0..1d77815 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -93,6 +93,18 @@
0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
;
};
+
+ usb1_pins: pinmux_usb1_pins {
+pinctrl-single,pins =
+ 0x280 0xc /* usb1_drvvbus, SLOW_SLEW | PULLUPEN |
MODE0 */
+;
+};
+
+ usb2_pins: pinmux_usb2_pins {
+pinctrl-single,pins =
+ 0x284 0xc /* usb2_drvvbus, SLOW_SLEW | PULLUPEN |
MODE0 */
+;
+};
};
i2c1 {
@@ -273,3 +285,15 @@
cpu0 {
cpu0-supply = smps123_reg;
};
+
+usb1 {
+ dr_mode = peripheral;
+ pinctrl-names = default;
+ pinctrl-0 = usb1_pins;
+};
+
+usb2 {
+ dr_mode = host;
+ pinctrl-names = default;
+ pinctrl-0 = usb2_pins;
+};
--
1.8.3.2
--
balbi
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Description: Digital signature
Re: [PATCH 1a/4] mfd: twl4030-power: Add generic reset configuration
* Lee Jones lee.jo...@linaro.org [140428 04:37]:
The twl4030 PMIC needs to be configured properly for things like
warm reset and deeper idle states so the PMIC manages the regulators
properly based on the hardware triggers from the SoC.
For example, when rebooting an OMAP3530 at 125 MHz, it hangs.
With this patch, TWL4030 will be reset when a warm reset occures.
This way the OMAP3530 does not hang on reboot.
Let's use this as the default when compatible = ti,twl4030-power.
Other more complicated configurations can be added to the driver
based on other compatible flags.
Based on earlier patch by Matthias Brugger matthias@gmail.com:
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/144161.html
For more information about twl4030 configuration for the
power scripts see:
http://www.omappedia.com/wiki/TWL4030_power_scripts
Cc: Matthias Brugger matthias@gmail.com
Cc: Robert Nelson robertcnel...@gmail.com
Cc: Peter De Schrijver pdeschrij...@nvidia.com
Cc: Samuel Ortiz sa...@linux.intel.com
Cc: Lee Jones lee.jo...@linaro.org
Signed-off-by: Tony Lindgren t...@atomide.com
---
Sorry this got accidentally left out, should be the first patch
in the series.
diff --git a/Documentation/devicetree/bindings/mfd/twl4030-power.txt
b/Documentation/devicetree/bindings/mfd/twl4030-power.txt
index 8e15ec3..b906116 100644
--- a/Documentation/devicetree/bindings/mfd/twl4030-power.txt
+++ b/Documentation/devicetree/bindings/mfd/twl4030-power.txt
@@ -5,7 +5,12 @@ to control the power resources, including power scripts.
For now, the
binding only supports the complete shutdown of the system after poweroff.
Required properties:
-- compatible : must be ti,twl4030-power
+- compatible : must be one of the following
+ ti,twl4030-power
+ ti,twl4030-power-reset
+
I think it'll be sensible to wait for a DT Ack for this kind of
change.
Sure. This could also be board specific, for example something like
ti,twl4030-power-n900, ti,twl4030-power-panda-es and so on. But
I think we can get away with just a few generic configurations.
+#ifdef CONFIG_OF
+
+/* Generic warm reset configuration for omap3 */
+
+static struct twl4030_ins omap3_wrst_seq[] = {
+ { MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2 },
+ { MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_WRST), 15 },
+ { MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_WRST), 15 },
+ { MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_WRST), 0x60 },
+ { MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2 },
+ { MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_ACTIVE), 2 },
+};
Nit: I'd prefer the number formatting to be unified here i.e. all in
the same base, all 0x10 with leading zero.
Thanks will check those.
+static struct twl4030_script omap3_wrst_script = {
+ .script = omap3_wrst_seq,
+ .size = ARRAY_SIZE(omap3_wrst_seq),
+ .flags = TWL4030_WRST_SCRIPT,
+};
+
+static struct twl4030_script *omap3_reset_scripts[] = {
+ omap3_wrst_script,
+};
+
+static struct twl4030_resconfig omap3_rconfig[] = {
+ { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, .type = -1,
+ .type2 = -1 },
+ { .resource = RES_VDD1, .devgroup = DEV_GRP_P1, .type = -1,
+ .type2 = -1 },
+ { .resource = RES_VDD2, .devgroup = DEV_GRP_P1, .type = -1,
+ .type2 = -1 },
+ { 0, 0},
+};
Nit: May be just my OCD, but this looks a little messy. Perhaps a
simple MACRO might tidy things up, although that seems a little
over-kill for such a small sturct[]. At the very least least please
even up the brackets in the sentinel.
Yeah I was thinking about that too, but from configuring things
point of view it's essential to see what each entry is doing.
Having a macro with lots of parameters would make it a bit hard
to read the actual configuration. The macro would be something
like for the above:
RCONFIG(RES_HFCLKOUT, DEV_GRP_P3, -1, -1, 0, 0);
RCONFIG(RES_VDD1, DEV_GRP_P1, -1, -1, 0, 0);
RCONFIG(RES_VDD2, DEV_GRP_P1, -1, -1, 0, 0);
and something like this for other entries:
RCONFIG(RES_VAUX1, DEV_GRP_NULL, 0, 0, TWL_REMAP_OFF, TWL_REMAP_SLEEP);
Personally I think it actually makes it harder to figure out what
is getting configured for the twl4030 as then it does not relate
to the documentation any longer, but I'm fine doing that if people
prefer macros here. Using macros could also be done later without
as it's all private to the driver.
/me goes to organise his soup tins into alphabetical order.
I think using macros is a good comment, I always found the twl4030
configuration confusing. So if anybody has good macro ideas, I'm
open to it for sure. In this it's more like adding custom labels
to soup tins about their list of ingredients instead of sorting
the tins :) And it does not make the contents taste much better..
Regards,
Tony
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