Re: [PATCH v2 3/3] ARM: BCM5301X: remove workaround imprecise abort fault handler

2015-11-24 Thread Florian Fainelli 
On 15/10/15 03:32, Lucas Stach wrote:
> This is not needed anymore. Handling a potentially pending imprecise external
> abort left behind by the bootloader is now done in a slightly safer way inside
> the common ARM startup code.
> 
> Signed-off-by: Lucas Stach 
> Acked-by: Hauke Mehrtens 

Applied to soc/next, thanks!
-- 
Florian
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Re: [PATCHv2] drivers: mtd: spinand: Add generic spinand frameowrk.

2013-07-04 Thread Florian Fainelli 
Hello,

Le jeudi 4 juillet 2013 10:13:43 Sourav Poddar a écrit :
  
  Can this somehow be made a runtime thing?
 
 Ahh..I think we might opt for a device tree entry and based on that
 check for ECC.

Ok, sounds good too.

 
  [snip]
  
  +   if (count  oob_num  ops-oobbuf  chip-oobbuf) {
  +   int size;
  +   int offset, len, temp;
  +
  +   /* repack spare to oob */
  +   memset(chip-oobbuf, 0,
  info-ecclayout-oobavail);
  +
  +   temp = 0;
  +   offset = info-ecclayout-oobfree[0].offset;
  +   len = info-ecclayout-oobfree[0].length;
  +   memcpy(chip-oobbuf + temp,
  +   chip-buf + info-page_main_size +
  offset, len); 
  Sounds like a for look might be useful here
 
 I dont think so, there is a while loop above under which it happens.
 We are increasing count at the bottom of the while loop. So, I think
 this should work fine.

What I meant here, is that you could use a for loop to repeat 4 times the same 
following pattern, such that it becomes:

for (j = 0; j  4; j++0 {
temp += len;
offset = info-ecclayout-oobfree[j].offset;
len = info-ecclayout-oobfree[j].length;
memcpy(chip-oobbuf + temp,
chip-buf + info-page_main_size + offset, len);
}

Or even make it a helper function which is inlined if that is deemed more 
elegant.
-- 
Florian
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Re: [PATCHv2] drivers: mtd: spinand: Add generic spinand frameowrk.

2013-07-03 Thread Florian Fainelli 
Hello,

2013/7/3 Sourav Poddar sourav.pod...@ti.com:
 From: Mona Anonuevo manonu...@micron.com

 This patch adds support for a generic spinand framework(spinand_mtd.c).
 This frameowrk can be used for other spi based flash devices. The idea
 is to have a common model under drivers/mtd, as also present for other non spi
 devices(there is a generic framework and device part simply attaches itself 
 to it.)

Resending my comments since your previous submissino


 Signed-off-by: Mona Anonuevo manonu...@micron.com
 Signed-off-by: Tuan Nguyen tqngu...@micron.com
 Signed-off-by: Sourav Poddar sourav.pod...@ti.com
 


[snip]

 +if MTD_SPINAND
 +
 +config MTD_SPINAND_ONDIEECC
 +   bool Use SPINAND internal ECC
 +   help
 +Internel ECC
 +
 +config MTD_SPINAND_SWECC
 +   bool Use software ECC
 +   depends on MTD_NAND
 +   help
 +software ECC

Can this somehow be made a runtime thing?

[snip]

 +   if (count  oob_num  ops-oobbuf  chip-oobbuf) {
 +   int size;
 +   int offset, len, temp;
 +
 +   /* repack spare to oob */
 +   memset(chip-oobbuf, 0, info-ecclayout-oobavail);
 +
 +   temp = 0;
 +   offset = info-ecclayout-oobfree[0].offset;
 +   len = info-ecclayout-oobfree[0].length;
 +   memcpy(chip-oobbuf + temp,
 +   chip-buf + info-page_main_size + offset, 
 len);

Sounds like a for look might be useful here

 +
 +   temp += len;
 +   offset = info-ecclayout-oobfree[1].offset;
 +   len = info-ecclayout-oobfree[1].length;
 +   memcpy(chip-oobbuf + temp,
 +   chip-buf + info-page_main_size + offset, 
 len);
 +
 +   temp += len;
 +   offset = info-ecclayout-oobfree[2].offset;
 +   len = info-ecclayout-oobfree[2].length;
 +   memcpy(chip-oobbuf + temp,
 +   chip-buf + info-page_main_size + offset, 
 len);
 +
 +   temp += len;
 +   offset = info-ecclayout-oobfree[3].offset;
 +   len = info-ecclayout-oobfree[3].length;
 +   memcpy(chip-oobbuf + temp,
 +   chip-buf + info-page_main_size + offset, 
 len);
 +

[snip]

 +   /* repack oob to spare */
 +   temp = 0;
 +   offset = info-ecclayout-oobfree[0].offset;
 +   len = info-ecclayout-oobfree[0].length;
 +   memcpy(chip-buf + info-page_main_size + offset,
 +   chip-oobbuf + temp, len);

And here too.

 +
 +   temp += len;
 +   offset = info-ecclayout-oobfree[1].offset;
 +   len = info-ecclayout-oobfree[1].length;
 +   memcpy(chip-buf + info-page_main_size + offset,
 +   chip-oobbuf + temp, len);
 +
 +   temp += len;
 +   offset = info-ecclayout-oobfree[2].offset;
 +   len = info-ecclayout-oobfree[2].length;
 +   memcpy(chip-buf + info-page_main_size + offset,
 +   chip-oobbuf + temp, len);
 +
 +   temp += len;
 +   offset = info-ecclayout-oobfree[3].offset;
 +   len = info-ecclayout-oobfree[3].length;
 +   memcpy(chip-buf + info-page_main_size + offset,
 +   chip-oobbuf + temp, len);
 +   }

[snip]

 +++ b/include/linux/mtd/spinand.h
 @@ -0,0 +1,155 @@
 +/*
 + *  linux/include/linux/mtd/spinand.h
 + *  Copyright (c) 2009-2010 Micron Technology, Inc.
 + *  This software is licensed under the terms of the GNU General Public
 + *  License version 2, as published by the Free Software Foundation, and
 + *  may be copied, distributed, and modified under those terms.
 +
 + *  This program is distributed in the hope that it will be useful,
 + *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 + *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + *  GNU General Public License for more details.
 +/bin/bash: 4: command not found
 + *
 + *  based on nand.h
 + */
 +#ifndef __LINUX_MTD_SPI_NAND_H
 +#define __LINUX_MTD_SPI_NAND_H
 +
 +#include linux/wait.h
 +#include linux/spinlock.h
 +#include linux/mtd/mtd.h
 +
 +/* cmd */
 +#define CMD_READ   0x13
 +#define CMD_READ_RDM   0x03
 +#define CMD_PROG_PAGE_CLRCACHE 0x02
 +#define CMD_PROG_PAGE  0x84
 +#define CMD_PROG_PAGE_EXC  0x10
 +#define CMD_ERASE_BLK  0xd8
 +#define

Re: [PATCH 1/3] drivers: mtd: spinand: Add generic spinand frameowrk and micron driver.

2013-06-26 Thread Florian Fainelli 
Hello,

2013/6/26 Sourav Poddar sourav.pod...@ti.com:
 From: Mona Anonuevo manonu...@micron.com

 This patch adds support for a generic spinand framework(spinand_mtd.c).
 This frameowrk can be used for other spi based flash devices also. The idea
 is to have a common model under drivers/mtd, as also present for other no spi
 devices(there is a generic framework and device part simply attaches itself 
 to it.)

 The generic frework will be used later by me for a SPI based spansion 
 S25FL256 device.
 The patch also contains a micron driver attaching itself to generic framework.

Some general comments below, I do not have any SPI NAND devices, just
reading through the code.

 +
 +config MTD_SPINAND_ONDIEECC
 +   bool Use SPINAND internal ECC
 +   help
 +Internel ECC
 +
 +config MTD_SPINAND_SWECC
 +   bool Use software ECC
 +   depends on MTD_NAND
 +   help
 +software ECC

Cannot both of these be somehow detected by the identification bytes?
Or maybe explicitely specified in an identification table?

 +#define mu_spi_nand_driver_version Beagle-MTD_01.00_Linux2.6.33_20100507

You probably want to remove this.

 +#define SPI_NAND_MICRON_DRIVER_KEY 0x1233567

Ditto.

 +
 +//
 +
 +/**
 +   OOB area specification layout:  Total 32 available free bytes.
 +*/
 +static struct nand_ecclayout spinand_oob_64 = {
 +   .eccbytes = 24,
 +   .eccpos = {
 +  1, 2, 3, 4, 5, 6,
 +  17, 18, 19, 20, 21, 22,
 +  33, 34, 35, 36, 37, 38,
 +  49, 50, 51, 52, 53, 54, },
 +   .oobavail = 32,
 +   .oobfree = {
 +   {.offset = 8,
 +.length = 8},
 +   {.offset = 24,
 +.length = 8},
 +   {.offset = 40,
 +.length = 8},
 +   {.offset = 56,
 +.length = 8}, }
 +};

This should probably be per-device, or at best supplied by platform data?

 +/**
 + * spinand_cmd - to process a command to send to the SPI Nand
 + *
 + * Description:
 + *Set up the command buffer to send to the SPI controller.
 + *The command buffer has to initized to 0
 + */
 +int spinand_cmd(struct spi_device *spi, struct spinand_cmd *cmd)
 +{
 +   int ret;
 +   struct spi_message  message;
 +   struct spi_transfer x[4];
 +   u8 dummy = 0xff;
 +
 +   spi_message_init(message);
 +   memset(x, 0, sizeof(x));
 +
 +   x[0].len = 1;
 +   x[0].tx_buf = cmd-cmd;
 +   spi_message_add_tail(x[0], message);
 +
 +   if (cmd-n_addr) {
 +   x[1].len = cmd-n_addr;
 +   x[1].tx_buf = cmd-addr;
 +   spi_message_add_tail(x[1], message);
 +   }
 +
 +   if (cmd-n_dummy) {
 +   x[2].len = cmd-n_dummy;
 +   x[2].tx_buf = dummy;
 +   spi_message_add_tail(x[2], message);
 +   }
 +
 +   if (cmd-n_tx) {
 +   x[3].len = cmd-n_tx;
 +   x[3].tx_buf = cmd-tx_buf;
 +   spi_message_add_tail(x[3], message);
 +   }
 +
 +   if (cmd-n_rx) {
 +   x[3].len = cmd-n_rx;
 +   x[3].rx_buf = cmd-rx_buf;
 +   spi_message_add_tail(x[3], message);
 +   }
 +
 +   ret = spi_sync(spi, message);

If any kind of locking is implicitely done by the SPI layer, you might
want to add a comment to specify it.

[snip]

 +   retval = spinand_cmd(spi_nand, cmd);
 +
 +   if (retval != 0) {
 +   dev_err(spi_nand-dev, error %d reading id\n,
 +   (int) retval);
 +   return retval;
 +   }

Just:

if (retval)
  dev_err(spi_nand-dev, ...

return retval

[snip]

 +   retval = spinand_cmd(spi_nand, cmd);
 +
 +   if (retval != 0) {
 +   dev_err(spi_nand-dev, error %d lock block\n,
 +   (int) retval);
 +   return retval;
 +   }

Same here

[snip]

 +   if (retval != 0) {
 +   dev_err(spi_nand-dev, error %d reading status register\n,
 +   (int) retval);
 +   return retval;
 +   }

And here

[snip]

 +   if (retval != 0) {
 +   dev_err(spi_nand-dev, error %d get otp\n,
 +   (int) retval);
 +   return retval;
 +   }

And here

[snip]

 +   if (retval != 0) {
 +   dev_err(spi_nand-dev, error %d set otp\n,
 +   (int) retval);
 +   return retval;

And here

[snip]

 +*/
 +#ifdef CONFIG_MTD_SPINAND_ONDIEECC

Same comment as above, you could probably do not make this enclosed
within an ifdef, but always compile it and test for a device flag for
instance.

 +static int spinand_enable_ecc(struct spi_device *spi_nand,
 +   struct spinand_info *info)
 +{
 +   ssize_t

[PATCH 15/32 v3] USB: ohci: merge ohci_finish_controller_resume with ohci_resume

2012-10-08 Thread Florian Fainelli 
Merge ohci_finish_controller_resume with ohci_resume as suggested by Alan
Stern. Since ohci_finish_controller_resume no longer exists, update the
various OHCI drivers to call ohci_resume() instead. Some drivers used to set
themselves the bit HCD_FLAG_HW_ACCESSIBLE, which is now handled by
ohci_resume().

Acked-by: Jingoo Han jg1@samsung.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
Signed-off-by: Florian Fainelli flor...@openwrt.org
---
Changes in v3:
- rebased against greg's latest usb-next

Changes in v2:
- added Nicolas and Jingoo's Acked-by

 drivers/usb/host/ohci-at91.c |2 +-
 drivers/usb/host/ohci-ep93xx.c   |2 +-
 drivers/usb/host/ohci-exynos.c   |5 +
 drivers/usb/host/ohci-hcd.c  |   41 +++--
 drivers/usb/host/ohci-hub.c  |   42 --
 drivers/usb/host/ohci-omap.c |2 +-
 drivers/usb/host/ohci-platform.c |2 +-
 drivers/usb/host/ohci-pxa27x.c   |2 +-
 drivers/usb/host/ohci-s3c2410.c  |3 +--
 drivers/usb/host/ohci-spear.c|2 +-
 drivers/usb/host/ohci-tmio.c |2 +-
 11 files changed, 48 insertions(+), 57 deletions(-)

diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 0bf72f9..908d84a 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -705,7 +705,7 @@ static int ohci_hcd_at91_drv_resume(struct platform_device 
*pdev)
if (!clocked)
at91_start_clock();
 
-   ohci_finish_controller_resume(hcd);
+   ohci_resume(hcd, false);
return 0;
 }
 #else
diff --git a/drivers/usb/host/ohci-ep93xx.c b/drivers/usb/host/ohci-ep93xx.c
index dbfbd1d..a982f04 100644
--- a/drivers/usb/host/ohci-ep93xx.c
+++ b/drivers/usb/host/ohci-ep93xx.c
@@ -194,7 +194,7 @@ static int ohci_hcd_ep93xx_drv_resume(struct 
platform_device *pdev)
 
ep93xx_start_hc(pdev-dev);
 
-   ohci_finish_controller_resume(hcd);
+   ohci_resume(hcd, false);
return 0;
 }
 #endif
diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c
index 20a5008..929a494 100644
--- a/drivers/usb/host/ohci-exynos.c
+++ b/drivers/usb/host/ohci-exynos.c
@@ -252,10 +252,7 @@ static int exynos_ohci_resume(struct device *dev)
if (pdata  pdata-phy_init)
pdata-phy_init(pdev, S5P_USB_PHY_HOST);
 
-   /* Mark hardware accessible again as we are out of D3 state by now */
-   set_bit(HCD_FLAG_HW_ACCESSIBLE, hcd-flags);
-
-   ohci_finish_controller_resume(hcd);
+   ohci_resume(hcd, false);
 
return 0;
 }
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 31a4616..8e17f17 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1007,13 +1007,50 @@ static int __maybe_unused ohci_suspend(struct usb_hcd 
*hcd, bool do_wakeup)
 
 static int __maybe_unused ohci_resume(struct usb_hcd *hcd, bool hibernated)
 {
+   struct ohci_hcd *ohci = hcd_to_ohci(hcd);
+   int port;
+   boolneed_reinit = false;
+
set_bit(HCD_FLAG_HW_ACCESSIBLE, hcd-flags);
 
/* Make sure resume from hibernation re-enumerates everything */
if (hibernated)
-   ohci_usb_reset(hcd_to_ohci(hcd));
+   ohci_usb_reset(ohci);
+
+   /* See if the controller is already running or has been reset */
+   ohci-hc_control = ohci_readl(ohci, ohci-regs-control);
+   if (ohci-hc_control  (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
+   need_reinit = true;
+   } else {
+   switch (ohci-hc_control  OHCI_CTRL_HCFS) {
+   case OHCI_USB_OPER:
+   case OHCI_USB_RESET:
+   need_reinit = true;
+   }
+   }
+
+   /* If needed, reinitialize and suspend the root hub */
+   if (need_reinit) {
+   spin_lock_irq(ohci-lock);
+   ohci_rh_resume(ohci);
+   ohci_rh_suspend(ohci, 0);
+   spin_unlock_irq(ohci-lock);
+   }
+
+   /* Normally just turn on port power and enable interrupts */
+   else {
+   ohci_dbg(ohci, powerup ports\n);
+   for (port = 0; port  ohci-num_ports; port++)
+   ohci_writel(ohci, RH_PS_PPS,
+   ohci-regs-roothub.portstatus[port]);
+
+   ohci_writel(ohci, OHCI_INTR_MIE, ohci-regs-intrenable);
+   ohci_readl(ohci, ohci-regs-intrenable);
+   msleep(20);
+   }
+
+   usb_hcd_resume_root_hub(hcd);
 
-   ohci_finish_controller_resume(hcd);
return 0;
 }
 
diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c
index 2f3619e..db09dae 100644
--- a/drivers/usb/host/ohci-hub.c
+++ b/drivers/usb/host/ohci-hub.c
@@ -316,48 +316,6 @@ static int ohci_bus_resume (struct usb_hcd *hcd)
return rc;
 }
 
-/* Carry out the final steps of resuming the controller device

[PATCH 15/32 v2] USB: ohci: merge ohci_finish_controller_resume with ohci_resume

2012-10-05 Thread Florian Fainelli 
Merge ohci_finish_controller_resume with ohci_resume as suggested by Alan
Stern. Since ohci_finish_controller_resume no longer exists, update the
various OHCI drivers to call ohci_resume() instead. Some drivers used to set
themselves the bit HCD_FLAG_HW_ACCESSIBLE, which is now handled by
ohci_resume().

Acked-by: Jingoo Han jg1@samsung.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
Signed-off-by: Florian Fainelli flor...@openwrt.org
---
Changes since v1:
- added Nicolas and Jingoo's Acked-by

 drivers/usb/host/ohci-at91.c |2 +-
 drivers/usb/host/ohci-ep93xx.c   |2 +-
 drivers/usb/host/ohci-exynos.c   |5 +
 drivers/usb/host/ohci-hcd.c  |   41 +++--
 drivers/usb/host/ohci-hub.c  |   42 --
 drivers/usb/host/ohci-omap.c |2 +-
 drivers/usb/host/ohci-platform.c |2 +-
 drivers/usb/host/ohci-pxa27x.c   |2 +-
 drivers/usb/host/ohci-s3c2410.c  |3 +--
 drivers/usb/host/ohci-spear.c|2 +-
 drivers/usb/host/ohci-tmio.c |2 +-
 11 files changed, 48 insertions(+), 57 deletions(-)

diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 0bf72f9..908d84a 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -705,7 +705,7 @@ static int ohci_hcd_at91_drv_resume(struct platform_device 
*pdev)
if (!clocked)
at91_start_clock();
 
-   ohci_finish_controller_resume(hcd);
+   ohci_resume(hcd, false);
return 0;
 }
 #else
diff --git a/drivers/usb/host/ohci-ep93xx.c b/drivers/usb/host/ohci-ep93xx.c
index dbfbd1d..a982f04 100644
--- a/drivers/usb/host/ohci-ep93xx.c
+++ b/drivers/usb/host/ohci-ep93xx.c
@@ -194,7 +194,7 @@ static int ohci_hcd_ep93xx_drv_resume(struct 
platform_device *pdev)
 
ep93xx_start_hc(pdev-dev);
 
-   ohci_finish_controller_resume(hcd);
+   ohci_resume(hcd, false);
return 0;
 }
 #endif
diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c
index fc3091b..53c5a989 100644
--- a/drivers/usb/host/ohci-exynos.c
+++ b/drivers/usb/host/ohci-exynos.c
@@ -252,10 +252,7 @@ static int exynos_ohci_resume(struct device *dev)
if (pdata  pdata-phy_init)
pdata-phy_init(pdev, S5P_USB_PHY_HOST);
 
-   /* Mark hardware accessible again as we are out of D3 state by now */
-   set_bit(HCD_FLAG_HW_ACCESSIBLE, hcd-flags);
-
-   ohci_finish_controller_resume(hcd);
+   ohci_resume(hcd, false);
 
return 0;
 }
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index acf8c83..d97dc48 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1005,13 +1005,50 @@ static int __maybe_unused ohci_suspend(struct usb_hcd 
*hcd, bool do_wakeup)
 
 static int __maybe_unused ohci_resume(struct usb_hcd *hcd, bool hibernated)
 {
+   struct ohci_hcd *ohci = hcd_to_ohci(hcd);
+   int port;
+   boolneed_reinit = false;
+
set_bit(HCD_FLAG_HW_ACCESSIBLE, hcd-flags);
 
/* Make sure resume from hibernation re-enumerates everything */
if (hibernated)
-   ohci_usb_reset(hcd_to_ohci(hcd));
+   ohci_usb_reset(ohci);
+
+   /* See if the controller is already running or has been reset */
+   ohci-hc_control = ohci_readl(ohci, ohci-regs-control);
+   if (ohci-hc_control  (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
+   need_reinit = true;
+   } else {
+   switch (ohci-hc_control  OHCI_CTRL_HCFS) {
+   case OHCI_USB_OPER:
+   case OHCI_USB_RESET:
+   need_reinit = true;
+   }
+   }
+
+   /* If needed, reinitialize and suspend the root hub */
+   if (need_reinit) {
+   spin_lock_irq(ohci-lock);
+   ohci_rh_resume(ohci);
+   ohci_rh_suspend(ohci, 0);
+   spin_unlock_irq(ohci-lock);
+   }
+
+   /* Normally just turn on port power and enable interrupts */
+   else {
+   ohci_dbg(ohci, powerup ports\n);
+   for (port = 0; port  ohci-num_ports; port++)
+   ohci_writel(ohci, RH_PS_PPS,
+   ohci-regs-roothub.portstatus[port]);
+
+   ohci_writel(ohci, OHCI_INTR_MIE, ohci-regs-intrenable);
+   ohci_readl(ohci, ohci-regs-intrenable);
+   msleep(20);
+   }
+
+   usb_hcd_resume_root_hub(hcd);
 
-   ohci_finish_controller_resume(hcd);
return 0;
 }
 
diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c
index 2f3619e..db09dae 100644
--- a/drivers/usb/host/ohci-hub.c
+++ b/drivers/usb/host/ohci-hub.c
@@ -316,48 +316,6 @@ static int ohci_bus_resume (struct usb_hcd *hcd)
return rc;
 }
 
-/* Carry out the final steps of resuming the controller device */
-static void __maybe_unused

[PATCH 14/24] USB: ohci: merge ohci_finish_controller_resume with ohci_resume

2012-10-04 Thread Florian Fainelli 
Merge ohci_finish_controller_resume with ohci_resume as suggested by Alan
Stern. Since ohci_finish_controller_resume no longer exists, update the
various OHCI drivers to call ohci_resume() instead. Some drivers used to set
themselves the bit HCD_FLAG_HW_ACCESSIBLE, which is now handled by
ohci_resume().

Signed-off-by: Florian Fainelli flor...@openwrt.org
---
 drivers/usb/host/ohci-at91.c |2 +-
 drivers/usb/host/ohci-ep93xx.c   |2 +-
 drivers/usb/host/ohci-exynos.c   |5 +
 drivers/usb/host/ohci-hcd.c  |   41 +++--
 drivers/usb/host/ohci-hub.c  |   42 --
 drivers/usb/host/ohci-omap.c |2 +-
 drivers/usb/host/ohci-platform.c |2 +-
 drivers/usb/host/ohci-pxa27x.c   |2 +-
 drivers/usb/host/ohci-s3c2410.c  |3 +--
 drivers/usb/host/ohci-spear.c|2 +-
 drivers/usb/host/ohci-tmio.c |2 +-
 11 files changed, 48 insertions(+), 57 deletions(-)

diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 0bf72f9..908d84a 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -705,7 +705,7 @@ static int ohci_hcd_at91_drv_resume(struct platform_device 
*pdev)
if (!clocked)
at91_start_clock();
 
-   ohci_finish_controller_resume(hcd);
+   ohci_resume(hcd, false);
return 0;
 }
 #else
diff --git a/drivers/usb/host/ohci-ep93xx.c b/drivers/usb/host/ohci-ep93xx.c
index dbfbd1d..a982f04 100644
--- a/drivers/usb/host/ohci-ep93xx.c
+++ b/drivers/usb/host/ohci-ep93xx.c
@@ -194,7 +194,7 @@ static int ohci_hcd_ep93xx_drv_resume(struct 
platform_device *pdev)
 
ep93xx_start_hc(pdev-dev);
 
-   ohci_finish_controller_resume(hcd);
+   ohci_resume(hcd, false);
return 0;
 }
 #endif
diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c
index fc3091b..53c5a989 100644
--- a/drivers/usb/host/ohci-exynos.c
+++ b/drivers/usb/host/ohci-exynos.c
@@ -252,10 +252,7 @@ static int exynos_ohci_resume(struct device *dev)
if (pdata  pdata-phy_init)
pdata-phy_init(pdev, S5P_USB_PHY_HOST);
 
-   /* Mark hardware accessible again as we are out of D3 state by now */
-   set_bit(HCD_FLAG_HW_ACCESSIBLE, hcd-flags);
-
-   ohci_finish_controller_resume(hcd);
+   ohci_resume(hcd, false);
 
return 0;
 }
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 5d30992..568bdb3 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1003,13 +1003,50 @@ static int __maybe_unused ohci_suspend(struct usb_hcd 
*hcd, bool do_wakeup)
 
 static int __maybe_unused ohci_resume(struct usb_hcd *hcd, bool hibernated)
 {
+   struct ohci_hcd *ohci = hcd_to_ohci(hcd);
+   int port;
+   boolneed_reinit = false;
+
set_bit(HCD_FLAG_HW_ACCESSIBLE, hcd-flags);
 
/* Make sure resume from hibernation re-enumerates everything */
if (hibernated)
-   ohci_usb_reset(hcd_to_ohci(hcd));
+   ohci_usb_reset(ohci);
+
+   /* See if the controller is already running or has been reset */
+   ohci-hc_control = ohci_readl(ohci, ohci-regs-control);
+   if (ohci-hc_control  (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
+   need_reinit = true;
+   } else {
+   switch (ohci-hc_control  OHCI_CTRL_HCFS) {
+   case OHCI_USB_OPER:
+   case OHCI_USB_RESET:
+   need_reinit = true;
+   }
+   }
+
+   /* If needed, reinitialize and suspend the root hub */
+   if (need_reinit) {
+   spin_lock_irq(ohci-lock);
+   ohci_rh_resume(ohci);
+   ohci_rh_suspend(ohci, 0);
+   spin_unlock_irq(ohci-lock);
+   }
+
+   /* Normally just turn on port power and enable interrupts */
+   else {
+   ohci_dbg(ohci, powerup ports\n);
+   for (port = 0; port  ohci-num_ports; port++)
+   ohci_writel(ohci, RH_PS_PPS,
+   ohci-regs-roothub.portstatus[port]);
+
+   ohci_writel(ohci, OHCI_INTR_MIE, ohci-regs-intrenable);
+   ohci_readl(ohci, ohci-regs-intrenable);
+   msleep(20);
+   }
+
+   usb_hcd_resume_root_hub(hcd);
 
-   ohci_finish_controller_resume(hcd);
return 0;
 }
 
diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c
index 2f3619e..db09dae 100644
--- a/drivers/usb/host/ohci-hub.c
+++ b/drivers/usb/host/ohci-hub.c
@@ -316,48 +316,6 @@ static int ohci_bus_resume (struct usb_hcd *hcd)
return rc;
 }
 
-/* Carry out the final steps of resuming the controller device */
-static void __maybe_unused ohci_finish_controller_resume(struct usb_hcd *hcd)
-{
-   struct ohci_hcd *ohci = hcd_to_ohci(hcd);
-   int port;
-   bool

Re: [PATCH 4 0/4] Add ability to set defaultless network device MAC addresses to deterministic computed locally administered values

2012-07-10 Thread Florian Fainelli 
Hi,

Le jeudi 05 juillet 2012 04:44:33, Andy Green a écrit :
 The following series adds some code to generate legal, locally administered
 MAC addresses from OMAP4 CPU Die ID fuse data, and then adds a helper at
 net/ethernet taking care of accepting device path / MAC mapping
 registrations and running a notifier to enforce the requested MAC when the
 matching network device turns up.

This looks like something you can solve by user-space entirely. Expose the 
OMAP4 CPU Die ID using a sysfs attribute, and let user-space manage the MAC 
address pool.

If you tell me you want to use this for nfsroot booting, what prevents you 
from using an initramfs, assign a valid MAC to your interface and switch over 
your nfsroot once the interface setup is done?

 
 On PandaBoard / ES, two devices have no board-level MAC either assigned by
 the manufacturer or stored on the board, the last patch in the series adds
 these device paths and gets them set when the network device is registered.
 
 Lastly for convenient testing, there's a little patch on
 omap2plus_defconfig that will get Ethernet and WLAN up on Pandaboard.
 
 The patches are against today's linux-omap.
 
 Thanks to Tony Lindgren and Arnd Bergmann for comments leading to the
 helper in net/ethernet.
 
 ---
 
 Andy Green (4):
   OMAP: add cpu id register to MAC address helper
   NET ethernet introduce mac_platform helper
   OMAP4 PANDA register ethernet and wlan for automatic mac allocation
   config test config extending omap2plus with wl12xx etc
 
 
  arch/arm/configs/omap2plus_defconfig   |   35 +++
  arch/arm/mach-omap2/Kconfig|1
  arch/arm/mach-omap2/board-omap4panda.c |   30 ++
  arch/arm/mach-omap2/id.c   |   39 
  arch/arm/mach-omap2/include/mach/id.h  |1
  include/net/mac-platform.h |   39 
  net/Kconfig|5 +
  net/ethernet/Makefile  |3 +
  net/ethernet/mac-platform.c|  151
  9 files changed, 282 insertions(+), 22
 deletions(-)
  create mode 100644 include/net/mac-platform.h
  create mode 100644 net/ethernet/mac-platform.c
 
 
 ___
 linux-arm-kernel mailing list
 linux-arm-ker...@lists.infradead.org
 http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
Florian
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Re: [RFC] Change ECC algorithm from userspace

2011-10-31 Thread Florian Fainelli 
Hi,

On Friday 28 October 2011 12:30:51 Matthieu CASTET wrote:
 Hi,
 
 Javier Martinez Canillas a écrit :
  Hello,
  
  I want to be able to use 1-bit ECC for the first partition where I
  save the loader binary and has to be accessed by the ROM boot but use
  a 4-bit ECC for my rootfs partition.
  
  Does anyone have this same issue?
 
 We use raw programming and compute the ecc in software.

We are doing something similar here as well. Our bootloader also requires the 
data to be layed out differently (data + ecc interleaved inside a page + oob).

 
  What is the best approach to store data in a NAND device using
  different ECC techniques?
  
  I've think of two approaches:
  
  1- Adding an ioctl to mtdchar (something like ECCSETBITS) to change
  the ECC technique used.
 
 But this won't work if there is concurrent acess to mtd. One program may
 want 1 bit ecc other want 4 bits ecc.
 
  2- Use a platform data field to notify the omap2 nand driver that the
  ROM boot only supports 1-bit ECC. So it can use a 1-bit ECC to write
  and read the first 4 sectors but a 4-bit ECC for the rest.
 
 This may be better.

Would not it better to add infrastructure for allowing per-partition ECC 
scheme? This should allow the kernel to also be able to properly handle the 
bootloader partitions (bad-block scanning ...).

 
 Matthieu
 
 PS : note that some OMAP ROM support a better protection than Hamming (but
 the details are not public AFAIK)
 
 From OMAP34xx Multimedia Device, Silicon Revision 3.1.x, public version :
 
 Pages can contain errors caused by memory alteration. To correct these
 errors, the ROM code uses ECC,
 based on Hamming codes for SLC NAND and BCH (Bose, Ray-Chaudhuri,
 Hocquenghem) code for
 multilevel cell (MLC) devices. The computed ECC is compared to ECC stored in
 the spare area of the
 corresponding page. If there are uncorrectable errors, the ROM code returns
 with FAIL.
--
Florian
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