[PATCH] i2c: core: only use set_scl for bus recovery after calling prepare_recovery
Using set_scl may be ineffective before calling the driver specific
prepare_recovery callback, which might change into a test mode. So
instead of setting SCL in i2c_generic_scl_recovery, move it to
i2c_generic_recovery (after the optional prepare_recovery).
Signed-off-by: Jan Luebbe j...@pengutronix.de
---
drivers/i2c/i2c-core.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 069a41f116dd..be992b3e0be8 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -567,6 +567,9 @@ static int i2c_generic_recovery(struct i2c_adapter *adap)
if (bri-prepare_recovery)
bri-prepare_recovery(adap);
+ bri-set_scl(adap, val);
+ ndelay(RECOVERY_NDELAY);
+
/*
* By this time SCL is high, as we need to give 9 falling-rising edges
*/
@@ -597,7 +600,6 @@ static int i2c_generic_recovery(struct i2c_adapter *adap)
int i2c_generic_scl_recovery(struct i2c_adapter *adap)
{
- adap-bus_recovery_info-set_scl(adap, 1);
return i2c_generic_recovery(adap);
}
EXPORT_SYMBOL_GPL(i2c_generic_scl_recovery);
--
2.1.4
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[PATCH] i2c: omap: fix bus recovery setup
At least on the AM335x, enabling OMAP_I2C_SYSTEST_ST_EN is not enough to allow direct access to the SCL and SDA pins. In addition to ST_EN, we need to set the TMODE to 0b11 (Loop back SDA/SCL IO mode select). Also, as the reset values of SCL_O and SDA_O are 0 (which means drive low level), we need to set them to 1 (which means high-impedance) to avoid unwanted changes on the pins. As a precaution, reset all these bits to their default values after recovery is complete. Signed-off-by: Jan Luebbe j...@pengutronix.de --- drivers/i2c/busses/i2c-omap.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index d1c22e3fdd14..fc9bf7f30e35 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -1247,7 +1247,14 @@ static void omap_i2c_prepare_recovery(struct i2c_adapter *adap) u32 reg; reg = omap_i2c_read_reg(dev, OMAP_I2C_SYSTEST_REG); + /* enable test mode */ reg |= OMAP_I2C_SYSTEST_ST_EN; + /* select SDA/SCL IO mode */ + reg |= 3 OMAP_I2C_SYSTEST_TMODE_SHIFT; + /* set SCL to high-impedance state (reset value is 0) */ + reg |= OMAP_I2C_SYSTEST_SCL_O; + /* set SDA to high-impedance state (reset value is 0) */ + reg |= OMAP_I2C_SYSTEST_SDA_O; omap_i2c_write_reg(dev, OMAP_I2C_SYSTEST_REG, reg); } @@ -1257,7 +1264,11 @@ static void omap_i2c_unprepare_recovery(struct i2c_adapter *adap) u32 reg; reg = omap_i2c_read_reg(dev, OMAP_I2C_SYSTEST_REG); + /* restore reset values */ reg = ~OMAP_I2C_SYSTEST_ST_EN; + reg = ~OMAP_I2C_SYSTEST_TMODE_MASK; + reg = ~OMAP_I2C_SYSTEST_SCL_O; + reg = ~OMAP_I2C_SYSTEST_SDA_O; omap_i2c_write_reg(dev, OMAP_I2C_SYSTEST_REG, reg); } -- 2.1.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ti_tscadc: Update with IIO map interface deal with partial activation
Hi Pantelis, while trying out your patch on a custom AM335x board, I noticed that the sysfs entries ware missing. This is fixed in the first patch, you might want to squash that into your original patch. The second one makes sure that the iio framework does not read invalid data. Regards, Jan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] iio: adc: ti_am335x_adc: make tiadc_read_raw() more robust
Check that mask is actually IIO_CHAN_INFO_RAW.
Also handle the case where not enough data is in the fifo.
Signed-off-by: Jan Luebbe j...@pengutronix.de
---
drivers/iio/adc/ti_am335x_adc.c | 48 -
1 file changed, 28 insertions(+), 20 deletions(-)
diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c
index 620cc0c..4b764a9 100644
--- a/drivers/iio/adc/ti_am335x_adc.c
+++ b/drivers/iio/adc/ti_am335x_adc.c
@@ -157,26 +157,34 @@ static int tiadc_read_raw(struct iio_dev *indio_dev,
int i;
unsigned int fifo1count, readx1;
- /*
-* When the sub-system is first enabled,
-* the sequencer will always start with the
-* lowest step (1) and continue until step (16).
-* For ex: If we have enabled 4 ADC channels and
-* currently use only 1 out of them, the
-* sequencer still configures all the 4 steps,
-* leading to 3 unwanted data.
-* Hence we need to flush out this data.
-*/
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ /*
+* When the sub-system is first enabled,
+* the sequencer will always start with the
+* lowest step (1) and continue until step (16).
+* For ex: If we have enabled 4 ADC channels and
+* currently use only 1 out of them, the
+* sequencer still configures all the 4 steps,
+* leading to 3 unwanted data.
+* Hence we need to flush out this data.
+*/
+
+ fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
+ for (i = 0; i fifo1count; i++) {
+ readx1 = tiadc_readl(adc_dev, REG_FIFO1);
+ if (i == chan-channel)
+ *val = readx1 0xfff;
+ }
+ tiadc_writel(adc_dev, REG_SE, STPENB_STEPENB);
- fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
- for (i = 0; i fifo1count; i++) {
- readx1 = tiadc_readl(adc_dev, REG_FIFO1);
- if (i == chan-channel)
- *val = readx1 0xfff;
- }
- tiadc_writel(adc_dev, REG_SE, STPENB_STEPENB);
+ if (fifo1count = chan-channel)
+ return -EINVAL;
- return IIO_VAL_INT;
+ return IIO_VAL_INT;
+ default:
+ return -EINVAL;
+ }
}
static const struct iio_info tiadc_info = {
@@ -213,7 +221,7 @@ static int tiadc_probe(struct platform_device *pdev)
else {
node = of_get_child_by_name(node, adc);
if (!node)
- return -EINVAL;
+ return -EINVAL;
else {
err = of_property_read_u32(node,
ti,adc-channels, val32);
@@ -310,7 +318,7 @@ static const struct dev_pm_ops tiadc_pm_ops = {
static struct platform_driver tiadc_driver = {
.driver = {
- .name = tiadc,
+ .name = tiadc,
.owner = THIS_MODULE,
.pm = TIADC_PM_OPS,
},
--
1.8.2.rc2
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[PATCH 1/2] iio: adc: ti_am335x_adc: revert info_mask removal
Commit ti_tscadc: Update with IIO map interface deal with partial activation by Pantelis Antoniou pa...@antoniou-consulting.com removed this line. Without it, the in_voltage?_raw entries are missing from sysfs. Signed-off-by: Jan Luebbe j...@pengutronix.de --- drivers/iio/adc/ti_am335x_adc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c index ee20c0c..620cc0c 100644 --- a/drivers/iio/adc/ti_am335x_adc.c +++ b/drivers/iio/adc/ti_am335x_adc.c @@ -107,6 +107,7 @@ static int tiadc_channel_init(struct iio_dev *indio_dev, chan-type = IIO_VOLTAGE; chan-indexed = 1; chan-channel = i; + chan-info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT; chan-datasheet_name = s; chan-scan_type.sign = 'u'; chan-scan_type.realbits = 12; -- 1.8.2.rc2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone
On Mon, Mar 25, 2013 at 12:57:56PM +0530, Mugunthan V N wrote:
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = default;
- pinctrl-0 = user_leds_s0;
+ pinctrl-0 = user_leds_s0 cpsw_s0;
Why do you add cpsw_s0 to the pinmux node? This should go into the cpsw
node itself, which should work without further code changes since:
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=ab78029ecc347
(drivers/pinctrl: grab default handles from device core)
Same for the other patches.
Regards,
Jan
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[PATCH] mmc: omap_hsmmc: support deferred probing for GPIOs
If the CD/WP-GPIOs are not provided by the SoC's GPIO controller,
we need to handle the case where omap_hsmmc is probed earlier than
the GPIO controller chosen in the device tree.
Fix this by checking the return value of of_get_named_gpio against
-EPROBE_DEFER and passing it through to the probe function.
Signed-off-by: Jan Luebbe j...@pengutronix.de
---
I've tested this on an AM335x based board which uses an external
GPIO expander.
drivers/mmc/host/omap_hsmmc.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index e30c1ee..fd1b342 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1717,6 +1717,12 @@ static struct omap_mmc_platform_data
*of_get_hsmmc_pdata(struct device *dev)
struct omap_mmc_platform_data *pdata;
struct device_node *np = dev-of_node;
u32 bus_width, max_freq;
+ int cd_gpio, wp_gpio;
+
+ cd_gpio = of_get_named_gpio(np, cd-gpios, 0);
+ wp_gpio = of_get_named_gpio(np, wp-gpios, 0);
+ if (cd_gpio == -EPROBE_DEFER || wp_gpio == -EPROBE_DEFER)
+ return ERR_PTR(-EPROBE_DEFER);
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
@@ -1727,8 +1733,8 @@ static struct omap_mmc_platform_data
*of_get_hsmmc_pdata(struct device *dev)
/* This driver only supports 1 slot */
pdata-nr_slots = 1;
- pdata-slots[0].switch_pin = of_get_named_gpio(np, cd-gpios, 0);
- pdata-slots[0].gpio_wp = of_get_named_gpio(np, wp-gpios, 0);
+ pdata-slots[0].switch_pin = cd_gpio;
+ pdata-slots[0].gpio_wp = wp_gpio;
if (of_find_property(np, ti,non-removable, NULL)) {
pdata-slots[0].nonremovable = true;
@@ -1775,6 +1781,10 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
match = of_match_device(of_match_ptr(omap_mmc_of_match), pdev-dev);
if (match) {
pdata = of_get_hsmmc_pdata(pdev-dev);
+
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+
if (match-data) {
const u16 *offsetp = match-data;
pdata-reg_offset = *offsetp;
--
1.7.10.4
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[RFC PATCH] gpio/omap: fix pm_runtime for IRQ functions
Other devices in the device tree can use omap-gpio as an interrupt
controller with something like:
interrupt-parent = gpio1;
interrupts = 19 8;
(in this case with #interrupt-cells = 2 in the gpio node to be able
to configure the IRQ flags in DT)
Currently this triggers an unhandled fault (external abort on non-
linefetch) because the gpio bank has been disabled by runtime pm.
The current driver keeps a reference count in omap_gpio_request
and omap_gpio_free, but these are not called when configuring
an IRQ via device tree. The current code expects that users
always request a gpio before trying to use the IRQ functions.
When using DT, this is no longer the case.
To fix this problem, I changed bank-mod_usage from per pin flags
to a simple refcount and update it from gpio_unmask_irq and
gpio_mask_irq, as well. Depending on the content of bank-mod_usage,
pm_runtime_get_sync and pm_runtime_put are called.
I'm unsure about the code to en-/disable the module clock gate.
Maybe it should be moved to omap_gpio_runtime_{suspend,resume} or
separate helpers?
Another unclear point is whether the pm_runtime_* calls have a too
large overhead for unmask/mask.
Signed-off-by: Jan Luebbe j...@pengutronix.de
---
drivers/gpio/gpio-omap.c | 65 +++---
1 file changed, 61 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index d335af1..51434f3 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -436,10 +436,16 @@ static int gpio_irq_type(struct irq_data *d, unsigned
type)
(type (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
return -EINVAL;
+ if (!bank-mod_usage)
+ pm_runtime_get_sync(bank-dev);
+
spin_lock_irqsave(bank-lock, flags);
retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
spin_unlock_irqrestore(bank-lock, flags);
+ if (!bank-mod_usage)
+ pm_runtime_put(bank-dev);
+
if (type (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
__irq_set_handler_locked(d-irq, handle_level_irq);
else if (type (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
@@ -621,7 +627,7 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
bank-context.ctrl = ctrl;
}
- bank-mod_usage |= 1 offset;
+ bank-mod_usage++;
spin_unlock_irqrestore(bank-lock, flags);
@@ -631,19 +637,18 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
{
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
- void __iomem *base = bank-base;
unsigned long flags;
spin_lock_irqsave(bank-lock, flags);
if (bank-regs-wkup_en) {
/* Disable wake-up during idle for dynamic tick */
- _gpio_rmw(base, bank-regs-wkup_en, 1 offset, 0);
+ _gpio_rmw(bank-base, bank-regs-wkup_en, 1 offset, 0);
bank-context.wake_en =
__raw_readl(bank-base + bank-regs-wkup_en);
}
- bank-mod_usage = ~(1 offset);
+ bank-mod_usage--;
if (bank-regs-ctrl !bank-mod_usage) {
void __iomem *reg = bank-base + bank-regs-ctrl;
@@ -781,7 +786,35 @@ static void gpio_mask_irq(struct irq_data *d)
spin_lock_irqsave(bank-lock, flags);
_set_gpio_irqenable(bank, gpio, 0);
_set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
+
+ if (bank-regs-wkup_en) {
+ /* Disable wake-up during idle for dynamic tick */
+ _gpio_rmw(bank-base, bank-regs-wkup_en, GPIO_BIT(bank,
gpio), 0);
+ bank-context.wake_en =
+ __raw_readl(bank-base + bank-regs-wkup_en);
+ }
+
+ bank-mod_usage--;
+
+ if (bank-regs-ctrl !bank-mod_usage) {
+ void __iomem *reg = bank-base + bank-regs-ctrl;
+ u32 ctrl;
+
+ ctrl = __raw_readl(reg);
+ /* Module is disabled, clocks are gated */
+ ctrl |= GPIO_MOD_CTRL_BIT;
+ __raw_writel(ctrl, reg);
+ bank-context.ctrl = ctrl;
+ }
+
spin_unlock_irqrestore(bank-lock, flags);
+
+ /*
+* If this is the last gpio to be freed in the bank,
+* disable the bank module.
+*/
+ if (!bank-mod_usage)
+ pm_runtime_put(bank-dev);
}
static void gpio_unmask_irq(struct irq_data *d)
@@ -792,7 +825,31 @@ static void gpio_unmask_irq(struct irq_data *d)
u32 trigger = irqd_get_trigger_type(d);
unsigned long flags;
+ if (!bank-mod_usage)
+ pm_runtime_get_sync(bank-dev);
+
spin_lock_irqsave(bank-lock, flags);
+
+ if (bank-regs-pinctrl) {
+ void __iomem *reg = bank-base + bank-regs-pinctrl
[PATCH 3/3] net: cpsw: implement ioctl for MII
This allows using tools like mii-diag on CPSW.
Signed-off-by: Jan Luebbe j...@pengutronix.de
---
drivers/net/ethernet/ti/cpsw.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 8de3e92..f476c03 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -629,6 +629,20 @@ static void cpsw_ndo_change_rx_flags(struct net_device
*ndev, int flags)
dev_err(ndev-dev, multicast traffic cannot be filtered!\n);
}
+static int cpsw_ndo_do_ioctl(struct net_device *ndev, struct ifreq *rq, int
cmd)
+{
+ struct cpsw_priv *priv = netdev_priv(ndev);
+ struct phy_device *phy = priv-slaves[0].phy;
+
+ if (!netif_running(ndev))
+ return -EINVAL;
+
+ if (!phy)
+ return -ENODEV;
+
+ return phy_mii_ioctl(phy, rq, cmd);
+}
+
static void cpsw_ndo_tx_timeout(struct net_device *ndev)
{
struct cpsw_priv *priv = netdev_priv(ndev);
@@ -670,6 +684,7 @@ static const struct net_device_ops cpsw_netdev_ops = {
.ndo_start_xmit = cpsw_ndo_start_xmit,
.ndo_change_rx_flags= cpsw_ndo_change_rx_flags,
.ndo_validate_addr = eth_validate_addr,
+ .ndo_do_ioctl = cpsw_ndo_do_ioctl,
.ndo_change_mtu = eth_change_mtu,
.ndo_tx_timeout = cpsw_ndo_tx_timeout,
.ndo_get_stats = cpsw_ndo_get_stats,
--
1.7.10.4
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[PATCH 1/3] net: cpsw: replace pr_xxx with dev_xxx functions
Signed-off-by: Jan Luebbe j...@pengutronix.de
---
drivers/net/ethernet/ti/cpsw.c | 47
1 file changed, 23 insertions(+), 24 deletions(-)
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index fb1a692..c0e676a 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -729,7 +729,7 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
return -EINVAL;
if (of_property_read_u32(node, slaves, prop)) {
- pr_err(Missing slaves property in the DT.\n);
+ dev_err(pdev-dev, Missing slaves property in the DT.\n);
return -EINVAL;
}
data-slaves = prop;
@@ -737,91 +737,91 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
data-slave_data = kzalloc(sizeof(struct cpsw_slave_data) *
data-slaves, GFP_KERNEL);
if (!data-slave_data) {
- pr_err(Could not allocate slave memory.\n);
+ dev_err(pdev-dev, Could not allocate slave memory.\n);
return -EINVAL;
}
data-no_bd_ram = of_property_read_bool(node, no_bd_ram);
if (of_property_read_u32(node, cpdma_channels, prop)) {
- pr_err(Missing cpdma_channels property in the DT.\n);
+ dev_err(pdev-dev, Missing cpdma_channels property in the
DT.\n);
ret = -EINVAL;
goto error_ret;
}
data-channels = prop;
if (of_property_read_u32(node, host_port_no, prop)) {
- pr_err(Missing host_port_no property in the DT.\n);
+ dev_err(pdev-dev, Missing host_port_no property in the
DT.\n);
ret = -EINVAL;
goto error_ret;
}
data-host_port_num = prop;
if (of_property_read_u32(node, cpdma_reg_ofs, prop)) {
- pr_err(Missing cpdma_reg_ofs property in the DT.\n);
+ dev_err(pdev-dev, Missing cpdma_reg_ofs property in the
DT.\n);
ret = -EINVAL;
goto error_ret;
}
data-cpdma_reg_ofs = prop;
if (of_property_read_u32(node, cpdma_sram_ofs, prop)) {
- pr_err(Missing cpdma_sram_ofs property in the DT.\n);
+ dev_err(pdev-dev, Missing cpdma_sram_ofs property in the
DT.\n);
ret = -EINVAL;
goto error_ret;
}
data-cpdma_sram_ofs = prop;
if (of_property_read_u32(node, ale_reg_ofs, prop)) {
- pr_err(Missing ale_reg_ofs property in the DT.\n);
+ dev_err(pdev-dev, Missing ale_reg_ofs property in the
DT.\n);
ret = -EINVAL;
goto error_ret;
}
data-ale_reg_ofs = prop;
if (of_property_read_u32(node, ale_entries, prop)) {
- pr_err(Missing ale_entries property in the DT.\n);
+ dev_err(pdev-dev, Missing ale_entries property in the
DT.\n);
ret = -EINVAL;
goto error_ret;
}
data-ale_entries = prop;
if (of_property_read_u32(node, host_port_reg_ofs, prop)) {
- pr_err(Missing host_port_reg_ofs property in the DT.\n);
+ dev_err(pdev-dev, Missing host_port_reg_ofs property in the
DT.\n);
ret = -EINVAL;
goto error_ret;
}
data-host_port_reg_ofs = prop;
if (of_property_read_u32(node, hw_stats_reg_ofs, prop)) {
- pr_err(Missing hw_stats_reg_ofs property in the DT.\n);
+ dev_err(pdev-dev, Missing hw_stats_reg_ofs property in the
DT.\n);
ret = -EINVAL;
goto error_ret;
}
data-hw_stats_reg_ofs = prop;
if (of_property_read_u32(node, bd_ram_ofs, prop)) {
- pr_err(Missing bd_ram_ofs property in the DT.\n);
+ dev_err(pdev-dev, Missing bd_ram_ofs property in the DT.\n);
ret = -EINVAL;
goto error_ret;
}
data-bd_ram_ofs = prop;
if (of_property_read_u32(node, bd_ram_size, prop)) {
- pr_err(Missing bd_ram_size property in the DT.\n);
+ dev_err(pdev-dev, Missing bd_ram_size property in the
DT.\n);
ret = -EINVAL;
goto error_ret;
}
data-bd_ram_size = prop;
if (of_property_read_u32(node, rx_descs, prop)) {
- pr_err(Missing rx_descs property in the DT.\n);
+ dev_err(pdev-dev, Missing rx_descs property in the DT.\n);
ret = -EINVAL;
goto error_ret;
}
data-rx_descs = prop;
if (of_property_read_u32(node, mac_control, prop)) {
- pr_err(Missing mac_control property in the DT.\n);
+ dev_err(pdev-dev, Missing mac_control property in the
DT.\n);
ret = -EINVAL;
goto
[PATCH 2/3] net: cpsw: verify correct number of slaves in DT
Check that the number of available slaves passed from DT matches the
value of the slaves property in the cpsw node. Otherwise, priv-slaves
would be the wrong size.
Signed-off-by: Jan Luebbe j...@pengutronix.de
---
drivers/net/ethernet/ti/cpsw.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index c0e676a..8de3e92 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -832,6 +832,16 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
const char *phy_id = NULL;
const void *mac_addr = NULL;
+ if (!of_device_is_available(slave_node))
+ continue;
+
+ if (i = data-slaves) {
+ dev_err(pdev-dev, Too many slaves in the DT (
%d).\n,
+ data-slaves);
+ ret = -EINVAL;
+ goto error_ret;
+ }
+
if (of_property_read_string(slave_node, phy_id, phy_id)) {
dev_err(pdev-dev, Missing slave[%d] phy_id
property.\n, i);
ret = -EINVAL;
@@ -861,6 +871,13 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
i++;
}
+ if (i data-slaves) {
+ dev_err(pdev-dev, Not enough slaves in the DT ( %d).\n,
+ data-slaves);
+ ret = -EINVAL;
+ goto error_ret;
+ }
+
/*
* Populate all the child nodes here...
*/
--
1.7.10.4
--
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[PATCH] omap: Fix multi.h when only ARCH_OMAP3 and SOC_AM33XX are selected
When only ARCH_OMAP3 (or -2,-4,...) and SOC_AM33XX are selected, multi.h doesn't set MULTI_OMAP2. In this case, cpu.h will simply define cpu_is_omap24xx() as 1. This causes problems for example for omap_hwmod.c:omap_hwmod_init which checks for cpu_is_omap24xx() first, using the wrong soc_ops for AM33xx. Fix this by defining MULTI_OMAP2 when using SOC_AM33XX together with something else. Signed-off-by: Jan Luebbe j...@pengutronix.de --- arch/arm/plat-omap/include/plat/multi.h |9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/plat-omap/include/plat/multi.h b/arch/arm/plat-omap/include/plat/multi.h index 045e320..324d31b 100644 --- a/arch/arm/plat-omap/include/plat/multi.h +++ b/arch/arm/plat-omap/include/plat/multi.h @@ -108,4 +108,13 @@ # endif #endif +#ifdef CONFIG_SOC_AM33XX +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME am33xx +# endif +#endif + #endif /* __PLAT_OMAP_MULTI_H */ -- 1.7.10.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
