Re: [PATCH/RFT 1/3] ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm

2012-04-26 Thread Kevin Hilman 
Paul Walmsley p...@pwsan.com writes:

 On Tue, 24 Apr 2012, Kevin Hilman wrote:

 Iteration over all power domains in the idle path is unnecessary since
 only power domains that are transitioning need to be accounted for.
 Also PRCM register accesses are known to be expensive, so the
 additional latency added to the idle path is signficiant.
 
 In order allow the pre/post transitions to be isolated and called
 per-pwrdm, change the API so passing in a specific power domain will
 trigger the pre/post transtion accounting for only that specific power
 domain.  Passing NULL means iterating over all power domains as is
 current behavior.
 
 Signed-off-by: Kevin Hilman khil...@ti.com

 Based on a quick glance, it looks good to me:

 Acked-by: Paul Walmsley p...@pwsan.com

 Want to queue this one?

Yes, I'll queue this along with the others.

Thanks,

Kevin
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH/RFT 1/3] ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm

2012-04-25 Thread Shilimkar, Santosh 
On Tue, Apr 24, 2012 at 7:53 PM, Kevin Hilman khil...@ti.com wrote:
 Iteration over all power domains in the idle path is unnecessary since
 only power domains that are transitioning need to be accounted for.
 Also PRCM register accesses are known to be expensive, so the
 additional latency added to the idle path is signficiant.

 In order allow the pre/post transitions to be isolated and called
 per-pwrdm, change the API so passing in a specific power domain will
 trigger the pre/post transtion accounting for only that specific power
 domain.  Passing NULL means iterating over all power domains as is
 current behavior.

 Signed-off-by: Kevin Hilman khil...@ti.com
 ---
  arch/arm/mach-omap2/omap-mpuss-lowpower.c |    4 ++--
  arch/arm/mach-omap2/pm34xx.c              |    4 ++--
  arch/arm/mach-omap2/powerdomain.c         |   16 
  arch/arm/mach-omap2/powerdomain.h         |    4 ++--
  4 files changed, 18 insertions(+), 10 deletions(-)

[...]

 diff --git a/arch/arm/mach-omap2/powerdomain.c 
 b/arch/arm/mach-omap2/powerdomain.c
 index 96ad3dbe..0baf8c3 100644
 --- a/arch/arm/mach-omap2/powerdomain.c
 +++ b/arch/arm/mach-omap2/powerdomain.c
 @@ -991,15 +991,23 @@ int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
        return -EINVAL;
  }

 -int pwrdm_pre_transition(void)
 +int pwrdm_pre_transition(struct powerdomain *pwrdm)
  {
 -       pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
 +       if (pwrdm)
 +               _pwrdm_pre_transition_cb(pwrdm, NULL);
 +       else
 +               pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
 +
        return 0;
  }

Minor nit. Noticed couple of whitespace errors in the patch.

---
ERROR: trailing whitespace
#82: FILE: arch/arm/mach-omap2/powerdomain.c:996:
+^Iif (pwrdm) $

ERROR: trailing whitespace
#84: FILE: arch/arm/mach-omap2/powerdomain.c:998:
+^Ielse $

total: 2 errors, 0 warnings, 69 lines checked
---

Updated patch below with that fixed.

Regards
Santosh

From 2782503adcf91142d2aee4bafe29989095ece3ba Mon Sep 17 00:00:00 2001
From: Kevin Hilman khil...@ti.com
Date: Wed, 25 Apr 2012 14:05:21 +0530
Subject: [PATCH 1/1] ARM: OMAP2+: powerdomain: allow pre/post transtion to be
 per pwrdm

Iteration over all power domains in the idle path is unnecessary since
only power domains that are transitioning need to be accounted for.
Also PRCM register accesses are known to be expensive, so the
additional latency added to the idle path is signficiant.

In order allow the pre/post transitions to be isolated and called
per-pwrdm, change the API so passing in a specific power domain will
trigger the pre/post transtion accounting for only that specific power
domain.  Passing NULL means iterating over all power domains as is
current behavior.

Signed-off-by: Kevin Hilman khil...@ti.com
---
 arch/arm/mach-omap2/omap-mpuss-lowpower.c |4 ++--
 arch/arm/mach-omap2/pm34xx.c  |4 ++--
 arch/arm/mach-omap2/powerdomain.c |   16 
 arch/arm/mach-omap2/powerdomain.h |4 ++--
 4 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 13670aa..e35a86b 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -255,7 +255,7 @@ int omap4_enter_lowpower(unsigned int cpu,
unsigned int power_state)
return -ENXIO;
}

-   pwrdm_pre_transition();
+   pwrdm_pre_transition(NULL);

/*
 * Check MPUSS next state and save interrupt controller if needed.
@@ -287,7 +287,7 @@ int omap4_enter_lowpower(unsigned int cpu,
unsigned int power_state)
wakeup_cpu = smp_processor_id();
set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON);

-   pwrdm_post_transition();
+   pwrdm_post_transition(NULL);

return 0;
 }
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 703bd10..2451b90 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -307,7 +307,7 @@ void omap_sram_idle(void)
omap3_enable_io_chain();
}

-   pwrdm_pre_transition();
+   pwrdm_pre_transition(NULL);

/* PER */
if (per_next_state  PWRDM_POWER_ON) {
@@ -372,7 +372,7 @@ void omap_sram_idle(void)
}
omap3_intc_resume_idle();

-   pwrdm_post_transition();
+   pwrdm_post_transition(NULL);

/* PER */
if (per_next_state  PWRDM_POWER_ON) {
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 96ad3dbe..bb6780d 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -991,15 +991,23 @@ int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
return -EINVAL;
 }

-int pwrdm_pre_transition(void)
+int pwrdm_pre_transition(struct powerdomain *pwrdm)
 {
-   pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
+   if (pwrdm)
+

Re: [PATCH/RFT 1/3] ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm

2012-04-25 Thread Paul Walmsley 
On Tue, 24 Apr 2012, Kevin Hilman wrote:

 Iteration over all power domains in the idle path is unnecessary since
 only power domains that are transitioning need to be accounted for.
 Also PRCM register accesses are known to be expensive, so the
 additional latency added to the idle path is signficiant.
 
 In order allow the pre/post transitions to be isolated and called
 per-pwrdm, change the API so passing in a specific power domain will
 trigger the pre/post transtion accounting for only that specific power
 domain.  Passing NULL means iterating over all power domains as is
 current behavior.
 
 Signed-off-by: Kevin Hilman khil...@ti.com

Based on a quick glance, it looks good to me:

Acked-by: Paul Walmsley p...@pwsan.com

Want to queue this one?


- Paul
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH/RFT 1/3] ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm

2012-04-24 Thread Kevin Hilman 
Iteration over all power domains in the idle path is unnecessary since
only power domains that are transitioning need to be accounted for.
Also PRCM register accesses are known to be expensive, so the
additional latency added to the idle path is signficiant.

In order allow the pre/post transitions to be isolated and called
per-pwrdm, change the API so passing in a specific power domain will
trigger the pre/post transtion accounting for only that specific power
domain.  Passing NULL means iterating over all power domains as is
current behavior.

Signed-off-by: Kevin Hilman khil...@ti.com
---
 arch/arm/mach-omap2/omap-mpuss-lowpower.c |4 ++--
 arch/arm/mach-omap2/pm34xx.c  |4 ++--
 arch/arm/mach-omap2/powerdomain.c |   16 
 arch/arm/mach-omap2/powerdomain.h |4 ++--
 4 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c 
b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 13670aa..e35a86b 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -255,7 +255,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int 
power_state)
return -ENXIO;
}
 
-   pwrdm_pre_transition();
+   pwrdm_pre_transition(NULL);
 
/*
 * Check MPUSS next state and save interrupt controller if needed.
@@ -287,7 +287,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int 
power_state)
wakeup_cpu = smp_processor_id();
set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON);
 
-   pwrdm_post_transition();
+   pwrdm_post_transition(NULL);
 
return 0;
 }
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 703bd10..2451b90 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -307,7 +307,7 @@ void omap_sram_idle(void)
omap3_enable_io_chain();
}
 
-   pwrdm_pre_transition();
+   pwrdm_pre_transition(NULL);
 
/* PER */
if (per_next_state  PWRDM_POWER_ON) {
@@ -372,7 +372,7 @@ void omap_sram_idle(void)
}
omap3_intc_resume_idle();
 
-   pwrdm_post_transition();
+   pwrdm_post_transition(NULL);
 
/* PER */
if (per_next_state  PWRDM_POWER_ON) {
diff --git a/arch/arm/mach-omap2/powerdomain.c 
b/arch/arm/mach-omap2/powerdomain.c
index 96ad3dbe..0baf8c3 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -991,15 +991,23 @@ int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
return -EINVAL;
 }
 
-int pwrdm_pre_transition(void)
+int pwrdm_pre_transition(struct powerdomain *pwrdm)
 {
-   pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
+   if (pwrdm) 
+   _pwrdm_pre_transition_cb(pwrdm, NULL);
+   else 
+   pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
+
return 0;
 }
 
-int pwrdm_post_transition(void)
+int pwrdm_post_transition(struct powerdomain *pwrdm)
 {
-   pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
+   if (pwrdm)
+   _pwrdm_post_transition_cb(pwrdm, NULL);
+   else
+   pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
+
return 0;
 }
 
diff --git a/arch/arm/mach-omap2/powerdomain.h 
b/arch/arm/mach-omap2/powerdomain.h
index 0d72a8a..a468de4 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -214,8 +214,8 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm);
 
 int pwrdm_state_switch(struct powerdomain *pwrdm);
 int pwrdm_clkdm_state_switch(struct clockdomain *clkdm);
-int pwrdm_pre_transition(void);
-int pwrdm_post_transition(void);
+int pwrdm_pre_transition(struct powerdomain *pwrdm);
+int pwrdm_post_transition(struct powerdomain *pwrdm);
 int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
 int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
 bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
-- 
1.7.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH/RFT 1/3] ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm

2012-04-24 Thread Shilimkar, Santosh 
On Tue, Apr 24, 2012 at 7:53 PM, Kevin Hilman khil...@ti.com wrote:
 Iteration over all power domains in the idle path is unnecessary since
 only power domains that are transitioning need to be accounted for.
 Also PRCM register accesses are known to be expensive, so the
 additional latency added to the idle path is signficiant.

 In order allow the pre/post transitions to be isolated and called
 per-pwrdm, change the API so passing in a specific power domain will
 trigger the pre/post transtion accounting for only that specific power
 domain.  Passing NULL means iterating over all power domains as is
 current behavior.

 Signed-off-by: Kevin Hilman khil...@ti.com
 ---
  arch/arm/mach-omap2/omap-mpuss-lowpower.c |    4 ++--
  arch/arm/mach-omap2/pm34xx.c              |    4 ++--
  arch/arm/mach-omap2/powerdomain.c         |   16 
  arch/arm/mach-omap2/powerdomain.h         |    4 ++--
  4 files changed, 18 insertions(+), 10 deletions(-)

 diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c 
 b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
 index 13670aa..e35a86b 100644
 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
 +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
 @@ -255,7 +255,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int 
 power_state)
                return -ENXIO;
        }

 -       pwrdm_pre_transition();
 +       pwrdm_pre_transition(NULL);

        /*
         * Check MPUSS next state and save interrupt controller if needed.
 @@ -287,7 +287,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int 
 power_state)
        wakeup_cpu = smp_processor_id();
        set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON);

 -       pwrdm_post_transition();
 +       pwrdm_post_transition(NULL);

        return 0;
  }

Now since the   pwrdm_[pre\post]_transition() takes
power domain pointer, OMAP4 can limit this
to CPU and MPUSS PD's only.

Will create that patch on top of this series and test
it out.

Thanks for the API change.

Regards
Santosh
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html