Re: [PATCH 08/19] ARM: OMAP4: PM: Add device-off support

2012-04-25 Thread Tero Kristo 
On Tue, 2012-04-24 at 12:46 -0500, Jon Hunter wrote:
 Hi Tero,
 
 On 04/20/2012 04:33 AM, Tero Kristo wrote:
  This patch adds device off support to OMAP4 device type.
  
  OFF mode is disabled by default, however, there are two ways to enable
  OFF mode:
  a) In the board file, call omap4_pm_off_mode_enable(1)
  b) Enable OFF mode using the debugfs entry
  echo 1/sys/kernel/debug/pm_debug/enable_off_mode
  (conversely echo '0' will disable it as well).
  
  Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
  [t-kri...@ti.com: largely re-structured the code]
  Signed-off-by: Tero Kristo t-kri...@ti.com
  ---
   arch/arm/mach-omap2/omap-mpuss-lowpower.c |   24 ++-
   arch/arm/mach-omap2/omap-wakeupgen.c  |   47 +++-
   arch/arm/mach-omap2/pm-debug.c|   17 +--
   arch/arm/mach-omap2/pm.h  |   28 ++--
   arch/arm/mach-omap2/pm44xx.c  |   45 +++
   arch/arm/mach-omap2/prm44xx.c |   66 
  +
   6 files changed, 214 insertions(+), 13 deletions(-)
  
  diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c 
  b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
  index e02c082..b9a2cc7 100644
  --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
  +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
  @@ -60,6 +60,7 @@
   #include prcm44xx.h
   #include prm44xx.h
   #include prm-regbits-44xx.h
  +#include cm44xx.h
   
   #ifdef CONFIG_SMP
   
  @@ -232,6 +233,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int 
  power_state)
   {
  unsigned int save_state = 0;
  unsigned int wakeup_cpu;
  +   int ret;
   
  if (omap_rev() == OMAP4430_REV_ES1_0)
  return -ENXIO;
  @@ -263,9 +265,21 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned 
  int power_state)
   * In MPUSS OSWR or device OFF, interrupt controller  contest is lost.
   */
  mpuss_clear_prev_logic_pwrst();
  -   if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) 
  -   (pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF))
  +   if (omap4_device_next_state_off()) {
  +   /* Save the device context to SAR RAM */
  +   ret = omap_sar_save();
  +   if (ret)
  +   return ret;
 
 Is it safe to simply return here? I was not sure if we need to call
 pwrdm_post_transition, given that we have already called
 pwrdm_pre_transition on entry.

Hmm, thats a good point, I'll change the patch slightly. Anyway,
currently the potential solo pwrdm_pre_transition() will not break
anything, but in future it would, as we are planning to control AUTO_RET
feature through the pwrdm_pre / pwrdm_post calls.

-Tero

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Re: [PATCH 08/19] ARM: OMAP4: PM: Add device-off support

2012-04-24 Thread Jon Hunter 
Hi Tero,

On 04/20/2012 04:33 AM, Tero Kristo wrote:
 This patch adds device off support to OMAP4 device type.
 
 OFF mode is disabled by default, however, there are two ways to enable
 OFF mode:
 a) In the board file, call omap4_pm_off_mode_enable(1)
 b) Enable OFF mode using the debugfs entry
 echo 1/sys/kernel/debug/pm_debug/enable_off_mode
 (conversely echo '0' will disable it as well).
 
 Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
 [t-kri...@ti.com: largely re-structured the code]
 Signed-off-by: Tero Kristo t-kri...@ti.com
 ---
  arch/arm/mach-omap2/omap-mpuss-lowpower.c |   24 ++-
  arch/arm/mach-omap2/omap-wakeupgen.c  |   47 +++-
  arch/arm/mach-omap2/pm-debug.c|   17 +--
  arch/arm/mach-omap2/pm.h  |   28 ++--
  arch/arm/mach-omap2/pm44xx.c  |   45 +++
  arch/arm/mach-omap2/prm44xx.c |   66 
 +
  6 files changed, 214 insertions(+), 13 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c 
 b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
 index e02c082..b9a2cc7 100644
 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
 +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
 @@ -60,6 +60,7 @@
  #include prcm44xx.h
  #include prm44xx.h
  #include prm-regbits-44xx.h
 +#include cm44xx.h
  
  #ifdef CONFIG_SMP
  
 @@ -232,6 +233,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int 
 power_state)
  {
   unsigned int save_state = 0;
   unsigned int wakeup_cpu;
 + int ret;
  
   if (omap_rev() == OMAP4430_REV_ES1_0)
   return -ENXIO;
 @@ -263,9 +265,21 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int 
 power_state)
* In MPUSS OSWR or device OFF, interrupt controller  contest is lost.
*/
   mpuss_clear_prev_logic_pwrst();
 - if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) 
 - (pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF))
 + if (omap4_device_next_state_off()) {
 + /* Save the device context to SAR RAM */
 + ret = omap_sar_save();
 + if (ret)
 + return ret;

Is it safe to simply return here? I was not sure if we need to call
pwrdm_post_transition, given that we have already called
pwrdm_pre_transition on entry.

Cheers
Jon
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[PATCH 08/19] ARM: OMAP4: PM: Add device-off support

2012-04-20 Thread Tero Kristo 
This patch adds device off support to OMAP4 device type.

OFF mode is disabled by default, however, there are two ways to enable
OFF mode:
a) In the board file, call omap4_pm_off_mode_enable(1)
b) Enable OFF mode using the debugfs entry
echo 1/sys/kernel/debug/pm_debug/enable_off_mode
(conversely echo '0' will disable it as well).

Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
[t-kri...@ti.com: largely re-structured the code]
Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/omap-mpuss-lowpower.c |   24 ++-
 arch/arm/mach-omap2/omap-wakeupgen.c  |   47 +++-
 arch/arm/mach-omap2/pm-debug.c|   17 +--
 arch/arm/mach-omap2/pm.h  |   28 ++--
 arch/arm/mach-omap2/pm44xx.c  |   45 +++
 arch/arm/mach-omap2/prm44xx.c |   66 +
 6 files changed, 214 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c 
b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index e02c082..b9a2cc7 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -60,6 +60,7 @@
 #include prcm44xx.h
 #include prm44xx.h
 #include prm-regbits-44xx.h
+#include cm44xx.h
 
 #ifdef CONFIG_SMP
 
@@ -232,6 +233,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int 
power_state)
 {
unsigned int save_state = 0;
unsigned int wakeup_cpu;
+   int ret;
 
if (omap_rev() == OMAP4430_REV_ES1_0)
return -ENXIO;
@@ -263,9 +265,21 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int 
power_state)
 * In MPUSS OSWR or device OFF, interrupt controller  contest is lost.
 */
mpuss_clear_prev_logic_pwrst();
-   if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) 
-   (pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF))
+   if (omap4_device_next_state_off()) {
+   /* Save the device context to SAR RAM */
+   ret = omap_sar_save();
+   if (ret)
+   return ret;
+   omap_sar_overwrite();
+   omap4_cm_prepare_off();
+   omap4_dpll_prepare_off();
+   save_state = 3;
+   } else if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) 
+   (pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF)) {
save_state = 2;
+   } else if (pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_OFF) {
+   save_state = 3;
+   }
 
cpu_clear_prev_logic_pwrst(cpu);
set_cpu_next_pwrst(cpu, power_state);
@@ -288,6 +302,12 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int 
power_state)
wakeup_cpu = smp_processor_id();
set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON);
 
+   if (omap4_device_prev_state_off()) {
+   omap4_dpll_resume_off();
+   omap4_cm_resume_off();
+   omap4_device_clear_prev_off_state();
+   }
+
pwrdm_post_transition();
 
return 0;
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c 
b/arch/arm/mach-omap2/omap-wakeupgen.c
index 42cd7fb..805d08d 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -32,6 +32,7 @@
 
 #include omap4-sar-layout.h
 #include common.h
+#include pm.h
 
 #define NR_REG_BANKS   4
 #define MAX_IRQS   128
@@ -46,6 +47,8 @@ static void __iomem *sar_base;
 static DEFINE_SPINLOCK(wakeupgen_lock);
 static unsigned int irq_target_cpu[NR_IRQS];
 
+static struct powerdomain *mpuss_pd;
+
 /*
  * Static helper functions.
  */
@@ -259,7 +262,7 @@ static void irq_save_context(void)
 /*
  * Clear WakeupGen SAR backup status.
  */
-void irq_sar_clear(void)
+static void irq_sar_clear(void)
 {
u32 val;
val = __raw_readl(sar_base + SAR_BACKUP_STATUS_OFFSET);
@@ -271,7 +274,7 @@ void irq_sar_clear(void)
  * Save GIC and Wakeupgen interrupt context using secure API
  * for HS/EMU devices.
  */
-static void irq_save_secure_context(void)
+static void irq_save_secure_gic(void)
 {
u32 ret;
ret = omap_secure_dispatcher(OMAP4_HAL_SAVEGIC_INDEX,
@@ -282,6 +285,40 @@ static void irq_save_secure_context(void)
 }
 #endif
 
+static void save_secure_ram(void)
+{
+   u32 ret;
+   ret = omap_secure_dispatcher(OMAP4_HAL_SAVESECURERAM_INDEX,
+   FLAG_START_CRITICAL,
+   1, omap_secure_ram_mempool_base(),
+   0, 0, 0);
+   if (ret != API_HAL_RET_VALUE_OK)
+   pr_err(Secure ram context save failed\n);
+}
+
+static void save_secure_all(void)
+{
+   u32 ret;
+   ret = omap_secure_dispatcher(OMAP4_HAL_SAVEALL_INDEX,
+   FLAG_START_CRITICAL,
+   1, omap_secure_ram_mempool_base(),
+   0, 0, 0);
+   if (ret != API_HAL_RET_VALUE_OK)