This patch updates the common machine spcific source files with support for
TI816X.
Note that the nr_irqs is overridden in INTC driver since the number of IRQs on
TI816X are different (128) comapared to other OMAPs (96).
Signed-off-by: Hemant Pedanekar hema...@ti.com
---
arch/arm/mach-omap2/clockdomain.c | 18 +-
arch/arm/mach-omap2/id.c | 25 +
arch/arm/mach-omap2/io.c | 21 -
arch/arm/mach-omap2/irq.c |4
arch/arm/mach-omap2/serial.c |3 ++-
5 files changed, 60 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index 5d80cb8..35d2f21 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -1,5 +1,5 @@
/*
- * OMAP2/3/4 clockdomain framework functions
+ * OMAP2/3/4 and TI816X clockdomain framework functions
*
* Copyright (C) 2008-2010 Texas Instruments, Inc.
* Copyright (C) 2008-2010 Nokia Corporation
@@ -240,7 +240,7 @@ static void _omap2_clkdm_set_hwsup(struct clockdomain
*clkdm, int enable)
bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
else
bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
- } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ } else if (cpu_is_omap34xx() || cpu_is_omap44xx() || cpu_is_ti816x()) {
if (enable)
bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
else
@@ -812,7 +812,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
clkdm-pwrdm.ptr-prcm_offs, OMAP2_PM_PWSTCTRL);
- } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ } else if (cpu_is_omap34xx() || cpu_is_omap44xx() || cpu_is_ti816x()) {
u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP
__ffs(clkdm-clktrctrl_mask));
@@ -856,7 +856,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
clkdm-pwrdm.ptr-prcm_offs, OMAP2_PM_PWSTCTRL);
- } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ } else if (cpu_is_omap34xx() || cpu_is_omap44xx() || cpu_is_ti816x()) {
u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP
__ffs(clkdm-clktrctrl_mask));
@@ -899,10 +899,10 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
/*
* XXX This should be removed once TI adds wakeup/sleep
-* dependency code and data for OMAP4.
+* dependency code and data for OMAP4, TI816X
*/
- if (cpu_is_omap44xx()) {
- WARN_ONCE(1, clockdomain: OMAP4 wakeup/sleep dependency
+ if (cpu_is_omap44xx() || cpu_is_ti816x()) {
+ WARN_ONCE(1, clockdomain: wakeup/sleep dependency
support is not yet implemented\n);
} else {
if (atomic_read(clkdm-usecount) 0)
@@ -941,9 +941,9 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
/*
* XXX This should be removed once TI adds wakeup/sleep
-* dependency code and data for OMAP4.
+* dependency code and data for OMAP4, TI816X.
*/
- if (cpu_is_omap44xx()) {
+ if (cpu_is_omap44xx() || cpu_is_ti816x()) {
WARN_ONCE(1, clockdomain: OMAP4 wakeup/sleep dependency
support is not yet implemented\n);
} else {
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 16dbb9e..66ad235 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -61,6 +61,8 @@ int omap_type(void)
val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
} else if (cpu_is_omap44xx()) {
val = omap_ctrl_readl(OMAP44XX_CONTROL_STATUS);
+ } else if (cpu_is_ti816x()) {
+ val = omap_ctrl_readl(TI816X_CONTROL_STATUS);
} else {
pr_err(Cannot detect omap type!\n);
goto out;
@@ -303,6 +305,26 @@ void __init omap4_check_revision(void)
pr_err(Unknown OMAP4 CPU id\n);
}
+void __init ti816x_check_revision(void)
+{
+ u32 idcode;
+ u16 partnum;
+ u8 rev;
+
+ idcode = read_tap_reg(TI816X_CONTROL_DEVICE_ID);
+ partnum = (idcode 12) 0x;
+ rev = (idcode 28) 0xff;
+
+ if ((partnum == 0xb81e) (rev == 0x0)) {
+ omap_revision = TI8168_REV_ES1_0;
+ omap_chip.oc |= CHIP_IS_TI816X;
+ pr_info(OMAP chip is TI8168\n);
+ return;
+ }
+
+ pr_err(Unknown TI816X CPU id\n);
+}
+
#define OMAP3_SHOW_FEATURE(feat) \
if (omap3_has_ ##feat())\
printk(#feat );
@@ -397,6 +419,9 @@ void __init omap2_check_revision(void)
} else if (cpu_is_omap44xx()) {
