Re: [PATCH v4 5/9] usb: dwc3: core: make dual-role work with OTG irq

2015-09-15 Thread Roger Quadros
On 06/09/15 05:20, Peter Chen wrote:
> On Wed, Sep 02, 2015 at 09:43:38AM -0500, Felipe Balbi wrote:
>> Hi,
>>
>>> +
>>> +static irqreturn_t dwc3_otg_irq(int irq, void *_dwc)
>>> +{
>>> +   struct dwc3 *dwc = _dwc;
>>> +   irqreturn_t ret = IRQ_NONE;
>>> +   u32 reg;
>>> +
>>> +   spin_lock(>lock);
>>
>> this seems unnecessary, we're already in hardirq with IRQs disabled.
>> What sort of race could we have ? (in fact, this also needs change in
>> dwc3/gadget.c).
>>
> 
> Is it possible the kernel process is accessing the content you will 
> access?
> 
When kernel process accesses the data we'll never reach here
as we're protecting it with spinlock_irqsave(), spinunlock_irqrestore().

cheers,
-roger
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Re: [PATCH v4 5/9] usb: dwc3: core: make dual-role work with OTG irq

2015-09-05 Thread Peter Chen
On Wed, Sep 02, 2015 at 09:43:38AM -0500, Felipe Balbi wrote:
> Hi,
> 
> > +
> > +static irqreturn_t dwc3_otg_irq(int irq, void *_dwc)
> > +{
> > +   struct dwc3 *dwc = _dwc;
> > +   irqreturn_t ret = IRQ_NONE;
> > +   u32 reg;
> > +
> > +   spin_lock(>lock);
> 
> this seems unnecessary, we're already in hardirq with IRQs disabled.
> What sort of race could we have ? (in fact, this also needs change in
> dwc3/gadget.c).
> 

Is it possible the kernel process is accessing the content you will 
access?

-- 

Best Regards,
Peter Chen
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Re: [PATCH v4 5/9] usb: dwc3: core: make dual-role work with OTG irq

2015-09-04 Thread Roger Quadros
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

On 03/09/15 18:51, Felipe Balbi wrote:
> Hi,
> 
> On Thu, Sep 03, 2015 at 04:52:02PM +0300, Roger Quadros wrote:
if (on) {
 -  dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
 +  /* OCTL.PeriMode = 0 */
 +  reg = dwc3_readl(dwc->regs, DWC3_OCTL);
 +  reg &= ~DWC3_OCTL_PERIMODE;
 +  dwc3_writel(dwc->regs, DWC3_OCTL, reg);
 +  /* unconditionally turn on VBUS */
 +  reg |= DWC3_OCTL_PRTPWRCTL;
 +  dwc3_writel(dwc->regs, DWC3_OCTL, reg);
/* start the HCD */
usb_otg_start_host(fsm, true);
} else {
/* stop the HCD */
usb_otg_start_host(fsm, false);
 +  /* turn off VBUS */
 +  reg = dwc3_readl(dwc->regs, DWC3_OCTL);
 +  reg &= ~DWC3_OCTL_PRTPWRCTL;
 +  dwc3_writel(dwc->regs, DWC3_OCTL, reg);
 +  /* OCTL.PeriMode = 1 */
 +  reg = dwc3_readl(dwc->regs, DWC3_OCTL);
 +  reg |= DWC3_OCTL_PERIMODE;
 +  dwc3_writel(dwc->regs, DWC3_OCTL, reg);
}
>>>
>>> it looks like you're not really following the fluxchart from SNPS
>>> documentation, see Figure 11-4 on section 11.1.4.5
>>
>> Did you mean that I'm ignoring all OTG bits (HNP/SRP/ADP)?
> 
> yes and no :-)  There's a rather complex flux chart which details how we
> switch from host to peripheral and vice versa. We need to follow that to
> the smallest details since that's what IP provider considers to be
> correct. If we deviate from that we should have very strong reasons for
> doing so and we also want big, fat, long comments in source code
> detailing why and how we're deviating :-)
> 
Understood. I'll update this accordingly.

- --
cheers,
- -roger
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Re: [PATCH v4 5/9] usb: dwc3: core: make dual-role work with OTG irq

2015-09-03 Thread Roger Quadros
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

On 02/09/15 17:43, Felipe Balbi wrote:
> Hi,
> 
> On Wed, Sep 02, 2015 at 05:24:20PM +0300, Roger Quadros wrote:
>> If the ID pin event is not available over extcon
>> then we rely on the OTG controller to provide us ID and VBUS
>> information.
>>
>> We still don't support any OTG features but just
>> dual-role operation.
>>
>> Signed-off-by: Roger Quadros 
>> ---
>>  drivers/usb/dwc3/core.c | 217 
>> 
>>  drivers/usb/dwc3/core.h |   3 +
>>  2 files changed, 205 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>> index 38b31df..632ee53 100644
>> --- a/drivers/usb/dwc3/core.c
>> +++ b/drivers/usb/dwc3/core.c
>> @@ -704,6 +704,63 @@ static int dwc3_core_get_phy(struct dwc3 *dwc)
>>  return 0;
>>  }
>>  
>> +/* Get OTG events and sync it to OTG fsm */
>> +static void dwc3_otg_fsm_sync(struct dwc3 *dwc)
>> +{
>> +u32 reg;
>> +int id, vbus;
>> +
>> +reg = dwc3_readl(dwc->regs, DWC3_OSTS);
>> +dev_dbg(dwc->dev, "otgstatus 0x%x\n", reg);
>> +
>> +id = !!(reg & DWC3_OSTS_CONIDSTS);
>> +vbus = !!(reg & DWC3_OSTS_BSESVLD);
>> +
>> +if (id != dwc->fsm->id || vbus != dwc->fsm->b_sess_vld) {
>> +dev_dbg(dwc->dev, "id %d vbus %d\n", id, vbus);
>> +dwc->fsm->id = id;
>> +dwc->fsm->b_sess_vld = vbus;
>> +usb_otg_sync_inputs(dwc->fsm);
>> +}
> 
> this guy shouldn't try to filter events here. That's what the FSM should
> be doing.

OK. I'll remove the if condition.

> 
>> +}
>> +
>> +static irqreturn_t dwc3_otg_thread_irq(int irq, void *_dwc)
>> +{
>> +struct dwc3 *dwc = _dwc;
>> +unsigned long flags;
>> +irqreturn_t ret = IRQ_NONE;
> 
> this IRQ will be disabled pretty quickly. You *always* return IRQ_NONE
> 
>> +spin_lock_irqsave(>lock, flags);
> 
> if you cache current OSTS in dwc3, you can use that instead and change
> this to a spin_lock() instead of disabling IRQs here. This device's IRQs
> are already masked anyway.

OK.

> 
>> +dwc3_otg_fsm_sync(dwc);
>> +/* unmask interrupts */
>> +dwc3_writel(dwc->regs, DWC3_OEVTEN, dwc->oevten);
>> +spin_unlock_irqrestore(>lock, flags);
>> +
>> +return ret;
>> +}
>> +
>> +static irqreturn_t dwc3_otg_irq(int irq, void *_dwc)
>> +{
>> +struct dwc3 *dwc = _dwc;
>> +irqreturn_t ret = IRQ_NONE;
>> +u32 reg;
>> +
>> +spin_lock(>lock);
> 
> this seems unnecessary, we're already in hardirq with IRQs disabled.
> What sort of race could we have ? (in fact, this also needs change in
> dwc3/gadget.c).

You're right. Will fix at both places.
> 
>> +
>> +reg = dwc3_readl(dwc->regs, DWC3_OEVT);
>> +if (reg) {
>> +dwc3_writel(dwc->regs, DWC3_OEVT, reg);
>> +/* mask interrupts till processed */
>> +dwc->oevten = dwc3_readl(dwc->regs, DWC3_OEVTEN);
>> +dwc3_writel(dwc->regs, DWC3_OEVTEN, 0);
>> +ret = IRQ_WAKE_THREAD;
>> +}
>> +
>> +spin_unlock(>lock);
>> +
>> +return ret;
>> +}
>> +
>>  /* - Dual-Role management 
>> --- */
>>  
>>  static void dwc3_drd_fsm_sync(struct dwc3 *dwc)
>> @@ -728,15 +785,44 @@ static int dwc3_drd_start_host(struct otg_fsm *fsm, 
>> int on)
>>  {
>>  struct device *dev = usb_otg_fsm_to_dev(fsm);
>>  struct dwc3 *dwc = dev_get_drvdata(dev);
>> +u32 reg;
>>  
>>  dev_dbg(dwc->dev, "%s: %d\n", __func__, on);
>> +if (dwc->edev) {
>> +if (on) {
>> +dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
>> +/* start the HCD */
>> +usb_otg_start_host(fsm, true);
>> +} else {
>> +/* stop the HCD */
>> +usb_otg_start_host(fsm, false);
>> +}
> 
>   if (on)
>   dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
>   usb_otg_start_host(fsm, on);
> 

OK.

>> +
>> +return 0;
>> +}
>> +
>> +/* switch OTG core */
>>  if (on) {
>> -dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
>> +/* OCTL.PeriMode = 0 */
>> +reg = dwc3_readl(dwc->regs, DWC3_OCTL);
>> +reg &= ~DWC3_OCTL_PERIMODE;
>> +dwc3_writel(dwc->regs, DWC3_OCTL, reg);
>> +/* unconditionally turn on VBUS */
>> +reg |= DWC3_OCTL_PRTPWRCTL;
>> +dwc3_writel(dwc->regs, DWC3_OCTL, reg);
>>  /* start the HCD */
>>  usb_otg_start_host(fsm, true);
>>  } else {
>>  /* stop the HCD */
>>  usb_otg_start_host(fsm, false);
>> +/* turn off VBUS */
>> +reg = dwc3_readl(dwc->regs, DWC3_OCTL);
>> +reg &= ~DWC3_OCTL_PRTPWRCTL;
>> +dwc3_writel(dwc->regs, DWC3_OCTL, reg);
>> +/* OCTL.PeriMode = 1 */
>> +reg = 

Re: [PATCH v4 5/9] usb: dwc3: core: make dual-role work with OTG irq

2015-09-03 Thread Felipe Balbi
Hi,

On Thu, Sep 03, 2015 at 04:52:02PM +0300, Roger Quadros wrote:
> >>if (on) {
> >> -  dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
> >> +  /* OCTL.PeriMode = 0 */
> >> +  reg = dwc3_readl(dwc->regs, DWC3_OCTL);
> >> +  reg &= ~DWC3_OCTL_PERIMODE;
> >> +  dwc3_writel(dwc->regs, DWC3_OCTL, reg);
> >> +  /* unconditionally turn on VBUS */
> >> +  reg |= DWC3_OCTL_PRTPWRCTL;
> >> +  dwc3_writel(dwc->regs, DWC3_OCTL, reg);
> >>/* start the HCD */
> >>usb_otg_start_host(fsm, true);
> >>} else {
> >>/* stop the HCD */
> >>usb_otg_start_host(fsm, false);
> >> +  /* turn off VBUS */
> >> +  reg = dwc3_readl(dwc->regs, DWC3_OCTL);
> >> +  reg &= ~DWC3_OCTL_PRTPWRCTL;
> >> +  dwc3_writel(dwc->regs, DWC3_OCTL, reg);
> >> +  /* OCTL.PeriMode = 1 */
> >> +  reg = dwc3_readl(dwc->regs, DWC3_OCTL);
> >> +  reg |= DWC3_OCTL_PERIMODE;
> >> +  dwc3_writel(dwc->regs, DWC3_OCTL, reg);
> >>}
> > 
> > it looks like you're not really following the fluxchart from SNPS
> > documentation, see Figure 11-4 on section 11.1.4.5
> 
> Did you mean that I'm ignoring all OTG bits (HNP/SRP/ADP)?

yes and no :-)  There's a rather complex flux chart which details how we
switch from host to peripheral and vice versa. We need to follow that to
the smallest details since that's what IP provider considers to be
correct. If we deviate from that we should have very strong reasons for
doing so and we also want big, fat, long comments in source code
detailing why and how we're deviating :-)

-- 
balbi


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Re: [PATCH v4 5/9] usb: dwc3: core: make dual-role work with OTG irq

2015-09-02 Thread Felipe Balbi
Hi,

On Wed, Sep 02, 2015 at 05:24:20PM +0300, Roger Quadros wrote:
> If the ID pin event is not available over extcon
> then we rely on the OTG controller to provide us ID and VBUS
> information.
> 
> We still don't support any OTG features but just
> dual-role operation.
> 
> Signed-off-by: Roger Quadros 
> ---
>  drivers/usb/dwc3/core.c | 217 
> 
>  drivers/usb/dwc3/core.h |   3 +
>  2 files changed, 205 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 38b31df..632ee53 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -704,6 +704,63 @@ static int dwc3_core_get_phy(struct dwc3 *dwc)
>   return 0;
>  }
>  
> +/* Get OTG events and sync it to OTG fsm */
> +static void dwc3_otg_fsm_sync(struct dwc3 *dwc)
> +{
> + u32 reg;
> + int id, vbus;
> +
> + reg = dwc3_readl(dwc->regs, DWC3_OSTS);
> + dev_dbg(dwc->dev, "otgstatus 0x%x\n", reg);
> +
> + id = !!(reg & DWC3_OSTS_CONIDSTS);
> + vbus = !!(reg & DWC3_OSTS_BSESVLD);
> +
> + if (id != dwc->fsm->id || vbus != dwc->fsm->b_sess_vld) {
> + dev_dbg(dwc->dev, "id %d vbus %d\n", id, vbus);
> + dwc->fsm->id = id;
> + dwc->fsm->b_sess_vld = vbus;
> + usb_otg_sync_inputs(dwc->fsm);
> + }

this guy shouldn't try to filter events here. That's what the FSM should
be doing.

> +}
> +
> +static irqreturn_t dwc3_otg_thread_irq(int irq, void *_dwc)
> +{
> + struct dwc3 *dwc = _dwc;
> + unsigned long flags;
> + irqreturn_t ret = IRQ_NONE;

this IRQ will be disabled pretty quickly. You *always* return IRQ_NONE

> + spin_lock_irqsave(>lock, flags);

if you cache current OSTS in dwc3, you can use that instead and change
this to a spin_lock() instead of disabling IRQs here. This device's IRQs
are already masked anyway.

> + dwc3_otg_fsm_sync(dwc);
> + /* unmask interrupts */
> + dwc3_writel(dwc->regs, DWC3_OEVTEN, dwc->oevten);
> + spin_unlock_irqrestore(>lock, flags);
> +
> + return ret;
> +}
> +
> +static irqreturn_t dwc3_otg_irq(int irq, void *_dwc)
> +{
> + struct dwc3 *dwc = _dwc;
> + irqreturn_t ret = IRQ_NONE;
> + u32 reg;
> +
> + spin_lock(>lock);

this seems unnecessary, we're already in hardirq with IRQs disabled.
What sort of race could we have ? (in fact, this also needs change in
dwc3/gadget.c).

> +
> + reg = dwc3_readl(dwc->regs, DWC3_OEVT);
> + if (reg) {
> + dwc3_writel(dwc->regs, DWC3_OEVT, reg);
> + /* mask interrupts till processed */
> + dwc->oevten = dwc3_readl(dwc->regs, DWC3_OEVTEN);
> + dwc3_writel(dwc->regs, DWC3_OEVTEN, 0);
> + ret = IRQ_WAKE_THREAD;
> + }
> +
> + spin_unlock(>lock);
> +
> + return ret;
> +}
> +
>  /* - Dual-Role management 
> --- */
>  
>  static void dwc3_drd_fsm_sync(struct dwc3 *dwc)
> @@ -728,15 +785,44 @@ static int dwc3_drd_start_host(struct otg_fsm *fsm, int 
> on)
>  {
>   struct device *dev = usb_otg_fsm_to_dev(fsm);
>   struct dwc3 *dwc = dev_get_drvdata(dev);
> + u32 reg;
>  
>   dev_dbg(dwc->dev, "%s: %d\n", __func__, on);
> + if (dwc->edev) {
> + if (on) {
> + dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
> + /* start the HCD */
> + usb_otg_start_host(fsm, true);
> + } else {
> + /* stop the HCD */
> + usb_otg_start_host(fsm, false);
> + }

if (on)
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
usb_otg_start_host(fsm, on);

> +
> + return 0;
> + }
> +
> + /* switch OTG core */
>   if (on) {
> - dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
> + /* OCTL.PeriMode = 0 */
> + reg = dwc3_readl(dwc->regs, DWC3_OCTL);
> + reg &= ~DWC3_OCTL_PERIMODE;
> + dwc3_writel(dwc->regs, DWC3_OCTL, reg);
> + /* unconditionally turn on VBUS */
> + reg |= DWC3_OCTL_PRTPWRCTL;
> + dwc3_writel(dwc->regs, DWC3_OCTL, reg);
>   /* start the HCD */
>   usb_otg_start_host(fsm, true);
>   } else {
>   /* stop the HCD */
>   usb_otg_start_host(fsm, false);
> + /* turn off VBUS */
> + reg = dwc3_readl(dwc->regs, DWC3_OCTL);
> + reg &= ~DWC3_OCTL_PRTPWRCTL;
> + dwc3_writel(dwc->regs, DWC3_OCTL, reg);
> + /* OCTL.PeriMode = 1 */
> + reg = dwc3_readl(dwc->regs, DWC3_OCTL);
> + reg |= DWC3_OCTL_PERIMODE;
> + dwc3_writel(dwc->regs, DWC3_OCTL, reg);
>   }

it looks like you're not really following the fluxchart from SNPS
documentation, see Figure 11-4 on section 11.1.4.5

> @@ -746,15 +832,48 

[PATCH v4 5/9] usb: dwc3: core: make dual-role work with OTG irq

2015-09-02 Thread Roger Quadros
If the ID pin event is not available over extcon
then we rely on the OTG controller to provide us ID and VBUS
information.

We still don't support any OTG features but just
dual-role operation.

Signed-off-by: Roger Quadros 
---
 drivers/usb/dwc3/core.c | 217 
 drivers/usb/dwc3/core.h |   3 +
 2 files changed, 205 insertions(+), 15 deletions(-)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 38b31df..632ee53 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -704,6 +704,63 @@ static int dwc3_core_get_phy(struct dwc3 *dwc)
return 0;
 }
 
+/* Get OTG events and sync it to OTG fsm */
+static void dwc3_otg_fsm_sync(struct dwc3 *dwc)
+{
+   u32 reg;
+   int id, vbus;
+
+   reg = dwc3_readl(dwc->regs, DWC3_OSTS);
+   dev_dbg(dwc->dev, "otgstatus 0x%x\n", reg);
+
+   id = !!(reg & DWC3_OSTS_CONIDSTS);
+   vbus = !!(reg & DWC3_OSTS_BSESVLD);
+
+   if (id != dwc->fsm->id || vbus != dwc->fsm->b_sess_vld) {
+   dev_dbg(dwc->dev, "id %d vbus %d\n", id, vbus);
+   dwc->fsm->id = id;
+   dwc->fsm->b_sess_vld = vbus;
+   usb_otg_sync_inputs(dwc->fsm);
+   }
+}
+
+static irqreturn_t dwc3_otg_thread_irq(int irq, void *_dwc)
+{
+   struct dwc3 *dwc = _dwc;
+   unsigned long flags;
+   irqreturn_t ret = IRQ_NONE;
+
+   spin_lock_irqsave(>lock, flags);
+   dwc3_otg_fsm_sync(dwc);
+   /* unmask interrupts */
+   dwc3_writel(dwc->regs, DWC3_OEVTEN, dwc->oevten);
+   spin_unlock_irqrestore(>lock, flags);
+
+   return ret;
+}
+
+static irqreturn_t dwc3_otg_irq(int irq, void *_dwc)
+{
+   struct dwc3 *dwc = _dwc;
+   irqreturn_t ret = IRQ_NONE;
+   u32 reg;
+
+   spin_lock(>lock);
+
+   reg = dwc3_readl(dwc->regs, DWC3_OEVT);
+   if (reg) {
+   dwc3_writel(dwc->regs, DWC3_OEVT, reg);
+   /* mask interrupts till processed */
+   dwc->oevten = dwc3_readl(dwc->regs, DWC3_OEVTEN);
+   dwc3_writel(dwc->regs, DWC3_OEVTEN, 0);
+   ret = IRQ_WAKE_THREAD;
+   }
+
+   spin_unlock(>lock);
+
+   return ret;
+}
+
 /* - Dual-Role management --- 
*/
 
 static void dwc3_drd_fsm_sync(struct dwc3 *dwc)
@@ -728,15 +785,44 @@ static int dwc3_drd_start_host(struct otg_fsm *fsm, int 
on)
 {
struct device *dev = usb_otg_fsm_to_dev(fsm);
struct dwc3 *dwc = dev_get_drvdata(dev);
+   u32 reg;
 
dev_dbg(dwc->dev, "%s: %d\n", __func__, on);
+   if (dwc->edev) {
+   if (on) {
+   dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
+   /* start the HCD */
+   usb_otg_start_host(fsm, true);
+   } else {
+   /* stop the HCD */
+   usb_otg_start_host(fsm, false);
+   }
+
+   return 0;
+   }
+
+   /* switch OTG core */
if (on) {
-   dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
+   /* OCTL.PeriMode = 0 */
+   reg = dwc3_readl(dwc->regs, DWC3_OCTL);
+   reg &= ~DWC3_OCTL_PERIMODE;
+   dwc3_writel(dwc->regs, DWC3_OCTL, reg);
+   /* unconditionally turn on VBUS */
+   reg |= DWC3_OCTL_PRTPWRCTL;
+   dwc3_writel(dwc->regs, DWC3_OCTL, reg);
/* start the HCD */
usb_otg_start_host(fsm, true);
} else {
/* stop the HCD */
usb_otg_start_host(fsm, false);
+   /* turn off VBUS */
+   reg = dwc3_readl(dwc->regs, DWC3_OCTL);
+   reg &= ~DWC3_OCTL_PRTPWRCTL;
+   dwc3_writel(dwc->regs, DWC3_OCTL, reg);
+   /* OCTL.PeriMode = 1 */
+   reg = dwc3_readl(dwc->regs, DWC3_OCTL);
+   reg |= DWC3_OCTL_PERIMODE;
+   dwc3_writel(dwc->regs, DWC3_OCTL, reg);
}
 
return 0;
@@ -746,15 +832,48 @@ static int dwc3_drd_start_gadget(struct otg_fsm *fsm, int 
on)
 {
struct device *dev = usb_otg_fsm_to_dev(fsm);
struct dwc3 *dwc = dev_get_drvdata(dev);
+   u32 reg;
 
dev_dbg(dwc->dev, "%s: %d\n", __func__, on);
-   if (on) {
-   dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
+   if (on)
dwc3_event_buffers_setup(dwc);
 
+   if (dwc->edev) {
+   if (on) {
+   dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
+   usb_otg_start_gadget(fsm, true);
+   } else {
+   usb_otg_start_gadget(fsm, false);
+   }
+
+   return 0;
+   }
+
+   /* switch OTG core */
+   if (on) {
+   /* OCTL.PeriMode = 1 */
+   reg = dwc3_readl(dwc->regs, DWC3_OCTL);
+   reg |= DWC3_OCTL_PERIMODE;
+