Re: [PATCHv4 08/33] ARM: dts: omap4 clock data
On 07/30/2013 10:27 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
This patch creates a unique node for each clock in the OMAP4 power,
reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly
different clock tree which is taken into account in the data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/omap443x-clocks.dtsi | 17 +
arch/arm/boot/dts/omap443x.dtsi|8 +
arch/arm/boot/dts/omap4460.dtsi|8 +
arch/arm/boot/dts/omap446x-clocks.dtsi | 27 +
arch/arm/boot/dts/omap44xx-clocks.dtsi | 1654
arch/arm/boot/dts/omap44xx-common-clocks.dtsi ?
5 files changed, 1714 insertions(+)
create mode 100644 arch/arm/boot/dts/omap443x-clocks.dtsi
create mode 100644 arch/arm/boot/dts/omap446x-clocks.dtsi
create mode 100644 arch/arm/boot/dts/omap44xx-clocks.dtsi
diff --git a/arch/arm/boot/dts/omap443x-clocks.dtsi
b/arch/arm/boot/dts/omap443x-clocks.dtsi
new file mode 100644
index 000..2bd82b2
--- /dev/null
+++ b/arch/arm/boot/dts/omap443x-clocks.dtsi
@@ -0,0 +1,17 @@
+/*
+ * Device Tree Source for OMAP443x clock data
+ *
+ * Copyright (C) 2013 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
Doing
/include/ omap44xx-clocks.dtsi might avoid including that header in
corresponding SoC dtsi,
OR:
+bandgap_fclk: bandgap_fclk@4a307888 {
+#clock-cells = 0;
+compatible = gate-clock;
+clocks = sys_32k_ck;
+bit-shift = 8;
+reg = 0x4a307888 0x4;
+};
Since we already have omap443x.dtsi and omap446x.dtsi, do we need
clock.dtsi containing just a few entries?
instead we could define the delta clocks in the clocks section, and save
on two additional files, no?
Yea, thats also possible. I didn't want to put clock nodes there though,
just for clarity. I think this is for whoever is maintaining the DTS
files to answer.
[...]
diff --git a/arch/arm/boot/dts/omap44xx-clocks.dtsi
b/arch/arm/boot/dts/omap44xx-clocks.dtsi
new file mode 100644
index 000..ed6bc9b
--- /dev/null
+++ b/arch/arm/boot/dts/omap44xx-clocks.dtsi
[...]
+dpll_abe_m2x2_ck: dpll_abe_m2x2_ck@4a0041f0 {
+#clock-cells = 0;
+compatible = divider-clock;
+clocks = dpll_abe_x2_ck;
+ti,autoidle-shift = 8;
+reg = 0x4a0041f0 0x4;
+bit-mask = 0x1f;
+index-starts-at-one;
+ti,autoidle-low;
+};
+
+abe_24m_fclk: abe_24m_fclk {
+#clock-cells = 0;
+compatible = fixed-factor-clock;
+clocks = dpll_abe_m2x2_ck;
+clock-mult = 1;
+clock-div = 8;
+};
+
+abe_clk: abe_clk@4a004108 {
+#clock-cells = 0;
+compatible = divider-clock;
+clocks = dpll_abe_m2x2_ck;
+reg = 0x4a004108 0x4;
+bit-mask = 0x3;
+index-power-of-two;
+};
+
+aess_fclk: aess_fclk@4a004528 {
is there a naming convention used here? abe_clk, fclk etc?
The clock names are directly converted from existing data, so whatever
currently is there, will be in the DT also.
+#clock-cells = 0;
+compatible = divider-clock;
+clocks = abe_clk;
+bit-shift = 24;
+reg = 0x4a004528 0x4;
+bit-mask = 0x1;
+};
[...]
+
+ocp2scp_usb_phy_phy_48m: ocp2scp_usb_phy_phy_48m@4a0093e0 {
_ck?
[...]
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Re: [PATCHv4 08/33] ARM: dts: omap4 clock data
On 07/23/2013 02:20 AM, Tero Kristo wrote:
This patch creates a unique node for each clock in the OMAP4 power,
reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly
different clock tree which is taken into account in the data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/omap443x-clocks.dtsi | 17 +
arch/arm/boot/dts/omap443x.dtsi|8 +
arch/arm/boot/dts/omap4460.dtsi|8 +
arch/arm/boot/dts/omap446x-clocks.dtsi | 27 +
arch/arm/boot/dts/omap44xx-clocks.dtsi | 1654
arch/arm/boot/dts/omap44xx-common-clocks.dtsi ?
5 files changed, 1714 insertions(+)
create mode 100644 arch/arm/boot/dts/omap443x-clocks.dtsi
create mode 100644 arch/arm/boot/dts/omap446x-clocks.dtsi
create mode 100644 arch/arm/boot/dts/omap44xx-clocks.dtsi
diff --git a/arch/arm/boot/dts/omap443x-clocks.dtsi
b/arch/arm/boot/dts/omap443x-clocks.dtsi
new file mode 100644
index 000..2bd82b2
--- /dev/null
+++ b/arch/arm/boot/dts/omap443x-clocks.dtsi
@@ -0,0 +1,17 @@
+/*
+ * Device Tree Source for OMAP443x clock data
+ *
+ * Copyright (C) 2013 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
Doing
/include/ omap44xx-clocks.dtsi might avoid including that header in
corresponding SoC dtsi,
OR:
+bandgap_fclk: bandgap_fclk@4a307888 {
+ #clock-cells = 0;
+ compatible = gate-clock;
+ clocks = sys_32k_ck;
+ bit-shift = 8;
+ reg = 0x4a307888 0x4;
+};
Since we already have omap443x.dtsi and omap446x.dtsi, do we need
clock.dtsi containing just a few entries?
instead we could define the delta clocks in the clocks section, and save
on two additional files, no?
[...]
diff --git a/arch/arm/boot/dts/omap44xx-clocks.dtsi
b/arch/arm/boot/dts/omap44xx-clocks.dtsi
new file mode 100644
index 000..ed6bc9b
--- /dev/null
+++ b/arch/arm/boot/dts/omap44xx-clocks.dtsi
[...]
+dpll_abe_m2x2_ck: dpll_abe_m2x2_ck@4a0041f0 {
+ #clock-cells = 0;
+ compatible = divider-clock;
+ clocks = dpll_abe_x2_ck;
+ ti,autoidle-shift = 8;
+ reg = 0x4a0041f0 0x4;
+ bit-mask = 0x1f;
+ index-starts-at-one;
+ ti,autoidle-low;
+};
+
+abe_24m_fclk: abe_24m_fclk {
+ #clock-cells = 0;
+ compatible = fixed-factor-clock;
+ clocks = dpll_abe_m2x2_ck;
+ clock-mult = 1;
+ clock-div = 8;
+};
+
+abe_clk: abe_clk@4a004108 {
+ #clock-cells = 0;
+ compatible = divider-clock;
+ clocks = dpll_abe_m2x2_ck;
+ reg = 0x4a004108 0x4;
+ bit-mask = 0x3;
+ index-power-of-two;
+};
+
+aess_fclk: aess_fclk@4a004528 {
is there a naming convention used here? abe_clk, fclk etc?
+ #clock-cells = 0;
+ compatible = divider-clock;
+ clocks = abe_clk;
+ bit-shift = 24;
+ reg = 0x4a004528 0x4;
+ bit-mask = 0x1;
+};
[...]
+
+ocp2scp_usb_phy_phy_48m: ocp2scp_usb_phy_phy_48m@4a0093e0 {
_ck?
[...]
--
Regards,
Nishanth Menon
--
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[PATCHv4 08/33] ARM: dts: omap4 clock data
This patch creates a unique node for each clock in the OMAP4 power,
reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly
different clock tree which is taken into account in the data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/omap443x-clocks.dtsi | 17 +
arch/arm/boot/dts/omap443x.dtsi|8 +
arch/arm/boot/dts/omap4460.dtsi|8 +
arch/arm/boot/dts/omap446x-clocks.dtsi | 27 +
arch/arm/boot/dts/omap44xx-clocks.dtsi | 1654
5 files changed, 1714 insertions(+)
create mode 100644 arch/arm/boot/dts/omap443x-clocks.dtsi
create mode 100644 arch/arm/boot/dts/omap446x-clocks.dtsi
create mode 100644 arch/arm/boot/dts/omap44xx-clocks.dtsi
diff --git a/arch/arm/boot/dts/omap443x-clocks.dtsi
b/arch/arm/boot/dts/omap443x-clocks.dtsi
new file mode 100644
index 000..2bd82b2
--- /dev/null
+++ b/arch/arm/boot/dts/omap443x-clocks.dtsi
@@ -0,0 +1,17 @@
+/*
+ * Device Tree Source for OMAP443x clock data
+ *
+ * Copyright (C) 2013 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+bandgap_fclk: bandgap_fclk@4a307888 {
+ #clock-cells = 0;
+ compatible = gate-clock;
+ clocks = sys_32k_ck;
+ bit-shift = 8;
+ reg = 0x4a307888 0x4;
+};
diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi
index bcf455e..dfd648c 100644
--- a/arch/arm/boot/dts/omap443x.dtsi
+++ b/arch/arm/boot/dts/omap443x.dtsi
@@ -30,4 +30,12 @@
0x4a00232C 0x4;
compatible = ti,omap4430-bandgap;
};
+
+ clocks {
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+ /include/ omap44xx-clocks.dtsi
+ /include/ omap443x-clocks.dtsi
+ };
};
diff --git a/arch/arm/boot/dts/omap4460.dtsi b/arch/arm/boot/dts/omap4460.dtsi
index c2f0f39..d9d00b2 100644
--- a/arch/arm/boot/dts/omap4460.dtsi
+++ b/arch/arm/boot/dts/omap4460.dtsi
@@ -38,4 +38,12 @@
interrupts = 0 126 IRQ_TYPE_LEVEL_HIGH; /* talert */
gpios = gpio3 22 0; /* tshut */
};
+
+ clocks {
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+ /include/ omap44xx-clocks.dtsi
+ /include/ omap446x-clocks.dtsi
+ };
};
diff --git a/arch/arm/boot/dts/omap446x-clocks.dtsi
b/arch/arm/boot/dts/omap446x-clocks.dtsi
new file mode 100644
index 000..86d0805
--- /dev/null
+++ b/arch/arm/boot/dts/omap446x-clocks.dtsi
@@ -0,0 +1,27 @@
+/*
+ * Device Tree Source for OMAP446x clock data
+ *
+ * Copyright (C) 2013 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+div_ts_ck: div_ts_ck@4a307888 {
+ #clock-cells = 0;
+ compatible = divider-clock;
+ clocks = l4_wkup_clk_mux_ck;
+ bit-shift = 24;
+ reg = 0x4a307888 0x4;
+ table = 8 0 , 16 1 , 32 2 ;
+ bit-mask = 0x3;
+};
+
+bandgap_ts_fclk: bandgap_ts_fclk@4a307888 {
+ #clock-cells = 0;
+ compatible = gate-clock;
+ clocks = div_ts_ck;
+ bit-shift = 8;
+ reg = 0x4a307888 0x4;
+};
diff --git a/arch/arm/boot/dts/omap44xx-clocks.dtsi
b/arch/arm/boot/dts/omap44xx-clocks.dtsi
new file mode 100644
index 000..ed6bc9b
--- /dev/null
+++ b/arch/arm/boot/dts/omap44xx-clocks.dtsi
@@ -0,0 +1,1654 @@
+/*
+ * Device Tree Source for OMAP4 clock data
+ *
+ * Copyright (C) 2013 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+extalt_clkin_ck: extalt_clkin_ck {
+ #clock-cells = 0;
+ compatible = fixed-clock;
+ clock-frequency = 5900;
+};
+
+pad_clks_src_ck: pad_clks_src_ck {
+ #clock-cells = 0;
+ compatible = fixed-clock;
+ clock-frequency = 1200;
+};
+
+pad_clks_ck: pad_clks_ck@4a004108 {
+ #clock-cells = 0;
+ compatible = gate-clock;
+ clocks = pad_clks_src_ck;
+ bit-shift = 8;
+ reg = 0x4a004108 0x4;
+};
+
+pad_slimbus_core_clks_ck: pad_slimbus_core_clks_ck {
+ #clock-cells = 0;
+ compatible = fixed-clock;
+ clock-frequency = 1200;
+};
+
+secure_32k_clk_src_ck: secure_32k_clk_src_ck {
+ #clock-cells = 0;
+ compatible = fixed-clock;
+ clock-frequency = 32768;
+};
+
+slimbus_src_clk: slimbus_src_clk {
+ #clock-cells = 0;
+ compatible = fixed-clock;
+ clock-frequency = 1200;
+};
+
+slimbus_clk: slimbus_clk@4a004108 {
+ #clock-cells = 0;
+ compatible = gate-clock;
+
