Re: [RFC 0/4] TWL external controller support
On Mon, 2011-07-11 at 14:11 +0200, Mark Brown wrote: On Mon, Jul 11, 2011 at 01:48:59PM +0300, Tero Kristo wrote: On Mon, 2011-07-11 at 12:05 +0200, Mark Brown wrote: No. Why do you want these regulators to have anything to do with the TWL4030? So, a completely new driver should be made for these? The reason I wanted to put them within TWL4030 code is that they reside inside TWL4030, and there is already some code for accessing these regulators (in the standard I2C access method) from the twl-regulator.c. Well, if they're not perceptibly part of the same chip from a control point of view and need you to provide board specific callbacks it would seem logical... Ok sounds fair enough, I'll rework this series to something like this and re-post for commenting once I hear from Graeme also. I'll add a compile time switch (or most likely use something existing) for selecting which implementation to use for VDD1 and VDD2. Thanks for comments. -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv2 0/5] OMAP SMPS regulator driver
Hello, Based on the comments for the previous version of this set, I implemented a regulator driver for the OMAP SMPS now. It could actually be moved under arch/arm/mach-omap2/ directory instead of drivers/regulator, I think it should work from there also. This would also require less hacking for the header files. Any thoughts on this? -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv2 2/5] regulator: omap smps regulator driver
OMAP SMPS regulator driver provides access to OMAP voltage processor
controlled regulators. These include VDD1 and VDD2 for OMAP3 and additionally
VDD3 for OMAP4. SMPS regulators use the OMAP voltage layer for the actual
voltage regulation operations.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/regulator/Kconfig |9 ++
drivers/regulator/Makefile |1 +
drivers/regulator/omap-smps-regulator.c | 126 +++
include/linux/regulator/omap-smps.h | 20 +
4 files changed, 156 insertions(+), 0 deletions(-)
create mode 100644 drivers/regulator/omap-smps-regulator.c
create mode 100644 include/linux/regulator/omap-smps.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index d7ed20f..bb18ff2 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -303,5 +303,14 @@ config REGULATOR_TPS65910
help
This driver supports TPS65910 voltage regulator chips.
+config REGULATOR_OMAP_SMPS
+ tristate TI OMAP SMPS Power Regulators
+ depends on (ARCH_OMAP3 || ARCH_OMAP4) PM TWL4030_CORE
+ help
+ This driver supports the OMAP3 / OMAP4 SMPS regulators for VDD1,
+ VDD2 and VDD3. These regulators reside inside the TWL4030 /
+ TWL6030 chip but are accessed using the voltage processor
+ interface of OMAP.
+
endif
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 3932d2e..191e3d5 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -43,5 +43,6 @@ obj-$(CONFIG_REGULATOR_ISL6271A) += isl6271a-regulator.o
obj-$(CONFIG_REGULATOR_AB8500) += ab8500.o
obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o
obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o
+obj-$(CONFIG_REGULATOR_OMAP_SMPS) += omap-smps-regulator.o
ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/omap-smps-regulator.c
b/drivers/regulator/omap-smps-regulator.c
new file mode 100644
index 000..88009b1
--- /dev/null
+++ b/drivers/regulator/omap-smps-regulator.c
@@ -0,0 +1,126 @@
+/*
+ * omap-vp-regulator.c -- support SMPS regulators for OMAP chips
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/kernel.h
+#include linux/module.h
+#include linux/slab.h
+#include linux/init.h
+#include linux/err.h
+#include linux/delay.h
+#include linux/platform_device.h
+#include linux/regulator/driver.h
+#include linux/regulator/machine.h
+#include linux/regulator/omap-smps.h
+#include plat/voltage.h
+
+#define DRIVER_NAMEomap-smps
+
+struct omap_smps_reg_info {
+ struct voltagedomain*voltdm;
+ struct regulator_desc desc;
+};
+
+static int omap_smps_set_voltage(struct regulator_dev *rdev, int min_uV,
+ int max_uV, unsigned *selector)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return omap_voltage_scale_vdd(info-voltdm, min_uV);
+}
+
+static int omap_smps_get_voltage(struct regulator_dev *rdev)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return omap_vp_get_curr_volt(info-voltdm);
+}
+
+static struct regulator_ops omap_smps_ops = {
+ .set_voltage= omap_smps_set_voltage,
+ .get_voltage= omap_smps_get_voltage,
+};
+
+static int __devinit omap_smps_reg_probe(struct platform_device *pdev)
+{
+ int i;
+ struct omap_smps_reg_info *info;
+ struct omap_smps_platform_data *pdata;
+ struct regulation_constraints *c;
+ struct regulator_dev*rdev;
+ struct regulator_init_data *initdata;
+ struct voltagedomain*voltdm;
+
+ pdata = pdev-dev.platform_data;
+
+ for (i = 0; i pdata-num_regulators; i++) {
+ initdata = pdata-regulators[i];
+
+ c = initdata-constraints;
+ c-valid_modes_mask = REGULATOR_MODE_NORMAL;
+ c-valid_ops_mask = REGULATOR_CHANGE_VOLTAGE;
+ c-always_on = true;
+
+ voltdm = omap_voltage_domain_lookup(
+ initdata-consumer_supplies[0].dev_name);
+
+ if (IS_ERR(voltdm)) {
+ dev_err(pdev-dev, can't find voltdm %s, %ld\n,
+ initdata-consumer_supplies[0].dev_name,
+ PTR_ERR(voltdm));
+ return PTR_ERR(voltdm);
+ }
+ info = kzalloc(sizeof(struct omap_smps_reg_info), GFP_KERNEL);
+
+ info-voltdm = voltdm;
+ info-desc.ops = omap_smps_ops;
+ info-desc.name = c-name
[PATCHv2 1/5] OMAP: move voltage.h and vp.h under platform include directory
This is needed so that these include files can be accessed from drivers. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/mach-omap2/omap_opp_data.h |3 +- arch/arm/mach-omap2/omap_twl.c|2 +- arch/arm/mach-omap2/pm.c |2 +- arch/arm/mach-omap2/smartreflex.h |2 +- arch/arm/mach-omap2/sr_device.c |2 +- arch/arm/mach-omap2/vc3xxx_data.c |2 +- arch/arm/mach-omap2/vc44xx_data.c |2 +- arch/arm/mach-omap2/voltage.c |4 +- arch/arm/mach-omap2/voltage.h | 184 - arch/arm/mach-omap2/voltagedomains3xxx_data.c |3 +- arch/arm/mach-omap2/voltagedomains44xx_data.c |3 +- arch/arm/mach-omap2/vp.h | 143 --- arch/arm/mach-omap2/vp3xxx_data.c |4 +- arch/arm/mach-omap2/vp44xx_data.c |4 +- arch/arm/plat-omap/include/plat/voltage.h | 183 arch/arm/plat-omap/include/plat/vp.h | 143 +++ 16 files changed, 338 insertions(+), 348 deletions(-) delete mode 100644 arch/arm/mach-omap2/voltage.h delete mode 100644 arch/arm/mach-omap2/vp.h create mode 100644 arch/arm/plat-omap/include/plat/voltage.h create mode 100644 arch/arm/plat-omap/include/plat/vp.h diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h index c784c12..4d93209 100644 --- a/arch/arm/mach-omap2/omap_opp_data.h +++ b/arch/arm/mach-omap2/omap_opp_data.h @@ -20,8 +20,7 @@ #define __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H #include plat/omap_hwmod.h - -#include voltage.h +#include plat/voltage.h /* * *BIG FAT WARNING*: diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 07d6140..ffe7e5c 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -18,7 +18,7 @@ #include linux/kernel.h #include linux/i2c/twl.h -#include voltage.h +#include plat/voltage.h #include pm.h diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index ce1a9f3..26ff6fa 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -18,8 +18,8 @@ #include plat/omap-pm.h #include plat/omap_device.h #include plat/common.h +#include plat/voltage.h -#include voltage.h #include powerdomain.h #include clockdomain.h #include pm.h diff --git a/arch/arm/mach-omap2/smartreflex.h b/arch/arm/mach-omap2/smartreflex.h index 5f35b9e..fe9b242 100644 --- a/arch/arm/mach-omap2/smartreflex.h +++ b/arch/arm/mach-omap2/smartreflex.h @@ -22,7 +22,7 @@ #include linux/platform_device.h -#include voltage.h +#include plat/voltage.h /* * Different Smartreflex IPs version. The v1 is the 65nm version used in diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index 10d3c5e..a636604 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c @@ -23,9 +23,9 @@ #include linux/io.h #include plat/omap_device.h +#include plat/voltage.h #include smartreflex.h -#include voltage.h #include control.h #include pm.h diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c index f37dc4b..7df566c 100644 --- a/arch/arm/mach-omap2/vc3xxx_data.c +++ b/arch/arm/mach-omap2/vc3xxx_data.c @@ -19,9 +19,9 @@ #include linux/init.h #include plat/common.h +#include plat/voltage.h #include prm-regbits-34xx.h -#include voltage.h #include vc.h diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index a98da8d..7a69821 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -19,10 +19,10 @@ #include linux/init.h #include plat/common.h +#include plat/voltage.h #include prm44xx.h #include prm-regbits-44xx.h -#include voltage.h #include vc.h diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 9ef3789..7e3c512 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -27,6 +27,7 @@ #include linux/slab.h #include plat/common.h +#include plat/voltage.h #include prm-regbits-34xx.h #include prm-regbits-44xx.h @@ -35,10 +36,7 @@ #include prminst44xx.h #include control.h -#include voltage.h - #include vc.h -#include vp.h #define VOLTAGE_DIR_SIZE 16 diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h deleted file mode 100644 index e9f5408..000 --- a/arch/arm/mach-omap2/voltage.h +++ /dev/null @@ -1,184 +0,0 @@ -/* - * OMAP Voltage Management Routines - * - * Author: Thara Gopinath th...@ti.com - * - * Copyright (C) 2009 Texas Instruments, Inc. - * Thara Gopinath th...@ti.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
[PATCHv2 3/5] omap3: beagle: instantiate smps regulators
VDD1 and VDD2 are now available. This requires SMPS regulator driver to work.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 53 +++
1 files changed, 53 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 78cf5f2..d7ae648 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -31,6 +31,7 @@
#include linux/mmc/host.h
#include linux/regulator/machine.h
+#include linux/regulator/omap-smps.h
#include linux/i2c/twl.h
#include mach/hardware.h
@@ -274,6 +275,15 @@ static struct regulator_consumer_supply
beagle_vsim_supply[] = {
REGULATOR_SUPPLY(vmmc_aux, omap_hsmmc.0),
};
+static struct regulator_consumer_supply beagle_smps1_supply[] = {
+ REGULATOR_SUPPLY(vcc, mpu),
+};
+
+static struct regulator_consumer_supply beagle_smps2_supply[] = {
+ REGULATOR_SUPPLY(vcc, core),
+};
+
+
static struct gpio_led gpio_leds[];
static int beagle_twl_gpio_setup(struct device *dev,
@@ -400,6 +410,30 @@ static struct regulator_init_data beagle_vpll2 = {
.consumer_supplies = beagle_vdvi_supplies,
};
+static struct regulator_init_data beagle_smps1 = {
+ .constraints = {
+ .name = VDD1,
+ .min_uV = 60,
+ .max_uV = 145,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(beagle_smps1_supply),
+ .consumer_supplies = beagle_smps1_supply,
+};
+
+static struct regulator_init_data beagle_smps2 = {
+ .constraints = {
+ .name = VDD2,
+ .min_uV = 60,
+ .max_uV = 145,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(beagle_smps2_supply),
+ .consumer_supplies = beagle_smps2_supply,
+};
+
static struct twl4030_usb_data beagle_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
@@ -425,6 +459,16 @@ static struct twl4030_platform_data beagle_twldata = {
.vpll2 = beagle_vpll2,
};
+static struct regulator_init_data *beagle_smps_reg_list[] = {
+ beagle_smps1,
+ beagle_smps2,
+};
+
+static struct omap_smps_platform_data beagle_smps_info = {
+ .regulators = beagle_smps_reg_list,
+ .num_regulators = ARRAY_SIZE(beagle_smps_reg_list),
+};
+
static struct i2c_board_info __initdata beagle_i2c_eeprom[] = {
{
I2C_BOARD_INFO(eeprom, 0x50),
@@ -494,6 +538,14 @@ static struct platform_device keys_gpio = {
},
};
+static struct platform_device beagle_smps = {
+ .name = omap-smps,
+ .id = -1,
+ .dev= {
+ .platform_data = beagle_smps_info,
+ },
+};
+
static void __init omap3_beagle_init_early(void)
{
omap2_init_common_infrastructure();
@@ -509,6 +561,7 @@ static void __init omap3_beagle_init_irq(void)
static struct platform_device *omap3_beagle_devices[] __initdata = {
leds_gpio,
keys_gpio,
+ beagle_smps,
};
static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
--
1.7.4.1
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Kotipaikka: Helsinki
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[PATCHv2 4/5] TEMP: OMAP3: beagle rev-c4: enable OPP6
Beagleboard rev-c4 has a speed sorted OMAP3530 chip which can run at 720MHz.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 32 +++
arch/arm/mach-omap2/opp3xxx_data.c |4 +++
2 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index d7ae648..5ab507d 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -592,6 +592,38 @@ static void __init beagle_opp_init(void)
return;
}
+ /* Custom OPP enabled for C4 */
+ if (omap3_beagle_version == OMAP3BEAGLE_BOARD_C4) {
+ struct omap_hwmod *mh = omap_hwmod_lookup(mpu);
+ struct omap_hwmod *dh = omap_hwmod_lookup(iva);
+ struct device *dev;
+
+ if (!mh || !dh) {
+ pr_err(%s: Aiee.. no mpu/dsp devices? %p %p\n,
+ __func__, mh, dh);
+ }
+ /* Enable MPU 720MHz opp */
+ dev = mh-od-pdev.dev;
+ r = opp_enable(dev, 72000);
+
+ /* Enable IVA 520MHz opp */
+ dev = dh-od-pdev.dev;
+ r |= opp_enable(dev, 52000);
+
+ if (r) {
+ pr_err(%s: failed to enable higher opp %d\n,
+ __func__, r);
+ /*
+* Cleanup - disable the higher freqs - we dont care
+* about the results
+*/
+ dev = mh-od-pdev.dev;
+ opp_disable(dev, 72000);
+ dev = dh-od-pdev.dev;
+ opp_disable(dev, 52000);
+ }
+ }
+
/* Custom OPP enabled for all xM versions */
if (cpu_is_omap3630()) {
struct omap_hwmod *mh = omap_hwmod_lookup(mpu);
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c
b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..a0f5fe1 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -98,6 +98,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[]
= {
OPP_INITIALIZER(mpu, true, 55000, OMAP3430_VDD_MPU_OPP4_UV),
/* MPU OPP5 */
OPP_INITIALIZER(mpu, true, 6, OMAP3430_VDD_MPU_OPP5_UV),
+ /* MPU OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER(mpu, false, 72000, OMAP3430_VDD_MPU_OPP5_UV),
/*
* L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
@@ -123,6 +125,8 @@ static struct omap_opp_def __initdata
omap34xx_opp_def_list[] = {
OPP_INITIALIZER(iva, true, 4, OMAP3430_VDD_MPU_OPP4_UV),
/* DSP OPP5 */
OPP_INITIALIZER(iva, true, 43000, OMAP3430_VDD_MPU_OPP5_UV),
+ /* DSP OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER(iva, false, 52000, OMAP3430_VDD_MPU_OPP5_UV),
};
static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv2 5/5] omap: voltage: changed parameter of omap_voltage_lookup to const
This fixes a couple of compilation warnings with OMAP SMPS regulator
driver.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/voltage.c |2 +-
arch/arm/plat-omap/include/plat/voltage.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 7e3c512..832fa7a 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -1036,7 +1036,7 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
* a pointer to the voltage domain structure corresponding to the
* VDDname. Else retuns error pointer.
*/
-struct voltagedomain *omap_voltage_domain_lookup(char *name)
+struct voltagedomain *omap_voltage_domain_lookup(const char *name)
{
int i;
diff --git a/arch/arm/plat-omap/include/plat/voltage.h
b/arch/arm/plat-omap/include/plat/voltage.h
index 46573bf..76d314c 100644
--- a/arch/arm/plat-omap/include/plat/voltage.h
+++ b/arch/arm/plat-omap/include/plat/voltage.h
@@ -159,7 +159,7 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm,
void omap_change_voltscale_method(struct voltagedomain *voltdm,
int voltscale_method);
/* API to get the voltagedomain pointer */
-struct voltagedomain *omap_voltage_domain_lookup(char *name);
+struct voltagedomain *omap_voltage_domain_lookup(const char *name);
int omap_voltage_late_init(void);
#else
--
1.7.4.1
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Kotipaikka: Helsinki
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Re: [PATCHv2 2/5] regulator: omap smps regulator driver
On Wed, 2011-07-13 at 16:40 +0200, Mark Brown wrote:
On Wed, Jul 13, 2011 at 05:00:35PM +0300, Tero Kristo wrote:
+config REGULATOR_OMAP_SMPS
+ tristate TI OMAP SMPS Power Regulators
+ depends on (ARCH_OMAP3 || ARCH_OMAP4) PM TWL4030_CORE
What is the dependency on the TWL4030? I see no references to it in the
code...
Hmm, true... I was mainly thinking about the HW setup where we usually
have a TWL family chip which is controlled by the SMPS regulator driver.
I think that one can actually be dropped as it might be possible to use
some other power IC behind the SMPS channels. I think I'll remove all
the references to TWL4030 / TWL6030 from this patch.
+ for (i = 0; i pdata-num_regulators; i++) {
+ initdata = pdata-regulators[i];
+
I do strongly prefer the idiom of just registering all the regulators
even if they're read only.
Number of available SMPS regulators is kind of board specific issue.
OMAP3 has 2 available, OMAP4 has 3. If we are using some custom powering
solution, we might have even different amounts for these.
+ c = initdata-constraints;
+ c-valid_modes_mask = REGULATOR_MODE_NORMAL;
+ c-valid_ops_mask = REGULATOR_CHANGE_VOLTAGE;
+ c-always_on = true;
No, this is bad. We *always* pay attention to the constraints the user
set even if they're nuts or won't work, the machine driver has the final
say on what is or isn't allowed on a given board. The mode setting is
especially suspect as there's no mode support in the driver.
Just a clarification on this one that I have understood your comment
right... Do you mean that I should be checking the constraints user sets
more thoroughly to see if there is something bogus? I was looking at
some of the other regulator drivers and they seem to be fiddling with
the constraints in similar manner.
-Tero
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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RE: [PATCHv2 4/5] TEMP: OMAP3: beagle rev-c4: enable OPP6
On Wed, 2011-07-13 at 19:49 +0200, Premi, Sanjeev wrote:
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Kristo, Tero
Sent: Wednesday, July 13, 2011 7:31 PM
To: linux-omap@vger.kernel.org
Cc: broo...@opensource.wolfsonmicro.com; Girdwood, Liam; Hilman, Kevin
Subject: [PATCHv2 4/5] TEMP: OMAP3: beagle rev-c4: enable OPP6
Beagleboard rev-c4 has a speed sorted OMAP3530 chip which can
run at 720MHz.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 32
+++
arch/arm/mach-omap2/opp3xxx_data.c |4 +++
2 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index d7ae648..5ab507d 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -592,6 +592,38 @@ static void __init beagle_opp_init(void)
return;
}
+ /* Custom OPP enabled for C4 */
+ if (omap3_beagle_version == OMAP3BEAGLE_BOARD_C4) {
+ struct omap_hwmod *mh = omap_hwmod_lookup(mpu);
+ struct omap_hwmod *dh = omap_hwmod_lookup(iva);
+ struct device *dev;
+
+ if (!mh || !dh) {
+ pr_err(%s: Aiee.. no mpu/dsp devices? %p %p\n,
+ __func__, mh, dh);
+ }
+ /* Enable MPU 720MHz opp */
+ dev = mh-od-pdev.dev;
+ r = opp_enable(dev, 72000);
+
+ /* Enable IVA 520MHz opp */
+ dev = dh-od-pdev.dev;
+ r |= opp_enable(dev, 52000);
+
+ if (r) {
+ pr_err(%s: failed to enable higher opp %d\n,
+ __func__, r);
+ /*
+* Cleanup - disable the higher freqs -
we dont care
+* about the results
+*/
+ dev = mh-od-pdev.dev;
+ opp_disable(dev, 72000);
+ dev = dh-od-pdev.dev;
+ opp_disable(dev, 52000);
+ }
+ }
+
/* Custom OPP enabled for all xM versions */
if (cpu_is_omap3630()) {
struct omap_hwmod *mh = omap_hwmod_lookup(mpu);
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c
b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..a0f5fe1 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -98,6 +98,8 @@ static struct omap_opp_def __initdata
omap34xx_opp_def_list[] = {
OPP_INITIALIZER(mpu, true, 55000,
OMAP3430_VDD_MPU_OPP4_UV),
/* MPU OPP5 */
OPP_INITIALIZER(mpu, true, 6,
OMAP3430_VDD_MPU_OPP5_UV),
+ /* MPU OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER(mpu, false, 72000,
OMAP3430_VDD_MPU_OPP5_UV),
/*
* L3 OPP1 - 41.5 MHz is disabled because: The voltage
for that OPP is
@@ -123,6 +125,8 @@ static struct omap_opp_def __initdata
omap34xx_opp_def_list[] = {
OPP_INITIALIZER(iva, true, 4,
OMAP3430_VDD_MPU_OPP4_UV),
/* DSP OPP5 */
OPP_INITIALIZER(iva, true, 43000,
OMAP3430_VDD_MPU_OPP5_UV),
+ /* DSP OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER(iva, false, 52000,
OMAP3430_VDD_MPU_OPP5_UV),
};
static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
[sp] Basic support for 720MHz was already closed early this year.
See: http://marc.info/?l=linux-omapm=129735630928696w=2
I cannot check the current tree status right now; but I assume
the patch should already be in.
Yea, I heard this was agreed upon, however it is not in the tree yet.
Thus I just added this patch in the set for testing purposes... and
tagged as TEMP.
~sanjeev
--
1.7.4.1
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0115040-6. Kotipaikka: Helsinki
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Re: [PATCHv2 2/5] regulator: omap smps regulator driver
On Thu, 2011-07-14 at 08:29 +0200, Todd Poynor wrote:
On Wed, Jul 13, 2011 at 05:00:35PM +0300, Tero Kristo wrote:
OMAP SMPS regulator driver provides access to OMAP voltage processor
controlled regulators. These include VDD1 and VDD2 for OMAP3 and
additionally
VDD3 for OMAP4. SMPS regulators use the OMAP voltage layer for the actual
voltage regulation operations.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
...
+ for (i = 0; i pdata-num_regulators; i++) {
+ initdata = pdata-regulators[i];
+
+ c = initdata-constraints;
+ c-valid_modes_mask = REGULATOR_MODE_NORMAL;
+ c-valid_ops_mask = REGULATOR_CHANGE_VOLTAGE;
+ c-always_on = true;
+
+ voltdm = omap_voltage_domain_lookup(
+ initdata-consumer_supplies[0].dev_name);
+
+ if (IS_ERR(voltdm)) {
+ dev_err(pdev-dev, can't find voltdm %s, %ld\n,
+ initdata-consumer_supplies[0].dev_name,
+ PTR_ERR(voltdm));
+ return PTR_ERR(voltdm);
Or maybe continue to next loop iteration.
Not sure about this. If one of the regulators fails, it is probably
better to fail/disable them all, otherwise we end up in partly
functioning situation. I think I'll just change this into a setup where
all the SMPS regulators are disabled if init of any of them fails.
+ }
+ info = kzalloc(sizeof(struct omap_smps_reg_info), GFP_KERNEL);
+
+ info-voltdm = voltdm;
Check kzalloc NULL return.
True.
+ info-desc.ops = omap_smps_ops;
+ info-desc.name = c-name;
+ info-desc.type = REGULATOR_VOLTAGE;
+ info-desc.n_voltages = 0;
+ rdev = regulator_register(info-desc, pdev-dev, initdata,
+ info);
+ if (IS_ERR(rdev)) {
+ dev_err(pdev-dev, can't register %s, %ld\n,
+ info-desc.name, PTR_ERR(rdev));
+ return PTR_ERR(rdev);
Or suggest continue to next loop iteration.
Same as above continue comment.
+ }
+ platform_set_drvdata(pdev, rdev);
Performed in a loop, but only last iteration's rdev is set as the
driver data for pdev. Platform driver data should be pdata?
I'll check what the cleanup part needs and fix it.
+ }
+
+ return 0;
+}
+
+static int omap_smps_reg_remove(struct platform_device *pdev)
+{
+ regulator_unregister(platform_get_drvdata(pdev));
Should kfree() the struct omap_smps_reg_info data structure(s) and
platform_set_drvdata(pdev, NULL) ?
Same as above.
Todd
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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Re: [PATCHv2 0/5] OMAP SMPS regulator driver
On Thu, 2011-07-14 at 02:22 +0200, Hilman, Kevin wrote: Hi Tero, Tero Kristo t-kri...@ti.com writes: Based on the comments for the previous version of this set, I implemented a regulator driver for the OMAP SMPS now. Could you rebase this on my pm-wip/voltdm branch where I've started the work to separate out the VC/VP layers into their own files. I'll do this for next version. I've just rebased that branch on top of current l-o master, so it also includes all the PRCM core code changes queued for v3.1. Thanks, Kevin Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 2/5] regulator: omap smps regulator driver
On Thu, 2011-07-14 at 00:55 +0200, Mark Brown wrote: On Wed, Jul 13, 2011 at 06:53:45PM +0300, Tero Kristo wrote: On Wed, 2011-07-13 at 16:40 +0200, Mark Brown wrote: I do strongly prefer the idiom of just registering all the regulators even if they're read only. Number of available SMPS regulators is kind of board specific issue. OMAP3 has 2 available, OMAP4 has 3. If we are using some custom powering solution, we might have even different amounts for these. Right, but the interface to them is always there? The library used in this driver will attempt to lookup for the voltagedomains, and this will fail for 'iva' on omap3, as it does not exist. I could change the driver to always try to look for all of the possible known domains, and just register the ones it finds, and apply user settings for the ones that board file provides. This contradicts now a bit on the comment I just said to Todd, but you believe this to be a better way? No, this is bad. We *always* pay attention to the constraints the user set even if they're nuts or won't work, the machine driver has the final say on what is or isn't allowed on a given board. The mode setting is especially suspect as there's no mode support in the driver. Just a clarification on this one that I have understood your comment right... Do you mean that I should be checking the constraints user sets more thoroughly to see if there is something bogus? I was looking at some of the other regulator drivers and they seem to be fiddling with the constraints in similar manner. No! You should *always* use the constraints the user has set, don't randomly add new permissions without them doing so. Ah ok, so no fiddling with the constraints at all, core should take care of proper functioning regarding this part. -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv5 01/11] OMAP: prcm: switch to a chained IRQ handler mechanism
On Fri, 2011-07-15 at 18:40 +0200, Todd Poynor wrote:
On Tue, Jul 05, 2011 at 01:27:47PM +0300, Tero Kristo wrote:
Introduce a chained interrupt handler mechanism for the PRCM
interrupt, so that individual PRCM event can cleanly be handled by
handlers in separate drivers. We do this by introducing PRCM event
names, which are then matched to the particular PRCM interrupt bit
depending on the specific OMAP SoC being used.
arch/arm/mach-omap2/prcm.c implements the chained interrupt mechanism
itself, with individual PRCM events for OMAP3 and OMAP4 being
described in arch/arm/mach-omap2/prcm3xxx.c and
arch/arm/mach-omap2/prcm4xxx.c respectively. At initialization time,
the set of PRCM events is filtered against the SoC on which we are
running, keeping only the ones that are actually useful. All the logic
is written to be generic with regard to OMAP3/OMAP4, even though OMAP3
has single PRCM event registers and OMAP4 has two PRCM event
registers.
...
+
+ prcm_wkup_irq = omap_prcm_event_to_irq(wkup);
+ prcm_io_irq = omap_prcm_event_to_irq(io);
Should check error return for both.
Not needed, the next calls for request_irq will fail if these do not
succeed (attempting to request irq with invalid number.)
Rest of the return value checks I can add to the next version of this
set.
+
+ ret = request_irq(prcm_wkup_irq, _prcm_int_handle_wakeup,
+ IRQF_NO_SUSPEND | IRQF_DISABLED, prcm_wkup, NULL);
...
+ for (i = 0; i = max_irq / 32; i++) {
+ gc = irq_alloc_generic_chip(PRCM, 1,
+ irq_setup-base_irq + i * 32, NULL, handle_level_irq);
+
Should check NULL return for out of memory.
+ ct = gc-chip_types;
...
+ /* Copy setup from __initdata section */
+ irq_setup = kmalloc(sizeof(struct omap_prcm_irq_setup), GFP_KERNEL);
Check NULL return.
+ memcpy(irq_setup, setup, sizeof(struct omap_prcm_irq_setup));
+
+ irqs = kmalloc(sizeof(struct omap_prcm_irq) *
+ setup-num_irqs, GFP_KERNEL);
Check NULL return.
+ memcpy(irqs, setup-irqs, sizeof(struct omap_prcm_irq) *
+ setup-num_irqs);
Todd
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv3 0/6] OMAP SMPS regulator driver
Hello, Main changes compared to v2: - cleanup should now work better - register all available regulators always, if no initdata = readonly - added board init support functionality to twl-common - constraints not touched by the driver anymore Tested on omap3 beagle. -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv3 1/6] OMAP: move voltage.h and vp.h under platform include directory
This is needed so that these include files can be accessed from drivers.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/voltage.h | 180 -
arch/arm/mach-omap2/vp.h | 128
arch/arm/plat-omap/include/plat/voltage.h | 179
arch/arm/plat-omap/include/plat/vp.h | 128
4 files changed, 307 insertions(+), 308 deletions(-)
delete mode 100644 arch/arm/mach-omap2/voltage.h
delete mode 100644 arch/arm/mach-omap2/vp.h
create mode 100644 arch/arm/plat-omap/include/plat/voltage.h
create mode 100644 arch/arm/plat-omap/include/plat/vp.h
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
deleted file mode 100644
index 38a0145..000
--- a/arch/arm/mach-omap2/voltage.h
+++ /dev/null
@@ -1,180 +0,0 @@
-/*
- * OMAP Voltage Management Routines
- *
- * Author: Thara Gopinath th...@ti.com
- *
- * Copyright (C) 2009 Texas Instruments, Inc.
- * Thara Gopinath th...@ti.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
-#define __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
-
-#include linux/err.h
-
-#include vc.h
-#include vp.h
-
-struct powerdomain;
-
-/* XXX document */
-#define VOLTSCALE_VPFORCEUPDATE1
-#define VOLTSCALE_VCBYPASS 2
-
-/*
- * OMAP3 GENERIC setup times. Revisit to see if these needs to be
- * passed from board or PMIC file
- */
-#define OMAP3_CLKSETUP 0xff
-#define OMAP3_VOLTOFFSET 0xff
-#define OMAP3_VOLTSETUP2 0xff
-
-/**
- * struct omap_vfsm_instance - per-voltage manager FSM register/bitfield
- * data
- * @voltsetup_mask: SETUP_TIME* bitmask in the PRM_VOLTSETUP* register
- * @voltsetup_reg: register offset of PRM_VOLTSETUP from PRM base
- * @voltsetup_shift: SETUP_TIME* field shift in the PRM_VOLTSETUP* register
- *
- * XXX What about VOLTOFFSET/VOLTCTRL?
- * XXX It is not necessary to have both a _mask and a _shift for the same
- * bitfield - remove one!
- */
-struct omap_vfsm_instance {
- u32 voltsetup_mask;
- u8 voltsetup_reg;
- u8 voltsetup_shift;
-};
-
-/**
- * struct voltagedomain - omap voltage domain global structure.
- * @name: Name of the voltage domain which can be used as a unique identifier.
- * @scalable: Whether or not this voltage domain is scalable
- * @node: list_head linking all voltage domains
- * @pwrdm_node: list_head linking all powerdomains in this voltagedomain
- * @vdd: to be removed
- * @pwrdms: powerdomains in this voltagedomain
- * @scale: function used to scale the voltage of the voltagedomain
- * @curr_volt: current nominal voltage for this voltage domain
- */
-struct voltagedomain {
- char *name;
- bool scalable;
- struct list_head node;
- struct list_head pwrdm_list;
- struct omap_vc_channel *vc;
- const struct omap_vfsm_instance *vfsm;
- struct omap_vp_instance *vp;
- struct omap_voltdm_pmic *pmic;
-
- /* VC/VP register access functions: SoC specific */
- u32 (*read) (u8 offset);
- void (*write) (u32 val, u8 offset);
- u32 (*rmw)(u32 mask, u32 bits, u8 offset);
-
- union {
- const char *name;
- u32 rate;
- } sys_clk;
-
- int (*scale) (struct voltagedomain *voltdm,
- unsigned long target_volt);
- u32 curr_volt;
- struct omap_volt_data *volt_data;
-};
-
-/**
- * struct omap_volt_data - Omap voltage specific data.
- * @voltage_nominal: The possible voltage value in uV
- * @sr_efuse_offs: The offset of the efuse register(from system
- * control module base address) from where to read
- * the n-target value for the smartreflex module.
- * @sr_errminlimit:Error min limit value for smartreflex. This value
- * differs at differnet opp and thus is linked
- * with voltage.
- * @vp_errorgain: Error gain value for the voltage processor. This
- * field also differs according to the voltage/opp.
- */
-struct omap_volt_data {
- u32 volt_nominal;
- u32 sr_efuse_offs;
- u8 sr_errminlimit;
- u8 vp_errgain;
-};
-
-/**
- * struct omap_voltdm_pmic - PMIC specific data required by voltage driver.
- * @slew_rate: PMIC slew rate (in uv/us)
- * @step_size: PMIC voltage step size (in uv)
- * @i2c_high_speed: whether VC uses I2C high-speed mode to PMIC
- * @i2c_mcode: master code value for I2C high-speed preamble transmission
- * @vsel_to_uv:PMIC API to convert vsel value to actual voltage in uV.
- * @uv_to_vsel:PMIC API to convert voltage in uV to vsel value.
- */
-struct omap_voltdm_pmic {
- int slew_rate;
- int step_size
[PATCHv3 2/6] omap: voltage: change code to use new location of voltage.h and vp.h
These are now under plat-omap/include/plat. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/mach-omap2/io.c |2 +- arch/arm/mach-omap2/omap_opp_data.h |3 +-- arch/arm/mach-omap2/omap_twl.c|2 +- arch/arm/mach-omap2/pm.c |2 +- arch/arm/mach-omap2/powerdomain.h |3 +-- arch/arm/mach-omap2/prm2xxx_3xxx.c|3 +-- arch/arm/mach-omap2/prm44xx.c |2 +- arch/arm/mach-omap2/smartreflex.h |2 +- arch/arm/mach-omap2/sr_device.c |2 +- arch/arm/mach-omap2/vc.c |2 +- arch/arm/mach-omap2/vc3xxx_data.c |2 +- arch/arm/mach-omap2/vc44xx_data.c |2 +- arch/arm/mach-omap2/voltage.c |3 +-- arch/arm/mach-omap2/voltagedomains2xxx_data.c |2 +- arch/arm/mach-omap2/voltagedomains3xxx_data.c |3 +-- arch/arm/mach-omap2/voltagedomains44xx_data.c |3 +-- arch/arm/mach-omap2/vp.c |4 ++-- arch/arm/mach-omap2/vp3xxx_data.c |3 +-- arch/arm/mach-omap2/vp44xx_data.c |4 +--- 19 files changed, 20 insertions(+), 29 deletions(-) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 4c8a5de..b151fca 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -31,6 +31,7 @@ #include plat/sram.h #include plat/sdrc.h #include plat/serial.h +#include plat/voltage.h #include clock2xxx.h #include clock3xxx.h @@ -38,7 +39,6 @@ #include io.h #include plat/omap-pm.h -#include voltage.h #include powerdomain.h #include clockdomain.h diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h index c784c12..4d93209 100644 --- a/arch/arm/mach-omap2/omap_opp_data.h +++ b/arch/arm/mach-omap2/omap_opp_data.h @@ -20,8 +20,7 @@ #define __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H #include plat/omap_hwmod.h - -#include voltage.h +#include plat/voltage.h /* * *BIG FAT WARNING*: diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index f515a1a..b9720a0 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -18,7 +18,7 @@ #include linux/kernel.h #include linux/i2c/twl.h -#include voltage.h +#include plat/voltage.h #include pm.h diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 659e400..699d347 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -18,8 +18,8 @@ #include plat/omap-pm.h #include plat/omap_device.h #include plat/common.h +#include plat/voltage.h -#include voltage.h #include powerdomain.h #include clockdomain.h #include pm.h diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index 2c685a5..2ae9236 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -23,8 +23,7 @@ #include linux/atomic.h #include plat/cpu.h - -#include voltage.h +#include plat/voltage.h /* Powerdomain basic power states */ #define PWRDM_POWER_OFF0x0 diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 3b83763..e096c76 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -19,8 +19,7 @@ #include plat/common.h #include plat/cpu.h #include plat/prcm.h - -#include vp.h +#include plat/vp.h #include prm2xxx_3xxx.h #include cm2xxx_3xxx.h diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 495a31a..5979803 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -20,8 +20,8 @@ #include plat/common.h #include plat/cpu.h #include plat/prcm.h +#include plat/vp.h -#include vp.h #include prm44xx.h #include prm-regbits-44xx.h #include prcm44xx.h diff --git a/arch/arm/mach-omap2/smartreflex.h b/arch/arm/mach-omap2/smartreflex.h index 5f35b9e..fe9b242 100644 --- a/arch/arm/mach-omap2/smartreflex.h +++ b/arch/arm/mach-omap2/smartreflex.h @@ -22,7 +22,7 @@ #include linux/platform_device.h -#include voltage.h +#include plat/voltage.h /* * Different Smartreflex IPs version. The v1 is the 65nm version used in diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index 2782d3f..bc08751 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c @@ -23,9 +23,9 @@ #include linux/io.h #include plat/omap_device.h +#include plat/voltage.h #include smartreflex.h -#include voltage.h #include control.h #include pm.h diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index aa9f0bc..2c8bc24 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -3,8 +3,8 @@ #include linux/init.h #include plat/cpu.h +#include plat/voltage.h -#include voltage.h #include vc.h #include prm-regbits-34xx.h #include prm-regbits-44xx.h diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch
[PATCHv3 3/6] regulator: omap smps regulator driver
OMAP SMPS regulator driver provides access to OMAP voltage processor
controlled regulators. These include VDD_MPU and VDD_CORE for OMAP3 and
additionally VDD_IVA for OMAP4. SMPS regulators use the OMAP voltage
layer for the actual voltage regulation operations.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Kevin Hilman khil...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Todd Poynor toddpoy...@google.com
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Liam Girdwood l...@ti.com
---
drivers/regulator/Kconfig |9 ++
drivers/regulator/Makefile |1 +
drivers/regulator/omap-smps-regulator.c | 180 +++
include/linux/regulator/omap-smps.h | 20
4 files changed, 210 insertions(+), 0 deletions(-)
create mode 100644 drivers/regulator/omap-smps-regulator.c
create mode 100644 include/linux/regulator/omap-smps.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index d7ed20f..bb18ff2 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -303,5 +303,14 @@ config REGULATOR_TPS65910
help
This driver supports TPS65910 voltage regulator chips.
+config REGULATOR_OMAP_SMPS
+ tristate TI OMAP SMPS Power Regulators
+ depends on (ARCH_OMAP3 || ARCH_OMAP4) PM TWL4030_CORE
+ help
+ This driver supports the OMAP3 / OMAP4 SMPS regulators for VDD1,
+ VDD2 and VDD3. These regulators reside inside the TWL4030 /
+ TWL6030 chip but are accessed using the voltage processor
+ interface of OMAP.
+
endif
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 3932d2e..191e3d5 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -43,5 +43,6 @@ obj-$(CONFIG_REGULATOR_ISL6271A) += isl6271a-regulator.o
obj-$(CONFIG_REGULATOR_AB8500) += ab8500.o
obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o
obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o
+obj-$(CONFIG_REGULATOR_OMAP_SMPS) += omap-smps-regulator.o
ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/omap-smps-regulator.c
b/drivers/regulator/omap-smps-regulator.c
new file mode 100644
index 000..8b56e4f
--- /dev/null
+++ b/drivers/regulator/omap-smps-regulator.c
@@ -0,0 +1,179 @@
+/*
+ * omap-vp-regulator.c -- support SMPS regulators for OMAP chips
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/kernel.h
+#include linux/ctype.h
+#include linux/module.h
+#include linux/slab.h
+#include linux/init.h
+#include linux/err.h
+#include linux/delay.h
+#include linux/platform_device.h
+#include linux/regulator/driver.h
+#include linux/regulator/machine.h
+#include linux/regulator/omap-smps.h
+#include plat/voltage.h
+
+#define DRIVER_NAMEomap-smps
+
+struct omap_smps_reg_info {
+ const char *vdd_name;
+ struct regulator_dev*rdev;
+ struct voltagedomain*voltdm;
+ struct regulator_desc desc;
+};
+
+static int omap_smps_set_voltage(struct regulator_dev *rdev, int min_uV,
+ int max_uV, unsigned *selector)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return voltdm_scale(info-voltdm, min_uV);
+}
+
+static int omap_smps_get_voltage(struct regulator_dev *rdev)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return omap_vp_get_curr_volt(info-voltdm);
+}
+
+static struct regulator_ops omap_smps_ops = {
+ .set_voltage= omap_smps_set_voltage,
+ .get_voltage= omap_smps_get_voltage,
+};
+
+#define SMPS_REG(name) { \
+ .vdd_name = #name, \
+ .desc = { \
+ .ops = omap_smps_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .owner = THIS_MODULE, \
+ }, \
+ }
+
+static struct omap_smps_reg_info omap_smps_regs[] = {
+ SMPS_REG(mpu),
+ SMPS_REG(mpu_iva),
+ SMPS_REG(iva),
+ SMPS_REG(core),
+};
+
+static void omap_smps_reg_cleanup(void)
+{
+ int i;
+ struct omap_smps_reg_info *info;
+
+ for (i = 0; i ARRAY_SIZE(omap_smps_regs); i++) {
+ info = omap_smps_regs[i];
+ if (info-rdev) {
+ regulator_unregister(info-rdev);
+ info-rdev = NULL;
+ }
+
+ kfree(info-desc.name);
+ info-desc.name = NULL;
+ }
+}
+
+static struct regulator_init_data dummy_initdata __initdata;
+
+static int __devinit omap_smps_reg_probe(struct platform_device *pdev)
+{
+ int i, j, ret;
+ struct omap_smps_reg_info
[PATCHv3 5/6] omap3: beagleboard: add SMPS regulators
This is using the common API defined in twl-common.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 32f5f89..d493b0b 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -444,6 +444,8 @@ static struct platform_device keys_gpio = {
},
};
+static struct platform_device beagle_smps;
+
static void __init omap3_beagle_init_early(void)
{
omap2_init_common_infrastructure();
@@ -459,6 +461,7 @@ static void __init omap3_beagle_init_irq(void)
static struct platform_device *omap3_beagle_devices[] __initdata = {
leds_gpio,
keys_gpio,
+ beagle_smps,
};
static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
@@ -533,6 +536,7 @@ static void __init omap3_beagle_init(void)
gpio_buttons[0].gpio = beagle_config.usr_button_gpio;
+ omap3_pmic_get_smps_config(beagle_smps);
platform_add_devices(omap3_beagle_devices,
ARRAY_SIZE(omap3_beagle_devices));
omap_display_init(beagle_dss_data);
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv3 4/6] omap3: pmic: add API to get common SMPS regulators
omap3_pmic_get_smps_config can now be used to get regulator configuration
for MPU and CORE SMPS regulators. This should be expanded later to add IVA
SMPS regulator for OMAP4.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/twl-common.c | 62 ++
arch/arm/mach-omap2/twl-common.h | 14
2 files changed, 76 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 2543342..dc36053 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -23,8 +23,10 @@
#include linux/i2c.h
#include linux/i2c/twl.h
#include linux/gpio.h
+#include linux/slab.h
#include linux/regulator/machine.h
#include linux/regulator/fixed.h
+#include linux/regulator/omap-smps.h
#include plat/i2c.h
#include plat/usb.h
@@ -302,3 +304,63 @@ void __init omap3_pmic_get_config(struct
twl4030_platform_data *pmic_data,
if (regulators_flags TWL_COMMON_REGULATOR_VPLL2 !pmic_data-vpll2)
pmic_data-vpll2 = omap3_vpll2_idata;
}
+
+static struct regulator_consumer_supply omap_smps_mpu_iva_supply[] = {
+ REGULATOR_SUPPLY(vcc, mpu_iva),
+};
+
+static struct regulator_consumer_supply omap_smps_core_supply[] = {
+ REGULATOR_SUPPLY(vcc, core),
+};
+
+static struct regulator_init_data omap_smps_mpu_iva = {
+ .constraints = {
+ .min_uV = 60,
+ .max_uV = 145,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(omap_smps_mpu_iva_supply),
+ .consumer_supplies = omap_smps_mpu_iva_supply,
+};
+
+static struct regulator_init_data omap_smps_core = {
+ .constraints = {
+ .min_uV = 60,
+ .max_uV = 145,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(omap_smps_core_supply),
+ .consumer_supplies = omap_smps_core_supply,
+};
+
+void omap_pmic_get_smps_config(struct platform_device *smps_dev,
+ u32 smps_flags)
+{
+ struct omap_smps_platform_data *info;
+ struct regulator_init_data **reg_list;
+ int num_reg = 0;
+
+ reg_list = kmalloc(sizeof(void *) * hweight32(smps_flags), GFP_KERNEL);
+ info = kzalloc(sizeof(struct omap_smps_platform_data), GFP_KERNEL);
+
+ if (!reg_list || !info)
+ return;
+
+ if (smps_flags SMPS_COMMON_REGULATOR_MPU_IVA) {
+ reg_list[num_reg] = omap_smps_mpu_iva;
+ num_reg++;
+ }
+ if (smps_flags SMPS_COMMON_REGULATOR_CORE) {
+ reg_list[num_reg] = omap_smps_core;
+ num_reg++;
+ }
+
+ info-regulators = reg_list;
+ info-num_regulators = num_reg;
+
+ smps_dev-name = omap-smps;
+ smps_dev-id = -1;
+ smps_dev-dev.platform_data = info;
+}
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 5e83a5b..fde8467 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -25,6 +25,11 @@
#define TWL_COMMON_REGULATOR_VPLL1 (1 4)
#define TWL_COMMON_REGULATOR_VPLL2 (1 5)
+/* TWL SMPS regulators */
+#define SMPS_COMMON_REGULATOR_MPU (1 0)
+#define SMPS_COMMON_REGULATOR_CORE (1 1)
+#define SMPS_COMMON_REGULATOR_IVA (1 2)
+#define SMPS_COMMON_REGULATOR_MPU_IVA (1 3)
struct twl4030_platform_data;
@@ -56,4 +61,13 @@ void omap3_pmic_get_config(struct twl4030_platform_data
*pmic_data,
void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
u32 pdata_flags, u32 regulators_flags);
+void omap_pmic_get_smps_config(struct platform_device *smps_dev,
+ u32 smps_flags);
+
+static inline void omap3_pmic_get_smps_config(struct platform_device *smps_dev)
+{
+ omap_pmic_get_smps_config(smps_dev, SMPS_COMMON_REGULATOR_MPU_IVA |
+ SMPS_COMMON_REGULATOR_CORE);
+}
+
#endif /* __OMAP_PMIC_COMMON__ */
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv3 6/6] TEMP: OMAP3: beagle rev-c4: enable OPP6
Beagleboard rev-c4 has a speed sorted OMAP3530 chip which can run at 720MHz.
This is a temporary patch for supporting this set only, do not integrate.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 32 +++
arch/arm/mach-omap2/opp3xxx_data.c |4 +++
2 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index d493b0b..4d7fd3f 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -492,6 +492,38 @@ static void __init beagle_opp_init(void)
return;
}
+ /* Custom OPP enabled for C4 */
+ if (omap3_beagle_version == OMAP3BEAGLE_BOARD_C4) {
+ struct omap_hwmod *mh = omap_hwmod_lookup(mpu);
+ struct omap_hwmod *dh = omap_hwmod_lookup(iva);
+ struct device *dev;
+
+ if (!mh || !dh) {
+ pr_err(%s: Aiee.. no mpu/dsp devices? %p %p\n,
+ __func__, mh, dh);
+ }
+ /* Enable MPU 720MHz opp */
+ dev = mh-od-pdev.dev;
+ r = opp_enable(dev, 72000);
+
+ /* Enable IVA 520MHz opp */
+ dev = dh-od-pdev.dev;
+ r |= opp_enable(dev, 52000);
+
+ if (r) {
+ pr_err(%s: failed to enable higher opp %d\n,
+ __func__, r);
+ /*
+* Cleanup - disable the higher freqs - we dont care
+* about the results
+*/
+ dev = mh-od-pdev.dev;
+ opp_disable(dev, 72000);
+ dev = dh-od-pdev.dev;
+ opp_disable(dev, 52000);
+ }
+ }
+
/* Custom OPP enabled for all xM versions */
if (cpu_is_omap3630()) {
struct omap_hwmod *mh = omap_hwmod_lookup(mpu);
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c
b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..a0f5fe1 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -98,6 +98,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[]
= {
OPP_INITIALIZER(mpu, true, 55000, OMAP3430_VDD_MPU_OPP4_UV),
/* MPU OPP5 */
OPP_INITIALIZER(mpu, true, 6, OMAP3430_VDD_MPU_OPP5_UV),
+ /* MPU OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER(mpu, false, 72000, OMAP3430_VDD_MPU_OPP5_UV),
/*
* L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
@@ -123,6 +125,8 @@ static struct omap_opp_def __initdata
omap34xx_opp_def_list[] = {
OPP_INITIALIZER(iva, true, 4, OMAP3430_VDD_MPU_OPP4_UV),
/* DSP OPP5 */
OPP_INITIALIZER(iva, true, 43000, OMAP3430_VDD_MPU_OPP5_UV),
+ /* DSP OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER(iva, false, 52000, OMAP3430_VDD_MPU_OPP5_UV),
};
static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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Re: [PATCHv3 0/6] OMAP SMPS regulator driver
On Mon, 2011-07-18 at 19:35 +0200, Kristo, Tero wrote: Hello, Main changes compared to v2: - cleanup should now work better - register all available regulators always, if no initdata = readonly - added board init support functionality to twl-common - constraints not touched by the driver anymore forgot to mention, this set was also rebased on top of linux-omap/pm/wip/voltdm branch. Tested on omap3 beagle. -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv3 2/6] omap: voltage: change code to use new location of voltage.h and vp.h
On Mon, 2011-07-18 at 20:16 +0200, Balbi, Felipe wrote: Hi, On Mon, Jul 18, 2011 at 08:35:18PM +0300, Tero Kristo wrote: These are now under plat-omap/include/plat. Signed-off-by: Tero Kristo t-kri...@ti.com this has to be folded into previous patch, otherwise we will have a broken bisection point. Good to know for future, I will just drop this patch (and patch 1 also) though as Kevin suggested and create a simple stub that provides only the API needed. -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv3 1/6] OMAP: move voltage.h and vp.h under platform include directory
On Mon, 2011-07-18 at 20:16 +0200, Balbi, Felipe wrote: Hi, On Mon, Jul 18, 2011 at 08:35:17PM +0300, Tero Kristo wrote: This is needed so that these include files can be accessed from drivers. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/mach-omap2/voltage.h | 180 - arch/arm/mach-omap2/vp.h | 128 arch/arm/plat-omap/include/plat/voltage.h | 179 arch/arm/plat-omap/include/plat/vp.h | 128 4 files changed, 307 insertions(+), 308 deletions(-) delete mode 100644 arch/arm/mach-omap2/voltage.h delete mode 100644 arch/arm/mach-omap2/vp.h create mode 100644 arch/arm/plat-omap/include/plat/voltage.h create mode 100644 arch/arm/plat-omap/include/plat/vp.h just one small tip, if you use git format-patch -M, it would detect that this was just a rename ;-) Hmm did not notice this... git-format actually detected that this was a rename in previous version of the set, even without the -M option. Will try to remember that in the future. Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv3 3/6] regulator: omap smps regulator driver
On Tue, 2011-07-19 at 01:40 +0200, Hilman, Kevin wrote: Felipe Balbi ba...@ti.com writes: On Mon, Jul 18, 2011 at 08:35:19PM +0300, Tero Kristo wrote: diff --git a/drivers/regulator/omap-smps-regulator.c b/drivers/regulator/omap-smps-regulator.c new file mode 100644 index 000..8b56e4f --- /dev/null +++ b/drivers/regulator/omap-smps-regulator.c @@ -0,0 +1,179 @@ +/* + * omap-vp-regulator.c -- support SMPS regulators for OMAP chips name is wrong here. In fact, just leave filenames out of file headers all together to avoid this kind of problem. Yea, can drop that out. Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv3 3/6] regulator: omap smps regulator driver
On Mon, 2011-07-18 at 20:22 +0200, Balbi, Felipe wrote:
Hi,
On Mon, Jul 18, 2011 at 08:35:19PM +0300, Tero Kristo wrote:
diff --git a/drivers/regulator/omap-smps-regulator.c
b/drivers/regulator/omap-smps-regulator.c
new file mode 100644
index 000..8b56e4f
--- /dev/null
+++ b/drivers/regulator/omap-smps-regulator.c
@@ -0,0 +1,179 @@
+/*
+ * omap-vp-regulator.c -- support SMPS regulators for OMAP chips
name is wrong here.
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/kernel.h
+#include linux/ctype.h
+#include linux/module.h
+#include linux/slab.h
+#include linux/init.h
+#include linux/err.h
+#include linux/delay.h
+#include linux/platform_device.h
+#include linux/regulator/driver.h
+#include linux/regulator/machine.h
+#include linux/regulator/omap-smps.h
+#include plat/voltage.h
+
+#define DRIVER_NAMEomap-smps
+
+struct omap_smps_reg_info {
+ const char *vdd_name;
+ struct regulator_dev*rdev;
+ struct voltagedomain*voltdm;
+ struct regulator_desc desc;
+};
+
+static int omap_smps_set_voltage(struct regulator_dev *rdev, int min_uV,
+ int max_uV, unsigned *selector)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return voltdm_scale(info-voltdm, min_uV);
+}
+
+static int omap_smps_get_voltage(struct regulator_dev *rdev)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return omap_vp_get_curr_volt(info-voltdm);
+}
+
+static struct regulator_ops omap_smps_ops = {
should this be const ?
I think it can be yea, I'll change that for next version.
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Re: [PATCHv3 4/6] omap3: pmic: add API to get common SMPS regulators
On Mon, 2011-07-18 at 20:23 +0200, Balbi, Felipe wrote:
Hi,
On Mon, Jul 18, 2011 at 08:35:20PM +0300, Tero Kristo wrote:
diff --git a/arch/arm/mach-omap2/twl-common.h
b/arch/arm/mach-omap2/twl-common.h
index 5e83a5b..fde8467 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -25,6 +25,11 @@
#define TWL_COMMON_REGULATOR_VPLL1 (1 4)
#define TWL_COMMON_REGULATOR_VPLL2 (1 5)
+/* TWL SMPS regulators */
+#define SMPS_COMMON_REGULATOR_MPU (1 0)
+#define SMPS_COMMON_REGULATOR_CORE (1 1)
+#define SMPS_COMMON_REGULATOR_IVA (1 2)
+#define SMPS_COMMON_REGULATOR_MPU_IVA (1 3)
struct twl4030_platform_data;
@@ -56,4 +61,13 @@ void omap3_pmic_get_config(struct twl4030_platform_data
*pmic_data,
void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
u32 pdata_flags, u32 regulators_flags);
+void omap_pmic_get_smps_config(struct platform_device *smps_dev,
+ u32 smps_flags);
+
+static inline void omap3_pmic_get_smps_config(struct platform_device
*smps_dev)
+{
+ omap_pmic_get_smps_config(smps_dev, SMPS_COMMON_REGULATOR_MPU_IVA |
+ SMPS_COMMON_REGULATOR_CORE);
+}
if these are specific to OMAP SoC, why do they come on twl-common.h
header ?
I was wondering about this myself too and was almost certain that
someone will ask about it. I decided to follow the easy path for this
version though for comments. Anyway, which would be the best option for
this:
1) just add them into twl-common
2) rename twl-common to something else and add these
3) add a completely new file + header for the smps regulator support
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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Re: [PATCHv3 3/6] regulator: omap smps regulator driver
On Tue, 2011-07-19 at 17:38 +0200, Mark Brown wrote: On Mon, Jul 18, 2011 at 08:35:19PM +0300, Tero Kristo wrote: OMAP SMPS regulator driver provides access to OMAP voltage processor controlled regulators. These include VDD_MPU and VDD_CORE for OMAP3 and additionally VDD_IVA for OMAP4. SMPS regulators use the OMAP voltage layer for the actual voltage regulation operations. +config REGULATOR_OMAP_SMPS + tristate TI OMAP SMPS Power Regulators + depends on (ARCH_OMAP3 || ARCH_OMAP4) PM TWL4030_CORE Why does this depend on TWL4030_CORE or PM? Oh forgot that one, TWL_CORE can be removed, PM must be there because the depending libraries are only built when PM is enabled. Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv5 05/11] TEMP: OMAP3: pm: remove serial resume / idle calls from idle path
On Sat, 2011-07-23 at 01:51 +0200, Balbi, Felipe wrote: Hi, On Tue, Jul 05, 2011 at 01:27:51PM +0300, Tero Kristo wrote: This is no longer needed as it will be handled within serial driver itself. Signed-off-by: Tero Kristo t-kri...@ti.com isn't this introducing a regression ? Should this, maybe, be merged into next patch ? Patches tagged TEMP are not meant for integration, just for testing purposes. -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv7 00/11] PRCM chain handler
Hello, Changes compared to previous set: - moved OMAP3/OMAP4 specific code under prm.c files - dropped most of the event definitions for now, and just left wkup and io events in - PRCM events are now defined as a common struct under prcm.c - moved mux handling routines from omap_hwmod.c to mux.c - some other minor tweaks based on received comments -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv6 02/11] OMAP2+: hwmod: Add API to enable IO ring wakeup.
From: R, Govindraj govindraj.r...@ti.com
Add API to enable IO pad wakeup capability based on mux dynamic pad and
wake_up enable flag available from hwmod_mux initialization.
Use the wakeup_enable flag and enable wakeup capability
for the given pads. Wakeup capability will be enabled/disabled
during hwmod idle transition based on whether wakeup_flag is
set or cleared.
Map the enable/disable pad wakeup API's to hwmod_wakeup_enable/disable.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 59 ++
1 files changed, 59 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bd..e751dd9 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2062,6 +2062,34 @@ static int __init omap_hwmod_setup_all(void)
core_initcall(omap_hwmod_setup_all);
/**
+ * omap_hwmod_set_ioring_wakeup - enable io pad wakeup flag.
+ * @oh: struct omap_hwmod *
+ * @set: bool value indicating to set or clear wakeup status.
+ *
+ * Set or Clear wakeup flag for the io_pad.
+ */
+static int omap_hwmod_set_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
+{
+ struct omap_device_pad *pad;
+ int ret = -EINVAL, j;
+
+ if (oh-mux oh-mux-enabled) {
+ for (j = 0; j oh-mux-nr_pads_dynamic; j++) {
+ pad = oh-mux-pads_dynamic[j];
+ if (pad-flags OMAP_DEVICE_PAD_WAKEUP) {
+ if (set_wake)
+ pad-idle |= OMAP_WAKEUP_EN;
+ else
+ pad-idle = ~OMAP_WAKEUP_EN;
+ ret = 0;
+ }
+ }
+ }
+
+ return ret;
+}
+
+/**
* omap_hwmod_enable - enable an omap_hwmod
* @oh: struct omap_hwmod *
*
@@ -2393,6 +2421,35 @@ int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
{
return _del_initiator_dep(oh, init_oh);
}
+/**
+ * omap_hwmod_enable_ioring_wakeup - Set wakeup flag for iopad.
+ * @oh: struct omap_hwmod *
+ *
+ * Traverse through dynamic pads, if pad is enabled then
+ * set wakeup enable bit flag for the mux pin. Wakeup pad bit
+ * will be set during hwmod idle transistion.
+ * Return error if pads are not enabled or not available.
+ */
+int omap_hwmod_enable_ioring_wakeup(struct omap_hwmod *oh)
+{
+ /* Enable pad wake-up capability */
+ return omap_hwmod_set_ioring_wakeup(oh, true);
+}
+
+/**
+ * omap_hwmod_disable_ioring_wakeup - Clear wakeup flag for iopad.
+ * @oh: struct omap_hwmod *
+ *
+ * Traverse through dynamic pads, if pad is enabled then
+ * clear wakeup enable bit flag for the mux pin. Wakeup pad bit
+ * will be set during hwmod idle transistion.
+ * Return error if pads are not enabled or not available.
+ */
+int omap_hwmod_disable_ioring_wakeup(struct omap_hwmod *oh)
+{
+ /* Disable pad wakeup capability */
+ return omap_hwmod_set_ioring_wakeup(oh, false);
+}
/**
* omap_hwmod_enable_wakeup - allow device to wake up the system
@@ -2419,6 +2476,7 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
v = oh-_sysc_cache;
_enable_wakeup(oh, v);
_write_sysconfig(v, oh);
+ omap_hwmod_enable_ioring_wakeup(oh);
spin_unlock_irqrestore(oh-_lock, flags);
return 0;
@@ -2449,6 +2507,7 @@ int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
v = oh-_sysc_cache;
_disable_wakeup(oh, v);
_write_sysconfig(v, oh);
+ omap_hwmod_disable_ioring_wakeup(oh);
spin_unlock_irqrestore(oh-_lock, flags);
return 0;
--
1.7.4.1
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Kotipaikka: Helsinki
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[PATCHv6 03/11] OMAP2+: hwmod: Add API to check IO PAD wakeup status
From: R, Govindraj govindraj.r...@ti.com
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/mach-omap2/mux.c| 30 ++
arch/arm/mach-omap2/mux.h| 13 +++
arch/arm/mach-omap2/omap_hwmod.c |7 ++
arch/arm/plat-omap/include/plat/omap_hwmod.h |1 +
4 files changed, 51 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index c7fb22a..50ee806 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -351,6 +351,36 @@ err1:
return NULL;
}
+/**
+ * omap_hwmod_mux_get_wake_status - omap hwmod check pad wakeup
+ * @hmux: Pads for a hwmod
+ *
+ * Gets the wakeup status of given pad from omap-hwmod.
+ * Returns true if wakeup event is set for pad else false
+ * if wakeup is not occured or pads are not avialable.
+ */
+bool omap_hwmod_mux_get_wake_status(struct omap_hwmod_mux_info *hmux)
+{
+ int i;
+ unsigned int val;
+ u8 ret = false;
+
+ for (i = 0; i hmux-nr_pads; i++) {
+ struct omap_device_pad *pad = hmux-pads[i];
+
+ if (pad-flags OMAP_DEVICE_PAD_WAKEUP) {
+ val = omap_mux_read(pad-partition,
+ pad-mux-reg_offset);
+ if (val OMAP_WAKEUP_EVENT) {
+ ret = true;
+ break;
+ }
+ }
+ }
+
+ return ret;
+}
+
/* Assumes the calling function takes care of locking */
void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
{
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 2132308..8b2150a 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -225,8 +225,21 @@ omap_hwmod_mux_init(struct omap_device_pad *bpads, int
nr_pads);
*/
void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state);
+/**
+ * omap_hwmod_mux_get_wake_status - omap hwmod check pad wakeup
+ * @hmux: Pads for a hwmod
+ *
+ * Called only from omap_hwmod.c, do not use.
+ */
+bool omap_hwmod_mux_get_wake_status(struct omap_hwmod_mux_info *hmux);
#else
+static inline bool
+omap_hwmod_mux_get_wake_status(struct omap_hwmod_mux_info *hmux)
+{
+ return 0;
+}
+
static inline int omap_mux_init_gpio(int gpio, int val)
{
return 0;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index e751dd9..a8b24d7 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2724,3 +2724,10 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
return 0;
}
+
+int omap_hwmod_pad_get_wakeup_status(struct omap_hwmod *oh)
+{
+ if (oh oh-mux)
+ return omap_hwmod_mux_get_wake_status(oh-mux);
+ return -EINVAL;
+}
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 38ac4af..9c70cc8 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -606,6 +606,7 @@ u32 omap_hwmod_get_context_loss_count(struct omap_hwmod
*oh);
int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
+int omap_hwmod_pad_get_wakeup_status(struct omap_hwmod *oh);
/*
* Chip variant-specific hwmod init routines - XXX should be converted
* to use initcalls once the initial boot ordering is straightened out
--
1.7.4.1
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[PATCHv6 04/11] OMAP2+: mux: add support for PAD wakeup interrupts
OMAP mux now provides a service routine to parse pending wakeup events
and to call registered ISR whenever active wakeups are detected. This
routine is called directly from PRCM interrupt handler.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/mux.c | 27 +++
arch/arm/mach-omap2/mux.h | 11 +++
arch/arm/mach-omap2/prcm.c |4
3 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 50ee806..b6c4ea1 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -32,6 +32,7 @@
#include linux/debugfs.h
#include linux/seq_file.h
#include linux/uaccess.h
+#include linux/irq.h
#include asm/system.h
@@ -381,6 +382,32 @@ bool omap_hwmod_mux_get_wake_status(struct
omap_hwmod_mux_info *hmux)
return ret;
}
+/**
+ * omap_hwmod_mux_handle_irq - Process wakeup events for a single hwmod
+ *
+ * Checks a single hwmod for every wakeup capable pad to see if there is an
+ * active wakeup event. If this is the case, call the corresponding ISR.
+ */
+static int _omap_hwmod_mux_handle_irq(struct omap_hwmod *oh, void *data)
+{
+ if (!oh-mux || !oh-mux-enabled)
+ return 0;
+ if (omap_hwmod_mux_get_wake_status(oh-mux))
+ generic_handle_irq(oh-mpu_irqs[0].irq);
+ return 0;
+}
+
+/**
+ * omap_hwmod_mux_handle_irq - Process pad wakeup irqs.
+ *
+ * Calls a function for each registered omap_hwmod to check
+ * pad wakeup statuses.
+ */
+void omap_hwmod_mux_handle_irq(void)
+{
+ omap_hwmod_for_each(_omap_hwmod_mux_handle_irq, NULL);
+}
+
/* Assumes the calling function takes care of locking */
void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
{
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 8b2150a..6e7f1a4 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -232,6 +232,13 @@ void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8
state);
* Called only from omap_hwmod.c, do not use.
*/
bool omap_hwmod_mux_get_wake_status(struct omap_hwmod_mux_info *hmux);
+
+/**
+ * omap_hwmod_mux_handle_irq - handler for IO pad wakeup events
+ *
+ * Called only from prcm.c to process PRCM IO events, do not use.
+ */
+void omap_hwmod_mux_handle_irq(void);
#else
static inline bool
@@ -259,6 +266,10 @@ static inline void omap_hwmod_mux(struct
omap_hwmod_mux_info *hmux, u8 state)
{
}
+static inline void omap_hwmod_mux_handle_irq(void)
+{
+}
+
static struct omap_board_mux *board_mux __initdata __maybe_unused;
#endif
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 83cf8ae..7d8a6d8 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -40,6 +40,7 @@
#include prm-regbits-24xx.h
#include prm-regbits-44xx.h
#include control.h
+#include mux.h
void __iomem *prm_base;
void __iomem *cm_base;
@@ -112,6 +113,9 @@ static void prcm_irq_handler(unsigned int irq, struct
irq_desc *desc)
unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG];
struct irq_chip *chip = irq_desc_get_chip(desc);
+ /* Handle PAD events first, we don't want to ack them before parse */
+ omap_hwmod_mux_handle_irq();
+
/*
* Loop until all pending irqs are handled, since
* generic_handle_irq() can cause new irqs to come
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv6 05/11] TEMP: OMAP3: pm: remove serial resume / idle calls from idle path
This is no longer needed as it will be handled within serial driver itself.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c | 19 ---
1 files changed, 0 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 7805a07..b9b5128 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -325,18 +325,9 @@ void omap_sram_idle(void)
omap3_enable_io_chain();
}
- /* Block console output in case it is on one of the OMAP UARTs */
- if (!is_suspending())
- if (per_next_state PWRDM_POWER_ON ||
- core_next_state PWRDM_POWER_ON)
- if (!console_trylock())
- goto console_still_active;
-
/* PER */
if (per_next_state PWRDM_POWER_ON) {
per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
- omap_uart_prepare_idle(2);
- omap_uart_prepare_idle(3);
omap2_gpio_prepare_for_idle(per_going_off);
if (per_next_state == PWRDM_POWER_OFF)
omap3_per_save_context();
@@ -344,8 +335,6 @@ void omap_sram_idle(void)
/* CORE */
if (core_next_state PWRDM_POWER_ON) {
- omap_uart_prepare_idle(0);
- omap_uart_prepare_idle(1);
if (core_next_state == PWRDM_POWER_OFF) {
omap3_core_save_context();
omap3_cm_save_context();
@@ -392,8 +381,6 @@ void omap_sram_idle(void)
omap3_sram_restore_context();
omap2_sms_restore_context();
}
- omap_uart_resume_idle(0);
- omap_uart_resume_idle(1);
if (core_next_state == PWRDM_POWER_OFF)
omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
OMAP3430_GR_MOD,
@@ -407,14 +394,8 @@ void omap_sram_idle(void)
omap2_gpio_resume_after_idle();
if (per_prev_state == PWRDM_POWER_OFF)
omap3_per_restore_context();
- omap_uart_resume_idle(2);
- omap_uart_resume_idle(3);
}
- if (!is_suspending())
- console_unlock();
-
-console_still_active:
/* Disable IO-PAD and IO-CHAIN wakeup */
if (omap3_has_io_wakeup()
(per_next_state PWRDM_POWER_ON ||
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv6 07/11] TEMP: serial: added mux support
Just for PRCM chain handler testing purposes. This should be replaced with
a proper implementation.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/serial.c | 71 -
1 files changed, 69 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 651fb91..47c4353 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -852,17 +852,84 @@ void __init omap_serial_init_port(struct omap_board_data
*bdata)
* can call this function when they want to have default behaviour
* for serial ports (e.g initialize them all as serial ports).
*/
+
+struct serial_mux_conf {
+ char *name;
+ int omap3_mux;
+ int omap4_mux;
+};
+
+#define OMAP3_SERIAL_MUX_IN_PU (OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0)
+#define OMAP3_SERIAL_MUX_IN_PD (OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE0)
+#define OMAP3_SERIAL_MUX_IN (OMAP_PIN_INPUT | OMAP_MUX_MODE0)
+#define OMAP3_SERIAL_MUX_OUT (OMAP_PIN_OUTPUT | OMAP_MUX_MODE0)
+#define OMAP4_SERIAL_MUX_IN_PU (OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0)
+#define OMAP4_SERIAL_MUX_OUT (OMAP_PIN_OUTPUT | OMAP_MUX_MODE0)
+#define OMAP4_SERIAL_MUX_IN (OMAP_PIN_INPUT | OMAP_MUX_MODE0)
+#define SERIAL_DISABLED OMAP_MUX_MODE7
+
+#define OMAP_SERIAL_NUM_PADS_PER_PORT 4
+
+static const struct serial_mux_conf serial_mux_data[] = {
+ { uart1_cts.uart1_cts, OMAP3_SERIAL_MUX_IN, SERIAL_DISABLED, },
+ { uart1_rts.uart1_rts, OMAP3_SERIAL_MUX_OUT, SERIAL_DISABLED, },
+ { uart1_rx.uart1_rx, OMAP3_SERIAL_MUX_IN, SERIAL_DISABLED, },
+ { uart1_tx.uart1_tx, OMAP3_SERIAL_MUX_OUT, SERIAL_DISABLED, },
+ { uart2_cts.uart2_cts, OMAP3_SERIAL_MUX_IN,
+ OMAP4_SERIAL_MUX_IN_PU, },
+ { uart2_rts.uart2_rts, OMAP3_SERIAL_MUX_OUT, OMAP4_SERIAL_MUX_OUT, },
+ { uart2_rx.uart2_rx, OMAP3_SERIAL_MUX_IN, OMAP4_SERIAL_MUX_IN_PU, },
+ { uart2_tx.uart2_tx, OMAP3_SERIAL_MUX_OUT, OMAP4_SERIAL_MUX_OUT },
+ { uart3_cts_rctx.uart3_cts_rctx, OMAP3_SERIAL_MUX_IN_PD,
+ OMAP4_SERIAL_MUX_IN_PU, },
+ { uart3_rts_sd.uart3_rts_sd, OMAP3_SERIAL_MUX_OUT,
+ OMAP4_SERIAL_MUX_OUT, },
+ { uart3_rx_irrx.uart3_rx_irrx, OMAP3_SERIAL_MUX_IN,
+ OMAP4_SERIAL_MUX_IN, },
+ { uart3_tx_irtx.uart3_tx_irtx, OMAP3_SERIAL_MUX_OUT,
+ OMAP4_SERIAL_MUX_OUT, },
+ { uart4_rx.uart4_rx, SERIAL_DISABLED, OMAP4_SERIAL_MUX_IN, },
+ { uart4_tx.uart4_tx, SERIAL_DISABLED, OMAP4_SERIAL_MUX_OUT, },
+ { NULL, 0, 0, },
+ { NULL, 0, 0, },
+};
+
void __init omap_serial_init(void)
{
struct omap_uart_state *uart;
struct omap_board_data bdata;
+ struct omap_device_pad *pads;
+ int idx;
+ int i;
+ pads = kmalloc(sizeof(struct omap_device_pad) * 4, GFP_KERNEL);
list_for_each_entry(uart, uart_list, node) {
bdata.id = uart-num;
bdata.flags = 0;
- bdata.pads = NULL;
bdata.pads_cnt = 0;
+ bdata.pads = pads;
+
+ for (i = 0; i OMAP_SERIAL_NUM_PADS_PER_PORT; i++) {
+ idx = bdata.id * OMAP_SERIAL_NUM_PADS_PER_PORT + i;
+ pads[i].name = serial_mux_data[idx].name;
+ pads[i].enable = 0;
+ pads[i].idle = 0;
+ pads[i].flags = 0;
+ if (cpu_is_omap34xx())
+ pads[i].enable = serial_mux_data[idx].omap3_mux;
+ if (cpu_is_omap44xx())
+ pads[i].enable = serial_mux_data[idx].omap4_mux;
+ if (pads[i].enable != SERIAL_DISABLED)
+ bdata.pads_cnt++;
+ if (pads[i].enable OMAP_PIN_INPUT) {
+ pads[i].flags = OMAP_DEVICE_PAD_REMUX |
+ OMAP_DEVICE_PAD_WAKEUP;
+ }
+ pads[i].idle = pads[i].enable;
+ }
+ if (bdata.pads_cnt == 0)
+ bdata.pads = NULL;
omap_serial_init_port(bdata);
-
}
+ kfree(pads);
}
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv6 06/11] TEMP: OMAP3: serial: made serial to work properly with PRCM chain handler
This patch is just a temporary hack to allow serial to work properly with
the PRCM chain handler. Should be replaced with a proper implementation.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/serial.c | 28 +---
drivers/tty/serial/omap-serial.c |8
2 files changed, 17 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 466fc722..651fb91 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -39,6 +39,7 @@
#include plat/dma.h
#include plat/omap_hwmod.h
#include plat/omap_device.h
+#include plat/prcm.h
#include prm2xxx_3xxx.h
#include pm.h
@@ -380,6 +381,7 @@ static void omap_uart_allow_sleep(struct omap_uart_state
*uart)
omap_uart_smart_idle_enable(uart, 1);
uart-can_sleep = 1;
del_timer(uart-timer);
+ omap_uart_disable_clocks(uart);
}
static void omap_uart_idle_timer(unsigned long data)
@@ -391,35 +393,23 @@ static void omap_uart_idle_timer(unsigned long data)
void omap_uart_prepare_idle(int num)
{
- struct omap_uart_state *uart;
-
- list_for_each_entry(uart, uart_list, node) {
- if (num == uart-num uart-can_sleep) {
- omap_uart_disable_clocks(uart);
- return;
- }
- }
}
void omap_uart_resume_idle(int num)
{
struct omap_uart_state *uart;
+ u32 wkst;
list_for_each_entry(uart, uart_list, node) {
if (num == uart-num uart-can_sleep) {
- omap_uart_enable_clocks(uart);
+ omap_uart_block_sleep(uart);
- /* Check for IO pad wakeup */
- if (cpu_is_omap34xx() uart-padconf) {
- u16 p = omap_ctrl_readw(uart-padconf);
-
- if (p OMAP3_PADCONF_WAKEUPEVENT0)
- omap_uart_block_sleep(uart);
+ /* Check for normal UART wakeup (and clear it) */
+ if (uart-wk_st uart-wk_mask) {
+ wkst = __raw_readl(uart-wk_st) uart-wk_mask;
+ if (wkst)
+ __raw_writel(wkst, uart-wk_st);
}
-
- /* Check for normal UART wakeup */
- if (__raw_readl(uart-wk_st) uart-wk_mask)
- omap_uart_block_sleep(uart);
return;
}
}
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 47cadf4..bd6ae02 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -261,6 +261,8 @@ static void serial_omap_start_tx(struct uart_port *port)
unsigned int start;
int ret = 0;
+ omap_uart_resume_idle(up-pdev-id);
+
if (!up-use_dma) {
serial_omap_enable_ier_thri(up);
return;
@@ -354,6 +356,8 @@ static inline irqreturn_t serial_omap_irq(int irq, void
*dev_id)
unsigned int iir, lsr;
unsigned long flags;
+ omap_uart_resume_idle(up-pdev-id);
+
iir = serial_in(up, UART_IIR);
if (iir UART_IIR_NO_INT)
return IRQ_NONE;
@@ -641,6 +645,8 @@ serial_omap_set_termios(struct uart_port *port, struct
ktermios *termios,
unsigned long flags = 0;
unsigned int baud, quot;
+ omap_uart_resume_idle(up-pdev-id);
+
switch (termios-c_cflag CSIZE) {
case CS5:
cval = UART_LCR_WLEN5;
@@ -947,6 +953,8 @@ serial_omap_console_write(struct console *co, const char *s,
unsigned int ier;
int locked = 1;
+ omap_uart_resume_idle(up-pdev-id);
+
local_irq_save(flags);
if (up-port.sysrq)
locked = 0;
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv6 01/11] omap: prcm: switch to a chained IRQ handler mechanism
Introduce a chained interrupt handler mechanism for the PRCM
interrupt, so that individual PRCM event can cleanly be handled by
handlers in separate drivers. We do this by introducing PRCM event
names, which are then matched to the particular PRCM interrupt bit
depending on the specific OMAP SoC being used.
arch/arm/mach-omap2/prcm.c implements the chained interrupt mechanism
itself, with SoC specific support / init structure defined in
arch/arm/mach-omap2/prm2xxx_3xxx.c and arch/arm/mach-omap2/prm4xxx.c
respectively. At initialization time, the set of PRCM events is filtered
against the SoC on which we are running, keeping only the ones that are
actually useful. All the logic is written to be generic with regard to
OMAP3/OMAP4, even though OMAP3 has single PRCM event registers and OMAP4
has two PRCM event registers.
Patch tested on OMAP3 beagleboard.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Avinash.H.M avinas...@ti.com
Cc: Kevin Hilman khil...@ti.com
Cc: Cousson, Benoit b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Govindraj.R govindraj.r...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/pm34xx.c | 106 ++---
arch/arm/mach-omap2/prcm.c | 205
arch/arm/mach-omap2/prm2xxx_3xxx.c | 18 +++
arch/arm/mach-omap2/prm2xxx_3xxx.h |4 +
arch/arm/mach-omap2/prm44xx.c | 29 +
arch/arm/mach-omap2/prm44xx.h |2 +
arch/arm/plat-omap/include/plat/prcm.h | 15 +++
7 files changed, 309 insertions(+), 70 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 7255d9b..7805a07 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -64,6 +64,9 @@ static inline bool is_suspending(void)
}
#endif
+static int prcm_io_irq;
+static int prcm_wkup_irq;
+
/* pm34xx errata defined in pm.h */
u16 pm34xx_errata;
@@ -234,7 +237,7 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs)
return c;
}
-static int _prcm_int_handle_wakeup(void)
+static irqreturn_t _prcm_int_handle_wakeup(int irq, void *unused)
{
int c;
@@ -246,64 +249,7 @@ static int _prcm_int_handle_wakeup(void)
c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1);
}
- return c;
-}
-
-/*
- * PRCM Interrupt Handler
- *
- * The PRM_IRQSTATUS_MPU register indicates if there are any pending
- * interrupts from the PRCM for the MPU. These bits must be cleared in
- * order to clear the PRCM interrupt. The PRCM interrupt handler is
- * implemented to simply clear the PRM_IRQSTATUS_MPU in order to clear
- * the PRCM interrupt. Please note that bit 0 of the PRM_IRQSTATUS_MPU
- * register indicates that a wake-up event is pending for the MPU and
- * this bit can only be cleared if the all the wake-up events latched
- * in the various PM_WKST_x registers have been cleared. The interrupt
- * handler is implemented using a do-while loop so that if a wake-up
- * event occurred during the processing of the prcm interrupt handler
- * (setting a bit in the corresponding PM_WKST_x register and thus
- * preventing us from clearing bit 0 of the PRM_IRQSTATUS_MPU register)
- * this would be handled.
- */
-static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
-{
- u32 irqenable_mpu, irqstatus_mpu;
- int c = 0;
-
- irqenable_mpu = omap2_prm_read_mod_reg(OCP_MOD,
-OMAP3_PRM_IRQENABLE_MPU_OFFSET);
- irqstatus_mpu = omap2_prm_read_mod_reg(OCP_MOD,
-OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
- irqstatus_mpu = irqenable_mpu;
-
- do {
- if (irqstatus_mpu (OMAP3430_WKUP_ST_MASK |
-OMAP3430_IO_ST_MASK)) {
- c = _prcm_int_handle_wakeup();
-
- /*
-* Is the MPU PRCM interrupt handler racing with the
-* IVA2 PRCM interrupt handler ?
-*/
- WARN(c == 0, prcm: WARNING: PRCM indicated MPU wakeup
-but no wakeup sources are marked\n);
- } else {
- /* XXX we need to expand our PRCM interrupt handler */
- WARN(1, prcm: WARNING: PRCM interrupt received, but
-no code to handle it (%08x)\n, irqstatus_mpu);
- }
-
- omap2_prm_write_mod_reg(irqstatus_mpu, OCP_MOD,
- OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
-
- irqstatus_mpu = omap2_prm_read_mod_reg(OCP_MOD,
- OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
- irqstatus_mpu = irqenable_mpu;
-
- } while (irqstatus_mpu);
-
- return IRQ_HANDLED;
+ return c ? IRQ_HANDLED : IRQ_NONE
[PATCHv6 08/11] TEMP: OMAP device: change pr_warnings to pr_debugs
Prevents a hang when omap_device would want to print something for
serial console device while enabling / disabling its clocks.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/plat-omap/omap_device.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index b6b4097..de2cd21 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -146,12 +146,12 @@ static int _omap_device_activate(struct omap_device *od,
u8 ignore_lat)
odpl-activate_lat_worst = act_lat;
if (odpl-flags OMAP_DEVICE_LATENCY_AUTO_ADJUST) {
odpl-activate_lat = act_lat;
- pr_warning(omap_device: %s.%d: new worst case
+ pr_debug(omap_device: %s.%d: new worst case
activate latency %d: %llu\n,
od-pdev.name, od-pdev.id,
od-pm_lat_level, act_lat);
} else
- pr_warning(omap_device: %s.%d: activate
+ pr_debug(omap_device: %s.%d: activate
latency %d higher than exptected.
(%llu %d)\n,
od-pdev.name, od-pdev.id,
@@ -214,12 +214,12 @@ static int _omap_device_deactivate(struct omap_device
*od, u8 ignore_lat)
odpl-deactivate_lat_worst = deact_lat;
if (odpl-flags OMAP_DEVICE_LATENCY_AUTO_ADJUST) {
odpl-deactivate_lat = deact_lat;
- pr_warning(omap_device: %s.%d: new worst case
+ pr_debug(omap_device: %s.%d: new worst case
deactivate latency %d: %llu\n,
od-pdev.name, od-pdev.id,
od-pm_lat_level, deact_lat);
} else
- pr_warning(omap_device: %s.%d: deactivate
+ pr_debug(omap_device: %s.%d: deactivate
latency %d higher than exptected.
(%llu %d)\n,
od-pdev.name, od-pdev.id,
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv6 09/11] TEMP: OMAP: serial: remove padconf hacks
These are no longer needed as omap_hwmod takes care of multiplexing of pads.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/serial.c | 25 +
1 files changed, 1 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 47c4353..3c1a108 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -73,7 +73,6 @@ struct omap_uart_state {
void __iomem *wk_st;
void __iomem *wk_en;
u32 wk_mask;
- u32 padconf;
u32 dma_enabled;
struct clk *ick;
@@ -309,13 +308,6 @@ static void omap_uart_enable_wakeup(struct omap_uart_state
*uart)
v |= uart-wk_mask;
__raw_writel(v, uart-wk_en);
}
-
- /* Ensure IOPAD wake-enables are set */
- if (cpu_is_omap34xx() uart-padconf) {
- u16 v = omap_ctrl_readw(uart-padconf);
- v |= OMAP3_PADCONF_WAKEUPENABLE0;
- omap_ctrl_writew(v, uart-padconf);
- }
}
static void omap_uart_disable_wakeup(struct omap_uart_state *uart)
@@ -326,13 +318,6 @@ static void omap_uart_disable_wakeup(struct
omap_uart_state *uart)
v = ~uart-wk_mask;
__raw_writel(v, uart-wk_en);
}
-
- /* Ensure IOPAD wake-enables are cleared */
- if (cpu_is_omap34xx() uart-padconf) {
- u16 v = omap_ctrl_readw(uart-padconf);
- v = ~OMAP3_PADCONF_WAKEUPENABLE0;
- omap_ctrl_writew(v, uart-padconf);
- }
}
static void omap_uart_smart_idle_enable(struct omap_uart_state *uart,
@@ -479,7 +464,6 @@ static void omap_uart_idle_init(struct omap_uart_state
*uart)
if (cpu_is_omap34xx() !cpu_is_ti816x()) {
u32 mod = (uart-num 1) ? OMAP3430_PER_MOD : CORE_MOD;
u32 wk_mask = 0;
- u32 padconf = 0;
/* XXX These PRM accesses do not belong here */
uart-wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1);
@@ -487,23 +471,18 @@ static void omap_uart_idle_init(struct omap_uart_state
*uart)
switch (uart-num) {
case 0:
wk_mask = OMAP3430_ST_UART1_MASK;
- padconf = 0x182;
break;
case 1:
wk_mask = OMAP3430_ST_UART2_MASK;
- padconf = 0x17a;
break;
case 2:
wk_mask = OMAP3430_ST_UART3_MASK;
- padconf = 0x19e;
break;
case 3:
wk_mask = OMAP3630_ST_UART4_MASK;
- padconf = 0x0d2;
break;
}
uart-wk_mask = wk_mask;
- uart-padconf = padconf;
} else if (cpu_is_omap24xx()) {
u32 wk_mask = 0;
u32 wk_en = PM_WKEN1, wk_st = PM_WKST1;
@@ -533,7 +512,6 @@ static void omap_uart_idle_init(struct omap_uart_state
*uart)
uart-wk_en = NULL;
uart-wk_st = NULL;
uart-wk_mask = 0;
- uart-padconf = 0;
}
uart-irqflags |= IRQF_SHARED;
@@ -834,8 +812,7 @@ void __init omap_serial_init_port(struct omap_board_data
*bdata)
console_unlock();
- if ((cpu_is_omap34xx() uart-padconf) ||
- (uart-wk_en uart-wk_mask)) {
+ if (uart-oh-mux || (uart-wk_en uart-wk_mask)) {
device_init_wakeup(od-pdev.dev, true);
DEV_CREATE_FILE(od-pdev.dev, dev_attr_sleep_timeout);
}
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv6 10/11] TEMP: OMAP3: pm: disable / enable PRCM chain interrupts during wakeup from suspend
This prevents system hang while attempting to access suspended console. Should most likely be fixed with proper console locking. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/mach-omap2/pm34xx.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index b9b5128..b071857 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -506,6 +506,8 @@ static int omap3_pm_begin(suspend_state_t state) disable_hlt(); suspend_state = state; omap_uart_enable_irqs(0); + disable_irq(prcm_io_irq); + disable_irq(prcm_wkup_irq); return 0; } @@ -514,6 +516,8 @@ static void omap3_pm_end(void) suspend_state = PM_SUSPEND_ON; omap_uart_enable_irqs(1); enable_hlt(); + enable_irq(prcm_io_irq); + enable_irq(prcm_wkup_irq); return; } -- 1.7.4.1 Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv6 11/11] OMAP3: pm: do not enable PRCM MPU interrupts manually
This is handled automatically by the PRCM chain interrupt mechanism now. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/mach-omap2/pm34xx.c |4 1 files changed, 0 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index b071857..926e13c 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -630,10 +630,6 @@ static void __init prcm_setup_regs(void) OMAP3430_GRPSEL_GPT1_MASK | OMAP3430_GRPSEL_GPT12_MASK, WKUP_MOD, OMAP3430_PM_MPUGRPSEL); - /* For some reason IO doesn't generate wakeup event even if -* it is selected to mpu wakeup goup */ - omap2_prm_write_mod_reg(OMAP3430_IO_EN_MASK | OMAP3430_WKUP_EN_MASK, - OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); /* Enable PM_WKEN to support DSS LPR */ omap2_prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS_MASK, -- 1.7.4.1 Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 01/11] omap: prcm: switch to a chained IRQ handler mechanism
On Mon, 2011-07-25 at 19:03 +0200, Balbi, Felipe wrote:
Hi,
On Mon, Jul 25, 2011 at 07:36:01PM +0300, Tero Kristo wrote:
Introduce a chained interrupt handler mechanism for the PRCM
interrupt, so that individual PRCM event can cleanly be handled by
handlers in separate drivers. We do this by introducing PRCM event
which drivers ? Are those somehow children of the PRCM device ??
If that's the case, you shouldn't need to match against names as you
could allocate a platform_device for your children and pass in your
resources with correct IRQ numbers.
I am not quite sure what you mean by children in this case. There are a
couple of devices that might be interested in using these, e.g. SR and
ABB come to my mind. They are closely related to PRCM yes.
names, which are then matched to the particular PRCM interrupt bit
depending on the specific OMAP SoC being used.
arch/arm/mach-omap2/prcm.c implements the chained interrupt mechanism
itself, with SoC specific support / init structure defined in
arch/arm/mach-omap2/prm2xxx_3xxx.c and arch/arm/mach-omap2/prm4xxx.c
respectively. At initialization time, the set of PRCM events is filtered
against the SoC on which we are running, keeping only the ones that are
actually useful. All the logic is written to be generic with regard to
OMAP3/OMAP4, even though OMAP3 has single PRCM event registers and OMAP4
has two PRCM event registers.
Then if OMAP5 has 3, OMAP6 4 and OMAP7 5, OMAP3 will also have an array
of 5 PRCM events even though it only needs one, another argument for
dynamic allocation ?
---
[snip]
@@ -246,64 +249,7 @@ static int _prcm_int_handle_wakeup(void)
c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1);
}
- return c;
-}
-
-/*
- * PRCM Interrupt Handler
- *
- * The PRM_IRQSTATUS_MPU register indicates if there are any pending
- * interrupts from the PRCM for the MPU. These bits must be cleared in
- * order to clear the PRCM interrupt. The PRCM interrupt handler is
- * implemented to simply clear the PRM_IRQSTATUS_MPU in order to clear
- * the PRCM interrupt. Please note that bit 0 of the PRM_IRQSTATUS_MPU
- * register indicates that a wake-up event is pending for the MPU and
- * this bit can only be cleared if the all the wake-up events latched
- * in the various PM_WKST_x registers have been cleared. The interrupt
- * handler is implemented using a do-while loop so that if a wake-up
- * event occurred during the processing of the prcm interrupt handler
- * (setting a bit in the corresponding PM_WKST_x register and thus
- * preventing us from clearing bit 0 of the PRM_IRQSTATUS_MPU register)
- * this would be handled.
- */
-static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
-{
- u32 irqenable_mpu, irqstatus_mpu;
- int c = 0;
-
- irqenable_mpu = omap2_prm_read_mod_reg(OCP_MOD,
-OMAP3_PRM_IRQENABLE_MPU_OFFSET);
- irqstatus_mpu = omap2_prm_read_mod_reg(OCP_MOD,
-OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
- irqstatus_mpu = irqenable_mpu;
-
- do {
- if (irqstatus_mpu (OMAP3430_WKUP_ST_MASK |
-OMAP3430_IO_ST_MASK)) {
- c = _prcm_int_handle_wakeup();
-
- /*
-* Is the MPU PRCM interrupt handler racing with the
-* IVA2 PRCM interrupt handler ?
-*/
- WARN(c == 0, prcm: WARNING: PRCM indicated MPU wakeup
-but no wakeup sources are marked\n);
- } else {
- /* XXX we need to expand our PRCM interrupt handler */
- WARN(1, prcm: WARNING: PRCM interrupt received, but
-no code to handle it (%08x)\n, irqstatus_mpu);
- }
-
- omap2_prm_write_mod_reg(irqstatus_mpu, OCP_MOD,
- OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
-
- irqstatus_mpu = omap2_prm_read_mod_reg(OCP_MOD,
- OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
- irqstatus_mpu = irqenable_mpu;
-
- } while (irqstatus_mpu);
-
- return IRQ_HANDLED;
+ return c ? IRQ_HANDLED : IRQ_NONE;
}
static void omap34xx_save_context(u32 *save)
@@ -875,20 +821,35 @@ static int __init omap3_pm_init(void)
/* XXX prcm_setup_regs needs to be before enabling hw
* supervised mode for powerdomains */
prcm_setup_regs();
+ ret = omap3_prcm_irq_init();
+ if (ret) {
+ pr_err(omap_prcm_irq_init() failed with %d\n, ret);
+ goto err_prcm_irq_init;
+ }
+
+ prcm_wkup_irq = omap_prcm_event_to_irq(wkup);
+ prcm_io_irq = omap_prcm_event_to_irq(io);
+
+ ret = request_irq(prcm_wkup_irq, _prcm_int_handle_wakeup,
+ IRQF_NO_SUSPEND
[PATCHv4 0/4] OMAP SMPS regulator driver
Hello, This version has following changes: - does not move voltage.h under plat-omap anymore, instead creates a stub voltage.h under plat-omap with minimal support required - platform device registration is now done from voltage.c, no need for board file changes anymore - Kconfig option does not depend upon TWL core anymore -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv4 1/4] omap: voltage: add a stub header file
Needed as some of the voltage layer functionality is accessed from the SMPS regulator driver. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/plat-omap/include/plat/voltage.h | 20 1 files changed, 20 insertions(+), 0 deletions(-) create mode 100644 arch/arm/plat-omap/include/plat/voltage.h diff --git a/arch/arm/plat-omap/include/plat/voltage.h b/arch/arm/plat-omap/include/plat/voltage.h new file mode 100644 index 000..0a6a482 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/voltage.h @@ -0,0 +1,20 @@ +/* + * OMAP Voltage Management Routines + * + * Copyright (C) 2011, Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_OMAP_VOLTAGE_H +#define __ARCH_ARM_OMAP_VOLTAGE_H + +struct voltagedomain; + +struct voltagedomain *voltdm_lookup(const char *name); +int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); +unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); + +#endif -- 1.7.4.1 Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv4 3/4] omap: smps: add smps regulator init to voltage.c
All voltagedomains that have support for vc and vp are now automatically
registered with SMPS regulator driver. Voltage.c builds a platform device
structure for this purpose during late init.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/voltage.c | 68 +
1 files changed, 68 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index cebc8b1..790f7ab 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -25,6 +25,9 @@
#include linux/debugfs.h
#include linux/slab.h
#include linux/clk.h
+#include linux/platform_device.h
+#include linux/regulator/machine.h
+#include linux/regulator/omap-smps.h
#include plat/common.h
@@ -238,6 +241,39 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
}
}
+static void smps_add_regulator(struct platform_device *smps_dev,
+ struct voltagedomain *voltdm)
+{
+ struct omap_smps_platform_data *info;
+ struct regulator_init_data *init_data;
+ struct regulator_consumer_supply *supply;
+
+ if (!smps_dev || !voltdm)
+ return;
+
+ info = smps_dev-dev.platform_data;
+
+ init_data = kzalloc(sizeof(struct regulator_init_data), GFP_KERNEL);
+ supply = kzalloc(sizeof(struct regulator_consumer_supply), GFP_KERNEL);
+
+ if (!init_data || !supply) {
+ kfree(init_data);
+ kfree(supply);
+ return;
+ }
+ supply-supply = vcc;
+ supply-dev_name = voltdm-name;
+ init_data-constraints.min_uV = 60;
+ init_data-constraints.max_uV = 145;
+ init_data-constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
+ init_data-constraints.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE;
+ init_data-num_consumer_supplies = 1;
+ init_data-consumer_supplies = supply;
+
+ info-regulators[info-num_regulators++] = init_data;
+}
+
+
/**
* omap_voltage_late_init() - Init the various voltage parameters
*
@@ -248,6 +284,10 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
int __init omap_voltage_late_init(void)
{
struct voltagedomain *voltdm;
+ struct platform_device *smps_dev[1];
+ struct omap_smps_platform_data *smps_pdata;
+ struct regulator_init_data **reg_list;
+ int num_smps = 0;
if (list_empty(voltdm_list)) {
pr_err(%s: Voltage driver support not added\n,
@@ -279,8 +319,36 @@ int __init omap_voltage_late_init(void)
voltdm-scale = omap_vp_forceupdate_scale;
omap_vp_init(voltdm);
}
+
+ if (voltdm-vc voltdm-vp)
+ num_smps++;
}
+ if (num_smps) {
+ smps_dev[0] = kzalloc(sizeof(struct platform_device),
+ GFP_KERNEL);
+ smps_pdata = kzalloc(sizeof(struct omap_smps_platform_data),
+ GFP_KERNEL);
+ reg_list = kzalloc(sizeof(void *) * num_smps, GFP_KERNEL);
+
+ if (!smps_dev[0] || !smps_pdata || !reg_list) {
+ kfree(smps_dev[0]);
+ kfree(smps_pdata);
+ kfree(reg_list);
+ return -ENOMEM;
+ }
+
+ smps_pdata-regulators = reg_list;
+ smps_dev[0]-name = omap-smps;
+ smps_dev[0]-id = -1;
+ smps_dev[0]-dev.platform_data = smps_pdata;
+
+ list_for_each_entry(voltdm, voltdm_list, node)
+ if (voltdm-vp voltdm-vc)
+ smps_add_regulator(smps_dev[0], voltdm);
+
+ platform_add_devices(smps_dev, 1);
+ }
return 0;
}
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv4 4/4] TEMP: OMAP3: beagle rev-c4: enable OPP6
Beagleboard rev-c4 has a speed sorted OMAP3530 chip which can run at 720MHz.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 32 +++
arch/arm/mach-omap2/opp3xxx_data.c |4 +++
2 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 34f8411..ba84c0e 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -468,6 +468,38 @@ static void __init beagle_opp_init(void)
return;
}
+ /* Custom OPP enabled for C4 */
+ if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4) {
+ struct omap_hwmod *mh = omap_hwmod_lookup(mpu);
+ struct omap_hwmod *dh = omap_hwmod_lookup(iva);
+ struct device *dev;
+
+ if (!mh || !dh) {
+ pr_err(%s: Aiee.. no mpu/dsp devices? %p %p\n,
+ __func__, mh, dh);
+ }
+ /* Enable MPU 720MHz opp */
+ dev = mh-od-pdev.dev;
+ r = opp_enable(dev, 72000);
+
+ /* Enable IVA 520MHz opp */
+ dev = dh-od-pdev.dev;
+ r |= opp_enable(dev, 52000);
+
+ if (r) {
+ pr_err(%s: failed to enable higher opp %d\n,
+ __func__, r);
+ /*
+* Cleanup - disable the higher freqs - we dont care
+* about the results
+*/
+ dev = mh-od-pdev.dev;
+ opp_disable(dev, 72000);
+ dev = dh-od-pdev.dev;
+ opp_disable(dev, 52000);
+ }
+ }
+
/* Custom OPP enabled for XM */
if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) {
struct omap_hwmod *mh = omap_hwmod_lookup(mpu);
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c
b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..a0f5fe1 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -98,6 +98,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[]
= {
OPP_INITIALIZER(mpu, true, 55000, OMAP3430_VDD_MPU_OPP4_UV),
/* MPU OPP5 */
OPP_INITIALIZER(mpu, true, 6, OMAP3430_VDD_MPU_OPP5_UV),
+ /* MPU OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER(mpu, false, 72000, OMAP3430_VDD_MPU_OPP5_UV),
/*
* L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
@@ -123,6 +125,8 @@ static struct omap_opp_def __initdata
omap34xx_opp_def_list[] = {
OPP_INITIALIZER(iva, true, 4, OMAP3430_VDD_MPU_OPP4_UV),
/* DSP OPP5 */
OPP_INITIALIZER(iva, true, 43000, OMAP3430_VDD_MPU_OPP5_UV),
+ /* DSP OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER(iva, false, 52000, OMAP3430_VDD_MPU_OPP5_UV),
};
static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv4 2/4] regulator: omap smps regulator driver
OMAP SMPS regulator driver provides access to OMAP voltage processor
controlled regulators. These include VDD_MPU and VDD_CORE for OMAP3 and
additionally VDD_IVA for OMAP4. SMPS regulators use the OMAP voltage
layer for the actual voltage regulation operations.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Kevin Hilman khil...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Todd Poynor toddpoy...@google.com
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Liam Girdwood l...@ti.com
Cc: Graeme Gregory g...@slimlogic.co.uk
---
drivers/regulator/Kconfig |8 ++
drivers/regulator/Makefile |1 +
drivers/regulator/omap-smps-regulator.c | 182 +++
include/linux/regulator/omap-smps.h | 20
4 files changed, 211 insertions(+), 0 deletions(-)
create mode 100644 drivers/regulator/omap-smps-regulator.c
create mode 100644 include/linux/regulator/omap-smps.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index d7ed20f..2ba8ed2 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -303,5 +303,13 @@ config REGULATOR_TPS65910
help
This driver supports TPS65910 voltage regulator chips.
+config REGULATOR_OMAP_SMPS
+ tristate TI OMAP SMPS Power Regulators
+ depends on (ARCH_OMAP3 || ARCH_OMAP4) PM
+ help
+ This driver supports the OMAP3 / OMAP4 SMPS regulators for VDD1,
+ VDD2 and VDD3. These regulators are accessed using the voltage
+ processor interface of OMAP.
+
endif
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 3932d2e..191e3d5 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -43,5 +43,6 @@ obj-$(CONFIG_REGULATOR_ISL6271A) += isl6271a-regulator.o
obj-$(CONFIG_REGULATOR_AB8500) += ab8500.o
obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o
obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o
+obj-$(CONFIG_REGULATOR_OMAP_SMPS) += omap-smps-regulator.o
ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/omap-smps-regulator.c
b/drivers/regulator/omap-smps-regulator.c
new file mode 100644
index 000..e4a0262
--- /dev/null
+++ b/drivers/regulator/omap-smps-regulator.c
@@ -0,0 +1,181 @@
+/*
+ * OMAP SMPS regulator driver
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ *
+ * Author: Tero Kristo t-kri...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/kernel.h
+#include linux/ctype.h
+#include linux/module.h
+#include linux/slab.h
+#include linux/init.h
+#include linux/err.h
+#include linux/delay.h
+#include linux/platform_device.h
+#include linux/regulator/driver.h
+#include linux/regulator/machine.h
+#include linux/regulator/omap-smps.h
+#include plat/voltage.h
+
+#define DRIVER_NAMEomap-smps
+
+struct omap_smps_reg_info {
+ const char *vdd_name;
+ struct regulator_dev*rdev;
+ struct voltagedomain*voltdm;
+ struct regulator_desc desc;
+};
+
+static int omap_smps_set_voltage(struct regulator_dev *rdev, int min_uV,
+ int max_uV, unsigned *selector)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return voltdm_scale(info-voltdm, min_uV);
+}
+
+static int omap_smps_get_voltage(struct regulator_dev *rdev)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return voltdm_get_voltage(info-voltdm);
+}
+
+static struct regulator_ops omap_smps_ops = {
+ .set_voltage= omap_smps_set_voltage,
+ .get_voltage= omap_smps_get_voltage,
+};
+
+#define SMPS_REG(name) { \
+ .vdd_name = #name, \
+ .desc = { \
+ .ops = omap_smps_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .owner = THIS_MODULE, \
+ }, \
+ }
+
+static struct omap_smps_reg_info omap_smps_regs[] = {
+ SMPS_REG(mpu),
+ SMPS_REG(mpu_iva),
+ SMPS_REG(iva),
+ SMPS_REG(core),
+};
+
+static void omap_smps_reg_cleanup(void)
+{
+ int i;
+ struct omap_smps_reg_info *info;
+
+ for (i = 0; i ARRAY_SIZE(omap_smps_regs); i++) {
+ info = omap_smps_regs[i];
+ if (info-rdev) {
+ regulator_unregister(info-rdev);
+ info-rdev = NULL;
+ }
+
+ kfree(info-desc.name);
+ info-desc.name = NULL;
+ }
+}
+
+static struct regulator_init_data dummy_initdata __initdata;
+
+static int __devinit omap_smps_reg_probe(struct platform_device *pdev)
+{
+ int i, j, ret;
+ struct omap_smps_reg_info *info;
+ struct
[RFC 0/2] voltage / oscillator parameter segregation
Hi, Following patch attemps to separate some board specific parameters from the core PM code. These parameters can then be specified in the board files. Some things missing from this work currently are hooks from the sleep code to select proper setup times based on the sleep mode... and well, the patch should most likely be split up in multiple parts. Beagle boart setup changes provided for reference, values on it are basically pulled from a sleeve. -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC 1/2] OMAP3+: voltage / oscillator parameter segregation
This patch separates board specific voltage and oscillator ramp / setup
times from the core code. Things changed:
- on/sleep/ret/off voltage setup moved from common twl code to
VC / VP data (opp_data.c files)
- added board support for vdd ramp up / down times
- added board support for oscillator setup time declaration
Todo: split patch into more easily manageable parts.
Applies on top of pm/wip/voltdm branch, based on work done by Vishwanath
Sripathy.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Vishwanath Sripathy vishwanath...@ti.com
---
arch/arm/mach-omap2/omap_opp_data.h | 15 +++
arch/arm/mach-omap2/omap_twl.c| 59 --
arch/arm/mach-omap2/opp3xxx_data.c| 62 ++
arch/arm/mach-omap2/opp4xxx_data.c| 47
arch/arm/mach-omap2/prcm.c| 11 ++
arch/arm/mach-omap2/prm2xxx_3xxx.c|6 +
arch/arm/mach-omap2/prm2xxx_3xxx.h|1 +
arch/arm/mach-omap2/prm44xx.c |7 +
arch/arm/mach-omap2/prm44xx.h |1 +
arch/arm/mach-omap2/vc.c | 153 +
arch/arm/mach-omap2/vc.h |1 -
arch/arm/mach-omap2/voltage.c | 22
arch/arm/mach-omap2/voltage.h | 55 -
arch/arm/mach-omap2/voltagedomains3xxx_data.c |8 ++
arch/arm/mach-omap2/voltagedomains44xx_data.c |8 ++
arch/arm/mach-omap2/vp.c |4 +-
arch/arm/plat-omap/include/plat/prcm.h|7 +
17 files changed, 377 insertions(+), 90 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_opp_data.h
b/arch/arm/mach-omap2/omap_opp_data.h
index c784c12..b5fe711 100644
--- a/arch/arm/mach-omap2/omap_opp_data.h
+++ b/arch/arm/mach-omap2/omap_opp_data.h
@@ -86,11 +86,26 @@ extern int __init omap_init_opp_table(struct omap_opp_def
*opp_def,
extern struct omap_volt_data omap34xx_vddmpu_volt_data[];
extern struct omap_volt_data omap34xx_vddcore_volt_data[];
+extern struct omap_vp_param omap34xx_mpu_vp_data;
+extern struct omap_vp_param omap34xx_core_vp_data;
+extern struct omap_vc_param omap34xx_mpu_vc_data;
+extern struct omap_vc_param omap34xx_core_vc_data;
+
extern struct omap_volt_data omap36xx_vddmpu_volt_data[];
extern struct omap_volt_data omap36xx_vddcore_volt_data[];
+extern struct omap_vp_param omap36xx_mpu_vp_data;
+extern struct omap_vp_param omap36xx_core_vp_data;
+extern struct omap_vc_param omap36xx_mpu_vc_data;
+extern struct omap_vc_param omap36xx_core_vc_data;
extern struct omap_volt_data omap44xx_vdd_mpu_volt_data[];
extern struct omap_volt_data omap44xx_vdd_iva_volt_data[];
extern struct omap_volt_data omap44xx_vdd_core_volt_data[];
+extern struct omap_vp_param omap44xx_mpu_vp_data;
+extern struct omap_vp_param omap44xx_iva_vp_data;
+extern struct omap_vp_param omap44xx_core_vp_data;
+extern struct omap_vc_param omap44xx_mpu_vc_data;
+extern struct omap_vc_param omap44xx_iva_vc_data;
+extern struct omap_vc_param omap44xx_core_vc_data;
#endif /* __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H */
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index f515a1a..d239792 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -30,16 +30,6 @@
#define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04
#define OMAP3_VP_VLIMITTO_TIMEOUT_US 200
-#define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14
-#define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42
-#define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18
-#define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2c
-
-#define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18
-#define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3c
-#define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18
-#define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30
-
#define OMAP4_SRI2C_SLAVE_ADDR 0x12
#define OMAP4_VDD_MPU_SR_VOLT_REG 0x55
#define OMAP4_VDD_MPU_SR_CMD_REG 0x56
@@ -53,13 +43,6 @@
#define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04
#define OMAP4_VP_VLIMITTO_TIMEOUT_US 200
-#define OMAP4_VP_MPU_VLIMITTO_VDDMIN 0xA
-#define OMAP4_VP_MPU_VLIMITTO_VDDMAX 0x39
-#define OMAP4_VP_IVA_VLIMITTO_VDDMIN 0xA
-#define OMAP4_VP_IVA_VLIMITTO_VDDMAX 0x2D
-#define OMAP4_VP_CORE_VLIMITTO_VDDMIN 0xA
-#define OMAP4_VP_CORE_VLIMITTO_VDDMAX 0x28
-
static bool is_offset_valid;
static u8 smps_offset;
/*
@@ -158,16 +141,9 @@ static u8 twl6030_uv_to_vsel(unsigned long uv)
static struct omap_voltdm_pmic omap3_mpu_pmic = {
.slew_rate = 4000,
.step_size = 12500,
- .on_volt= 120,
- .onlp_volt = 100,
- .ret_volt = 975000,
- .off_volt = 60,
- .volt_setup_time= 0xfff,
.vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP3_VP_VSTEPMIN_VSTEPMIN,
.vp_vstepmax= OMAP3_VP_VSTEPMAX_VSTEPMAX,
- .vp_vddmin
[RFC 2/2] TEMP: OMAP3: beagle: added dummy vdd ramp up and clock setup times
This patch provided just as an example, actual times should be measured
for the board.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 36 +++
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 34f8411..fea94cc 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -47,11 +47,13 @@
#include plat/nand.h
#include plat/usb.h
#include plat/omap_device.h
+#include plat/prcm.h
#include mux.h
#include hsmmc.h
#include pm.h
#include common-board-devices.h
+#include voltage.h
/*
* OMAP3 Beagle revision
@@ -83,6 +85,29 @@ static struct gpio omap3_beagle_rev_gpios[] __initdata = {
{ 173, GPIOF_IN, rev_id_2},
};
+struct omap_volt_board_data beagle_mpu_volt_data = {
+ .vdd_setup_ret = {
+ .ramp_up = 50,
+ },
+ .vdd_setup_off = {
+ .ramp_up = 100,
+ },
+};
+
+struct omap_volt_board_data beagle_core_volt_data = {
+ .vdd_setup_ret = {
+ .ramp_up = 50,
+ },
+ .vdd_setup_off = {
+ .ramp_up = 100,
+ },
+};
+
+struct omap_osc_data beagle_osc_data = {
+ .clk_setup_ret = 50,
+ .clk_setup_off = 5000,
+};
+
static void __init omap3_beagle_init_rev(void)
{
int ret;
@@ -506,6 +531,8 @@ static void __init beagle_opp_init(void)
static void __init omap3_beagle_init(void)
{
+ struct voltagedomain *voltdm;
+
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap3_beagle_init_rev();
omap3_beagle_i2c_init();
@@ -532,6 +559,15 @@ static void __init omap3_beagle_init(void)
beagle_display_init();
beagle_opp_init();
+
+ voltdm = voltdm_lookup(mpu_iva);
+ pr_info(beagle: adding volt data\n);
+ omap_voltage_register_board_params(voltdm, beagle_mpu_volt_data);
+
+ voltdm = voltdm_lookup(core);
+ omap_voltage_register_board_params(voltdm, beagle_core_volt_data);
+
+ omap_osc_register(beagle_osc_data);
}
MACHINE_START(OMAP3_BEAGLE, OMAP3 Beagle Board)
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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RE: [RFC 1/2] OMAP3+: voltage / oscillator parameter segregation
On Thu, 2011-08-04 at 15:57 +0200, Sripathy, Vishwanath wrote: Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -Original Message- From: Tero Kristo [mailto:t-kri...@ti.com] Sent: Wednesday, August 03, 2011 8:59 PM To: linux-omap@vger.kernel.org Cc: Vishwanath Sripathy Subject: [RFC 1/2] OMAP3+: voltage / oscillator parameter segregation This patch separates board specific voltage and oscillator ramp / setup times from the core code. Things changed: - on/sleep/ret/off voltage setup moved from common twl code to VC / VP data (opp_data.c files) - added board support for vdd ramp up / down times - added board support for oscillator setup time declaration Todo: split patch into more easily manageable parts. Applies on top of pm/wip/voltdm branch, based on work done by Vishwanath Sripathy. Signed-off-by: Tero Kristo t-kri...@ti.com Cc: Vishwanath Sripathy vishwanath...@ti.com --- arch/arm/mach-omap2/omap_opp_data.h | 15 +++ arch/arm/mach-omap2/omap_twl.c| 59 -- arch/arm/mach-omap2/opp3xxx_data.c| 62 ++ arch/arm/mach-omap2/opp4xxx_data.c| 47 arch/arm/mach-omap2/prcm.c| 11 ++ arch/arm/mach-omap2/prm2xxx_3xxx.c|6 + arch/arm/mach-omap2/prm2xxx_3xxx.h|1 + arch/arm/mach-omap2/prm44xx.c |7 + arch/arm/mach-omap2/prm44xx.h |1 + arch/arm/mach-omap2/vc.c | 153 + arch/arm/mach-omap2/vc.h |1 - arch/arm/mach-omap2/voltage.c | 22 arch/arm/mach-omap2/voltage.h | 55 - arch/arm/mach-omap2/voltagedomains3xxx_data.c |8 ++ arch/arm/mach-omap2/voltagedomains44xx_data.c |8 ++ arch/arm/mach-omap2/vp.c |4 +- arch/arm/plat-omap/include/plat/prcm.h|7 + 17 files changed, 377 insertions(+), 90 deletions(-) diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach- omap2/omap_opp_data.h index c784c12..b5fe711 100644 --- a/arch/arm/mach-omap2/omap_opp_data.h +++ b/arch/arm/mach-omap2/omap_opp_data.h @@ -86,11 +86,26 @@ extern int __init omap_init_opp_table(struct omap_opp_def *opp_def, extern struct omap_volt_data omap34xx_vddmpu_volt_data[]; extern struct omap_volt_data omap34xx_vddcore_volt_data[]; +extern struct omap_vp_param omap34xx_mpu_vp_data; +extern struct omap_vp_param omap34xx_core_vp_data; +extern struct omap_vc_param omap34xx_mpu_vc_data; +extern struct omap_vc_param omap34xx_core_vc_data; + extern struct omap_volt_data omap36xx_vddmpu_volt_data[]; extern struct omap_volt_data omap36xx_vddcore_volt_data[]; +extern struct omap_vp_param omap36xx_mpu_vp_data; +extern struct omap_vp_param omap36xx_core_vp_data; +extern struct omap_vc_param omap36xx_mpu_vc_data; +extern struct omap_vc_param omap36xx_core_vc_data; extern struct omap_volt_data omap44xx_vdd_mpu_volt_data[]; extern struct omap_volt_data omap44xx_vdd_iva_volt_data[]; extern struct omap_volt_data omap44xx_vdd_core_volt_data[]; +extern struct omap_vp_param omap44xx_mpu_vp_data; +extern struct omap_vp_param omap44xx_iva_vp_data; +extern struct omap_vp_param omap44xx_core_vp_data; +extern struct omap_vc_param omap44xx_mpu_vc_data; +extern struct omap_vc_param omap44xx_iva_vc_data; +extern struct omap_vc_param omap44xx_core_vc_data; #endif /* __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H */ diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach- omap2/omap_twl.c index f515a1a..d239792 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -30,16 +30,6 @@ #define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04 #define OMAP3_VP_VLIMITTO_TIMEOUT_US 200 -#define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14 -#define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42 -#define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18 -#define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2c - -#define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18 -#define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3c -#define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18 -#define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30 - #define OMAP4_SRI2C_SLAVE_ADDR 0x12 #define OMAP4_VDD_MPU_SR_VOLT_REG0x55 #define OMAP4_VDD_MPU_SR_CMD_REG 0x56 @@ -53,13 +43,6 @@ #define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04 #define OMAP4_VP_VLIMITTO_TIMEOUT_US 200 -#define OMAP4_VP_MPU_VLIMITTO_VDDMIN 0xA -#define OMAP4_VP_MPU_VLIMITTO_VDDMAX 0x39 -#define OMAP4_VP_IVA_VLIMITTO_VDDMIN 0xA -#define OMAP4_VP_IVA_VLIMITTO_VDDMAX 0x2D -#define OMAP4_VP_CORE_VLIMITTO_VDDMIN0xA -#define OMAP4_VP_CORE_VLIMITTO_VDDMAX0x28 - static bool is_offset_valid; static u8 smps_offset; /* @@ -158,16 +141,9 @@ static u8
[RFCv2 2/2] TEMP: OMAP3: beagle: added dummy clock setup times
This patch provided just as an example, actual time should be checked from
the datasheet.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 34f8411..6b3b67a 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -47,6 +47,7 @@
#include plat/nand.h
#include plat/usb.h
#include plat/omap_device.h
+#include plat/prcm.h
#include mux.h
#include hsmmc.h
@@ -83,6 +84,11 @@ static struct gpio omap3_beagle_rev_gpios[] __initdata = {
{ 173, GPIOF_IN, rev_id_2},
};
+struct omap_osc_data beagle_osc_data = {
+ .clk_setup_ret = 50,
+ .clk_setup_off = 5000,
+};
+
static void __init omap3_beagle_init_rev(void)
{
int ret;
@@ -532,6 +538,8 @@ static void __init omap3_beagle_init(void)
beagle_display_init();
beagle_opp_init();
+
+ omap_osc_register(beagle_osc_data);
}
MACHINE_START(OMAP3_BEAGLE, OMAP3 Beagle Board)
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[RFCv2 1/2] OMAP3+: voltage / oscillator parameter segregation
This patch separates board specific voltage and oscillator ramp / setup
times from the core code. Things changed:
- on/sleep/ret/off voltage setup moved from common twl code to
VC / VP data (opp_data.c files)
- added board support for oscillator setup time declaration
- removed is_initialized static variable from vc_init_channel, as we
have to set the setup times for each VDD channel, not only once
Todo:
- split patch into more easily manageable parts.
- figure out a way to configure setup times based on used sleep mode
Applies on top of pm/wip/voltdm branch, based on work done by Vishwanath
Sripathy.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_opp_data.h | 15 ++
arch/arm/mach-omap2/omap_twl.c| 25
arch/arm/mach-omap2/opp3xxx_data.c| 62
arch/arm/mach-omap2/opp4xxx_data.c| 47 ++
arch/arm/mach-omap2/prcm.c| 11 ++
arch/arm/mach-omap2/prm2xxx_3xxx.c|6 +
arch/arm/mach-omap2/prm2xxx_3xxx.h|1 +
arch/arm/mach-omap2/prm44xx.c |7 +
arch/arm/mach-omap2/prm44xx.h |1 +
arch/arm/mach-omap2/vc.c | 193 +
arch/arm/mach-omap2/vc.h |1 -
arch/arm/mach-omap2/voltage.h | 18 ++-
arch/arm/mach-omap2/voltagedomains3xxx_data.c |8 +
arch/arm/mach-omap2/voltagedomains44xx_data.c |8 +
arch/arm/mach-omap2/vp.c |6 +-
arch/arm/plat-omap/include/plat/prcm.h|7 +
16 files changed, 356 insertions(+), 60 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_opp_data.h
b/arch/arm/mach-omap2/omap_opp_data.h
index c784c12..b5fe711 100644
--- a/arch/arm/mach-omap2/omap_opp_data.h
+++ b/arch/arm/mach-omap2/omap_opp_data.h
@@ -86,11 +86,26 @@ extern int __init omap_init_opp_table(struct omap_opp_def
*opp_def,
extern struct omap_volt_data omap34xx_vddmpu_volt_data[];
extern struct omap_volt_data omap34xx_vddcore_volt_data[];
+extern struct omap_vp_param omap34xx_mpu_vp_data;
+extern struct omap_vp_param omap34xx_core_vp_data;
+extern struct omap_vc_param omap34xx_mpu_vc_data;
+extern struct omap_vc_param omap34xx_core_vc_data;
+
extern struct omap_volt_data omap36xx_vddmpu_volt_data[];
extern struct omap_volt_data omap36xx_vddcore_volt_data[];
+extern struct omap_vp_param omap36xx_mpu_vp_data;
+extern struct omap_vp_param omap36xx_core_vp_data;
+extern struct omap_vc_param omap36xx_mpu_vc_data;
+extern struct omap_vc_param omap36xx_core_vc_data;
extern struct omap_volt_data omap44xx_vdd_mpu_volt_data[];
extern struct omap_volt_data omap44xx_vdd_iva_volt_data[];
extern struct omap_volt_data omap44xx_vdd_core_volt_data[];
+extern struct omap_vp_param omap44xx_mpu_vp_data;
+extern struct omap_vp_param omap44xx_iva_vp_data;
+extern struct omap_vp_param omap44xx_core_vp_data;
+extern struct omap_vc_param omap44xx_mpu_vc_data;
+extern struct omap_vc_param omap44xx_iva_vc_data;
+extern struct omap_vc_param omap44xx_core_vc_data;
#endif /* __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H */
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index f515a1a..07ae785 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -158,11 +158,6 @@ static u8 twl6030_uv_to_vsel(unsigned long uv)
static struct omap_voltdm_pmic omap3_mpu_pmic = {
.slew_rate = 4000,
.step_size = 12500,
- .on_volt= 120,
- .onlp_volt = 100,
- .ret_volt = 975000,
- .off_volt = 60,
- .volt_setup_time= 0xfff,
.vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP3_VP_VSTEPMIN_VSTEPMIN,
.vp_vstepmax= OMAP3_VP_VSTEPMAX_VSTEPMAX,
@@ -179,11 +174,6 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = {
static struct omap_voltdm_pmic omap3_core_pmic = {
.slew_rate = 4000,
.step_size = 12500,
- .on_volt= 120,
- .onlp_volt = 100,
- .ret_volt = 975000,
- .off_volt = 60,
- .volt_setup_time= 0xfff,
.vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP3_VP_VSTEPMIN_VSTEPMIN,
.vp_vstepmax= OMAP3_VP_VSTEPMAX_VSTEPMAX,
@@ -200,11 +190,6 @@ static struct omap_voltdm_pmic omap3_core_pmic = {
static struct omap_voltdm_pmic omap4_mpu_pmic = {
.slew_rate = 4000,
.step_size = 12660,
- .on_volt= 1375000,
- .onlp_volt = 1375000,
- .ret_volt = 83,
- .off_volt = 0,
- .volt_setup_time= 0,
.vp_erroroffset
Re: [PATCHv4 3/4] omap: smps: add smps regulator init to voltage.c
Hi Kevin, Sorry for bit late reply, I've been on holiday during last 3 weeks. On Sat, 2011-08-06 at 01:37 +0200, Hilman, Kevin wrote: Tero Kristo t-kri...@ti.com writes: All voltagedomains that have support for vc and vp are now automatically registered with SMPS regulator driver. Voltage.c builds a platform device structure for this purpose during late init. Signed-off-by: Tero Kristo t-kri...@ti.com With the creation of this dummy platform device, I'm a bit confused about how is the mapping from device to regulator meant to work here. e.g., for MPU DVFS, if I want to also scale voltage in the CPUfreq driver, I would do something like dev = omap2_get_mpuss_device() and then want to somehow get the regulator associated with the MPU device so I can do a regulator_set_voltage(). What would I use for the id argument of regulator_get()? Hmm right, I haven't been thinking about this part in too much detail. However, the regulator names are built in following way: - take voltdm name (e.g. mpu_iva) - add VDD_ in the beginning - capitalize whole thing (results in VDD_MPU_IVA) What's missing (at least in my mind) is the mapping of devices to regulators. True, should I think of something for this? Specifically, this part doesn't seem right: + supply-supply = vcc; + supply-dev_name = voltdm-name; becase voltdm-name is not a device name. Kevin Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv4 3/4] omap: smps: add smps regulator init to voltage.c
On Fri, 2011-08-05 at 23:54 +0200, Hilman, Kevin wrote:
Tero Kristo t-kri...@ti.com writes:
All voltagedomains that have support for vc and vp are now automatically
registered with SMPS regulator driver. Voltage.c builds a platform device
structure for this purpose during late init.
Signed-off-by: Tero Kristo t-kri...@ti.com
[...]
+static void smps_add_regulator(struct platform_device *smps_dev,
+ struct voltagedomain *voltdm)
+{
+ struct omap_smps_platform_data *info;
+ struct regulator_init_data *init_data;
+ struct regulator_consumer_supply *supply;
+
+ if (!smps_dev || !voltdm)
+ return;
+
+ info = smps_dev-dev.platform_data;
+
+ init_data = kzalloc(sizeof(struct regulator_init_data), GFP_KERNEL);
+ supply = kzalloc(sizeof(struct regulator_consumer_supply), GFP_KERNEL);
+
+ if (!init_data || !supply) {
+ kfree(init_data);
+ kfree(supply);
+ return;
+ }
+ supply-supply = vcc;
+ supply-dev_name = voltdm-name;
+ init_data-constraints.min_uV = 60;
+ init_data-constraints.max_uV = 145;
These values should come from the OMAP/PMIC limitations, not from hard
coded values.
True. Should this wait until the work is finished with the PMIC
parameter work or should I try to figure out a way to do this already
now?
Kevin
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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Re: [PATCHv4 3/4] omap: smps: add smps regulator init to voltage.c
On Fri, 2011-08-05 at 23:52 +0200, Hilman, Kevin wrote:
Tero Kristo t-kri...@ti.com writes:
All voltagedomains that have support for vc and vp are now automatically
registered with SMPS regulator driver. Voltage.c builds a platform device
structure for this purpose during late init.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/voltage.c | 68
+
1 files changed, 68 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index cebc8b1..790f7ab 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -25,6 +25,9 @@
#include linux/debugfs.h
#include linux/slab.h
#include linux/clk.h
+#include linux/platform_device.h
+#include linux/regulator/machine.h
+#include linux/regulator/omap-smps.h
#include plat/common.h
@@ -238,6 +241,39 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
}
}
+static void smps_add_regulator(struct platform_device *smps_dev,
Minor: maybe smps_add_regulator_info() is a better name, since it
doesn't actually add a regulator.
I can change this.
+ struct voltagedomain *voltdm)
+{
+ struct omap_smps_platform_data *info;
+ struct regulator_init_data *init_data;
+ struct regulator_consumer_supply *supply;
+
+ if (!smps_dev || !voltdm)
+ return;
+
+ info = smps_dev-dev.platform_data;
+
+ init_data = kzalloc(sizeof(struct regulator_init_data), GFP_KERNEL);
+ supply = kzalloc(sizeof(struct regulator_consumer_supply), GFP_KERNEL);
+
+ if (!init_data || !supply) {
+ kfree(init_data);
+ kfree(supply);
+ return;
+ }
+ supply-supply = vcc;
+ supply-dev_name = voltdm-name;
+ init_data-constraints.min_uV = 60;
+ init_data-constraints.max_uV = 145;
+ init_data-constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
+ init_data-constraints.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE;
+ init_data-num_consumer_supplies = 1;
+ init_data-consumer_supplies = supply;
+
+ info-regulators[info-num_regulators++] = init_data;
+}
+
+
/**
* omap_voltage_late_init() - Init the various voltage parameters
*
@@ -248,6 +284,10 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
int __init omap_voltage_late_init(void)
{
struct voltagedomain *voltdm;
+ struct platform_device *smps_dev[1];
why the array? a simple pointer should suffice:
I can try to change this. platform_add_devices needs an array of
platform_devices, thats the reason I made it like this initially.
struct platform_device *pdev;
+ struct omap_smps_platform_data *smps_pdata;
+ struct regulator_init_data **reg_list;
+ int num_smps = 0;
if (list_empty(voltdm_list)) {
pr_err(%s: Voltage driver support not added\n,
@@ -279,8 +319,36 @@ int __init omap_voltage_late_init(void)
voltdm-scale = omap_vp_forceupdate_scale;
omap_vp_init(voltdm);
}
+
+ if (voltdm-vc voltdm-vp)
+ num_smps++;
}
+ if (num_smps) {
+ smps_dev[0] = kzalloc(sizeof(struct platform_device),
+ GFP_KERNEL);
platform_device_alloc() should be used here, which takes the name and id.
Okay.
+ smps_pdata = kzalloc(sizeof(struct omap_smps_platform_data),
+ GFP_KERNEL);
+ reg_list = kzalloc(sizeof(void *) * num_smps, GFP_KERNEL);
Should this (void *) be (struct regulator_init_data *)?
No, we are allocating an array of pointers here, which gets filled later
by smps_add_regulator().
+ if (!smps_dev[0] || !smps_pdata || !reg_list) {
+ kfree(smps_dev[0]);
And the free for platform_device_alloc() is platform_device_put()
Okay also.
+ kfree(smps_pdata);
+ kfree(reg_list);
+ return -ENOMEM;
+ }
+
+ smps_pdata-regulators = reg_list;
+ smps_dev[0]-name = omap-smps;
+ smps_dev[0]-id = -1;
+ smps_dev[0]-dev.platform_data = smps_pdata;
platform_device_add_data() should be used here.
Okay.
+ list_for_each_entry(voltdm, voltdm_list, node)
+ if (voltdm-vp voltdm-vc)
+ smps_add_regulator(smps_dev[0], voltdm);
+
+ platform_add_devices(smps_dev, 1);
and finally, platform_device_add() here.
Okay, this way I can drop the array part from smps_dev.
+ }
return 0;
}
Kevin
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv5 0/4] omap smps regulator driver
Hello, Changes compared to previous version of this set: - dropped stub header file patch as it is integrated to voltm branch already - PATCH 1: * fixed section mismatch * changed consumer supply naming to match with omap PM code better * refreshed so that it applies cleanly on latest codebase - PATCH 2: * new patch, needed for mapping from voltagedomains to processor devices (e.g. core voltdm - l3_main processor device on OMAP4) - PATCH 3: * now uses sane names for supply devices, see patch 2 - PATCH 4: * fixed opp hacking not to touch hwmod internals -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv5 1/4] regulator: omap smps regulator driver
OMAP SMPS regulator driver provides access to OMAP voltage processor
controlled regulators. These include VDD_MPU and VDD_CORE for OMAP3 and
additionally VDD_IVA for OMAP4. SMPS regulators use the OMAP voltage
layer for the actual voltage regulation operations.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Kevin Hilman khil...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Todd Poynor toddpoy...@google.com
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Liam Girdwood l...@ti.com
Cc: Graeme Gregory g...@slimlogic.co.uk
---
drivers/regulator/Kconfig |8 ++
drivers/regulator/Makefile |1 +
drivers/regulator/omap-smps-regulator.c | 178 +++
include/linux/regulator/omap-smps.h | 20
4 files changed, 207 insertions(+), 0 deletions(-)
create mode 100644 drivers/regulator/omap-smps-regulator.c
create mode 100644 include/linux/regulator/omap-smps.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index c7fd2c0..17c60bc 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -317,5 +317,13 @@ config REGULATOR_AAT2870
If you have a AnalogicTech AAT2870 say Y to enable the
regulator driver.
+config REGULATOR_OMAP_SMPS
+ tristate TI OMAP SMPS Power Regulators
+ depends on (ARCH_OMAP3 || ARCH_OMAP4) PM
+ help
+ This driver supports the OMAP3 / OMAP4 SMPS regulators for VDD1,
+ VDD2 and VDD3. These regulators are accessed using the voltage
+ processor interface of OMAP.
+
endif
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 040d5aa..42d3405 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -45,5 +45,6 @@ obj-$(CONFIG_REGULATOR_AB8500)+= ab8500.o
obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o
obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o
obj-$(CONFIG_REGULATOR_AAT2870) += aat2870-regulator.o
+obj-$(CONFIG_REGULATOR_OMAP_SMPS) += omap-smps-regulator.o
ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/omap-smps-regulator.c
b/drivers/regulator/omap-smps-regulator.c
new file mode 100644
index 000..f07c42d
--- /dev/null
+++ b/drivers/regulator/omap-smps-regulator.c
@@ -0,0 +1,178 @@
+/*
+ * OMAP SMPS regulator driver
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ *
+ * Author: Tero Kristo t-kri...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/kernel.h
+#include linux/ctype.h
+#include linux/module.h
+#include linux/slab.h
+#include linux/init.h
+#include linux/err.h
+#include linux/delay.h
+#include linux/platform_device.h
+#include linux/regulator/driver.h
+#include linux/regulator/machine.h
+#include linux/regulator/omap-smps.h
+#include plat/voltage.h
+
+#define DRIVER_NAMEomap-smps
+
+struct omap_smps_reg_info {
+ const char *vdd_name;
+ struct regulator_dev*rdev;
+ struct voltagedomain*voltdm;
+ struct regulator_desc desc;
+};
+
+static int omap_smps_set_voltage(struct regulator_dev *rdev, int min_uV,
+ int max_uV, unsigned *selector)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return voltdm_scale(info-voltdm, min_uV);
+}
+
+static int omap_smps_get_voltage(struct regulator_dev *rdev)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return voltdm_get_voltage(info-voltdm);
+}
+
+static struct regulator_ops omap_smps_ops = {
+ .set_voltage= omap_smps_set_voltage,
+ .get_voltage= omap_smps_get_voltage,
+};
+
+#define SMPS_REG(name) { \
+ .vdd_name = #name, \
+ .desc = { \
+ .ops = omap_smps_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .owner = THIS_MODULE, \
+ }, \
+ }
+
+static struct omap_smps_reg_info omap_smps_regs[] = {
+ SMPS_REG(mpu),
+ SMPS_REG(mpu_iva),
+ SMPS_REG(iva),
+ SMPS_REG(core),
+};
+
+static void omap_smps_reg_cleanup(void)
+{
+ int i;
+ struct omap_smps_reg_info *info;
+
+ for (i = 0; i ARRAY_SIZE(omap_smps_regs); i++) {
+ info = omap_smps_regs[i];
+ if (info-rdev) {
+ regulator_unregister(info-rdev);
+ info-rdev = NULL;
+ }
+
+ kfree(info-desc.name);
+ info-desc.name = NULL;
+ }
+}
+
+static struct regulator_init_data dummy_initdata __devinitdata;
+
+static int __devinit omap_smps_reg_probe(struct platform_device *pdev)
+{
+ int i, j, ret;
+ struct omap_smps_reg_info
[PATCHv5 4/4] TEMP: OMAP3: beagle rev-c4: enable OPP6
Beagleboard rev-c4 has a speed sorted OMAP3530 chip which can run at 720MHz.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 29 +
arch/arm/mach-omap2/opp3xxx_data.c |4
2 files changed, 33 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 32f5f89..b07af4f 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -489,6 +489,35 @@ static void __init beagle_opp_init(void)
return;
}
+ if (omap3_beagle_version == OMAP3BEAGLE_BOARD_C4) {
+ struct device *mpu_dev, *iva_dev;
+
+ mpu_dev = omap2_get_mpuss_device();
+ iva_dev = omap2_get_iva_device();
+
+ if (!mpu_dev || !iva_dev) {
+ pr_err(%s: Aiee.. no mpu/dsp devices? %p %p\n,
+ __func__, mpu_dev, iva_dev);
+ return;
+ }
+ /* Enable MPU 720MHz opp */
+ r = opp_enable(mpu_dev, 72000);
+
+ /* Enable IVA 520MHz opp */
+ r |= opp_enable(iva_dev, 52000);
+
+ if (r) {
+ pr_err(%s: failed to enable higher opp %d\n,
+ __func__, r);
+ /*
+* Cleanup - disable the higher freqs - we dont care
+* about the results
+*/
+ opp_disable(mpu_dev, 72000);
+ opp_disable(iva_dev, 52000);
+ }
+ }
+
/* Custom OPP enabled for all xM versions */
if (cpu_is_omap3630()) {
struct omap_hwmod *mh = omap_hwmod_lookup(mpu);
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c
b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..a0f5fe1 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -98,6 +98,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[]
= {
OPP_INITIALIZER(mpu, true, 55000, OMAP3430_VDD_MPU_OPP4_UV),
/* MPU OPP5 */
OPP_INITIALIZER(mpu, true, 6, OMAP3430_VDD_MPU_OPP5_UV),
+ /* MPU OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER(mpu, false, 72000, OMAP3430_VDD_MPU_OPP5_UV),
/*
* L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
@@ -123,6 +125,8 @@ static struct omap_opp_def __initdata
omap34xx_opp_def_list[] = {
OPP_INITIALIZER(iva, true, 4, OMAP3430_VDD_MPU_OPP4_UV),
/* DSP OPP5 */
OPP_INITIALIZER(iva, true, 43000, OMAP3430_VDD_MPU_OPP5_UV),
+ /* DSP OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER(iva, false, 52000, OMAP3430_VDD_MPU_OPP5_UV),
};
static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv5 3/4] omap: smps: add smps regulator init to voltage.c
All voltagedomains that have support for vc and vp are now automatically
registered with SMPS regulator driver. Voltage.c builds a platform device
structure for this purpose during late init.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/voltage.c | 81 +
1 files changed, 81 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index cebc8b1..30102a4 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -25,6 +25,9 @@
#include linux/debugfs.h
#include linux/slab.h
#include linux/clk.h
+#include linux/platform_device.h
+#include linux/regulator/machine.h
+#include linux/regulator/omap-smps.h
#include plat/common.h
@@ -238,6 +241,42 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
}
}
+static void smps_add_regulator_info(struct platform_device *smps_dev,
+ struct voltagedomain *voltdm)
+{
+ struct omap_smps_platform_data *info;
+ struct regulator_init_data *init_data;
+ struct regulator_consumer_supply *supply;
+
+ if (!smps_dev || !voltdm)
+ return;
+
+ info = smps_dev-dev.platform_data;
+
+ init_data = kzalloc(sizeof(struct regulator_init_data), GFP_KERNEL);
+ supply = kzalloc(sizeof(struct regulator_consumer_supply), GFP_KERNEL);
+
+ if (!init_data || !supply) {
+ kfree(init_data);
+ kfree(supply);
+ return;
+ }
+ supply-supply = vcc;
+ supply-dev_name = voltdm-proc_dev;
+ init_data-constraints.min_uV =
+ voltdm-pmic-vsel_to_uv(voltdm-pmic-vp_vddmin);
+ init_data-constraints.max_uV =
+ voltdm-pmic-vsel_to_uv(voltdm-pmic-vp_vddmax);
+ init_data-constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
+ init_data-constraints.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE;
+ init_data-num_consumer_supplies = 1;
+ init_data-consumer_supplies = supply;
+ init_data-driver_data = voltdm;
+
+ info-regulators[info-num_regulators++] = init_data;
+}
+
+
/**
* omap_voltage_late_init() - Init the various voltage parameters
*
@@ -248,6 +287,11 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
int __init omap_voltage_late_init(void)
{
struct voltagedomain *voltdm;
+ struct platform_device *smps_dev;
+ struct omap_smps_platform_data *smps_pdata;
+ struct regulator_init_data **reg_list;
+ int num_smps = 0;
+ int ret;
if (list_empty(voltdm_list)) {
pr_err(%s: Voltage driver support not added\n,
@@ -279,8 +323,45 @@ int __init omap_voltage_late_init(void)
voltdm-scale = omap_vp_forceupdate_scale;
omap_vp_init(voltdm);
}
+
+ if (voltdm-vc voltdm-vp)
+ num_smps++;
}
+ if (num_smps) {
+ smps_dev = platform_device_alloc(omap-smps, -1);
+
+ if (!smps_dev)
+ return -ENOMEM;
+
+ smps_pdata = kzalloc(sizeof(struct omap_smps_platform_data),
+ GFP_KERNEL);
+ reg_list = kzalloc(sizeof(void *) * num_smps, GFP_KERNEL);
+
+ if (!smps_pdata || !reg_list) {
+ kfree(smps_pdata);
+ kfree(reg_list);
+ return -ENOMEM;
+ }
+
+ smps_pdata-regulators = reg_list;
+
+ ret = platform_device_add_data(smps_dev, smps_pdata,
+ sizeof(struct omap_smps_platform_data));
+
+ if (ret) {
+ kfree(smps_pdata);
+ kfree(reg_list);
+ platform_device_put(smps_dev);
+ return ret;
+ }
+
+ list_for_each_entry(voltdm, voltdm_list, node)
+ if (voltdm-vp voltdm-vc)
+ smps_add_regulator_info(smps_dev, voltdm);
+
+ platform_device_add(smps_dev);
+ }
return 0;
}
--
1.7.4.1
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Kotipaikka: Helsinki
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[PATCHv5 2/4] omap: voltage: added mapping from voltagedomains to processor devices
This is needed so that SMPS regulators can be properly mapped to corresponding
processor devices.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/voltage.h |2 ++
arch/arm/mach-omap2/voltagedomains3xxx_data.c |2 ++
arch/arm/mach-omap2/voltagedomains44xx_data.c |3 +++
3 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index b4c6259..bcbf0c0 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -53,6 +53,7 @@ struct omap_vfsm_instance {
/**
* struct voltagedomain - omap voltage domain global structure.
* @name: Name of the voltage domain which can be used as a unique identifier.
+ * @proc_dev: Name of the associated processor device / hwmod.
* @scalable: Whether or not this voltage domain is scalable
* @node: list_head linking all voltage domains
* @pwrdm_node: list_head linking all powerdomains in this voltagedomain
@@ -63,6 +64,7 @@ struct omap_vfsm_instance {
*/
struct voltagedomain {
char *name;
+ char *proc_dev;
bool scalable;
struct list_head node;
struct list_head pwrdm_list;
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index b0d0ae1..28f1908 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -45,6 +45,7 @@ static const struct omap_vfsm_instance omap3_vdd2_vfsm = {
static struct voltagedomain omap3_voltdm_mpu = {
.name = mpu_iva,
+ .proc_dev = mpu.0,
.scalable = true,
.read = omap3_prm_vcvp_read,
.write = omap3_prm_vcvp_write,
@@ -56,6 +57,7 @@ static struct voltagedomain omap3_voltdm_mpu = {
static struct voltagedomain omap3_voltdm_core = {
.name = core,
+ .proc_dev = l3_main.0,
.scalable = true,
.read = omap3_prm_vcvp_read,
.write = omap3_prm_vcvp_write,
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c
b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index c4584e9..10c1d66 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -46,6 +46,7 @@ static const struct omap_vfsm_instance omap4_vdd_core_vfsm = {
static struct voltagedomain omap4_voltdm_mpu = {
.name = mpu,
+ .proc_dev = mpu.0,
.scalable = true,
.read = omap4_prm_vcvp_read,
.write = omap4_prm_vcvp_write,
@@ -57,6 +58,7 @@ static struct voltagedomain omap4_voltdm_mpu = {
static struct voltagedomain omap4_voltdm_iva = {
.name = iva,
+ .proc_dev = iva.0,
.scalable = true,
.read = omap4_prm_vcvp_read,
.write = omap4_prm_vcvp_write,
@@ -68,6 +70,7 @@ static struct voltagedomain omap4_voltdm_iva = {
static struct voltagedomain omap4_voltdm_core = {
.name = core,
+ .proc_dev = l3_main_1.0,
.scalable = true,
.read = omap4_prm_vcvp_read,
.write = omap4_prm_vcvp_write,
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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Re: [PATCHv6 01/11] omap: prcm: switch to a chained IRQ handler mechanism
Hey Paul, I've been looking at this now and got one question below. Otherwise your comments look okay to me and I can work with those. On Fri, 2011-08-26 at 11:12 +0200, Paul Walmsley wrote: Hello Tero, a few comments on this patch: On Mon, 25 Jul 2011, Tero Kristo wrote: Introduce a chained interrupt handler mechanism for the PRCM interrupt, so that individual PRCM event can cleanly be handled by handlers in separate drivers. We do this by introducing PRCM event names, which are then matched to the particular PRCM interrupt bit depending on the specific OMAP SoC being used. arch/arm/mach-omap2/prcm.c implements the chained interrupt mechanism itself, with SoC specific support / init structure defined in arch/arm/mach-omap2/prm2xxx_3xxx.c and arch/arm/mach-omap2/prm4xxx.c respectively. At initialization time, the set of PRCM events is filtered against the SoC on which we are running, keeping only the ones that are actually useful. All the logic is written to be generic with regard to OMAP3/OMAP4, even though OMAP3 has single PRCM event registers and OMAP4 has two PRCM event registers. Looking over this patch, it seems that this functionality should be part of a PRM device driver. That would allow the separation of the SoC-specific data from the code, so there wouldn't be a need to embed the OMAP_PRCM_IRQ data in the driver code. Rather, that data could go into the dev_attr data for the PRM hwmod. That avoids putting SoC-specific data in driver code, allows the removal of omap[34]_prcm_irq_setup(), and should also remove the dependency on omap_chip. Similarly, OMAP_PRCM_MAX_NR_PENDING_REG and OMAP_PRCM_NR_IRQS should be defined somewhere SoC-specific. I'd suggest defining those in the hwmod dev_attr data. That way that file won't need to be patched if those constants need change in the future. Unfortunately, doing this in a clean way will probably mean that the variables that are allocated via these constants will need to be allocated and freed dynamically. What I'd suggest is to create a short series that: 1. adds PRM hwmod data for OMAP2430+ platforms How should this be done? It believe all the data in the hwmods should be autogenerated somehow... should I just make a temporary hack patch for one platform that could be then autogenerated by someone for all omap platforms? 2. adds a basic PRM device driver skeleton in a directory such as drivers/power -- (I'm not convinced that this is the right place, in the end; but seems like a good place to start) 3. creates the chained interrupt handler in the PRM device driver, and removes the old PRCM interrupt handler from pm34xx.c ... A few other relatively minor comments: - Probably omap_prcm_irq_cleanup() shouldn't be called from pm34xx.c, since other code outside of pm34xx.c might wish to use the PRCM interrupt, even in the (admittedly unlikely) circumstance that some of the code in pm34xx.c fails? - It would be good to document struct omap_prcm_irq via KernelDoc, rather than inline comments (Documentation/kernel-doc-nano-HOWTO.txt). It would be ideal if the patch's function documentation followed the same standard. - Paul Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 01/11] omap: prcm: switch to a chained IRQ handler mechanism
Hi Paul, On Fri, 2011-09-02 at 11:20 +0200, Paul Walmsley wrote: Hi Tero, On Thu, 1 Sep 2011, Tero Kristo wrote: I've been looking at this now and got one question below. Otherwise your comments look okay to me and I can work with those. Great. As you work on it, please let me know if there's something that doesn't make sense with this arrangement. I think this will work, and will move some code out of arch/arm/*omap*, but it's hard to tell, until someone tries it. On Fri, 2011-08-26 at 11:12 +0200, Paul Walmsley wrote: What I'd suggest is to create a short series that: 1. adds PRM hwmod data for OMAP2430+ platforms How should this be done? It believe all the data in the hwmods should be autogenerated somehow... should I just make a temporary hack patch for one platform that could be then autogenerated by someone for all omap platforms? Only OMAP4 is autogenerated, currently. OMAP2 3 are still done by hand. I'd suggest starting with either OMAP4 (because the hwmod data should be autogeneratable) or OMAP3 (because we know that one pretty well and the hwmod data should not be too difficult to build). If it would help, I'd be happy to do a first draft of the OMAP3430 PRM hwmod data. If you can do this it would help, as you have much better understanding of the hwmod data than I do. It will probably drop a couple of review rounds away as the hwmod data would be close to what it should be from beginning. If you are busy with other things, I can see what I can craft myself. regards, - Paul Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv7 07/12] ARM: OMAP4: PM: put all domains to OSWR during suspend
On Wed, 2012-09-12 at 16:11 -0700, Kevin Hilman wrote: Paul Walmsley p...@pwsan.com writes: [...] It kind of looks to me like there are two or three separate sets within the series. My feeling is that Kevin should take the first two, then I should take the rest other than 6 and 7. Then once those are queued, we can pull in 6 and 7. Does that make sense to you? Looks like 1, 2 7 are needed for OSWR, and the rest can go now via Paul. Tero, can create a new OSWR series including 1, 2 7? Can you also refresh it against Jean's latest functional power state series (v6)? Yes, I already have these patches locally available. I'll just refresh them against Paul's minor tweaks on rest of the patches and re-post. -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv8 0/5] ARM: OMAP4: core retention support
Hi, Changes compared to previous version: - Dropped following patches from the set as these were queued by Paul: 0003-ARM-OMAP4-hwmod-flag-hwmods-modules-not-supporting-m.patch 0004-ARM-OMAP-hwmod-Add-support-for-per-hwmod-module-cont.patch 0005-ARM-OMAP4-pwrdm-add-support-for-reading-prev-logic-a.patch 0009-ARM-OMAP4-hwmod-data-temporarily-comment-out-data-fo.patch 0010-ARM-OMAP4-HWMOD-add-support-for-lostcontext_mask.patch - Dropped following patches for now as their need is not that clear at the moment: 0011-ARM-OMAP4-hwmod_data-add-context-lose-information-fo.patch 0012-ARM-OMAP4-hwmod-update-context-lost-counter-logic-fo.patch - Rebased on top of func-pwrst-v6 from Jean and 3.6-rc5. - Added patch #5 for yet another bug fix: the fix for the omap4460 (patch #2) is incomplete, and can cause rare TWD timer bugs. This patch fixes those. - Tested with omap4460 GP panda + omap4430 EMU blaze, with suspend + cpuidle. Branch also available here (it also has the func pwrst code + the queued hwmod patches as the code doesn't apply cleanly / work without these.) Tree: git://gitorious.org/~kristo/omap-pm/omap-pm-work.git Branch: mainline-3.6-rc5-omap4-ret-v8 -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv8 3/5] ARM: OMAP4: suspend: Program all domains to retention
From: Rajendra Nayak rna...@ti.com Remove the FIXME's in the suspend sequence since we now intend to support system level RET support. Signed-off-by: Rajendra Nayak rna...@ti.com Signed-off-by: Tero Kristo t-kri...@ti.com Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com --- arch/arm/mach-omap2/pm44xx.c |7 --- 1 files changed, 0 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index e03a3cc..c8965a2 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c @@ -96,13 +96,6 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) if (!strncmp(pwrdm-name, cpu, 3)) return 0; - /* -* FIXME: Remove this check when core retention is supported -* Only MPUSS power domain is added in the list. -*/ - if (strcmp(pwrdm-name, mpu_pwrdm)) - return 0; - pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC); if (!pwrst) return -ENOMEM; -- 1.7.4.1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv8 4/5] ARM: OMAP4: PM: put all domains to OSWR during suspend
Currently OMAP4 suspend puts all power domains to CSWR. OSWR is a deeper state that saves more power, but has higher latencies also. As suspend is considered a high-latency operation, OSWR is appropriate here. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/mach-omap2/pm44xx.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index c8965a2..2bd557f 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c @@ -101,7 +101,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) return -ENOMEM; pwrst-pwrdm = pwrdm; - pwrst-next_state = PWRDM_FUNC_PWRST_CSWR; + pwrst-next_state = PWRDM_FUNC_PWRST_OSWR; list_add(pwrst-node, pwrst_list); return pwrdm_set_fpwrst(pwrst-pwrdm, pwrst-next_state); -- 1.7.4.1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv8 1/5] ARM: OMAP4: PM: add errata support
Added similar PM errata flag support as omap3 has. This should be used
in similar manner, set the flags during init time, and check the flag
values during runtime.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm.h |7 +++
arch/arm/mach-omap2/pm44xx.c |1 +
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 707e9cb..f26f2d7 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -100,6 +100,13 @@ extern void enable_omap3630_toggle_l2_on_restore(void);
static inline void enable_omap3630_toggle_l2_on_restore(void) { }
#endif /* defined(CONFIG_PM) defined(CONFIG_ARCH_OMAP3) */
+#if defined(CONFIG_ARCH_OMAP4)
+extern u16 pm44xx_errata;
+#define IS_PM44XX_ERRATUM(id) (pm44xx_errata (id))
+#else
+#define IS_PM44XX_ERRATUM(id) 0
+#endif
+
#ifdef CONFIG_POWER_AVS_OMAP
extern int omap_devinit_smartreflex(void);
extern void omap_enable_smartreflex_on_init(void);
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 6a38ef5..e03a3cc 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -33,6 +33,7 @@ struct power_state {
};
static LIST_HEAD(pwrst_list);
+u16 pm44xx_errata;
#ifdef CONFIG_SUSPEND
static int omap4_pm_suspend(void)
--
1.7.4.1
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[PATCHv8 2/5] ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX GIC control register change.
From: Santosh Shilimkar santosh.shilim...@ti.com
On OMAP4+ devices, GIC register context is lost when MPUSS hits
the OSWR(Open Switch Retention). On the CPU wakeup path, ROM code
gets executed and one of the steps in it is to restore the
saved context of the GIC. The ROM Code GIC distributor restoration
is split in two parts: CPU specific register done by each CPU and
common register done by only one CPU.
Below is the abstract flow.
...
- MPUSS in OSWR state.
- CPU0 wakes up on the event(interrupt) and start executing ROM code.
[..]
- CPU0 executes GIC Restoration:
[...]
- CPU0 swicthes to non-secure mode and jumps to OS resume code.
[...]
- CPU0 is online in OS
- CPU0 enables the GIC distributor. GICD.Enable Non-secure = 1
- CPU0 wakes up CPU1 with clock-domain force wakeup method.
- CPU0 continues it's execution.
[..]
- CPU1 wakes up and start executing ROM code.
[..]
- CPU1 executes GIC Restoration:
[..]
- CPU1 swicthes to non-secure mode and jumps to OS resume code.
[...]
- CPU1 is online in OS and start executing.
[...] -
GIC Restoration: /* Common routine for HS and GP devices */
{
if (GICD != 1) { /* This will be true in OSWR state */
if (GIC_SAR_BACKUP_STATE == SAVED)
- CPU restores GIC distributor
else
- reconfigure GIC distributor to boot values.
GICD.Enable secure = 1
}
if (GIC_SAR_BACKUP_STATE == SAVED)
- CPU restore its GIC CPU interface registers if saved.
else
- reconfigure its GIC CPU interface registers to boot
values.
}
...
So as mentioned in the flow, GICD != 1 condition decides how
the GIC registers are handled in ROM code wakeup path from
OSWR. As evident from the flow, ROM code relies on the entire
GICD register value and not specific register bits.
The assumption was valid till CortexA9 r1pX version since there
was only one banked bit to control secure and non-secure GICD.
Secure view which ROM code sees:
bit 0 == Enable Non-secure
Non-secure view which HLOS sees:
bit 0 == Enable secure
But GICD register has changed between CortexA9 r1pX and r2pX.
On r2pX GICD register is composed of 2 bits.
Secure view which ROM code sees:
bit 1 == Enable Non-secure
bit 0 == Enable secure
Non-secure view which HLOS sees:
bit 0 == Enable Non-secure
Hence on OMAP4460(r2pX) devices, if you go through the
above flow again during CPU1 wakeup, GICD == 3 and hence
ROM code fails to understand the real wakeup power state
and reconfigures GIC distributor to boot values. This is
nasty since you loose the entire interrupt controller
context in a live system.
The ROM code fix done on next OMAP4 device (OMAP4470 - r2px) is to
check GICD.Enable secure != 1 for GIC restoration in OSWR wakeup path.
Since ROM code can't be fixed on OMAP4460 devices, a work around
needs to be implemented. As evident from the flow, as long as
CPU1 sees GICD == 1 in it's wakeup path from OSWR, the issue
won't happen. Below is the flow with the work-around.
...
- MPUSS in OSWR state.
- CPU0 wakes up on the event(interrupt) and start executing ROM code.
[..]
- CPU0 executes GIC Restoration:
[..]
- CPU0 swicthes to non-secure mode and jumps to OS resume code.
[..]
- CPU0 is online in OS.
- CPU0 does GICD.Enable Non-secure = 0
- CPU0 wakes up CPU1 with clock domain force wakeup method.
- CPU0 waits for GICD.Enable Non-secure = 1
- CPU0 coninues it's execution.
[..]
- CPU1 wakes up and start executing ROM code.
[..]
- CPU1 executes GIC Restoration:
[..]
- CPU1 swicthes to non-secure mode and jumps to OS resume code.
[..]
- CPU1 is online in OS
- CPU1 does GICD.Enable Non-secure = 1
- CPU1 start executing
[...]
...
With this procedure, the GIC configuration done between the
CPU0 wakeup and CPU1 wakeup will not be lost but during this
short windows, the CPU0 will not receive interrupts.
The BUG is applicable to only OMAP4460(r2pX) devices.
OMAP4470 (also r2pX) is not affected by this bug because
ROM code has been fixed.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/common.h |2 +
arch/arm/mach-omap2/omap-headsmp.S| 38 +
arch/arm/mach-omap2/omap-mpuss-lowpower.c |9 ++-
arch/arm/mach-omap2/omap-smp.c| 28 -
arch/arm/mach-omap2/omap4-common.c|8 +-
arch/arm/mach-omap2/pm.h |2 +
6 files changed, 84 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 1f65b18..edbf27d 100644
--- a/arch/arm/mach
[PATCHv8 5/5] ARM: OMAP4: retrigger localtimers after re-enabling gic
From: Colin Cross ccr...@android.com
'Workaround for ROM bug because of CA9 r2pX gic control'
register change disables the gic distributor while the secondary
cpu is being booted. If a localtimer interrupt on the primary cpu
occurs when the distributor is turned off, the interrupt is lost,
and the localtimer never fires again.
Make the primary cpu wait for the secondary cpu to reenable the
gic distributor (with interrupts off for safety), and then
check if the pending bit is set in the localtimer but not the
gic. If so, ack it in the localtimer, and reset the timer with
the minimum timeout to trigger a new timer interrupt.
Signed-off-by: Colin Cross ccr...@android.com
[s-...@ti.com: adapted to k3.4 + validated functionality]
Signed-off-by: Sebastien Jan s-...@ti.com
[t-kri...@ti.com: dropped generic ARM kernel exports from the code, rebased
to mainline]
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/common.h |2 ++
arch/arm/mach-omap2/omap-smp.c | 13 -
arch/arm/mach-omap2/omap4-common.c | 32
3 files changed, 46 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index edbf27d..6ea837a 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -269,6 +269,8 @@ static inline void __iomem *omap4_get_scu_base(void)
extern void __init gic_init_irq(void);
extern void gic_dist_disable(void);
+extern bool gic_dist_disabled(void);
+extern void gic_timer_retrigger(void);
extern void omap_smc1(u32 fn, u32 arg);
extern void __iomem *omap4_get_sar_ram_base(void);
extern void omap_do_wfi(void);
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 28d6201..b9738e2 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -134,11 +134,22 @@ int __cpuinit boot_secondary(unsigned int cpu, struct
task_struct *idle)
* 2) CPU1 must re-enable the GIC distributor on
* it's wakeup path.
*/
- if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD))
+ if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD)) {
+ local_irq_disable();
gic_dist_disable();
+ }
clkdm_wakeup(cpu1_clkdm);
clkdm_allow_idle(cpu1_clkdm);
+
+ if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD)) {
+ while (gic_dist_disabled()) {
+ udelay(1);
+ cpu_relax();
+ }
+ gic_timer_retrigger();
+ local_irq_enable();
+ }
} else {
dsb_sev();
booted = true;
diff --git a/arch/arm/mach-omap2/omap4-common.c
b/arch/arm/mach-omap2/omap4-common.c
index 91d42bb..852c010 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -14,6 +14,7 @@
#include linux/kernel.h
#include linux/init.h
#include linux/io.h
+#include linux/irq.h
#include linux/platform_device.h
#include linux/memblock.h
@@ -21,6 +22,7 @@
#include asm/hardware/cache-l2x0.h
#include asm/mach/map.h
#include asm/memblock.h
+#include asm/smp_twd.h
#include linux/of_irq.h
#include linux/of_platform.h
@@ -43,6 +45,7 @@ static void __iomem *l2cache_base;
static void __iomem *sar_ram_base;
static void __iomem *gic_dist_base_addr;
+static void __iomem *twd_base;
#ifdef CONFIG_OMAP4_ERRATA_I688
/* Used to implement memory barrier on DRAM path */
@@ -102,6 +105,9 @@ void __init gic_init_irq(void)
gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
BUG_ON(!gic_dist_base_addr);
+ twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_4K);
+ BUG_ON(!twd_base);
+
/* Static mapping, never released */
omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
BUG_ON(!omap_irq_base);
@@ -117,6 +123,32 @@ void gic_dist_disable(void)
__raw_writel(0x0, gic_dist_base_addr + GIC_DIST_CTRL);
}
+bool gic_dist_disabled(void)
+{
+ return !(__raw_readl(gic_dist_base_addr + GIC_DIST_CTRL) 0x1);
+}
+
+void gic_timer_retrigger(void)
+{
+ u32 twd_int = __raw_readl(twd_base + TWD_TIMER_INTSTAT);
+ u32 gic_int = __raw_readl(gic_dist_base_addr + GIC_DIST_PENDING_SET);
+ u32 twd_ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
+
+ if (twd_int !(gic_int BIT(OMAP44XX_IRQ_LOCALTIMER))) {
+ /*
+* The local timer interrupt got lost while the distributor was
+* disabled. Ack the pending interrupt, and retrigger it.
+*/
+ pr_warn(%s: lost localtimer interrupt\n, __func__);
+ __raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
+ if (!(twd_ctrl TWD_TIMER_CONTROL_PERIODIC
Re: [PATCHv4 8/8] ARM: OMAP3: do not delete per_clkdm autodeps during idle
On Tue, 2012-09-18 at 22:25 +, Paul Walmsley wrote: Hi Tero, just looking at the usecounting series to see what is mergeable and noticed this: On Fri, 13 Jul 2012, Tero Kristo wrote: Secondly, there are multiple erratas for omap3, which say that the wakedeps should be enabled for the PER domain, see e.g. errata i582 for omap3630. Erratum i582 mentions that a wakeup dependency needs to exist between PER and WKUP such that PER will wake when CORE_L3 does. Our autodeps would not add this dependency; they just would attempt to add a wakeup dependency between PER and MPU/IVA2. So we need a different mechanism. What do you think about the following patch to handle part of the i582 workaround? Yes, that looks good to me, someone will need to test it though. Also, do you have any of the other errata information handy, so we can track those down also? I'm pretty sure we need to enable the wakeup dependency between PER and CORE also for OMAP3, but can't recall the reference. GPIO errata i467 has a workaround which involves wakedeps. i582 is valid for omap3430 also. I am not able to find anything else regarding wakedeps right now, at least nothing regarding per vs core. -Tero - Paul From: Paul Walmsley p...@pwsan.com Date: Tue, 18 Sep 2012 16:02:38 -0600 Subject: [PATCH] ARM: OMAP36xx: PM: apply part of the erratum i582 workaround On OMAP36xx chips with ES 1.2, if the PER powerdomain goes to OSWR or OFF while CORE stays at CSWR or ON, or if, upon chip wakeup from OSWR or OFF, the CORE powerdomain goes ON before PER, the UART3/4 FIFOs and McBSP2/3 SIDETONE memories will be unusable. This is erratum i582 in the OMAP36xx Silicon Errata document. This patch implements one of several parts of the workaround: the addition of the wakeup dependency between the PER and WKUP clockdomains, such that PER will wake up at the same time CORE_L3 does. This is not a complete workaround. For it to be complete: 1. the PER powerdomain's next power state must not be set to OSWR or OFF if the CORE powerdomain's next power state is set to CSWR or ON; 2. the UART3/4 FIFO and McBSP2/3 SIDETONE loopback tests should be run if the LASTPOWERSTATEENTERED bits for PER and CORE indicate that PER went OFF while CORE stayed on. If loopback tests fail, then those devices will be unusable until PER and CORE can undergo a transition from ON to OSWR/OFF and back ON. Signed-off-by: Paul Walmsley p...@pwsan.com Cc: Tero Kristo t-kri...@ti.com Cc: Kevin Hilman khil...@ti.com --- arch/arm/mach-omap2/pm.h |1 + arch/arm/mach-omap2/pm34xx.c | 24 +++- 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 686137d..67d6613 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -91,6 +91,7 @@ extern void omap3_save_scratchpad_contents(void); #define PM_RTA_ERRATUM_i608 (1 0) #define PM_SDRC_WAKEUP_ERRATUM_i583 (1 1) +#define PM_PER_MEMORIES_ERRATUM_i582 (1 2) #if defined(CONFIG_PM) defined(CONFIG_ARCH_OMAP3) extern u16 pm34xx_errata; diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 05bd8f0..5e99345 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -651,7 +651,8 @@ static void __init pm_errata_configure(void) /* Enable the l2 cache toggling in sleep logic */ enable_omap3630_toggle_l2_on_restore(); if (omap_rev() OMAP3630_REV_ES1_2) - pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583; + pm34xx_errata |= (PM_SDRC_WAKEUP_ERRATUM_i583 | + PM_PER_ERRATUM_i582); } } @@ -726,6 +727,27 @@ int __init omap3_pm_init(void) if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608)) omap3630_ctrl_disable_rta(); + /* + * The UART3/4 FIFO and the sidetone memory in McBSP2/3 are + * not correctly reset when the PER powerdomain comes back + * from OFF or OSWR when the CORE powerdomain is kept active. + * See OMAP36xx Erratum i582 PER Domain reset issue after + * Domain-OFF/OSWR Wakeup. This wakeup dependency is not a + * complete workaround. The kernel must also prevent the PER + * powerdomain from going to OSWR/OFF while the CORE + * powerdomain is not going to OSWR/OFF. And if PER last + * power state was off while CORE last power state was ON, the + * UART3/4 and McBSP2/3 SIDETONE devices need to run a + * self-test using their loopback tests; if that fails, those + * devices are unusable until the PER/CORE can complete a transition + * from ON to OSWR/OFF and then back to ON. + * + * XXX Technically this workaround is only needed if off-mode + * or OSWR is enabled
[PATCHv5 00/10] ARM: OMAP: PM usecounting changes
Hi, Changes compared to previous version: - Fixed OMAP4 support (patches 7-10) - Dropped debugging support from this set for now - Rebased on top of 3.6-rc5 + func-pwrst + omap4-ret code (omap4 support easier to test with these) - Patch #1: * dropped clkdm_usecount_inc / clkdm_usecount_dec APIs * clkdm_clk_enable / disable are used now instead * some code ordering changed for the new setup to work properly * changed BUG_ON calls to WARN_ON - Patch #2: * added spinlock for protecting voltdm callbacks * pwrdm lock extended to protect pwrdm callbacks - Patch #3: * dropped generic API call for the cpu pwrdm idle / wakeup * instead use pwrdm_clkdm_enable / disable calls directly from PM code * omap4 support fixed to work properly with SMP, added omap4 specific CPU pwrdm idle / wakeup calls for this purpose - Patch #4: * no changes * added 'Reviewed-by' tag for Rajendra - Patch #5: * no changes, just rebase - Patch #6: * no changes Tested with OMAP3 beagle, omap4460 GP panda + omap4430 EMU blaze boards. I will be posting new versions for the voltdm fixes + auto retention + panda board tps6236x support code later on today, which are based on top of this set. Branch also available here: git://gitorious.org/~kristo/omap-pm/omap-pm-work.git branch: mainline-3.6-rc5-pwrdm-changes-v5 -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv5 01/10] ARM: OMAP3+: voltage/pwrdm/clkdm/clock add recursive usecount tracking
This patch fixes the usecount tracking for omap3+, previously the
usecount numbers were rather bogus and were not really useful for
any purpose. Now usecount numbers track the number of really active
clients on each domain. This patch also adds support for usecount
tracking on powerdomain level and autoidle flag for clocks that
are hardware controlled and should be skipped in usecount
calculations.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/clkt_iclk.c | 21 ++
arch/arm/mach-omap2/clockdomain.c | 15 -
arch/arm/mach-omap2/dpll3xxx.c | 19
arch/arm/mach-omap2/powerdomain.c | 35 +++
arch/arm/mach-omap2/powerdomain.h |4 +++
arch/arm/plat-omap/clock.c |6 +
arch/arm/plat-omap/include/plat/clock.h |2 +
7 files changed, 101 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c
index 3d43fba..1afc599 100644
--- a/arch/arm/mach-omap2/clkt_iclk.c
+++ b/arch/arm/mach-omap2/clkt_iclk.c
@@ -21,6 +21,7 @@
#include clock2xxx.h
#include cm2xxx_3xxx.h
#include cm-regbits-24xx.h
+#include clockdomain.h
/* Private functions */
@@ -34,6 +35,16 @@ void omap2_clkt_iclk_allow_idle(struct clk *clk)
v = __raw_readl((__force void __iomem *)r);
v |= (1 clk-enable_bit);
__raw_writel(v, (__force void __iomem *)r);
+
+ /* Remove this clock from parent clockdomain usecounts */
+ if (clk-usecount clk-clkdm)
+ clkdm_clk_disable(clk-clkdm, clk);
+
+ /*
+* Mark as autoidle, so we continue to ignore this clock in
+* parent clkdm usecount calculations
+*/
+ clk-autoidle = true;
}
/* XXX */
@@ -46,6 +57,16 @@ void omap2_clkt_iclk_deny_idle(struct clk *clk)
v = __raw_readl((__force void __iomem *)r);
v = ~(1 clk-enable_bit);
__raw_writel(v, (__force void __iomem *)r);
+
+ /*
+* Disable autoidle flag so further clkdm usecounts take this
+* clock into account
+*/
+ clk-autoidle = false;
+
+ /* Add clock back to parent clockdomain usecount */
+ if (clk-usecount clk-clkdm)
+ clkdm_clk_enable(clk-clkdm, clk);
}
/* Public data */
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index 8664f5a..8c8518c 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -910,6 +910,7 @@ bool clkdm_in_hwsup(struct clockdomain *clkdm)
static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
{
unsigned long flags;
+ int usecount;
if (!clkdm || !arch_clkdm || !arch_clkdm-clkdm_clk_enable)
return -EINVAL;
@@ -919,11 +920,14 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain
*clkdm)
* should be called for every clock instance or hwmod that is
* enabled, so the clkdm can be force woken up.
*/
- if ((atomic_inc_return(clkdm-usecount) 1) autodeps)
+ usecount = atomic_inc_return(clkdm-usecount);
+ if (usecount 1 autodeps)
return 0;
spin_lock_irqsave(clkdm-lock, flags);
arch_clkdm-clkdm_clk_enable(clkdm);
+ if (usecount == 1)
+ pwrdm_clkdm_enable(clkdm-pwrdm.ptr);
pwrdm_state_switch(clkdm-pwrdm.ptr);
spin_unlock_irqrestore(clkdm-lock, flags);
@@ -949,6 +953,7 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain
*clkdm)
spin_lock_irqsave(clkdm-lock, flags);
arch_clkdm-clkdm_clk_disable(clkdm);
+ pwrdm_clkdm_disable(clkdm-pwrdm.ptr);
pwrdm_state_switch(clkdm-pwrdm.ptr);
spin_unlock_irqrestore(clkdm-lock, flags);
@@ -981,6 +986,10 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk
*clk)
if (!clk)
return -EINVAL;
+ /* If autoidle clock, do not update clkdm usecounts */
+ if (clk-autoidle)
+ return 0;
+
return _clkdm_clk_hwmod_enable(clkdm);
}
@@ -1007,6 +1016,10 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct
clk *clk)
if (!clk)
return -EINVAL;
+ /* If autoidle clock, do not update clkdm usecounts */
+ if (clk-autoidle)
+ return 0;
+
return _clkdm_clk_hwmod_disable(clkdm);
}
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index b9c8d2f..da660d2 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -34,6 +34,7 @@
#include clock.h
#include cm2xxx_3xxx.h
#include cm-regbits-34xx.h
+#include clockdomain.h
/* CM_AUTOIDLE_PLL*.AUTO_* bit values */
#define DPLL_AUTOIDLE_DISABLE 0x0
@@ -571,6 +572,15 @@ void omap3_dpll_allow_idle(struct clk *clk)
v |= DPLL_AUTOIDLE_LOW_POWER_STOP
[PATCHv5 02/10] ARM: OMAP3+: voltage: add support for voltagedomain usecounts
These are updated based on powerdomain usecounts. Also added support
for voltdm-sleep and voltdm-wakeup calls that will be invoked once
voltagedomain enters sleep or wakes up based on usecount numbers. These
will be used for controlling voltage scaling functionality.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/powerdomain.c | 17 +-
arch/arm/mach-omap2/voltage.c | 62 +
arch/arm/mach-omap2/voltage.h | 13
3 files changed, 91 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index ba49029..ca54aec 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -1475,10 +1477,16 @@ int pwrdm_state_switch(struct powerdomain *pwrdm)
*/
void pwrdm_clkdm_enable(struct powerdomain *pwrdm)
{
+ unsigned long flags;
+
if (!pwrdm)
return;
- atomic_inc(pwrdm-usecount);
+ if (atomic_inc_return(pwrdm-usecount) == 1) {
+ spin_lock_irqsave(pwrdm-lock, flags);
+ voltdm_pwrdm_enable(pwrdm-voltdm.ptr);
+ spin_unlock_irqrestore(pwrdm-lock, flags);
+ }
}
/**
@@ -1492,12 +1500,19 @@ void pwrdm_clkdm_enable(struct powerdomain *pwrdm)
void pwrdm_clkdm_disable(struct powerdomain *pwrdm)
{
int val;
+ unsigned long flags;
if (!pwrdm)
return;
val = atomic_dec_return(pwrdm-usecount);
+ if (!val) {
+ spin_lock_irqsave(pwrdm-lock, flags);
+ voltdm_pwrdm_disable(pwrdm-voltdm.ptr);
+ spin_unlock_irqrestore(pwrdm-lock, flags);
+ }
+
WARN_ON(val 0);
}
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 4dc60e8..9eb1a4b 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -340,6 +340,67 @@ int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct
powerdomain *pwrdm)
}
/**
+ * voltdm_pwrdm_enable - increase usecount for a voltagedomain
+ * @voltdm: struct voltagedomain * to increase count for
+ *
+ * Increases usecount for a given voltagedomain. If the usecount reaches
+ * 1, the domain is awakened from idle and the function will call the
+ * voltagedomain-wakeup callback for this domain.
+ */
+void voltdm_pwrdm_enable(struct voltagedomain *voltdm)
+{
+ unsigned long flags;
+
+ if (!voltdm)
+ return;
+
+ if (atomic_inc_return(voltdm-usecount) == 1 voltdm-wakeup) {
+ spin_lock_irqsave(voltdm-lock, flags);
+ voltdm-wakeup(voltdm);
+ spin_unlock_irqrestore(voltdm-lock, flags);
+ }
+}
+
+/**
+ * voltdm_pwrdm_disable - decrease usecount for a voltagedomain
+ * @voltdm: struct voltagedomain * to decrease count for
+ *
+ * Decreases the usecount for a given voltagedomain. If the usecount
+ * reaches zero, the domain can idle and the function will call the
+ * voltagedomain-sleep callback, and calculate the overall target
+ * state for the voltagedomain.
+ */
+void voltdm_pwrdm_disable(struct voltagedomain *voltdm)
+{
+ u8 target_state = PWRDM_POWER_OFF;
+ int state;
+ struct powerdomain *pwrdm;
+ int val;
+ unsigned long flags;
+
+ if (!voltdm)
+ return;
+
+ val = atomic_dec_return(voltdm-usecount);
+
+ WARN_ON(val 0);
+
+ if (val == 0) {
+ spin_lock_irqsave(voltdm-lock, flags);
+ /* Determine target state for voltdm */
+ list_for_each_entry(pwrdm, voltdm-pwrdm_list, voltdm_node) {
+ state = pwrdm_read_next_pwrst(pwrdm);
+ if (state target_state)
+ target_state = state;
+ }
+ voltdm-target_state = target_state;
+ if (voltdm-sleep)
+ voltdm-sleep(voltdm);
+ spin_unlock_irqrestore(voltdm-lock, flags);
+ }
+}
+
+/**
* voltdm_for_each_pwrdm - call function for each pwrdm in a voltdm
* @voltdm: struct voltagedomain * to iterate over
* @fn: callback function *
@@ -402,6 +463,7 @@ static int _voltdm_register(struct voltagedomain *voltdm)
INIT_LIST_HEAD(voltdm-pwrdm_list);
list_add(voltdm-node, voltdm_list);
+ spin_lock_init(voltdm-lock);
pr_debug(voltagedomain: registered %s\n, voltdm-name);
return 0;
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 0ac2caf..7f4f99d 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -15,6 +15,7 @@
#define __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
#include linux/err.h
+#include linux/spinlock.h
#include plat/voltage.h
@@ -56,10 +57,14 @@ struct omap_vfsm_instance {
* @pwrdm_list: list_head linking all powerdomains in this voltagedomain
* @vc
[PATCHv5 03/10] ARM: OMAP3: add manual control for mpu / core pwrdm usecounting
mpu / core powerdomain usecounts are now statically increased
by 1 during MPU activity. This allows the domains to reflect
actual usage, and will allow the usecount to reach 0 just before
all CPUs are ready to idle. Proper powerdomain usecounts are
propageted to voltagedomain level also, and will allow vc
callbacks to be triggered at right point of time.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/common.h |6 ++
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 72 -
arch/arm/mach-omap2/omap-smp.c|2 +
arch/arm/mach-omap2/pm34xx.c | 21
4 files changed, 100 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 6ea837a..a445a02 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -292,6 +292,8 @@ extern int omap4_finish_suspend(unsigned long cpu_state);
extern void omap4_cpu_resume(void);
extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
extern u32 omap4_mpuss_read_prev_context_state(void);
+extern void omap4_pm_cpu_online(void);
+extern void omap4_pm_cpu_offline(void);
#else
static inline int omap4_enter_lowpower(unsigned int cpu,
unsigned int power_state)
@@ -323,6 +325,10 @@ static inline u32 omap4_mpuss_read_prev_context_state(void)
{
return 0;
}
+
+static inline void omap4_pm_cpu_online(void) { }
+
+static inline void omap4_pm_cpu_offline(void) { }
#endif
struct omap_sdrc_params;
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 230bdcd..0ad2337 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -72,8 +72,9 @@ struct omap4_cpu_pm_info {
};
static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
-static struct powerdomain *mpuss_pd;
+static struct powerdomain *mpuss_pd, *core_pd;
static void __iomem *sar_base;
+static atomic_t __initdata init_cpu_online_count;
/*
* Program the wakeup routine address for the CPU0 and CPU1
@@ -216,6 +217,50 @@ static void save_l2x0_context(void)
#endif
/**
+ * omap4_pm_cpu_online - increase the number of online CPUs
+ *
+ * This function increases the usecounts for MPU and CORE powerdomains,
+ * which allows the domains to properly reflect usage with online CPUs
+ * also. CORE powerdomain usecount is increased, as MPU is using memories,
+ * which are powered through CORE powerdomain (SDRAM). If this function is
+ * called before PM init has completed (mpuss_pd / core_pd are not defined),
+ * a temporary init time variable is increased instead; its contents
+ * will be moved to the powerdomain usecounts once PM init completes.
+ */
+void omap4_pm_cpu_online(void)
+{
+ if (!mpuss_pd || !core_pd) {
+ atomic_inc(init_cpu_online_count);
+ return;
+ }
+
+ pwrdm_clkdm_enable(mpuss_pd);
+ pwrdm_clkdm_enable(core_pd);
+}
+
+/**
+ * omap4_pm_cpu_offline - decrease the number of online CPUs
+ *
+ * This function decreases the usecounts for MPU and CORE powerdomains,
+ * which allows the domains to properly reflect usage with online CPUs
+ * also. CORE powerdomain usecount is decreased, as MPU is using memories,
+ * which are powered through CORE powerdomain (SDRAM). If this function is
+ * called before PM init has completed (mpuss_pd / core_pd are not defined),
+ * a temporary init time variable is increased instead; its contents
+ * will be moved to the powerdomain usecounts once PM init completes.
+ */
+void omap4_pm_cpu_offline(void)
+{
+ if (!mpuss_pd || !core_pd) {
+ atomic_dec(init_cpu_online_count);
+ return;
+ }
+
+ pwrdm_clkdm_disable(mpuss_pd);
+ pwrdm_clkdm_disable(core_pd);
+}
+
+/**
* omap4_enter_lowpower: OMAP4 MPUSS Low Power Entry Function
* The purpose of this function is to manage low power programming
* of OMAP4 MPUSS subsystem
@@ -274,11 +319,17 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int
power_state)
scu_pwrst_prepare(cpu, power_state);
l2x0_pwrst_prepare(cpu, save_state);
+ /* Decrement usecounts for MPU and CORE pd as we are entering idle */
+ omap4_pm_cpu_offline();
+
/*
* Call low level function with targeted low power state.
*/
cpu_suspend(save_state, omap4_finish_suspend);
+ /* Increment usecounts for MPU and CORE pd as we are leaving idle */
+ omap4_pm_cpu_online();
+
/*
* Restore the CPUx power state to ON otherwise CPUx
* power domain can transitions to programmed low power
@@ -315,6 +366,8 @@ int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned
int power_state)
set_cpu_wakeup_addr(cpu, virt_to_phys(pm_info-secondary_startup
[PATCHv5 05/10] ARM: OMAP: clockdomain: add support for preventing autodep delete
Some clockdomains bug out if their autodeps are deleted before idle.
This happens namely with OMAP3 PER domain, it will bug out if it
doesn't have wakedeps enabled when it enters off-mode. This patch
adds support for new flag 'CLKDM_NO_AUTODEP_DISABLE' which does this.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomain.c |3 +++
arch/arm/mach-omap2/clockdomain.h |4
2 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index 8c8518c..2fa433a 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -201,6 +201,9 @@ void _clkdm_del_autodeps(struct clockdomain *clkdm)
if (!autodeps || clkdm-flags CLKDM_NO_AUTODEPS)
return;
+ if (clkdm-flags CLKDM_NO_AUTODEP_DISABLE)
+ return;
+
for (autodep = autodeps; autodep-clkdm.ptr; autodep++) {
if (IS_ERR(autodep-clkdm.ptr))
continue;
diff --git a/arch/arm/mach-omap2/clockdomain.h
b/arch/arm/mach-omap2/clockdomain.h
index 5601dc1..9b8733e 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -34,6 +34,9 @@
* CLKDM_ACTIVE_WITH_MPU: The PRCM guarantees that this clockdomain is
* active whenever the MPU is active. True for interconnects and
* the WKUP clockdomains.
+ * CLKDM_NO_AUTODEP_DISABLE: Prevent clockdomain code from deleting autodeps.
+ * Needed for PER domain on omap3, as it will bug out with off-mode if
+ * wakedeps are removed.
*/
#define CLKDM_CAN_FORCE_SLEEP (1 0)
#define CLKDM_CAN_FORCE_WAKEUP (1 1)
@@ -41,6 +44,7 @@
#define CLKDM_CAN_DISABLE_AUTO (1 3)
#define CLKDM_NO_AUTODEPS (1 4)
#define CLKDM_ACTIVE_WITH_MPU (1 5)
+#define CLKDM_NO_AUTODEP_DISABLE (1 6)
#define CLKDM_CAN_HWSUP(CLKDM_CAN_ENABLE_AUTO |
CLKDM_CAN_DISABLE_AUTO)
#define CLKDM_CAN_SWSUP(CLKDM_CAN_FORCE_SLEEP |
CLKDM_CAN_FORCE_WAKEUP)
--
1.7.4.1
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[PATCHv5 04/10] ARM: OMAP3: set autoidle flag for sdrc_ick
sdrc_ick doesn't have autoidle flag on HW, but is always automatically
idled. Thus mark the autoidle flag statically as true for it to reflect
hardware behavior. The clock will no longer show as active in usecount
dumps and will allow the voltdm-sleep / wakeup calls to work properly.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
Reviewed-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock3xxx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index 83bed9a..1ddc7fc 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -1739,6 +1739,7 @@ static struct clk sdrc_ick = {
.flags = ENABLE_ON_INIT,
.clkdm_name = core_l3_clkdm,
.recalc = followparent_recalc,
+ .autoidle = true,
};
static struct clk gpmc_fck = {
--
1.7.4.1
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[PATCHv5 06/10] ARM: OMAP3: do not delete per_clkdm autodeps during idle
Previously, PER clock domain was always enabled, as the usecounts
for this domain incorrectly always showed positive value. On HW
level though, the domain enters idle as it is set in HW supervised
mode. Now, when the usecounts reflect real values, PER domain
will be put to HWSUP sleep mode, which means its autodeps are deleted.
Removing wakedeps for PER domain will cause multiple problems.
First of all, coming back from idle, PER domain remains idle as the
wakedeps have been disabled for the domain, and this causes a crash
with the GPIO code, as the resume code attempts to access domain
which is not active. Just enabling the interface clocks for the GPIO
does not help, as they are autoidled and don't bring the domain out
of idle. Secondly, there are multiple erratas for omap3, which say
that the wakedeps should be enabled for the PER domain, see e.g.
errata i582 for omap3630.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomains3xxx_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c
b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index 56089c4..3b3c524 100644
--- a/arch/arm/mach-omap2/clockdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c
@@ -370,7 +370,7 @@ static struct clockdomain usbhost_am35x_clkdm = {
static struct clockdomain per_clkdm = {
.name = per_clkdm,
.pwrdm = { .name = per_pwrdm },
- .flags = CLKDM_CAN_HWSUP_SWSUP,
+ .flags = CLKDM_CAN_HWSUP_SWSUP | CLKDM_NO_AUTODEP_DISABLE,
.dep_bit= OMAP3430_EN_PER_SHIFT,
.wkdep_srcs = per_wkdeps,
.sleepdep_srcs = per_sleepdeps,
--
1.7.4.1
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[PATCHv5 08/10] ARM: OMAP4: hwmod: add support for hwmod autoidle flag
If a hwmod is in HWAUTO mode, it will idle automatically and should not
be accounted for in the clkdm / pwrdm usecounts. Thus, flag modules in
such mode as autoidle during init, and ignore these in subsequent
usecount calculations.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomain.c|6 ++
arch/arm/mach-omap2/omap_hwmod.c |3 +++
arch/arm/plat-omap/include/plat/omap_hwmod.h |2 ++
3 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index 2fa433a..0ee7d09a 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -1055,6 +1055,9 @@ int clkdm_hwmod_enable(struct clockdomain *clkdm, struct
omap_hwmod *oh)
if (!oh)
return -EINVAL;
+ if (oh-flags HWMOD_AUTOIDLE)
+ return 0;
+
return _clkdm_clk_hwmod_enable(clkdm);
}
@@ -1086,6 +1089,9 @@ int clkdm_hwmod_disable(struct clockdomain *clkdm, struct
omap_hwmod *oh)
if (!oh)
return -EINVAL;
+ if (oh-flags HWMOD_AUTOIDLE)
+ return 0;
+
return _clkdm_clk_hwmod_disable(clkdm);
}
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f826917..6807b02 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2377,6 +2377,9 @@ static int __init _register(struct omap_hwmod *oh)
INIT_LIST_HEAD(oh-slave_ports);
spin_lock_init(oh-_lock);
+ if (cpu_is_omap44xx() oh-prcm.omap4.modulemode == MODULEMODE_HWCTRL)
+ oh-flags |= HWMOD_AUTOIDLE;
+
oh-_state = _HWMOD_STATE_REGISTERED;
/*
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 0f840a9..36130f9 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -440,6 +440,7 @@ struct omap_hwmod_omap4_prcm {
* in order to complete the reset. Optional clocks will be disabled
* again after the reset.
* HWMOD_16BIT_REG: Module has 16bit registers
+ * HWMOD_AUTOIDLE: Module is controlled automatically by hardware
*/
#define HWMOD_SWSUP_SIDLE (1 0)
#define HWMOD_SWSUP_MSTANDBY (1 1)
@@ -450,6 +451,7 @@ struct omap_hwmod_omap4_prcm {
#define HWMOD_NO_IDLEST(1 6)
#define HWMOD_CONTROL_OPT_CLKS_IN_RESET(1 7)
#define HWMOD_16BIT_REG(1 8)
+#define HWMOD_AUTOIDLE (1 9)
/*
* omap_hwmod._int_flags definitions
--
1.7.4.1
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[PATCHv5 07/10] ARM: OMAP4: clock data: set autoidle flag for dss_fck
dss_fck is currently being used improperly within the hwmod database
as an interface clock for DSS hwmods. This causes the dss_fck to
be enabled even if the dss powerdomain itself is idle, resulting
in wrong data within the powerdomain usecounts. Marked dss_fck as
autoidle which makes the clock to disappear from usecounts for now.
This patch can be reverted once the interface clocks for DSS hwmods
have been properly fixed.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index d7f55e4..95834d7 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1408,6 +1408,7 @@ static struct clk dss_fck = {
.clkdm_name = l3_dss_clkdm,
.parent = l3_div_ck,
.recalc = followparent_recalc,
+ .autoidle = true,
};
static struct clk efuse_ctrl_cust_fck = {
--
1.7.4.1
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[PATCHv5 09/10] ARM: OMAP4: hwmod data: set mpu hwmod modulemode to hwauto
This makes sure it is handled as autoidle type by the usecounting.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 2d13b33..367de25 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2492,6 +2492,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET,
.context_offs = OMAP4_RM_MPU_MPU_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_HWCTRL,
},
},
};
--
1.7.4.1
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[PATCHv5 10/10] ARM: OMAP4: clock data: flag hw controlled clocks as autoidle
This makes sure these clocks are ignored by the clkdm / pwrdm usecounting.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 95834d7..d2fb4e8 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3356,8 +3356,11 @@ int __init omap4xxx_clk_init(void)
*/
for (c = omap44xx_clks; c omap44xx_clks + ARRAY_SIZE(omap44xx_clks);
- c++)
+ c++) {
+ if (c-lk.clk-enable_bit == OMAP4430_MODULEMODE_HWCTRL)
+ c-lk.clk-autoidle = true;
clk_preinit(c-lk.clk);
+ }
for (c = omap44xx_clks; c omap44xx_clks + ARRAY_SIZE(omap44xx_clks);
c++)
--
1.7.4.1
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Re: [PATCHv5 00/10] ARM: OMAP: PM usecounting changes
On Tue, 2012-09-25 at 15:56 +0530, Rajendra Nayak wrote: Hi Tero, On Tuesday 25 September 2012 03:02 PM, Tero Kristo wrote: Hi, Changes compared to previous version: Did you get a chance to look at the issue I reported about autodeps? http://www.mail-archive.com/linux-omap@vger.kernel.org/msg72876.html Not really, I didn't think that bug report was meant for me, I kind of thought it only happened with your set. But now looking at your email in detail, I guess you are saying there is a bug in this code (the one that touches iclk stuff), which causes the USB / DSS domains to follow MPU/CORE, is that right? -Tero regards, Rajendra - Fixed OMAP4 support (patches 7-10) - Dropped debugging support from this set for now - Rebased on top of 3.6-rc5 + func-pwrst + omap4-ret code (omap4 support easier to test with these) - Patch #1: * dropped clkdm_usecount_inc / clkdm_usecount_dec APIs * clkdm_clk_enable / disable are used now instead * some code ordering changed for the new setup to work properly * changed BUG_ON calls to WARN_ON - Patch #2: * added spinlock for protecting voltdm callbacks * pwrdm lock extended to protect pwrdm callbacks - Patch #3: * dropped generic API call for the cpu pwrdm idle / wakeup * instead use pwrdm_clkdm_enable / disable calls directly from PM code * omap4 support fixed to work properly with SMP, added omap4 specific CPU pwrdm idle / wakeup calls for this purpose - Patch #4: * no changes * added 'Reviewed-by' tag for Rajendra - Patch #5: * no changes, just rebase - Patch #6: * no changes Tested with OMAP3 beagle, omap4460 GP panda + omap4430 EMU blaze boards. I will be posting new versions for the voltdm fixes + auto retention + panda board tps6236x support code later on today, which are based on top of this set. Branch also available here: git://gitorious.org/~kristo/omap-pm/omap-pm-work.git branch: mainline-3.6-rc5-pwrdm-changes-v5 -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv5 02/10] ARM: OMAP3+: voltage: add support for voltagedomain usecounts
On Tue, 2012-09-25 at 10:41 +0100, Russell King - ARM Linux wrote:
On Tue, Sep 25, 2012 at 12:32:37PM +0300, Tero Kristo wrote:
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index ba49029..ca54aec 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -1475,10 +1477,16 @@ int pwrdm_state_switch(struct powerdomain *pwrdm)
*/
void pwrdm_clkdm_enable(struct powerdomain *pwrdm)
{
+ unsigned long flags;
+
if (!pwrdm)
return;
- atomic_inc(pwrdm-usecount);
+ if (atomic_inc_return(pwrdm-usecount) == 1) {
+ spin_lock_irqsave(pwrdm-lock, flags);
+ voltdm_pwrdm_enable(pwrdm-voltdm.ptr);
+ spin_unlock_irqrestore(pwrdm-lock, flags);
+ }
This looks like the classic I like atomic types because they have magic
properties brain-deadness.
Hi Russell,
Thats a good catch, I was actually thinking about this sequence myself
also, but decided to leave it as is here due to similarity with the
existing code in mach-omap2/clockdomain.c, see e.g.
_clkdm_clk_hwmod_enable. Maybe those parts should be fixed also...?
What would happen to users of this if you had this sequence:
pwrdm-usecount starts off as 1.
Thread0 Thread1
atomic_inc_return() (returns 1)
atomic_inc_return() (returns 2)
starts using stuff in power domain
spin_lock_irqsave()
voltdm_pwrdm_enable()
spin_unlock_irqrestore()
?
That as such wouldn't break anything, as the callback isn't doing
anything too critical, but yes, for the sequencing of events it is bad.
The alternate implementation I was thinking was to drop the atomic_t and
just use an int for the usecount, and protect the usecount also with the
spinlock. However, there might be some performance issues if this is
done (but I think it is actually better than having some rather
mysterious bugs instead.)
-Tero
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Re: [PATCHv5 00/10] ARM: OMAP: PM usecounting changes
On Tue, 2012-09-25 at 17:53 +0530, Rajendra Nayak wrote: On Tuesday 25 September 2012 05:23 PM, Tero Kristo wrote: On Tue, 2012-09-25 at 15:56 +0530, Rajendra Nayak wrote: Hi Tero, On Tuesday 25 September 2012 03:02 PM, Tero Kristo wrote: Hi, Changes compared to previous version: Did you get a chance to look at the issue I reported about autodeps? http://www.mail-archive.com/linux-omap@vger.kernel.org/msg72876.html Not really, I didn't think that bug report was meant for me, I kind of thought it only happened with your set. But now looking at your email in detail, I guess you are saying there is a bug in this code (the one that touches iclk stuff), which causes the USB / DSS domains to follow MPU/CORE, is that right? Yes, basically the autodeps remain set, even while the module is not in use at all, which causes them to come in and out of sleep along with MPU. Actually I think I accidentally fixed this problem with the latest rev, due to the fact that I am using generic clkdm_clk_enable / disable calls from iclk now. I also just tested this (while fixing the complaint from Russell), and it looks like both USB and DSS pwrdms are remaining nicely idle on OMAP3. -Tero -Tero regards, Rajendra - Fixed OMAP4 support (patches 7-10) - Dropped debugging support from this set for now - Rebased on top of 3.6-rc5 + func-pwrst + omap4-ret code (omap4 support easier to test with these) - Patch #1: * dropped clkdm_usecount_inc / clkdm_usecount_dec APIs * clkdm_clk_enable / disable are used now instead * some code ordering changed for the new setup to work properly * changed BUG_ON calls to WARN_ON - Patch #2: * added spinlock for protecting voltdm callbacks * pwrdm lock extended to protect pwrdm callbacks - Patch #3: * dropped generic API call for the cpu pwrdm idle / wakeup * instead use pwrdm_clkdm_enable / disable calls directly from PM code * omap4 support fixed to work properly with SMP, added omap4 specific CPU pwrdm idle / wakeup calls for this purpose - Patch #4: * no changes * added 'Reviewed-by' tag for Rajendra - Patch #5: * no changes, just rebase - Patch #6: * no changes Tested with OMAP3 beagle, omap4460 GP panda + omap4430 EMU blaze boards. I will be posting new versions for the voltdm fixes + auto retention + panda board tps6236x support code later on today, which are based on top of this set. Branch also available here: git://gitorious.org/~kristo/omap-pm/omap-pm-work.git branch: mainline-3.6-rc5-pwrdm-changes-v5 -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv6 00/11]: ARM: OMAP: PM usecounting changes
Hi, Changes compared to previous version: - Added patch #1 for fixing a potential race condition within clockdomain code - Fixed patch #3 (old patch #2) regarding a similar race condition within the voltagedomain code Tested with OMAP3 beagle, OMAP4460 GP panda, OMAP4430 EMU blaze devices. Branch available: git://gitorious.org/~kristo/omap-pm/omap-pm-work.git branch: mainline-3.6-rc5-pwrdm-changes-v6 -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv6 02/11] ARM: OMAP3+: voltage/pwrdm/clkdm/clock add recursive usecount tracking
This patch fixes the usecount tracking for omap3+, previously the
usecount numbers were rather bogus and were not really useful for
any purpose. Now usecount numbers track the number of really active
clients on each domain. This patch also adds support for usecount
tracking on powerdomain level and autoidle flag for clocks that
are hardware controlled and should be skipped in usecount
calculations.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/clkt_iclk.c | 21 ++
arch/arm/mach-omap2/clockdomain.c | 16 +-
arch/arm/mach-omap2/dpll3xxx.c | 19
arch/arm/mach-omap2/powerdomain.c | 35 +++
arch/arm/mach-omap2/powerdomain.h |4 +++
arch/arm/plat-omap/clock.c |6 +
arch/arm/plat-omap/include/plat/clock.h |2 +
7 files changed, 102 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c
index 3d43fba..1afc599 100644
--- a/arch/arm/mach-omap2/clkt_iclk.c
+++ b/arch/arm/mach-omap2/clkt_iclk.c
@@ -21,6 +21,7 @@
#include clock2xxx.h
#include cm2xxx_3xxx.h
#include cm-regbits-24xx.h
+#include clockdomain.h
/* Private functions */
@@ -34,6 +35,16 @@ void omap2_clkt_iclk_allow_idle(struct clk *clk)
v = __raw_readl((__force void __iomem *)r);
v |= (1 clk-enable_bit);
__raw_writel(v, (__force void __iomem *)r);
+
+ /* Remove this clock from parent clockdomain usecounts */
+ if (clk-usecount clk-clkdm)
+ clkdm_clk_disable(clk-clkdm, clk);
+
+ /*
+* Mark as autoidle, so we continue to ignore this clock in
+* parent clkdm usecount calculations
+*/
+ clk-autoidle = true;
}
/* XXX */
@@ -46,6 +57,16 @@ void omap2_clkt_iclk_deny_idle(struct clk *clk)
v = __raw_readl((__force void __iomem *)r);
v = ~(1 clk-enable_bit);
__raw_writel(v, (__force void __iomem *)r);
+
+ /*
+* Disable autoidle flag so further clkdm usecounts take this
+* clock into account
+*/
+ clk-autoidle = false;
+
+ /* Add clock back to parent clockdomain usecount */
+ if (clk-usecount clk-clkdm)
+ clkdm_clk_enable(clk-clkdm, clk);
}
/* Public data */
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index 173905d..7715353 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -910,6 +910,7 @@ bool clkdm_in_hwsup(struct clockdomain *clkdm)
static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
{
unsigned long flags;
+ int usecount;
if (!clkdm || !arch_clkdm || !arch_clkdm-clkdm_clk_enable)
return -EINVAL;
@@ -921,12 +922,16 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain
*clkdm)
* should be called for every clock instance or hwmod that is
* enabled, so the clkdm can be force woken up.
*/
- if ((atomic_inc_return(clkdm-usecount) 1) autodeps) {
+ usecount = atomic_inc_return(clkdm-usecount);
+
+ if (usecount 1 autodeps) {
spin_unlock_irqrestore(clkdm-lock, flags);
return 0;
}
arch_clkdm-clkdm_clk_enable(clkdm);
+ if (usecount == 1)
+ pwrdm_clkdm_enable(clkdm-pwrdm.ptr);
pwrdm_state_switch(clkdm-pwrdm.ptr);
spin_unlock_irqrestore(clkdm-lock, flags);
@@ -956,6 +961,7 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain
*clkdm)
}
arch_clkdm-clkdm_clk_disable(clkdm);
+ pwrdm_clkdm_disable(clkdm-pwrdm.ptr);
pwrdm_state_switch(clkdm-pwrdm.ptr);
spin_unlock_irqrestore(clkdm-lock, flags);
@@ -988,6 +994,10 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk
*clk)
if (!clk)
return -EINVAL;
+ /* If autoidle clock, do not update clkdm usecounts */
+ if (clk-autoidle)
+ return 0;
+
return _clkdm_clk_hwmod_enable(clkdm);
}
@@ -1014,6 +1024,10 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct
clk *clk)
if (!clk)
return -EINVAL;
+ /* If autoidle clock, do not update clkdm usecounts */
+ if (clk-autoidle)
+ return 0;
+
return _clkdm_clk_hwmod_disable(clkdm);
}
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index b9c8d2f..da660d2 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -34,6 +34,7 @@
#include clock.h
#include cm2xxx_3xxx.h
#include cm-regbits-34xx.h
+#include clockdomain.h
/* CM_AUTOIDLE_PLL*.AUTO_* bit values */
#define DPLL_AUTOIDLE_DISABLE 0x0
@@ -571,6 +572,15 @@ void omap3_dpll_allow_idle(struct clk *clk)
v |= DPLL_AUTOIDLE_LOW_POWER_STOP __ffs(dd
[PATCHv6 03/11] ARM: OMAP3+: voltage: add support for voltagedomain usecounts
These are updated based on powerdomain usecounts. Also added support
for voltdm-sleep and voltdm-wakeup calls that will be invoked once
voltagedomain enters sleep or wakes up based on usecount numbers. These
will be used for controlling voltage scaling functionality.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/powerdomain.c | 17 +-
arch/arm/mach-omap2/voltage.c | 65 +
arch/arm/mach-omap2/voltage.h | 13 +++
3 files changed, 94 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index ba49029..abc50c2 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -1475,10 +1475,17 @@ int pwrdm_state_switch(struct powerdomain *pwrdm)
*/
void pwrdm_clkdm_enable(struct powerdomain *pwrdm)
{
+ unsigned long flags;
+
if (!pwrdm)
return;
- atomic_inc(pwrdm-usecount);
+ spin_lock_irqsave(pwrdm-lock, flags);
+
+ if (atomic_inc_return(pwrdm-usecount) == 1)
+ voltdm_pwrdm_enable(pwrdm-voltdm.ptr);
+
+ spin_unlock_irqrestore(pwrdm-lock, flags);
}
/**
@@ -1492,12 +1499,20 @@ void pwrdm_clkdm_enable(struct powerdomain *pwrdm)
void pwrdm_clkdm_disable(struct powerdomain *pwrdm)
{
int val;
+ unsigned long flags;
if (!pwrdm)
return;
+ spin_lock_irqsave(pwrdm-lock, flags);
+
val = atomic_dec_return(pwrdm-usecount);
+ if (!val)
+ voltdm_pwrdm_disable(pwrdm-voltdm.ptr);
+
+ spin_unlock_irqrestore(pwrdm-lock, flags);
+
WARN_ON(val 0);
}
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 4dc60e8..0fc2a25 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -340,6 +340,70 @@ int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct
powerdomain *pwrdm)
}
/**
+ * voltdm_pwrdm_enable - increase usecount for a voltagedomain
+ * @voltdm: struct voltagedomain * to increase count for
+ *
+ * Increases usecount for a given voltagedomain. If the usecount reaches
+ * 1, the domain is awakened from idle and the function will call the
+ * voltagedomain-wakeup callback for this domain.
+ */
+void voltdm_pwrdm_enable(struct voltagedomain *voltdm)
+{
+ unsigned long flags;
+
+ if (!voltdm)
+ return;
+
+ spin_lock_irqsave(voltdm-lock, flags);
+
+ if (atomic_inc_return(voltdm-usecount) == 1 voltdm-wakeup)
+ voltdm-wakeup(voltdm);
+
+ spin_unlock_irqrestore(voltdm-lock, flags);
+}
+
+/**
+ * voltdm_pwrdm_disable - decrease usecount for a voltagedomain
+ * @voltdm: struct voltagedomain * to decrease count for
+ *
+ * Decreases the usecount for a given voltagedomain. If the usecount
+ * reaches zero, the domain can idle and the function will call the
+ * voltagedomain-sleep callback, and calculate the overall target
+ * state for the voltagedomain.
+ */
+void voltdm_pwrdm_disable(struct voltagedomain *voltdm)
+{
+ u8 target_state = PWRDM_POWER_OFF;
+ int state;
+ struct powerdomain *pwrdm;
+ int val;
+ unsigned long flags;
+
+ if (!voltdm)
+ return;
+
+ spin_lock_irqsave(voltdm-lock, flags);
+
+ val = atomic_dec_return(voltdm-usecount);
+
+ WARN_ON(val 0);
+
+ if (val == 0) {
+ /* Determine target state for voltdm */
+ list_for_each_entry(pwrdm, voltdm-pwrdm_list, voltdm_node) {
+ state = pwrdm_read_next_pwrst(pwrdm);
+ if (state target_state)
+ target_state = state;
+ }
+ voltdm-target_state = target_state;
+ if (voltdm-sleep)
+ voltdm-sleep(voltdm);
+ }
+
+ spin_unlock_irqrestore(voltdm-lock, flags);
+}
+
+/**
* voltdm_for_each_pwrdm - call function for each pwrdm in a voltdm
* @voltdm: struct voltagedomain * to iterate over
* @fn: callback function *
@@ -402,6 +466,7 @@ static int _voltdm_register(struct voltagedomain *voltdm)
INIT_LIST_HEAD(voltdm-pwrdm_list);
list_add(voltdm-node, voltdm_list);
+ spin_lock_init(voltdm-lock);
pr_debug(voltagedomain: registered %s\n, voltdm-name);
return 0;
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 0ac2caf..7f4f99d 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -15,6 +15,7 @@
#define __ARCH_ARM_MACH_OMAP2_VOLTAGE_H
#include linux/err.h
+#include linux/spinlock.h
#include plat/voltage.h
@@ -56,10 +57,14 @@ struct omap_vfsm_instance {
* @pwrdm_list: list_head linking all powerdomains in this voltagedomain
* @vc: pointer to VC channel associated with this voltagedomain
* @vp: pointer to VP
[PATCHv6 01/11] ARM: OMAP: clockdomain: Fix locking on _clkdm_clk_hwmod_enable / disable
Previously the code only acquired spinlock after increasing / decreasing
the usecount value, which is wrong. This leaves a small window where
a task switch may occur between the check of the usecount and the actual
wakeup / sleep of the domain. Fixed by moving the spinlock locking before
the usecount access. Left the usecount as atomic_t if someone wants an
easy access to the parameter through atomic_read.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomain.c | 15 +++
1 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index 8664f5a..173905d 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -914,15 +914,18 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain
*clkdm)
if (!clkdm || !arch_clkdm || !arch_clkdm-clkdm_clk_enable)
return -EINVAL;
+ spin_lock_irqsave(clkdm-lock, flags);
+
/*
* For arch's with no autodeps, clkcm_clk_enable
* should be called for every clock instance or hwmod that is
* enabled, so the clkdm can be force woken up.
*/
- if ((atomic_inc_return(clkdm-usecount) 1) autodeps)
+ if ((atomic_inc_return(clkdm-usecount) 1) autodeps) {
+ spin_unlock_irqrestore(clkdm-lock, flags);
return 0;
+ }
- spin_lock_irqsave(clkdm-lock, flags);
arch_clkdm-clkdm_clk_enable(clkdm);
pwrdm_state_switch(clkdm-pwrdm.ptr);
spin_unlock_irqrestore(clkdm-lock, flags);
@@ -939,15 +942,19 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain
*clkdm)
if (!clkdm || !arch_clkdm || !arch_clkdm-clkdm_clk_disable)
return -EINVAL;
+ spin_lock_irqsave(clkdm-lock, flags);
+
if (atomic_read(clkdm-usecount) == 0) {
+ spin_unlock_irqrestore(clkdm-lock, flags);
WARN_ON(1); /* underflow */
return -ERANGE;
}
- if (atomic_dec_return(clkdm-usecount) 0)
+ if (atomic_dec_return(clkdm-usecount) 0) {
+ spin_unlock_irqrestore(clkdm-lock, flags);
return 0;
+ }
- spin_lock_irqsave(clkdm-lock, flags);
arch_clkdm-clkdm_clk_disable(clkdm);
pwrdm_state_switch(clkdm-pwrdm.ptr);
spin_unlock_irqrestore(clkdm-lock, flags);
--
1.7.4.1
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[PATCHv6 05/11] ARM: OMAP3: set autoidle flag for sdrc_ick
sdrc_ick doesn't have autoidle flag on HW, but is always automatically
idled. Thus mark the autoidle flag statically as true for it to reflect
hardware behavior. The clock will no longer show as active in usecount
dumps and will allow the voltdm-sleep / wakeup calls to work properly.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
Reviewed-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock3xxx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index 83bed9a..1ddc7fc 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -1739,6 +1739,7 @@ static struct clk sdrc_ick = {
.flags = ENABLE_ON_INIT,
.clkdm_name = core_l3_clkdm,
.recalc = followparent_recalc,
+ .autoidle = true,
};
static struct clk gpmc_fck = {
--
1.7.4.1
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[PATCHv6 06/11] ARM: OMAP: clockdomain: add support for preventing autodep delete
Some clockdomains bug out if their autodeps are deleted before idle.
This happens namely with OMAP3 PER domain, it will bug out if it
doesn't have wakedeps enabled when it enters off-mode. This patch
adds support for new flag 'CLKDM_NO_AUTODEP_DISABLE' which does this.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomain.c |3 +++
arch/arm/mach-omap2/clockdomain.h |4
2 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index 7715353..4f01c8f 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -201,6 +201,9 @@ void _clkdm_del_autodeps(struct clockdomain *clkdm)
if (!autodeps || clkdm-flags CLKDM_NO_AUTODEPS)
return;
+ if (clkdm-flags CLKDM_NO_AUTODEP_DISABLE)
+ return;
+
for (autodep = autodeps; autodep-clkdm.ptr; autodep++) {
if (IS_ERR(autodep-clkdm.ptr))
continue;
diff --git a/arch/arm/mach-omap2/clockdomain.h
b/arch/arm/mach-omap2/clockdomain.h
index 5601dc1..9b8733e 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -34,6 +34,9 @@
* CLKDM_ACTIVE_WITH_MPU: The PRCM guarantees that this clockdomain is
* active whenever the MPU is active. True for interconnects and
* the WKUP clockdomains.
+ * CLKDM_NO_AUTODEP_DISABLE: Prevent clockdomain code from deleting autodeps.
+ * Needed for PER domain on omap3, as it will bug out with off-mode if
+ * wakedeps are removed.
*/
#define CLKDM_CAN_FORCE_SLEEP (1 0)
#define CLKDM_CAN_FORCE_WAKEUP (1 1)
@@ -41,6 +44,7 @@
#define CLKDM_CAN_DISABLE_AUTO (1 3)
#define CLKDM_NO_AUTODEPS (1 4)
#define CLKDM_ACTIVE_WITH_MPU (1 5)
+#define CLKDM_NO_AUTODEP_DISABLE (1 6)
#define CLKDM_CAN_HWSUP(CLKDM_CAN_ENABLE_AUTO |
CLKDM_CAN_DISABLE_AUTO)
#define CLKDM_CAN_SWSUP(CLKDM_CAN_FORCE_SLEEP |
CLKDM_CAN_FORCE_WAKEUP)
--
1.7.4.1
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[PATCHv6 04/11] ARM: OMAP3: add manual control for mpu / core pwrdm usecounting
mpu / core powerdomain usecounts are now statically increased
by 1 during MPU activity. This allows the domains to reflect
actual usage, and will allow the usecount to reach 0 just before
all CPUs are ready to idle. Proper powerdomain usecounts are
propageted to voltagedomain level also, and will allow vc
callbacks to be triggered at right point of time.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/common.h |6 ++
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 72 -
arch/arm/mach-omap2/omap-smp.c|2 +
arch/arm/mach-omap2/pm34xx.c | 21
4 files changed, 100 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 6ea837a..a445a02 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -292,6 +292,8 @@ extern int omap4_finish_suspend(unsigned long cpu_state);
extern void omap4_cpu_resume(void);
extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
extern u32 omap4_mpuss_read_prev_context_state(void);
+extern void omap4_pm_cpu_online(void);
+extern void omap4_pm_cpu_offline(void);
#else
static inline int omap4_enter_lowpower(unsigned int cpu,
unsigned int power_state)
@@ -323,6 +325,10 @@ static inline u32 omap4_mpuss_read_prev_context_state(void)
{
return 0;
}
+
+static inline void omap4_pm_cpu_online(void) { }
+
+static inline void omap4_pm_cpu_offline(void) { }
#endif
struct omap_sdrc_params;
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 230bdcd..0ad2337 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -72,8 +72,9 @@ struct omap4_cpu_pm_info {
};
static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
-static struct powerdomain *mpuss_pd;
+static struct powerdomain *mpuss_pd, *core_pd;
static void __iomem *sar_base;
+static atomic_t __initdata init_cpu_online_count;
/*
* Program the wakeup routine address for the CPU0 and CPU1
@@ -216,6 +217,50 @@ static void save_l2x0_context(void)
#endif
/**
+ * omap4_pm_cpu_online - increase the number of online CPUs
+ *
+ * This function increases the usecounts for MPU and CORE powerdomains,
+ * which allows the domains to properly reflect usage with online CPUs
+ * also. CORE powerdomain usecount is increased, as MPU is using memories,
+ * which are powered through CORE powerdomain (SDRAM). If this function is
+ * called before PM init has completed (mpuss_pd / core_pd are not defined),
+ * a temporary init time variable is increased instead; its contents
+ * will be moved to the powerdomain usecounts once PM init completes.
+ */
+void omap4_pm_cpu_online(void)
+{
+ if (!mpuss_pd || !core_pd) {
+ atomic_inc(init_cpu_online_count);
+ return;
+ }
+
+ pwrdm_clkdm_enable(mpuss_pd);
+ pwrdm_clkdm_enable(core_pd);
+}
+
+/**
+ * omap4_pm_cpu_offline - decrease the number of online CPUs
+ *
+ * This function decreases the usecounts for MPU and CORE powerdomains,
+ * which allows the domains to properly reflect usage with online CPUs
+ * also. CORE powerdomain usecount is decreased, as MPU is using memories,
+ * which are powered through CORE powerdomain (SDRAM). If this function is
+ * called before PM init has completed (mpuss_pd / core_pd are not defined),
+ * a temporary init time variable is increased instead; its contents
+ * will be moved to the powerdomain usecounts once PM init completes.
+ */
+void omap4_pm_cpu_offline(void)
+{
+ if (!mpuss_pd || !core_pd) {
+ atomic_dec(init_cpu_online_count);
+ return;
+ }
+
+ pwrdm_clkdm_disable(mpuss_pd);
+ pwrdm_clkdm_disable(core_pd);
+}
+
+/**
* omap4_enter_lowpower: OMAP4 MPUSS Low Power Entry Function
* The purpose of this function is to manage low power programming
* of OMAP4 MPUSS subsystem
@@ -274,11 +319,17 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int
power_state)
scu_pwrst_prepare(cpu, power_state);
l2x0_pwrst_prepare(cpu, save_state);
+ /* Decrement usecounts for MPU and CORE pd as we are entering idle */
+ omap4_pm_cpu_offline();
+
/*
* Call low level function with targeted low power state.
*/
cpu_suspend(save_state, omap4_finish_suspend);
+ /* Increment usecounts for MPU and CORE pd as we are leaving idle */
+ omap4_pm_cpu_online();
+
/*
* Restore the CPUx power state to ON otherwise CPUx
* power domain can transitions to programmed low power
@@ -315,6 +366,8 @@ int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned
int power_state)
set_cpu_wakeup_addr(cpu, virt_to_phys(pm_info-secondary_startup
[PATCHv6 08/11] ARM: OMAP4: clock data: set autoidle flag for dss_fck
dss_fck is currently being used improperly within the hwmod database
as an interface clock for DSS hwmods. This causes the dss_fck to
be enabled even if the dss powerdomain itself is idle, resulting
in wrong data within the powerdomain usecounts. Marked dss_fck as
autoidle which makes the clock to disappear from usecounts for now.
This patch can be reverted once the interface clocks for DSS hwmods
have been properly fixed.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index d7f55e4..95834d7 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1408,6 +1408,7 @@ static struct clk dss_fck = {
.clkdm_name = l3_dss_clkdm,
.parent = l3_div_ck,
.recalc = followparent_recalc,
+ .autoidle = true,
};
static struct clk efuse_ctrl_cust_fck = {
--
1.7.4.1
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[PATCHv6 07/11] ARM: OMAP3: do not delete per_clkdm autodeps during idle
Previously, PER clock domain was always enabled, as the usecounts
for this domain incorrectly always showed positive value. On HW
level though, the domain enters idle as it is set in HW supervised
mode. Now, when the usecounts reflect real values, PER domain
will be put to HWSUP sleep mode, which means its autodeps are deleted.
Removing wakedeps for PER domain will cause multiple problems.
First of all, coming back from idle, PER domain remains idle as the
wakedeps have been disabled for the domain, and this causes a crash
with the GPIO code, as the resume code attempts to access domain
which is not active. Just enabling the interface clocks for the GPIO
does not help, as they are autoidled and don't bring the domain out
of idle. Secondly, there are multiple erratas for omap3, which say
that the wakedeps should be enabled for the PER domain, see e.g.
errata i582 for omap3630.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomains3xxx_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c
b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index 56089c4..3b3c524 100644
--- a/arch/arm/mach-omap2/clockdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c
@@ -370,7 +370,7 @@ static struct clockdomain usbhost_am35x_clkdm = {
static struct clockdomain per_clkdm = {
.name = per_clkdm,
.pwrdm = { .name = per_pwrdm },
- .flags = CLKDM_CAN_HWSUP_SWSUP,
+ .flags = CLKDM_CAN_HWSUP_SWSUP | CLKDM_NO_AUTODEP_DISABLE,
.dep_bit= OMAP3430_EN_PER_SHIFT,
.wkdep_srcs = per_wkdeps,
.sleepdep_srcs = per_sleepdeps,
--
1.7.4.1
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[PATCHv6 10/11] ARM: OMAP4: hwmod data: set mpu hwmod modulemode to hwauto
This makes sure it is handled as autoidle type by the usecounting.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 2d13b33..367de25 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2492,6 +2492,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET,
.context_offs = OMAP4_RM_MPU_MPU_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_HWCTRL,
},
},
};
--
1.7.4.1
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[PATCHv6 09/11] ARM: OMAP4: hwmod: add support for hwmod autoidle flag
If a hwmod is in HWAUTO mode, it will idle automatically and should not
be accounted for in the clkdm / pwrdm usecounts. Thus, flag modules in
such mode as autoidle during init, and ignore these in subsequent
usecount calculations.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomain.c|6 ++
arch/arm/mach-omap2/omap_hwmod.c |3 +++
arch/arm/plat-omap/include/plat/omap_hwmod.h |2 ++
3 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index 4f01c8f..af88ae5 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -1063,6 +1063,9 @@ int clkdm_hwmod_enable(struct clockdomain *clkdm, struct
omap_hwmod *oh)
if (!oh)
return -EINVAL;
+ if (oh-flags HWMOD_AUTOIDLE)
+ return 0;
+
return _clkdm_clk_hwmod_enable(clkdm);
}
@@ -1094,6 +1097,9 @@ int clkdm_hwmod_disable(struct clockdomain *clkdm, struct
omap_hwmod *oh)
if (!oh)
return -EINVAL;
+ if (oh-flags HWMOD_AUTOIDLE)
+ return 0;
+
return _clkdm_clk_hwmod_disable(clkdm);
}
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f826917..6807b02 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2377,6 +2377,9 @@ static int __init _register(struct omap_hwmod *oh)
INIT_LIST_HEAD(oh-slave_ports);
spin_lock_init(oh-_lock);
+ if (cpu_is_omap44xx() oh-prcm.omap4.modulemode == MODULEMODE_HWCTRL)
+ oh-flags |= HWMOD_AUTOIDLE;
+
oh-_state = _HWMOD_STATE_REGISTERED;
/*
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 0f840a9..36130f9 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -440,6 +440,7 @@ struct omap_hwmod_omap4_prcm {
* in order to complete the reset. Optional clocks will be disabled
* again after the reset.
* HWMOD_16BIT_REG: Module has 16bit registers
+ * HWMOD_AUTOIDLE: Module is controlled automatically by hardware
*/
#define HWMOD_SWSUP_SIDLE (1 0)
#define HWMOD_SWSUP_MSTANDBY (1 1)
@@ -450,6 +451,7 @@ struct omap_hwmod_omap4_prcm {
#define HWMOD_NO_IDLEST(1 6)
#define HWMOD_CONTROL_OPT_CLKS_IN_RESET(1 7)
#define HWMOD_16BIT_REG(1 8)
+#define HWMOD_AUTOIDLE (1 9)
/*
* omap_hwmod._int_flags definitions
--
1.7.4.1
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[PATCHv6 11/11] ARM: OMAP4: clock data: flag hw controlled clocks as autoidle
This makes sure these clocks are ignored by the clkdm / pwrdm usecounting.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 95834d7..d2fb4e8 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3356,8 +3356,11 @@ int __init omap4xxx_clk_init(void)
*/
for (c = omap44xx_clks; c omap44xx_clks + ARRAY_SIZE(omap44xx_clks);
- c++)
+ c++) {
+ if (c-lk.clk-enable_bit == OMAP4430_MODULEMODE_HWCTRL)
+ c-lk.clk-autoidle = true;
clk_preinit(c-lk.clk);
+ }
for (c = omap44xx_clks; c omap44xx_clks + ARRAY_SIZE(omap44xx_clks);
c++)
--
1.7.4.1
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[PATCHv7 00/21] ARM: OMAP3+: auto retention support
Hi, This set applies on top of linux-3.6-rc5 + func-pwrst code (from Jean) + omap4 core retention set (from me) + PM usecounting changes set (from me). Changes compared to previous version: - Added proper OMAP4 auto-retention support (now that the PM usecount set below supports OMAP4 also properly) - Merged TPS6236x support to this set (patches 16,18-20), without this there will be an issue with patch #21, as panda board will misbehave without TPS support and auto-ret enabled - Patch #15 fixes the addressing of voltage channels for OMAP4, without this the voltage channels either end up changing wrong voltage channel or not changing anything at all - Patch #16 is new based on the discussion earlier on the separate TPS set * uses proper I2C parameters based on board data, this is still in a data table though, as calculating these runtime would be rather complicated (if even possible, as it requires some higher order mathematics according to my understanding) - Patch #17 enables high speed I2C communication for voltage channel on OMAP4 (this now works thanks to patch #16) - Patch #18 is needed for 4460 boards, otherwise the boot-up OPP detection fails and voltage control doesn't work at all on 4460 boards - Patch #19 was pulled from the TPS support set - Patch #20 was pulled from the TPS support set, with following changes: * board setup for the GPIOs was sanitized a bit * dropped a number of unused defines from the code Working branch available: git://gitorious.org/~kristo/omap-pm/omap-pm-work.git branch: mainline-3.6-rc5-omap-auto-ret-v7 Testing done: - hw used: omap3 beagle rev c4, omap4460 gp panda, omap4430 emu blaze - suspend + cpuidle - measured core + mpu voltage rails on all setups to verify that the voltage transitions work properly during idle -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv7 01/21] ARM: OMAP3+: PM: VP: use uV for max and min voltage limits
From: Nishanth Menon n...@ti.com
Every PMIC has it's own eccentricities, For example, one of the
PMIC has MSB set to 1 for a specific function - voltage enable!
using an hardcoded value specific for TWL when copied over to
such an implementation causes the system to crash as the MSB bit
was 0 and the voltage got disabled!.
Instead we use actual values and depend on the convertion routines
to abstract out the eccentricities of each PMIC.
With this, we can now move the voltages to a common location in
voltage.h as they are no longer dependent on PMICs and expect the
PMIC's conversion routines to set a cap if the voltage is out of
reach for the PMIC.
Reported-by: Jon Hunter jon-hun...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Vishwanath BS vishwanath...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_twl.c | 17 -
arch/arm/mach-omap2/voltage.h | 22 --
arch/arm/mach-omap2/vp.c |4 ++--
3 files changed, 22 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index f515a1a..df4e7c3 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -30,16 +30,6 @@
#define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04
#define OMAP3_VP_VLIMITTO_TIMEOUT_US 200
-#define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14
-#define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42
-#define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18
-#define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2c
-
-#define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18
-#define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3c
-#define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18
-#define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30
-
#define OMAP4_SRI2C_SLAVE_ADDR 0x12
#define OMAP4_VDD_MPU_SR_VOLT_REG 0x55
#define OMAP4_VDD_MPU_SR_CMD_REG 0x56
@@ -53,13 +43,6 @@
#define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04
#define OMAP4_VP_VLIMITTO_TIMEOUT_US 200
-#define OMAP4_VP_MPU_VLIMITTO_VDDMIN 0xA
-#define OMAP4_VP_MPU_VLIMITTO_VDDMAX 0x39
-#define OMAP4_VP_IVA_VLIMITTO_VDDMIN 0xA
-#define OMAP4_VP_IVA_VLIMITTO_VDDMAX 0x2D
-#define OMAP4_VP_CORE_VLIMITTO_VDDMIN 0xA
-#define OMAP4_VP_CORE_VLIMITTO_VDDMAX 0x28
-
static bool is_offset_valid;
static u8 smps_offset;
/*
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 7f4f99d..622ec4b 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -103,6 +103,24 @@ struct voltagedomain {
spinlock_t lock;
};
+/* Min and max voltages from OMAP perspective */
+#define OMAP3430_VP1_VLIMITTO_VDDMIN 85
+#define OMAP3430_VP1_VLIMITTO_VDDMAX 1425000
+#define OMAP3430_VP2_VLIMITTO_VDDMIN 90
+#define OMAP3430_VP2_VLIMITTO_VDDMAX 115
+
+#define OMAP3630_VP1_VLIMITTO_VDDMIN 90
+#define OMAP3630_VP1_VLIMITTO_VDDMAX 135
+#define OMAP3630_VP2_VLIMITTO_VDDMIN 90
+#define OMAP3630_VP2_VLIMITTO_VDDMAX 120
+
+#define OMAP4_VP_MPU_VLIMITTO_VDDMIN 83
+#define OMAP4_VP_MPU_VLIMITTO_VDDMAX 141
+#define OMAP4_VP_IVA_VLIMITTO_VDDMIN 83
+#define OMAP4_VP_IVA_VLIMITTO_VDDMAX 126
+#define OMAP4_VP_CORE_VLIMITTO_VDDMIN 83
+#define OMAP4_VP_CORE_VLIMITTO_VDDMAX 120
+
/**
* struct omap_voltdm_pmic - PMIC specific data required by voltage driver.
* @slew_rate: PMIC slew rate (in uv/us)
@@ -129,8 +147,8 @@ struct omap_voltdm_pmic {
u8 vp_erroroffset;
u8 vp_vstepmin;
u8 vp_vstepmax;
- u8 vp_vddmin;
- u8 vp_vddmax;
+ u32 vp_vddmin;
+ u32 vp_vddmax;
u8 vp_timeout_us;
bool i2c_high_speed;
u8 i2c_mcode;
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index f95c1ba..40b3dcc 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -58,8 +58,8 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
sys_clk_rate = voltdm-sys_clk.rate / 1000;
timeout = (sys_clk_rate * voltdm-pmic-vp_timeout_us) / 1000;
- vddmin = voltdm-pmic-vp_vddmin;
- vddmax = voltdm-pmic-vp_vddmax;
+ vddmin = voltdm-pmic-uv_to_vsel(voltdm-pmic-vp_vddmin);
+ vddmax = voltdm-pmic-uv_to_vsel(voltdm-pmic-vp_vddmax);
waittime = DIV_ROUND_UP(voltdm-pmic-step_size * sys_clk_rate,
1000 * voltdm-pmic-slew_rate);
--
1.7.4.1
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[PATCHv7 02/21] ARM: OMAP: voltage: renamed vp_vddmin and vp_vddmax fields
These are now called vddmin and vddmax, as these fields will be used
globally for selecting voltage ranges for a pmic channel, and not
only for voltage processor.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_twl.c | 28 ++--
arch/arm/mach-omap2/voltage.h |4 ++--
arch/arm/mach-omap2/vp.c |4 ++--
3 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index df4e7c3..c38a530 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -149,8 +149,8 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = {
.vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP3_VP_VSTEPMIN_VSTEPMIN,
.vp_vstepmax= OMAP3_VP_VSTEPMAX_VSTEPMAX,
- .vp_vddmin = OMAP3430_VP1_VLIMITTO_VDDMIN,
- .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX,
+ .vddmin = OMAP3430_VP1_VLIMITTO_VDDMIN,
+ .vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
.volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG,
@@ -170,8 +170,8 @@ static struct omap_voltdm_pmic omap3_core_pmic = {
.vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP3_VP_VSTEPMIN_VSTEPMIN,
.vp_vstepmax= OMAP3_VP_VSTEPMAX_VSTEPMAX,
- .vp_vddmin = OMAP3430_VP2_VLIMITTO_VDDMIN,
- .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX,
+ .vddmin = OMAP3430_VP2_VLIMITTO_VDDMIN,
+ .vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
.volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG,
@@ -191,8 +191,8 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = {
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP4_VP_VSTEPMIN_VSTEPMIN,
.vp_vstepmax= OMAP4_VP_VSTEPMAX_VSTEPMAX,
- .vp_vddmin = OMAP4_VP_MPU_VLIMITTO_VDDMIN,
- .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX,
+ .vddmin = OMAP4_VP_MPU_VLIMITTO_VDDMIN,
+ .vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
.volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG,
@@ -213,8 +213,8 @@ static struct omap_voltdm_pmic omap4_iva_pmic = {
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP4_VP_VSTEPMIN_VSTEPMIN,
.vp_vstepmax= OMAP4_VP_VSTEPMAX_VSTEPMAX,
- .vp_vddmin = OMAP4_VP_IVA_VLIMITTO_VDDMIN,
- .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX,
+ .vddmin = OMAP4_VP_IVA_VLIMITTO_VDDMIN,
+ .vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
.volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG,
@@ -235,8 +235,8 @@ static struct omap_voltdm_pmic omap4_core_pmic = {
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP4_VP_VSTEPMIN_VSTEPMIN,
.vp_vstepmax= OMAP4_VP_VSTEPMAX_VSTEPMAX,
- .vp_vddmin = OMAP4_VP_CORE_VLIMITTO_VDDMIN,
- .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX,
+ .vddmin = OMAP4_VP_CORE_VLIMITTO_VDDMIN,
+ .vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
.volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG,
@@ -272,10 +272,10 @@ int __init omap3_twl_init(void)
return -ENODEV;
if (cpu_is_omap3630()) {
- omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN;
- omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;
- omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN;
- omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
+ omap3_mpu_pmic.vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN;
+ omap3_mpu_pmic.vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;
+ omap3_core_pmic.vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN;
+ omap3_core_pmic.vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
}
/*
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 622ec4b..2242735 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
[PATCHv7 03/21] ARM: OMAP3+: voltage: introduce omap vc / vp params for voltagedomains
These new structs will hold the sleep voltage levels (omap_vc_params)
and voltage processor min / max voltages (omap_vp_params.) Previously
these were part of the PMIC struct, but they do not really belong there,
as they are OMAP chip specific, not PMIC specific parameters. voltdm
code is also changed to use the new structs.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_twl.c| 20 --
arch/arm/mach-omap2/vc.c | 35 ++---
arch/arm/mach-omap2/vc.h |7 +
arch/arm/mach-omap2/vc3xxx_data.c | 22 +++
arch/arm/mach-omap2/vc44xx_data.c | 28
arch/arm/mach-omap2/voltage.h | 18 ++---
arch/arm/mach-omap2/voltagedomains3xxx_data.c |5 +++
arch/arm/mach-omap2/voltagedomains44xx_data.c |8 +
arch/arm/mach-omap2/vp.h |7 +
arch/arm/mach-omap2/vp3xxx_data.c | 10 +++
arch/arm/mach-omap2/vp44xx_data.c | 15 ++
11 files changed, 147 insertions(+), 28 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index c38a530..dca1d66 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -141,10 +141,6 @@ static u8 twl6030_uv_to_vsel(unsigned long uv)
static struct omap_voltdm_pmic omap3_mpu_pmic = {
.slew_rate = 4000,
.step_size = 12500,
- .on_volt= 120,
- .onlp_volt = 100,
- .ret_volt = 975000,
- .off_volt = 60,
.volt_setup_time= 0xfff,
.vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP3_VP_VSTEPMIN_VSTEPMIN,
@@ -162,10 +158,6 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = {
static struct omap_voltdm_pmic omap3_core_pmic = {
.slew_rate = 4000,
.step_size = 12500,
- .on_volt= 120,
- .onlp_volt = 100,
- .ret_volt = 975000,
- .off_volt = 60,
.volt_setup_time= 0xfff,
.vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP3_VP_VSTEPMIN_VSTEPMIN,
@@ -183,10 +175,6 @@ static struct omap_voltdm_pmic omap3_core_pmic = {
static struct omap_voltdm_pmic omap4_mpu_pmic = {
.slew_rate = 4000,
.step_size = 12660,
- .on_volt= 1375000,
- .onlp_volt = 1375000,
- .ret_volt = 83,
- .off_volt = 0,
.volt_setup_time= 0,
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP4_VP_VSTEPMIN_VSTEPMIN,
@@ -205,10 +193,6 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = {
static struct omap_voltdm_pmic omap4_iva_pmic = {
.slew_rate = 4000,
.step_size = 12660,
- .on_volt= 1188000,
- .onlp_volt = 1188000,
- .ret_volt = 83,
- .off_volt = 0,
.volt_setup_time= 0,
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP4_VP_VSTEPMIN_VSTEPMIN,
@@ -227,10 +211,6 @@ static struct omap_voltdm_pmic omap4_iva_pmic = {
static struct omap_voltdm_pmic omap4_core_pmic = {
.slew_rate = 4000,
.step_size = 12660,
- .on_volt= 120,
- .onlp_volt = 120,
- .ret_volt = 83,
- .off_volt = 0,
.volt_setup_time= 0,
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP4_VP_VSTEPMIN_VSTEPMIN,
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 84da34f..a1e0fd6 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -137,6 +137,8 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
vc_cmdval |= (*target_vsel vc-common-cmd_on_shift);
voltdm-write(vc_cmdval, vc-cmdval_reg);
+ voltdm-vc_param-on = target_volt;
+
omap_vp_update_errorgain(voltdm, target_volt);
return 0;
@@ -286,6 +288,30 @@ static void __init omap_vc_i2c_init(struct voltagedomain
*voltdm)
initialized = true;
}
+/**
+ * omap_vc_calc_vsel - calculate vsel value for a channel
+ * @voltdm: channel to calculate value for
+ * @uvolt: microvolt value to convert to vsel
+ *
+ * Converts a microvolt value to vsel value for the used PMIC.
+ * This checks whether the microvolt value is out of bounds, and
+ * adjusts the value accordingly. If unsupported value detected,
+ * warning is thrown.
+ */
+static u8 omap_vc_calc_vsel
