[PATCHv3 3/5] ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed property can be replaced to cap-sd/mmc-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_vt.dts|9 +++--
3 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi
b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 12d1c2c..468fc4c 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -29,13 +29,10 @@
dwmmc0@ff704000 {
num-slots = 1;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- };
+ bus-width = 4;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
sysmgr@ffd08000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index bf51182..1ee03c4 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -30,13 +30,10 @@
dwmmc0@ff704000 {
num-slots = 1;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- };
+ bus-width = 4;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff702000 {
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 09792b4..f9345e0 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -43,13 +43,10 @@
dwmmc0@ff704000 {
num-slots = 1;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- };
+ bus-width = 4;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff70 {
--
1.7.9.5
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[PATCHv3 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed property can be replaced to cap-sd/mmc-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
Reviewed-by: Heiko Stuebner he...@sntech.de
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index afb3273..ecea889 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -59,12 +59,8 @@
pinctrl-names = default;
pinctrl-0 = sd0_clk sd0_cmd sd0_cd sd0_bus4;
vmmc-supply = vcc_sd0;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- disable-wp;
- };
+ bus-width = 4;
+ disable-wp;
};
dwmmc@10218000 { /* wifi */
@@ -74,12 +70,8 @@
pinctrl-names = default;
pinctrl-0 = sd1_clk sd1_cmd sd1_bus4;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- disable-wp;
- };
+ bus-width = 4;
+ disable-wp;
};
gpio-keys {
--
1.7.9.5
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[PATCHv3 2/5] ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed property can be replaced to cap-sd/mmc-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
Tested-by: Sachin Kamat sachin.ka...@samsung.com
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++--
arch/arm/boot/dts/exynos4412-trats2.dts |8 ++--
arch/arm/boot/dts/exynos5250-arndale.dts | 18 +
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 +++--
arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 +
arch/arm/boot/dts/exynos5250-snow.dts |6 ++
arch/arm/boot/dts/exynos5260-xyref5260.dts| 18 +
arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 +
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 ---
arch/arm/boot/dts/exynos5420-peach-pit.dts| 16 ---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 ---
arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 ---
13 files changed, 51 insertions(+), 141 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts
b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 31db28a..778aec6 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -45,17 +45,13 @@
status = okay;
num-slots = 1;
- supports-highspeed;
broken-cd;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 2 3;
samsung,dw-mshc-ddr-timing = 1 2;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
+ bus-width = 8;
+ cap-mmc-highspeed;
};
regulator_p3v3 {
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index e925c9f..de15114 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -137,17 +137,13 @@
status = okay;
num-slots = 1;
- supports-highspeed;
broken-cd;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 2 3;
samsung,dw-mshc-ddr-timing = 1 2;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
+ bus-width = 8;
+ cap-mmc-highspeed;
};
codec@1340 {
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 7787844..65ab885 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -520,7 +520,6 @@
mmc@1255 {
num-slots = 1;
- supports-highspeed;
broken-cd;
non-removable;
card-detect-delay = 200;
@@ -532,11 +531,8 @@
pinctrl-0 = sd4_clk sd4_cmd sd4_bus4 sd4_bus8;
pinctrl-names = default;
status = okay;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
+ bus-width = 8;
+ cap-mmc-highspeed;
};
serial@1380 {
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index d0de1f5..42a3590 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -401,7 +401,6 @@
mmc_0: mmc@1220 {
status = okay;
num-slots = 1;
- supports-highspeed;
broken-cd;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
@@ -410,17 +409,13 @@
vmmc-supply = mmc_reg;
pinctrl-names = default;
pinctrl-0 = sd0_clk sd0_cmd sd0_bus4 sd0_bus8;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
+ bus-width = 8;
+ cap-mmc-highspeed;
};
mmc_2: mmc@1222 {
status = okay;
num-slots = 1;
- supports-highspeed;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 2 3;
@@ -428,12 +423,9 @@
vmmc-supply = mmc_reg;
pinctrl-names = default;
[PATCHv3 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk
Replaced the disable-wp into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
---
drivers/mmc/host/dw_mmc.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c..a3ccd07 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -997,7 +997,7 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
int gpio_ro = mmc_gpio_get_ro(mmc);
/* Use platform get_ro function, else try on board write protect */
- if (slot-quirks DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
+ if (slot-host-quirks DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
read_only = 0;
else if (!IS_ERR_VALUE(gpio_ro))
read_only = gpio_ro;
@@ -2006,12 +2006,7 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
static struct dw_mci_of_slot_quirks {
char *quirk;
int id;
-} of_slot_quirks[] = {
- {
- .quirk = disable-wp,
- .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
- },
-};
+} of_slot_quirks[] = {};
static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot)
{
@@ -2238,6 +2233,9 @@ static struct dw_mci_of_quirks {
{
.quirk = broken-cd,
.id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
+ },{
+ .quirk = disable-wp,
+ .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
},
};
--
1.7.9.5
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[PATCHv3 0/5] ARM: remove the sub-node and deprecated supports-highspeed property for dwmmc.
Since used the mmc_of_parse(), didn't parse the sub-node. So we can remove the sub-node, because almost SoC used the only one card per a host. And supports-highspeed can be replaced to cap-mmc/sd-highspeed property. Changelog V3: - Fix the wrong bus-width value. - Use the slot-host-quirks instead of brq-quirks. - Add tested-by and reviewd-by. Changelog V2: - Add the mmc: dw_mmc: replace disable-wp from slot's quirks to host's quirk Jaehoon Chung (5): mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 - .../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 - .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 - arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++ arch/arm/boot/dts/exynos4412-origen.dts|8 ++ arch/arm/boot/dts/exynos4412-trats2.dts|8 ++ arch/arm/boot/dts/exynos5250-arndale.dts | 18 -- arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 ++-- arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 -- arch/arm/boot/dts/exynos5250-snow.dts |6 ++--- arch/arm/boot/dts/exynos5260-xyref5260.dts | 18 -- arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 -- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 +++- arch/arm/boot/dts/exynos5420-peach-pit.dts | 16 +++- arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 +++- arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 +++- arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16 +++- arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++ arch/arm/boot/dts/socfpga_cyclone5.dtsi|9 +++ arch/arm/boot/dts/socfpga_vt.dts |9 +++ drivers/mmc/host/dw_mmc.c | 12 - 21 files changed, 84 insertions(+), 204 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/3] regulator: s2mpa01: Optimize the regulator description macro
On Thu, 10 Jul 2014, amit daniel kachhap wrote:
Adding MFD maintainers.
Why, what for?
On Tue, Jul 8, 2014 at 5:57 PM, Amit Daniel Kachhap
amit.dan...@samsung.com wrote:
This patch makes the regulator description macro take minimum and
steps voltage as parameter. In this way many repeated macros can be
removed. Now these macros are repeated only if the the LDO/BUCK ctrl
registers have non-linear positions. The good thing is these ctrl registers
are mostly linear so they are not passed as parameters.
This patch reduces the code size and also allow easy addition of more
s2mpxxx PMIC drivers which differs a lot in minimum/step voltages.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
drivers/regulator/s2mpa01.c | 136
1 file changed, 37 insertions(+), 99 deletions(-)
diff --git a/drivers/regulator/s2mpa01.c b/drivers/regulator/s2mpa01.c
index 962c5f1..8073466 100644
--- a/drivers/regulator/s2mpa01.c
+++ b/drivers/regulator/s2mpa01.c
@@ -235,28 +235,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
.set_ramp_delay = s2mpa01_set_ramp_delay,
};
-#define regulator_desc_ldo1(num) { \
+#define regulator_desc_ldo(num, min, step) { \
.name = LDO#num,\
.id = S2MPA01_LDO##num, \
.ops= s2mpa01_ldo_ops, \
.type = REGULATOR_VOLTAGE,\
.owner = THIS_MODULE, \
- .min_uV = MIN_800_MV, \
- .uV_step= STEP_50_MV, \
- .n_voltages = S2MPA01_LDO_N_VOLTAGES, \
- .vsel_reg = S2MPA01_REG_L1CTRL + num - 1, \
- .vsel_mask = S2MPA01_LDO_VSEL_MASK,\
- .enable_reg = S2MPA01_REG_L1CTRL + num - 1, \
- .enable_mask= S2MPA01_ENABLE_MASK \
-}
-#define regulator_desc_ldo2(num) { \
- .name = LDO#num,\
- .id = S2MPA01_LDO##num, \
- .ops= s2mpa01_ldo_ops, \
- .type = REGULATOR_VOLTAGE,\
- .owner = THIS_MODULE, \
- .min_uV = MIN_800_MV, \
- .uV_step= STEP_25_MV, \
+ .min_uV = min, \
+ .uV_step= step, \
.n_voltages = S2MPA01_LDO_N_VOLTAGES, \
.vsel_reg = S2MPA01_REG_L1CTRL + num - 1, \
.vsel_mask = S2MPA01_LDO_VSEL_MASK,\
@@ -296,14 +282,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
.enable_mask= S2MPA01_ENABLE_MASK \
}
-#define regulator_desc_buck6_7(num){ \
+#define regulator_desc_buck6_10(num, min, step){ \
.name = BUCK#num, \
.id = S2MPA01_BUCK##num,\
.ops= s2mpa01_buck_ops,\
.type = REGULATOR_VOLTAGE,\
.owner = THIS_MODULE, \
- .min_uV = MIN_600_MV, \
- .uV_step= STEP_6_25_MV, \
+ .min_uV = min, \
+ .uV_step= step, \
.n_voltages = S2MPA01_BUCK_N_VOLTAGES, \
.ramp_delay = S2MPA01_RAMP_DELAY, \
.vsel_reg = S2MPA01_REG_B6CTRL2 + (num - 6) * 2, \
@@ -312,91 +298,43 @@ static struct regulator_ops s2mpa01_buck_ops = {
.enable_mask= S2MPA01_ENABLE_MASK \
}
-#define regulator_desc_buck8 { \
- .name = BUCK8, \
- .id = S2MPA01_BUCK8,\
- .ops= s2mpa01_buck_ops,\
- .type = REGULATOR_VOLTAGE,\
- .owner = THIS_MODULE, \
- .min_uV = MIN_800_MV, \
- .uV_step= STEP_12_5_MV, \
- .n_voltages = S2MPA01_BUCK_N_VOLTAGES, \
- .ramp_delay = S2MPA01_RAMP_DELAY, \
- .vsel_reg = S2MPA01_REG_B8CTRL2, \
- .vsel_mask = S2MPA01_BUCK_VSEL_MASK, \
- .enable_reg = S2MPA01_REG_B8CTRL1, \
- .enable_mask= S2MPA01_ENABLE_MASK
Re: [PATCH v5 05/14] drm/exynos: dsi: add pass TE host ops to support LCD I80 interface
On Thu, Jul 10, 2014 at 10:06:07AM +0900, YoungJun Cho wrote:
On 07/10/2014 12:22 AM, Thierry Reding wrote:
On Tue, Jul 08, 2014 at 09:39:38AM +0900, YoungJun Cho wrote:
To support LCD I80 interface, the DSI host calls this function
to notify the panel tearing effect synchronization signal to
the CRTC device manager to trigger to transfer video image.
Signed-off-by: YoungJun Cho yj44@samsung.com
Acked-by: Inki Dae inki@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 11 +++
include/drm/drm_mipi_dsi.h | 7 +++
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index dad543a..76e34ca 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -24,6 +24,7 @@
#include video/mipi_display.h
#include video/videomode.h
+#include exynos_drm_crtc.h
#include exynos_drm_drv.h
/* returns true iff both arguments logically differs */
@@ -1041,10 +1042,20 @@ static ssize_t exynos_dsi_host_transfer(struct
mipi_dsi_host *host,
return (ret 0) ? ret : xfer.rx_done;
}
+static void exynos_dsi_host_pass_te(struct mipi_dsi_host *host)
+{
+ struct exynos_dsi *dsi = host_to_dsi(host);
+ struct drm_encoder *encoder = dsi-encoder;
+
+ if (dsi-state DSIM_STATE_ENABLED)
+ exynos_drm_crtc_te_handler(encoder-crtc);
+}
+
static const struct mipi_dsi_host_ops exynos_dsi_ops = {
.attach = exynos_dsi_host_attach,
.detach = exynos_dsi_host_detach,
.transfer = exynos_dsi_host_transfer,
+ .pass_te = exynos_dsi_host_pass_te,
};
static int exynos_dsi_poweron(struct exynos_dsi *dsi)
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 944f33f..3f21bea 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -49,6 +49,12 @@ struct mipi_dsi_msg {
* @detach: detach DSI device from DSI host
* @transfer: send and/or receive DSI packet, return number of received
bytes,
* or error
+ * @pass_te: call the crtc te_handler() callback from DSI host.
+ * The panel generates tearing effect synchronization signal between
+ * MCU and FB to display video images. And the display controller
+ * should trigger to transfer video image at this signal. So the panel
+ * receives the TE IRQ, then calls this function to notify it to the
+ * display controller.
*/
struct mipi_dsi_host_ops {
int (*attach)(struct mipi_dsi_host *host,
@@ -57,6 +63,7 @@ struct mipi_dsi_host_ops {
struct mipi_dsi_device *dsi);
ssize_t (*transfer)(struct mipi_dsi_host *host,
struct mipi_dsi_msg *msg);
+ void (*pass_te)(struct mipi_dsi_host *host);
I've objected to this particular change before and that objection still
stands. I don't see how this is related to DSI. It seems like an
implementation detail of this particular setup and I think it should be
handled differently (within the Exynos DSI controller implementation
possibly).
Okay, I understand what you mean.
As you know, this function is called by panel TE interrupt handler, so it
could be accessed by panel.
Do you have any good idea for panel to access exynos_drm_dsi directly
without mipi_dis_host_ops?
I've gone through the DSI specification again and the only mention of
the tearing effect is in section 8.12 TE Signaling in DSI. That says
the following:
A Command Mode display module has its own timing controller and
local frame buffer for display refresh. In some cases the host
processor needs to be notified of timing events on the display
module, e.g. the start of vertical blanking or similar timing
information. In a traditional parallel-bus interface like DBI-2,
a dedicated signal wire labeled TE (Tearing Effect) is provided
to convey such timing information to the host processor. In a
DSI system, the same information, with reasonably low latency,
shall be transmitted from the display module to the host
processor when requested, using the bidirectional Data Lane.
My interpretation of that is that a DSI peripheral doesn't have a
dedicated TE signal. Now the panel that you want to support here seems
to have one, so I'm wondering if maybe it isn't a DSI panel at all but
rather DBI.
The specification goes into further detail about how to perform the TE
reporting in DSI. Essentially it consists of giving the peripheral
control of the bus via a BTA and then waiting for the peripheral to
report back with the TE event.
It would really help if somebody could find a datasheet for the panel so
that we don't have to keep guessing what the actual interface is and how
it's supposed to work.
Thierry
pgpOFT2MUuHln.pgp
Description: PGP signature
Re: [PATCH v3 3/4] ARM: EXYNOS: cpuidle: add secure firmware support to AFTR mode code
On 09.07.2014 19:17, Bartlomiej Zolnierkiewicz wrote:
* Move cp15 registers saving to exynos_save_cp15() helper and add
additional helper usage to do_idle firmware method.
* Use sysram_ns_base_addr + 0x24/0x20 addresses instead of the default
ones used by exynos_cpu_set_boot_vector() on boards with secure
firmware enabled.
* Use do_idle firmware method instead of cpu_do_idle() on boards with
secure firmware enabled.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
v3:
- make exynos_enter_aftr() return a value
- add cp15 registers handling to do_idle firmware method
- set sysram_ns_base_addr + 0x24/0x20 in do_idle firmware method
- move calling of do_idle firmware method from cpuidle-exynos.c
to pm.c
arch/arm/mach-exynos/common.h| 2 +-
arch/arm/mach-exynos/firmware.c | 26 ++
arch/arm/mach-exynos/pm.c| 11 +--
drivers/cpuidle/cpuidle-exynos.c | 6 +++---
4 files changed, 31 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index a6a200f..0829808 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -170,7 +170,7 @@ extern int exynos_cpu_power_state(int cpu);
extern void exynos_cluster_power_down(int cluster);
extern void exynos_cluster_power_up(int cluster);
extern int exynos_cluster_power_state(int cluster);
-extern void exynos_enter_aftr(void);
+extern int exynos_enter_aftr(void);
extern void s5p_init_cpu(void __iomem *cpuid_addr);
extern unsigned int samsung_rev(void);
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 53fbf5c..163f5b9 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -24,13 +24,30 @@
#include smc.h
#define EXYNOS_SLEEP_MAGIC0x0bad
+#define EXYNOS_AFTR_MAGIC 0xfcba0d10
#define EXYNOS_BOOT_ADDR 0x8
#define EXYNOS_BOOT_FLAG 0xc
+/* For Cortex-A9 Diagnostic and Power control register */
+static unsigned int cp15_power;
+static unsigned int cp15_diag;
+
+static void exynos_save_cp15(void)
+{
+ /* Save Power control and Diagnostic registers */
+ asm (mrc p15, 0, %0, c15, c0, 0\n
+mrc p15, 0, %1, c15, c0, 1\n
+ : =r (cp15_power), =r (cp15_diag) : : cc);
Hi,
On Exynos3250 I encounter Oops - undefined instruction on this asm
while entering AFTR:
[2.277946] CPUidle CPU1: going off
[2.278110] CPUidle CPU0: going AFTR
[2.279478] Internal error: Oops - undefined instruction: 0 [#1]
PREEMPT SMP ARM
Are you sure it should be called on each SoC?
Full dmesg attached.
Best regards,
Krzysztof
+}
+
static int exynos_do_idle(unsigned long mode)
{
switch (mode) {
case FW_DO_IDLE_AFTR:
+ exynos_save_cp15();
+ __raw_writel(virt_to_phys(exynos_cpu_resume),
+sysram_ns_base_addr + 0x24);
+ __raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20);
exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0);
break;
case FW_DO_IDLE_SLEEP:
@@ -76,10 +93,6 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long
boot_addr)
return 0;
}
-/* For Cortex-A9 Diagnostic and Power control register */
-static unsigned int cp15_power;
-static unsigned int cp15_diag;
-
static int exynos_cpu_suspend(unsigned long arg)
{
flush_cache_all();
@@ -94,10 +107,7 @@ static int exynos_cpu_suspend(unsigned long arg)
static int exynos_suspend(void)
{
- /* Save Power control and Diagnostic registers */
- asm (mrc p15, 0, %0, c15, c0, 0\n
- mrc p15, 0, %1, c15, c0, 1\n
- : =r (cp15_power), =r (cp15_diag) : : cc);
+ exynos_save_cp15();
writel(EXYNOS_SLEEP_MAGIC, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
writel(virt_to_phys(cpu_resume),
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index c722454..af0d4bf 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -201,12 +201,19 @@ static void exynos_cpu_set_boot_vector(long flags)
__raw_writel(flags, exynos_boot_vector_flag());
}
-void exynos_enter_aftr(void)
+int exynos_enter_aftr(void)
{
+ int ret;
+
exynos_set_wakeupmask(0xff3e);
- exynos_cpu_set_boot_vector(S5P_CHECK_AFTR);
/* Set value of power down register for aftr mode */
exynos_sys_powerdown_conf(SYS_AFTR);
+
+ ret = call_firmware_op(do_idle, FW_DO_IDLE_AFTR);
+ if (ret == -ENOSYS)
+ exynos_cpu_set_boot_vector(S5P_CHECK_AFTR);
+
+ return ret;
}
/* For Cortex-A9 Diagnostic and Power control register */
diff --git a/drivers/cpuidle/cpuidle-exynos.c b/drivers/cpuidle/cpuidle-exynos.c
index 7c01512..c5b36d3 100644
--- a/drivers/cpuidle/cpuidle-exynos.c
+++ b/drivers/cpuidle/cpuidle-exynos.c
@@ -18,12 +18,12
Re: [PATCHv3 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk
Hi, Ulf.
On 07/10/2014 06:15 PM, Ulf Hansson wrote:
On 10 July 2014 09:08, Jaehoon Chung jh80.ch...@samsung.com wrote:
Replaced the disable-wp into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Hi Jaehoon,
I plan to carry these patches through my mmc tree and I will share
them through a PR from an immutable branch with the ARM SoC guys.
Please tell me if you have any concern with this set up.
Now, while I was applying this patch, I found it had checkpatch
errors. Please run checkpatch and resend a new version.
Sorry for not checking the patch. I will resend a new version.
Thanks for pointing out.
Best Regards,
Jaehoon Chung
Kind regards
Uffe
---
drivers/mmc/host/dw_mmc.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c..a3ccd07 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -997,7 +997,7 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
int gpio_ro = mmc_gpio_get_ro(mmc);
/* Use platform get_ro function, else try on board write protect */
- if (slot-quirks DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
+ if (slot-host-quirks DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
read_only = 0;
else if (!IS_ERR_VALUE(gpio_ro))
read_only = gpio_ro;
@@ -2006,12 +2006,7 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
static struct dw_mci_of_slot_quirks {
char *quirk;
int id;
-} of_slot_quirks[] = {
- {
- .quirk = disable-wp,
- .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
- },
-};
+} of_slot_quirks[] = {};
static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot)
{
@@ -2238,6 +2233,9 @@ static struct dw_mci_of_quirks {
{
.quirk = broken-cd,
.id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
+ },{
+ .quirk = disable-wp,
+ .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
},
};
--
1.7.9.5
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Re: [PATCH v7 08/24] mfd: max77686: Add Dynamic Voltage Scaling (DVS) support
On Fri, Jul 4, 2014 at 10:24 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Some regulators on the MAX77686 PMIC have Dynamic Voltage Scaling
(DVS) support that allows output voltage to change dynamically.
For MAX77686, these regulators are Buck regulators 2, 3 and 4.
Each Buck output voltage is selected using a set of external
inputs: DVS1-3 and SELB2-4.
DVS registers can be used to configure the output voltages for each
Buck regulator and which one is active is controled by DVSx lines.
SELBx lines are used to control if individual Buck lines are ON or OFF.
This patch adds support to configure the DVSx and SELBx lines
from DT and to setup and read the GPIO lines connected to them.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
(...)
+#include linux/gpio/consumer.h
THANKS for using modern interfaces!
+static void max77686_dt_parse_dvs_gpio(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int i;
+
+ /*
+* NOTE: we don't consider GPIO errors fatal; board may have some
lines
+* directly pulled high or low and thus doesn't specify them.
+*/
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++)
+ pd-buck_gpio_dvs[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-dvs,
i);
+
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++)
+ pd-buck_gpio_selb[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-selb,
i);
+}
Rob Jones has a patch cooking that adds gpio_get_array() so this thing
merits also adding devm_gpiod_get_array() I think?
+/**
+ * max77686_setup_gpios() - init DVS-related GPIOs
+ * @dev: device whose platform data contains the dvs GPIOs information
+ *
+ * This function claims / initalizations GPIOs related to DVS if they are
+ * defined. This may have the effect of switching voltages if the
+ * pdata-buck_default_idx does not match the boot time state of pins.
+ */
+int max77686_setup_gpios(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int buck_default_idx = pd-buck_default_idx;
+ int ret;
+ int i;
+
+ /* Set all SELB high to avoid glitching while DVS is changing */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+ /* OK if some GPIOs aren't defined */
+ if (IS_ERR(gpio))
+ continue;
+
+ ret = gpiod_direction_output_raw(gpio, 1);
Why does this have to be raw? Usually that is not to be used.
Apart from this it looks OK.
Yours,
Linus Walleij
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[PATCHv4 1/5] mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
Almost Soc is used the slot per a host.
Don't use the slot-node and deprecated the supports-highsped property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
Tested-by: Sachin Kamat sachin.ka...@samsung.com
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 +
.../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 +---
.../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 +---
3 files changed, 15 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 532b1d4..9308325 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -46,13 +46,14 @@ Required Properties:
- if CIU clock divider value is 0 (that is divide by 1), both tx and rx
phase shift clocks should be 0.
-Required properties for a slot:
+Required properties for a slot (Deprecated - Recommend to use one slot per a
host):
* gpios: specifies a list of gpios used for command, clock and data bus. The
first gpio is the command line and the second gpio is the clock line. The
rest of the gpios (depending on the bus-width property) are the data lines in
no particular order. The format of the gpio specifier depends on the gpio
controller.
+ (Deprecated - Refer to
Documentaion/devicetree/binding/pinctrl/samsung-pinctrl.txt)
Example:
@@ -69,21 +70,13 @@ Example:
dwmmc0@1220 {
num-slots = 1;
- supports-highspeed;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
broken-cd;
fifo-depth = 0x80;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 2 3;
samsung,dw-mshc-ddr-timing = 1 2;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- gpios = gpc0 0 2 0 3, gpc0 1 2 0 3,
- gpc1 0 2 3 3, gpc1 1 2 3 3,
- gpc1 2 2 3 3, gpc1 3 2 3 3,
- gpc0 3 2 3 3, gpc0 4 2 3 3,
- gpc0 5 2 3 3, gpc0 6 2 3 3;
- };
+ bus-width = 8;
};
diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
index e5bc49f..3b35449 100644
--- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
@@ -34,13 +34,11 @@ Example:
num-slots = 1;
vmmc-supply = ldo12;
fifo-depth = 0x100;
- supports-highspeed;
pinctrl-names = default;
pinctrl-0 = sd_pmx_pins sd_cfg_func1 sd_cfg_func2;
- slot@0 {
- reg = 0;
- bus-width = 4;
- disable-wp;
- cd-gpios = gpio10 3 0;
- };
+ bus-width = 4;
+ disable-wp;
+ cd-gpios = gpio10 3 0;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 2d4a725..346c609 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -67,7 +67,8 @@ Optional properties:
* card-detect-delay: Delay in milli-seconds before detecting card after card
insert event. The default value is 0.
-* supports-highspeed: Enables support for high speed cards (up to 50MHz)
+* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to
50MHz)
+ (use cap-mmc-highspeed or cap-sd-highspeed
instead)
* broken-cd: as documented in mmc core bindings.
@@ -98,14 +99,11 @@ board specific portions as listed below.
clock-frequency = 4;
clock-freq-min-max = 40 2;
num-slots = 1;
- supports-highspeed;
broken-cd;
fifo-depth = 0x80;
card-detect-delay = 200;
vmmc-supply = buck8;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
+ bus-width = 8;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
--
1.7.9.5
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[PATCHv4 0/5] ARM: remove the sub-node and deprecated supports-highspeed property for dwmmc.
Since used the mmc_of_parse(), didn't parse the sub-node. So we can remove the sub-node, because almost SoC used the only one card per a host. And supports-highspeed can be replaced to cap-mmc/sd-highspeed property. Changelog V4: - Fix the checkpatch error. Changelog V3: - Fix the wrong bus-width value. - Use the slot-host-quirks instead of brq-quirks. - Add tested-by and reviewd-by. Changelog V2: - Add the mmc: dw_mmc: replace disable-wp from slot's quirks to host's quirk Jaehoon Chung (5): mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 - .../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 - .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 - arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++ arch/arm/boot/dts/exynos4412-origen.dts|8 ++ arch/arm/boot/dts/exynos4412-trats2.dts|8 ++ arch/arm/boot/dts/exynos5250-arndale.dts | 18 -- arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 ++-- arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 -- arch/arm/boot/dts/exynos5250-snow.dts |6 ++--- arch/arm/boot/dts/exynos5260-xyref5260.dts | 18 -- arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 -- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 +++- arch/arm/boot/dts/exynos5420-peach-pit.dts | 16 +++- arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 +++- arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 +++- arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16 +++- arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++ arch/arm/boot/dts/socfpga_cyclone5.dtsi|9 +++ arch/arm/boot/dts/socfpga_vt.dts |9 +++ drivers/mmc/host/dw_mmc.c | 12 - 21 files changed, 84 insertions(+), 204 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv4 3/5] ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed property can be replaced to cap-sd/mmc-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_vt.dts|9 +++--
3 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi
b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 12d1c2c..468fc4c 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -29,13 +29,10 @@
dwmmc0@ff704000 {
num-slots = 1;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- };
+ bus-width = 4;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
sysmgr@ffd08000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index bf51182..1ee03c4 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -30,13 +30,10 @@
dwmmc0@ff704000 {
num-slots = 1;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- };
+ bus-width = 4;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff702000 {
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 09792b4..f9345e0 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -43,13 +43,10 @@
dwmmc0@ff704000 {
num-slots = 1;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- };
+ bus-width = 4;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff70 {
--
1.7.9.5
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[PATCHv4 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk
Replaced the disable-wp into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
---
drivers/mmc/host/dw_mmc.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c..aa29dc4 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -997,7 +997,7 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
int gpio_ro = mmc_gpio_get_ro(mmc);
/* Use platform get_ro function, else try on board write protect */
- if (slot-quirks DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
+ if (slot-host-quirks DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
read_only = 0;
else if (!IS_ERR_VALUE(gpio_ro))
read_only = gpio_ro;
@@ -2006,12 +2006,7 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
static struct dw_mci_of_slot_quirks {
char *quirk;
int id;
-} of_slot_quirks[] = {
- {
- .quirk = disable-wp,
- .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
- },
-};
+} of_slot_quirks[] = {};
static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot)
{
@@ -2238,6 +2233,9 @@ static struct dw_mci_of_quirks {
{
.quirk = broken-cd,
.id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
+ }, {
+ .quirk = disable-wp,
+ .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
},
};
--
1.7.9.5
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[PATCHv4 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed property can be replaced to cap-sd/mmc-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
Reviewed-by: Heiko Stuebner he...@sntech.de
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index afb3273..ecea889 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -59,12 +59,8 @@
pinctrl-names = default;
pinctrl-0 = sd0_clk sd0_cmd sd0_cd sd0_bus4;
vmmc-supply = vcc_sd0;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- disable-wp;
- };
+ bus-width = 4;
+ disable-wp;
};
dwmmc@10218000 { /* wifi */
@@ -74,12 +70,8 @@
pinctrl-names = default;
pinctrl-0 = sd1_clk sd1_cmd sd1_bus4;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- disable-wp;
- };
+ bus-width = 4;
+ disable-wp;
};
gpio-keys {
--
1.7.9.5
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Re: [PATCH v7 08/24] mfd: max77686: Add Dynamic Voltage Scaling (DVS) support
On Sat, Jul 5, 2014 at 1:54 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Some regulators on the MAX77686 PMIC have Dynamic Voltage Scaling
(DVS) support that allows output voltage to change dynamically.
For MAX77686, these regulators are Buck regulators 2, 3 and 4.
Each Buck output voltage is selected using a set of external
inputs: DVS1-3 and SELB2-4.
DVS registers can be used to configure the output voltages for each
Buck regulator and which one is active is controled by DVSx lines.
SELBx lines are used to control if individual Buck lines are ON or OFF.
This patch adds support to configure the DVSx and SELBx lines
from DT and to setup and read the GPIO lines connected to them.
The entire series looks nice. Few minor comments from my side. I guess
still one more version in needed as per other ppls comment.
You may add,
Reviewed-by: Amit Daniel Kachhap amit.dan...@samsung.com
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes since v6:
- Add a comment that max77686_read_gpios() function can sleep.
Sugggested by Krzysztof Kozlowski
---
drivers/mfd/max77686.c | 119
+++
include/linux/mfd/max77686.h | 18 ---
2 files changed, 129 insertions(+), 8 deletions(-)
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 8650832..d193873 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -32,8 +32,10 @@
#include linux/mfd/core.h
#include linux/mfd/max77686.h
#include linux/mfd/max77686-private.h
+#include linux/gpio/consumer.h
#include linux/err.h
#include linux/of.h
+#include linux/export.h
#define I2C_ADDR_RTC (0x0C 1)
@@ -101,9 +103,119 @@ static const struct of_device_id
max77686_pmic_dt_match[] = {
{},
};
+static void max77686_dt_parse_dvs_gpio(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int i;
+
+ /*
+* NOTE: we don't consider GPIO errors fatal; board may have some
lines
+* directly pulled high or low and thus doesn't specify them.
+*/
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++)
+ pd-buck_gpio_dvs[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-dvs,
i);
+
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++)
+ pd-buck_gpio_selb[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-selb,
i);
+}
+
+/**
+ * max77686_setup_gpios() - init DVS-related GPIOs
+ * @dev: device whose platform data contains the dvs GPIOs information
+ *
+ * This function claims / initalizations GPIOs related to DVS if they are
+ * defined. This may have the effect of switching voltages if the
+ * pdata-buck_default_idx does not match the boot time state of pins.
+ */
+int max77686_setup_gpios(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int buck_default_idx = pd-buck_default_idx;
+ int ret;
+ int i;
+
+ /* Set all SELB high to avoid glitching while DVS is changing */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+ /* OK if some GPIOs aren't defined */
+ if (IS_ERR(gpio))
+ continue;
+
+ ret = gpiod_direction_output_raw(gpio, 1);
+ if (ret) {
+ dev_err(dev, can't set gpio[%d] dir: %d\n, i, ret);
+ return ret;
+ }
+ }
+
+ /* Set our initial setting */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_dvs[i];
+
+ /* OK if some GPIOs aren't defined */
+ if (IS_ERR(gpio))
+ continue;
+
+ /* If a GPIO is valid, set it */
+ gpiod_direction_output(gpio, (buck_default_idx i) 1);
+ if (ret) {
+ dev_err(dev, can't set gpio[%d]: dir %d\n, i, ret);
+ return ret;
+ }
+ }
+
+ /* Now set SELB low to take effect */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+ if (!IS_ERR(gpio))
+ gpiod_set_value(gpio, 0);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(max77686_setup_gpios);
+
+/**
+ * max77686_read_gpios() - read the current state of the dvs GPIOs
+ * @pdata: platform data that contains the dvs GPIOs information
+ *
+ * We call this function at bootup to detect what slot the firmware was
+ * using for the DVS GPIOs. That way we can properly preserve the firmware's
+ * voltage settings
+ *
Re: [PATCH v3 3/4] ARM: EXYNOS: cpuidle: add secure firmware support to AFTR mode code
Hi,
On Thursday, July 10, 2014 10:27:10 AM Krzysztof Kozlowski wrote:
On 09.07.2014 19:17, Bartlomiej Zolnierkiewicz wrote:
* Move cp15 registers saving to exynos_save_cp15() helper and add
additional helper usage to do_idle firmware method.
* Use sysram_ns_base_addr + 0x24/0x20 addresses instead of the default
ones used by exynos_cpu_set_boot_vector() on boards with secure
firmware enabled.
* Use do_idle firmware method instead of cpu_do_idle() on boards with
secure firmware enabled.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
v3:
- make exynos_enter_aftr() return a value
- add cp15 registers handling to do_idle firmware method
- set sysram_ns_base_addr + 0x24/0x20 in do_idle firmware method
- move calling of do_idle firmware method from cpuidle-exynos.c
to pm.c
arch/arm/mach-exynos/common.h| 2 +-
arch/arm/mach-exynos/firmware.c | 26 ++
arch/arm/mach-exynos/pm.c| 11 +--
drivers/cpuidle/cpuidle-exynos.c | 6 +++---
4 files changed, 31 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index a6a200f..0829808 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -170,7 +170,7 @@ extern int exynos_cpu_power_state(int cpu);
extern void exynos_cluster_power_down(int cluster);
extern void exynos_cluster_power_up(int cluster);
extern int exynos_cluster_power_state(int cluster);
-extern void exynos_enter_aftr(void);
+extern int exynos_enter_aftr(void);
extern void s5p_init_cpu(void __iomem *cpuid_addr);
extern unsigned int samsung_rev(void);
diff --git a/arch/arm/mach-exynos/firmware.c
b/arch/arm/mach-exynos/firmware.c
index 53fbf5c..163f5b9 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -24,13 +24,30 @@
#include smc.h
#define EXYNOS_SLEEP_MAGIC0x0bad
+#define EXYNOS_AFTR_MAGIC 0xfcba0d10
#define EXYNOS_BOOT_ADDR 0x8
#define EXYNOS_BOOT_FLAG 0xc
+/* For Cortex-A9 Diagnostic and Power control register */
+static unsigned int cp15_power;
+static unsigned int cp15_diag;
+
+static void exynos_save_cp15(void)
+{
+ /* Save Power control and Diagnostic registers */
+ asm (mrc p15, 0, %0, c15, c0, 0\n
+mrc p15, 0, %1, c15, c0, 1\n
+ : =r (cp15_power), =r (cp15_diag) : : cc);
Hi,
On Exynos3250 I encounter Oops - undefined instruction on this asm
while entering AFTR:
[2.277946] CPUidle CPU1: going off
[2.278110] CPUidle CPU0: going AFTR
[2.279478] Internal error: Oops - undefined instruction: 0 [#1]
PREEMPT SMP ARM
Are you sure it should be called on each SoC?
This should not be called on Exynos3250 (Cortex A7) but this is not
an issue currently with upstream since:
- Exynos3250 cpuidle support is disabled in Tomasz's earlier patch
- Exynos3250 need other patches (i.e. PMU support) to make cpuidle
work in upstream kernel anyway
- there is no support for any Exynos3250 board in upstream yet
Please also note that corresponding code for cp15 registers restore
needs also to be disabled for Cortex A7 and it is not present in
Tomasz's firmware patches yet. He is going to fix his patches to
check for Cortex A9 before restoring registers. Once it is done
I'll rebase my patches and also add Cortex A9 checking to cp15
registers saving code.
When it comes to our internal tree (that you posted log from)
please fix it with adding Cortex A9 check:
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9) to
cp15 registers saving/restoring code.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung RD Institute Poland
Samsung Electronics
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Re: [PATCH v6 15/23] regulator: max77686: Setup DVS-related GPIOs on probe
On Fri, Jul 4, 2014 at 3:25 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
MAX77686 PMIC support Dyamic Voltage Scaling (DVS) on a set
of Buck regulators. A number of GPIO are connected to these
lines and are requested by the mfd driver. Setup the GPIO
pins from the regulator driver.
If possible merge this patch with patch 8. Both are adding DVS
support. Put regmap_copy dependency patch in very beginning.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/regulator/max77686.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers/regulator/max77686.c b/drivers/regulator/max77686.c
index ef1af2d..ecce77a 100644
--- a/drivers/regulator/max77686.c
+++ b/drivers/regulator/max77686.c
@@ -435,6 +435,12 @@ static int max77686_pmic_dt_parse_pdata(struct
platform_device *pdev,
}
#endif /* CONFIG_OF */
+static inline bool max77686_is_dvs_buck(int id)
+{
+ /* BUCK 2,3 and 4 support DVS */
+ return (id = MAX77686_BUCK2 id = MAX77686_BUCK4);
I am just wondering if along with above check, SELB gpios (if present)
can be used to confirm if BUCK's are DVS based or not.
+}
+
static int max77686_pmic_probe(struct platform_device *pdev)
{
struct max77686_dev *iodev = dev_get_drvdata(pdev-dev.parent);
@@ -442,6 +448,9 @@ static int max77686_pmic_probe(struct platform_device
*pdev)
struct max77686_data *max77686;
int i, ret = 0;
struct regulator_config config = { };
+ unsigned int reg;
+ int buck_default_idx;
+ int buck_old_idx;
dev_dbg(pdev-dev, %s\n, __func__);
@@ -472,13 +481,34 @@ static int max77686_pmic_probe(struct platform_device
*pdev)
config.driver_data = max77686;
platform_set_drvdata(pdev, max77686);
+ buck_default_idx = pdata-buck_default_idx;
+ buck_old_idx = max77686_read_gpios(pdata);
+
for (i = 0; i MAX77686_REGULATORS; i++) {
struct regulator_dev *rdev;
+ int id = pdata-regulators[i].id;
config.init_data = pdata-regulators[i].initdata;
config.of_node = pdata-regulators[i].of_node;
max77686-opmode[i] = regulators[i].enable_mask;
+
+ if (max77686_is_dvs_buck(id)) {
+ /* Try to copy over data so we keep firmware settings
*/
+ reg = regulators[i].vsel_reg;
+
+ ret = regmap_reg_copy(iodev-regmap,
+ reg + buck_default_idx,
+ reg + buck_old_idx);
+
+ if (ret)
+ dev_warn(pdev-dev, Copy err %d = %d
(%d)\n,
+reg + buck_old_idx,
+reg + buck_default_idx, ret);
+
+ regulators[i].vsel_reg += buck_default_idx;
+ }
+
rdev = devm_regulator_register(pdev-dev,
regulators[i], config);
if (IS_ERR(rdev)) {
@@ -488,6 +518,10 @@ static int max77686_pmic_probe(struct platform_device
*pdev)
}
}
+ ret = max77686_setup_gpios(iodev-dev);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.0.0.rc2
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Re: [PATCH 2/3] regulator: s2mpa01: Optimize the regulator description macro
On Thu, Jul 10, 2014 at 1:05 PM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 10 Jul 2014, amit daniel kachhap wrote:
Adding MFD maintainers.
Why, what for?
Sorry not needed for this patch.
On Tue, Jul 8, 2014 at 5:57 PM, Amit Daniel Kachhap
amit.dan...@samsung.com wrote:
This patch makes the regulator description macro take minimum and
steps voltage as parameter. In this way many repeated macros can be
removed. Now these macros are repeated only if the the LDO/BUCK ctrl
registers have non-linear positions. The good thing is these ctrl registers
are mostly linear so they are not passed as parameters.
This patch reduces the code size and also allow easy addition of more
s2mpxxx PMIC drivers which differs a lot in minimum/step voltages.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
drivers/regulator/s2mpa01.c | 136
1 file changed, 37 insertions(+), 99 deletions(-)
diff --git a/drivers/regulator/s2mpa01.c b/drivers/regulator/s2mpa01.c
index 962c5f1..8073466 100644
--- a/drivers/regulator/s2mpa01.c
+++ b/drivers/regulator/s2mpa01.c
@@ -235,28 +235,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
.set_ramp_delay = s2mpa01_set_ramp_delay,
};
-#define regulator_desc_ldo1(num) { \
+#define regulator_desc_ldo(num, min, step) { \
.name = LDO#num,\
.id = S2MPA01_LDO##num, \
.ops= s2mpa01_ldo_ops, \
.type = REGULATOR_VOLTAGE,\
.owner = THIS_MODULE, \
- .min_uV = MIN_800_MV, \
- .uV_step= STEP_50_MV, \
- .n_voltages = S2MPA01_LDO_N_VOLTAGES, \
- .vsel_reg = S2MPA01_REG_L1CTRL + num - 1, \
- .vsel_mask = S2MPA01_LDO_VSEL_MASK,\
- .enable_reg = S2MPA01_REG_L1CTRL + num - 1, \
- .enable_mask= S2MPA01_ENABLE_MASK \
-}
-#define regulator_desc_ldo2(num) { \
- .name = LDO#num,\
- .id = S2MPA01_LDO##num, \
- .ops= s2mpa01_ldo_ops, \
- .type = REGULATOR_VOLTAGE,\
- .owner = THIS_MODULE, \
- .min_uV = MIN_800_MV, \
- .uV_step= STEP_25_MV, \
+ .min_uV = min, \
+ .uV_step= step, \
.n_voltages = S2MPA01_LDO_N_VOLTAGES, \
.vsel_reg = S2MPA01_REG_L1CTRL + num - 1, \
.vsel_mask = S2MPA01_LDO_VSEL_MASK,\
@@ -296,14 +282,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
.enable_mask= S2MPA01_ENABLE_MASK \
}
-#define regulator_desc_buck6_7(num){ \
+#define regulator_desc_buck6_10(num, min, step){ \
.name = BUCK#num, \
.id = S2MPA01_BUCK##num,\
.ops= s2mpa01_buck_ops,\
.type = REGULATOR_VOLTAGE,\
.owner = THIS_MODULE, \
- .min_uV = MIN_600_MV, \
- .uV_step= STEP_6_25_MV, \
+ .min_uV = min, \
+ .uV_step= step, \
.n_voltages = S2MPA01_BUCK_N_VOLTAGES, \
.ramp_delay = S2MPA01_RAMP_DELAY, \
.vsel_reg = S2MPA01_REG_B6CTRL2 + (num - 6) * 2, \
@@ -312,91 +298,43 @@ static struct regulator_ops s2mpa01_buck_ops = {
.enable_mask= S2MPA01_ENABLE_MASK \
}
-#define regulator_desc_buck8 { \
- .name = BUCK8, \
- .id = S2MPA01_BUCK8,\
- .ops= s2mpa01_buck_ops,\
- .type = REGULATOR_VOLTAGE,\
- .owner = THIS_MODULE, \
- .min_uV = MIN_800_MV, \
- .uV_step= STEP_12_5_MV, \
- .n_voltages = S2MPA01_BUCK_N_VOLTAGES, \
- .ramp_delay = S2MPA01_RAMP_DELAY, \
- .vsel_reg = S2MPA01_REG_B8CTRL2, \
- .vsel_mask = S2MPA01_BUCK_VSEL_MASK, \
-
Re: [PATCHv3 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk
On 10 July 2014 11:40, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi, Ulf.
On 07/10/2014 06:15 PM, Ulf Hansson wrote:
On 10 July 2014 09:08, Jaehoon Chung jh80.ch...@samsung.com wrote:
Replaced the disable-wp into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Hi Jaehoon,
I plan to carry these patches through my mmc tree and I will share
them through a PR from an immutable branch with the ARM SoC guys.
Please tell me if you have any concern with this set up.
Hmm, I having a second thought around this. Could I just apply the mmc
patches for my next branch instead of involving ARM SoC? In other
words, are there any decencies? If not, I might just apply patch 1 and
5.
Kind regards
Uffe
Now, while I was applying this patch, I found it had checkpatch
errors. Please run checkpatch and resend a new version.
Sorry for not checking the patch. I will resend a new version.
Thanks for pointing out.
Best Regards,
Jaehoon Chung
Kind regards
Uffe
---
drivers/mmc/host/dw_mmc.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c..a3ccd07 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -997,7 +997,7 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
int gpio_ro = mmc_gpio_get_ro(mmc);
/* Use platform get_ro function, else try on board write protect */
- if (slot-quirks DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
+ if (slot-host-quirks DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
read_only = 0;
else if (!IS_ERR_VALUE(gpio_ro))
read_only = gpio_ro;
@@ -2006,12 +2006,7 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
static struct dw_mci_of_slot_quirks {
char *quirk;
int id;
-} of_slot_quirks[] = {
- {
- .quirk = disable-wp,
- .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
- },
-};
+} of_slot_quirks[] = {};
static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot)
{
@@ -2238,6 +2233,9 @@ static struct dw_mci_of_quirks {
{
.quirk = broken-cd,
.id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
+ },{
+ .quirk = disable-wp,
+ .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
},
};
--
1.7.9.5
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RE: [PATCHv4 0/5] ARM: remove the sub-node and deprecated supports-highspeed property for dwmmc.
On Thu, July 10, 2014, Jaehoon Chung wrote: Since used the mmc_of_parse(), didn't parse the sub-node. So we can remove the sub-node, because almost SoC used the only one card per a host. And supports-highspeed can be replaced to cap-mmc/sd-highspeed property. Changelog V4: - Fix the checkpatch error. Changelog V3: - Fix the wrong bus-width value. - Use the slot-host-quirks instead of brq-quirks. - Add tested-by and reviewd-by. Changelog V2: - Add the mmc: dw_mmc: replace disable-wp from slot's quirks to host's quirk Jaehoon Chung (5): mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 - .../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 - .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 - arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++ arch/arm/boot/dts/exynos4412-origen.dts|8 ++ arch/arm/boot/dts/exynos4412-trats2.dts|8 ++ arch/arm/boot/dts/exynos5250-arndale.dts | 18 -- arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 ++-- arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 -- arch/arm/boot/dts/exynos5250-snow.dts |6 ++--- arch/arm/boot/dts/exynos5260-xyref5260.dts | 18 -- arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 -- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 +++- arch/arm/boot/dts/exynos5420-peach-pit.dts | 16 +++- arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 +++- arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 +++- arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16 +++- arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++ arch/arm/boot/dts/socfpga_cyclone5.dtsi|9 +++ arch/arm/boot/dts/socfpga_vt.dts |9 +++ drivers/mmc/host/dw_mmc.c | 12 - 21 files changed, 84 insertions(+), 204 deletions(-) Acked-by: Seungwon Jeon tgih@samsung.com Thanks, Seungwon Jeon -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 12/16] i2c: i2c-s3c2410: Drop class based scanning to improve bootup time
This driver has been flagged to drop class based instantiation. The removal improves boot-up time and is unneeded for embedded controllers. Users have been warned to switch for some time now, so we can actually do the removal. Keep the DEPRECATED flag, so the core can inform users that the behaviour finally changed now. After another transition period, this flag can go, too. While we are here, remove the indentation for the array setup because such things always break after some time. Signed-off-by: Wolfram Sang w...@the-dreams.de --- drivers/i2c/busses/i2c-s3c2410.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index e828a1dba0e5..6252c051525a 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -1128,11 +1128,11 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) s3c24xx_i2c_parse_dt(pdev-dev.of_node, i2c); strlcpy(i2c-adap.name, s3c2410-i2c, sizeof(i2c-adap.name)); - i2c-adap.owner = THIS_MODULE; - i2c-adap.algo= s3c24xx_i2c_algorithm; + i2c-adap.owner = THIS_MODULE; + i2c-adap.algo = s3c24xx_i2c_algorithm; i2c-adap.retries = 2; - i2c-adap.class = I2C_CLASS_HWMON | I2C_CLASS_SPD | I2C_CLASS_DEPRECATED; - i2c-tx_setup = 50; + i2c-adap.class = I2C_CLASS_DEPRECATED; + i2c-tx_setup = 50; init_waitqueue_head(i2c-wait); -- 2.0.0 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/16] i2c: drop class based instantiaion for selected drivers
Some drivers were flagged to remove class based instantiation soon to improve
boot-up time. Originally, I was planning for a longer deprecation time so users
could switch over to some other kind of instantiation. However, the demand for
the speed up is high enough and class based instantiation is used rarely, so
the removal takes place now. To make up for the deprecation time, another
warning is added to the i2c core pointing out that the behaviour has now
changed:
+ /* Warn that the adapter lost class based instantiation */
+ if (adapter-class == I2C_CLASS_DEPRECATED) {
+ dev_dbg(adapter-dev,
+ This adapter dropped support for I2C classes and
+ won't auto-detect %s devices anymore. If you need it,
check
+ 'Documentation/i2c/instantiating-devices' for
alternatives.\n,
+ driver-driver.name);
+ return 0;
+ }
A branch can be found here (with two other cleanups - driver removals):
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git i2c/deprecate_stuff
I hope this meets all the needs. Please comment, ack, test...
Thanks,
Wolfram
Wolfram Sang (16):
i2c: add debug info when class instantiation was dropped
i2c: i2c-at91: Drop class based scanning to improve bootup time
i2c: i2c-bcm2835: Drop class based scanning to improve bootup time
i2c: i2c-bfin-twi: Drop class based scanning to improve bootup time
i2c: i2c-davinci: Drop class based scanning to improve bootup time
i2c: i2c-designware-platdrv: Drop class based scanning to improve
bootup time
i2c: i2c-mv64xxx: Drop class based scanning to improve bootup time
i2c: i2c-nomadik: Drop class based scanning to improve bootup time
i2c: i2c-ocores: Drop class based scanning to improve bootup time
i2c: i2c-omap: Drop class based scanning to improve bootup time
i2c: i2c-rcar: Drop class based scanning to improve bootup time
i2c: i2c-s3c2410: Drop class based scanning to improve bootup time
i2c: i2c-sirf: Drop class based scanning to improve bootup time
i2c: i2c-stu300: Drop class based scanning to improve bootup time
i2c: i2c-tegra: Drop class based scanning to improve bootup time
i2c: i2c-xiic: Drop class based scanning to improve bootup time
drivers/i2c/busses/i2c-at91.c | 2 +-
drivers/i2c/busses/i2c-bcm2835.c| 2 +-
drivers/i2c/busses/i2c-bfin-twi.c | 2 +-
drivers/i2c/busses/i2c-davinci.c| 2 +-
drivers/i2c/busses/i2c-designware-platdrv.c | 2 +-
drivers/i2c/busses/i2c-mv64xxx.c| 2 +-
drivers/i2c/busses/i2c-nomadik.c| 8
drivers/i2c/busses/i2c-ocores.c | 12 ++--
drivers/i2c/busses/i2c-omap.c | 2 +-
drivers/i2c/busses/i2c-rcar.c | 14 +++---
drivers/i2c/busses/i2c-s3c2410.c| 8
drivers/i2c/busses/i2c-sirf.c | 2 +-
drivers/i2c/busses/i2c-stu300.c | 2 +-
drivers/i2c/busses/i2c-tegra.c | 2 +-
drivers/i2c/busses/i2c-xiic.c | 12 ++--
drivers/i2c/i2c-core.c | 10 ++
16 files changed, 47 insertions(+), 37 deletions(-)
--
2.0.0
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RE: [PATCHv3 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk
On Thu, July 10, 2014, Ulf Hansson wrote: On 10 July 2014 11:40, Jaehoon Chung jh80.ch...@samsung.com wrote: Hi, Ulf. On 07/10/2014 06:15 PM, Ulf Hansson wrote: On 10 July 2014 09:08, Jaehoon Chung jh80.ch...@samsung.com wrote: Replaced the disable-wp into host's quirks. (Because the slot-node is removed at dt-file.) Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com Hi Jaehoon, I plan to carry these patches through my mmc tree and I will share them through a PR from an immutable branch with the ARM SoC guys. Please tell me if you have any concern with this set up. Hmm, I having a second thought around this. Could I just apply the mmc patches for my next branch instead of involving ARM SoC? In other words, are there any decencies? If not, I might just apply patch 1 and 5. [PATCHv4 2/5] ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc [PATCHv4 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc [PATCHv4 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk 2nd and 4th are closely related 5th. I think it shall be picked together. How about taking whole patch? And I hope that it is applied for 3.16-rcX fix. (Also, 3rd patch is close to fix patch.) Kukjin, Is it fine to be taken in Ulf's? Thanks, Seungwon Jeon -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/1] pinctrl: samsung: Group all drivers in a sub-dir
Group all pin control drivers of Samsung platform together in
a sub-directory for easy maintenance.
Signed-off-by: Sachin Kamat sachin.ka...@samsung.com
---
This patch has been inspired by a similar patch [1] from Linus Walleij for
Qualcomm drivers. I have boot tested this patch on Exynos boards and
compile tested for other Samsung platforms.
[1] http://www.spinics.net/lists/arm-kernel/msg345924.html
---
drivers/pinctrl/Kconfig| 27 +--
drivers/pinctrl/Makefile |6 +
drivers/pinctrl/samsung/Kconfig| 28
drivers/pinctrl/samsung/Makefile |7 +
drivers/pinctrl/{ = samsung}/pinctrl-exynos.c |0
drivers/pinctrl/{ = samsung}/pinctrl-exynos.h |0
drivers/pinctrl/{ = samsung}/pinctrl-exynos5440.c |2 +-
drivers/pinctrl/{ = samsung}/pinctrl-s3c24xx.c|0
drivers/pinctrl/{ = samsung}/pinctrl-s3c64xx.c|0
drivers/pinctrl/{ = samsung}/pinctrl-samsung.c|2 +-
drivers/pinctrl/{ = samsung}/pinctrl-samsung.h|0
11 files changed, 39 insertions(+), 33 deletions(-)
create mode 100644 drivers/pinctrl/samsung/Kconfig
create mode 100644 drivers/pinctrl/samsung/Makefile
rename drivers/pinctrl/{ = samsung}/pinctrl-exynos.c (100%)
rename drivers/pinctrl/{ = samsung}/pinctrl-exynos.h (100%)
rename drivers/pinctrl/{ = samsung}/pinctrl-exynos5440.c (99%)
rename drivers/pinctrl/{ = samsung}/pinctrl-s3c24xx.c (100%)
rename drivers/pinctrl/{ = samsung}/pinctrl-s3c64xx.c (100%)
rename drivers/pinctrl/{ = samsung}/pinctrl-samsung.c (99%)
rename drivers/pinctrl/{ = samsung}/pinctrl-samsung.h (100%)
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 2744fa2825e0..f8bf9d80fc1a 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -363,22 +363,6 @@ config PINCTRL_COH901
COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
ports of 8 GPIO pins each.
-config PINCTRL_SAMSUNG
- bool
- select PINMUX
- select PINCONF
-
-config PINCTRL_EXYNOS
- bool Pinctrl driver data for Samsung EXYNOS SoCs other than 5440
- depends on OF GPIOLIB (ARCH_EXYNOS || ARCH_S5PV210)
- select PINCTRL_SAMSUNG
-
-config PINCTRL_EXYNOS5440
- bool Samsung EXYNOS5440 SoC pinctrl driver
- depends on SOC_EXYNOS5440
- select PINMUX
- select PINCONF
-
config PINCTRL_PALMAS
bool Pinctrl driver for the PALMAS Series MFD devices
depends on OF MFD_PALMAS
@@ -390,18 +374,9 @@ config PINCTRL_PALMAS
open drain configuration for the Palmas series devices like
TPS65913, TPS80036 etc.
-config PINCTRL_S3C24XX
- bool Samsung S3C24XX SoC pinctrl driver
- depends on ARCH_S3C24XX
- select PINCTRL_SAMSUNG
-
-config PINCTRL_S3C64XX
- bool Samsung S3C64XX SoC pinctrl driver
- depends on ARCH_S3C64XX
- select PINCTRL_SAMSUNG
-
source drivers/pinctrl/berlin/Kconfig
source drivers/pinctrl/mvebu/Kconfig
+source drivers/pinctrl/samsung/Kconfig
source drivers/pinctrl/sh-pfc/Kconfig
source drivers/pinctrl/spear/Kconfig
source drivers/pinctrl/sunxi/Kconfig
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index c7d8f1b7311f..2ee910dbfe36 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -60,11 +60,6 @@ obj-$(CONFIG_PINCTRL_TZ1090) += pinctrl-tz1090.o
obj-$(CONFIG_PINCTRL_TZ1090_PDC) += pinctrl-tz1090-pdc.o
obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
-obj-$(CONFIG_PINCTRL_SAMSUNG) += pinctrl-samsung.o
-obj-$(CONFIG_PINCTRL_EXYNOS) += pinctrl-exynos.o
-obj-$(CONFIG_PINCTRL_EXYNOS5440) += pinctrl-exynos5440.o
-obj-$(CONFIG_PINCTRL_S3C24XX) += pinctrl-s3c24xx.o
-obj-$(CONFIG_PINCTRL_S3C64XX) += pinctrl-s3c64xx.o
obj-$(CONFIG_PINCTRL_XWAY) += pinctrl-xway.o
obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o
obj-$(CONFIG_PINCTRL_TB10X)+= pinctrl-tb10x.o
@@ -78,3 +73,4 @@ obj-$(CONFIG_SUPERH) += sh-pfc/
obj-$(CONFIG_PLAT_SPEAR) += spear/
obj-$(CONFIG_ARCH_VT8500) += vt8500/
obj-$(CONFIG_ARCH_SUNXI) += sunxi/
+obj-$(CONFIG_PLAT_SAMSUNG) += samsung/
diff --git a/drivers/pinctrl/samsung/Kconfig b/drivers/pinctrl/samsung/Kconfig
new file mode 100644
index ..d0461cd5d707
--- /dev/null
+++ b/drivers/pinctrl/samsung/Kconfig
@@ -0,0 +1,28 @@
+#
+# Samsung Pin control drivers
+#
+config PINCTRL_SAMSUNG
+ bool
+ select PINMUX
+ select PINCONF
+
+config PINCTRL_EXYNOS
+ bool Pinctrl driver data for Samsung EXYNOS SoCs other than 5440
+ depends on OF GPIOLIB (ARCH_EXYNOS || ARCH_S5PV210)
+ select PINCTRL_SAMSUNG
+
+config PINCTRL_EXYNOS5440
+ bool Samsung EXYNOS5440 SoC pinctrl driver
+ depends on SOC_EXYNOS5440
+ select PINMUX
+ select PINCONF
+
+config PINCTRL_S3C24XX
+ bool Samsung
Re: [PATCHv3 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk
On 10 July 2014 13:53, Seungwon Jeon tgih@samsung.com wrote: On Thu, July 10, 2014, Ulf Hansson wrote: On 10 July 2014 11:40, Jaehoon Chung jh80.ch...@samsung.com wrote: Hi, Ulf. On 07/10/2014 06:15 PM, Ulf Hansson wrote: On 10 July 2014 09:08, Jaehoon Chung jh80.ch...@samsung.com wrote: Replaced the disable-wp into host's quirks. (Because the slot-node is removed at dt-file.) Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com Hi Jaehoon, I plan to carry these patches through my mmc tree and I will share them through a PR from an immutable branch with the ARM SoC guys. Please tell me if you have any concern with this set up. Hmm, I having a second thought around this. Could I just apply the mmc patches for my next branch instead of involving ARM SoC? In other words, are there any decencies? If not, I might just apply patch 1 and 5. [PATCHv4 2/5] ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc [PATCHv4 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc [PATCHv4 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk 2nd and 4th are closely related 5th. I think it shall be picked together. How about taking whole patch? And I hope that it is applied for 3.16-rcX fix. (Also, 3rd patch is close to fix patch.) Kukjin, Is it fine to be taken in Ulf's? I tried applied the complete patchset for 3.16 rc4, but some of the DTS patches fails. What are these patches based upon? I wonder if it's not best to leave all these for Kukjin to handle instead. You have my ack for all of the mmc patches! Kind regards Uffe -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] mmc: dw_mmc: change to use recommended reset procedure
Hi Sonny,
I have missed this patch.
You finally choose to take extra interrupt handling.
If it is not harm, it's fine.
Please check one thing below.
On Tue, June 10, 2014, Sonny Rao wrote:
This patch changes the fifo reset code to follow the reset procedure
outlined in the documentation of Synopsys Mobile storage host databook.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
---
v2: Add Generic DMA support
per the documentation, move interrupt clear before wait
make the test for DMA host-use_dma rather than host-using_dma
add proper return values (although it appears no caller checks)
v3: rename fifo reset function, and change callers
use this combined reset function in dw_mci_resume()
just one caller left (probe), so get rid of dw_mci_ctrl_all_reset()
use DMA reset bit for all systems which use DMA
remove extra IDMAC reset in dw_mci_work_routine_card()
do CIU clock update in error path, if CIU reset cleared
v4: remove comment about FIFO reset in dw_mci_work_routine_card()
move down error message when control reset clears but others don't
and clarify the error stating that we will still update clocks
make flags for all reset bits a macro
drivers/mmc/host/dw_mmc.c | 86
++-
drivers/mmc/host/dw_mmc.h | 5 +++
2 files changed, 68 insertions(+), 23 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 55cd110..1d6d984 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -111,8 +111,7 @@ static const u8 tuning_blk_pattern_8bit[] = {
0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
};
-static inline bool dw_mci_fifo_reset(struct dw_mci *host);
-static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
+static inline bool dw_mci_reset(struct dw_mci *host);
#if defined(CONFIG_DEBUG_FS)
static int dw_mci_req_show(struct seq_file *s, void *v)
@@ -1254,7 +1253,7 @@ static int dw_mci_data_complete(struct dw_mci *host,
struct mmc_data *data)
* After an error, there may be data lingering
* in the FIFO
*/
- dw_mci_fifo_reset(host);
+ dw_mci_reset(host);
} else {
data-bytes_xfered = data-blocks * data-blksz;
data-error = 0;
@@ -1371,7 +1370,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
/* CMD error in data command */
if (mrq-cmd-error mrq-data)
- dw_mci_fifo_reset(host);
+ dw_mci_reset(host);
host-cmd = NULL;
host-data = NULL;
@@ -1982,14 +1981,8 @@ static void dw_mci_work_routine_card(struct
work_struct *work)
}
/* Power down slot */
- if (present == 0) {
- /* Clear down the FIFO */
- dw_mci_fifo_reset(host);
-#ifdef CONFIG_MMC_DW_IDMAC
- dw_mci_idmac_reset(host);
-#endif
-
- }
+ if (present == 0)
+ dw_mci_reset(host);
spin_unlock_bh(host-lock);
@@ -2323,8 +2316,11 @@ static bool dw_mci_ctrl_reset(struct dw_mci *host, u32
reset)
return false;
}
-static inline bool dw_mci_fifo_reset(struct dw_mci *host)
+static inline bool dw_mci_reset(struct dw_mci *host)
{
+ u32 flags = SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET;
+ bool ret = false;
+
/*
* Reseting generates a block interrupt, hence setting
* the scatter-gather pointer to NULL.
@@ -2334,15 +2330,59 @@ static inline bool dw_mci_fifo_reset(struct dw_mci
*host)
host-sg = NULL;
}
- return dw_mci_ctrl_reset(host, SDMMC_CTRL_FIFO_RESET);
-}
+ if (host-use_dma)
+ flags |= SDMMC_CTRL_DMA_RESET;
-static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host)
-{
- return dw_mci_ctrl_reset(host,
- SDMMC_CTRL_FIFO_RESET |
- SDMMC_CTRL_RESET |
- SDMMC_CTRL_DMA_RESET);
+ if (dw_mci_ctrl_reset(host, flags)) {
+ /*
+ * In all cases we clear the RAWINTS register to clear any
+ * interrupts.
+ */
+ mci_writel(host, RINTSTS, 0x);
+
+ /* if using dma we wait for dma_req to clear */
+ if (host-use_dma) {
+ unsigned long timeout = jiffies + msecs_to_jiffies(500);
+ u32 status;
+ do {
+ status = mci_readl(host, STATUS);
+ if (!(status SDMMC_STATUS_DMA_REQ))
+
Re: [PATCH 00/16] i2c: drop class based instantiaion for selected drivers
Hi,
Wolfram Sang wrote:
Some drivers were flagged to remove class based instantiation soon to improve
boot-up time. Originally, I was planning for a longer deprecation time so
users
could switch over to some other kind of instantiation. However, the demand for
the speed up is high enough and class based instantiation is used rarely, so
the removal takes place now. To make up for the deprecation time, another
warning is added to the i2c core pointing out that the behaviour has now
changed:
+ /* Warn that the adapter lost class based instantiation */
+ if (adapter-class == I2C_CLASS_DEPRECATED) {
+ dev_dbg(adapter-dev,
+ This adapter dropped support for I2C classes and
+ won't auto-detect %s devices anymore. If you need it,
check
+ 'Documentation/i2c/instantiating-devices' for
alternatives.\n,
It's usually a bad idea to split kernel messages across source lines
because it makes searching for the corresponding source line for a
message found in the log difficult.
You could at least do the split at the sentence boundary.
Lothar Waßmann
--
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RE: [PATCHv3 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk
On Thu, July 10, 2014, Ulf Hansson wrote: On 10 July 2014 13:53, Seungwon Jeon tgih@samsung.com wrote: On Thu, July 10, 2014, Ulf Hansson wrote: On 10 July 2014 11:40, Jaehoon Chung jh80.ch...@samsung.com wrote: Hi, Ulf. On 07/10/2014 06:15 PM, Ulf Hansson wrote: On 10 July 2014 09:08, Jaehoon Chung jh80.ch...@samsung.com wrote: Replaced the disable-wp into host's quirks. (Because the slot-node is removed at dt-file.) Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com Hi Jaehoon, I plan to carry these patches through my mmc tree and I will share them through a PR from an immutable branch with the ARM SoC guys. Please tell me if you have any concern with this set up. Hmm, I having a second thought around this. Could I just apply the mmc patches for my next branch instead of involving ARM SoC? In other words, are there any decencies? If not, I might just apply patch 1 and 5. [PATCHv4 2/5] ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc [PATCHv4 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw- mmc [PATCHv4 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk 2nd and 4th are closely related 5th. I think it shall be picked together. How about taking whole patch? And I hope that it is applied for 3.16-rcX fix. (Also, 3rd patch is close to fix patch.) Kukjin, Is it fine to be taken in Ulf's? I tried applied the complete patchset for 3.16 rc4, but some of the DTS patches fails. What are these patches based upon? I guess it's based on Ulf or Chris? It may need to be rebased for 3.16 rc4. I wonder if it's not best to leave all these for Kukjin to handle instead. You have my ack for all of the mmc patches! Thanks, Seungwon Jeon -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] arch/arm/mach-s3c24xx/mach-osiris-dvs.c: use (not ) with bool operands
The issue was discovered by static analysis. Bitwise AND () was used
in logical expressions with operands having bool type. Replaced
bitwise AND operators with logical AND.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=79781
Reported-by: David Binderman dcb...@hotmail.com
Signed-off-by: Andrey Utkin andrey.krieger.ut...@gmail.com
---
arch/arm/mach-s3c24xx/mach-osiris-dvs.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/mach-osiris-dvs.c
b/arch/arm/mach-s3c24xx/mach-osiris-dvs.c
index 33afb91..b2d620d 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris-dvs.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris-dvs.c
@@ -70,16 +70,16 @@ static int osiris_dvs_notify(struct notifier_block *nb,
switch (val) {
case CPUFREQ_PRECHANGE:
- if (old_dvs !new_dvs ||
- cur_dvs !new_dvs) {
+ if (old_dvs !new_dvs ||
+ cur_dvs !new_dvs) {
pr_debug(%s: exiting dvs\n, __func__);
cur_dvs = false;
gpio_set_value(OSIRIS_GPIO_DVS, 1);
}
break;
case CPUFREQ_POSTCHANGE:
- if (!old_dvs new_dvs ||
- !cur_dvs new_dvs) {
+ if (!old_dvs new_dvs ||
+ !cur_dvs new_dvs) {
pr_debug(entering dvs\n);
cur_dvs = true;
gpio_set_value(OSIRIS_GPIO_DVS, 0);
--
1.8.3.2
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RE: [PATCHv3 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk
Ulf Hansson wrote:
On 10 July 2014 13:53, Seungwon Jeon tgih@samsung.com wrote:
On Thu, July 10, 2014, Ulf Hansson wrote:
On 10 July 2014 11:40, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi, Ulf.
On 07/10/2014 06:15 PM, Ulf Hansson wrote:
On 10 July 2014 09:08, Jaehoon Chung jh80.ch...@samsung.com wrote:
Replaced the disable-wp into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Hi Jaehoon,
I plan to carry these patches through my mmc tree and I will share
them through a PR from an immutable branch with the ARM SoC guys.
Please tell me if you have any concern with this set up.
Hmm, I having a second thought around this. Could I just apply the mmc
patches for my next branch instead of involving ARM SoC? In other
words, are there any decencies? If not, I might just apply patch 1 and
5.
[PATCHv4 2/5] ARM: dts: exynos: unuse the slot-node and deprecated the
supports-highspeed for dw-mmc
[PATCHv4 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the
supports-highspeed for dw-
mmc
[PATCHv4 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's
quirk
2nd and 4th are closely related 5th.
I think it shall be picked together. How about taking whole patch?
And I hope that it is applied for 3.16-rcX fix.
(Also, 3rd patch is close to fix patch.)
Kukjin,
Is it fine to be taken in Ulf's?
I tried applied the complete patchset for 3.16 rc4, but some of the
DTS patches fails. What are these patches based upon?
I wonder if it's not best to leave all these for Kukjin to handle
instead. You have my ack for all of the mmc patches!
Hi, Ulf
For exynos DT:
Acked-by: Kukjin Kim kgene@samsung.com
And you may take following change on top of v3.16-rc4 cleanly. BTW it should be
merged into 3.16 so that I could avoid useless merge conflicts for 3.17.
Note that this patch doesn't make any conflicts with my for-next for 3.17.
Thanks,
Kukjin
From: Jaehoon Chung jh80.ch...@samsung.com
Subject: [PATCHv4 2/5] ARM: dts: remove the slot-node and deprecated the
supports-highspeed for dw-mmc for exynos
dw-mmc controller can support multiple slots. But, there are no use-cases
anywhere. So we don't need to support the slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed property can be replaced to cap-sd/mmc-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
Tested-by: Sachin Kamat sachin.ka...@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++--
arch/arm/boot/dts/exynos4412-trats2.dts |8 ++--
arch/arm/boot/dts/exynos5250-arndale.dts | 18 +
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 +++--
arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 +
arch/arm/boot/dts/exynos5250-snow.dts |6 ++
arch/arm/boot/dts/exynos5260-xyref5260.dts| 18 +
arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 +
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 ---
arch/arm/boot/dts/exynos5420-peach-pit.dts| 16 ---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 ---
arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 ---
13 files changed, 51 insertions(+), 141 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts
b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 31db28a..778aec6 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -45,17 +45,13 @@
status = okay;
num-slots = 1;
- supports-highspeed;
broken-cd;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 2 3;
samsung,dw-mshc-ddr-timing = 1 2;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
+ bus-width = 8;
+ cap-mmc-highspeed;
};
regulator_p3v3 {
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index e925c9f..de15114 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -137,17 +137,13 @@
status = okay;
num-slots = 1;
- supports-highspeed;
broken-cd;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 2 3;
Re: [PATCH 00/16] i2c: drop class based instantiaion for selected drivers
+ /* Warn that the adapter lost class based instantiation */
+ if (adapter-class == I2C_CLASS_DEPRECATED) {
+ dev_dbg(adapter-dev,
+ This adapter dropped support for I2C classes and
+ won't auto-detect %s devices anymore. If you need it,
check
+ 'Documentation/i2c/instantiating-devices' for
alternatives.\n,
It's usually a bad idea to split kernel messages across source lines
Yes, usually. Not for this message, though, it's specific. The lines
would have been quite long.
You could at least do the split at the sentence boundary.
OK, this would have been a compromise.
signature.asc
Description: Digital signature
Re: [PATCH v6 15/23] regulator: max77686: Setup DVS-related GPIOs on probe
On Thu, 10 Jul 2014, amit daniel kachhap wrote: On Fri, Jul 4, 2014 at 3:25 PM, Javier Martinez Canillas javier.marti...@collabora.co.uk wrote: MAX77686 PMIC support Dyamic Voltage Scaling (DVS) on a set of Buck regulators. A number of GPIO are connected to these lines and are requested by the mfd driver. Setup the GPIO pins from the regulator driver. If possible merge this patch with patch 8. Both are adding DVS support. Put regmap_copy dependency patch in very beginning. You want to merge two patches which deal with different subsystems? That's the opposite of what we usually try and achieve. Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk --- drivers/regulator/max77686.c | 34 ++ 1 file changed, 34 insertions(+) -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [RESEND PATCHv2 0/3] Power-domain clk handling
Arun Kumar K wrote: This patch series for clock handling in power domain is re-send for merging after rebasing onto latest linux-samsung.git, for-next branch. Original series and discussion can be found here: https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg31550.html Arun Kumar K (2): clk: exynos5420: Add IDs for clocks used in PD mfc ARM: dts: Add clock property for mfc_pd in 5420 Prathyush K (1): ARM: EXYNOS: Add support for clock handling in power domain .../bindings/arm/exynos/power_domain.txt | 20 +++ arch/arm/boot/dts/exynos5420.dtsi |3 + arch/arm/mach-exynos/pm_domains.c | 61 +++- drivers/clk/samsung/clk-exynos5420.c |6 +- include/dt-bindings/clock/exynos5420.h |2 + 5 files changed, 89 insertions(+), 3 deletions(-) -- 1.7.9.5 Yeah, this is required now because regarding clock registers are also powered down during pd-off on some exynos SoCs as you mentioned. Just note that you know the registers are moved into pd related register on latest exynos SoC's anyway. OK, I will apply into fixes for 3.16. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 6/6] ARM: EXYNOS: Register cpuidle device only on Exynos4210 and 5250
Bartlomiej Zolnierkiewicz wrote: Hi, Hi Bart, On Tuesday, July 08, 2014 11:15:21 PM Kukjin Kim wrote: Tomasz Figa wrote: Currently, the Exynos cpuidle driver works correctly only on Exynos4210 and 5250. Trying to use it with just one CPU online on any other Exynos SoC will lead to system failure, due to unsupported AFTR mode on other SoCs. This patch fixes the problem by registering the driver only on supported SoCs and letting others simply use default WFI mode until support for them is added. Hmm...I thought other SoCs have no problem on cpuidle except exynos5420 and exynos5440something like this would be helpful to avoid system failure. But unfortunately this conflicts with Pankaj's cleanup cpufreq_init() and cpuidle_init() patch you've reviewed and I've applied in my local... I'm going to check which exynos is ok on cpuidle and then sort them out. Tomasz's patch is correct - currently only Exynos4210 and Exynos5250 work fine with AFTR mode and upstream kernel (AFTR gets triggered by offlining CPUs other than CPU0). [ Exynos4x12 and Exynos3250 need secure firmware support (patches for this need to be reworked on top of recent PM/firmware/cpuidle changes). Exynos5410 should use big_little cpuidle driver. ] Agreed that this is required at this moment. I will take this into fixes for 3.16. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v6 2/6] ARM: EXYNOS: Move cpufreq and cpuidle device registration to init_machine
Pankaj Dubey wrote:
Hi Kukjin,
Hi,
On 07/07/14 12:50, Pankaj Dubey wrote:
As exynos_cpuidle_init and exynos_cpufreq_init function have just one
lines of code for registering platform devices. We can move these
lines to exynos_dt_machine_init and delete exynos_cpuidle_init and
exynos_cpufreq_init function. This will help in reducing lines of code
in exynos.c, making it more cleaner.
Suggested-by: Tomasz Figat.f...@samsung.com
Signed-off-by: Pankaj Dubeypankaj.du...@samsung.com
Reviewed-by: Tomasz Figat.f...@samsung.com
---
arch/arm/mach-exynos/exynos.c | 20
1 file changed, 4 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-exynos/exynos.c
b/arch/arm/mach-exynos/exynos.c index ff60b4c..47170eb 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -171,19 +171,6 @@ static struct platform_device exynos_cpuidle = {
.id= -1,
};
-void __init exynos_cpuidle_init(void) -{
- if (soc_is_exynos5440())
- return;
-
- platform_device_register(exynos_cpuidle);
-}
-
-void __init exynos_cpufreq_init(void) -{
- platform_device_register_simple(exynos-cpufreq, -1, NULL, 0);
-}
-
void __iomem *sysram_base_addr;
void __iomem *sysram_ns_base_addr;
@@ -300,10 +287,11 @@ static void __init exynos_dt_machine_init(void)
if (!IS_ENABLED(CONFIG_SMP))
exynos_sysram_init();
- if (!of_machine_is_compatible(samsung,exynos5420))
- exynos_cpuidle_init();
+ if (!of_machine_is_compatible(samsung,exynos5420) ||
+ !of_machine_is_compatible(samsung,exynos5440))
+ platform_device_register(exynos_cpuidle);
- exynos_cpufreq_init();
+ platform_device_register_simple(exynos-cpufreq, -1, NULL, 0);
of_platform_populate(NULL, of_default_bus_match_table, NULL,
NULL);
}
This cannot be applied in my tree now
May I know what the issue is? As I am able to rebase this patch on today's
kgene/for-next
and could not see any merge conflict.
If you think I need to respin this patch please let me know.
Pankaj, I found this is based on cpuidle related branch in my tree, BTW this
has a dependency with following so please respin your patch once I take the
patch in my tree maybe tonight.
https://lkml.org/lkml/2014/6/24/286
Thanks,
Kukjin
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RE: [PATCH v7 1/4] ARM: EXYNOS: Add support for mapping PMU base address via DT
Pankaj Dubey wrote:
Add support for mapping Samsung Power Management Unit (PMU)
base address from device tree.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-exynos/common.h |1 +
arch/arm/mach-exynos/exynos.c | 37 +
2 files changed, 38 insertions(+)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 152b464..f8daa9c 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -113,6 +113,7 @@ IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID,
EXYNOS5_SOC_MASK)
extern void __iomem *sysram_ns_base_addr;
extern void __iomem *sysram_base_addr;
+extern void __iomem *pmu_base_addr;
void exynos_sysram_init(void);
void exynos_firmware_init(void);
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 186f35d..173aac8 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -19,6 +19,7 @@
#include linux/of_platform.h
#include linux/platform_device.h
#include linux/pm_domain.h
+#include linux/irqchip.h
#include asm/cacheflush.h
#include asm/hardware/cache-l2x0.h
@@ -31,6 +32,8 @@
#include regs-pmu.h
#include regs-sys.h
+void __iomem *pmu_base_addr;
+
static struct map_desc exynos4_iodesc[] __initdata = {
{
.virtual= (unsigned long)S3C_VA_SYS,
@@ -253,6 +256,39 @@ static void __init exynos_init_io(void)
exynos_map_io();
}
+static const struct of_device_id exynos_dt_pmu_match[] = {
+ { .compatible = samsung,exynos3250-pmu },
+ { .compatible = samsung,exynos4210-pmu },
+ { .compatible = samsung,exynos4212-pmu },
+ { .compatible = samsung,exynos4412-pmu },
+ { .compatible = samsung,exynos5250-pmu },
+ { .compatible = samsung,exynos5420-pmu },
+ { /*sentinel*/ },
+};
+
+static void exynos_map_pmu(void)
+{
+ struct device_node *np;
+
+ np = of_find_matching_node(NULL, exynos_dt_pmu_match);
+ if (np)
+ pmu_base_addr = of_iomap(np, 0);
+
+ if (!pmu_base_addr)
+ panic(failed to find exynos pmu register\n);
+}
+
+static void __init exynos_init_irq(void)
+{
+ irqchip_init();
+ /*
+ * Since platsmp.c needs pmu base address by the time
+ * DT is not unflatten so we can't use DT APIs before
+ * init_irq
+ */
+ exynos_map_pmu();
+}
+
static void __init exynos_dt_machine_init(void)
{
struct device_node *i2c_np;
@@ -336,6 +372,7 @@ DT_MACHINE_START(EXYNOS_DT, SAMSUNG EXYNOS (Flattened
Device Tree))
.smp= smp_ops(exynos_smp_ops),
.map_io = exynos_init_io,
.init_early = exynos_firmware_init,
+ .init_irq = exynos_init_irq,
.init_machine = exynos_dt_machine_init,
.init_late = exynos_init_late,
.dt_compat = exynos_dt_compat,
--
1.7.9.5
Looks good to me, will apply.
Thanks,
Kukjin
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RE: [PATCH v7 2/4] ARM: EXYNOS: Refactored code for using PMU address via DT
Pankaj Dubey wrote:
Under arm/mach-exynos many files are using PMU register offsets.
Since we have added support for accessing PMU base address via DT,
now we can remove PMU mapping from exynosX_iodesc. Let's convert
all these access using iomapped address.
This will help us in removing static mapping of PMU base address
as well as help in reducing dependency over machine header files.
Thus helping for migration of PMU implementation from machine to
driver folder which can be reused for ARM64 bsed SoC.
* based
BTW I'm not sure how many stuff from pmu can be reused in ARMv8 exynos SoCs...
Also as we have removed static mappings from regs-pmu.h it does
not need map.h anymore. But platsmp.c needed this and till now it
got included indirectly. So lets move header inclusion of
mach/map.h from regs-pmu.h to platsmp.c.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Basic approach looks nice to me, will apply :-)
Thanks,
Kukjin
---
arch/arm/mach-exynos/common.h| 14 +-
arch/arm/mach-exynos/exynos.c| 12 +-
arch/arm/mach-exynos/include/mach/map.h |3 -
arch/arm/mach-exynos/mcpm-exynos.c |8 +-
arch/arm/mach-exynos/platsmp.c |4 +-
arch/arm/mach-exynos/pm.c| 76 ++--
arch/arm/mach-exynos/pmu.c | 40 +-
arch/arm/mach-exynos/regs-pmu.h | 522
+-
arch/arm/plat-samsung/include/plat/map-s5p.h |1 -
9 files changed, 339 insertions(+), 341 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index f8daa9c..47b904b 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -134,7 +134,7 @@ extern void exynos_cpu_die(unsigned int cpu);
/* PMU(Power Management Unit) support */
-#define PMU_TABLE_ENDNULL
+#define PMU_TABLE_END(-1U)
enum sys_powerdown {
SYS_AFTR,
@@ -144,7 +144,7 @@ enum sys_powerdown {
};
struct exynos_pmu_conf {
- void __iomem *reg;
+ unsigned int offset;
unsigned int val[NUM_SYS_POWERDOWN];
};
@@ -160,4 +160,14 @@ extern void exynos_enter_aftr(void);
extern void s5p_init_cpu(void __iomem *cpuid_addr);
extern unsigned int samsung_rev(void);
+static inline void pmu_raw_writel(u32 val, u32 offset)
+{
+ __raw_writel(val, pmu_base_addr + offset);
+}
+
+static inline u32 pmu_raw_readl(u32 offset)
+{
+ return __raw_readl(pmu_base_addr + offset);
+}
+
#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 173aac8..d75d3e8 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -61,11 +61,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.length = SZ_4K,
.type = MT_DEVICE,
}, {
- .virtual= (unsigned long)S5P_VA_PMU,
- .pfn= __phys_to_pfn(EXYNOS4_PA_PMU),
- .length = SZ_64K,
- .type = MT_DEVICE,
- }, {
.virtual= (unsigned long)S5P_VA_COMBINER_BASE,
.pfn= __phys_to_pfn(EXYNOS4_PA_COMBINER),
.length = SZ_4K,
@@ -139,11 +134,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
.pfn= __phys_to_pfn(EXYNOS5_PA_CMU),
.length = 144 * SZ_1K,
.type = MT_DEVICE,
- }, {
- .virtual= (unsigned long)S5P_VA_PMU,
- .pfn= __phys_to_pfn(EXYNOS5_PA_PMU),
- .length = SZ_64K,
- .type = MT_DEVICE,
},
};
@@ -151,7 +141,7 @@ static void exynos_restart(enum reboot_mode mode, const
char *cmd)
{
struct device_node *np;
u32 val = 0x1;
- void __iomem *addr = EXYNOS_SWRESET;
+ void __iomem *addr = pmu_base_addr + EXYNOS_SWRESET;
if (of_machine_is_compatible(samsung,exynos5440)) {
u32 status;
diff --git a/arch/arm/mach-exynos/include/mach/map.h
b/arch/arm/mach-exynos/include/mach/map.h
index 963002f..f0b7e92 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -27,9 +27,6 @@
#define EXYNOS4_PA_SYSCON0x1001
#define EXYNOS5_PA_SYSCON0x10050100
-#define EXYNOS4_PA_PMU 0x1002
-#define EXYNOS5_PA_PMU 0x1004
-
#define EXYNOS4_PA_CMU 0x1003
#define EXYNOS5_PA_CMU 0x1001
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c
b/arch/arm/mach-exynos/mcpm-exynos.c
index 9315ba9..70e8ccd 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -55,7 +55,7 @@
Re: [PATCH 1/1] pinctrl: samsung: Group all drivers in a sub-dir
On Thu, Jul 10, 2014 at 2:03 PM, Sachin Kamat sachin.ka...@samsung.com wrote: Group all pin control drivers of Samsung platform together in a sub-directory for easy maintenance. Signed-off-by: Sachin Kamat sachin.ka...@samsung.com Patch applied. Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: Add mask-tpm-reset to the device tree
Vikas,
On Wed, Jul 9, 2014 at 9:35 PM, Vikas Sajjan vikas.saj...@samsung.com wrote:
Doug,
On Wed, Jul 9, 2014 at 8:52 PM, Doug Anderson diand...@chromium.org wrote:
Vikas,
On Tue, Jul 8, 2014 at 9:20 AM, Tomasz Figa t.f...@samsung.com wrote:
On 08.07.2014 17:27, Doug Anderson wrote:
Hi,
On Tue, Jul 8, 2014 at 12:46 AM, Linus Walleij linus.wall...@linaro.org
wrote:
On Thu, Jun 26, 2014 at 11:15 AM, Vikas Sajjan vikas.saj...@samsung.com
wrote:
From: Doug Anderson diand...@chromium.org
The mask-tpm-reset GPIO is used by the kernel to prevent the TPM from
being reset across sleep/wake. If we don't set it to anything then
the TPM will be reset. U-Boot will detect this as invalid
and will reset the system on resume time. This GPIO can always be low
and not hurt anything. It will get pulled back high again during a
normal warm reset when it will default back to an input.
To properly preserve the TPM state across suspend/resume and to make
the chrome U-Boot happy, properly set the GPIO to mask the
reset to the TPM.
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Vikas Sajjan vikas.saj...@samsung.com
(...)
+ /* We need GPX0_6 to be low at sleep time; just keep it low
always */
+ mask_tpm_reset_regulator: mask-tpm-reset-regulator {
+ compatible = regulator-fixed;
No matter how the discussion ends up, regulator-fixed is wrong.
OK, fair enough.
Either folding it into the TPM driver or using a separate reset driver
is fine with me.
OK, Vikas: do you want to code up the driver?
So what about the generic delayed reset GPIO thing?
http://marc.info/?l=linux-kernelm=140309916607115w=2
That's a neat concept and could be useful in other cases, but I think
it's just as much of a hack as using a regulator. This is not a reset
signal for the TPM. This is a signal that will mask the CPU's reset
signal (using a special bit of board-specific logic).
Personally I think Tomasz's idea of using hogs (after his patches
allowing a default output level) is the cleanest, but I think Stephen
didn't like that.
I don't see any benefits of using complex interfaces over simply
initializing the pin to the right value once at boot-up or at
suspend/resume. As far as I understand Doug's explanation of the
problem, nothing else is expected from the OS with respect to this pin.
Moreover it doesn't affect operation of any drivers.
So I'm still for the simplest and effective solution, i.e. hogs.
It looks as if Tomasz's patch has landed, so perhaps you could try to
code it up his way. It should be very simple. Please make sure to CC
Stephen Warren on the patch so that he is included in the discussion
(and of course include Tomasz, Linus W, etc).
Can you point me to Tomasz's patchset on which I should rebase this patch on.
You can base it atop (0635c88 pinctrl: samsung: Allow pin value to be
initialized using pinfunc), which appears to be in linux-next. That
gives you samsung,pin-val.
You can use that together with a pinctrl hog to specify the state of
this pin for the board.
-Doug
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[PATCH] ASoC: samsung-i2s: Maintain CDCLK settings across i2s_{shutdown/startup}
Currently configuration of the CDCLK pad is being overwritten in
the i2s_shutdown() callback in order to gate the SoC output clock.
However if an ASoC machine driver doesn't restore that clock
settings each time after opening the sound device this results
in the CDCLK pin being permanently configured into input mode.
I.e. the output clock will always stay disabled.
Fix that by saving the CDCLKCON bit state in i2s_shutdown() and
and restoring it in the i2s_startup() callback.
Signed-off-by: Chen Zhen zhen1.c...@samsung.com
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
sound/soc/samsung/i2s.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 2ac76fa..3cb3e95 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -68,6 +68,8 @@ struct i2s_dai {
#define DAI_OPENED (1 0) /* Dai is opened */
#define DAI_MANAGER(1 1) /* Dai is the manager */
unsigned mode;
+ /* CDCLK pin direction: 0 - input, 1 - output */
+ unsigned int cdclk_out:1;
/* Driver for this DAI */
struct snd_soc_dai_driver i2s_dai_drv;
/* DMA parameters */
@@ -737,6 +739,9 @@ static int i2s_startup(struct snd_pcm_substream *substream,
spin_unlock_irqrestore(lock, flags);
+ if (!is_opened(other) i2s-cdclk_out)
+ i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
+ 0, SND_SOC_CLOCK_OUT);
return 0;
}
@@ -752,9 +757,13 @@ static void i2s_shutdown(struct snd_pcm_substream
*substream,
i2s-mode = ~DAI_OPENED;
i2s-mode = ~DAI_MANAGER;
- if (is_opened(other))
+ if (is_opened(other)) {
other-mode |= DAI_MANAGER;
-
+ } else {
+ u32 mod = readl(i2s-addr + I2SMOD);
+ i2s-cdclk_out = !(mod MOD_CDCLKCON);
+ other-cdclk_out = i2s-cdclk_out;
+ }
/* Reset any constraint on RFS and BFS */
i2s-rfs = 0;
i2s-bfs = 0;
--
1.7.9.5
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Re: [alsa-devel] [PATCH V3 2/2] ASoC: samsung: Add machine driver for Odroid X2/U3
Hi Daniel, On 08/07/14 11:15, Daniel Drake wrote: Testing on ODROID-U2, v3 is not quite working for me, but v2 of the patch was fine. I boot up, run: # speaker-test -c 2 -t wav As soon as I hear the word front I press ctrl+c and then run the command again. Now the command hangs with no audible output. Any ideas? Let me know if you have trouble reproducing. I just posted a patch addressing this, please let me know if there are any further issues. -- Thanks, Sylwester -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] devicetree: Add generic IOMMU device tree bindings
On 7/9/2014 3:54 AM, Will Deacon wrote: On Wed, Jul 09, 2014 at 02:07:38AM +0100, Olav Haugan wrote: On 6/30/2014 2:52 AM, Will Deacon wrote: On Fri, Jun 27, 2014 at 11:23:27PM +0100, Olav Haugan wrote: Lets say I have an IOMMU with 2 masters and 2 SMRn slots with the following stream IDs coming from the masters: Master 1: 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28 Master 2: 0x30 To make this work I would program SMR[0] with StreamID 0x20 and mask 0xF to ignore lower 4 bits. SMR[1] would just be StreamID 0x30 with mask 0x0. However, I could also have an IOMMU with 2 masters and 9 SMRn slots with the following stream IDs: Master 1: 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28 Master 2: 0x29 Here I would program all SMRn and leave the mask to be 0 for all SMRn's. So how do I detect when to apply a mask or not? You would aim to use the smallest number of SMRs per master possible. You could probably use: Master 1: SMR[0].id == 0x20, SMR[0].mask = 0x07 SMR[1].id == 0x28, SMR[1].mask = 0x00 Master 2: SMR[2].id == 0x29, SMR[2].mask = 0x00 So how does an algorithm figure this out in both my examples? The algorithm would have to know about both (all) bus masters and their stream IDs for a specific SMMU. If the algorithm operates on the set of stream IDs for one bus master at a time the algorithm has no way of knowing which bits can be ignored since it doesn't know the value of the other stream IDs for the other bus masters and thus could potentially create a mask that could cause a stream ID to match in two different entries. Complete knowledge of the system topology (i.e. all bus masters) is a requirement for being able to configure the SMMU correctly if you want to guarantee that you don't have SMR aliasing issues. So you agree that an algorithm needs to know about all the bus masters/stream IDs for a specific IOMMU before it can figure out the StreamID masks and how many SMRs can be allocated to a specific bus master? Andreas's algorithm does not know about the other bus masters/stream IDs. It operates on one bus master at a time. I am not familiar with Andreas's proposal. Do you have a link? http://marc.info/?l=linux-arm-kernelm=139110598005846w=2 Unless I am mistaken the algorithm works on one bus master at a time. I don't think that will work. IIRC, it works for densely packed SIDs on the master, so it tries to build up power-of-2 sized groups for that master then mops up the rest with individual entries. I ran the algorithm through a few trivial cases: 1) Stream IDs: 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28 Number of SMRs: 9 In this case the algorithm decided to set mask to 0 for all entries using up 8 of the SMRs. 2) Same Stream IDs but only 2 SMRs. The algorithm gave an error saying I did not have enough SMRs. Thanks, Olav -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] mmc: dw_mmc: change to use recommended reset procedure
On Thu, Jul 10, 2014 at 5:28 AM, Seungwon Jeon tgih@samsung.com wrote:
Hi Sonny,
I have missed this patch.
You finally choose to take extra interrupt handling.
If it is not harm, it's fine.
Hi, thanks for coming back to it. Based on my tracing, the interrupt
seems to be okay and is just ignored.
Please check one thing below.
On Tue, June 10, 2014, Sonny Rao wrote:
This patch changes the fifo reset code to follow the reset procedure
outlined in the documentation of Synopsys Mobile storage host databook.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
---
v2: Add Generic DMA support
per the documentation, move interrupt clear before wait
make the test for DMA host-use_dma rather than host-using_dma
add proper return values (although it appears no caller checks)
v3: rename fifo reset function, and change callers
use this combined reset function in dw_mci_resume()
just one caller left (probe), so get rid of dw_mci_ctrl_all_reset()
use DMA reset bit for all systems which use DMA
remove extra IDMAC reset in dw_mci_work_routine_card()
do CIU clock update in error path, if CIU reset cleared
v4: remove comment about FIFO reset in dw_mci_work_routine_card()
move down error message when control reset clears but others don't
and clarify the error stating that we will still update clocks
make flags for all reset bits a macro
drivers/mmc/host/dw_mmc.c | 86
++-
drivers/mmc/host/dw_mmc.h | 5 +++
2 files changed, 68 insertions(+), 23 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 55cd110..1d6d984 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -111,8 +111,7 @@ static const u8 tuning_blk_pattern_8bit[] = {
0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
};
-static inline bool dw_mci_fifo_reset(struct dw_mci *host);
-static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
+static inline bool dw_mci_reset(struct dw_mci *host);
#if defined(CONFIG_DEBUG_FS)
static int dw_mci_req_show(struct seq_file *s, void *v)
@@ -1254,7 +1253,7 @@ static int dw_mci_data_complete(struct dw_mci *host,
struct mmc_data *data)
* After an error, there may be data lingering
* in the FIFO
*/
- dw_mci_fifo_reset(host);
+ dw_mci_reset(host);
} else {
data-bytes_xfered = data-blocks * data-blksz;
data-error = 0;
@@ -1371,7 +1370,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
/* CMD error in data command */
if (mrq-cmd-error mrq-data)
- dw_mci_fifo_reset(host);
+ dw_mci_reset(host);
host-cmd = NULL;
host-data = NULL;
@@ -1982,14 +1981,8 @@ static void dw_mci_work_routine_card(struct
work_struct *work)
}
/* Power down slot */
- if (present == 0) {
- /* Clear down the FIFO */
- dw_mci_fifo_reset(host);
-#ifdef CONFIG_MMC_DW_IDMAC
- dw_mci_idmac_reset(host);
-#endif
-
- }
+ if (present == 0)
+ dw_mci_reset(host);
spin_unlock_bh(host-lock);
@@ -2323,8 +2316,11 @@ static bool dw_mci_ctrl_reset(struct dw_mci *host,
u32 reset)
return false;
}
-static inline bool dw_mci_fifo_reset(struct dw_mci *host)
+static inline bool dw_mci_reset(struct dw_mci *host)
{
+ u32 flags = SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET;
+ bool ret = false;
+
/*
* Reseting generates a block interrupt, hence setting
* the scatter-gather pointer to NULL.
@@ -2334,15 +2330,59 @@ static inline bool dw_mci_fifo_reset(struct dw_mci
*host)
host-sg = NULL;
}
- return dw_mci_ctrl_reset(host, SDMMC_CTRL_FIFO_RESET);
-}
+ if (host-use_dma)
+ flags |= SDMMC_CTRL_DMA_RESET;
-static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host)
-{
- return dw_mci_ctrl_reset(host,
- SDMMC_CTRL_FIFO_RESET |
- SDMMC_CTRL_RESET |
- SDMMC_CTRL_DMA_RESET);
+ if (dw_mci_ctrl_reset(host, flags)) {
+ /*
+ * In all cases we clear the RAWINTS register to clear any
+ * interrupts.
+ */
+ mci_writel(host, RINTSTS, 0x);
+
+ /* if using dma we wait for dma_req to clear */
+ if (host-use_dma) {
+ unsigned long timeout = jiffies +
msecs_to_jiffies(500);
+ u32 status;
+
Re: [PATCH v7 08/24] mfd: max77686: Add Dynamic Voltage Scaling (DVS) support
Hello Linus,
On 07/10/2014 11:46 AM, Linus Walleij wrote:
On Fri, Jul 4, 2014 at 10:24 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Some regulators on the MAX77686 PMIC have Dynamic Voltage Scaling
(DVS) support that allows output voltage to change dynamically.
For MAX77686, these regulators are Buck regulators 2, 3 and 4.
Each Buck output voltage is selected using a set of external
inputs: DVS1-3 and SELB2-4.
DVS registers can be used to configure the output voltages for each
Buck regulator and which one is active is controled by DVSx lines.
SELBx lines are used to control if individual Buck lines are ON or OFF.
This patch adds support to configure the DVSx and SELBx lines
from DT and to setup and read the GPIO lines connected to them.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
(...)
+#include linux/gpio/consumer.h
THANKS for using modern interfaces!
Thanks to you and Alexandre for keep improving the GPIO subsystem!
+static void max77686_dt_parse_dvs_gpio(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int i;
+
+ /*
+* NOTE: we don't consider GPIO errors fatal; board may have some
lines
+* directly pulled high or low and thus doesn't specify them.
+*/
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++)
+ pd-buck_gpio_dvs[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-dvs,
i);
+
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++)
+ pd-buck_gpio_selb[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-selb,
i);
+}
Rob Jones has a patch cooking that adds gpio_get_array() so this thing
merits also adding devm_gpiod_get_array() I think?
Yes, I just asked [0] Rob on the other thread if he is already implementing the
descriptor-based version of his devm_request_gpio_array() or if I should go and
implement it.
Now, I wonder if that can be done in a follow-up patch (e.g: use the new
devm_gpiod_get_array once it lands in Torvalds tree) since this series already
touches several subsystems (mfd, regulators, clk and rtc) so if possible I would
prefer to not add another cross-subsystem dependency :)
+/**
+ * max77686_setup_gpios() - init DVS-related GPIOs
+ * @dev: device whose platform data contains the dvs GPIOs information
+ *
+ * This function claims / initalizations GPIOs related to DVS if they are
+ * defined. This may have the effect of switching voltages if the
+ * pdata-buck_default_idx does not match the boot time state of pins.
+ */
+int max77686_setup_gpios(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int buck_default_idx = pd-buck_default_idx;
+ int ret;
+ int i;
+
+ /* Set all SELB high to avoid glitching while DVS is changing */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+ /* OK if some GPIOs aren't defined */
+ if (IS_ERR(gpio))
+ continue;
+
+ ret = gpiod_direction_output_raw(gpio, 1);
Why does this have to be raw? Usually that is not to be used.
Right, I can't think of a good reason why this has to be raw and not just use
gpiod_direction_output() which will check the active-low flag and set the value
accordingly. I'll change it on the next revision.
Apart from this it looks OK.
Great, thanks a lot for your feedback.
Yours,
Linus Walleij
Best regards,
Javier
[0]: https://lkml.org/lkml/2014/7/10/722
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Re: [PATCH v7 08/24] mfd: max77686: Add Dynamic Voltage Scaling (DVS) support
Hello Amit,
On 07/10/2014 11:59 AM, amit daniel kachhap wrote:
On Sat, Jul 5, 2014 at 1:54 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Some regulators on the MAX77686 PMIC have Dynamic Voltage Scaling
(DVS) support that allows output voltage to change dynamically.
For MAX77686, these regulators are Buck regulators 2, 3 and 4.
Each Buck output voltage is selected using a set of external
inputs: DVS1-3 and SELB2-4.
DVS registers can be used to configure the output voltages for each
Buck regulator and which one is active is controled by DVSx lines.
SELBx lines are used to control if individual Buck lines are ON or OFF.
This patch adds support to configure the DVSx and SELBx lines
from DT and to setup and read the GPIO lines connected to them.
The entire series looks nice. Few minor comments from my side. I guess
still one more version in needed as per other ppls comment.
You may add,
Reviewed-by: Amit Daniel Kachhap amit.dan...@samsung.com
Thanks.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes since v6:
- Add a comment that max77686_read_gpios() function can sleep.
Sugggested by Krzysztof Kozlowski
---
drivers/mfd/max77686.c | 119
+++
include/linux/mfd/max77686.h | 18 ---
2 files changed, 129 insertions(+), 8 deletions(-)
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 8650832..d193873 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -32,8 +32,10 @@
#include linux/mfd/core.h
#include linux/mfd/max77686.h
#include linux/mfd/max77686-private.h
+#include linux/gpio/consumer.h
#include linux/err.h
#include linux/of.h
+#include linux/export.h
#define I2C_ADDR_RTC (0x0C 1)
@@ -101,9 +103,119 @@ static const struct of_device_id
max77686_pmic_dt_match[] = {
{},
};
+static void max77686_dt_parse_dvs_gpio(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int i;
+
+ /*
+* NOTE: we don't consider GPIO errors fatal; board may have some
lines
+* directly pulled high or low and thus doesn't specify them.
+*/
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++)
+ pd-buck_gpio_dvs[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-dvs,
i);
+
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++)
+ pd-buck_gpio_selb[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-selb,
i);
+}
+
+/**
+ * max77686_setup_gpios() - init DVS-related GPIOs
+ * @dev: device whose platform data contains the dvs GPIOs information
+ *
+ * This function claims / initalizations GPIOs related to DVS if they are
+ * defined. This may have the effect of switching voltages if the
+ * pdata-buck_default_idx does not match the boot time state of pins.
+ */
+int max77686_setup_gpios(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int buck_default_idx = pd-buck_default_idx;
+ int ret;
+ int i;
+
+ /* Set all SELB high to avoid glitching while DVS is changing */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+ /* OK if some GPIOs aren't defined */
+ if (IS_ERR(gpio))
+ continue;
+
+ ret = gpiod_direction_output_raw(gpio, 1);
+ if (ret) {
+ dev_err(dev, can't set gpio[%d] dir: %d\n, i, ret);
+ return ret;
+ }
+ }
+
+ /* Set our initial setting */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_dvs[i];
+
+ /* OK if some GPIOs aren't defined */
+ if (IS_ERR(gpio))
+ continue;
+
+ /* If a GPIO is valid, set it */
+ gpiod_direction_output(gpio, (buck_default_idx i) 1);
+ if (ret) {
+ dev_err(dev, can't set gpio[%d]: dir %d\n, i, ret);
+ return ret;
+ }
+ }
+
+ /* Now set SELB low to take effect */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+ if (!IS_ERR(gpio))
+ gpiod_set_value(gpio, 0);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(max77686_setup_gpios);
+
+/**
+ * max77686_read_gpios() - read the current state of the dvs GPIOs
+ * @pdata: platform data that contains the dvs GPIOs information
+ *
+ * We call this function at bootup to detect what slot the firmware was
+ * using for the DVS
Re: [PATCH v6 15/23] regulator: max77686: Setup DVS-related GPIOs on probe
Hello Amit,
On 07/10/2014 12:08 PM, amit daniel kachhap wrote:
On Fri, Jul 4, 2014 at 3:25 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
MAX77686 PMIC support Dyamic Voltage Scaling (DVS) on a set
of Buck regulators. A number of GPIO are connected to these
lines and are requested by the mfd driver. Setup the GPIO
pins from the regulator driver.
If possible merge this patch with patch 8. Both are adding DVS
support. Put regmap_copy dependency patch in very beginning.
As Lee already said, I split the changes to minimize the cross-subsystem churn.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/regulator/max77686.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers/regulator/max77686.c b/drivers/regulator/max77686.c
index ef1af2d..ecce77a 100644
--- a/drivers/regulator/max77686.c
+++ b/drivers/regulator/max77686.c
@@ -435,6 +435,12 @@ static int max77686_pmic_dt_parse_pdata(struct
platform_device *pdev,
}
#endif /* CONFIG_OF */
+static inline bool max77686_is_dvs_buck(int id)
+{
+ /* BUCK 2,3 and 4 support DVS */
+ return (id = MAX77686_BUCK2 id = MAX77686_BUCK4);
I am just wondering if along with above check, SELB gpios (if present)
can be used to confirm if BUCK's are DVS based or not.
I don't know if SELB gpios being present or not should be used to determine
whether a BUCK includes the DVS feature. AFAIK boards could have some of these
lines hardwired and pulled high or low instead of using a GPIO.
+}
+
static int max77686_pmic_probe(struct platform_device *pdev)
{
struct max77686_dev *iodev = dev_get_drvdata(pdev-dev.parent);
@@ -442,6 +448,9 @@ static int max77686_pmic_probe(struct platform_device
*pdev)
struct max77686_data *max77686;
int i, ret = 0;
struct regulator_config config = { };
+ unsigned int reg;
+ int buck_default_idx;
+ int buck_old_idx;
dev_dbg(pdev-dev, %s\n, __func__);
@@ -472,13 +481,34 @@ static int max77686_pmic_probe(struct platform_device
*pdev)
config.driver_data = max77686;
platform_set_drvdata(pdev, max77686);
+ buck_default_idx = pdata-buck_default_idx;
+ buck_old_idx = max77686_read_gpios(pdata);
+
for (i = 0; i MAX77686_REGULATORS; i++) {
struct regulator_dev *rdev;
+ int id = pdata-regulators[i].id;
config.init_data = pdata-regulators[i].initdata;
config.of_node = pdata-regulators[i].of_node;
max77686-opmode[i] = regulators[i].enable_mask;
+
+ if (max77686_is_dvs_buck(id)) {
+ /* Try to copy over data so we keep firmware
settings */
+ reg = regulators[i].vsel_reg;
+
+ ret = regmap_reg_copy(iodev-regmap,
+ reg + buck_default_idx,
+ reg + buck_old_idx);
+
+ if (ret)
+ dev_warn(pdev-dev, Copy err %d = %d
(%d)\n,
+reg + buck_old_idx,
+reg + buck_default_idx, ret);
+
+ regulators[i].vsel_reg += buck_default_idx;
+ }
+
rdev = devm_regulator_register(pdev-dev,
regulators[i], config);
if (IS_ERR(rdev)) {
@@ -488,6 +518,10 @@ static int max77686_pmic_probe(struct platform_device
*pdev)
}
}
+ ret = max77686_setup_gpios(iodev-dev);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.0.0.rc2
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Best regards,
Javier
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Re: [PATCH v2 2/4] usb: host: xhci-plat: Get PHYs for xhci's hcds
Hi Julius,
On Wed, Jul 9, 2014 at 11:26 PM, Julius Werner jwer...@chromium.org wrote:
On Wed, Jul 9, 2014 at 3:01 AM, Vivek Gautam gautam.vi...@samsung.com wrote:
The host controller by itself may sometimes need to handle PHY
and/or calibrate some of the PHY settings to get full support out
of the PHY controller. The PHY core provides a calibration
funtionality now to do so.
Therefore, facilitate getting the two possible PHYs, viz.
USB 2.0 type (UTMI+) and USB 3.0 type (PIPE3), provided
by the parent - Synopsys's DWC3 controller
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/usb/host/xhci-plat.c | 36
1 file changed, 36 insertions(+)
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
index 29d8adb..e50bd7d 100644
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -16,6 +16,7 @@
#include linux/module.h
#include linux/of.h
#include linux/platform_device.h
+#include linux/phy/phy.h
#include linux/slab.h
#include xhci.h
@@ -101,6 +102,7 @@ static int xhci_plat_probe(struct platform_device *pdev)
struct clk *clk;
int ret;
int irq;
+ struct device *parent;
if (usb_disabled())
return -ENODEV;
@@ -165,6 +167,23 @@ static int xhci_plat_probe(struct platform_device *pdev)
goto unmap_registers;
}
+ parent = pdev-dev.parent;
+ /*
+* Get possile USB 2.0 type PHY (UTMI+) registered by xhci's parent:
+* Synopsys-dwc3
+*/
+ if (of_device_is_compatible(parent-of_node, synopsys,dwc3) ||
+ of_device_is_compatible(parent-of_node, snps,dwc3)) {
+ hcd-gen_phy = devm_phy_get(pdev-dev, usb2-phy);
+ if (IS_ERR(hcd-gen_phy)) {
+ ret = PTR_ERR(hcd-gen_phy);
+ if (ret != -ENOSYS ret != -ENODEV) {
+ dev_err(pdev-dev, no usb2 phy
configured\n);
+ return ret;
+ }
+ }
+ }
Why does this need to check for DWC3? I think this code should be as
generic as possible. Can't you just devm_phy_get(usb2-phy), and keep
going with a dev_dbg() message if it fails? If the platform has a phy
it will find it, if not that's fine too.
Right, i was misled with the phy requisition in usb_add_hcd(), which i
thought would be
called first, and we would have been trying to overwrite the 'gen_phy'
member here. My bad!!
You are right, in this case we will not need the check for DWC3, and
we will still have the
liberty to get two different PHYs (usb2-phy and usb3-phy).
Looks like Heikki's patch assigns the phy names in DWC3-specific code,
so I'm not sure if they are supposed to be specific to that
controller... but DWC3 is the only merged XHCI controller this applys
to right now, so why not make that a general convention? The concept
of having one usb2-phy and one usb3-phy is probably common across
most xHC implementations (unless they share a single phy in which case
they could just leave one of them unset), so it will be much easier to
handle if they all chose the same two names for those (and we can
avoid a big list of special cases here).
Right, i will remove these checks then, and let this be generic so that each
xHCI could get 'usb2-phy' and 'usb3-phy', if it's available.
+
ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (ret)
goto disable_clk;
@@ -191,6 +210,23 @@ static int xhci_plat_probe(struct platform_device *pdev)
if (HCC_MAX_PSA(xhci-hcc_params) = 4)
xhci-shared_hcd-can_do_streams = 1;
+ /*
+* Get possile USB 3.0 type PHY (PIPE3) registered by xhci's parent:
+* Synopsys-dwc3
+*/
+ if (of_device_is_compatible(parent-of_node, synopsys,dwc3) ||
+ of_device_is_compatible(parent-of_node, snps,dwc3)) {
+ xhci-shared_hcd-gen_phy = devm_phy_get(pdev-dev,
+usb3-phy);
+ if (IS_ERR(xhci-shared_hcd-gen_phy)) {
+ ret = PTR_ERR(xhci-shared_hcd-gen_phy);
+ if (ret != -ENOSYS ret != -ENODEV) {
+ dev_err(pdev-dev, no usb3 phy
configured\n);
+ return ret;
+ }
+ }
+ }
+
ret = usb_add_hcd(xhci-shared_hcd, irq, IRQF_SHARED);
if (ret)
goto put_usb3_hcd;
--
1.7.10.4
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Best Regards
Vivek Gautam
Samsung RD Institute, Bangalore
India
--
To
[PATCHv5 1/5] mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
Almost Soc is used the slot per a host.
Don't use the slot-node and deprecated the supports-highsped property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
Tested-by: Sachin Kamat sachin.ka...@samsung.com
Acked-by: Seungwon Jeon tgih@samsung.com
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 +
.../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 +---
.../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 +---
3 files changed, 15 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 532b1d4..9308325 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -46,13 +46,14 @@ Required Properties:
- if CIU clock divider value is 0 (that is divide by 1), both tx and rx
phase shift clocks should be 0.
-Required properties for a slot:
+Required properties for a slot (Deprecated - Recommend to use one slot per a
host):
* gpios: specifies a list of gpios used for command, clock and data bus. The
first gpio is the command line and the second gpio is the clock line. The
rest of the gpios (depending on the bus-width property) are the data lines in
no particular order. The format of the gpio specifier depends on the gpio
controller.
+ (Deprecated - Refer to
Documentaion/devicetree/binding/pinctrl/samsung-pinctrl.txt)
Example:
@@ -69,21 +70,13 @@ Example:
dwmmc0@1220 {
num-slots = 1;
- supports-highspeed;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
broken-cd;
fifo-depth = 0x80;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 2 3;
samsung,dw-mshc-ddr-timing = 1 2;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- gpios = gpc0 0 2 0 3, gpc0 1 2 0 3,
- gpc1 0 2 3 3, gpc1 1 2 3 3,
- gpc1 2 2 3 3, gpc1 3 2 3 3,
- gpc0 3 2 3 3, gpc0 4 2 3 3,
- gpc0 5 2 3 3, gpc0 6 2 3 3;
- };
+ bus-width = 8;
};
diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
index e5bc49f..3b35449 100644
--- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
@@ -34,13 +34,11 @@ Example:
num-slots = 1;
vmmc-supply = ldo12;
fifo-depth = 0x100;
- supports-highspeed;
pinctrl-names = default;
pinctrl-0 = sd_pmx_pins sd_cfg_func1 sd_cfg_func2;
- slot@0 {
- reg = 0;
- bus-width = 4;
- disable-wp;
- cd-gpios = gpio10 3 0;
- };
+ bus-width = 4;
+ disable-wp;
+ cd-gpios = gpio10 3 0;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 2d4a725..346c609 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -67,7 +67,8 @@ Optional properties:
* card-detect-delay: Delay in milli-seconds before detecting card after card
insert event. The default value is 0.
-* supports-highspeed: Enables support for high speed cards (up to 50MHz)
+* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to
50MHz)
+ (use cap-mmc-highspeed or cap-sd-highspeed
instead)
* broken-cd: as documented in mmc core bindings.
@@ -98,14 +99,11 @@ board specific portions as listed below.
clock-frequency = 4;
clock-freq-min-max = 40 2;
num-slots = 1;
- supports-highspeed;
broken-cd;
fifo-depth = 0x80;
card-detect-delay = 200;
vmmc-supply = buck8;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
+ bus-width = 8;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
--
1.7.9.5
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More
[PATCHv5 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed property can be replaced to cap-sd/mmc-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
Reviewed-by: Heiko Stuebner he...@sntech.de
Acked-by: Seungwon Jeon tgih@samsung.com
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index afb3273..ecea889 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -59,12 +59,8 @@
pinctrl-names = default;
pinctrl-0 = sd0_clk sd0_cmd sd0_cd sd0_bus4;
vmmc-supply = vcc_sd0;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- disable-wp;
- };
+ bus-width = 4;
+ disable-wp;
};
dwmmc@10218000 { /* wifi */
@@ -74,12 +70,8 @@
pinctrl-names = default;
pinctrl-0 = sd1_clk sd1_cmd sd1_bus4;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- disable-wp;
- };
+ bus-width = 4;
+ disable-wp;
};
gpio-keys {
--
1.7.9.5
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[PATCHv5 5/5] mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk
Replaced the disable-wp into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Tested-by: Sachin Kamat sachin.ka...@samsung.com
Acked-by: Seungwon Jeon tgih@samsung.com
---
drivers/mmc/host/dw_mmc.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c..aa29dc4 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -997,7 +997,7 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
int gpio_ro = mmc_gpio_get_ro(mmc);
/* Use platform get_ro function, else try on board write protect */
- if (slot-quirks DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
+ if (slot-host-quirks DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
read_only = 0;
else if (!IS_ERR_VALUE(gpio_ro))
read_only = gpio_ro;
@@ -2006,12 +2006,7 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
static struct dw_mci_of_slot_quirks {
char *quirk;
int id;
-} of_slot_quirks[] = {
- {
- .quirk = disable-wp,
- .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
- },
-};
+} of_slot_quirks[] = {};
static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot)
{
@@ -2238,6 +2233,9 @@ static struct dw_mci_of_quirks {
{
.quirk = broken-cd,
.id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
+ }, {
+ .quirk = disable-wp,
+ .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
},
};
--
1.7.9.5
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[PATCHv5 3/5] ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed property can be replaced to cap-sd/mmc-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
Acked-by: Seungwon Jeon tgih@samsung.com
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_vt.dts|9 +++--
3 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi
b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 12d1c2c..468fc4c 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -29,13 +29,10 @@
dwmmc0@ff704000 {
num-slots = 1;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- };
+ bus-width = 4;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
sysmgr@ffd08000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index bf51182..1ee03c4 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -30,13 +30,10 @@
dwmmc0@ff704000 {
num-slots = 1;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- };
+ bus-width = 4;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff702000 {
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 09792b4..f9345e0 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -43,13 +43,10 @@
dwmmc0@ff704000 {
num-slots = 1;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- };
+ bus-width = 4;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff70 {
--
1.7.9.5
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[PATCHv5 0/5] ARM: remove the sub-node and deprecated supports-highspeed property for dwmmc.
Since used the mmc_of_parse(), didn't parse the sub-node. So we can remove the sub-node, because almost SoC used the only one card per a host. And supports-highspeed can be replaced to cap-mmc/sd-highspeed property. Changelog V5: - Rebased on v3.16-rc4. - Add Acked-by. Changelog V4: - Fix the checkpatch error. Changelog V3: - Fix the wrong bus-width value. - Use the slot-host-quirks instead of brq-quirks. - Add tested-by and reviewd-by. Changelog V2: - Add the mmc: dw_mmc: replace disable-wp from slot's quirks to host's quirk Jaehoon Chung (5): mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 - .../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 - .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 - arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++ arch/arm/boot/dts/exynos4412-origen.dts|8 ++ arch/arm/boot/dts/exynos4412-trats2.dts|8 ++ arch/arm/boot/dts/exynos5250-arndale.dts | 18 -- arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 ++-- arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 -- arch/arm/boot/dts/exynos5250-snow.dts |6 ++--- arch/arm/boot/dts/exynos5260-xyref5260.dts | 18 -- arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 -- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 +++- arch/arm/boot/dts/exynos5420-peach-pit.dts | 16 +++- arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 +++- arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 +++- arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16 +++- arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++ arch/arm/boot/dts/socfpga_cyclone5.dtsi|9 +++ arch/arm/boot/dts/socfpga_vt.dts |9 +++ drivers/mmc/host/dw_mmc.c | 12 - 21 files changed, 84 insertions(+), 204 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv5 2/5] ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed property can be replaced to cap-sd/mmc-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
Tested-by: Sachin Kamat sachin.ka...@samsung.com
Acked-by: Seungwon Jeon tgih@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++--
arch/arm/boot/dts/exynos4412-trats2.dts |8 ++--
arch/arm/boot/dts/exynos5250-arndale.dts | 18 +
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 +++--
arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 +
arch/arm/boot/dts/exynos5250-snow.dts |6 ++
arch/arm/boot/dts/exynos5260-xyref5260.dts| 18 +
arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 +
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 ---
arch/arm/boot/dts/exynos5420-peach-pit.dts| 16 ---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 ---
arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 ---
13 files changed, 51 insertions(+), 141 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts
b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 31db28a..778aec6 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -45,17 +45,13 @@
status = okay;
num-slots = 1;
- supports-highspeed;
broken-cd;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 2 3;
samsung,dw-mshc-ddr-timing = 1 2;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
+ bus-width = 8;
+ cap-mmc-highspeed;
};
regulator_p3v3 {
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index e925c9f..de15114 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -137,17 +137,13 @@
status = okay;
num-slots = 1;
- supports-highspeed;
broken-cd;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 2 3;
samsung,dw-mshc-ddr-timing = 1 2;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
+ bus-width = 8;
+ cap-mmc-highspeed;
};
codec@1340 {
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 7787844..65ab885 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -520,7 +520,6 @@
mmc@1255 {
num-slots = 1;
- supports-highspeed;
broken-cd;
non-removable;
card-detect-delay = 200;
@@ -532,11 +531,8 @@
pinctrl-0 = sd4_clk sd4_cmd sd4_bus4 sd4_bus8;
pinctrl-names = default;
status = okay;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
+ bus-width = 8;
+ cap-mmc-highspeed;
};
serial@1380 {
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index d0de1f5..42a3590 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -401,7 +401,6 @@
mmc_0: mmc@1220 {
status = okay;
num-slots = 1;
- supports-highspeed;
broken-cd;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
@@ -410,17 +409,13 @@
vmmc-supply = mmc_reg;
pinctrl-names = default;
pinctrl-0 = sd0_clk sd0_cmd sd0_bus4 sd0_bus8;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
+ bus-width = 8;
+ cap-mmc-highspeed;
};
mmc_2: mmc@1222 {
status = okay;
num-slots = 1;
- supports-highspeed;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 2 3;
@@ -428,12
Re: [PATCH v7 08/24] mfd: max77686: Add Dynamic Voltage Scaling (DVS) support
Hi, On Thu, Jul 10, 2014 at 6:45 PM, Javier Martinez Canillas javier.marti...@collabora.co.uk wrote: I think when DVS gpio is used all the 8 voltage levels are fetched from DT during booting and the registers are programmed accordingly. Any further set/get_voltage just changes the GPIO lines. Any reason why this method is not used? What are you describing is how the DT binding works for other Maxim PMICs that also have DVS support right? (e.g: max8997). The DVS binding in max77686/802 is actually a subset of the one in max8997 so it let's you only choose which single DVS index is going to be used. The GPIOs in max77686,pmic-buck-dvs-gpios should match pmic-buck-default-dvs-idx. To be honest I just took the DT binding that was used in the max77xxx driver from the Chrome OS 3.8 kernel and didn't compare it with other Maxim PMICs DT bingings. I wonder if I should just take the DVS patches out from this initial version to avoid blocking the max77802 support and then we can discuss this in more detail. To give background: * On exynos5250 / exynos5420 / exynos5800 the CPUFreq driver exposes more than 8 different operating points. You could argue about whether that's useful but that's the way it is right now. That means that using the GPIOs is not trivial (you'd have to use a mix of GPIOs and i2c and use heuristics). * On the Samsung Chromebook 2 we use the DVFS GPIOs to get back to a sane state after a warm reset. When the CPU resets itself all GPIOs will default back to their reset state. That will effectively transfer us to DVFS slot 0. We make sure that the kernel always modifies a different DVFS slot. * On all known boards all DVFS GPIOs were hooked up. I originally wrote code assuming that someone could design a board with fewer lines hooked up but I don't know of that being done. -Doug -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
