Re: [PATCH 00/29] Exynos SYSMMU (IOMMU) integration with DT and DMA-mapping subsystem
Hello, On 2014-08-19 01:32, Joerg Roedel wrote: On Tue, Aug 05, 2014 at 12:47:28PM +0200, Marek Szyprowski wrote: .../devicetree/bindings/iommu/samsung,sysmmu.txt | 93 ++- Documentation/power/notifiers.txt | 14 + arch/arm/boot/dts/exynos4.dtsi | 118 arch/arm/boot/dts/exynos4210.dtsi | 23 + arch/arm/boot/dts/exynos4x12.dtsi | 82 +++ arch/arm/include/asm/dma-iommu.h | 36 ++ arch/arm/mach-exynos/pm_domains.c | 12 +- arch/arm/mach-integrator/impd1.c | 2 +- arch/arm/mm/dma-mapping.c | 47 ++ drivers/base/bus.c | 4 +- drivers/base/dd.c | 10 +- drivers/base/platform.c| 2 +- drivers/base/power/domain.c| 70 ++- drivers/clk/samsung/clk-exynos4.c | 1 + drivers/gpu/drm/exynos/exynos_drm_fimc.c | 1 + drivers/gpu/drm/exynos/exynos_drm_fimd.c | 26 +- drivers/gpu/drm/exynos/exynos_drm_g2d.c| 1 + drivers/gpu/drm/exynos/exynos_drm_gsc.c| 1 + drivers/gpu/drm/exynos/exynos_drm_rotator.c| 1 + drivers/gpu/drm/exynos/exynos_mixer.c | 1 + drivers/iommu/exynos-iommu.c | 663 + drivers/iommu/iommu.c | 3 + drivers/media/platform/s5p-mfc/s5p_mfc.c | 107 ++-- drivers/pci/host/pci-mvebu.c | 2 +- drivers/pci/host/pci-rcar-gen2.c | 2 +- drivers/pci/host/pci-tegra.c | 2 +- drivers/pci/host/pcie-rcar.c | 2 +- drivers/soc/tegra/pmc.c| 2 +- include/dt-bindings/clock/exynos4.h| 10 +- include/linux/device.h | 12 +- include/linux/iommu.h | 1 + include/linux/pm.h | 2 + include/linux/pm_domain.h | 19 + 33 files changed, 1016 insertions(+), 356 deletions(-) This touches a lot of non-iommu stuff. What is your strategy on getting this in, do you plan to get the non-iommu changes merged first or do you want to collect the respective Acks and merge this all through one tree? Those patches are posted as one patchset mainly to demonstrate how to get everything to work together. I also posted this as a single patch series to get some feedback from other iommu developers, especially all those involved in the generic iommu dt bindings. For merging, I will split them into smaller series and try to get respective acks. Best regards -- Marek Szyprowski, PhD Samsung RD Institute Poland -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RESEND PATCH v4 0/2] Refactor the pm code to use DT based lookup
Refactoring the pm.c to avoid using soc_is_exynos checks, instead use the DT based lookup. While at it, move exynos5250 specific disabling of JPEG USE_RETENTION to pmu.c changes since v3: - Addressed comments from Tomasz Figa. changes since v2: - Addressed Tomasz Figa's comments to unify the functions for exynos4 and exynos5250. - Added new patch to move exynos5250 specific disabling of JPEG USE_RETENTION to pmu.c - Addressed comment from Thomas Abraham. changes since v1: - Address Kukjin Kim comments to respin this patch separately from http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/272574.html - removed panic, returned if no PMU node found and added check in exynos_wkup_irq. Rebased on Kukjin Kim's tree, for-next branch https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/log/?h=for-next Tested on 5250 based Chromebook. Vikas Sajjan (2): ARM: EXYNOS: Move Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c ARM: EXYNOS: Refactor the pm code to use DT based lookup arch/arm/mach-exynos/pm.c | 172 --- arch/arm/mach-exynos/pmu.c |1 + arch/arm/mach-exynos/regs-pmu.h |1 + 3 files changed, 127 insertions(+), 47 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RESEND PATCH v4 2/2] ARM: EXYNOS: Refactor the pm code to use DT based lookup
Refactoring the pm.c to avoid using soc_is_exynos checks,
instead use the DT based lookup.
While at it, consolidate the common code across SoCs
and create static helper functions.
Signed-off-by: Vikas Sajjan vikas.saj...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-exynos/pm.c | 167 +--
arch/arm/mach-exynos/regs-pmu.h |1 +
2 files changed, 126 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 31e209b..16b23d1 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -36,6 +36,8 @@
#include regs-pmu.h
#include regs-sys.h
+#define REG_TABLE_END (-1U)
+
/**
* struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
* @hwirq: Hardware IRQ signal of the GIC
@@ -59,6 +61,21 @@ static struct sleep_save exynos_core_save[] = {
SAVE_ITEM(S5P_SROM_BC3),
};
+struct exynos_pm_data {
+ const struct exynos_wkup_irq *wkup_irq;
+ struct sleep_save *extra_save;
+ int num_extra_save;
+ unsigned int wake_disable_mask;
+ unsigned int *release_ret_regs;
+
+ void (*pm_prepare)(void);
+ void (*pm_resume)(void);
+ int (*pm_suspend)(void);
+ int (*cpu_suspend)(unsigned long);
+};
+
+struct exynos_pm_data *pm_data;
+
/*
* GIC wake-up support
*/
@@ -77,14 +94,24 @@ static const struct exynos_wkup_irq exynos5250_wkup_irq[] =
{
{ /* sentinel */ },
};
+unsigned int exynos_release_ret_regs[] = {
+ S5P_PAD_RET_MAUDIO_OPTION,
+ S5P_PAD_RET_GPIO_OPTION,
+ S5P_PAD_RET_UART_OPTION,
+ S5P_PAD_RET_MMCA_OPTION,
+ S5P_PAD_RET_MMCB_OPTION,
+ S5P_PAD_RET_EBIA_OPTION,
+ S5P_PAD_RET_EBIB_OPTION,
+ REG_TABLE_END,
+};
+
static int exynos_irq_set_wake(struct irq_data *data, unsigned int state)
{
const struct exynos_wkup_irq *wkup_irq;
- if (soc_is_exynos5250())
- wkup_irq = exynos5250_wkup_irq;
- else
- wkup_irq = exynos4_wkup_irq;
+ if (!pm_data-wkup_irq)
+ return -ENOENT;
+ wkup_irq = pm_data-wkup_irq;
while (wkup_irq-mask) {
if (wkup_irq-hwirq == data-hwirq) {
@@ -229,15 +256,8 @@ void exynos_enter_aftr(void)
cpu_pm_exit();
}
-static int exynos_cpu_suspend(unsigned long arg)
+static int exynos_cpu_do_idle(void)
{
-#ifdef CONFIG_CACHE_L2X0
- outer_flush_all();
-#endif
-
- if (soc_is_exynos5250())
- flush_cache_all();
-
/* issue the standby signal into the pm unit. */
cpu_do_idle();
@@ -245,29 +265,44 @@ static int exynos_cpu_suspend(unsigned long arg)
return 1; /* Aborting suspend */
}
-static void exynos_pm_prepare(void)
+static int exynos_cpu_suspend(unsigned long arg)
{
- unsigned int tmp;
+ flush_cache_all();
+ outer_flush_all();
+ return exynos_cpu_do_idle();
+}
+static void exynos_pm_set_wakeup_mask(void)
+{
/* Set wake-up mask registers */
pmu_raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
pmu_raw_writel(exynos_irqwake_intmask ~(1 31), S5P_WAKEUP_MASK);
+}
- s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
-
- if (soc_is_exynos5250())
- s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
-
+static void exynos_pm_enter_sleep_mode(void)
+{
/* Set value of power down register for sleep mode */
-
exynos_sys_powerdown_conf(SYS_SLEEP);
pmu_raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
/* ensure at least INFORM0 has the resume address */
-
pmu_raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
}
+static void exynos_pm_prepare(void)
+{
+ /* Set wake-up mask registers */
+ exynos_pm_set_wakeup_mask();
+
+ s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
+
+if (pm_data-extra_save)
+ s3c_pm_do_save(pm_data-extra_save,
+ pm_data-num_extra_save);
+
+ exynos_pm_enter_sleep_mode();
+}
+
static int exynos_pm_suspend(void)
{
unsigned long tmp;
@@ -285,6 +320,15 @@ static int exynos_pm_suspend(void)
return 0;
}
+static void exynos_pm_release_retention(void)
+{
+ unsigned int i;
+
+ for (i = 0; (pm_data-release_ret_regs[i] != REG_TABLE_END); i++)
+ pmu_raw_writel(EXYNOS_WAKEUP_FROM_LOWPWR,
+ pm_data-release_ret_regs[i]);
+}
+
static void exynos_pm_resume(void)
{
if (exynos_pm_central_resume())
@@ -294,18 +338,11 @@ static void exynos_pm_resume(void)
exynos_cpu_restore_register();
/* For release retention */
+ exynos_pm_release_retention();
- pmu_raw_writel((1 28), S5P_PAD_RET_MAUDIO_OPTION);
- pmu_raw_writel((1 28), S5P_PAD_RET_GPIO_OPTION);
- pmu_raw_writel((1 28), S5P_PAD_RET_UART_OPTION);
-
[RESEND PATCH v4 1/2] ARM: EXYNOS: Move Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c
Move the Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c to make way for
refactoring of pm.c and to create common functions across exynos4 and
exynos5250.
Signed-off-by: Vikas Sajjan vikas.saj...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-exynos/pm.c |7 +--
arch/arm/mach-exynos/pmu.c |1 +
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index abefacb..31e209b 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -255,13 +255,8 @@ static void exynos_pm_prepare(void)
s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
- if (soc_is_exynos5250()) {
+ if (soc_is_exynos5250())
s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
- /* Disable USE_RETENTION of JPEG_MEM_OPTION */
- tmp = pmu_raw_readl(EXYNOS5_JPEG_MEM_OPTION);
- tmp = ~EXYNOS5_OPTION_USE_RETENTION;
- pmu_raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);
- }
/* Set value of power down register for sleep mode */
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index ff9d23f..cfc62e8 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -264,6 +264,7 @@ static const struct exynos_pmu_conf exynos5250_pmu_config[]
= {
{ EXYNOS5_INTRAM_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
{ EXYNOS5_INTROM_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
{ EXYNOS5_JPEG_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
+ { EXYNOS5_JPEG_MEM_OPTION, { 0x10, 0x10, 0x0} },
{ EXYNOS5_HSI_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
{ EXYNOS5_MCUIOP_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
{ EXYNOS5_SATA_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
--
1.7.9.5
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Re: [RESEND PATCH v4 2/2] ARM: EXYNOS: Refactor the pm code to use DT based lookup
Hi Kukjin,
On Tue, Aug 19, 2014 at 12:22 PM, Vikas Sajjan vikas.saj...@samsung.com wrote:
Refactoring the pm.c to avoid using soc_is_exynos checks,
instead use the DT based lookup.
While at it, consolidate the common code across SoCs
and create static helper functions.
Signed-off-by: Vikas Sajjan vikas.saj...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Can you pick this series...
---
arch/arm/mach-exynos/pm.c | 167
+--
arch/arm/mach-exynos/regs-pmu.h |1 +
2 files changed, 126 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 31e209b..16b23d1 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -36,6 +36,8 @@
#include regs-pmu.h
#include regs-sys.h
+#define REG_TABLE_END (-1U)
+
/**
* struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
* @hwirq: Hardware IRQ signal of the GIC
@@ -59,6 +61,21 @@ static struct sleep_save exynos_core_save[] = {
SAVE_ITEM(S5P_SROM_BC3),
};
+struct exynos_pm_data {
+ const struct exynos_wkup_irq *wkup_irq;
+ struct sleep_save *extra_save;
+ int num_extra_save;
+ unsigned int wake_disable_mask;
+ unsigned int *release_ret_regs;
+
+ void (*pm_prepare)(void);
+ void (*pm_resume)(void);
+ int (*pm_suspend)(void);
+ int (*cpu_suspend)(unsigned long);
+};
+
+struct exynos_pm_data *pm_data;
+
/*
* GIC wake-up support
*/
@@ -77,14 +94,24 @@ static const struct exynos_wkup_irq exynos5250_wkup_irq[]
= {
{ /* sentinel */ },
};
+unsigned int exynos_release_ret_regs[] = {
+ S5P_PAD_RET_MAUDIO_OPTION,
+ S5P_PAD_RET_GPIO_OPTION,
+ S5P_PAD_RET_UART_OPTION,
+ S5P_PAD_RET_MMCA_OPTION,
+ S5P_PAD_RET_MMCB_OPTION,
+ S5P_PAD_RET_EBIA_OPTION,
+ S5P_PAD_RET_EBIB_OPTION,
+ REG_TABLE_END,
+};
+
static int exynos_irq_set_wake(struct irq_data *data, unsigned int state)
{
const struct exynos_wkup_irq *wkup_irq;
- if (soc_is_exynos5250())
- wkup_irq = exynos5250_wkup_irq;
- else
- wkup_irq = exynos4_wkup_irq;
+ if (!pm_data-wkup_irq)
+ return -ENOENT;
+ wkup_irq = pm_data-wkup_irq;
while (wkup_irq-mask) {
if (wkup_irq-hwirq == data-hwirq) {
@@ -229,15 +256,8 @@ void exynos_enter_aftr(void)
cpu_pm_exit();
}
-static int exynos_cpu_suspend(unsigned long arg)
+static int exynos_cpu_do_idle(void)
{
-#ifdef CONFIG_CACHE_L2X0
- outer_flush_all();
-#endif
-
- if (soc_is_exynos5250())
- flush_cache_all();
-
/* issue the standby signal into the pm unit. */
cpu_do_idle();
@@ -245,29 +265,44 @@ static int exynos_cpu_suspend(unsigned long arg)
return 1; /* Aborting suspend */
}
-static void exynos_pm_prepare(void)
+static int exynos_cpu_suspend(unsigned long arg)
{
- unsigned int tmp;
+ flush_cache_all();
+ outer_flush_all();
+ return exynos_cpu_do_idle();
+}
+static void exynos_pm_set_wakeup_mask(void)
+{
/* Set wake-up mask registers */
pmu_raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
pmu_raw_writel(exynos_irqwake_intmask ~(1 31), S5P_WAKEUP_MASK);
+}
- s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
-
- if (soc_is_exynos5250())
- s3c_pm_do_save(exynos5_sys_save,
ARRAY_SIZE(exynos5_sys_save));
-
+static void exynos_pm_enter_sleep_mode(void)
+{
/* Set value of power down register for sleep mode */
-
exynos_sys_powerdown_conf(SYS_SLEEP);
pmu_raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
/* ensure at least INFORM0 has the resume address */
-
pmu_raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
}
+static void exynos_pm_prepare(void)
+{
+ /* Set wake-up mask registers */
+ exynos_pm_set_wakeup_mask();
+
+ s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
+
+if (pm_data-extra_save)
+ s3c_pm_do_save(pm_data-extra_save,
+ pm_data-num_extra_save);
+
+ exynos_pm_enter_sleep_mode();
+}
+
static int exynos_pm_suspend(void)
{
unsigned long tmp;
@@ -285,6 +320,15 @@ static int exynos_pm_suspend(void)
return 0;
}
+static void exynos_pm_release_retention(void)
+{
+ unsigned int i;
+
+ for (i = 0; (pm_data-release_ret_regs[i] != REG_TABLE_END); i++)
+ pmu_raw_writel(EXYNOS_WAKEUP_FROM_LOWPWR,
+ pm_data-release_ret_regs[i]);
+}
+
static void exynos_pm_resume(void)
{
if (exynos_pm_central_resume())
@@ -294,18 +338,11 @@ static void exynos_pm_resume(void)
exynos_cpu_restore_register();
/*
Re: [PATCH] ARM: Exynos: remove arm diagnostic and power register save/restore code
On Mon, Aug 11, 2014 at 11:52 AM, Chander Kashyap k.chan...@samsung.com wrote:
As save/restore of arm diagnostic and power registers is handled by
generic code, so remove the same.
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
arch/arm/mach-exynos/pm.c | 54
++---
1 file changed, 2 insertions(+), 52 deletions(-)
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 18646b7..af99c55 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -134,45 +134,6 @@ void exynos_enter_aftr(void)
exynos_sys_powerdown_conf(SYS_AFTR);
}
-/* For Cortex-A9 Diagnostic and Power control register */
-static unsigned int save_arm_register[2];
-
-static void exynos_cpu_save_register(void)
-{
- unsigned long tmp;
-
- /* Save Power control register */
- asm (mrc p15, 0, %0, c15, c0, 0
-: =r (tmp) : : cc);
-
- save_arm_register[0] = tmp;
-
- /* Save Diagnostic register */
- asm (mrc p15, 0, %0, c15, c0, 1
-: =r (tmp) : : cc);
-
- save_arm_register[1] = tmp;
-}
-
-static void exynos_cpu_restore_register(void)
-{
- unsigned long tmp;
-
- /* Restore Power control register */
- tmp = save_arm_register[0];
-
- asm volatile (mcr p15, 0, %0, c15, c0, 0
- : : r (tmp)
- : cc);
-
- /* Restore Diagnostic register */
- tmp = save_arm_register[1];
-
- asm volatile (mcr p15, 0, %0, c15, c0, 1
- : : r (tmp)
- : cc);
-}
-
static int exynos_cpu_suspend(unsigned long arg)
{
#ifdef CONFIG_CACHE_L2X0
@@ -238,9 +199,6 @@ static int exynos_pm_suspend(void)
tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
- if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
- exynos_cpu_save_register();
-
return 0;
}
@@ -272,9 +230,6 @@ static void exynos_pm_resume(void)
if (exynos_pm_central_resume())
goto early_wakeup;
- if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
- exynos_cpu_restore_register();
-
/* For release retention */
pmu_raw_writel((1 28), S5P_PAD_RET_MAUDIO_OPTION);
@@ -376,19 +331,14 @@ static int exynos_cpu_pm_notifier(struct notifier_block
*self,
switch (cmd) {
case CPU_PM_ENTER:
- if (cpu == 0) {
+ if (cpu == 0)
exynos_pm_central_suspend();
- if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
- exynos_cpu_save_register();
- }
break;
case CPU_PM_EXIT:
if (cpu == 0) {
- if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {
+ if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
scu_enable(S5P_VA_SCU);
- exynos_cpu_restore_register();
- }
exynos_pm_central_resume();
}
break;
Hi Kukjin,
Can you take this patch?
--
1.7.9.5
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Re: [RESEND PATCH v4 2/2] ARM: EXYNOS: Refactor the pm code to use DT based lookup
Hi,
On Tuesday, August 19, 2014 01:26:49 PM Vikas Sajjan wrote:
Hi Kukjin,
On Tue, Aug 19, 2014 at 12:22 PM, Vikas Sajjan vikas.saj...@samsung.com
wrote:
Refactoring the pm.c to avoid using soc_is_exynos checks,
instead use the DT based lookup.
While at it, consolidate the common code across SoCs
and create static helper functions.
Signed-off-by: Vikas Sajjan vikas.saj...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Can you pick this series...
I think that my PM_SLEEP=n build fixes should go in before this cleanup
series:
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg35430.html
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung RD Institute Poland
Samsung Electronics
---
arch/arm/mach-exynos/pm.c | 167
+--
arch/arm/mach-exynos/regs-pmu.h |1 +
2 files changed, 126 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 31e209b..16b23d1 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -36,6 +36,8 @@
#include regs-pmu.h
#include regs-sys.h
+#define REG_TABLE_END (-1U)
+
/**
* struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
* @hwirq: Hardware IRQ signal of the GIC
@@ -59,6 +61,21 @@ static struct sleep_save exynos_core_save[] = {
SAVE_ITEM(S5P_SROM_BC3),
};
+struct exynos_pm_data {
+ const struct exynos_wkup_irq *wkup_irq;
+ struct sleep_save *extra_save;
+ int num_extra_save;
+ unsigned int wake_disable_mask;
+ unsigned int *release_ret_regs;
+
+ void (*pm_prepare)(void);
+ void (*pm_resume)(void);
+ int (*pm_suspend)(void);
+ int (*cpu_suspend)(unsigned long);
+};
+
+struct exynos_pm_data *pm_data;
+
/*
* GIC wake-up support
*/
@@ -77,14 +94,24 @@ static const struct exynos_wkup_irq
exynos5250_wkup_irq[] = {
{ /* sentinel */ },
};
+unsigned int exynos_release_ret_regs[] = {
+ S5P_PAD_RET_MAUDIO_OPTION,
+ S5P_PAD_RET_GPIO_OPTION,
+ S5P_PAD_RET_UART_OPTION,
+ S5P_PAD_RET_MMCA_OPTION,
+ S5P_PAD_RET_MMCB_OPTION,
+ S5P_PAD_RET_EBIA_OPTION,
+ S5P_PAD_RET_EBIB_OPTION,
+ REG_TABLE_END,
+};
+
static int exynos_irq_set_wake(struct irq_data *data, unsigned int state)
{
const struct exynos_wkup_irq *wkup_irq;
- if (soc_is_exynos5250())
- wkup_irq = exynos5250_wkup_irq;
- else
- wkup_irq = exynos4_wkup_irq;
+ if (!pm_data-wkup_irq)
+ return -ENOENT;
+ wkup_irq = pm_data-wkup_irq;
while (wkup_irq-mask) {
if (wkup_irq-hwirq == data-hwirq) {
@@ -229,15 +256,8 @@ void exynos_enter_aftr(void)
cpu_pm_exit();
}
-static int exynos_cpu_suspend(unsigned long arg)
+static int exynos_cpu_do_idle(void)
{
-#ifdef CONFIG_CACHE_L2X0
- outer_flush_all();
-#endif
-
- if (soc_is_exynos5250())
- flush_cache_all();
-
/* issue the standby signal into the pm unit. */
cpu_do_idle();
@@ -245,29 +265,44 @@ static int exynos_cpu_suspend(unsigned long arg)
return 1; /* Aborting suspend */
}
-static void exynos_pm_prepare(void)
+static int exynos_cpu_suspend(unsigned long arg)
{
- unsigned int tmp;
+ flush_cache_all();
+ outer_flush_all();
+ return exynos_cpu_do_idle();
+}
+static void exynos_pm_set_wakeup_mask(void)
+{
/* Set wake-up mask registers */
pmu_raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
pmu_raw_writel(exynos_irqwake_intmask ~(1 31),
S5P_WAKEUP_MASK);
+}
- s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
-
- if (soc_is_exynos5250())
- s3c_pm_do_save(exynos5_sys_save,
ARRAY_SIZE(exynos5_sys_save));
-
+static void exynos_pm_enter_sleep_mode(void)
+{
/* Set value of power down register for sleep mode */
-
exynos_sys_powerdown_conf(SYS_SLEEP);
pmu_raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
/* ensure at least INFORM0 has the resume address */
-
pmu_raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
}
+static void exynos_pm_prepare(void)
+{
+ /* Set wake-up mask registers */
+ exynos_pm_set_wakeup_mask();
+
+ s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
+
+if (pm_data-extra_save)
+ s3c_pm_do_save(pm_data-extra_save,
+ pm_data-num_extra_save);
+
+ exynos_pm_enter_sleep_mode();
+}
+
static int exynos_pm_suspend(void)
{
unsigned long tmp;
@@ -285,6 +320,15 @@ static int exynos_pm_suspend(void)
return 0;
}
Re: [PATCH] ARM: Exynos: remove arm diagnostic and power register save/restore code
Hi,
On Tuesday, August 19, 2014 02:58:31 PM Chander Kashyap wrote:
On Mon, Aug 11, 2014 at 11:52 AM, Chander Kashyap k.chan...@samsung.com
wrote:
As save/restore of arm diagnostic and power registers is handled by
generic code, so remove the same.
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
arch/arm/mach-exynos/pm.c | 54
++---
1 file changed, 2 insertions(+), 52 deletions(-)
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 18646b7..af99c55 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -134,45 +134,6 @@ void exynos_enter_aftr(void)
exynos_sys_powerdown_conf(SYS_AFTR);
}
-/* For Cortex-A9 Diagnostic and Power control register */
-static unsigned int save_arm_register[2];
-
-static void exynos_cpu_save_register(void)
-{
- unsigned long tmp;
-
- /* Save Power control register */
- asm (mrc p15, 0, %0, c15, c0, 0
-: =r (tmp) : : cc);
-
- save_arm_register[0] = tmp;
-
- /* Save Diagnostic register */
- asm (mrc p15, 0, %0, c15, c0, 1
-: =r (tmp) : : cc);
-
- save_arm_register[1] = tmp;
-}
-
-static void exynos_cpu_restore_register(void)
-{
- unsigned long tmp;
-
- /* Restore Power control register */
- tmp = save_arm_register[0];
-
- asm volatile (mcr p15, 0, %0, c15, c0, 0
- : : r (tmp)
- : cc);
-
- /* Restore Diagnostic register */
- tmp = save_arm_register[1];
-
- asm volatile (mcr p15, 0, %0, c15, c0, 1
- : : r (tmp)
- : cc);
-}
-
static int exynos_cpu_suspend(unsigned long arg)
{
#ifdef CONFIG_CACHE_L2X0
@@ -238,9 +199,6 @@ static int exynos_pm_suspend(void)
tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
- if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
- exynos_cpu_save_register();
-
return 0;
}
@@ -272,9 +230,6 @@ static void exynos_pm_resume(void)
if (exynos_pm_central_resume())
goto early_wakeup;
- if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
- exynos_cpu_restore_register();
-
/* For release retention */
pmu_raw_writel((1 28), S5P_PAD_RET_MAUDIO_OPTION);
@@ -376,19 +331,14 @@ static int exynos_cpu_pm_notifier(struct
notifier_block *self,
switch (cmd) {
case CPU_PM_ENTER:
- if (cpu == 0) {
+ if (cpu == 0)
exynos_pm_central_suspend();
- if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
- exynos_cpu_save_register();
- }
break;
case CPU_PM_EXIT:
if (cpu == 0) {
- if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {
+ if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
scu_enable(S5P_VA_SCU);
- exynos_cpu_restore_register();
- }
exynos_pm_central_resume();
}
break;
Hi Kukjin,
Can you take this patch?
Your cleanup patch won't apply to the current kernels becaouse
exynos_cpu_pm_notifier() has been removed. Please resfresh it.
While refreshing it please rebase it on top of my PM_SLEEP=n build
fixes:
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg35430.html
Please also update patch description to point to the generic code
that does arm diagnostic and power register save/restore code.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung RD Institute Poland
Samsung Electronics
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] ARM: dts: Enable PMIC interrupts on ODROID
Hi,
On Monday, August 18, 2014 11:43:07 AM Kukjin Kim wrote:
On 08/12/14 08:06, Tomeu Vizoso wrote:
Tested on an Odroid-U2:
Tested-by: Tomeu Vizosoto...@tomeuvizoso.net
Thanks,
Tomeu
On 16 July 2014 10:50, Daniel Drakedr...@endlessm.com wrote:
The ODROID kernel shows that the PMIC interrupt line is hooked up
to pin GPX3-2.
This is needed for the max77686-irq driver to create the PMIC IRQ
domain, which is needed by max77686-rtc.
Signed-off-by: Daniel Drakedr...@endlessm.com
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 6d6d23c..cb6f55f 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -148,6 +148,10 @@
max77686: pmic@09 {
compatible = maxim,max77686;
+ interrupt-parent =gpx3;
+ interrupts =2 0;
+ pinctrl-names = default;
+ pinctrl-0 =max77686_irq;
reg =0x09;
#clock-cells =1;
@@ -368,4 +372,11 @@
samsung,pins = gpx1-3;
samsung,pin-pud =0;
};
+
+ max77686_irq: max77686-irq {
+ samsung,pins = gpx3-2;
+ samsung,pin-function =0;
+ samsung,pin-pud =0;
+ samsung,pin-drv =0;
+ };
};
Thanks, applied this series.
Unfortunately these patches were applied to v3.18-next/dt-samsung
branch and not v3.17-samsung-fixes-1 one.
IMHO they should go to upstream ASAP as they fix the boot for
ODROID boards and they cannot break anything as they are limited
to ODROID dts files.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung RD Institute Poland
Samsung Electronics
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] ARM: dts: Enable PMIC interrupts on ODROID
Hello, On Tue, Aug 19, 2014 at 11:57 AM, Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com wrote: IMHO they should go to upstream ASAP as they fix the boot for ODROID boards and they cannot break anything as they are limited to ODROID dts files. Agreed, this is definitely -rc material IMHO. Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] mmc: core: Use regulator_get_voltage() if OCR mask is empty.
Hello Ulf, On 08/15/2014 04:51 PM, Ulf Hansson wrote: Just wanted to add some input regarding the errors in the mmc case. These are of high importance. In principle if you get, Failed getting OCR mask: -22, likely you will be using a wrong OCR mask while negotiating the voltage level with the card. So, somehow we need to address this issue. And do you think that $subject is the right approach to solve this issue? If not please let me know so I can address that. Kind regards Uffe Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/29] Exynos SYSMMU (IOMMU) integration with DT and DMA-mapping subsystem
Hi Marek and Inki, Am 19.08.2014 08:07, schrieb Marek Szyprowski: On 2014-08-19 01:32, Joerg Roedel wrote: On Tue, Aug 05, 2014 at 12:47:28PM +0200, Marek Szyprowski wrote: [...] 33 files changed, 1016 insertions(+), 356 deletions(-) This touches a lot of non-iommu stuff. What is your strategy on getting this in, do you plan to get the non-iommu changes merged first or do you want to collect the respective Acks and merge this all through one tree? Those patches are posted as one patchset mainly to demonstrate how to get everything to work together. I also posted this as a single patch series to get some feedback from other iommu developers, especially all those involved in the generic iommu dt bindings. For merging, I will split them into smaller series and try to get respective acks. I'm working on 5250 based Spring Chromebook and noticed that v3.17-rc1 got some more iommu support. With the new CONFIG_DRM_EXYNOS_IOMMU=y my machine stops booting. So I'm wondering, is any of this a fix for 3.17, or is all of this unrelated -next material? Also, are you or someone working on the respective DT changes for Exynos5? Regards, Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] thermal: exynos: Add support for TRIM_RELOAD feature at Exynos3250
This patch add support for TRIM_RELOAD feature at Exynos3250. The TMU of
Exynos3250 has two TRIMINFO_CON register.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Zhang Rui rui.zh...@intel.com
Cc: Eduardo Valentin edubez...@gmail.com
---
drivers/thermal/samsung/exynos_tmu.c | 7 +--
drivers/thermal/samsung/exynos_tmu.h | 5 +++--
drivers/thermal/samsung/exynos_tmu_data.c | 9 -
drivers/thermal/samsung/exynos_tmu_data.h | 7 +--
4 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index acbff14..ed01606 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -164,8 +164,11 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
}
}
- if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
- __raw_writel(1, data-base + reg-triminfo_ctrl);
+ if (TMU_SUPPORTS(pdata, TRIM_RELOAD)) {
+ for (i = 0; i pdata-triminfo_reload_count; i++)
+ __raw_writel(pdata-triminfo_reload[i],
+ data-base + reg-triminfo_ctrl[i]);
+ }
if (pdata-cal_mode == HW_MODE)
goto skip_calib_data;
diff --git a/drivers/thermal/samsung/exynos_tmu.h
b/drivers/thermal/samsung/exynos_tmu.h
index 1b4a644..72cb54e 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -151,8 +151,7 @@ struct exynos_tmu_registers {
u32 triminfo_25_shift;
u32 triminfo_85_shift;
- u32 triminfo_ctrl;
- u32 triminfo_ctrl1;
+ u32 triminfo_ctrl[2];
u32 triminfo_reload_shift;
u32 tmu_ctrl;
@@ -295,6 +294,8 @@ struct exynos_tmu_platform_data {
u8 second_point_trim;
u8 default_temp_offset;
u8 test_mux;
+ u8 triminfo_reload[2];
+ u8 triminfo_reload_count;
enum calibration_type cal_type;
enum calibration_mode cal_mode;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index aa8e0de..25f9890 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -95,6 +95,8 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON1,
+ .triminfo_ctrl[1] = EXYNOS_TMU_TRIMINFO_CON2,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
.buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
@@ -160,6 +162,9 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload[1] = 0x11, \
+ .triminfo_reload_count = 2, \
.registers = exynos3250_tmu_registers, \
.features = (TMU_SUPPORT_EMULATION | \
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
@@ -184,7 +189,7 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
- .triminfo_ctrl = EXYNOS_TMU_TRIMINFO_CON,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON2,
.triminfo_reload_shift = EXYNOS_TRIMINFO_RELOAD_SHIFT,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
@@ -252,6 +257,8 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload_count = 1, \
.registers = exynos4412_tmu_registers, \
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h
b/drivers/thermal/samsung/exynos_tmu_data.h
index f0979e5..e0536c3 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -57,8 +57,11 @@
#define EXYNOS4210_TMU_TRIG_LEVEL_MASK 0x
#define EXYNOS4210_TMU_INTCLEAR_VAL0x
-/* Exynos5250 and Exynos4412 specific registers */
-#define EXYNOS_TMU_TRIMINFO_CON0x14
+/* Exynos3250 specific registers */
+#define EXYNOS_TMU_TRIMINFO_CON1 0x10
+
+/* Exynos5250, Exynos4412 and Exynos3250 specific registers */
+#define EXYNOS_TMU_TRIMINFO_CON2 0x14
#define EXYNOS_THD_TEMP_RISE 0x50
#define EXYNOS_THD_TEMP_FALL
Re: [PATCH 00/29] Exynos SYSMMU (IOMMU) integration with DT and DMA-mapping subsystem
Hello, On 2014-08-19 13:39, Andreas Färber wrote: Hi Marek and Inki, Am 19.08.2014 08:07, schrieb Marek Szyprowski: On 2014-08-19 01:32, Joerg Roedel wrote: On Tue, Aug 05, 2014 at 12:47:28PM +0200, Marek Szyprowski wrote: [...] 33 files changed, 1016 insertions(+), 356 deletions(-) This touches a lot of non-iommu stuff. What is your strategy on getting this in, do you plan to get the non-iommu changes merged first or do you want to collect the respective Acks and merge this all through one tree? Those patches are posted as one patchset mainly to demonstrate how to get everything to work together. I also posted this as a single patch series to get some feedback from other iommu developers, especially all those involved in the generic iommu dt bindings. For merging, I will split them into smaller series and try to get respective acks. I'm working on 5250 based Spring Chromebook and noticed that v3.17-rc1 got some more iommu support. With the new CONFIG_DRM_EXYNOS_IOMMU=y my machine stops booting. So I'm wondering, is any of this a fix for 3.17, or is all of this unrelated -next material? This is probably a side effect of patch 3170447c1f264d51b8d1f3898bf2588588a64fdc (iommu/exynos: Select ARM_DMA_USE_IOMMU). It added selection of ARM_DMA_USE_IOMMU symbol, on which IOMMU support in Exynos DRM subsystem depends. However selecting this symbol is all that this patch does, without providing any code code which implements real support for ARM DMA IOMMU integration, which is needed by Exynos DRM driver. Please disable CONFIG_DRM_EXYNOS_IOMMU in kernel .config and your system should be bootable again. Also, are you or someone working on the respective DT changes for Exynos5? I can prepare DT changes for Exynos5 as well, but first I wanted to clarify if everyone involved in generic IOMMU bindings and Exynos IOMMU driver agrees on my proposal. Best regards -- Marek Szyprowski, PhD Samsung RD Institute Poland -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv2] thermal: exynos: Add support for TRIM_RELOAD feature at Exynos3250
This patch add support for TRIM_RELOAD feature at Exynos3250. The TMU of
Exynos3250 has two TRIMINFO_CON register.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Zhang Rui rui.zh...@intel.com
Cc: Eduardo Valentin edubez...@gmail.com
---
Changes from v1:
- Add missing 'TMU_SUPPORT_TRIM_RELOAD' features
drivers/thermal/samsung/exynos_tmu.c | 7 +--
drivers/thermal/samsung/exynos_tmu.h | 5 +++--
drivers/thermal/samsung/exynos_tmu_data.c | 11 +--
drivers/thermal/samsung/exynos_tmu_data.h | 7 +--
4 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index acbff14..ed01606 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -164,8 +164,11 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
}
}
- if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
- __raw_writel(1, data-base + reg-triminfo_ctrl);
+ if (TMU_SUPPORTS(pdata, TRIM_RELOAD)) {
+ for (i = 0; i pdata-triminfo_reload_count; i++)
+ __raw_writel(pdata-triminfo_reload[i],
+ data-base + reg-triminfo_ctrl[i]);
+ }
if (pdata-cal_mode == HW_MODE)
goto skip_calib_data;
diff --git a/drivers/thermal/samsung/exynos_tmu.h
b/drivers/thermal/samsung/exynos_tmu.h
index 1b4a644..72cb54e 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -151,8 +151,7 @@ struct exynos_tmu_registers {
u32 triminfo_25_shift;
u32 triminfo_85_shift;
- u32 triminfo_ctrl;
- u32 triminfo_ctrl1;
+ u32 triminfo_ctrl[2];
u32 triminfo_reload_shift;
u32 tmu_ctrl;
@@ -295,6 +294,8 @@ struct exynos_tmu_platform_data {
u8 second_point_trim;
u8 default_temp_offset;
u8 test_mux;
+ u8 triminfo_reload[2];
+ u8 triminfo_reload_count;
enum calibration_type cal_type;
enum calibration_mode cal_mode;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index aa8e0de..b45aa90 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -95,6 +95,8 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON1,
+ .triminfo_ctrl[1] = EXYNOS_TMU_TRIMINFO_CON2,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
.buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
@@ -160,8 +162,11 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload[1] = 0x11, \
+ .triminfo_reload_count = 2, \
.registers = exynos3250_tmu_registers, \
- .features = (TMU_SUPPORT_EMULATION | \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD\
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
TMU_SUPPORT_EMUL_TIME)
#endif
@@ -184,7 +189,7 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
- .triminfo_ctrl = EXYNOS_TMU_TRIMINFO_CON,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON2,
.triminfo_reload_shift = EXYNOS_TRIMINFO_RELOAD_SHIFT,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
@@ -252,6 +257,8 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload_count = 1, \
.registers = exynos4412_tmu_registers, \
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h
b/drivers/thermal/samsung/exynos_tmu_data.h
index f0979e5..e0536c3 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -57,8 +57,11 @@
#define EXYNOS4210_TMU_TRIG_LEVEL_MASK 0x
#define EXYNOS4210_TMU_INTCLEAR_VAL0x
-/* Exynos5250 and Exynos4412 specific registers */
-#define EXYNOS_TMU_TRIMINFO_CON0x14
+/* Exynos3250 specific registers */
+#define EXYNOS_TMU_TRIMINFO_CON1
Re: [PATCHv2] thermal: exynos: Add support for TRIM_RELOAD feature at Exynos3250
Amit,
On Tue, Aug 19, 2014 at 8:07 AM, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch add support for TRIM_RELOAD feature at Exynos3250. The TMU of
Exynos3250 has two TRIMINFO_CON register.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Zhang Rui rui.zh...@intel.com
Cc: Eduardo Valentin edubez...@gmail.com
What do you think about this patch?
---
Changes from v1:
- Add missing 'TMU_SUPPORT_TRIM_RELOAD' features
drivers/thermal/samsung/exynos_tmu.c | 7 +--
drivers/thermal/samsung/exynos_tmu.h | 5 +++--
drivers/thermal/samsung/exynos_tmu_data.c | 11 +--
drivers/thermal/samsung/exynos_tmu_data.h | 7 +--
4 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index acbff14..ed01606 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -164,8 +164,11 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
}
}
- if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
- __raw_writel(1, data-base + reg-triminfo_ctrl);
+ if (TMU_SUPPORTS(pdata, TRIM_RELOAD)) {
+ for (i = 0; i pdata-triminfo_reload_count; i++)
+ __raw_writel(pdata-triminfo_reload[i],
+ data-base + reg-triminfo_ctrl[i]);
+ }
if (pdata-cal_mode == HW_MODE)
goto skip_calib_data;
diff --git a/drivers/thermal/samsung/exynos_tmu.h
b/drivers/thermal/samsung/exynos_tmu.h
index 1b4a644..72cb54e 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -151,8 +151,7 @@ struct exynos_tmu_registers {
u32 triminfo_25_shift;
u32 triminfo_85_shift;
- u32 triminfo_ctrl;
- u32 triminfo_ctrl1;
+ u32 triminfo_ctrl[2];
u32 triminfo_reload_shift;
u32 tmu_ctrl;
@@ -295,6 +294,8 @@ struct exynos_tmu_platform_data {
u8 second_point_trim;
u8 default_temp_offset;
u8 test_mux;
+ u8 triminfo_reload[2];
+ u8 triminfo_reload_count;
enum calibration_type cal_type;
enum calibration_mode cal_mode;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index aa8e0de..b45aa90 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -95,6 +95,8 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON1,
+ .triminfo_ctrl[1] = EXYNOS_TMU_TRIMINFO_CON2,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
.buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
@@ -160,8 +162,11 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload[1] = 0x11, \
+ .triminfo_reload_count = 2, \
.registers = exynos3250_tmu_registers, \
- .features = (TMU_SUPPORT_EMULATION | \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD\
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS |
\
TMU_SUPPORT_EMUL_TIME)
#endif
@@ -184,7 +189,7 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
- .triminfo_ctrl = EXYNOS_TMU_TRIMINFO_CON,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON2,
.triminfo_reload_shift = EXYNOS_TRIMINFO_RELOAD_SHIFT,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
@@ -252,6 +257,8 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload_count = 1, \
.registers = exynos4412_tmu_registers, \
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS |
\
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h
b/drivers/thermal/samsung/exynos_tmu_data.h
index f0979e5..e0536c3 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -57,8 +57,11 @@
#define EXYNOS4210_TMU_TRIG_LEVEL_MASK
Re: [PATCH 00/29] Exynos SYSMMU (IOMMU) integration with DT and DMA-mapping subsystem
Hi, Am 19.08.2014 14:01, schrieb Marek Szyprowski: On 2014-08-19 13:39, Andreas Färber wrote: I'm working on 5250 based Spring Chromebook and noticed that v3.17-rc1 got some more iommu support. With the new CONFIG_DRM_EXYNOS_IOMMU=y my machine stops booting. So I'm wondering, is any of this a fix for 3.17, or is all of this unrelated -next material? This is probably a side effect of patch 3170447c1f264d51b8d1f3898bf2588588a64fdc (iommu/exynos: Select ARM_DMA_USE_IOMMU). It added selection of ARM_DMA_USE_IOMMU symbol, on which IOMMU support in Exynos DRM subsystem depends. However selecting this symbol is all that this patch does, without providing any code code which implements real support for ARM DMA IOMMU integration, which is needed by Exynos DRM driver. Please disable CONFIG_DRM_EXYNOS_IOMMU in kernel .config and your system should be bootable again. Yes, that's what my report implied. :) I'm bringing this up for -rc2 though: It sounds as if that option should remain unavailable until the required code is in? Thanks. Also, are you or someone working on the respective DT changes for Exynos5? I can prepare DT changes for Exynos5 as well, but first I wanted to clarify if everyone involved in generic IOMMU bindings and Exynos IOMMU driver agrees on my proposal. Sure. I'm updating my old spring-bridge.v6 branch [1] to 3.17-rc1 [2], which involves three drm bridge patches rebased onto the new drm panel prepare/unprepare infrastructure plus two LVDS DT patches in addition to the IOMMU patches. That old branch included DT changes for 5250 in ARM: dts: add System MMU nodes of Exynos SoCs, but that'll probably need updating for the new bindings. Regards, Andreas [1] https://github.com/afaerber/linux/commits/spring-bridge.v6 [2] https://github.com/afaerber/linux/commits/spring-next -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] mmc: core: Use regulator_get_voltage() if OCR mask is empty.
On 19 August 2014 13:29, Javier Martinez Canillas javier.marti...@collabora.co.uk wrote: Hello Ulf, On 08/15/2014 04:51 PM, Ulf Hansson wrote: Just wanted to add some input regarding the errors in the mmc case. These are of high importance. In principle if you get, Failed getting OCR mask: -22, likely you will be using a wrong OCR mask while negotiating the voltage level with the card. So, somehow we need to address this issue. And do you think that $subject is the right approach to solve this issue? If not please let me know so I can address that. Well, currently this seems like the best approach. If we end up having some new regulator helper function, future wise, we can convert to such later on. Kind regards Uffe -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] mmc: core: Use regulator_get_voltage() if OCR mask is empty.
On 14 August 2014 14:39, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
The operation conditions register (OCR) stores the voltage
profile of the card, however the list of possible voltages
is restricted by the voltage range supported by the supply
used as VCC/VDD. So in mmc_vddrange_to_ocrmask() a OCR mask
is obtained to filter the not supported voltages, from the
value read in the host controller OCR register.
For fixed regulators, regulator_list_voltage() returns the
fixed output for the first selector but this doesn't happen
for switch (FET) regulators that obtain their voltage from
their parent supply. A call to regulator_get_voltage() is
needed in this case so the regulator core can return the
FET's parent supply voltage output.
This change is consistent with the fact that for other
fixed regulators (that are not FETs) the OCR mask is
returned even when mmc_regulator_set_ocr() checks if the
regulator is fixed before calling regulator_set_voltage().
Without this patch, the following warning is reported when
a FET is used as a vmmc-supply:
dwmmc_exynos 1222.mmc: Failed getting OCR mask: -22
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Thanks! Applied for next.
Kind regards
Uffe
---
drivers/mmc/core/core.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 7dc0c85..8abae04 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1221,15 +1221,14 @@ int mmc_regulator_get_ocrmask(struct regulator
*supply)
int result = 0;
int count;
int i;
+ int vdd_uV;
+ int vdd_mV;
count = regulator_count_voltages(supply);
if (count 0)
return count;
for (i = 0; i count; i++) {
- int vdd_uV;
- int vdd_mV;
-
vdd_uV = regulator_list_voltage(supply, i);
if (vdd_uV = 0)
continue;
@@ -1238,6 +1237,15 @@ int mmc_regulator_get_ocrmask(struct regulator *supply)
result |= mmc_vddrange_to_ocrmask(vdd_mV, vdd_mV);
}
+ if (!result) {
+ vdd_uV = regulator_get_voltage(supply);
+ if (vdd_uV = 0)
+ return vdd_uV;
+
+ vdd_mV = vdd_uV / 1000;
+ result = mmc_vddrange_to_ocrmask(vdd_mV, vdd_mV);
+ }
+
return result;
}
EXPORT_SYMBOL_GPL(mmc_regulator_get_ocrmask);
--
2.0.0.rc2
--
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Re: [PATCH 1/1] mmc: core: Use regulator_get_voltage() if OCR mask is empty.
On 08/19/2014 02:43 PM, Ulf Hansson wrote: Well, currently this seems like the best approach. If we end up having some new regulator helper function, future wise, we can convert to such later on. Great, thanks a lot for your help! Kind regards Uffe Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 3/4] ARM: EXYNOS: Add platform driver support for Exynos PMU
Hi Bart, On 18.08.2014 19:42, Bartlomiej Zolnierkiewicz wrote: Hi, On Monday, July 28, 2014 08:40:52 AM Pankaj Dubey wrote: Hi Tomasz, On Friday, July 25, 2014 Tomasz Figa wrote: To: Pankaj Dubey; 'Kukjin Kim'; linux-arm-ker...@lists.infradead.org; linux- samsung-...@vger.kernel.org; linux-ker...@vger.kernel.org Cc: li...@arm.linux.org.uk; t.f...@samsung.com; vikas.saj...@samsung.com; jo...@samsung.com; naus...@samsung.com; thomas...@samsung.com; chow@samsung.com Subject: Re: [PATCH v7 3/4] ARM: EXYNOS: Add platform driver support for Exynos PMU Hi Pankaj, Kukjin, On 25.07.2014 07:32, Pankaj Dubey wrote: Hi Kukjin, On Friday, July 25, 2014 Kukjin Kim wrote: [snip] Looks good to me, will apply this and 4/4. We need to hold these two patches until dependent patch [1] from Tomasz Figa gets merged. [1]: mfd: syscon: Decouple syscon interface from syscon devices https://lkml.org/lkml/2014/6/24/188 That RFC patch had few comments from Arnd needed to be addressed, so it needs a new revision. Pankaj, If I remember correctly, we had talked about this and the conclusion was that you would take care of addressing the comments and sending new version of the patch. Any update on this or have I missed something? Well, I don't think we concluded as such anything. Since this patch needs to get in so that Exynos PMU and PM related changes can go in, I discussed with you saying that I am not able to understand about Arnd's comments and if possible and time permits I will look into it. Meanwhile I got busy with some other official work, so could not get time to look into it. Tomasz/Pankaj, could we please get some agreement on what needs to be done and who should do the pending work? syscon patch is blocking PMU cleanup patches which in turn are blocking PMU support additions for new SoCs (Exynos5420/5800 and Exynos3250 PMU patches). Leaving alone the matter who is going to take care of it for now, the remaining work to do is to further decouple syscon from struct device, which means providing of_ API to register a syscon provider on a device tree node even before driver model is available yet. I believe it should be quite straightforward on top of my RFC and should require only saving syscon's of_node directly in syscon struct, adding appropriate API and extending the look-up loops to handle cases when syscon's dev is NULL. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/6] Add max77802 support for Peach boards
Hello Kukjin, Mark Brown has already queued for 3.18 the max77802 PMIC regulators driver so now we can add support for these in the Peach Pit and Pi DTS and also merge all the posted patches that depend on this. I've picked all the patches I found and rebased them to be sure that they apply cleanly on top of linux-next. Also I've taken some DT snippets from the downstream Chrome OS 3.8 kernel DTS for devices that use one of the regulators of these regulators has their input supply. The series is composed of the following patches: Javier Martinez Canillas (3): ARM: dts: Add Peach Pit and Pi dts entry for max77802 PMIC ARM: dts: Add vmmc and vqmmc supplies for Peach Pit and Pi boards ARM: dts: Add Peach Pit and Pi dts entry for ISL29018 sensor Naveen Krishna Chatradhi (1): ARM: dts: Add thermistor dts fragment used by exynos based Peach boards Rahul Sharma (2): ARM: dts: add hdmi regulators for exynos5800 based peach-pi board ARM: dts: add hdmi regulators for exynos5420 based peach-pit board arch/arm/boot/dts/cros-adc-thermistors.dtsi | 44 arch/arm/boot/dts/exynos5420-peach-pit.dts | 390 arch/arm/boot/dts/exynos5800-peach-pi.dts | 390 3 files changed, 824 insertions(+) create mode 100644 arch/arm/boot/dts/cros-adc-thermistors.dtsi Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/6] ARM: dts: Add Peach Pit and Pi dts entry for max77802 PMIC
Exynos5420 based Peach Pit and Exynos5800 based Peach Pi boards
uses a Maxim 77802 power management IC to drive regulators and
its Real Time Clock. This patch adds support for this chip.
These are the device nodes and pinctrl configuration that
are present on the Peach pit DeviceTree source file in the
the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 371 +
arch/arm/boot/dts/exynos5800-peach-pi.dts | 371 +
2 files changed, 742 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 228a6b1..8619d58 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -144,6 +144,339 @@
ddc = i2c_2;
};
+hsi2c_4 {
+ status = okay;
+ clock-frequency = 40;
+
+ max77802-pmic@9 {
+ compatible = maxim,max77802;
+ interrupt-parent = gpx3;
+ interrupts = 1 0;
+ pinctrl-names = default;
+ pinctrl-0 = max77802_irq, pmic_selb,
+ pmic_dvs_1, pmic_dvs_2, pmic_dvs_3;
+ wakeup-source;
+ reg = 0x9;
+ #clock-cells = 1;
+
+ inb1-supply = tps65090_dcdc2;
+ inb2-supply = tps65090_dcdc1;
+ inb3-supply = tps65090_dcdc2;
+ inb4-supply = tps65090_dcdc2;
+ inb5-supply = tps65090_dcdc1;
+ inb6-supply = tps65090_dcdc2;
+ inb7-supply = tps65090_dcdc1;
+ inb8-supply = tps65090_dcdc1;
+ inb9-supply = tps65090_dcdc1;
+ inb10-supply = tps65090_dcdc1;
+
+ inl1-supply = buck5_reg;
+ inl2-supply = buck7_reg;
+ inl3-supply = buck9_reg;
+ inl4-supply = buck9_reg;
+ inl5-supply = buck9_reg;
+ inl6-supply = tps65090_dcdc2;
+ inl7-supply = buck9_reg;
+ inl9-supply = tps65090_dcdc2;
+ inl10-supply = buck7_reg;
+
+ regulators {
+ buck1_reg: BUCK1 {
+ regulator-name = vdd_mif;
+ regulator-min-microvolt = 80;
+ regulator-max-microvolt = 130;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-ramp-delay = 12500;
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = vdd_arm;
+ regulator-min-microvolt = 80;
+ regulator-max-microvolt = 150;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-ramp-delay = 12500;
+ };
+
+ buck3_reg: BUCK3 {
+ regulator-name = vdd_int;
+ regulator-min-microvolt = 80;
+ regulator-max-microvolt = 140;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-ramp-delay = 12500;
+ };
+
+ buck4_reg: BUCK4 {
+ regulator-name = vdd_g3d;
+ regulator-min-microvolt = 70;
+ regulator-max-microvolt = 140;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-ramp-delay = 12500;
+ };
+
+ buck5_reg: BUCK5 {
+ regulator-name = vdd_1v2;
+ regulator-min-microvolt = 120;
+ regulator-max-microvolt = 120;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck6_reg: BUCK6 {
+ regulator-name = vdd_kfc;
+ regulator-min-microvolt = 80;
+ regulator-max-microvolt = 150;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-ramp-delay = 12500;
+ };
+
+ buck7_reg: BUCK7 {
+ regulator-name = vdd_1v35;
+ regulator-min-microvolt = 135;
+
[PATCH 2/6] ARM: dts: add hdmi regulators for exynos5800 based peach-pi board
From: Rahul Sharma rahul.sha...@samsung.com
Adding regulators for HDMI for Peach-pi board.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
v2: 1) Add blank line before hdmi regulators.
arch/arm/boot/dts/exynos5800-peach-pi.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index f753eae..e613827 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -140,6 +140,11 @@
pinctrl-names = default;
pinctrl-0 = hdmi_hpd_irq;
ddc = i2c_2;
+
+ hdmi-en-supply = tps65090_fet7;
+ vdd-supply = ldo8_reg;
+ vdd_osc-supply = ldo10_reg;
+ vdd_pll-supply = ldo8_reg;
};
hsi2c_4 {
--
2.0.1
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[PATCH 5/6] ARM: dts: Add vmmc and vqmmc supplies for Peach Pit and Pi boards
The VCC/VDD and VCCQ/VDD_IO power supplies for the MMC are
provided by the tps65090 fet4 and max77802 ldo4 regulators
respectively. Add the phandle to the regulators tree nodes
for the the dw_mmc device device.
These DTS snippets were taken from the downstream ChromeOS
3.8 kernel Device Tree for Peach Pit and Pi boards.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 2 ++
arch/arm/boot/dts/exynos5800-peach-pi.dts | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 8e50042..5b9dbb9 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -547,6 +547,8 @@
};
mmc_2 {
+ vmmc-supply = tps65090_fet4;
+ vqmmc-supply = vqmmc_sdcard;
status = okay;
num-slots = 1;
supports-highspeed;
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 939f91c..dcac443 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -545,6 +545,8 @@
};
mmc_2 {
+ vmmc-supply = tps65090_fet4;
+ vqmmc-supply = vqmmc_sdcard;
status = okay;
num-slots = 1;
supports-highspeed;
--
2.0.1
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[PATCH 3/6] ARM: dts: add hdmi regulators for exynos5420 based peach-pit board
From: Rahul Sharma rahul.sha...@samsung.com
Adding regulators for hdmi for peach-pit board.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 8619d58..9cf53b1 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -142,6 +142,11 @@
pinctrl-names = default;
pinctrl-0 = hdmi_hpd_irq;
ddc = i2c_2;
+
+ hdmi-en-supply = tps65090_fet7;
+ vdd-supply = ldo8_reg;
+ vdd_osc-supply = ldo10_reg;
+ vdd_pll-supply = ldo8_reg;
};
hsi2c_4 {
--
2.0.1
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[PATCH 4/6] ARM: dts: Add thermistor dts fragment used by exynos based Peach boards
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
This patch creates a thermistor fragment carrying the NTC Thermistor
nodes as children of the IIO based ADC.
This fragment is included in exynos5420-peach-pit.dts and
exynos5800-peach-pi.dts.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
arch/arm/boot/dts/cros-adc-thermistors.dtsi | 44 +
arch/arm/boot/dts/exynos5420-peach-pit.dts | 6
arch/arm/boot/dts/exynos5800-peach-pi.dts | 6
3 files changed, 56 insertions(+)
create mode 100644 arch/arm/boot/dts/cros-adc-thermistors.dtsi
diff --git a/arch/arm/boot/dts/cros-adc-thermistors.dtsi
b/arch/arm/boot/dts/cros-adc-thermistors.dtsi
new file mode 100644
index 000..acd4fe1
--- /dev/null
+++ b/arch/arm/boot/dts/cros-adc-thermistors.dtsi
@@ -0,0 +1,44 @@
+/*
+ * Thermistor dts fragment for devices that use Thermistors as
+ * children of the IIO based ADC.
+ *
+ * Currently, used by Exynos5420 based Peach PIT and
+ * Exynos5800 based Peach PI.
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+adc {
+ ncp15wb473@3 {
+ compatible = murata,ncp15wb473;
+ pullup-uv = 180;
+ pullup-ohm = 47000;
+ pulldown-ohm = 0;
+ io-channels = adc 3;
+ };
+ ncp15wb473@4 {
+ compatible = murata,ncp15wb473;
+ pullup-uv = 180;
+ pullup-ohm = 47000;
+ pulldown-ohm = 0;
+ io-channels = adc 4;
+ };
+ ncp15wb473@5 {
+ compatible = murata,ncp15wb473;
+ pullup-uv = 180;
+ pullup-ohm = 47000;
+ pulldown-ohm = 0;
+ io-channels = adc 5;
+ };
+ ncp15wb473@6 {
+ compatible = murata,ncp15wb473;
+ pullup-uv = 180;
+ pullup-ohm = 47000;
+ pulldown-ohm = 0;
+ io-channels = adc 6;
+ };
+};
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 9cf53b1..8e50042 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -102,6 +102,11 @@
};
};
+adc {
+ status = okay;
+ vdd-supply = ldo9_reg;
+};
+
dp {
status = okay;
pinctrl-names = default;
@@ -821,3 +826,4 @@
};
#include cros-ec-keyboard.dtsi
+#include cros-adc-thermistors.dtsi
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index e613827..939f91c 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -100,6 +100,11 @@
};
};
+adc {
+ status = okay;
+ vdd-supply = ldo9_reg;
+};
+
dp {
status = okay;
pinctrl-names = default;
@@ -819,3 +824,4 @@
};
#include cros-ec-keyboard.dtsi
+#include cros-adc-thermistors.dtsi
--
2.0.1
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Re: [PATCH 5/6] ARM: dts: Add vmmc and vqmmc supplies for Peach Pit and Pi boards
Javier,
On Tue, Aug 19, 2014 at 8:08 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
The VCC/VDD and VCCQ/VDD_IO power supplies for the MMC are
provided by the tps65090 fet4 and max77802 ldo4 regulators
respectively. Add the phandle to the regulators tree nodes
for the the dw_mmc device device.
These DTS snippets were taken from the downstream ChromeOS
3.8 kernel Device Tree for Peach Pit and Pi boards.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 2 ++
arch/arm/boot/dts/exynos5800-peach-pi.dts | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 8e50042..5b9dbb9 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -547,6 +547,8 @@
};
mmc_2 {
+ vmmc-supply = tps65090_fet4;
+ vqmmc-supply = vqmmc_sdcard;
status = okay;
num-slots = 1;
supports-highspeed;
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 939f91c..dcac443 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -545,6 +545,8 @@
};
mmc_2 {
+ vmmc-supply = tps65090_fet4;
+ vqmmc-supply = vqmmc_sdcard;
status = okay;
num-slots = 1;
supports-highspeed;
While your change is correct, I have a worry that it will break things
if it's merged before some patches that Yuvaraj is working on.
Specifically the problem on pit and pi (and any exynos5250 / 5420 /
5800 / ... boards using the built-in card detect) is that the card
detect line is on the same power rail as vqmmc. That means you
can't turn off vqmmc if you still need to be able to detect card
insertions.
...but you can't turn off vmmc without turning off vqmmc, otherwise
current will leak through the IO lines into the card, which is bad.
Right now the SDMMC core will try to turn off power to the card at two times:
1. when the card is ejected
2. when it's trying to reset the card
Obviously the first problem is a huge problem on exynos because it
means that we won't be able to detect card insertions. ...but we
still want to turn the power off from #2. To really fix the problem I
think the core needs to be extended to treat the above as two separate
cases.
Your patch might work at the moment because I think dw_mmc doesn't
actually try to turn off these rails with the main SDMMC core asks it
to. ...but I still worry about merging them before Yuvaraj's changes
are ready.
-Doug
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[PATCH v10 11/19] irqchip: vic: Add support for FIQ management
This patch introduces callbacks to route interrupts to or away
from the FIQ signal. It also causes these callbacks to be registered
with the FIQ infrastructure.
This patch enable FIQ support for mach-versatile whilst mach-ep93xx,
mach-netx, mach-s3c64xx and plat-samsung are unmodified (and can therefore
continue to use init_FIQ() as before).
Signed-off-by: Daniel Thompson daniel.thomp...@linaro.org
Cc: Hartley Sweeten hswee...@visionengravers.com
Cc: Ryan Mallon rmal...@gmail.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Ben Dooks ben-li...@fluff.org
Cc: Kukjin Kim kgene@samsung.com
Cc: Thomas Gleixner t...@linutronix.de
Cc: Jason Cooper ja...@lakedaemon.net
Cc: linux-samsung-soc@vger.kernel.org
---
arch/arm/mach-versatile/core.c | 2 +-
drivers/irqchip/irq-vic.c | 92 -
include/linux/irqchip/arm-vic.h | 6 ++-
3 files changed, 78 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 08fb8c8..bad1d30 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -108,7 +108,7 @@ void __init versatile_init_irq(void)
np = of_find_matching_node_by_address(NULL, vic_of_match,
VERSATILE_VIC_BASE);
- __vic_init(VA_VIC_BASE, 0, IRQ_VIC_START, ~0, 0, np);
+ __vic_init(VA_VIC_BASE, 0, IRQ_VIC_START, ~0, 0, np ? false : true, np);
writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
diff --git a/drivers/irqchip/irq-vic.c b/drivers/irqchip/irq-vic.c
index 7d35287..22aa126 100644
--- a/drivers/irqchip/irq-vic.c
+++ b/drivers/irqchip/irq-vic.c
@@ -36,6 +36,9 @@
#include asm/exception.h
#include asm/irq.h
+#ifdef CONFIG_FIQ
+#include asm/fiq.h
+#endif
#include irqchip.h
@@ -261,11 +264,53 @@ static struct irq_domain_ops vic_irqdomain_ops = {
.xlate = irq_domain_xlate_onetwocell,
};
+#ifdef CONFIG_FIQ
+static DEFINE_RAW_SPINLOCK(irq_controller_lock);
+
+static void vic_set_fiq(struct irq_data *d, bool enable)
+{
+ void __iomem *base = irq_data_get_irq_chip_data(d);
+ unsigned int irq = d-hwirq;
+ u32 val;
+
+ raw_spin_lock(irq_controller_lock);
+ val = readl(base + VIC_INT_SELECT);
+ if (enable)
+ val |= 1 irq;
+ else
+ val = ~(1 irq);
+ writel(val, base + VIC_INT_SELECT);
+ raw_spin_unlock(irq_controller_lock);
+}
+
+static void vic_enable_fiq(struct irq_data *d)
+{
+ vic_set_fiq(d, true);
+}
+
+static void vic_disable_fiq(struct irq_data *d)
+{
+ vic_set_fiq(d, false);
+}
+
+struct fiq_chip vic_fiq = {
+ .fiq_enable = vic_enable_fiq,
+ .fiq_disable = vic_disable_fiq,
+};
+
+static void vic_register_fiq(int irq)
+{
+ fiq_register_mapping(irq, vic_fiq);
+}
+#else /* CONFIG_FIQ */
+static inline void vic_register_fiq(int irq) {}
+#endif /* CONFIG_FIQ */
+
/**
* vic_register() - Register a VIC.
* @base: The base address of the VIC.
* @parent_irq: The parent IRQ if cascaded, else 0.
- * @irq: The base IRQ for the VIC.
+ * @irq_start: The base IRQ for the VIC.
* @valid_sources: bitmask of valid interrupts
* @resume_sources: bitmask of interrupts allowed for resume sources.
* @node: The device tree node associated with the VIC.
@@ -277,12 +322,13 @@ static struct irq_domain_ops vic_irqdomain_ops = {
* This also configures the IRQ domain for the VIC.
*/
static void __init vic_register(void __iomem *base, unsigned int parent_irq,
- unsigned int irq,
+ unsigned int irq_start,
u32 valid_sources, u32 resume_sources,
- struct device_node *node)
+ bool map_fiqs, struct device_node *node)
{
struct vic_device *v;
int i;
+ unsigned int irq;
if (vic_id = ARRAY_SIZE(vic_devices)) {
printk(KERN_ERR %s: too few VICs, increase
CONFIG_ARM_VIC_NR\n, __func__);
@@ -301,15 +347,19 @@ static void __init vic_register(void __iomem *base,
unsigned int parent_irq,
irq_set_chained_handler(parent_irq, vic_handle_irq_cascaded);
}
- v-domain = irq_domain_add_simple(node, fls(valid_sources), irq,
+ v-domain = irq_domain_add_simple(node, fls(valid_sources), irq_start,
vic_irqdomain_ops, v);
/* create an IRQ mapping for each valid IRQ */
- for (i = 0; i fls(valid_sources); i++)
- if (valid_sources (1 i))
- irq_create_mapping(v-domain, i);
+ for (i = 0; i fls(valid_sources); i++) {
+ if (valid_sources (1 i)) {
+ irq = irq_create_mapping(v-domain, i);
+ vic_register_fiq(irq);
+ }
+ }
+
/* If no base IRQ was passed, figure out our allocated base */
- if (irq)
-
Re: [PATCH 5/6] ARM: dts: Add vmmc and vqmmc supplies for Peach Pit and Pi boards
Hi Javier,
Am 19.08.2014 17:08, schrieb Javier Martinez Canillas:
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 8e50042..5b9dbb9 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -547,6 +547,8 @@
};
mmc_2 {
+ vmmc-supply = tps65090_fet4;
+ vqmmc-supply = vqmmc_sdcard;
status = okay;
num-slots = 1;
supports-highspeed;
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 939f91c..dcac443 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -545,6 +545,8 @@
};
mmc_2 {
+ vmmc-supply = tps65090_fet4;
+ vqmmc-supply = vqmmc_sdcard;
status = okay;
num-slots = 1;
supports-highspeed;
A convention that I picked up was to place overridden status property
first. Do your new properties really need to go before that?
Also, if you look at today's for-next, then supports-highspeed should be
cap-{sd,mmc}-highspeed, so it may be worth to rebase.
Regards,
Andreas
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GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
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Re: [PATCH 1/6] ARM: dts: Add Peach Pit and Pi dts entry for max77802 PMIC
Am 19.08.2014 17:08, schrieb Javier Martinez Canillas:
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 228a6b1..8619d58 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -144,6 +144,339 @@
ddc = i2c_2;
};
+hsi2c_4 {
+ status = okay;
+ clock-frequency = 40;
+
+ max77802-pmic@9 {
+ compatible = maxim,max77802;
+ interrupt-parent = gpx3;
+ interrupts = 1 0;
1 IRQ_TYPE_NONE?
[...]
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index f3ee48b..f753eae 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -142,6 +142,339 @@
ddc = i2c_2;
};
+hsi2c_4 {
+ status = okay;
+ clock-frequency = 40;
+
+ max77802-pmic@9 {
+ compatible = maxim,max77802;
+ interrupt-parent = gpx3;
+ interrupts = 1 0;
Dito?
Cheers,
Andreas
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Re: [PATCH v2 0/4] Add Exynos4412 based Odroid X2 and U2/U3/U3+ support
ODROID-U3 has been broken in mainline for quite a while. Have patches been posted for this already? http://arm-soc.lixom.net/bootlogs/mainline/v3.17-rc1/odroidu3-arm-exynos_defconfig.html for one of the latest boots that failed. -Olof On Fri, Jul 18, 2014 at 8:40 AM, Przemyslaw Marczak p.marc...@samsung.com wrote: Hello, On 06/30/2014 07:34 AM, Marek Szyprowski wrote: Hello, On 2014-06-25 15:26, Marek Szyprowski wrote: Hello, This is the second version of the initial patch series adding support for Exynos 4412 based Odroid X2 and U2/U3/U3+ boards and improving support for Odroid X. Complete USB support for Odroid U2/U3/U3+ still requires some fixes in Exynos4 USB2 Phy driver and clock driver for CLKOUT: http://thread.gmane.org/gmane.linux.kernel/1731843/ http://www.spinics.net/lists/linux-usb/msg109587.html The above changes however don't affect Odroid DTS files, but without them, usb3503 hub is not yet functional. Support for audio codec will be posted separately by Sylwester Nawrocki soon. Support for HDMI video output will be also posted separately together with the required ExynosDRM-HDMI fixes. If one is interested in more complete and open-source Odroid board support, there are also patches for u-boot project: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/188295/focus=188610 Just to let everyone knows - updated Odroid patches for uboot has been posted in the following thread: http://www.mail-archive.com/u-boot@lists.denx.de/msg141234.html You can also download them here: http://patchwork.ozlabs.org/project/uboot/list/?submitter=23519 Best regards Please follow the link to the new U-boot Odroid U3/X2 patches: http://www.mail-archive.com/u-boot@lists.denx.de/msg142507.html Regards, -- Przemyslaw Marczak Samsung RD Institute Poland Samsung Electronics p.marc...@samsung.com -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 0/4] Add Exynos4412 based Odroid X2 and U2/U3/U3+ support
On Tue, Aug 19, 2014 at 8:40 PM, Olof Johansson o...@lixom.net wrote: ODROID-U3 has been broken in mainline for quite a while. Have patches been posted for this already? http://arm-soc.lixom.net/bootlogs/mainline/v3.17-rc1/odroidu3-arm-exynos_defconfig.html for one of the latest boots that failed. Yes, discussed in the thread titled [PATCH 1/2] ARM: dts: Enable PMIC interrupts on ODROID Those patches weren't important for boot at the time of submission, but it looks like something else changed (the max77686 driver?) that makes them now required. Daniel -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 0/4] Add Exynos4412 based Odroid X2 and U2/U3/U3+ support
On Tue, Aug 19, 2014 at 12:54 PM, Daniel Drake dr...@endlessm.com wrote: On Tue, Aug 19, 2014 at 8:40 PM, Olof Johansson o...@lixom.net wrote: ODROID-U3 has been broken in mainline for quite a while. Have patches been posted for this already? http://arm-soc.lixom.net/bootlogs/mainline/v3.17-rc1/odroidu3-arm-exynos_defconfig.html for one of the latest boots that failed. Yes, discussed in the thread titled [PATCH 1/2] ARM: dts: Enable PMIC interrupts on ODROID Those patches weren't important for boot at the time of submission, but it looks like something else changed (the max77686 driver?) that makes them now required. Excellent, thanks. A bummer we didn't see this earlier, but let's get the fix in asap. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2] thermal: exynos: Add support for TRIM_RELOAD feature at Exynos3250
Dear Eduardo,
I'm so sorry. This patch has build break as following:
It is my mistake about missing 'or' operation when adding
TMU_SUPPORT_TRIM_RELOAD.
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD\
I'll send new patch to fix it right now.
Best Regards,
Chanwoo Choi
On 08/19/2014 09:28 PM, edubez...@gmail.com wrote:
Amit,
On Tue, Aug 19, 2014 at 8:07 AM, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch add support for TRIM_RELOAD feature at Exynos3250. The TMU of
Exynos3250 has two TRIMINFO_CON register.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Zhang Rui rui.zh...@intel.com
Cc: Eduardo Valentin edubez...@gmail.com
What do you think about this patch?
---
Changes from v1:
- Add missing 'TMU_SUPPORT_TRIM_RELOAD' features
drivers/thermal/samsung/exynos_tmu.c | 7 +--
drivers/thermal/samsung/exynos_tmu.h | 5 +++--
drivers/thermal/samsung/exynos_tmu_data.c | 11 +--
drivers/thermal/samsung/exynos_tmu_data.h | 7 +--
4 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index acbff14..ed01606 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -164,8 +164,11 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
}
}
- if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
- __raw_writel(1, data-base + reg-triminfo_ctrl);
+ if (TMU_SUPPORTS(pdata, TRIM_RELOAD)) {
+ for (i = 0; i pdata-triminfo_reload_count; i++)
+ __raw_writel(pdata-triminfo_reload[i],
+ data-base + reg-triminfo_ctrl[i]);
+ }
if (pdata-cal_mode == HW_MODE)
goto skip_calib_data;
diff --git a/drivers/thermal/samsung/exynos_tmu.h
b/drivers/thermal/samsung/exynos_tmu.h
index 1b4a644..72cb54e 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -151,8 +151,7 @@ struct exynos_tmu_registers {
u32 triminfo_25_shift;
u32 triminfo_85_shift;
- u32 triminfo_ctrl;
- u32 triminfo_ctrl1;
+ u32 triminfo_ctrl[2];
u32 triminfo_reload_shift;
u32 tmu_ctrl;
@@ -295,6 +294,8 @@ struct exynos_tmu_platform_data {
u8 second_point_trim;
u8 default_temp_offset;
u8 test_mux;
+ u8 triminfo_reload[2];
+ u8 triminfo_reload_count;
enum calibration_type cal_type;
enum calibration_mode cal_mode;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index aa8e0de..b45aa90 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -95,6 +95,8 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON1,
+ .triminfo_ctrl[1] = EXYNOS_TMU_TRIMINFO_CON2,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
.buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
@@ -160,8 +162,11 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload[1] = 0x11, \
+ .triminfo_reload_count = 2, \
.registers = exynos3250_tmu_registers, \
- .features = (TMU_SUPPORT_EMULATION | \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD\
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS
| \
TMU_SUPPORT_EMUL_TIME)
#endif
@@ -184,7 +189,7 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
- .triminfo_ctrl = EXYNOS_TMU_TRIMINFO_CON,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON2,
.triminfo_reload_shift = EXYNOS_TRIMINFO_RELOAD_SHIFT,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
@@ -252,6 +257,8 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload_count = 1, \
.registers = exynos4412_tmu_registers, \
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
[PATCHv3] thermal: exynos: Add support for TRIM_RELOAD feature at Exynos3250
This patch add support for TRIM_RELOAD feature at Exynos3250. The TMU of
Exynos3250 has two TRIMINFO_CON register.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Zhang Rui rui.zh...@intel.com
Cc: Eduardo Valentin edubez...@gmail.com
Cc: Amit Daniel Kachhap amit.dan...@samsung.com
---
Changes from v2:
- Fix build break because of missing 'or' operation.
Changes from v1:
- Add missing 'TMU_SUPPORT_TRIM_RELOAD' feature
drivers/thermal/samsung/exynos_tmu.c | 7 +--
drivers/thermal/samsung/exynos_tmu.h | 5 +++--
drivers/thermal/samsung/exynos_tmu_data.c | 11 +--
drivers/thermal/samsung/exynos_tmu_data.h | 7 +--
4 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index acbff14..ed01606 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -164,8 +164,11 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
}
}
- if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
- __raw_writel(1, data-base + reg-triminfo_ctrl);
+ if (TMU_SUPPORTS(pdata, TRIM_RELOAD)) {
+ for (i = 0; i pdata-triminfo_reload_count; i++)
+ __raw_writel(pdata-triminfo_reload[i],
+ data-base + reg-triminfo_ctrl[i]);
+ }
if (pdata-cal_mode == HW_MODE)
goto skip_calib_data;
diff --git a/drivers/thermal/samsung/exynos_tmu.h
b/drivers/thermal/samsung/exynos_tmu.h
index 1b4a644..72cb54e 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -151,8 +151,7 @@ struct exynos_tmu_registers {
u32 triminfo_25_shift;
u32 triminfo_85_shift;
- u32 triminfo_ctrl;
- u32 triminfo_ctrl1;
+ u32 triminfo_ctrl[2];
u32 triminfo_reload_shift;
u32 tmu_ctrl;
@@ -295,6 +294,8 @@ struct exynos_tmu_platform_data {
u8 second_point_trim;
u8 default_temp_offset;
u8 test_mux;
+ u8 triminfo_reload[2];
+ u8 triminfo_reload_count;
enum calibration_type cal_type;
enum calibration_mode cal_mode;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index aa8e0de..8cd609c 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -95,6 +95,8 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON1,
+ .triminfo_ctrl[1] = EXYNOS_TMU_TRIMINFO_CON2,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
.buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
@@ -160,8 +162,11 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload[1] = 0x11, \
+ .triminfo_reload_count = 2, \
.registers = exynos3250_tmu_registers, \
- .features = (TMU_SUPPORT_EMULATION | \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
TMU_SUPPORT_EMUL_TIME)
#endif
@@ -184,7 +189,7 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
- .triminfo_ctrl = EXYNOS_TMU_TRIMINFO_CON,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON2,
.triminfo_reload_shift = EXYNOS_TRIMINFO_RELOAD_SHIFT,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
@@ -252,6 +257,8 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload_count = 1, \
.registers = exynos4412_tmu_registers, \
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h
b/drivers/thermal/samsung/exynos_tmu_data.h
index f0979e5..e0536c3 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -57,8 +57,11 @@
#define EXYNOS4210_TMU_TRIG_LEVEL_MASK 0x
#define EXYNOS4210_TMU_INTCLEAR_VAL0x
-/* Exynos5250 and Exynos4412 specific registers */
[PATCH v7 11/11] clk: rockchip: add restart handler
From: Heiko Stübner he...@sntech.de
Add infrastructure to write the correct value to the restart register and
register the restart notifier for both rk3188 (including rk3066) and rk3288.
Signed-off-by: Heiko Stuebner he...@sntech.de
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
v7: Added patch to series.
drivers/clk/rockchip/clk-rk3188.c | 2 ++
drivers/clk/rockchip/clk-rk3288.c | 2 ++
drivers/clk/rockchip/clk.c| 25 +
drivers/clk/rockchip/clk.h| 1 +
4 files changed, 30 insertions(+)
diff --git a/drivers/clk/rockchip/clk-rk3188.c
b/drivers/clk/rockchip/clk-rk3188.c
index a83a6d8..71b661a 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -631,6 +631,8 @@ static void __init rk3188_common_clk_init(struct
device_node *np)
rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),
ROCKCHIP_SOFTRST_HIWORD_MASK);
+
+ rockchip_register_restart_notifier(RK2928_GLB_SRST_FST);
}
static void __init rk3066a_clk_init(struct device_node *np)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk3288.c
index 0d8c6c5..b604217 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -713,5 +713,7 @@ static void __init rk3288_clk_init(struct device_node *np)
rockchip_register_softrst(np, 9, reg_base + RK3288_SOFTRST_CON(0),
ROCKCHIP_SOFTRST_HIWORD_MASK);
+
+ rockchip_register_restart_notifier(RK3288_GLB_SRST_FST);
}
CLK_OF_DECLARE(rk3288_cru, rockchip,rk3288-cru, rk3288_clk_init);
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index 278cf9d..aa41433 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -25,6 +25,7 @@
#include linux/clk-provider.h
#include linux/mfd/syscon.h
#include linux/regmap.h
+#include linux/reboot.h
#include clk.h
/**
@@ -242,3 +243,27 @@ void __init rockchip_clk_register_branches(
rockchip_clk_add_lookup(clk, list-id);
}
}
+
+static unsigned int reg_restart;
+static int rockchip_restart_notify(struct notifier_block *this,
+ unsigned long mode, void *cmd)
+{
+ writel(0xfdb9, reg_base + reg_restart);
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block rockchip_restart_handler = {
+ .notifier_call = rockchip_restart_notify,
+ .priority = 128,
+};
+
+void __init rockchip_register_restart_notifier(unsigned int reg)
+{
+ int ret;
+
+ reg_restart = reg;
+ ret = register_restart_handler(rockchip_restart_handler);
+ if (ret)
+ pr_err(%s: cannot register restart handler, %d\n,
+ __func__, ret);
+}
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 887cbde..0b5eab5 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -329,6 +329,7 @@ void rockchip_clk_register_branches(struct
rockchip_clk_branch *clk_list,
unsigned int nr_clk);
void rockchip_clk_register_plls(struct rockchip_pll_clock *pll_list,
unsigned int nr_pll, int grf_lock_offset);
+void rockchip_register_restart_notifier(unsigned int reg);
#define ROCKCHIP_SOFTRST_HIWORD_MASK BIT(0)
--
1.9.1
--
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[PATCH v7 10/11] clk: samsung: register restart handlers for s3c2412 and s3c2443
From: Heiko Stübner he...@sntech.de
S3C2412, S3C2443 and their derivatives contain a special software-reset
register in their system-controller.
Therefore register a restart handler for those.
Tested on a s3c2416-based board, s3c2412 compile-tested.
Signed-off-by: Heiko Stuebner he...@sntech.de
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
v7: Added patch to series.
drivers/clk/samsung/clk-s3c2412.c | 29 +
drivers/clk/samsung/clk-s3c2443.c | 19 +++
2 files changed, 48 insertions(+)
diff --git a/drivers/clk/samsung/clk-s3c2412.c
b/drivers/clk/samsung/clk-s3c2412.c
index 34af09f..2ceedaf 100644
--- a/drivers/clk/samsung/clk-s3c2412.c
+++ b/drivers/clk/samsung/clk-s3c2412.c
@@ -14,6 +14,7 @@
#include linux/of.h
#include linux/of_address.h
#include linux/syscore_ops.h
+#include linux/reboot.h
#include dt-bindings/clock/s3c2412.h
@@ -26,6 +27,7 @@
#define CLKCON 0x0c
#define CLKDIVN0x14
#define CLKSRC 0x1c
+#define SWRST 0x30
/* list of PLLs to be registered */
enum s3c2412_plls {
@@ -204,6 +206,28 @@ struct samsung_clock_alias s3c2412_aliases[] __initdata = {
ALIAS(MSYSCLK, NULL, fclk),
};
+static int s3c2412_restart(struct notifier_block *this,
+ unsigned long mode, void *cmd)
+{
+ /* errata Watch-dog/Software Reset Problem specifies that
+* this reset must be done with the SYSCLK sourced from
+* EXTCLK instead of FOUT to avoid a glitch in the reset
+* mechanism.
+*
+* See the watchdog section of the S3C2412 manual for more
+* information on this fix.
+*/
+
+ __raw_writel(0x00, reg_base + CLKSRC);
+ __raw_writel(0x533C2412, reg_base + SWRST);
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block s3c2412_restart_handler = {
+ .notifier_call = s3c2412_restart,
+ .priority = 129,
+};
+
/*
* fixed rate clocks generated outside the soc
* Only necessary until the devicetree-move is complete
@@ -233,6 +257,7 @@ void __init s3c2412_common_clk_init(struct device_node *np,
unsigned long xti_f,
unsigned long ext_f, void __iomem *base)
{
struct samsung_clk_provider *ctx;
+ int ret;
reg_base = base;
if (np) {
@@ -267,6 +292,10 @@ void __init s3c2412_common_clk_init(struct device_node
*np, unsigned long xti_f,
s3c2412_clk_sleep_init();
samsung_clk_of_add_provider(np, ctx);
+
+ ret = register_restart_handler(s3c2412_restart_handler);
+ if (ret)
+ pr_warn(cannot register restart handler, %d\n, ret);
}
static void __init s3c2412_clk_init(struct device_node *np)
diff --git a/drivers/clk/samsung/clk-s3c2443.c
b/drivers/clk/samsung/clk-s3c2443.c
index c92f853..0c3c182 100644
--- a/drivers/clk/samsung/clk-s3c2443.c
+++ b/drivers/clk/samsung/clk-s3c2443.c
@@ -14,6 +14,7 @@
#include linux/of.h
#include linux/of_address.h
#include linux/syscore_ops.h
+#include linux/reboot.h
#include dt-bindings/clock/s3c2443.h
@@ -33,6 +34,7 @@
#define HCLKCON0x30
#define PCLKCON0x34
#define SCLKCON0x38
+#define SWRST 0x44
/* the soc types */
enum supported_socs {
@@ -354,6 +356,18 @@ struct samsung_clock_alias s3c2450_aliases[] __initdata = {
ALIAS(PCLK_I2C1, s3c2410-i2c.1, i2c),
};
+static int s3c2443_restart(struct notifier_block *this,
+ unsigned long mode, void *cmd)
+{
+ __raw_writel(0x533c2443, reg_base + SWRST);
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block s3c2443_restart_handler = {
+ .notifier_call = s3c2443_restart,
+ .priority = 129,
+};
+
/*
* fixed rate clocks generated outside the soc
* Only necessary until the devicetree-move is complete
@@ -378,6 +392,7 @@ void __init s3c2443_common_clk_init(struct device_node *np,
unsigned long xti_f,
void __iomem *base)
{
struct samsung_clk_provider *ctx;
+ int ret;
reg_base = base;
if (np) {
@@ -447,6 +462,10 @@ void __init s3c2443_common_clk_init(struct device_node
*np, unsigned long xti_f,
s3c2443_clk_sleep_init();
samsung_clk_of_add_provider(np, ctx);
+
+ ret = register_restart_handler(s3c2443_restart_handler);
+ if (ret)
+ pr_warn(cannot register restart handler, %d\n, ret);
}
static void __init s3c2416_clk_init(struct device_node *np)
--
1.9.1
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[PATCH v7 07/11] watchdog: sunxi: Register restart handler with kernel restart handler
The kernel core now provides an API to trigger a system restart.
Register with it instead of setting arm_pm_restart.
Signed-off-by: Guenter Roeck li...@roeck-us.net
Acked-by: Heiko Stuebner he...@sntech.de
---
v7: Added patch to series. Necessary since the restart handler in the driver
is now available upstream.
drivers/watchdog/sunxi_wdt.c | 31 ---
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/drivers/watchdog/sunxi_wdt.c b/drivers/watchdog/sunxi_wdt.c
index 60deb9d..480bb55 100644
--- a/drivers/watchdog/sunxi_wdt.c
+++ b/drivers/watchdog/sunxi_wdt.c
@@ -21,14 +21,13 @@
#include linux/kernel.h
#include linux/module.h
#include linux/moduleparam.h
+#include linux/notifier.h
#include linux/of.h
#include linux/platform_device.h
#include linux/reboot.h
#include linux/types.h
#include linux/watchdog.h
-#include asm/system_misc.h
-
#define WDT_MAX_TIMEOUT 16
#define WDT_MIN_TIMEOUT 1
#define WDT_MODE_TIMEOUT(n) ((n) 3)
@@ -50,6 +49,7 @@ static unsigned int timeout = WDT_MAX_TIMEOUT;
struct sunxi_wdt_dev {
struct watchdog_device wdt_dev;
void __iomem *wdt_base;
+ struct notifier_block restart_handler;
};
/*
@@ -74,24 +74,29 @@ static const int wdt_timeout_map[] = {
[16] = 0xB, /* 16s */
};
-static void __iomem *reboot_wdt_base;
-static void sun4i_wdt_restart(enum reboot_mode mode, const char *cmd)
+static int sunxi_restart_handle(struct notifier_block *this, unsigned long
mode,
+ void *cmd)
{
+ struct sunxi_wdt_dev *sunxi_wdt = container_of(this,
+ struct sunxi_wdt_dev,
+ restart_handler);
+ void __iomem *wdt_base = sunxi_wdt-wdt_base;
+
/* Enable timer and set reset bit in the watchdog */
- writel(WDT_MODE_EN | WDT_MODE_RST_EN, reboot_wdt_base + WDT_MODE);
+ writel(WDT_MODE_EN | WDT_MODE_RST_EN, wdt_base + WDT_MODE);
/*
* Restart the watchdog. The default (and lowest) interval
* value for the watchdog is 0.5s.
*/
- writel(WDT_CTRL_RELOAD, reboot_wdt_base + WDT_CTRL);
+ writel(WDT_CTRL_RELOAD, wdt_base + WDT_CTRL);
while (1) {
mdelay(5);
- writel(WDT_MODE_EN | WDT_MODE_RST_EN,
- reboot_wdt_base + WDT_MODE);
+ writel(WDT_MODE_EN | WDT_MODE_RST_EN, wdt_base + WDT_MODE);
}
+ return NOTIFY_DONE;
}
static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
@@ -205,8 +210,12 @@ static int sunxi_wdt_probe(struct platform_device *pdev)
if (unlikely(err))
return err;
- reboot_wdt_base = sunxi_wdt-wdt_base;
- arm_pm_restart = sun4i_wdt_restart;
+ sunxi_wdt-restart_handler.notifier_call = sunxi_restart_handle;
+ sunxi_wdt-restart_handler.priority = 128;
+ err = register_restart_handler(sunxi_wdt-restart_handler);
+ if (err)
+ dev_err(pdev-dev,
+ cannot register restart handler (err=%d)\n, err);
dev_info(pdev-dev, Watchdog enabled (timeout=%d sec, nowayout=%d),
sunxi_wdt-wdt_dev.timeout, nowayout);
@@ -218,7 +227,7 @@ static int sunxi_wdt_remove(struct platform_device *pdev)
{
struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
- arm_pm_restart = NULL;
+ unregister_restart_handler(sunxi_wdt-restart_handler);
watchdog_unregister_device(sunxi_wdt-wdt_dev);
watchdog_set_drvdata(sunxi_wdt-wdt_dev, NULL);
--
1.9.1
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[PATCH v7 08/11] arm/arm64: Unexport restart handlers
Implementing a restart handler in a module don't make sense as there would be no guarantee that the module is loaded when a restart is needed. Unexport arm_pm_restart to ensure that no one gets the idea to do it anyway. Signed-off-by: Guenter Roeck li...@roeck-us.net Acked-by: Catalin Marinas catalin.mari...@arm.com Acked-by: Heiko Stuebner he...@sntech.de --- v7: No change v6: No change v5: No change v4: No change v3: No change v2: No change arch/arm/kernel/process.c | 1 - arch/arm64/kernel/process.c | 1 - 2 files changed, 2 deletions(-) diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index ea279f7..250b6f6 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -121,7 +121,6 @@ void (*pm_power_off)(void); EXPORT_SYMBOL(pm_power_off); void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd); -EXPORT_SYMBOL_GPL(arm_pm_restart); /* * This is our default idle handler. diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 0d3fb9f..398ab05 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -98,7 +98,6 @@ void (*pm_power_off)(void); EXPORT_SYMBOL_GPL(pm_power_off); void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd); -EXPORT_SYMBOL_GPL(arm_pm_restart); /* * This is our default idle handler. -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v7 06/11] watchdog: alim7101: Register restart handler with kernel restart handler
The kernel core now provides an API to trigger a system restart.
Register with it to restart the system instead of misusing the
reboot notifier.
Signed-off-by: Guenter Roeck li...@roeck-us.net
Acked-by: Catalin Marinas catalin.mari...@arm.com
Acked-by: Heiko Stuebner he...@sntech.de
---
v7: No change.
v6: No change.
v5: Function and variable renames: *notifier - *handler.
v4: Set restart notifier priority to 128.
v3: No change.
v2: No change.
drivers/watchdog/alim7101_wdt.c | 42 +++--
1 file changed, 32 insertions(+), 10 deletions(-)
diff --git a/drivers/watchdog/alim7101_wdt.c b/drivers/watchdog/alim7101_wdt.c
index 996b2f7..665e0e7 100644
--- a/drivers/watchdog/alim7101_wdt.c
+++ b/drivers/watchdog/alim7101_wdt.c
@@ -301,6 +301,28 @@ static struct miscdevice wdt_miscdev = {
.fops = wdt_fops,
};
+static int wdt_restart_handle(struct notifier_block *this, unsigned long mode,
+ void *cmd)
+{
+ /*
+* Cobalt devices have no way of rebooting themselves other
+* than getting the watchdog to pull reset, so we restart the
+* watchdog on reboot with no heartbeat.
+*/
+ wdt_change(WDT_ENABLE);
+
+ /* loop until the watchdog fires */
+ while (true)
+ ;
+
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block wdt_restart_handler = {
+ .notifier_call = wdt_restart_handle,
+ .priority = 128,
+};
+
/*
* Notifier for system down
*/
@@ -311,15 +333,6 @@ static int wdt_notify_sys(struct notifier_block *this,
if (code == SYS_DOWN || code == SYS_HALT)
wdt_turnoff();
- if (code == SYS_RESTART) {
- /*
-* Cobalt devices have no way of rebooting themselves other
-* than getting the watchdog to pull reset, so we restart the
-* watchdog on reboot with no heartbeat
-*/
- wdt_change(WDT_ENABLE);
- pr_info(Watchdog timer is now enabled with no heartbeat -
should reboot in ~1 second\n);
- }
return NOTIFY_DONE;
}
@@ -338,6 +351,7 @@ static void __exit alim7101_wdt_unload(void)
/* Deregister */
misc_deregister(wdt_miscdev);
unregister_reboot_notifier(wdt_notifier);
+ unregister_restart_handler(wdt_restart_handler);
pci_dev_put(alim7101_pmu);
}
@@ -390,11 +404,17 @@ static int __init alim7101_wdt_init(void)
goto err_out;
}
+ rc = register_restart_handler(wdt_restart_handler);
+ if (rc) {
+ pr_err(cannot register restart handler (err=%d)\n, rc);
+ goto err_out_reboot;
+ }
+
rc = misc_register(wdt_miscdev);
if (rc) {
pr_err(cannot register miscdev on minor=%d (err=%d)\n,
wdt_miscdev.minor, rc);
- goto err_out_reboot;
+ goto err_out_restart;
}
if (nowayout)
@@ -404,6 +424,8 @@ static int __init alim7101_wdt_init(void)
timeout, nowayout);
return 0;
+err_out_restart:
+ unregister_restart_handler(wdt_restart_handler);
err_out_reboot:
unregister_reboot_notifier(wdt_notifier);
err_out:
--
1.9.1
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[PATCH v7 02/11] power/restart: Call machine_restart instead of arm_pm_restart
machine_restart is supported on non-ARM platforms, and and ultimately calls
arm_pm_restart, so dont call arm_pm_restart directly but use the more
generic function.
Cc: Russell King li...@arm.linux.org.uk
Signed-off-by: Guenter Roeck li...@roeck-us.net
Acked-by: Catalin Marinas catalin.mari...@arm.com
Acked-by: Heiko Stuebner he...@sntech.de
---
v7: No change.
v6: No change.
v5: No change.
v4: No change.
v3: No change.
v2: Added patch.
drivers/power/reset/restart-poweroff.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/power/reset/restart-poweroff.c
b/drivers/power/reset/restart-poweroff.c
index 3e51f8d..edd707e 100644
--- a/drivers/power/reset/restart-poweroff.c
+++ b/drivers/power/reset/restart-poweroff.c
@@ -20,7 +20,8 @@
static void restart_poweroff_do_poweroff(void)
{
- arm_pm_restart(REBOOT_HARD, NULL);
+ reboot_mode = REBOOT_HARD;
+ machine_restart(NULL);
}
static int restart_poweroff_probe(struct platform_device *pdev)
--
1.9.1
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[PATCH v7 04/11] arm: Support restart through restart handler call chain
The kernel core now supports a restart handler call chain for system
restart functions.
With this change, the arm_pm_restart callback is now optional, so
drop its initialization and check if it is set before calling it.
Only call the kernel restart handler if arm_pm_restart is not set.
Signed-off-by: Guenter Roeck li...@roeck-us.net
Acked-by: Catalin Marinas catalin.mari...@arm.com
Acked-by: Heiko Stuebner he...@sntech.de
---
v7: Dropped null_restart and made arm_pm_restart truly optional.
v6: No change.
v5: Renamed restart function to do_kernel_restart
v4: No change.
v3: Use wrapper function to execute notifier call chain.
v2: Only call notifier call chain if arm_pm_restart is not set.
Do not include linux/watchdog.h.
arch/arm/kernel/process.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 81ef686..ea279f7 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -114,17 +114,13 @@ void soft_restart(unsigned long addr)
BUG();
}
-static void null_restart(enum reboot_mode reboot_mode, const char *cmd)
-{
-}
-
/*
* Function pointers to optional machine specific functions
*/
void (*pm_power_off)(void);
EXPORT_SYMBOL(pm_power_off);
-void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd) =
null_restart;
+void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
EXPORT_SYMBOL_GPL(arm_pm_restart);
/*
@@ -230,7 +226,10 @@ void machine_restart(char *cmd)
local_irq_disable();
smp_send_stop();
- arm_pm_restart(reboot_mode, cmd);
+ if (arm_pm_restart)
+ arm_pm_restart(reboot_mode, cmd);
+ else
+ do_kernel_restart(cmd);
/* Give a grace period for failure to restart of 1s */
mdelay(1000);
--
1.9.1
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[PATCH v7 05/11] watchdog: moxart: Register restart handler with kernel restart handler
The kernel now provides an API to trigger a system restart.
Register with it instead of setting arm_pm_restart.
Signed-off-by: Guenter Roeck li...@roeck-us.net
Acked-by: Catalin Marinas catalin.mari...@arm.com
Acked-by: Heiko Stuebner he...@sntech.de
---
v7: No change.
v6: No change.
v5: Functions and variables renamed: *notifier - *handler
v4: Set notifier priority to 128.
v3: Move struct notifier_block into struct moxart_wdt_dev.
Drop static variable previously needed to access struct moxart_wdt_dev
from notifier function; use container_of instead.
v2: No change.
drivers/watchdog/moxart_wdt.c | 32
1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/watchdog/moxart_wdt.c b/drivers/watchdog/moxart_wdt.c
index 4aa3a8a..a64405b 100644
--- a/drivers/watchdog/moxart_wdt.c
+++ b/drivers/watchdog/moxart_wdt.c
@@ -15,12 +15,12 @@
#include linux/module.h
#include linux/err.h
#include linux/kernel.h
+#include linux/notifier.h
#include linux/platform_device.h
+#include linux/reboot.h
#include linux/watchdog.h
#include linux/moduleparam.h
-#include asm/system_misc.h
-
#define REG_COUNT 0x4
#define REG_MODE 0x8
#define REG_ENABLE 0xC
@@ -29,17 +29,22 @@ struct moxart_wdt_dev {
struct watchdog_device dev;
void __iomem *base;
unsigned int clock_frequency;
+ struct notifier_block restart_handler;
};
-static struct moxart_wdt_dev *moxart_restart_ctx;
-
static int heartbeat;
-static void moxart_wdt_restart(enum reboot_mode reboot_mode, const char *cmd)
+static int moxart_restart_handle(struct notifier_block *this,
+unsigned long mode, void *cmd)
{
- writel(1, moxart_restart_ctx-base + REG_COUNT);
- writel(0x5ab9, moxart_restart_ctx-base + REG_MODE);
- writel(0x03, moxart_restart_ctx-base + REG_ENABLE);
+ struct moxart_wdt_dev *moxart_wdt = container_of(this,
+struct moxart_wdt_dev,
+restart_handler);
+ writel(1, moxart_wdt-base + REG_COUNT);
+ writel(0x5ab9, moxart_wdt-base + REG_MODE);
+ writel(0x03, moxart_wdt-base + REG_ENABLE);
+
+ return NOTIFY_DONE;
}
static int moxart_wdt_stop(struct watchdog_device *wdt_dev)
@@ -136,8 +141,12 @@ static int moxart_wdt_probe(struct platform_device *pdev)
if (err)
return err;
- moxart_restart_ctx = moxart_wdt;
- arm_pm_restart = moxart_wdt_restart;
+ moxart_wdt-restart_handler.notifier_call = moxart_restart_handle;
+ moxart_wdt-restart_handler.priority = 128;
+ err = register_restart_handler(moxart_wdt-restart_handler);
+ if (err)
+ dev_err(dev, cannot register restart notifier (err=%d)\n,
+ err);
dev_dbg(dev, Watchdog enabled (heartbeat=%d sec, nowayout=%d)\n,
moxart_wdt-dev.timeout, nowayout);
@@ -149,9 +158,8 @@ static int moxart_wdt_remove(struct platform_device *pdev)
{
struct moxart_wdt_dev *moxart_wdt = platform_get_drvdata(pdev);
- arm_pm_restart = NULL;
+ unregister_restart_handler(moxart_wdt-restart_handler);
moxart_wdt_stop(moxart_wdt-dev);
- watchdog_unregister_device(moxart_wdt-dev);
return 0;
}
--
1.9.1
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[PATCH v7 01/11] kernel: Add support for kernel restart handler call chain
Various drivers implement architecture and/or device specific means to restart (reset) the system. Various mechanisms have been implemented to support those schemes. The best known mechanism is arm_pm_restart, which is a function pointer to be set either from platform specific code or from drivers. Another mechanism is to use hardware watchdogs to issue a reset; this mechanism is used if there is no other method available to reset a board or system. Two examples are alim7101_wdt, which currently uses the reboot notifier to trigger a reset, and moxart_wdt, which registers the arm_pm_restart function. The existing mechanisms have a number of drawbacks. Typically only one scheme to restart the system is supported (at least if arm_pm_restart is used). At least in theory there can be multiple means to restart the system, some of which may be less desirable (for example one mechanism may only reset the CPU, while another may reset the entire system). Using arm_pm_restart can also be racy if the function pointer is set from a driver, as the driver may be in the process of being unloaded when arm_pm_restart is called. Using the reboot notifier is always racy, as it is unknown if and when other functions using the reboot notifier have completed execution by the time the watchdog fires. Introduce a system restart handler call chain to solve the described problems. This call chain is expected to be executed from the architecture specific machine_restart() function. Drivers providing system restart functionality (such as the watchdog drivers mentioned above) are expected to register with this call chain. By using the priority field in the notifier block, callers can control restart handler execution sequence and thus ensure that the restart handler with the optimal restart capabilities for a given system is called first. Signed-off-by: Guenter Roeck li...@roeck-us.net Acked-by: Catalin Marinas catalin.mari...@arm.com Acked-by: Heiko Stuebner he...@sntech.de --- v7: Rebased to v3.17-rc1 v6: Use atomic notifier call chain v5: Function renames: register_restart_notifier - register_restart_handler unregister_restart_notifier - unregister_restart_handler kernel_restart_notify - do_kernel_restart v4: Document and suggest values for notifier priorities v3: Add kernel_restart_notify wrapper function to execute notifier. Improve documentation. Move restart_notifier_list into kernel/reboot.c and make it static. v2: No change. include/linux/reboot.h | 3 ++ kernel/reboot.c| 81 ++ 2 files changed, 84 insertions(+) diff --git a/include/linux/reboot.h b/include/linux/reboot.h index 48bf152..67fc8fc 100644 --- a/include/linux/reboot.h +++ b/include/linux/reboot.h @@ -38,6 +38,9 @@ extern int reboot_force; extern int register_reboot_notifier(struct notifier_block *); extern int unregister_reboot_notifier(struct notifier_block *); +extern int register_restart_handler(struct notifier_block *); +extern int unregister_restart_handler(struct notifier_block *); +extern void do_kernel_restart(char *cmd); /* * Architecture-specific implementations of sys_reboot commands. diff --git a/kernel/reboot.c b/kernel/reboot.c index a3a9e24..5925f5a 100644 --- a/kernel/reboot.c +++ b/kernel/reboot.c @@ -104,6 +104,87 @@ int unregister_reboot_notifier(struct notifier_block *nb) } EXPORT_SYMBOL(unregister_reboot_notifier); +/* + * Notifier list for kernel code which wants to be called + * to restart the system. + */ +static ATOMIC_NOTIFIER_HEAD(restart_handler_list); + +/** + * register_restart_handler - Register function to be called to reset + *the system + * @nb: Info about handler function to be called + * @nb-priority: Handler priority. Handlers should follow the + * following guidelines for setting priorities. + * 0: Restart handler of last resort, + * with limited restart capabilities + * 128:Default restart handler; use if no other + * restart handler is expected to be available, + * and/or if restart functionality is + * sufficient to restart the entire system + * 255:Highest priority restart handler, will + * preempt all other restart handlers + * + * Registers a function with code to be called to restart the + * system. + * + * Registered functions will be called from machine_restart as last + * step of the restart sequence (if the architecture specific + * machine_restart function calls do_kernel_restart - see below + * for details). + * Registered functions are expected to restart the system immediately. + * If more than one function is registered, the restart handler priority + * selects which function will be called first. + *
[PATCH v7 03/11] arm64: Support restart through restart handler call chain
The kernel core now supports a restart handler call chain to restart the system. Call it if arm_pm_restart is not set. Signed-off-by: Guenter Roeck li...@roeck-us.net Acked-by: Catalin Marinas catalin.mari...@arm.com Acked-by: Heiko Stuebner he...@sntech.de --- v7: No change. v6: No change. v5: Renamed restart function to do_kernel_restart v4: No change. v3: Use wrapper function to execute notifier call chain. v2: Only call notifier call chain if arm_pm_restart is not set. Do not include linux/watchdog.h. arch/arm64/kernel/process.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 1309d64..0d3fb9f 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -180,6 +180,8 @@ void machine_restart(char *cmd) /* Now call the architecture specific reboot code. */ if (arm_pm_restart) arm_pm_restart(reboot_mode, cmd); + else + do_kernel_restart(cmd); /* * Whoops - the architecture was unable to reboot. -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] videobuf2-core: make checking condition more strict
It's also invalid that plane_no equals to vb-num_planes
Signed-off-by: Zhaowei Yuan zhaowei.y...@samsung.com
---
drivers/media/v4l2-core/videobuf2-core.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/v4l2-core/videobuf2-core.c
b/drivers/media/v4l2-core/videobuf2-core.c
index c359006..1ae4e57 100644
--- a/drivers/media/v4l2-core/videobuf2-core.c
+++ b/drivers/media/v4l2-core/videobuf2-core.c
@@ -1130,7 +1130,7 @@ EXPORT_SYMBOL_GPL(vb2_plane_vaddr);
*/
void *vb2_plane_cookie(struct vb2_buffer *vb, unsigned int plane_no)
{
- if (plane_no vb-num_planes || !vb-planes[plane_no].mem_priv)
+ if (plane_no = vb-num_planes || !vb-planes[plane_no].mem_priv)
return NULL;
return call_ptr_memop(vb, cookie, vb-planes[plane_no].mem_priv);
--
1.7.9.5
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Re: [PATCH V2 4/9] drm/exynos: add exynos_dp_panel driver registration to drm driver
On Tue, Apr 22, 2014 at 8:26 AM, Thierry Reding thierry.red...@gmail.com wrote: On Tue, Apr 22, 2014 at 08:33:23PM +0530, Ajay kumar wrote: Hi Thierry, On Tue, Apr 22, 2014 at 2:03 PM, Thierry Reding thierry.red...@gmail.com wrote: On Tue, Apr 22, 2014 at 04:09:13AM +0530, Ajay Kumar wrote: Register exynos_dp_panel before the list of exynos crtcs and connectors are probed. This is needed because exynos_dp_panel should be registered to the drm_panel list via panel-exynos-dp probe, i.e much before exynos_dp_bind calls of_drm_find_panel(). Signed-off-by: Ajay Kumar ajaykumar...@samsung.com --- Changes since V1: Added platform_driver_unregister(exynos_dp_panel_driver) to exynos_drm_platform_remove as per Jingoo Han's correction drivers/gpu/drm/exynos/exynos_drm_drv.c | 15 +++ drivers/gpu/drm/exynos/exynos_drm_drv.h |1 + 2 files changed, 16 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c index 1d653f8..2db7f67 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c @@ -530,12 +530,23 @@ static int exynos_drm_platform_probe(struct platform_device *pdev) goto err_unregister_ipp_drv; #endif +#ifdef CONFIG_DRM_PANEL_EXYNOS_DP + ret = platform_driver_register(exynos_dp_panel_driver); + if (ret 0) + goto err_unregister_dp_panel; +#endif No, this is not how you're supposed to use DRM panel drivers. The idea is that you write a standalone driver for a given panel. What you do here has a number of problems. For one it's a driver that's tightly coupled to Exynos SoCs. But if I have a different SoC that uses the same panel I want to be able to use the same driver, and not have to rewrite the driver for my SoC. Another problem is that you're assuming here that the driver is built in and it will break if you try to build either Exynos DRM or the panel driver as a module. This is perhaps nothing you care about right now, but eventually people will want to ship a single kernel that can run on a number of SoCs. But if we keep adding things like this, that kernel will keep growing in size until it no longer fits in any kind of memory. Thierry I completely agree with you in this! Yes, this is not acceptable, but I want to know an acceptable workaround for the situation below: I register the driver using module_init(). And, exynos_drm gets probed much before the panel driver probe happens. So, the panel driver hasn't probed yet, but exynos_dp via exynos_drm tries to call of_drm_find_panel which always returns NULL. That's a situation that your driver needs to be able to deal with. The driver registration order doesn't matter one bit. It may happen to work most of the time, but as soon as one of the resources that your panel driver needs isn't there when the panel is probed, then it won't be registered and of_drm_find_panel() will still return NULL. Usually the right thing to do in that case would be to return (and propagate) -EPROBE_DEFER so that your driver's probe is deferred and retried when other drivers have been probed. That way it should eventually get a non-NULL panel. So I just gave this (drm_panel + probe deferring) a shot on exynos, and correctly reacting to -EPROBE_DEFER postpones DP initialization by approximately 1.5 second. Is there a good way to handle that? As it stands, this isn't usable. Stéphane -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] thermal: exynos: Remove duplicate code when reading triminfo register of Exynos5440
This patch remove simply duplicate code when reading triminfo register of
Exynos5440.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Zhang Rui rui.zh...@intel.com
Cc: Eduardo Valentin edubez...@gmail.com
Cc: Amit Daniel Kachhap amit.dan...@samsung.com
---
drivers/thermal/samsung/exynos_tmu.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index ed01606..13c2e01 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -181,15 +181,13 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
*/
switch (data-id) {
case 0:
+ case 2:
trim_info = readl(data-base +
EXYNOS5440_EFUSE_SWAP_OFFSET + reg-triminfo_data);
break;
case 1:
trim_info = readl(data-base + reg-triminfo_data);
break;
- case 2:
- trim_info = readl(data-base -
- EXYNOS5440_EFUSE_SWAP_OFFSET + reg-triminfo_data);
}
} else {
/* On exynos5420 the triminfo register is in the shared space */
--
1.8.0
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Re: [PATCHv3] thermal: exynos: Add support for TRIM_RELOAD feature at Exynos3250
On Wed, Aug 20, 2014 at 5:22 AM, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch add support for TRIM_RELOAD feature at Exynos3250. The TMU of
Exynos3250 has two TRIMINFO_CON register.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Zhang Rui rui.zh...@intel.com
Cc: Eduardo Valentin edubez...@gmail.com
Cc: Amit Daniel Kachhap amit.dan...@samsung.com
The changes looks fine,
Reviewed-by: Amit Daniel Kachhap amit.dan...@samsung.com
Thanks,
Amit
---
Changes from v2:
- Fix build break because of missing 'or' operation.
Changes from v1:
- Add missing 'TMU_SUPPORT_TRIM_RELOAD' feature
drivers/thermal/samsung/exynos_tmu.c | 7 +--
drivers/thermal/samsung/exynos_tmu.h | 5 +++--
drivers/thermal/samsung/exynos_tmu_data.c | 11 +--
drivers/thermal/samsung/exynos_tmu_data.h | 7 +--
4 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index acbff14..ed01606 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -164,8 +164,11 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
}
}
- if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
- __raw_writel(1, data-base + reg-triminfo_ctrl);
+ if (TMU_SUPPORTS(pdata, TRIM_RELOAD)) {
+ for (i = 0; i pdata-triminfo_reload_count; i++)
+ __raw_writel(pdata-triminfo_reload[i],
+ data-base + reg-triminfo_ctrl[i]);
+ }
if (pdata-cal_mode == HW_MODE)
goto skip_calib_data;
diff --git a/drivers/thermal/samsung/exynos_tmu.h
b/drivers/thermal/samsung/exynos_tmu.h
index 1b4a644..72cb54e 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -151,8 +151,7 @@ struct exynos_tmu_registers {
u32 triminfo_25_shift;
u32 triminfo_85_shift;
- u32 triminfo_ctrl;
- u32 triminfo_ctrl1;
+ u32 triminfo_ctrl[2];
u32 triminfo_reload_shift;
u32 tmu_ctrl;
@@ -295,6 +294,8 @@ struct exynos_tmu_platform_data {
u8 second_point_trim;
u8 default_temp_offset;
u8 test_mux;
+ u8 triminfo_reload[2];
+ u8 triminfo_reload_count;
enum calibration_type cal_type;
enum calibration_mode cal_mode;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
index aa8e0de..8cd609c 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -95,6 +95,8 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON1,
+ .triminfo_ctrl[1] = EXYNOS_TMU_TRIMINFO_CON2,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
.buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
@@ -160,8 +162,11 @@ static const struct exynos_tmu_registers
exynos3250_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload[1] = 0x11, \
+ .triminfo_reload_count = 2, \
.registers = exynos3250_tmu_registers, \
- .features = (TMU_SUPPORT_EMULATION | \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS |
\
TMU_SUPPORT_EMUL_TIME)
#endif
@@ -184,7 +189,7 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
- .triminfo_ctrl = EXYNOS_TMU_TRIMINFO_CON,
+ .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON2,
.triminfo_reload_shift = EXYNOS_TRIMINFO_RELOAD_SHIFT,
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
@@ -252,6 +257,8 @@ static const struct exynos_tmu_registers
exynos4412_tmu_registers = {
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
+ .triminfo_reload[0] = 0x1, \
+ .triminfo_reload_count = 1, \
.registers = exynos4412_tmu_registers, \
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS |
\
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h
b/drivers/thermal/samsung/exynos_tmu_data.h
index
Re: [PATCHv3] thermal: exynos: Add support for TRIM_RELOAD feature at Exynos3250
Dear Amit, On 08/20/2014 01:51 PM, amit daniel kachhap wrote: On Wed, Aug 20, 2014 at 5:22 AM, Chanwoo Choi cw00.c...@samsung.com wrote: This patch add support for TRIM_RELOAD feature at Exynos3250. The TMU of Exynos3250 has two TRIMINFO_CON register. Signed-off-by: Chanwoo Choi cw00.c...@samsung.com Acked-by: Kyungmin Park kyungmin.p...@samsung.com Cc: Zhang Rui rui.zh...@intel.com Cc: Eduardo Valentin edubez...@gmail.com Cc: Amit Daniel Kachhap amit.dan...@samsung.com The changes looks fine, Reviewed-by: Amit Daniel Kachhap amit.dan...@samsung.com Thanks for your review. Best Regards, Chanwoo Choi -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] thermal: exynos: Remove duplicate code when reading triminfo register of Exynos5440
On Wed, Aug 20, 2014 at 9:54 AM, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch remove simply duplicate code when reading triminfo register of
Exynos5440.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Zhang Rui rui.zh...@intel.com
Cc: Eduardo Valentin edubez...@gmail.com
Cc: Amit Daniel Kachhap amit.dan...@samsung.com
Reviewed-by: Amit Daniel Kachhap amit.dan...@samsung.com
Thanks,
Amit
---
drivers/thermal/samsung/exynos_tmu.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index ed01606..13c2e01 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -181,15 +181,13 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
*/
switch (data-id) {
case 0:
+ case 2:
trim_info = readl(data-base +
EXYNOS5440_EFUSE_SWAP_OFFSET + reg-triminfo_data);
break;
case 1:
trim_info = readl(data-base + reg-triminfo_data);
break;
- case 2:
- trim_info = readl(data-base -
- EXYNOS5440_EFUSE_SWAP_OFFSET + reg-triminfo_data);
}
} else {
/* On exynos5420 the triminfo register is in the shared space
*/
--
1.8.0
--
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