Re: [PATCH] drm/exynos: fix plane-framebuffer linkage

2014-09-16 Thread Daniel Vetter
On Mon, Sep 15, 2014 at 12:52:17PM -0600, Daniel Drake wrote:
 Pageflipping currently causes some inconsistencies that lead to
 crashes. Just run an app that causes a CRTC pageflip in a raw X session
 and check that it exits cleanly and can be restarted - you'll see
 crashes like:
  Unable to handle kernel NULL pointer dereference at virtual address 0334
  PC is at exynos_drm_crtc_plane_commit+0x20/0x40
  LR is at exynos_drm_crtc_plane_commit+0x20/0x40
  [c03749b4] (exynos_drm_crtc_plane_commit) from [c03741bc] 
 (exynos_drm_crtc_commit+0x44/0x70)
  [c03741bc] (exynos_drm_crtc_commit) from [c03743a0] 
 (exynos_drm_crtc_mode_set_commit.isra.2+0xb4/0xc4)
  [c03743a0] (exynos_drm_crtc_mode_set_commit.isra.2) from [c03744f4] 
 (exynos_drm_crtc_page_flip+0x140/0x1a8)
  [c03744f4] (exynos_drm_crtc_page_flip) from [c036b20c] 
 (drm_mode_page_flip_ioctl+0x224/0x2dc)
  [c036b20c] (drm_mode_page_flip_ioctl) from [c035c324] 
 (drm_ioctl+0x338/0x4fc)
 
 These crashes happen because drm_plane_force_disable has previously set
 plane-crtc to NULL.
 
 When drm_mode_page_flip_ioctl() is used to flip another framebuffer
 onto the primary plane, crtc-primary-fb is correctly updated (this is
 a virtual plane created by plane_helper), but plane-fb is not (this
 plane is the real one, created by exynos_drm_crtc_create).
 
 We then come to handle rmfb of the backbuffer, which the real primary
 plane is incorrectly pointing at. So drm_framebuffer_remove() decides that
 the buffer is actually active on a plane and force-disables the plane.
 
 Ensuring that plane-fb is kept up-to-date solves that issue, but
 exposes a reference counting problem. Now we see crashes when rmfb is
 called on the front-buffer, because the rmfb code expects to drop 3
 references here, and there are only 2.
 
 That can be fixed by adopting the reference management found in omapdrm:
 Framebuffer references are not taken directly in crtc mode_set context,
 but rather in the context of updating the plane, which also covers
 flips. Like omapdrm we also unreference the old framebuffer here.
 
 Signed-off-by: Daniel Drake dr...@endlessm.com

This sounds very much like exynos should switch to universal planes so
that the fake primary plane created by the helpers doesn't get in the way.
And for chips which already use planes for everything internally this
shouldn't be a lot more than a few lines.
-Daniel

 ---
  drivers/gpu/drm/exynos/exynos_drm_crtc.c  | 12 ++--
  drivers/gpu/drm/exynos/exynos_drm_plane.c |  8 
  2 files changed, 10 insertions(+), 10 deletions(-)
 
 diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c 
 b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
 index b68e58f..7aa9dee 100644
 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
 +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
 @@ -140,16 +140,8 @@ exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct 
 drm_display_mode *mode,
   if (manager-ops-mode_set)
   manager-ops-mode_set(manager, crtc-mode);
  
 - ret = exynos_plane_mode_set(plane, crtc, crtc-primary-fb, 0, 0, 
 crtc_w, crtc_h,
 - x, y, crtc_w, crtc_h);
 - if (ret)
 - return ret;
 -
 - plane-crtc = crtc;
 - plane-fb = crtc-primary-fb;
 - drm_framebuffer_reference(plane-fb);
 -
 - return 0;
 + return exynos_plane_mode_set(plane, crtc, crtc-primary-fb, 0, 0,
 +  crtc_w, crtc_h, x, y, crtc_w, crtc_h);
  }
  
  static int exynos_drm_crtc_mode_set_commit(struct drm_crtc *crtc, int x, int 
 y,
 diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c 
 b/drivers/gpu/drm/exynos/exynos_drm_plane.c
 index 8371cbd..df27e35 100644
 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
 +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
 @@ -139,6 +139,14 @@ int exynos_plane_mode_set(struct drm_plane *plane, 
 struct drm_crtc *crtc,
   overlay-crtc_x, overlay-crtc_y,
   overlay-crtc_width, overlay-crtc_height);
  
 + if (plane-fb)
 + drm_framebuffer_unreference(plane-fb);
 +
 + drm_framebuffer_reference(fb);
 +
 + plane-fb = fb;
 + plane-crtc = crtc;
 +
   exynos_drm_crtc_plane_mode_set(crtc, overlay);
  
   return 0;
 -- 
 1.9.1
 
 ___
 dri-devel mailing list
 dri-de...@lists.freedesktop.org
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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[PATCH RESEND] ARM: DTS: correct the capability string for mmc0

2014-09-16 Thread Vivek Gautam
From: Naveen Krishna Chatradhi ch.nav...@samsung.com

MMC capability for HS200 is parsed in mmc/core/host.c as
dts string mmc-hs200-1_8v.

This patch corrects the dts string for Exynos5420 based peach-pit
and Exynos5800 based peach-pi boards.

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---

Hi Kukjin,

As commented by Doug earlier for this patch, the two patches required
  -- mmc: dw_mmc: Make sure we don't get stuck when we get an error
  -- mmc: dw_mmc: change to use recommended reset procedure
are now merged in upstream.
So you can go ahead and pick this change.

 arch/arm/boot/dts/exynos5420-peach-pit.dts |2 +-
 arch/arm/boot/dts/exynos5800-peach-pi.dts  |2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 9a23382..e52ed04 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -560,7 +560,7 @@
status = okay;
num-slots = 1;
broken-cd;
-   caps2-mmc-hs200-1_8v;
+   mmc-hs200-1_8v;
cap-mmc-highspeed;
non-removable;
card-detect-delay = 200;
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts 
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 1d31c81..8616fbd 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -548,7 +548,7 @@
status = okay;
num-slots = 1;
broken-cd;
-   caps2-mmc-hs200-1_8v;
+   mmc-hs200-1_8v;
cap-mmc-highspeed;
non-removable;
card-detect-delay = 200;
-- 
1.7.10.4

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[PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

2014-09-16 Thread Naveen Krishna Chatradhi
Changes since v1:
1. Rebased on top of togreg branch of IIO git.

This patch set does the following
1. Use the syscon and Regmap API instead of ioremappaing the
   ADC_PHY register from PMU.
2. Updates the Documentation in exynos-adc.txt with syscon phandle
   for the ADC nodes.
3. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
   Exynos5420 with the syscon phandle.

Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
by verifying sysfs entries provided by HWMON based NTC thermistors.

Tested-By for Exynos3250, Exynos4x12 would be appreciated.

Naveen Krishna Chatradhi (3):
  iio: exyno-adc: use syscon for PMU register access
  Documentation: dt-bindings: update exynos-adc.txt with syscon handle
  ARM: dts: exynos: Add sysreg phandle to ADC node

 .../devicetree/bindings/arm/samsung/exynos-adc.txt |9 --
 arch/arm/boot/dts/exynos3250.dtsi  |3 +-
 arch/arm/boot/dts/exynos4x12.dtsi  |3 +-
 arch/arm/boot/dts/exynos5250.dtsi  |3 +-
 arch/arm/boot/dts/exynos5420.dtsi  |3 +-
 drivers/iio/adc/exynos_adc.c   |   30 ++--
 6 files changed, 36 insertions(+), 15 deletions(-)

-- 
1.7.9.5

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[PATCH v2 3/3] ARM: dts: exynos: Add sysreg phandle to ADC node

2014-09-16 Thread Naveen Krishna Chatradhi
Instead of using the ADC_PHY register base address, use sysreg phandle
in ADC node to control ADC_PHY configuration register.

This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250,
and Exynos5420, Exynos5800.

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
To: linux-samsung-soc@vger.kernel.org
---
 arch/arm/boot/dts/exynos3250.dtsi |3 ++-
 arch/arm/boot/dts/exynos4x12.dtsi |3 ++-
 arch/arm/boot/dts/exynos5250.dtsi |3 ++-
 arch/arm/boot/dts/exynos5420.dtsi |3 ++-
 4 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi 
b/arch/arm/boot/dts/exynos3250.dtsi
index 1d52de6..b997a4c 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -272,12 +272,13 @@
adc: adc@126C {
compatible = samsung,exynos3250-adc,
 samsung,exynos-adc-v2;
-   reg = 0x126C 0x100, 0x10020718 0x4;
+   reg = 0x126C 0x100;
interrupts = 0 137 0;
clock-names = adc, sclk;
clocks = cmu CLK_TSADC, cmu CLK_SCLK_TSADC;
#io-channel-cells = 1;
io-channel-ranges;
+   samsung,syscon-phandle = pmu_system_controller;
status = disabled;
};
 
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi 
b/arch/arm/boot/dts/exynos4x12.dtsi
index 861bb91..9ee77d3 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -108,13 +108,14 @@
 
adc: adc@126C {
compatible = samsung,exynos-adc-v1;
-   reg = 0x126C 0x100, 0x10020718 0x4;
+   reg = 0x126C 0x100;
interrupt-parent = combiner;
interrupts = 10 3;
clocks = clock CLK_TSADC;
clock-names = adc;
#io-channel-cells = 1;
io-channel-ranges;
+   samsung,syscon-phandle = pmu_system_controller;
status = disabled;
};
 
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 492e1ef..108adc5 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -765,12 +765,13 @@
 
adc: adc@12D1 {
compatible = samsung,exynos-adc-v1;
-   reg = 0x12D1 0x100, 0x10040718 0x4;
+   reg = 0x12D1 0x100;
interrupts = 0 106 0;
clocks = clock CLK_ADC;
clock-names = adc;
#io-channel-cells = 1;
io-channel-ranges;
+   samsung,syscon-phandle = pmu_system_controller;
status = disabled;
};
 
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index bfe056d..5fd587a 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -541,12 +541,13 @@
 
adc: adc@12D1 {
compatible = samsung,exynos-adc-v2;
-   reg = 0x12D1 0x100, 0x10040720 0x4;
+   reg = 0x12D1 0x100;
interrupts = 0 106 0;
clocks = clock CLK_TSADC;
clock-names = adc;
#io-channel-cells = 1;
io-channel-ranges;
+   samsung,syscon-phandle = pmu_system_controller;
status = disabled;
};
 
-- 
1.7.9.5

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[PATCH v2 1/3] iio: exyno-adc: use syscon for PMU register access

2014-09-16 Thread Naveen Krishna Chatradhi
This patch updates the IIO based ADC driver to use syscon and regmap
APIs to access and use PMU registers instead of remapping the PMU
registers in the driver.

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
To: linux-...@vger.kernel.org
---
Changes since v1:
Rebased on top of togreg branch of IIO git

 drivers/iio/adc/exynos_adc.c |   30 +-
 1 file changed, 21 insertions(+), 9 deletions(-)

diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index 43620fd..fe03177 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -39,6 +39,8 @@
 #include linux/iio/iio.h
 #include linux/iio/machine.h
 #include linux/iio/driver.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
 
 /* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
 #define ADC_V1_CON(x)  ((x) + 0x00)
@@ -90,11 +92,14 @@
 
 #define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100))
 
+#define EXYNOS_ADCV1_PHY_OFFSET0x0718
+#define EXYNOS_ADCV2_PHY_OFFSET0x0720
+
 struct exynos_adc {
struct exynos_adc_data  *data;
struct device   *dev;
void __iomem*regs;
-   void __iomem*enable_reg;
+   struct regmap   *pmu_map;
struct clk  *clk;
struct clk  *sclk;
unsigned intirq;
@@ -110,6 +115,7 @@ struct exynos_adc_data {
int num_channels;
bool needs_sclk;
bool needs_adc_phy;
+   int phy_offset;
u32 mask;
 
void (*init_hw)(struct exynos_adc *info);
@@ -183,7 +189,7 @@ static void exynos_adc_v1_init_hw(struct exynos_adc *info)
u32 con1;
 
if (info-data-needs_adc_phy)
-   writel(1, info-enable_reg);
+   regmap_write(info-pmu_map, info-data-phy_offset, 1);
 
/* set default prescaler values and Enable prescaler */
con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
@@ -198,7 +204,7 @@ static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
u32 con;
 
if (info-data-needs_adc_phy)
-   writel(0, info-enable_reg);
+   regmap_write(info-pmu_map, info-data-phy_offset, 0);
 
con = readl(ADC_V1_CON(info-regs));
con |= ADC_V1_CON_STANDBY;
@@ -225,6 +231,7 @@ static const struct exynos_adc_data exynos_adc_v1_data = {
.num_channels   = MAX_ADC_V1_CHANNELS,
.mask   = ADC_DATX_MASK,/* 12 bit ADC resolution */
.needs_adc_phy  = true,
+   .phy_offset = EXYNOS_ADCV1_PHY_OFFSET,
 
.init_hw= exynos_adc_v1_init_hw,
.exit_hw= exynos_adc_v1_exit_hw,
@@ -314,7 +321,7 @@ static void exynos_adc_v2_init_hw(struct exynos_adc *info)
u32 con1, con2;
 
if (info-data-needs_adc_phy)
-   writel(1, info-enable_reg);
+   regmap_write(info-pmu_map, info-data-phy_offset, 1);
 
con1 = ADC_V2_CON1_SOFT_RESET;
writel(con1, ADC_V2_CON1(info-regs));
@@ -332,7 +339,7 @@ static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
u32 con;
 
if (info-data-needs_adc_phy)
-   writel(0, info-enable_reg);
+   regmap_write(info-pmu_map, info-data-phy_offset, 0);
 
con = readl(ADC_V2_CON1(info-regs));
con = ~ADC_CON_EN_START;
@@ -362,6 +369,7 @@ static const struct exynos_adc_data exynos_adc_v2_data = {
.num_channels   = MAX_ADC_V2_CHANNELS,
.mask   = ADC_DATX_MASK, /* 12 bit ADC resolution */
.needs_adc_phy  = true,
+   .phy_offset = EXYNOS_ADCV2_PHY_OFFSET,
 
.init_hw= exynos_adc_v2_init_hw,
.exit_hw= exynos_adc_v2_exit_hw,
@@ -374,6 +382,7 @@ static const struct exynos_adc_data exynos3250_adc_data = {
.mask   = ADC_DATX_MASK, /* 12 bit ADC resolution */
.needs_sclk = true,
.needs_adc_phy  = true,
+   .phy_offset = EXYNOS_ADCV1_PHY_OFFSET,
 
.init_hw= exynos_adc_v2_init_hw,
.exit_hw= exynos_adc_v2_exit_hw,
@@ -558,10 +567,13 @@ static int exynos_adc_probe(struct platform_device *pdev)
 
 
if (info-data-needs_adc_phy) {
-   mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-   info-enable_reg = devm_ioremap_resource(pdev-dev, mem);
-   if (IS_ERR(info-enable_reg))
-   return PTR_ERR(info-enable_reg);
+   info-pmu_map = syscon_regmap_lookup_by_phandle(
+   pdev-dev.of_node,
+   samsung,syscon-phandle);
+   if (IS_ERR(info-pmu_map)) {
+   dev_err(pdev-dev, syscon regmap lookup failed.\n);
+   return PTR_ERR(info-pmu_map);
+   }
}
 
irq = platform_get_irq(pdev, 0);
-- 
1.7.9.5

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[PATCH v2 2/3] Documentation: dt-bindings: update exynos-adc.txt with syscon handle

2014-09-16 Thread Naveen Krishna Chatradhi
This patch updates the DT bindings for ADC in exynos-adc.txt with the
syscon phandle to the ADC nodes.

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
To: devicet...@vger.kernel.org
---
 .../devicetree/bindings/arm/samsung/exynos-adc.txt |9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt 
b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index 709efaa..c368210 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -43,13 +43,16 @@ Required properties:
   compatible ADC block)
 - vdd-supply   VDD input supply.
 
+- samsung,syscon-phandle Contains the PMU system controller node
+   (To access the ADC_PHY register on 
Exynos5250/5420/5800/3250)
+
 Note: child nodes can be added for auto probing from device tree.
 
 Example: adding device info in dtsi file
 
 adc: adc@12D1 {
compatible = samsung,exynos-adc-v1;
-   reg = 0x12D1 0x100, 0x10040718 0x4;
+   reg = 0x12D1 0x100;
interrupts = 0 106 0;
#io-channel-cells = 1;
io-channel-ranges;
@@ -58,13 +61,14 @@ adc: adc@12D1 {
clock-names = adc;
 
vdd-supply = buck5_reg;
+   samsung,syscon-phandle = pmu_system_controller;
 };
 
 Example: adding device info in dtsi file for Exynos3250 with additional sclk
 
 adc: adc@126C {
compatible = samsung,exynos3250-adc, samsung,exynos-adc-v2;
-   reg = 0x126C 0x100, 0x10020718 0x4;
+   reg = 0x126C 0x100;
interrupts = 0 137 0;
#io-channel-cells = 1;
io-channel-ranges;
@@ -73,6 +77,7 @@ adc: adc@126C {
clock-names = adc, sclk;
 
vdd-supply = buck5_reg;
+   samsung,syscon-phandle = pmu_system_controller;
 };
 
 Example: Adding child nodes in dts file
-- 
1.7.9.5

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[PATCH 1/2] i2c: exynos: add support for HSI2C module on Exynos7

2014-09-16 Thread Naveen Krishna Chatradhi
The HSI2C module on Exynos7 differs in the transfer status
bits. Transfer status bits were moved to INT_ENABLE and
INT_STATUS registers

This patch adds support for the HSI2C module on Exynos7.
1. Implementes a hw field in the variant struct to distinguish
   the hardware.
2. Updates the dt-new compatible in dt-binding documenation

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Wolfram Sang w...@the-dreams.de
---
 .../devicetree/bindings/i2c/i2c-exynos5.txt|2 +
 drivers/i2c/busses/i2c-exynos5.c   |   71 ++--
 2 files changed, 67 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt 
b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
index d4745e3..2dbc0b6 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
@@ -12,6 +12,8 @@ Required properties:
on Exynos5250 and Exynos5420 SoCs.
- samsung,exynos5260-hsi2c, for i2c compatible with HSI2C available
on Exynos5260 SoCs.
+   - samsung,exynos7-hsi2c, for i2c compatible with HSI2C available
+   on Exynos7 SoCs.
 
   - reg: physical base address of the controller and length of memory mapped
 region.
diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c
index 28073f1..81e6263 100644
--- a/drivers/i2c/busses/i2c-exynos5.c
+++ b/drivers/i2c/busses/i2c-exynos5.c
@@ -83,7 +83,6 @@
 #define HSI2C_INT_TX_ALMOSTEMPTY_EN(1u  0)
 #define HSI2C_INT_RX_ALMOSTFULL_EN (1u  1)
 #define HSI2C_INT_TRAILING_EN  (1u  6)
-#define HSI2C_INT_I2C_EN   (1u  9)
 
 /* I2C_INT_STAT Register bits */
 #define HSI2C_INT_TX_ALMOSTEMPTY   (1u  0)
@@ -95,6 +94,17 @@
 #define HSI2C_INT_TRAILING (1u  6)
 #define HSI2C_INT_I2C  (1u  9)
 
+#define HSI2C_INT_TRANS_DONE   (1u  7)
+#define HSI2C_INT_TRANS_ABORT  (1u  8)
+#define HSI2C_INT_NO_DEV_ACK   (1u  9)
+#define HSI2C_INT_NO_DEV   (1u  10)
+#define HSI2C_INT_TIMEOUT  (1u  11)
+#define HSI2C_INT_I2C_TRANS(HSI2C_INT_TRANS_DONE | \
+   HSI2C_INT_TRANS_ABORT | \
+   HSI2C_INT_NO_DEV_ACK |  \
+   HSI2C_INT_NO_DEV |  \
+   HSI2C_INT_TIMEOUT)
+
 /* I2C_FIFO_STAT Register bits */
 #define HSI2C_RX_FIFO_EMPTY(1u  24)
 #define HSI2C_RX_FIFO_FULL (1u  23)
@@ -143,6 +153,8 @@
 
 #define EXYNOS5_I2C_TIMEOUT (msecs_to_jiffies(1000))
 
+#define HSI2C_EXYNOS7  BIT(0)
+
 struct exynos5_i2c {
struct i2c_adapter  adap;
unsigned intsuspended:1;
@@ -192,6 +204,7 @@ struct exynos5_i2c {
  */
 struct exynos_hsi2c_variant {
unsigned intfifo_depth;
+   unsigned inthw;
 };
 
 static const struct exynos_hsi2c_variant exynos5250_hsi2c_data = {
@@ -202,6 +215,11 @@ static const struct exynos_hsi2c_variant 
exynos5260_hsi2c_data = {
.fifo_depth = 16,
 };
 
+static const struct exynos_hsi2c_variant exynos7_hsi2c_data = {
+   .fifo_depth = 16,
+   .hw = HSI2C_EXYNOS7,
+};
+
 static const struct of_device_id exynos5_i2c_match[] = {
{
.compatible = samsung,exynos5-hsi2c,
@@ -212,6 +230,9 @@ static const struct of_device_id exynos5_i2c_match[] = {
}, {
.compatible = samsung,exynos5260-hsi2c,
.data = exynos5260_hsi2c_data
+   }, {
+   .compatible = samsung,exynos7-hsi2c,
+   .data = exynos7_hsi2c_data
}, {},
 };
 MODULE_DEVICE_TABLE(of, exynos5_i2c_match);
@@ -256,13 +277,24 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c 
*i2c, int mode)
i2c-hs_clock : i2c-fs_clock;
 
/*
+* In case of HSI2C controller in Exynos5 series
 * FPCLK / FI2C =
 * (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 8 + 2 * FLT_CYCLE
+*
+* In case of HSI2C controllers in Exynos7 series
+* FPCLK / FI2C =
+* (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 8 + FLT_CYCLE
+*
 * utemp0 = (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2)
 * utemp1 = (TSCLK_L + TSCLK_H + 2)
 */
t_ftl_cycle = (readl(i2c-regs + HSI2C_CONF)  16)  0x7;
-   utemp0 = (clkin / op_clk) - 8 - 2 * t_ftl_cycle;
+   utemp0 = (clkin / op_clk) - 8;
+
+   if (i2c-variant-hw == HSI2C_EXYNOS7)
+   utemp0 -= t_ftl_cycle;
+   else
+   utemp0 -= 2 * t_ftl_cycle;
 
/* CLK_DIV max is 256 */
for (div = 0; div  256; div++) {
@@ -407,7 +439,28 @@ 

[PATCH 2/2] i2c: exynos5: Add Kconfig dependencies

2014-09-16 Thread Naveen Krishna Chatradhi
The i2c-exynos5.c driver can be reused for the HSI2C controller
on Exynos7 SoCs from Samsung.

This patch adds the Kconfig dependency to choose i2c-exynos5.c
for CONFIG_ARCH_EXYNOS7.

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Wolfram Sang w...@the-dreams.de
---
 drivers/i2c/busses/Kconfig |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 2ac87fa..1f3b9cb 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -465,7 +465,7 @@ config I2C_EG20T
 
 config I2C_EXYNOS5
tristate Exynos5 high-speed I2C driver
-   depends on ARCH_EXYNOS5  OF
+   depends on ARCH_EXYNOS  OF
default y
help
  High-speed I2C controller on Exynos5 based Samsung SoCs.
-- 
1.7.9.5

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[PATCH 0/2] i2c: Add i2c support for Exynos7 SoC

2014-09-16 Thread Naveen Krishna Chatradhi
This patchset adds code to the i2c-exynos5.c driver to support
the HSI2C H/W available on Exynos7 SoC.

Also, modifies the Kconfig dependencies to be able to select
for ARCH_EXYNOS7 platform.

The following patches are tested based on Kgene's for-next tree.
https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/log/?h=for-next

Following patches are required for this series:
1. tty/serial: fix config dependencies for samsung serial
   https://www.mail-archive.com/linux-samsung-soc at 
vger.kernel.org/msg36208.html
2. dts, kbuild: Implement support for dtb vendor subdirs patchset 
   http://comments.gmane.org/gmane.linux.kbuild.devel/12131
3. [PATCH v4 0/8] arch: arm64: enable support for Samsung Exynos7 SoC
   http://www.spinics.net/lists/devicetree/msg49130.html
4. [PATCH 0/4] Add initial support for pinctrl on Exynos7
   http://www.spinics.net/lists/devicetree/msg49237.html

Naveen Krishna Chatradhi (2):
  i2c: exynos: add support for HSI2C module on Exynos7
  i2c: exynos5: Add Kconfig dependencies

 .../devicetree/bindings/i2c/i2c-exynos5.txt|2 +
 drivers/i2c/busses/Kconfig |2 +-
 drivers/i2c/busses/i2c-exynos5.c   |   71 ++--
 3 files changed, 68 insertions(+), 7 deletions(-)

-- 
1.7.9.5

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[PATCH] tty/serial: samsung: Add earlycon support

2014-09-16 Thread Alim Akhtar
Add earlycon support for the samsung serial port. This allows enabling
the samsung serial port for console when early_params are parse and processed.

Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
 Documentation/kernel-parameters.txt |6 ++
 drivers/tty/serial/Kconfig  |1 +
 drivers/tty/serial/samsung.c|   17 +
 3 files changed, 24 insertions(+)

diff --git a/Documentation/kernel-parameters.txt 
b/Documentation/kernel-parameters.txt
index 5ae8608..e01c0e5 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -936,6 +936,12 @@ bytes respectively. Such letter suffixes can also be 
entirely omitted.
must already be setup and configured. Options are not
yet supported.
 
+   samsung,addr
+   Start an early, polled-mode console on a samsung serial
+   port at the specified address. The samsung serial port
+   must already be setup and configured. Options are not
+   yet supported.
+
smh Use ARM semihosting calls for early console.
 
earlyprintk=[X86,SH,BLACKFIN,ARM,M68k]
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 249e340..9d42ac8 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -257,6 +257,7 @@ config SERIAL_SAMSUNG_CONSOLE
bool Support for console on Samsung SoC serial port
depends on SERIAL_SAMSUNG=y
select SERIAL_CORE_CONSOLE
+   select SERIAL_EARLYCON
help
  Allow selection of the S3C24XX on-board serial ports for use as
  an virtual console.
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index c78f43a..f32e9c8 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -917,6 +917,7 @@ s3c24xx_serial_verify_port(struct uart_port *port, struct 
serial_struct *ser)
 #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
 
 static struct console s3c24xx_serial_console;
+static void s3c24xx_serial_console_putchar(struct uart_port *port, int ch);
 
 static int __init s3c24xx_serial_console_init(void)
 {
@@ -926,6 +927,22 @@ static int __init s3c24xx_serial_console_init(void)
 console_initcall(s3c24xx_serial_console_init);
 
 #define S3C24XX_SERIAL_CONSOLE s3c24xx_serial_console
+static void samsung_early_write(struct console *con, const char *s, unsigned n)
+{
+   struct earlycon_device *dev = con-data;
+
+   uart_console_write(dev-port, s, n, s3c24xx_serial_console_putchar);
+}
+
+static int __init samsung_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+   if (!device-port.membase)
+   return -ENODEV;
+   device-con-write = samsung_early_write;
+   return 0;
+}
+EARLYCON_DECLARE(samsung, samsung_early_console_setup);
 #else
 #define S3C24XX_SERIAL_CONSOLE NULL
 #endif
-- 
1.7.10.4

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Re: Exynos build failure in -next allmodconfig

2014-09-16 Thread Krzysztof Kozłowski

On 15.09.2014 19:57, Russell King - ARM Linux wrote:

On Mon, Sep 15, 2014 at 09:34:58AM -0700, Mark Brown wrote:

On Mon, Sep 15, 2014 at 11:57:09AM +0100, Build bot for Mark Brown wrote:

Today's -next got a build failure in ARM allmodconfig due to platsmp.c:

| arch/arm/mach-exynos/platsmp.c:198:31: warning: incorrect type in return 
expression (different address spaces)
| arch/arm/mach-exynos/platsmp.c:198:31:expected void [noderef] asn:2*
| arch/arm/mach-exynos/platsmp.c:198:31:got void *
| arch/arm/mach-exynos/platsmp.c:198:31: warning: incorrect type in return 
expression (different address spaces)
| arch/arm/mach-exynos/platsmp.c:198:31:expected void [noderef] asn:2*
| arch/arm/mach-exynos/platsmp.c:198:31:got void *
|   CC  arch/arm/mach-exynos/platsmp.o
| /tmp/ccC9fkwF.s: Assembler messages:
| /tmp/ccC9fkwF.s:423: Error: selected processor does not support ARM mode `isb 
'
| /tmp/ccC9fkwF.s:428: Error: selected processor does not support ARM mode `isb 
'
| /tmp/ccC9fkwF.s:429: Error: selected processor does not support ARM mode `dsb 
'
| scripts/Makefile.build:257: recipe for target 
'arch/arm/mach-exynos/platsmp.o' failed

Looks like we need a compiler flags override for that file.


Or.. the question is why a .c file is not using the proper macros.


Actually I am the one to blame for build failure (commit: ARM: EXYNOS: 
Move code from hotplug.c to platsmp.c). The problem is 
v7_exit_coherency_flush() which I think does not make sense on ARMv6.


I'll replace the ISB and DSB commands with macros but the real question 
is whether the mach-exynos/platsmp.c file and mach-exynos directory 
should be compiled when CONFIG_ARCH_EXYNOS is not defined?


Best regards,
Krzysztof

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RE: [PATCH v2] mfd: syscon: Decouple syscon interface from platform devices

2014-09-16 Thread Pankaj Dubey
Hi Arnd,  Lee Jones,


[snip]
 
 On Thu, 04 Sep 2014 10:15:27 +0530
 Pankaj Dubey pankaj.du...@samsung.com wrote:
 
  Hi Boris,
 
  On Wednesday, September 03, 2014 Boris BREZILLON wrote,
   To: Arnd Bergmann
   Cc: Pankaj Dubey; kgene@samsung.com; li...@arm.linux.org.uk;
   Alexander Shiyan; naus...@samsung.com; Tomasz Figa;
   linux-ker...@vger.kernel.org; jo...@samsung.com;
   linux-samsung-soc@vger.kernel.org;
  thomas...@samsung.com;
   tomasz.f...@gmail.com; vikas.saj...@samsung.com;
   chow@samsung.com; lee.jo...@linaro.org; Michal Simek;
   linux-arm-ker...@lists.infradead.org;
  Mark
   Brown
   Subject: Re: [PATCH v2] mfd: syscon: Decouple syscon interface from
  platform
   devices
  
   On Wed, 03 Sep 2014 15:49:04 +0200
   Arnd Bergmann a...@arndb.de wrote:
  
On Wednesday 03 September 2014 15:16:11 Boris BREZILLON wrote:
 I checked that part, and it appears most of the code is already
 there (see usage of regmap_attach_dev function here [1]).

 The only problem I see is that errors are still printed with
 dev_err, which, AFAIK, will trigger a kernel panic if dev is NULL.
   
Actually not:
   
static int __dev_printk(const char *level, const struct device *dev,
struct va_format *vaf) {
if (!dev)
return printk(%s(NULL device *): %pV, level,
vaf);
   
return dev_printk_emit(level[1] - '0', dev,
   %s %s: %pV,
   dev_driver_string(dev),
dev_name(dev), vaf); }
   
  
   My bad then (I don't know where I looked at to think NULL dev was
   not
  gracefully
   handled :-)). Thanks for pointing this out.
   Given that, I think it should work fine even with a NULL dev.
   I'll give it a try on at91 ;-).
  
 
  We have tested this patch, on Exynos board and found working well.
  In our use case DT based drivers such as USB Phy, SATA Phy, Watchdog
  are calling syscon_regmap_lookup_by APIs to get regmap handle to
  Exynos PMU and it worked well for these drivers.
 
  It would be great if after testing you share result here or give a
  Tested-By.
 
 
 I eventually tested it (just required minor modifications to my PMC
 code: see below).
 Still, this patch is not achieving my final goal which is to remove the
global
 at91_pmc_base variable and make use of the syscon regmap to implement at91
cpu
 idle and platform suspend.
 Moreover, I'd like to remove the lock in at91_pmc struct as regmap is
already taking
 care of locking the resources when accessing a register, but this requires
a lot more
 changes.
 
 Anyway, here is my
 
 Tested-by: Boris Brezillon boris.brezil...@free-electrons.com
 

Any update on this patch. As already it has been tested on two DT based
platforms.

If you think that we can go ahead and break clps711x till it gets migrated
over DT,
then please ack this patch, or else if you have opinion to keep support for
non-DT
based drivers (clps711x) then I can post another patch keeping platform
driver support
for non-DT based platform. 

I would prefer is to keep platform driver support for non-DT based platform
so that this patch set can go in this merge window, as lot of Exynos PMU
patches
(PMU patches of many Exynos SoCs [2,3,4] ) are critically dependent on this
change. 

As per discussion here [1], clps711x SPI and TTY driver patches still has to
be posted
which may take one more merge window, and eventually will drag this patch
also.

[1]:
https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg36291.html
[2]:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/275675.html
[3]:
https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg35701.html
[4]: http://www.spinics.net/lists/arm-kernel/msg358230.html


 
 
[snip]

Thanks,
Pankaj Dubey

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[PATCH v2 00/18] Exynos SYSMMU (IOMMU) integration with DT and DMA-mapping subsystem

2014-09-16 Thread Marek Szyprowski
Hello Everyone,

This is yet another attempt to finally make Exynos SYSMMU driver fully
integrated with DMA-mapping subsystem.

Previous approach is available here: https://lkml.org/lkml/2014/8/5/183

I meantime, there have been a discussion about the way the iommu driver
should be integrated with dma-mapping subsystem, which resulted in [RFC
PATCH v3 0/7] Introduce automatic DMA configuration for IOMMU masters
patches prepared by Will Deacon:
http://www.spinics.net/lists/arm-kernel/msg362076.html 
Those patches removed the need to use bus-specific notifiers for
initialization.

Main changes since previous version of my patches:

1. rebased onto [RFC PATCH v3 0/7] Introduce automatic DMA
configuration for IOMMU masters patches, changed initialization from
bus notifiers to DT related callbacks

2. removed support for separate IO address spaces - this will be
discussed separately after the basic support gets merged

3. removed support for power domain notifier-based runtime power
management - this also will be discussed separately later

I hope that the driver with above changes will be easier to be merged to
v3.18.

Best regards
Marek Szyprowski
Samsung RD Institute Poland



Patch summary:

Marek Szyprowski (18):
  arm: dma-mapping: arm_iommu_attach_device: automatically set
max_seg_size
  arm: exynos: bind power domains earlier, on device creation
  drm: exynos: detach from default dma-mapping domain on init
  clk: exynos: add missing smmu_g2d clock and update comments
  ARM: DTS: Exynos4: add System MMU nodes
  iommu: exynos: don't read version register on every tlb operation
  iommu: exynos: remove unused functions
  iommu: exynos: remove useless spinlock
  iommu: exynos: refactor function parameters to simplify code
  iommu: exynos: remove unused functions, part 2
  iommu: exynos: remove useless device_add/remove callbacks
  iommu: exynos: add support for binding more than one sysmmu to master
device
  iommu: exynos: add support for runtime_pm
  iommu: exynos: rename variables to reflect their purpose
  iommu: exynos: document internal structures
  iommu: exynos: remove excessive includes and sort others
alphabetically
  iommu: exynos: init from dt-specific callback instead of initcall
  iommu: exynos: add callback for initializing devices from device tree

 arch/arm/boot/dts/exynos4.dtsi| 117 +++
 arch/arm/boot/dts/exynos4210.dtsi |  23 ++
 arch/arm/boot/dts/exynos4x12.dtsi |  82 +
 arch/arm/mach-exynos/pm_domains.c |  12 +-
 arch/arm/mm/dma-mapping.c |  16 +
 drivers/clk/samsung/clk-exynos4.c |   1 +
 drivers/gpu/drm/exynos/exynos_drm_iommu.c |   3 +
 drivers/iommu/exynos-iommu.c  | 494 ++
 include/dt-bindings/clock/exynos4.h   |  10 +-
 9 files changed, 483 insertions(+), 275 deletions(-)

-- 
1.9.2

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[PATCH v2 08/18] iommu: exynos: remove useless spinlock

2014-09-16 Thread Marek Szyprowski
This patch removes useless spinlocks and other unused members from
struct exynos_iommu_owner. There is no point is protecting this
structure by spinlock because content of this structure doesn't change
and other structures have their own spinlocks.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/iommu/exynos-iommu.c | 11 ---
 1 file changed, 11 deletions(-)

diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 91feeca56abc..ae2703ed91d8 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -189,9 +189,6 @@ struct exynos_iommu_owner {
struct list_head client; /* entry of exynos_iommu_domain.clients */
struct device *dev;
struct device *sysmmu;
-   struct iommu_domain *domain;
-   void *vmm_data; /* IO virtual memory manager's data */
-   spinlock_t lock;/* Lock to preserve consistency of System MMU */
 };
 
 struct exynos_iommu_domain {
@@ -477,16 +474,12 @@ static int __exynos_sysmmu_enable(struct device *dev, 
phys_addr_t pgtable,
 
BUG_ON(!has_sysmmu(dev));
 
-   spin_lock_irqsave(owner-lock, flags);
-
data = dev_get_drvdata(owner-sysmmu);
 
ret = __sysmmu_enable(data, pgtable, domain);
if (ret = 0)
data-master = dev;
 
-   spin_unlock_irqrestore(owner-lock, flags);
-
return ret;
 }
 
@@ -499,16 +492,12 @@ static bool exynos_sysmmu_disable(struct device *dev)
 
BUG_ON(!has_sysmmu(dev));
 
-   spin_lock_irqsave(owner-lock, flags);
-
data = dev_get_drvdata(owner-sysmmu);
 
disabled = __sysmmu_disable(data);
if (disabled)
data-master = NULL;
 
-   spin_unlock_irqrestore(owner-lock, flags);
-
return disabled;
 }
 
-- 
1.9.2

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[PATCH v2 10/18] iommu: exynos: remove unused functions, part 2

2014-09-16 Thread Marek Szyprowski
After refactoring functions to use pointer to struct sysmmu_drvdata
directly, some functions became useless and thus never used, so remove
them completely.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/iommu/exynos-iommu.c | 43 ---
 1 file changed, 43 deletions(-)

diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index ef30890f4069..b271348a4ec1 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -457,49 +457,6 @@ static int __sysmmu_enable(struct sysmmu_drvdata *data,
return ret;
 }
 
-/* __exynos_sysmmu_enable: Enables System MMU
- *
- * returns -error if an error occurred and System MMU is not enabled,
- * 0 if the System MMU has been just enabled and 1 if System MMU was already
- * enabled before.
- */
-static int __exynos_sysmmu_enable(struct device *dev, phys_addr_t pgtable,
- struct iommu_domain *domain)
-{
-   int ret = 0;
-   unsigned long flags;
-   struct exynos_iommu_owner *owner = dev-archdata.iommu;
-   struct sysmmu_drvdata *data;
-
-   BUG_ON(!has_sysmmu(dev));
-
-   data = dev_get_drvdata(owner-sysmmu);
-
-   ret = __sysmmu_enable(data, pgtable, domain);
-   if (ret = 0)
-   data-master = dev;
-
-   return ret;
-}
-
-static bool exynos_sysmmu_disable(struct device *dev)
-{
-   unsigned long flags;
-   bool disabled = true;
-   struct exynos_iommu_owner *owner = dev-archdata.iommu;
-   struct sysmmu_drvdata *data;
-
-   BUG_ON(!has_sysmmu(dev));
-
-   data = dev_get_drvdata(owner-sysmmu);
-
-   disabled = __sysmmu_disable(data);
-   if (disabled)
-   data-master = NULL;
-
-   return disabled;
-}
-
 static void __sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
  sysmmu_iova_t iova)
 {
-- 
1.9.2

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[PATCH v2 09/18] iommu: exynos: refactor function parameters to simplify code

2014-09-16 Thread Marek Szyprowski
This patch simplifies the code by:
- refactoring function parameters from struct device pointer to direct pointer
  to struct sysmmu drvdata
- moving list_head enteries from struct exynos_iommu_owner directly to struct
  sysmmu_drvdata

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/iommu/exynos-iommu.c | 93 ++--
 1 file changed, 46 insertions(+), 47 deletions(-)

diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index ae2703ed91d8..ef30890f4069 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -186,8 +186,6 @@ static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {
 
 /* attached to dev.archdata.iommu of the master device */
 struct exynos_iommu_owner {
-   struct list_head client; /* entry of exynos_iommu_domain.clients */
-   struct device *dev;
struct device *sysmmu;
 };
 
@@ -208,6 +206,7 @@ struct sysmmu_drvdata {
int activations;
spinlock_t lock;
struct iommu_domain *domain;
+   struct list_head domain_node;
phys_addr_t pgtable;
int version;
 };
@@ -508,12 +507,10 @@ static void __sysmmu_tlb_invalidate_flpdcache(struct 
sysmmu_drvdata *data,
__raw_writel(iova | 0x1, data-sfrbase + REG_MMU_FLUSH_ENTRY);
 }
 
-static void sysmmu_tlb_invalidate_flpdcache(struct device *dev,
+static void sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
sysmmu_iova_t iova)
 {
unsigned long flags;
-   struct exynos_iommu_owner *owner = dev-archdata.iommu;
-   struct sysmmu_drvdata *data = dev_get_drvdata(owner-sysmmu);
 
if (!IS_ERR(data-clk_master))
clk_enable(data-clk_master);
@@ -527,14 +524,10 @@ static void sysmmu_tlb_invalidate_flpdcache(struct device 
*dev,
clk_disable(data-clk_master);
 }
 
-static void sysmmu_tlb_invalidate_entry(struct device *dev, sysmmu_iova_t iova,
-   size_t size)
+static void sysmmu_tlb_invalidate_entry(struct sysmmu_drvdata *data,
+   sysmmu_iova_t iova, size_t size)
 {
-   struct exynos_iommu_owner *owner = dev-archdata.iommu;
unsigned long flags;
-   struct sysmmu_drvdata *data;
-
-   data = dev_get_drvdata(owner-sysmmu);
 
spin_lock_irqsave(data-lock, flags);
if (is_sysmmu_active(data)) {
@@ -564,8 +557,8 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev, 
sysmmu_iova_t iova,
if (!IS_ERR(data-clk_master))
clk_disable(data-clk_master);
} else {
-   dev_dbg(dev, disabled. Skipping TLB invalidation @ %#x\n,
-   iova);
+   dev_dbg(data-master,
+   disabled. Skipping TLB invalidation @ %#x\n, iova);
}
spin_unlock_irqrestore(data-lock, flags);
 }
@@ -704,7 +697,7 @@ err_pgtable:
 static void exynos_iommu_domain_destroy(struct iommu_domain *domain)
 {
struct exynos_iommu_domain *priv = domain-priv;
-   struct exynos_iommu_owner *owner;
+   struct sysmmu_drvdata *data;
unsigned long flags;
int i;
 
@@ -712,14 +705,12 @@ static void exynos_iommu_domain_destroy(struct 
iommu_domain *domain)
 
spin_lock_irqsave(priv-lock, flags);
 
-   list_for_each_entry(owner, priv-clients, client) {
-   while (!exynos_sysmmu_disable(owner-dev))
-   ; /* until System MMU is actually disabled */
+   list_for_each_entry(data, priv-clients, domain_node) {
+   if (__sysmmu_disable(data))
+   data-master = NULL;
+   list_del_init(data-domain_node);
}
 
-   while (!list_empty(priv-clients))
-   list_del_init(priv-clients.next);
-
spin_unlock_irqrestore(priv-lock, flags);
 
for (i = 0; i  NUM_LV1ENTRIES; i++)
@@ -738,20 +729,26 @@ static int exynos_iommu_attach_device(struct iommu_domain 
*domain,
 {
struct exynos_iommu_owner *owner = dev-archdata.iommu;
struct exynos_iommu_domain *priv = domain-priv;
+   struct sysmmu_drvdata *data;
phys_addr_t pagetable = virt_to_phys(priv-pgtable);
unsigned long flags;
-   int ret;
+   int ret = -ENODEV;
 
-   spin_lock_irqsave(priv-lock, flags);
+   if (!has_sysmmu(dev))
+   return -ENODEV;
 
-   ret = __exynos_sysmmu_enable(dev, pagetable, domain);
-   if (ret == 0) {
-   list_add_tail(owner-client, priv-clients);
-   owner-domain = domain;
+   data = dev_get_drvdata(owner-sysmmu);
+   if (data) {
+   ret = __sysmmu_enable(data, pagetable, domain);
+   if (ret = 0) {
+   data-master = dev;
+
+   spin_lock_irqsave(priv-lock, flags);
+   list_add_tail(data-domain_node, priv-clients);
+ 

[PATCH v2 06/18] iommu: exynos: don't read version register on every tlb operation

2014-09-16 Thread Marek Szyprowski
This patch removes reading of REG_MMU_VERSION register on every tlb
operation and caches SYSMMU version in driver's internal data.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/iommu/exynos-iommu.c | 13 +
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index d037e87a1fe5..73499b05e62e 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -212,6 +212,7 @@ struct sysmmu_drvdata {
spinlock_t lock;
struct iommu_domain *domain;
phys_addr_t pgtable;
+   int version;
 };
 
 static bool set_sysmmu_active(struct sysmmu_drvdata *data)
@@ -238,11 +239,6 @@ static void sysmmu_unblock(void __iomem *sfrbase)
__raw_writel(CTRL_ENABLE, sfrbase + REG_MMU_CTRL);
 }
 
-static unsigned int __raw_sysmmu_version(struct sysmmu_drvdata *data)
-{
-   return MMU_RAW_VER(__raw_readl(data-sfrbase + REG_MMU_VERSION));
-}
-
 static bool sysmmu_block(void __iomem *sfrbase)
 {
int i = 120;
@@ -402,7 +398,7 @@ static void __sysmmu_init_config(struct sysmmu_drvdata 
*data)
unsigned int cfg = CFG_LRU | CFG_QOS(15);
unsigned int ver;
 
-   ver = __raw_sysmmu_version(data);
+   ver = MMU_RAW_VER(__raw_readl(data-sfrbase + REG_MMU_VERSION));
if (MMU_MAJ_VER(ver) == 3) {
if (MMU_MIN_VER(ver) = 2) {
cfg |= CFG_FLPDCACHE;
@@ -416,6 +412,7 @@ static void __sysmmu_init_config(struct sysmmu_drvdata 
*data)
}
 
__raw_writel(cfg, data-sfrbase + REG_MMU_CFG);
+   data-version = ver;
 }
 
 static void __sysmmu_enable_nocount(struct sysmmu_drvdata *data)
@@ -525,7 +522,7 @@ static bool exynos_sysmmu_disable(struct device *dev)
 static void __sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
  sysmmu_iova_t iova)
 {
-   if (__raw_sysmmu_version(data) == MAKE_MMU_VER(3, 3))
+   if (data-version == MAKE_MMU_VER(3, 3))
__raw_writel(iova | 0x1, data-sfrbase + REG_MMU_FLUSH_ENTRY);
 }
 
@@ -574,7 +571,7 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev, 
sysmmu_iova_t iova,
 * 1MB page can be cached in one of all sets.
 * 64KB page can be one of 16 consecutive sets.
 */
-   if (MMU_MAJ_VER(__raw_sysmmu_version(data)) == 2)
+   if (MMU_MAJ_VER(data-version) == 2)
num_inv = min_t(unsigned int, size / PAGE_SIZE, 64);
 
if (sysmmu_block(data-sfrbase)) {
-- 
1.9.2

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[PATCH v2 05/18] ARM: DTS: Exynos4: add System MMU nodes

2014-09-16 Thread Marek Szyprowski
This patch adds System MMU nodes that are specific to Exynos4210/4x12 series.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 arch/arm/boot/dts/exynos4.dtsi| 117 ++
 arch/arm/boot/dts/exynos4210.dtsi |  23 
 arch/arm/boot/dts/exynos4x12.dtsi |  82 ++
 3 files changed, 222 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index e0278ecbc816..bfc19ec5 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -174,6 +174,7 @@
clock-names = fimc, sclk_fimc;
samsung,power-domain = pd_cam;
samsung,sysreg = sys_reg;
+   iommus = sysmmu_fimc0;
status = disabled;
};
 
@@ -185,6 +186,7 @@
clock-names = fimc, sclk_fimc;
samsung,power-domain = pd_cam;
samsung,sysreg = sys_reg;
+   iommus = sysmmu_fimc1;
status = disabled;
};
 
@@ -196,6 +198,7 @@
clock-names = fimc, sclk_fimc;
samsung,power-domain = pd_cam;
samsung,sysreg = sys_reg;
+   iommus = sysmmu_fimc2;
status = disabled;
};
 
@@ -207,6 +210,7 @@
clock-names = fimc, sclk_fimc;
samsung,power-domain = pd_cam;
samsung,sysreg = sys_reg;
+   iommus = sysmmu_fimc3;
status = disabled;
};
 
@@ -395,6 +399,8 @@
clocks = clock CLK_MFC;
clock-names = mfc;
status = disabled;
+   iommus = sysmmu_mfc_l, sysmmu_mfc_r;
+   iommu-names = left, right;
};
 
serial_0: serial@1380 {
@@ -643,6 +649,117 @@
clock-names = sclk_fimd, fimd;
samsung,power-domain = pd_lcd0;
samsung,sysreg = sys_reg;
+   iommus = sysmmu_fimd0;
status = disabled;
};
+
+   sysmmu_mfc_l: sysmmu@1362 {
+   compatible = samsung,exynos-sysmmu;
+   reg = 0x1362 0x1000;
+   interrupt-parent = combiner;
+   interrupts = 5 5;
+   clock-names = sysmmu, master;
+   clocks = clock CLK_SMMU_MFCL, clock CLK_MFC;
+   samsung,power-domain = pd_mfc;
+   #iommu-cells = 0;
+   };
+
+   sysmmu_mfc_r: sysmmu@1363 {
+   compatible = samsung,exynos-sysmmu;
+   reg = 0x1363 0x1000;
+   interrupt-parent = combiner;
+   interrupts = 5 6;
+   clock-names = sysmmu, master;
+   clocks = clock CLK_SMMU_MFCR, clock CLK_MFC;
+   samsung,power-domain = pd_mfc;
+   #iommu-cells = 0;
+   };
+
+   sysmmu_tv: sysmmu@12E2 {
+   compatible = samsung,exynos-sysmmu;
+   reg = 0x12E2 0x1000;
+   interrupt-parent = combiner;
+   interrupts = 5 4;
+   clock-names = sysmmu, master;
+   clocks = clock CLK_SMMU_TV, clock CLK_MIXER;
+   samsung,power-domain = pd_tv;
+   #iommu-cells = 0;
+   };
+
+   sysmmu_fimc0: sysmmu@11A2 {
+   compatible = samsung,exynos-sysmmu;
+   reg = 0x11A2 0x1000;
+   interrupt-parent = combiner;
+   interrupts = 4 2;
+   clock-names = sysmmu, master;
+   clocks = clock CLK_SMMU_FIMC0, clock CLK_FIMC0;
+   samsung,power-domain = pd_cam;
+   #iommu-cells = 0;
+   };
+
+   sysmmu_fimc1: sysmmu@11A3 {
+   compatible = samsung,exynos-sysmmu;
+   reg = 0x11A3 0x1000;
+   interrupt-parent = combiner;
+   interrupts = 4 3;
+   clock-names = sysmmu, master;
+   clocks = clock CLK_SMMU_FIMC1, clock CLK_FIMC1;
+   samsung,power-domain = pd_cam;
+   #iommu-cells = 0;
+   };
+
+   sysmmu_fimc2: sysmmu@11A4 {
+   compatible = samsung,exynos-sysmmu;
+   reg = 0x11A4 0x1000;
+   interrupt-parent = combiner;
+   interrupts = 4 4;
+   clock-names = sysmmu, master;
+   clocks = clock CLK_SMMU_FIMC2, clock CLK_FIMC2;
+   samsung,power-domain = pd_cam;
+   #iommu-cells = 0;
+   };
+
+   sysmmu_fimc3: sysmmu@11A5 {
+   compatible = samsung,exynos-sysmmu;
+   reg = 0x11A5 0x1000;
+   interrupt-parent = combiner;
+   interrupts = 4 5;
+   clock-names = sysmmu, master;
+  

[PATCH v2 07/18] iommu: exynos: remove unused functions

2014-09-16 Thread Marek Szyprowski
This patch removes two unneeded functions, which are not a part of
generic IOMMU API and were never used by any other driver.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/iommu/exynos-iommu.c | 31 ---
 1 file changed, 31 deletions(-)

diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 73499b05e62e..91feeca56abc 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -490,13 +490,6 @@ static int __exynos_sysmmu_enable(struct device *dev, 
phys_addr_t pgtable,
return ret;
 }
 
-int exynos_sysmmu_enable(struct device *dev, phys_addr_t pgtable)
-{
-   BUG_ON(!memblock_is_memory(pgtable));
-
-   return __exynos_sysmmu_enable(dev, pgtable, NULL);
-}
-
 static bool exynos_sysmmu_disable(struct device *dev)
 {
unsigned long flags;
@@ -588,30 +581,6 @@ static void sysmmu_tlb_invalidate_entry(struct device 
*dev, sysmmu_iova_t iova,
spin_unlock_irqrestore(data-lock, flags);
 }
 
-void exynos_sysmmu_tlb_invalidate(struct device *dev)
-{
-   struct exynos_iommu_owner *owner = dev-archdata.iommu;
-   unsigned long flags;
-   struct sysmmu_drvdata *data;
-
-   data = dev_get_drvdata(owner-sysmmu);
-
-   spin_lock_irqsave(data-lock, flags);
-   if (is_sysmmu_active(data)) {
-   if (!IS_ERR(data-clk_master))
-   clk_enable(data-clk_master);
-   if (sysmmu_block(data-sfrbase)) {
-   __sysmmu_tlb_invalidate(data-sfrbase);
-   sysmmu_unblock(data-sfrbase);
-   }
-   if (!IS_ERR(data-clk_master))
-   clk_disable(data-clk_master);
-   } else {
-   dev_dbg(dev, disabled. Skipping TLB invalidation\n);
-   }
-   spin_unlock_irqrestore(data-lock, flags);
-}
-
 static int __init exynos_sysmmu_probe(struct platform_device *pdev)
 {
int irq, ret;
-- 
1.9.2

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[PATCH v2 15/18] iommu: exynos: document internal structures

2014-09-16 Thread Marek Szyprowski
Add a few words of comment to all internal structures used by the driver.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/iommu/exynos-iommu.c | 49 +---
 1 file changed, 33 insertions(+), 16 deletions(-)

diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index ae61d0680b9a..a75b06365f97 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -184,32 +184,49 @@ static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {
UNKNOWN FAULT
 };
 
-/* attached to dev.archdata.iommu of the master device */
+/*
+ * This structure is attached to dev.archdata.iommu of the master device
+ * on device add, contains a list of SYSMMU controllers defined by device tree,
+ * which are bound to given master device. It is usually referenced by 'owner'
+ * pointer.
+ */
 struct exynos_iommu_owner {
-   struct list_head clients;
+   struct list_head clients; /* list of sysmmu_drvdata.owner_node */
 };
 
+/*
+ * This structure is stored in -priv field of generic struct iommu_domain,
+ * contains list of SYSMMU controllers from all master devices, which has been
+ * attached to this domain and page tables of IO address space defined by this
+ * domain. It is usually referenced by 'domain' pointer.
+ */
 struct exynos_iommu_domain {
-   struct list_head clients; /* list of sysmmu_drvdata.node */
+   struct list_head clients; /* list of sysmmu_drvdata.domain_node */
sysmmu_pte_t *pgtable; /* lv1 page table, 16KB */
short *lv2entcnt; /* free lv2 entry counter for each section */
-   spinlock_t lock; /* lock for this structure */
+   spinlock_t lock; /* lock for modyfying list of clients */
spinlock_t pgtablelock; /* lock for modifying page table @ pgtable */
 };
 
+/*
+ * This structure hold all data of a single SYSMMU controller, this includes
+ * hw resources like registers and clocks, pointers and list nodes to connect
+ * it to all other structures, internal state and parameters read from device
+ * tree. It is usually referenced by 'data' pointer.
+ */
 struct sysmmu_drvdata {
-   struct device *sysmmu;  /* System MMU's device descriptor */
-   struct device *master;  /* Owner of system MMU */
-   void __iomem *sfrbase;
-   struct clk *clk;
-   struct clk *clk_master;
-   int activations;
-   spinlock_t lock;
-   struct iommu_domain *domain;
-   struct list_head domain_node;
-   struct list_head owner_node;
-   phys_addr_t pgtable;
-   int version;
+   struct device *sysmmu; /* SYSMMU controller device */
+   struct device *master; /* master device (owner of given SYSMMU) */
+   void __iomem *sfrbase; /* our registers */
+   struct clk *clk; /* SYSMMU's clock */
+   struct clk *clk_master; /* master's device clock */
+   int activations; /* number of calls to sysmmu_enable */
+   spinlock_t lock; /* lock for modyfying enable/disable state */
+   struct iommu_domain *domain; /* domain we belong to */
+   struct list_head domain_node; /* node for domain clients list */
+   struct list_head owner_node; /* node for owner clients list */
+   phys_addr_t pgtable; /* assigned page table structure */
+   int version; /* our version */
 };
 
 static bool set_sysmmu_active(struct sysmmu_drvdata *data)
-- 
1.9.2

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[PATCH v2 02/18] arm: exynos: bind power domains earlier, on device creation

2014-09-16 Thread Marek Szyprowski
This patches change initialization time of power domain driver from client
device driver bind to device creation. This lets other core drivers to
register power domain notifiers before client driver is bound.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 arch/arm/mach-exynos/pm_domains.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-exynos/pm_domains.c 
b/arch/arm/mach-exynos/pm_domains.c
index fd76e1b5a471..1d368a26528c 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -159,13 +159,13 @@ static int exynos_pm_notifier_call(struct notifier_block 
*nb,
struct device *dev = data;
 
switch (event) {
-   case BUS_NOTIFY_BIND_DRIVER:
+   case BUS_NOTIFY_ADD_DEVICE:
if (dev-of_node)
exynos_read_domain_from_dt(dev);
 
break;
 
-   case BUS_NOTIFY_UNBOUND_DRIVER:
+   case BUS_NOTIFY_DEL_DEVICE:
exynos_remove_device_from_domain(dev);
 
break;
@@ -177,6 +177,13 @@ static struct notifier_block platform_nb = {
.notifier_call = exynos_pm_notifier_call,
 };
 
+static int exynos_pm_domain_add(struct device *dev, void *priv)
+{
+   if (dev-of_node)
+   exynos_read_domain_from_dt(dev);
+   return 0;
+}
+
 static __init int exynos4_pm_init_power_domain(void)
 {
struct platform_device *pdev;
@@ -236,6 +243,7 @@ no_clk:
}
 
bus_register_notifier(platform_bus_type, platform_nb);
+   bus_for_each_dev(platform_bus_type, NULL, NULL, exynos_pm_domain_add);
 
return 0;
 }
-- 
1.9.2

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[PATCH v2 13/18] iommu: exynos: add support for runtime_pm

2014-09-16 Thread Marek Szyprowski
This patch fixes support for runtime power management for SYSMMU
controllers, so they are enabled when master device is attached.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/iommu/exynos-iommu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index cf36cdecf335..5a6d3d0af61e 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -696,6 +696,7 @@ static int exynos_iommu_attach_device(struct iommu_domain 
*domain,
return -ENODEV;
 
list_for_each_entry(data, owner-clients, owner_node) {
+   pm_runtime_get_sync(data-sysmmu);
ret = __sysmmu_enable(data, pagetable, domain);
if (ret = 0) {
data-master = dev;
@@ -737,6 +738,7 @@ static void exynos_iommu_detach_device(struct iommu_domain 
*domain,
data-master = NULL;
list_del_init(data-domain_node);
}
+   pm_runtime_put(data-sysmmu);
found = true;
}
}
-- 
1.9.2

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[PATCH v2 18/18] iommu: exynos: add callback for initializing devices from device tree

2014-09-16 Thread Marek Szyprowski
This patch adds implementation of of_xlate callback, which prepares
masters device for attaching to IOMMU. This callback is called during
creating devices from device tree.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/iommu/exynos-iommu.c | 28 
 1 file changed, 28 insertions(+)

diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 0d304c62956e..6b8fe57d17f2 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -1077,6 +1077,33 @@ static phys_addr_t exynos_iommu_iova_to_phys(struct 
iommu_domain *iommu_domain,
return phys;
 }
 
+static int exynos_iommu_of_xlate(struct device *dev,
+struct of_phandle_args *spec)
+{
+   struct exynos_iommu_owner *owner = dev-archdata.iommu;
+   struct platform_device *sysmmu = of_find_device_by_node(spec-np);
+   struct sysmmu_drvdata *data;
+
+   if (!sysmmu)
+   return 0;
+
+   data = platform_get_drvdata(sysmmu);
+   if (!data)
+   return 0;
+
+   if (!owner) {
+   owner = kzalloc(sizeof(*owner), GFP_KERNEL);
+   if (!owner)
+   return 0;
+
+   INIT_LIST_HEAD(owner-clients);
+   dev-archdata.iommu = owner;
+   }
+
+   list_add_tail(data-owner_node, owner-clients);
+   return 1;
+}
+
 static const struct iommu_ops exynos_iommu_ops = {
.domain_init = exynos_iommu_domain_init,
.domain_destroy = exynos_iommu_domain_destroy,
@@ -1086,6 +1113,7 @@ static const struct iommu_ops exynos_iommu_ops = {
.unmap = exynos_iommu_unmap,
.iova_to_phys = exynos_iommu_iova_to_phys,
.pgsize_bitmap = SECT_SIZE | LPAGE_SIZE | SPAGE_SIZE,
+   .of_xlate = exynos_iommu_of_xlate,
 };
 
 static int init_done;
-- 
1.9.2

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[PATCH v2 17/18] iommu: exynos: init from dt-specific callback instead of initcall

2014-09-16 Thread Marek Szyprowski
This patch introduces IOMMU_OF_DECLARE-based initialization to the
driver, which replaces subsys_initcall-based procedure.
exynos_iommu_of_setup ensures that each sysmmu controller is probed
before its master device. 

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/iommu/exynos-iommu.c | 32 +++-
 1 file changed, 31 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 5eb999d7653a..0d304c62956e 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -13,16 +13,21 @@
 #endif
 
 #include linux/clk.h
+#include linux/dma-mapping.h
 #include linux/err.h
 #include linux/io.h
 #include linux/iommu.h
 #include linux/interrupt.h
 #include linux/list.h
+#include linux/of.h
+#include linux/of_iommu.h
+#include linux/of_platform.h
 #include linux/platform_device.h
 #include linux/pm_runtime.h
 #include linux/slab.h
 
 #include asm/cacheflush.h
+#include asm/dma-iommu.h
 #include asm/pgtable.h
 
 typedef u32 sysmmu_iova_t;
@@ -1083,6 +1088,8 @@ static const struct iommu_ops exynos_iommu_ops = {
.pgsize_bitmap = SECT_SIZE | LPAGE_SIZE | SPAGE_SIZE,
 };
 
+static int init_done;
+
 static int __init exynos_iommu_init(void)
 {
int ret;
@@ -1115,6 +1122,8 @@ static int __init exynos_iommu_init(void)
goto err_set_iommu;
}
 
+   init_done = true;
+
return 0;
 err_set_iommu:
kmem_cache_free(lv2table_kmem_cache, zero_lv2_table);
@@ -1124,4 +1133,25 @@ err_reg_driver:
kmem_cache_destroy(lv2table_kmem_cache);
return ret;
 }
-subsys_initcall(exynos_iommu_init);
+
+static struct iommu_data exynos_of_data = {
+   .ops = exynos_iommu_ops,
+};
+
+static int __init exynos_iommu_of_setup(struct device_node *np)
+{
+   struct platform_device *pdev;
+
+   if (!init_done)
+   exynos_iommu_init();
+
+   pdev = of_platform_device_create(np, NULL, platform_bus_type.dev_root);
+   if (IS_ERR(pdev))
+   return PTR_ERR(pdev);
+
+   of_iommu_set_data(np, exynos_of_data);
+   return 0;
+}
+
+IOMMU_OF_DECLARE(exynos_iommu_of, samsung,exynos-sysmmu,
+exynos_iommu_of_setup);
-- 
1.9.2

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Re: Exynos build failure in -next allmodconfig

2014-09-16 Thread Russell King - ARM Linux
On Tue, Sep 16, 2014 at 01:44:44PM +0200, Krzysztof Kozłowski wrote:
 On 15.09.2014 19:57, Russell King - ARM Linux wrote:
 On Mon, Sep 15, 2014 at 09:34:58AM -0700, Mark Brown wrote:
 On Mon, Sep 15, 2014 at 11:57:09AM +0100, Build bot for Mark Brown wrote:

 Today's -next got a build failure in ARM allmodconfig due to platsmp.c:

 | arch/arm/mach-exynos/platsmp.c:198:31: warning: incorrect type in return 
 expression (different address spaces)
 | arch/arm/mach-exynos/platsmp.c:198:31:expected void [noderef] asn:2*
 | arch/arm/mach-exynos/platsmp.c:198:31:got void *
 | arch/arm/mach-exynos/platsmp.c:198:31: warning: incorrect type in return 
 expression (different address spaces)
 | arch/arm/mach-exynos/platsmp.c:198:31:expected void [noderef] asn:2*
 | arch/arm/mach-exynos/platsmp.c:198:31:got void *
 |   CC  arch/arm/mach-exynos/platsmp.o
 | /tmp/ccC9fkwF.s: Assembler messages:
 | /tmp/ccC9fkwF.s:423: Error: selected processor does not support ARM mode 
 `isb '
 | /tmp/ccC9fkwF.s:428: Error: selected processor does not support ARM mode 
 `isb '
 | /tmp/ccC9fkwF.s:429: Error: selected processor does not support ARM mode 
 `dsb '
 | scripts/Makefile.build:257: recipe for target 
 'arch/arm/mach-exynos/platsmp.o' failed

 Looks like we need a compiler flags override for that file.

 Or.. the question is why a .c file is not using the proper macros.

 Actually I am the one to blame for build failure (commit: ARM: EXYNOS:  
 Move code from hotplug.c to platsmp.c). The problem is  
 v7_exit_coherency_flush() which I think does not make sense on ARMv6.

 I'll replace the ISB and DSB commands with macros but the real question  
 is whether the mach-exynos/platsmp.c file and mach-exynos directory  
 should be compiled when CONFIG_ARCH_EXYNOS is not defined?

It's entirely possible that a kernel will be configured to support ARMv6
and ARMv7, which can also include exynos support.  In this case, it will
be built using compiler flags for ARMv6, since ARMv7 is compatible with
the ARMv6 ISA (even though a few instructions are deprecated.)

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Re: Exynos build failure in -next allmodconfig

2014-09-16 Thread Tomasz Figa
On 16.09.2014 13:44, Krzysztof Kozłowski wrote:
 On 15.09.2014 19:57, Russell King - ARM Linux wrote:
 On Mon, Sep 15, 2014 at 09:34:58AM -0700, Mark Brown wrote:
 On Mon, Sep 15, 2014 at 11:57:09AM +0100, Build bot for Mark Brown
 wrote:

 Today's -next got a build failure in ARM allmodconfig due to platsmp.c:

 | arch/arm/mach-exynos/platsmp.c:198:31: warning: incorrect type in
 return expression (different address spaces)
 | arch/arm/mach-exynos/platsmp.c:198:31:expected void [noderef]
 asn:2*
 | arch/arm/mach-exynos/platsmp.c:198:31:got void *
 | arch/arm/mach-exynos/platsmp.c:198:31: warning: incorrect type in
 return expression (different address spaces)
 | arch/arm/mach-exynos/platsmp.c:198:31:expected void [noderef]
 asn:2*
 | arch/arm/mach-exynos/platsmp.c:198:31:got void *
 |   CC  arch/arm/mach-exynos/platsmp.o
 | /tmp/ccC9fkwF.s: Assembler messages:
 | /tmp/ccC9fkwF.s:423: Error: selected processor does not support ARM
 mode `isb '
 | /tmp/ccC9fkwF.s:428: Error: selected processor does not support ARM
 mode `isb '
 | /tmp/ccC9fkwF.s:429: Error: selected processor does not support ARM
 mode `dsb '
 | scripts/Makefile.build:257: recipe for target
 'arch/arm/mach-exynos/platsmp.o' failed

 Looks like we need a compiler flags override for that file.

 Or.. the question is why a .c file is not using the proper macros.
 
 Actually I am the one to blame for build failure (commit: ARM: EXYNOS:
 Move code from hotplug.c to platsmp.c). The problem is
 v7_exit_coherency_flush() which I think does not make sense on ARMv6.
 
 I'll replace the ISB and DSB commands with macros but the real question
 is whether the mach-exynos/platsmp.c file and mach-exynos directory
 should be compiled when CONFIG_ARCH_EXYNOS is not defined?

I think the problematic case here is v6+v7 multiplatform, where even
though CONFIG_ARCH_EXYNOS is defined, compiler flags for lowest common
denominator (v6) must be used. Using appropriate macros should fix the
problem indeed.

Best regards,
Tomasz
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Re: [PATCH V7 00/12] drm/exynos: few patches to enhance bridge chip support

2014-09-16 Thread Javier Martinez Canillas
[adding Laurent Pinchart to cc who had concerns with a previous
version of this patch-set]

Hello Ajay,

On Wed, Aug 27, 2014 at 4:29 PM, Ajay Kumar ajaykumar...@samsung.com wrote:
 This series is based on master branch of Linus tree at:
 git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

 I have tested this after adding few DT changes for exynos5250-snow and
 exynos5420-peach-pit boards.

 The V4 series of this particular patchset was also tested by:
 Rahul Sharma rahul.sha...@samsung.com
 Javier Martinez Canillas jav...@dowhile0.org

 Changes since V2:
 -- Address comments from Jingoo Han for ps8622 driver
 -- Address comments from Daniel, Rob and Thierry regarding
bridge chaining
 -- Address comments from Thierry regarding the names for
new drm_panel functions

 Changes since V3:
 -- Remove hotplug based initialization of exynos_dp
 -- Make exynos_dp work directly with drm_panel, remove
dependency on panel_binder
 -- Minor cleanups in panel_binder and panel_lvds driver

 Changes since V4:
 -- Use gpiod interface for panel-lvds and ps8622 drivers.
 -- Address comments from Javier.
 -- Fix compilation issues when PANEL_BINDER is selected as module.
 -- Split Documentation patches from driver patches.
 -- Rebase on top of the tree.

 Changes since V5:
 -- Modify bridge drivers to support driver model.
 -- Drop the concept of bridge chain(sincle there are no 2 real 
 bridges)
Hence drop bridge-panel_binder layer.
 -- Drop panel-lvds driver and accomodate the required changes in
panel-simple driver.
 -- Use gpiod interface in ptn3460 driver.
 -- Address all comments by Thierry Reding for V5 series.
 -- Address comments from Sean Paul for exynos_dp_commit issue.

 Changes since V6:
 -- Panel patches were seperated and they are merged already.
 -- Fix few issues with ptn3460, before modifying the bridge core.
 -- Modify drm_bridge as per Thierry's comments for V6 series.
 -- Add drm_bridge changes minimally without breaking existing code.
 -- Add new features for ptn3460, step-by-step.
 -- Address comments from Thierry and Andreas for ptn3460 and ps8622.
 -- Split documentation patches from driver patches.


I've tested your series on an Exynos5420 Peach Pit and an Exynos5250
Snow Chromebooks and display worked for me on both machines.

I also needed [PATCH] drm/panel: simple: Add AUO B116XW03 panel
support [0] which does not apply cleanly on linux-next so you may
want to do a re-spin for that patch.

For Snow I also had to disable CONFIG_FB_SIMPLE, otherwise I just saw
a blink on boot and only the backlight remained turned on (no display
output). I don't know if that is expected since IIUC it should be
possible to do a transition from simplefb to a DRM/KMS driver. I don't
have a serial console hooked on this machine so I couldn't debug it
further, sorry.

Also, I saw that Laurent mentioned some concerns today about the
previous version (v6) of your series [1]. I guess he missed this v7
although AFAIU there was no fundamental change on this one so his
concerns remains? I was really hoping that this could make it to 3.18
since display support is one of the last major functionalities that is
missing on these machines.

Best regards,
Javier

[0]: http://patchwork.ozlabs.org/patch/384744/
[1]: http://www.spinics.net/lists/linux-samsung-soc/msg36791.html
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Re: [PATCHv3 4/5] rtc: s3c: Add support for RTC of Exynos3250 SoC

2014-09-16 Thread Javier Martinez Canillas
Hello Chanwoo,

On Thu, Aug 28, 2014 at 11:02 AM, Chanwoo Choi cw00.c...@samsung.com wrote:
 This patch add support for RTC of Exynos3250 SoC. The Exynos3250 needs source
 clock(32.768KHz) for RTC block. If source clock of RTC is registerd on clock
 list of common clk framework, Exynos RTC drvier have to control this clock.

 Clock list for s3c-rtc device:
 - rtc : CLK_RTC of CLK_GATE_IP_PERIR is gate clock for RTC.
 - rtc_src : XrtcXTI is 32.768.kHz source clock for RTC.

Is this RTC source clock needed for all Exynos SoCs?

 @@ -480,11 +530,19 @@ static int s3c_rtc_probe(struct platform_device *pdev)

 info-rtc_clk = devm_clk_get(pdev-dev, rtc);
 if (IS_ERR(info-rtc_clk)) {
 -   dev_err(pdev-dev, failed to find rtc clock source\n);
 +   dev_err(pdev-dev, failed to find rtc clock\n);
 return PTR_ERR(info-rtc_clk);
 }
 clk_prepare_enable(info-rtc_clk);

 +   info-rtc_src_clk = devm_clk_get(pdev-dev, rtc_src);
 +   if (IS_ERR(info-rtc_src_clk)) {
 +   dev_err(pdev-dev, failed to find rtc source clock\n);
 +   return PTR_ERR(info-rtc_src_clk);

On an Exynos5420 Peach Pit machine I'm having the following error and
the driver fails to probe:

[2.095700] s3c-rtc: probe of 101e.rtc failed with error -2

Reverting this patch fixes the issue and the s3c RTC works again on
this machine.

Best regards,
Javier
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Re: [PATCHv3 4/5] rtc: s3c: Add support for RTC of Exynos3250 SoC

2014-09-16 Thread Daniel Drake
On Tue, Sep 16, 2014 at 7:48 AM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
 Clock list for s3c-rtc device:
 - rtc : CLK_RTC of CLK_GATE_IP_PERIR is gate clock for RTC.
 - rtc_src : XrtcXTI is 32.768.kHz source clock for RTC.

 Is this RTC source clock needed for all Exynos SoCs?

It is at least needed on Exynos4412, which has the XrtcXTI thing
exactly as you describe. However the very standard setup there is to
hook it up to the CP clock output of the MAX76686 PMIC. This CP clock
is on by default, so you can potentially live without that detail
being present in the DT.

However... one small issue with this setup is that when you enable
CONFIG_COMMON_CLK_MAX77686, the CP clock gets exposed in Linux's
common clock framework, and Linux then turns it off because it
believes it is unused. Then the RTC stops ticking.

So the rtc_src idea would also be good for Exynos4412. Maybe it would
make sense to drop the needs_src_clk flag, and simply require/enable
the src clock whenever it is present in the DT.

Also, are you sure about the way you are treating this clock, all
those enable/disable calls? You only seem to enable it when doing some
particular driver operations e.g. reading the time, leaving it
disabled at all other times. However I believe on Exynos4412 that if
you disable this clock then the RTC will not tick.

Daniel
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Re: [PATCHv3 4/5] rtc: s3c: Add support for RTC of Exynos3250 SoC

2014-09-16 Thread Javier Martinez Canillas
[adding Doug Anderson as cc]

On Tue, Sep 16, 2014 at 3:48 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
 On Thu, Aug 28, 2014 at 11:02 AM, Chanwoo Choi cw00.c...@samsung.com wrote:
 This patch add support for RTC of Exynos3250 SoC. The Exynos3250 needs source
 clock(32.768KHz) for RTC block. If source clock of RTC is registerd on clock
 list of common clk framework, Exynos RTC drvier have to control this clock.

 Clock list for s3c-rtc device:
 - rtc : CLK_RTC of CLK_GATE_IP_PERIR is gate clock for RTC.
 - rtc_src : XrtcXTI is 32.768.kHz source clock for RTC.

 Is this RTC source clock needed for all Exynos SoCs?


By looking at the Exynos5420 user manual I see that there is indeed a
XrtcXTI clock pad and the doc says:

XRTCXTI: Specifies a clock from 32.768 kHz crystal pad with XRTCXTI
and XRTCXTO pins. RTC uses this
clock as the source of a real-time clock.

Also by looking at the board schematic I see that the 32KHZAP clock
from the Maxim77802 PMIC is used as the external 32.768.kHz source
clock for the RTC but that information is not in the downstream
ChromeOS DTS since AFAIU the Maxim driver in that tree predates the
common clock framework so the PMIC clocks were modeled as regulators.

 @@ -480,11 +530,19 @@ static int s3c_rtc_probe(struct platform_device *pdev)

 info-rtc_clk = devm_clk_get(pdev-dev, rtc);
 if (IS_ERR(info-rtc_clk)) {
 -   dev_err(pdev-dev, failed to find rtc clock source\n);
 +   dev_err(pdev-dev, failed to find rtc clock\n);
 return PTR_ERR(info-rtc_clk);
 }
 clk_prepare_enable(info-rtc_clk);

 +   info-rtc_src_clk = devm_clk_get(pdev-dev, rtc_src);
 +   if (IS_ERR(info-rtc_src_clk)) {
 +   dev_err(pdev-dev, failed to find rtc source clock\n);
 +   return PTR_ERR(info-rtc_src_clk);

 On an Exynos5420 Peach Pit machine I'm having the following error and
 the driver fails to probe:

 [2.095700] s3c-rtc: probe of 101e.rtc failed with error -2

 Reverting this patch fixes the issue and the s3c RTC works again on
 this machine.


The following change [0] in the Peach Pit DTS makes the RTC to claim
the external clock and is working again but I'm not sure if $subject
is correct in making the rtc_src property mandatory since it breaks
backward DT compatibility.

Best regards,
Javier

[0]
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 9a23382..47d7a5b 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -12,6 +12,7 @@
 #include dt-bindings/input/input.h
 #include dt-bindings/gpio/gpio.h
 #include dt-bindings/interrupt-controller/irq.h
+#include dt-bindings/clock/maxim,max77802.h
 #include exynos5420.dtsi

 / {
@@ -151,7 +152,7 @@
status = okay;
clock-frequency = 40;

-   max77802-pmic@9 {
+   max77802: max77802-pmic@9 {
compatible = maxim,max77802;
interrupt-parent = gpx3;
interrupts = 1 IRQ_TYPE_NONE;
@@ -726,6 +727,8 @@
 };

 rtc {
+   clocks = clock CLK_RTC, max77802 MAX77802_CLK_32K_AP;
+   clock-names = rtc, rtc_src;
status = okay;
 };
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Re: [PATCHv3 4/5] rtc: s3c: Add support for RTC of Exynos3250 SoC

2014-09-16 Thread Javier Martinez Canillas
Hello Daniel,

On Tue, Sep 16, 2014 at 5:03 PM, Daniel Drake dr...@endlessm.com wrote:
 On Tue, Sep 16, 2014 at 7:48 AM, Javier Martinez Canillas
 jav...@dowhile0.org wrote:
 Clock list for s3c-rtc device:
 - rtc : CLK_RTC of CLK_GATE_IP_PERIR is gate clock for RTC.
 - rtc_src : XrtcXTI is 32.768.kHz source clock for RTC.

 Is this RTC source clock needed for all Exynos SoCs?

 It is at least needed on Exynos4412, which has the XrtcXTI thing
 exactly as you describe. However the very standard setup there is to
 hook it up to the CP clock output of the MAX76686 PMIC. This CP clock
 is on by default, so you can potentially live without that detail
 being present in the DT.


Thanks for confirming for Exynos4412, I just answered my own email
saying that I found to be needed on Exynos5420 as well and as you
said, it was just working because the Maxim clocks were left on by
default.

 However... one small issue with this setup is that when you enable
 CONFIG_COMMON_CLK_MAX77686, the CP clock gets exposed in Linux's
 common clock framework, and Linux then turns it off because it
 believes it is unused. Then the RTC stops ticking.


Indeed, this is an issue about relying on default state. We had a
quite long discussion a couple of weeks ago about simplefb relying on
clocks and regulators left enabled by the bootloader but once these
were know to the kernel, the frameworks disable them because were
unused making simplefb to fail.

 So the rtc_src idea would also be good for Exynos4412. Maybe it would
 make sense to drop the needs_src_clk flag, and simply require/enable
 the src clock whenever it is present in the DT.


That sounds more sensible to me as well. I wonder what should happen
in this case with DT backward compatibility though. But as you said,
the external clock is required and the kernel will disable this clock
once is know to the CCF since is not used so maybe will be hard to
maintain DT backward compatibility in this case.

 Also, are you sure about the way you are treating this clock, all
 those enable/disable calls? You only seem to enable it when doing some
 particular driver operations e.g. reading the time, leaving it
 disabled at all other times. However I believe on Exynos4412 that if
 you disable this clock then the RTC will not tick.

 Daniel

Best regards,
Javier
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Re: Exynos build failure in -next allmodconfig

2014-09-16 Thread Mark Brown
On Tue, Sep 16, 2014 at 02:01:02PM +0200, Tomasz Figa wrote:

 I think the problematic case here is v6+v7 multiplatform, where even
 though CONFIG_ARCH_EXYNOS is defined, compiler flags for lowest common
 denominator (v6) must be used. Using appropriate macros should fix the
 problem indeed.

Right, multiplatform ends up generating such a configuration.


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Re: [PATCH v2] mfd: syscon: Decouple syscon interface from platform devices

2014-09-16 Thread Arnd Bergmann
On Tuesday 16 September 2014, Pankaj Dubey wrote:
 Hi Arnd,  Lee Jones,
  On Thu, 04 Sep 2014 10:15:27 +0530
  Pankaj Dubey pankaj.du...@samsung.com wrote:
 
 Any update on this patch. As already it has been tested on two DT based
 platforms.
 
 If you think that we can go ahead and break clps711x till it gets migrated
 over DT,
 then please ack this patch, or else if you have opinion to keep support for
 non-DT
 based drivers (clps711x) then I can post another patch keeping platform
 driver support
 for non-DT based platform. 

The rule is that we don't intentionally break things, so please post a
patch that keeps the existing platform driver there. Ideally we get a DT-only
clps711x for the merge window as well, and if that happens we can add another
patch on top to remove that syscon-pdev support again but then we will
have a bisectable kernel that works for every point inbetween.


Arnd
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Re: [PATCH RESEND] ARM: DTS: correct the capability string for mmc0

2014-09-16 Thread Doug Anderson
Vivek,

On Tue, Sep 16, 2014 at 1:50 AM, Vivek Gautam gautam.vi...@samsung.com wrote:
 From: Naveen Krishna Chatradhi ch.nav...@samsung.com

 MMC capability for HS200 is parsed in mmc/core/host.c as
 dts string mmc-hs200-1_8v.

 This patch corrects the dts string for Exynos5420 based peach-pit
 and Exynos5800 based peach-pi boards.

 Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
 ---

 Hi Kukjin,

 As commented by Doug earlier for this patch, the two patches required
   -- mmc: dw_mmc: Make sure we don't get stuck when we get an error
   -- mmc: dw_mmc: change to use recommended reset procedure
 are now merged in upstream.
 So you can go ahead and pick this change.

  arch/arm/boot/dts/exynos5420-peach-pit.dts |2 +-
  arch/arm/boot/dts/exynos5800-peach-pi.dts  |2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Doug Anderson diand...@chromium.org
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Re: [PATCH V7 00/12] drm/exynos: few patches to enhance bridge chip support

2014-09-16 Thread Laurent Pinchart
Hi Javier,

On Tuesday 16 September 2014 14:44:02 Javier Martinez Canillas wrote:
 [adding Laurent Pinchart to cc who had concerns with a previous
 version of this patch-set]

Thank you, I've indeed missed v7.

 On Wed, Aug 27, 2014 at 4:29 PM, Ajay Kumar wrote:
  This series is based on master branch of Linus tree at:
  git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
  
  I have tested this after adding few DT changes for exynos5250-snow and
  exynos5420-peach-pit boards.
  
  The V4 series of this particular patchset was also tested by:
  Rahul Sharma rahul.sha...@samsung.com
  Javier Martinez Canillas jav...@dowhile0.org
  
  Changes since V2:
  -- Address comments from Jingoo Han for ps8622 driver
  -- Address comments from Daniel, Rob and Thierry regarding
 bridge chaining
  -- Address comments from Thierry regarding the names for
 new drm_panel functions
  
  Changes since V3:
  -- Remove hotplug based initialization of exynos_dp
  -- Make exynos_dp work directly with drm_panel, remove
 dependency on panel_binder
  -- Minor cleanups in panel_binder and panel_lvds driver
  
  Changes since V4:
  -- Use gpiod interface for panel-lvds and ps8622 drivers.
  -- Address comments from Javier.
  -- Fix compilation issues when PANEL_BINDER is selected as module.
  -- Split Documentation patches from driver patches.
  -- Rebase on top of the tree.
  
  Changes since V5:
  -- Modify bridge drivers to support driver model.
  -- Drop the concept of bridge chain(sincle there are no 2 real
  bridges)
 Hence drop bridge-panel_binder layer.
  -- Drop panel-lvds driver and accomodate the required changes in
 panel-simple driver.
  -- Use gpiod interface in ptn3460 driver.
  -- Address all comments by Thierry Reding for V5 series.
  -- Address comments from Sean Paul for exynos_dp_commit issue.
  
  Changes since V6:
  -- Panel patches were seperated and they are merged already.
  -- Fix few issues with ptn3460, before modifying the bridge core.
  -- Modify drm_bridge as per Thierry's comments for V6 series.
  -- Add drm_bridge changes minimally without breaking existing
  code.
  -- Add new features for ptn3460, step-by-step.
  -- Address comments from Thierry and Andreas for ptn3460 and
  ps8622.
  -- Split documentation patches from driver patches.
 
 I've tested your series on an Exynos5420 Peach Pit and an Exynos5250
 Snow Chromebooks and display worked for me on both machines.
 
 I also needed [PATCH] drm/panel: simple: Add AUO B116XW03 panel
 support [0] which does not apply cleanly on linux-next so you may
 want to do a re-spin for that patch.
 
 For Snow I also had to disable CONFIG_FB_SIMPLE, otherwise I just saw
 a blink on boot and only the backlight remained turned on (no display
 output). I don't know if that is expected since IIUC it should be
 possible to do a transition from simplefb to a DRM/KMS driver. I don't
 have a serial console hooked on this machine so I couldn't debug it
 further, sorry.
 
 Also, I saw that Laurent mentioned some concerns today about the
 previous version (v6) of your series [1]. I guess he missed this v7
 although AFAIU there was no fundamental change on this one so his
 concerns remains? I was really hoping that this could make it to 3.18
 since display support is one of the last major functionalities that is
 missing on these machines.

My main concern as far as merging this patch set goes is why we can't use the 
component framework instead of introducing yet another new subsystem-specific 
component registration framework. My other concerns could be addressed as 
follow-up patches (but I'd like to start discussing them now).

 [0]: http://patchwork.ozlabs.org/patch/384744/
 [1]: http://www.spinics.net/lists/linux-samsung-soc/msg36791.html

-- 
Regards,

Laurent Pinchart

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[PATCH 04/22] video: fbdev: Replace strnicmp with strncasecmp

2014-09-16 Thread Rasmus Villemoes
The kernel used to contain two functions for length-delimited,
case-insensitive string comparison, strnicmp with correct semantics
and a slightly buggy strncasecmp. The latter is the POSIX name, so
strnicmp was renamed to strncasecmp, and strnicmp made into a wrapper
for the new strncasecmp to avoid breaking existing users.

To allow the compat wrapper strnicmp to be removed at some point in
the future, and to avoid the extra indirection cost, do
s/strnicmp/strncasecmp/g.

Cc: Jean-Christophe Plagniol-Villard plagn...@jcrosoft.com
Cc: Tomi Valkeinen tomi.valkei...@ti.com
Cc: linux-fb...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Rasmus Villemoes li...@rasmusvillemoes.dk
---
 drivers/video/fbdev/pvr2fb.c   |  2 +-
 drivers/video/fbdev/s3c2410fb.c|  8 ++---
 drivers/video/fbdev/sis/sis_main.c | 66 +++---
 drivers/video/fbdev/sm501fb.c  |  4 +--
 4 files changed, 40 insertions(+), 40 deletions(-)

diff --git a/drivers/video/fbdev/pvr2fb.c b/drivers/video/fbdev/pvr2fb.c
index 167cfff..7c74f58 100644
--- a/drivers/video/fbdev/pvr2fb.c
+++ b/drivers/video/fbdev/pvr2fb.c
@@ -1001,7 +1001,7 @@ static int pvr2_get_param(const struct pvr2_params *p, 
const char *s, int val,
 
for (i = 0 ; i  size ; i++ ) {
if (s != NULL) {
-   if (!strnicmp(p[i].name, s, strlen(s)))
+   if (!strncasecmp(p[i].name, s, strlen(s)))
return p[i].val;
} else {
if (p[i].val == val)
diff --git a/drivers/video/fbdev/s3c2410fb.c b/drivers/video/fbdev/s3c2410fb.c
index 43c63a4..e350eb5 100644
--- a/drivers/video/fbdev/s3c2410fb.c
+++ b/drivers/video/fbdev/s3c2410fb.c
@@ -601,12 +601,12 @@ static int s3c2410fb_debug_store(struct device *dev,
if (len  1)
return -EINVAL;
 
-   if (strnicmp(buf, on, 2) == 0 ||
-   strnicmp(buf, 1, 1) == 0) {
+   if (strncasecmp(buf, on, 2) == 0 ||
+   strncasecmp(buf, 1, 1) == 0) {
debug = 1;
dev_dbg(dev, s3c2410fb: Debug On);
-   } else if (strnicmp(buf, off, 3) == 0 ||
-  strnicmp(buf, 0, 1) == 0) {
+   } else if (strncasecmp(buf, off, 3) == 0 ||
+  strncasecmp(buf, 0, 1) == 0) {
debug = 0;
dev_dbg(dev, s3c2410fb: Debug Off);
} else {
diff --git a/drivers/video/fbdev/sis/sis_main.c 
b/drivers/video/fbdev/sis/sis_main.c
index 3f12a2d..4f5cf03 100644
--- a/drivers/video/fbdev/sis/sis_main.c
+++ b/drivers/video/fbdev/sis/sis_main.c
@@ -162,7 +162,7 @@ static void sisfb_search_mode(char *name, bool quiet)
return;
}
 
-   if(!strnicmp(name, sisbios_mode[MODE_INDEX_NONE].name, strlen(name))) {
+   if(!strncasecmp(name, sisbios_mode[MODE_INDEX_NONE].name, 
strlen(name))) {
if(!quiet)
printk(KERN_ERR sisfb: Mode 'none' not supported 
anymore. Using default.\n);
 
@@ -201,7 +201,7 @@ static void sisfb_search_mode(char *name, bool quiet)
 
i = 0; j = 0;
while(sisbios_mode[i].mode_no[0] != 0) {
-   if(!strnicmp(nameptr, sisbios_mode[i++].name, strlen(nameptr))) 
{
+   if(!strncasecmp(nameptr, sisbios_mode[i++].name, 
strlen(nameptr))) {
if(sisfb_fstn) {
if(sisbios_mode[i-1].mode_no[1] == 0x50 ||
   sisbios_mode[i-1].mode_no[1] == 0x56 ||
@@ -262,7 +262,7 @@ sisfb_search_crt2type(const char *name)
if(name == NULL) return;
 
while(sis_crt2type[i].type_no != -1) {
-   if(!strnicmp(name, sis_crt2type[i].name, 
strlen(sis_crt2type[i].name))) {
+   if(!strncasecmp(name, sis_crt2type[i].name, 
strlen(sis_crt2type[i].name))) {
sisfb_crt2type = sis_crt2type[i].type_no;
sisfb_tvplug = sis_crt2type[i].tvplug_no;
sisfb_crt2flags = sis_crt2type[i].flags;
@@ -289,7 +289,7 @@ sisfb_search_tvstd(const char *name)
return;
 
while(sis_tvtype[i].type_no != -1) {
-   if(!strnicmp(name, sis_tvtype[i].name, 
strlen(sis_tvtype[i].name))) {
+   if(!strncasecmp(name, sis_tvtype[i].name, 
strlen(sis_tvtype[i].name))) {
sisfb_tvstd = sis_tvtype[i].type_no;
break;
}
@@ -308,12 +308,12 @@ sisfb_search_specialtiming(const char *name)
if(name == NULL)
return;
 
-   if(!strnicmp(name, none, 4)) {
+   if(!strncasecmp(name, none, 4)) {
sisfb_specialtiming = CUT_FORCENONE;
printk(KERN_DEBUG sisfb: Special timing disabled\n);
} else {
while(mycustomttable[i].chipID != 0) {
-   if(!strnicmp(name,mycustomttable[i].optionName,
+

Re: [PATCHv3 4/5] rtc: s3c: Add support for RTC of Exynos3250 SoC

2014-09-16 Thread Doug Anderson
Hi,

On Tue, Sep 16, 2014 at 8:20 AM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
 Hello Daniel,

 On Tue, Sep 16, 2014 at 5:03 PM, Daniel Drake dr...@endlessm.com wrote:
 On Tue, Sep 16, 2014 at 7:48 AM, Javier Martinez Canillas
 jav...@dowhile0.org wrote:
 Clock list for s3c-rtc device:
 - rtc : CLK_RTC of CLK_GATE_IP_PERIR is gate clock for RTC.
 - rtc_src : XrtcXTI is 32.768.kHz source clock for RTC.

 Is this RTC source clock needed for all Exynos SoCs?

 It is at least needed on Exynos4412, which has the XrtcXTI thing
 exactly as you describe. However the very standard setup there is to
 hook it up to the CP clock output of the MAX76686 PMIC. This CP clock
 is on by default, so you can potentially live without that detail
 being present in the DT.


 Thanks for confirming for Exynos4412, I just answered my own email
 saying that I found to be needed on Exynos5420 as well and as you
 said, it was just working because the Maxim clocks were left on by
 default.

 However... one small issue with this setup is that when you enable
 CONFIG_COMMON_CLK_MAX77686, the CP clock gets exposed in Linux's
 common clock framework, and Linux then turns it off because it
 believes it is unused. Then the RTC stops ticking.


 Indeed, this is an issue about relying on default state. We had a
 quite long discussion a couple of weeks ago about simplefb relying on
 clocks and regulators left enabled by the bootloader but once these
 were know to the kernel, the frameworks disable them because were
 unused making simplefb to fail.

 So the rtc_src idea would also be good for Exynos4412. Maybe it would
 make sense to drop the needs_src_clk flag, and simply require/enable
 the src clock whenever it is present in the DT.


 That sounds more sensible to me as well. I wonder what should happen
 in this case with DT backward compatibility though. But as you said,
 the external clock is required and the kernel will disable this clock
 once is know to the CCF since is not used so maybe will be hard to
 maintain DT backward compatibility in this case.

I think you can turn off CONFIG_COMMON_CLK_MAX77686 and then this
clock will be left at whatever the bootloader set it to, right?  Then
there will be no auto-disabling by the CCF and the RTC will work.
That's one argument for making the clock optional.

NOTE: I don't think that the builtin RTC is terribly important for any
exynos-based Chromebooks that I'm aware of.  We rely on the RTC that's
part of the Maxim PMIC itself and pretty much ignore the one built-in
to the exynos.  I think there are some cases it was used (as a
fallback wakeup source in certain test scripts), but nothing very
important.

-Doug
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[GIT PULL 2/2] Samsung DT changes for 3.18

2014-09-16 Thread Kukjin Kim

The following changes since commit 7d1311b93e58ed55f3a31cc8f94c4b8fe988a2b9:

  Linux 3.17-rc1 (2014-08-16 10:40:26 -0600)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/samsung-dt


for you to fetch changes up to 9b02732643d9f4b92b14f5ec041c166bd36033fc:

  ARM: dts: remove old USB2 PHY node for exynos5250 (2014-09-14 
10:11:20 +0900)



Samsung DT update for 3.18

- un-use slot-node and deprecate the supports-highspped
  for dw-mmc
- remove old USB2 PHY node for exynos5250

- exynos4412-odroid-common
  enable PMIC interrupt and i2c improvements

- exynos5250-snow
  fold exynos5250-cros-common
  update display related nodes

- Peach Pit and Pi
  improve power scheme, add support max77802 PMIC,
  add hdmi regulators add thermistor, ISL29018 sensor,
  set i2c clock at 400kHz, add support Atmel touchpad,
  update display related nodes


Ajay Kumar (3):
  ARM: dts: update display related nodes for exynos5250-snow
  ARM: dts: update display related nodes for exynos5420-peach-pit
  ARM: dts: update display related nodes for exynos5800-peach-pi

Andreas Faerber (2):
  ARM: dts: Fix MMC pinctrl for exynos5250-snow
  ARM: dts: Fold exynos5250-cros-common into exynos5250-snow

Bartlomiej Zolnierkiewicz (2):
  ARM: dts: remove old USB2 PHY node hook for exynos5250-arndale
  ARM: dts: remove old USB2 PHY node for exynos5250

Daniel Drake (2):
  ARM: dts: Enable PMIC interrupts for exynos4412-odroid-common
  ARM: dts: ODROID i2c improvements for exynos4412-odroid-common

Jaehoon Chung (1):
  ARM: dts: unuse the slot-node and deprecate the 
supports-highspeed for dw-mmc in exynos


Javier Martinez Canillas (5):
  ARM: dts: Improve Peach Pit and Pi power scheme
  ARM: dts: Add support max77802 PMIC for exynos based Peach boards
  ARM: dts: Add ISL29018 sensor for exynos based Peach boards
  ARM: dts: Set i2c7 clock at 400kHz for exynos based Peach boards
  ARM: dts: Add support Atmel touchpad for exynos5800-peach-pi

Naveen Krishna Chatradhi (1):
  ARM: dts: Add thermistor dts fragment used by exynos based Peach 
boards


Rahul Sharma (2):
  ARM: dts: add hdmi regulators for exynos5800-peach-pi
  ARM: dts: add hdmi regulators for exynos5420-peach-pit

Sjoerd Simons (1):
  ARM: dts: Add support Atmel touchpad for exynos5420-peach-pit

 arch/arm/boot/dts/cros-adc-thermistors.dtsi |  44 +++
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi |  21 +-
 arch/arm/boot/dts/exynos4412-origen.dts |   8 +-
 arch/arm/boot/dts/exynos4412-trats2.dts |   8 +-
 arch/arm/boot/dts/exynos5250-arndale.dts|  22 +-
 arch/arm/boot/dts/exynos5250-cros-common.dtsi   | 164 
 arch/arm/boot/dts/exynos5250-smdk5250.dts   |  18 +-
 arch/arm/boot/dts/exynos5250-snow.dts   | 195 --
 arch/arm/boot/dts/exynos5250.dtsi   |  15 -
 arch/arm/boot/dts/exynos5260-xyref5260.dts  |  18 +-
 arch/arm/boot/dts/exynos5410-smdk5410.dts   |  18 +-
 arch/arm/boot/dts/exynos5420-arndale-octa.dts   |  16 +-
 arch/arm/boot/dts/exynos5420-peach-pit.dts  | 482 
++--

 arch/arm/boot/dts/exynos5420-smdk5420.dts   |  16 +-
 arch/arm/boot/dts/exynos5800-peach-pi.dts   | 472 
+--

 15 files changed, 1130 insertions(+), 387 deletions(-)
 create mode 100644 arch/arm/boot/dts/cros-adc-thermistors.dtsi
 delete mode 100644 arch/arm/boot/dts/exynos5250-cros-common.dtsi
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[GIT PULL 1/2] Samsung cleanup for 3.18

2014-09-16 Thread Kukjin Kim

The following changes since commit 7d1311b93e58ed55f3a31cc8f94c4b8fe988a2b9:

  Linux 3.17-rc1 (2014-08-16 10:40:26 -0600)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/samsung-cleanup


for you to fetch changes up to f6361c6b3880063c2248d4e453331e3dc1efbf83:

  ARM: S3C24XX: remove separate restart code (2014-09-14 02:43:09 +0900)


Samsung cleanup for 3.18
- remove unused mach/memory.h in exynos
- local mach/regs-clock.h for s5pv210
- cleanup boot address calculate for exynos
- remove separate restart code for s3c24xx


Heiko Stuebner (1):
  ARM: S3C24XX: remove separate restart code

Krzysztof Kozlowski (1):
  ARM: EXYNOS: Do not calculate boot address twice

Kukjin Kim (1):
  ARM: S5PV210: move mach/regs-clock.h into mach-s5pv210/

Uwe Kleine-Koenig (1):
  ARM: EXYNOS: remove unused mach/memory.h

 arch/arm/mach-exynos/include/mach/memory.h | 26 
--

 arch/arm/mach-exynos/platsmp.c |  4 ++--
 arch/arm/mach-s3c24xx/Kconfig  |  2 --
 arch/arm/mach-s3c24xx/common.c |  4 
 arch/arm/mach-s3c24xx/common.h |  5 -
 .../mach-s3c24xx/include/mach/regs-s3c2443-clock.h |  2 --
 arch/arm/mach-s3c24xx/mach-amlm5900.c  |  1 -
 arch/arm/mach-s3c24xx/mach-anubis.c|  1 -
 arch/arm/mach-s3c24xx/mach-at2440evb.c |  1 -
 arch/arm/mach-s3c24xx/mach-bast.c  |  1 -
 arch/arm/mach-s3c24xx/mach-gta02.c |  1 -
 arch/arm/mach-s3c24xx/mach-h1940.c |  1 -
 arch/arm/mach-s3c24xx/mach-jive.c  |  1 -
 arch/arm/mach-s3c24xx/mach-mini2440.c  |  1 -
 arch/arm/mach-s3c24xx/mach-n30.c   |  2 --
 arch/arm/mach-s3c24xx/mach-nexcoder.c  |  1 -
 arch/arm/mach-s3c24xx/mach-osiris.c|  1 -
 arch/arm/mach-s3c24xx/mach-otom.c  |  1 -
 arch/arm/mach-s3c24xx/mach-qt2410.c|  1 -
 arch/arm/mach-s3c24xx/mach-rx1950.c|  1 -
 arch/arm/mach-s3c24xx/mach-rx3715.c|  1 -
 arch/arm/mach-s3c24xx/mach-s3c2416-dt.c|  1 -
 arch/arm/mach-s3c24xx/mach-smdk2410.c  |  1 -
 arch/arm/mach-s3c24xx/mach-smdk2413.c  |  3 ---
 arch/arm/mach-s3c24xx/mach-smdk2416.c  |  1 -
 arch/arm/mach-s3c24xx/mach-smdk2440.c  |  1 -
 arch/arm/mach-s3c24xx/mach-smdk2443.c  |  1 -
 arch/arm/mach-s3c24xx/mach-tct_hammer.c|  1 -
 arch/arm/mach-s3c24xx/mach-vr1000.c|  1 -
 arch/arm/mach-s3c24xx/mach-vstms.c |  1 -
 arch/arm/mach-s3c24xx/s3c2410.c| 13 ---
 arch/arm/mach-s3c24xx/s3c2412.c| 23 
---

 arch/arm/mach-s3c24xx/s3c2416.c|  8 ---
 arch/arm/mach-s3c24xx/s3c2443.c|  8 ---
 arch/arm/mach-s3c24xx/s3c244x.c| 12 --
 arch/arm/mach-s5pv210/pm.c |  3 +--
 .../mach-s5pv210/{include/mach = }/regs-clock.h   |  3 +--
 arch/arm/mach-s5pv210/s5pv210.c|  2 +-
 38 files changed, 5 insertions(+), 137 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/include/mach/memory.h
 rename arch/arm/mach-s5pv210/{include/mach = }/regs-clock.h (99%)
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[RESEND PATCH] arm: exynos: Allow rtc alarm and tick wakeup irq for exynos3250.

2014-09-16 Thread Jonghwa Lee
Add rtc alarm and tick irq to wakeup sources in exynos3250.

Signed-off-by: Jonghwa Lee jonghwa3@samsung.com
Acked-by : Chanwoo choi cw00.c...@samsung.com
---
 arch/arm/mach-exynos/pm.c |9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index fa7218a..d78dcf9 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -66,6 +66,12 @@ static struct sleep_save exynos_core_save[] = {
 
 static u32 exynos_irqwake_intmask = 0x;
 
+static const struct exynos_wkup_irq exynos3250_wkup_irq[] = {
+   { 105, BIT(1) }, /* RTC alarm */
+   { 106, BIT(2) }, /* RTC tick */
+   { /* sentinel */ },
+};
+
 static const struct exynos_wkup_irq exynos4_wkup_irq[] = {
{ 76, BIT(1) }, /* RTC alarm */
{ 77, BIT(2) }, /* RTC tick */
@@ -81,9 +87,10 @@ static const struct exynos_wkup_irq exynos5250_wkup_irq[] = {
 static int exynos_irq_set_wake(struct irq_data *data, unsigned int state)
 {
const struct exynos_wkup_irq *wkup_irq;
-
if (soc_is_exynos5250())
wkup_irq = exynos5250_wkup_irq;
+   else if (soc_is_exynos3250())
+   wkup_irq = exynos3250_wkup_irq;
else
wkup_irq = exynos4_wkup_irq;
 
-- 
1.7.9.5

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