date:20140930

Currently a syscon entity can be only registered directly through a
platform device that binds to a dedicated syscon driver. However in
certain use cases it is desirable to make a device used with another
driver a syscon interface provider.

For example, certain SoCs (e.g. Exynos) contain system controller
blocks which perform various functions such as power domain control,
CPU power management, low power mode control, but in addition contain
certain IP integration glue, such as various signal masks,
coprocessor power control, etc. In such case, there is a need to have
a dedicated driver for such system controller but also share registers
with other drivers. The latter is where the syscon interface is helpful.

In case of DT based platforms, this patch decouples syscon object from
syscon platform driver, and allows to create syscon objects first time
when it is required by calling of syscon_regmap_lookup_by APIs and keep
a list of such syscon objects along with syscon provider device_nodes
and regmap handles.

For non-DT based platforms, this patch keeps syscon platform driver
structure so that syscon can be probed and such non-DT based drivers
can use syscon_regmap_lookup_by_pdev API and access regmap handles.
Once all users of syscon_regmap_lookup_by_pdev migrated to DT based,
we can completely remove platform driver of syscon, and keep only helper
functions to get regmap handles.

Suggested-by: Arnd Bergmann a...@arndb.de
Suggested-by: Tomasz Figa tomasz.f...@gmail.com
Tested-by: Vivek Gautam gautam.vi...@samsung.com
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Reviewed-by: Arnd Bergmann a...@arndb.de
Tested-by: Heiko Stuebner he...@sntech.de
Reviewed-by: Heiko Stuebner he...@sntech.de
---
Patch v6 and related discussions can be found here [1].

Change since v5:
 - Addressed review comments from Heiko Stuebner.
 - Updated commit description.
 - Including Arnd's and Heiko's Reviewed-by.

Change since v5:
 - Dropping creation of dummy platform device in of_syscon_register.
 - As we are changing syscon to decouple from platform_device, creation of 
   dummy platform_device does not look good option, and as suggested by Arnd,
   I made another attempt so that regmap_mmio_init API should work with NULL
   dev pointer itself. Since regmap needs to know about Syscon device node
   properties so let's parse device node of syscon in syscon itself for any
   such properties and using regmap_config parameter pass all such information
   to regmap. Other concern of crashes due to NULL dev pointer in regmap already
   addressed in separate patches of regmap. Please see [2] and [3].

Changes since v4:
 - Addressed Tomasz Figa's comments for v4.
 - Added error handing in of_syscon_register function.
 - Using devm_regmap_init_mmio instead of regmap_init_mmio.

Changes since v3:
 - Addressed Arnd's comment for v2.
 - Updated of_syscon_register for adding dev pointer in regmap_init_mmio.
 - For early users created dummy platform device.

Changes since v2:
 - Added back platform device support from syscon, with one change that
   syscon will not be probed for DT based platform.
 - Added back syscon_regmap_lookup_by_pdevname API so that non-DT base
   users of syscon will not be broken.
 - Removed unwanted change in syscon.h.
 - Modified Signed-off-by list, added Suggested-by of Tomasz Figa and
   Arnd Bergmann.
 - Added Tested-by of Vivek Gautam for testing on Exynos platform.

Changes since v1:
 - Removed of_syscon_unregister function.
 - Modified of_syscon_register function and it will be used by syscon.c
   to create syscon objects whenever required.
 - Removed platform device support from syscon.
 - Removed syscon_regmap_lookup_by_pdevname API support.
 - As there are significant changes w.r.t patchset v1, I am taking over
   author for this patchset from Tomasz Figa.

[1]: https://lkml.org/lkml/2014/9/29/99
[2]: https://lkml.org/lkml/2014/9/18/130
[3]: https://lkml.org/lkml/2014/9/27/2
 drivers/mfd/syscon.c |   96 ++
 1 file changed, 74 insertions(+), 22 deletions(-)

diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c
index ca15878..72373b1 100644
--- a/drivers/mfd/syscon.c
+++ b/drivers/mfd/syscon.c
@@ -15,6 +15,7 @@
 #include linux/err.h
 #include linux/io.h
 #include linux/module.h
+#include linux/list.h
 #include linux/of.h
 #include linux/of_address.h
 #include linux/of_platform.h
@@ -22,31 +23,94 @@
 #include linux/platform_device.h
 #include linux/regmap.h
 #include linux/mfd/syscon.h
+#include linux/slab.h
 
 static struct platform_driver syscon_driver;
 
+static DEFINE_SPINLOCK(syscon_list_slock);
+static LIST_HEAD(syscon_list);
+
 struct syscon {
+   struct device_node *np;
struct regmap *regmap;
+   struct list_head list;
+};
+
+static struct regmap_config syscon_regmap_config = {
+   .reg_bits = 32,
+   .val_bits = 32,
+   .reg_stride = 4,
 };

[PATCH v8 2/2] ARM: EXYNOS: Move PMU specific definitions from common.h

This patch moves PMU specific definitions into a new file
as exynos-pmu.h.
This will help in reducing dependency of common.h in pmu.c.

Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
 arch/arm/mach-exynos/common.h |   17 -
 arch/arm/mach-exynos/exynos-pmu.h |   24 
 arch/arm/mach-exynos/pm.c |1 +
 arch/arm/mach-exynos/pmu.c|   20 +++-
 arch/arm/mach-exynos/suspend.c|1 +
 5 files changed, 45 insertions(+), 18 deletions(-)
 create mode 100644 arch/arm/mach-exynos/exynos-pmu.h

diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index d4d09bc..431be1b 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -139,23 +139,6 @@ extern void exynos_cpu_resume_ns(void);
 
 extern struct smp_operations exynos_smp_ops;
 
-/* PMU(Power Management Unit) support */
-
-#define PMU_TABLE_END  (-1U)
-
-enum sys_powerdown {
-   SYS_AFTR,
-   SYS_LPA,
-   SYS_SLEEP,
-   NUM_SYS_POWERDOWN,
-};
-
-struct exynos_pmu_conf {
-   unsigned int offset;
-   unsigned int val[NUM_SYS_POWERDOWN];
-};
-
-extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
 extern void exynos_cpu_power_down(int cpu);
 extern void exynos_cpu_power_up(int cpu);
 extern int  exynos_cpu_power_state(int cpu);
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/arch/arm/mach-exynos/exynos-pmu.h
new file mode 100644
index 000..a2ab0d5
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos-pmu.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Header for EXYNOS PMU Driver support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __EXYNOS_PMU_H
+#define __EXYNOS_PMU_H
+
+enum sys_powerdown {
+   SYS_AFTR,
+   SYS_LPA,
+   SYS_SLEEP,
+   NUM_SYS_POWERDOWN,
+};
+
+extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+
+#endif /* __EXYNOS_PMU_H */
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 4f10fa6..86f3ecd 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -26,6 +26,7 @@
 #include plat/pm-common.h
 
 #include common.h
+#include exynos-pmu.h
 #include regs-pmu.h
 #include regs-sys.h
 
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 1f5aaa7..87613e0 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -13,9 +13,16 @@
 #include linux/of.h
 #include linux/platform_device.h
 
-#include common.h
+#include exynos-pmu.h
 #include regs-pmu.h
 
+#define PMU_TABLE_END  (-1U)
+
+struct exynos_pmu_conf {
+   unsigned int offset;
+   unsigned int val[NUM_SYS_POWERDOWN];
+};
+
 struct exynos_pmu_data {
const struct exynos_pmu_conf *pmu_config;
const struct exynos_pmu_conf *pmu_config_extra;
@@ -29,8 +36,19 @@ struct exynos_pmu_context {
const struct exynos_pmu_data *pmu_data;
 };
 
+static void __iomem *pmu_base_addr;
 static struct exynos_pmu_context *pmu_context;
 
+static inline void pmu_raw_writel(u32 val, u32 offset)
+{
+   __raw_writel(val, pmu_base_addr + offset);
+}
+
+static inline u32 pmu_raw_readl(u32 offset)
+{
+   return __raw_readl(pmu_base_addr + offset);
+}
+
 static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
/* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
{ S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } },
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index f5d9773..079d999 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -33,6 +33,7 @@
 #include common.h
 #include regs-pmu.h
 #include regs-sys.h
+#include exynos-pmu.h
 
 #define S5P_CHECK_SLEEP 0x0BAD
 
-- 
1.7.9.5

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[PATCH v8 1/2] ARM: EXYNOS: Add platform driver support for Exynos PMU

This patch modifies Exynos Power Management Unit (PMU) initialization
implementation in following way:

- Added platform driver support for Exynos PMU IP.
- Added platform struct exynos_pmu_data to hold platform specific data.
- For each SoC's PMU support now we can add platform data and statically
  bind PMU configuration and SoC specific initialization function.
- Separate each SoC's PMU initialization function and make it as part of
  platform data.
- It also removes uses of soc_is_exynosXYZ().

Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
 arch/arm/mach-exynos/Kconfig |1 +
 arch/arm/mach-exynos/pmu.c   |  171 +++---
 2 files changed, 130 insertions(+), 42 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 46f3c0d..0ca168e 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -24,6 +24,7 @@ menuconfig ARCH_EXYNOS
select PM_GENERIC_DOMAINS if PM_RUNTIME
select S5P_DEV_MFC
select SRAM
+   select MFD_SYSCON
help
  Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
 
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index cfc62e8..1f5aaa7 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
  * http://www.samsung.com/
  *
  * EXYNOS - CPU PMU(Power Management Unit) support
@@ -10,12 +10,26 @@
  */
 
 #include linux/io.h
-#include linux/kernel.h
+#include linux/of.h
+#include linux/platform_device.h
 
 #include common.h
 #include regs-pmu.h
 
-static const struct exynos_pmu_conf *exynos_pmu_config;
+struct exynos_pmu_data {
+   const struct exynos_pmu_conf *pmu_config;
+   const struct exynos_pmu_conf *pmu_config_extra;
+
+   void (*pmu_init)(void);
+   void (*powerdown_conf)(enum sys_powerdown);
+};
+
+struct exynos_pmu_context {
+   struct device *dev;
+   const struct exynos_pmu_data *pmu_data;
+};
+
+static struct exynos_pmu_context *pmu_context;
 
 static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
/* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
@@ -336,7 +350,7 @@ static unsigned int const exynos5_list_diable_wfi_wfe[] = {
EXYNOS5_ISP_ARM_OPTION,
 };
 
-static void exynos5_init_pmu(void)
+static void exynos5_powerdown_conf(enum sys_powerdown mode)
 {
unsigned int i;
unsigned int tmp;
@@ -344,7 +358,7 @@ static void exynos5_init_pmu(void)
/*
 * Enable both SC_FEEDBACK and SC_COUNTER
 */
-   for (i = 0 ; i  ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
+   for (i = 0; i  ARRAY_SIZE(exynos5_list_both_cnt_feed); i++) {
tmp = pmu_raw_readl(exynos5_list_both_cnt_feed[i]);
tmp |= (EXYNOS5_USE_SC_FEEDBACK |
EXYNOS5_USE_SC_COUNTER);
@@ -361,7 +375,7 @@ static void exynos5_init_pmu(void)
/*
 * Disable WFI/WFE on XXX_OPTION
 */
-   for (i = 0 ; i  ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {
+   for (i = 0; i  ARRAY_SIZE(exynos5_list_diable_wfi_wfe); i++) {
tmp = pmu_raw_readl(exynos5_list_diable_wfi_wfe[i]);
tmp = ~(EXYNOS5_OPTION_USE_STANDBYWFE |
 EXYNOS5_OPTION_USE_STANDBYWFI);
@@ -373,51 +387,124 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
 {
unsigned int i;
 
-   if (soc_is_exynos5250())
-   exynos5_init_pmu();
+   const struct exynos_pmu_data *pmu_data = pmu_context-pmu_data;
 
-   for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
-   pmu_raw_writel(exynos_pmu_config[i].val[mode],
-   exynos_pmu_config[i].offset);
+   if (pmu_data-powerdown_conf)
+   pmu_data-powerdown_conf(mode);
 
-   if (soc_is_exynos4412()) {
-   for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END ; 
i++)
-   pmu_raw_writel(exynos4412_pmu_config[i].val[mode],
-   exynos4412_pmu_config[i].offset);
+   if (pmu_data-pmu_config) {
+   for (i = 0; (pmu_data-pmu_config[i].offset != PMU_TABLE_END); 
i++)
+   pmu_raw_writel(pmu_data-pmu_config[i].val[mode],
+   pmu_data-pmu_config[i].offset);
+   }
+
+   if (pmu_data-pmu_config_extra) {
+   for (i = 0; pmu_data-pmu_config_extra[i].offset != 
PMU_TABLE_END; i++)
+   pmu_raw_writel(pmu_data-pmu_config_extra[i].val[mode],
+   pmu_data-pmu_config_extra[i].offset);
}
 }
 
-static int __init exynos_pmu_init(void)
+static void exynos5250_pmu_init(void)
 {
unsigned int value;
+   /*
+* When

[PATCH v8 0/2] ARM: Exynos: Convert PMU implementation into a platform driver

This patch series, modifies Exynos Power Management Unit (PMU) related code
for converting it into a platform_driver. This is also preparation for moving
PMU related code out of machine folder into a either drivers/mfd, or
drivers/power or some other suitable place so that ARM64 based SoC can
utilize common piece of code.

These patches are created on top of Kukjin Kim's for-next.

Vikas Sajjan have tested these patches on Exynos5420 based Peach board for
system boot and S2R.

This patch series depends on following patch series:
[1]: mfd: syscon: Decouple syscon interface from syscon devices.
 https://lkml.org/lkml/2014/9/30/156

Patch v7 and discussion can be found here:
https://lkml.org/lkml/2014/7/9/3

Change since v7:
 - Removing registration of syscon provider. As it will be handled now by
   syscon patch [1].
 - Rebased on top of latest kgene/for-next.
 
Change since v6:
 - Removed NULL check for pmu_data in pmu.c.
 - Moved pmu_raw_readl and pmu_raw_writel inline helper function
   into common.h.
  
Change Since v5:
 - Squashed patch Move mach/map.h inclusion from regs-pmu.h to platsmp.c
   into patch Refactored code for using PMU address via DT.
 - Addressed review comments from Tomasz Figa.
 - Using init_irq machine function to initialize PMU mapping instead
   of init_time.
 - Rebased on latest Kukjin Kim's for-next branch.

Changes Since v4:
 - Splitted patch series in two parts. Part 1 has code cleanup under mach-exynos
   and posted as separate patch [2]. Current patchset is part 2 which modified
   exynos pmu implementation for making it platform driver.
 - Removed dependency over early_syscon API.
 - Removed usage of regmap read/write APIs.
 - Modified probe function to register exynos pmu as syscon provider using
   Tomasz Figa's syscon patch [1].
 - Address various other review comments from Tomasz Figa.
 - Removed signed-off-by of Young-Gun Jang yg1004.jang at samsung.com,
   as this id is no more valid. Taking ownership of all his patches.

Changes Since v3:
 - Optimized exynos_pmu_probe function by removing exynos_pmu_data_init
   as suggested by Vikas Sajjan.
 - Modified syscon_early_regmap_lookup_by_phandle and
   syscon_regmap_lookup_by_phandle function call to pass property as NULL.

Changes Since v2:
 - Rebased on top of Daniel Lezcano's Exynos cpuidle refactor patches.
 - Removed early mapping of PMU base address from exynos.c and removed
   get_exynos_pmuaddr function. Instead of this added code in platsmp.c
   to get PMU base address using of_iomap as suggested by Tomasz Figa.
 - Converted PMU implementation into platform_driver by using static
   platform_device method. 

Changes Since v1:
 - Rebased on latest for-next of Kukjin Kim's tree.
 - Updated patch: Add support for mapping PMU base address via DT
- Removed __initdata from declaration of exynos_pmu_base, as it caused
kernel crash as pointed out by Vikas Sajjan.
- Added support for Syscon initialization and getting PMU regmap handle
as suggested by Sylwester. Since current implementation of early
intialization [1] has limitation that early_syscon_init requires
DT to be unflattened and system should be able to allocate memory,
we can't use regmap handles for platsmp.c file as smp_secondary_init
will be called before DT unflattening. So I have kept both method for
accessing PMU base address. platsmp.c will use ioremmaped address where
as rest other files can use regmap handle.
 - Updated patch: Refactored code for PMU register mapping via DT
- Modified to use regmap_read/write when using regmap handle.
 - Added patch: Add device tree based initialization support for PMU.
- Convert existing PMU implementation to be a device tree based 
 before moving it to drivers/mfd folder. As suggested by Bartlomiej.
- Dropped making a platform_driver for PMU, as currently PMU binding
has two compatibility strings as samsung, exynosxxx-pmu, syscon,
once we enable MFD_SYSCON config option, current syscon driver probe
gets called and PMU probe never gets called. So modified PMU
initialization code to scan DT and match against supported compatiblity
string in driver code, and once we get matching node use that for
accessing PMU regmap handle using 
syscon_early_regmap_lookup_by_phandle.
If there is any better solution please suggest.

Pankaj Dubey (2):
  ARM: EXYNOS: Add platform driver support for Exynos PMU
  ARM: EXYNOS: Move PMU specific definitions from common.h

 arch/arm/mach-exynos/Kconfig  |1 +
 arch/arm/mach-exynos/common.h |   17 
 arch/arm/mach-exynos/exynos-pmu.h |   24 +
 arch/arm/mach-exynos/pm.c |1 +
 arch/arm/mach-exynos/pmu.c|  191 -
 arch/arm/mach-exynos/suspend.c|1 +
 6 files changed, 175 insertions(+), 60 deletions(-)
 create mode 100644

Re: [PATCH v8 2/2] ARM: EXYNOS: Move PMU specific definitions from common.h

2014-09-30 Thread Arnd Bergmann

On Tuesday 30 September 2014 15:51:21 Pankaj Dubey wrote:
 
 +static inline void pmu_raw_writel(u32 val, u32 offset)
 +{
 +   __raw_writel(val, pmu_base_addr + offset);
 +}
 +
 +static inline u32 pmu_raw_readl(u32 offset)
 +{
 +   return __raw_readl(pmu_base_addr + offset);
 +}
 +
 

While you're at it, please convert these to use readl_relaxed() instead,
which is safe to use in drivers and works independent of CPU endianess.

Arnd
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[PATCH v8 2/2] ARM: exynos5: Add Suspend-to-RAM support for 5420

2014-09-30 Thread Vikas Sajjan

Adds Suspend-to-RAM support for EXYNOS5420

Signed-off-by: Vikas Sajjan vikas.saj...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
 arch/arm/mach-exynos/suspend.c |  156 +++-
 1 file changed, 154 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index 079d999..773140c 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -39,6 +39,8 @@
 
 #define REG_TABLE_END (-1U)
 
+#define EXYNOS5420_CPU_STATE   0x28
+
 /**
  * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
  * @hwirq: Hardware IRQ signal of the GIC
@@ -77,6 +79,9 @@ struct exynos_pm_data {
 
 struct exynos_pm_data *pm_data;
 
+static int exynos5420_cpu_state;
+static unsigned int exynos_pmu_spare3;
+
 /*
  * GIC wake-up support
  */
@@ -106,6 +111,23 @@ unsigned int exynos_release_ret_regs[] = {
REG_TABLE_END,
 };
 
+unsigned int exynos5420_release_ret_regs[] = {
+   EXYNOS_PAD_RET_DRAM_OPTION,
+   EXYNOS_PAD_RET_MAUDIO_OPTION,
+   EXYNOS_PAD_RET_JTAG_OPTION,
+   EXYNOS5420_PAD_RET_GPIO_OPTION,
+   EXYNOS5420_PAD_RET_UART_OPTION,
+   EXYNOS5420_PAD_RET_MMCA_OPTION,
+   EXYNOS5420_PAD_RET_MMCB_OPTION,
+   EXYNOS5420_PAD_RET_MMCC_OPTION,
+   EXYNOS5420_PAD_RET_HSI_OPTION,
+   EXYNOS_PAD_RET_EBIA_OPTION,
+   EXYNOS_PAD_RET_EBIB_OPTION,
+   EXYNOS5420_PAD_RET_SPI_OPTION,
+   EXYNOS5420_PAD_RET_DRAM_COREBLK_OPTION,
+   REG_TABLE_END,
+};
+
 static int exynos_irq_set_wake(struct irq_data *data, unsigned int state)
 {
const struct exynos_wkup_irq *wkup_irq;
@@ -136,11 +158,22 @@ static int exynos_cpu_do_idle(void)
pr_info(Failed to suspend the system\n);
return 1; /* Aborting suspend */
 }
-
-static int exynos_cpu_suspend(unsigned long arg)
+static void exynos_flush_cache_all(void)
 {
flush_cache_all();
outer_flush_all();
+}
+
+static int exynos_cpu_suspend(unsigned long arg)
+{
+   exynos_flush_cache_all();
+   return exynos_cpu_do_idle();
+}
+
+static int exynos5420_cpu_suspend(unsigned long arg)
+{
+   exynos_flush_cache_all();
+   __raw_writel(0x0, sysram_base_addr + EXYNOS5420_CPU_STATE);
return exynos_cpu_do_idle();
 }
 
@@ -175,6 +208,50 @@ static void exynos_pm_prepare(void)
exynos_pm_enter_sleep_mode();
 }
 
+static void exynos5420_pm_prepare(void)
+{
+   unsigned int tmp;
+
+   /* Set wake-up mask registers */
+   exynos_pm_set_wakeup_mask();
+
+   s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
+
+   exynos_pmu_spare3 = pmu_raw_readl(S5P_PMU_SPARE3);
+   /*
+* The cpu state needs to be saved and restored so that the
+* secondary CPUs will enter low power start. Though the U-Boot
+* is setting the cpu state with low power flag, the kernel
+* needs to restore it back in case, the primary cpu fails to
+* suspend for any reason.
+*/
+   exynos5420_cpu_state = __raw_readl(sysram_base_addr +
+   EXYNOS5420_CPU_STATE);
+
+   exynos_pm_enter_sleep_mode();
+
+   tmp = pmu_raw_readl(EXYNOS5_ARM_L2_OPTION);
+   tmp = ~EXYNOS5_USE_RETENTION;
+   pmu_raw_writel(tmp, EXYNOS5_ARM_L2_OPTION);
+
+   tmp = pmu_raw_readl(EXYNOS5420_SFR_AXI_CGDIS1);
+   tmp |= EXYNOS5420_UFS;
+   pmu_raw_writel(tmp, EXYNOS5420_SFR_AXI_CGDIS1);
+
+   tmp = pmu_raw_readl(EXYNOS5420_ARM_COMMON_OPTION);
+   tmp = ~EXYNOS5420_L2RSTDISABLE_VALUE;
+   pmu_raw_writel(tmp, EXYNOS5420_ARM_COMMON_OPTION);
+
+   tmp = pmu_raw_readl(EXYNOS5420_FSYS2_OPTION);
+   tmp |= EXYNOS5420_EMULATION;
+   pmu_raw_writel(tmp, EXYNOS5420_FSYS2_OPTION);
+
+   tmp = pmu_raw_readl(EXYNOS5420_PSGEN_OPTION);
+   tmp |= EXYNOS5420_EMULATION;
+   pmu_raw_writel(tmp, EXYNOS5420_PSGEN_OPTION);
+}
+
+
 static int exynos_pm_suspend(void)
 {
exynos_pm_central_suspend();
@@ -185,6 +262,24 @@ static int exynos_pm_suspend(void)
return 0;
 }
 
+static int exynos5420_pm_suspend(void)
+{
+   u32 this_cluster;
+
+   exynos_pm_central_suspend();
+
+   /* Setting SEQ_OPTION register */
+
+   this_cluster = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 1);
+   if (!this_cluster)
+   pmu_raw_writel(EXYNOS5420_ARM_USE_STANDBY_WFI0,
+   S5P_CENTRAL_SEQ_OPTION);
+   else
+   pmu_raw_writel(EXYNOS5420_KFC_USE_STANDBY_WFI0,
+   S5P_CENTRAL_SEQ_OPTION);
+   return 0;
+}
+
 static void exynos_pm_release_retention(void)
 {
unsigned int i;
@@ -223,6 +318,50 @@ early_wakeup:
pmu_raw_writel(0x0, S5P_INFORM1);
 }
 
+static void exynos5420_pm_resume(void)
+{
+   unsigned long tmp;
+
+   /* Restore the CPU0 low power state register */
+   tmp = pmu_raw_readl(EXYNOS5_ARM_CORE0_SYS_PWR_REG);
+   pmu_raw_writel(tmp |

[PATCH v8 1/2] ARM: exynos5: Add PMU support for 5420

2014-09-30 Thread Vikas Sajjan

From: Abhilash Kesavan a.kesa...@samsung.com

Add intial PMU settings for exynos5420. This is required for
future S2R and Switching support.

Signed-off-by: Thomas Abraham thomas...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Vikas Sajjan vikas.saj...@samsung.com
---
 arch/arm/mach-exynos/pmu.c  |  287 +++
 arch/arm/mach-exynos/regs-pmu.h |  227 +++
 2 files changed, 514 insertions(+)

diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index b68cd29a..4110281 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -12,6 +12,8 @@
 #include linux/io.h
 #include linux/of.h
 #include linux/platform_device.h
+#include linux/delay.h
+
 
 #include exynos-pmu.h
 #include regs-pmu.h
@@ -348,6 +350,151 @@ static const struct exynos_pmu_conf 
exynos5250_pmu_config[] = {
{ PMU_TABLE_END,},
 };
 
+static struct exynos_pmu_conf exynos5420_pmu_config[] = {
+   /* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
+   { EXYNOS5_ARM_CORE0_SYS_PWR_REG,{ 0x0, 0x0, 
0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 
0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG,{ 0x0, 0x0, 
0x0} },
+   { EXYNOS5_ARM_CORE1_SYS_PWR_REG,{ 0x0, 0x0, 
0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 
0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG,{ 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_ARM_CORE2_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG,   { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_ARM_CORE3_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE3_LOCAL_SYS_PWR_REG,   { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_KFC_CORE0_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE0_LOCAL_SYS_PWR_REG,   { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_KFC_CORE1_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE1_LOCAL_SYS_PWR_REG,   { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_KFC_CORE2_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE2_LOCAL_SYS_PWR_REG,   { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_KFC_CORE3_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE3_LOCAL_SYS_PWR_REG,   { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 
0x0} },
+   { EXYNOS5_ISP_ARM_SYS_PWR_REG,  { 0x1, 0x0, 
0x0} },
+   { EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG,{ 0x1, 0x0, 
0x0} },
+   { EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG,  { 0x1, 0x0, 
0x0} },
+   { EXYNOS5420_ARM_COMMON_SYS_PWR_REG,{ 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_KFC_COMMON_SYS_PWR_REG,{ 0x0, 0x0, 
0x0} },
+   { EXYNOS5_ARM_L2_SYS_PWR_REG,   { 0x0, 0x0, 
0x0} },
+   { EXYNOS5420_KFC_L2_SYS_PWR_REG,{ 0x0, 0x0, 
0x0} },
+   { EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 
0x0} },
+   { EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 
0x1} },
+   { EXYNOS5_CMU_RESET_SYS_PWR_REG,{ 0x1, 0x1, 
0x0} },
+   { EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG,  { 0x1, 0x0, 
0x0} },
+   { EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG,  { 0x1, 0x0, 
0x1} },
+   { EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG, { 0x1, 0x1, 
0x0} },
+   { EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG,   { 0x1, 0x0, 
0x1} },
+   { EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG,{ 0x1, 0x1, 
0x1} },
+   { EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG,   { 0x1, 0x0, 
0x1} },
+   { EXYNOS5_APLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 
0x0} },
+   { EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 
0x0} },
+   { EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 
0x0} },
+   { EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x1, 
0x0} },
+   { EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 
0x0} },
+   { EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 
0x0} },
+   {

[PATCH v8 0/2] Adds PMU and S2R support for exynos5420

2014-09-30 Thread Vikas Sajjan

Rebased on
1] Kukjin Kim's tree, for-next branch
https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/log/?h=for-next
2] Pankaj Dubey's v8 PMU patchset
https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg37236.html

changes since v7:
- rebased on pankaj's latest patchset.

changes since v6:
- rebased on 3.17.rc1.

changes since v5:
- Refactored pm.c to use DT based lookup as suggested by Tomasz Figa.

changes since v4:
- Adressed comments from Tomasz figa and rebased on Pankaj Dubey's v5 
PMU patchset

changes since v3:
Addressed the following comments from Pankaj Dubey, Bartlomiej Zolnierkiewicz,
Tomasz Figa and Alim Akhtar:
- Moved EXYNOS5420_USE_STANDBY_WFI_ALL define to regs-pmu.h.
- Merged exynos5420_set_core_flag function into powerdown_conf.
- Removed XXTI_DURATION3 register setting.
- Updated the commit message and ordered the clock registers in clock
  patch.
- Removed the code for SYS_DISP1_BLK_CFG handling.
- Modified SoC checks to A9 specific checks in PM code.
- Updated some comments in the code and added macros for register 
offsets.
- Fixed code which was changing pad retention code for older SoCs.

changes since v2:
- Addressed comments from Tomasz figa
- rebased on Pankaj's V3 patchset https://lkml.org/lkml/2014/5/2/612
- dropped patch ARM: dts: Add node for GPIO keys on SMDK5420,
  will be sent separately.

changes since v1:
- Addressed comments from Tomasz figa.
- restructured/consolidated as per Tomasz figa's PM consolidations for 
exynos

Tested on Kukjin Kim's tree, for-next branch + 
1] http://www.spinics.net/lists/linux-samsung-soc/msg33750.html
2] https://lkml.org/lkml/2014/9/30/156

on Exynos5420 based chromebook (peach-pit board)

Below procedures were followed to test S2R:
Procedure A:
1. make multi_v7_defconfig 
2  enable MCPM for 5420
3. enable S3C RTC
4. pass no_console_suspend in bootargs
5. echo +20  /sys/class/rtc/rtc0/wakealarm  echo mem  
/sys/power/state
Procedure B:
1. make exynos_defconfig 
2  disable BL_SWITCHER
3. pass no_console_suspend in bootargs
4. echo +20  /sys/class/rtc/rtc0/wakealarm  echo mem  
/sys/power/state


Abhilash Kesavan (1):
  ARM: exynos5: Add PMU support for 5420

Vikas Sajjan (1):
  ARM: exynos5: Add Suspend-to-RAM support for 5420

 arch/arm/mach-exynos/pmu.c  |  287 +++
 arch/arm/mach-exynos/regs-pmu.h |  227 +++
 arch/arm/mach-exynos/suspend.c  |  156 -
 3 files changed, 668 insertions(+), 2 deletions(-)

-- 
1.7.9.5

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[PATCH 0/2] ARM: dts: Add new board dts file for Exynos3250-based Rinato board

2014-09-30 Thread Chanwoo Choi

This patchset adds new board dts file for Samsung Rinato board (Gear 2) which
is based on Exynos3250 SoC and adds sleep mode pin configuration using pinctrl
subsystem to reduce leakage power-consumption in sleep state.

This patchset is based on linux-samsung.git (for-next branch).

Chanwoo Choi (2):
  ARM: dts: Add board dts file for Exynos3250-based Rinato board
  ARM: dts: Add sleep mode pin configuration for exynos3250-rinato

 arch/arm/boot/dts/Makefile|   3 +-
 arch/arm/boot/dts/exynos3250-pinctrl.dtsi |  16 +
 arch/arm/boot/dts/exynos3250-rinato.dts   | 595 ++
 3 files changed, 613 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/exynos3250-rinato.dts

-- 
1.8.0

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[PATCH 1/2] ARM: dts: Add board dts file for Exynos3250-based Rinato board

2014-09-30 Thread Chanwoo Choi

This patch add support for device tree sources for Samsung Rinato baord
(Gear 2) based on Exynos3250 SoC.

This dts file support following features:
- eMMC
- Main PMIC (Samsung S2MPS14)
- Interface PMIC (Maxim MAX77836, MUIC, fuel-gauge, charger)
- RTC of Exynos3250
- ADC of Exynos3250 with NTC thermistor
- I2S of Exynos3250
- TMU of Exynos3250
- MFC of Exynos3250
- Secure firmware for Exynos3250 secondary cpu boot
- Serial ports of Exynos3250
- gpio-key for power key

Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Seung-Woo Kim sw0312@samsung.com
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/boot/dts/Makefile  |   3 +-
 arch/arm/boot/dts/exynos3250-rinato.dts | 441 
 2 files changed, 443 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/exynos3250-rinato.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b4f1fb1..5728918 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -64,7 +64,8 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \
 dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
da850-evm.dtb
 dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb
-dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
+dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-rinato.dtb \
+   exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
exynos4210-trats.dtb \
exynos4210-universal_c210.dtb \
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts 
b/arch/arm/boot/dts/exynos3250-rinato.dts
new file mode 100644
index 000..f23b8d2
--- /dev/null
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -0,0 +1,441 @@
+/*
+ * Samsung's Exynos3250 based Rinato board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Device tree source file for Samsung's Rinato board which is based on
+ * Samsung Exynos3250 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+#include exynos3250.dtsi
+#include dt-bindings/input/input.h
+
+/ {
+   model = Samsung Rinato board;
+   compatible = samsung,rinato, samsung,exynos3250, samsung,exynos3;
+
+   aliases {
+   i2c7 = i2c_max77836;
+   };
+
+   memory {
+   reg =  0x4000 0x0800
+   0x4800 0x0800
+   0x5000 0x0800
+   0x5800 0x07F0;
+   };
+
+   chosen {
+   bootargs = console=ttySAC1,115200N8 root=/dev/mmcblk0p15 
rootwait earlyprintk panic=5;
+   };
+
+   firmware@0205F000 {
+   compatible = samsung,secure-firmware;
+   reg = 0x0205F000 0x1000;
+   } ;
+
+   gpio_keys {
+   compatible = gpio-keys;
+
+   power_key {
+   interrupt-parent = gpx2;
+   interrupts = 7 0;
+   gpios = gpx2 7 1;
+   linux,code = KEY_POWER;
+   label = power key;
+   debounce-interval = 10;
+   gpio-key,wakeup;
+   };
+   };
+
+   regulators { 
+   compatible = simple-bus;
+   #address-cells = 1;
+   #size-cells = 0;
+
+   vemmc_reg: voltage-regulator-0 {
+   compatible = regulator-fixed;
+   regulator-name = V_EMMC_2.8V-fixed;
+   regulator-min-microvolt = 280;
+   regulator-max-microvolt = 280;
+   gpio = gpk0 2 0;
+   enable-active-high;
+   };
+   };
+
+   i2c_max77836: i2c-gpio-0 {
+   compatible = i2c-gpio;
+   gpios = gpd0 2 0, gpd0 3 0;
+   #address-cells = 1;
+   #size-cells = 0;
+
+   max77836: subpmic@25 {
+   compatible = maxim,max77836;
+   interrupt-parent = gpx1;
+   interrupts = 5 0;
+   reg = 0x25;
+   wakeup;
+
+   muic: max77836-muic {
+   compatible = maxim,max77836-muic;
+   };
+
+   regulators {
+   compatible = maxim,max77836-regulator;
+   safeout_reg: SAFEOUT {
+   regulator-name = SAFEOUT;
+   };
+
+   charger_reg: CHARGER {
+   regulator-name = CHARGER;
+   regulator-min-microamp = 45000;

Re: [PATCH] drm/exynos: remove ifdeferry from initialization code

2014-09-30 Thread Andrzej Hajda

Hi Inki,

Gently ping.

Andrzej

On 09/10/2014 01:53 PM, Andrzej Hajda wrote:
 The patch replaces separate calls to driver (de)registration by
 loops over the array of drivers. As a result it significantly
 decreases number of ifdefs. Additionally it moves device registration
 related ifdefs to header file.

 Signed-off-by: Andrzej Hajda a.ha...@samsung.com
 ---
 Hi Inki,

 During testing your component match support patch [1] I have prepared patch
 removing most ifdefs from exynos_drm_drv.c. It is based on your patch, but
 I can rebase it if necessary.

 [1]: http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/37031

 Regards
 Andrzej
 ---
  drivers/gpu/drm/exynos/exynos_drm_drv.c | 170 
 +++-
  drivers/gpu/drm/exynos/exynos_drm_drv.h |  25 +++--
  2 files changed, 48 insertions(+), 147 deletions(-)

 diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
 b/drivers/gpu/drm/exynos/exynos_drm_drv.c
 index b2c710a..a660e46 100644
 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
 +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
 @@ -553,74 +553,54 @@ static const struct component_master_ops exynos_drm_ops 
 = {
   .unbind = exynos_drm_unbind,
  };
  
 -static int exynos_drm_platform_probe(struct platform_device *pdev)
 -{
 - struct component_match *match;
 - int ret;
 -
 - pdev-dev.coherent_dma_mask = DMA_BIT_MASK(32);
 - exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls);
 -
 +static struct platform_driver * const exynos_drm_drivers[] = {
  #ifdef CONFIG_DRM_EXYNOS_FIMD
 - ret = platform_driver_register(fimd_driver);
 - if (ret  0)
 - return ret;
 + fimd_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_DP
 - ret = platform_driver_register(dp_driver);
 - if (ret  0)
 - goto err_unregister_fimd_drv;
 + dp_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_DSI
 - ret = platform_driver_register(dsi_driver);
 - if (ret  0)
 - goto err_unregister_dp_drv;
 + dsi_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_HDMI
 - ret = platform_driver_register(mixer_driver);
 - if (ret  0)
 - goto err_unregister_dsi_drv;
 - ret = platform_driver_register(hdmi_driver);
 - if (ret  0)
 - goto err_unregister_mixer_drv;
 + mixer_driver,
 + hdmi_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_G2D
 - ret = platform_driver_register(g2d_driver);
 - if (ret  0)
 - goto err_unregister_hdmi_drv;
 + g2d_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_FIMC
 - ret = platform_driver_register(fimc_driver);
 - if (ret  0)
 - goto err_unregister_g2d_drv;
 + fimc_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_ROTATOR
 - ret = platform_driver_register(rotator_driver);
 - if (ret  0)
 - goto err_unregister_fimc_drv;
 + rotator_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_GSC
 - ret = platform_driver_register(gsc_driver);
 - if (ret  0)
 - goto err_unregister_rotator_drv;
 + gsc_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_IPP
 - ret = platform_driver_register(ipp_driver);
 - if (ret  0)
 - goto err_unregister_gsc_drv;
 + ipp_driver,
 +#endif
 +};
 +
 +static int exynos_drm_platform_probe(struct platform_device *pdev)
 +{
 + struct component_match *match;
 + int ret, i;
 +
 + pdev-dev.coherent_dma_mask = DMA_BIT_MASK(32);
 + exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls);
 +
 + for (i = 0; i  ARRAY_SIZE(exynos_drm_drivers); ++i) {
 + ret = platform_driver_register(exynos_drm_drivers[i]);
 + if (ret  0)
 + goto err_unregister_drivers;
 + }
  
   ret = exynos_platform_device_ipp_register();
   if (ret  0)
 - goto err_unregister_ipp_drv;
 -#endif
 + goto err_unregister_drivers;
  
   match = exynos_drm_match_add(pdev-dev);
   if (IS_ERR(match)) {
 @@ -632,96 +612,24 @@ static int exynos_drm_platform_probe(struct 
 platform_device *pdev)
   match);
  
  err_unregister_ipp_dev:
 -
 -#ifdef CONFIG_DRM_EXYNOS_IPP
   exynos_platform_device_ipp_unregister();
 -err_unregister_ipp_drv:
 - platform_driver_unregister(ipp_driver);
 -err_unregister_gsc_drv:
 -#endif
  
 -#ifdef CONFIG_DRM_EXYNOS_GSC
 - platform_driver_unregister(gsc_driver);
 -err_unregister_rotator_drv:
 -#endif
 +err_unregister_drivers:
 + while (--i = 0)
 + platform_driver_unregister(exynos_drm_drivers[i]);
  
 -#ifdef CONFIG_DRM_EXYNOS_ROTATOR
 - platform_driver_unregister(rotator_driver);
 -err_unregister_fimc_drv:
 -#endif
 -
 -#ifdef CONFIG_DRM_EXYNOS_FIMC
 - platform_driver_unregister(fimc_driver);
 -err_unregister_g2d_drv:
 -#endif
 -
 -#ifdef CONFIG_DRM_EXYNOS_G2D
 - platform_driver_unregister(g2d_driver);
 -err_unregister_hdmi_drv:
 -#endif
 -
 -#ifdef CONFIG_DRM_EXYNOS_HDMI
 -

Re: [PATCH v8 0/2] Adds PMU and S2R support for exynos5420

2014-09-30 Thread Javier Martinez Canillas

Hello Vikas,

Thanks a lot for the re-spin.

On Tue, Sep 30, 2014 at 1:02 PM, Vikas Sajjan vikas.saj...@samsung.com wrote:

 Tested on Kukjin Kim's tree, for-next branch +
 1] http://www.spinics.net/lists/linux-samsung-soc/msg33750.html
 2] https://lkml.org/lkml/2014/9/30/156

I wanted to test your series but I noticed that Abhilash's patch:

[PATCH v7] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420

does not apply cleanly on Kukjin's for-next branch. I see that all the
dependencies mentioned (modulo $subject or course) have already been
merged though.

Did you rebase Abhilash's to test your series?. I can forward port as
well but just want to be sure that I'm not missing any other
dependency.

These are the patches I've on top of Kukjin's for-next branch fyi:

663dfa7 ARM: exynos5: Add Suspend-to-RAM support for 5420
b4b3b76 ARM: exynos5: Add PMU support for 5420
6c0e381 ARM: EXYNOS: Move PMU specific definitions from common.h
cdf79fe ARM: EXYNOS: Add platform driver support for Exynos PMU
d2d8bc6 mfd: syscon: Decouple syscon interface from platform devices

Best regards,
Javier
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Re: [PATCH v8 0/2] Adds PMU and S2R support for exynos5420

Hi Javier,

On Tue, Sep 30, 2014 at 7:00 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
 Hello Vikas,

 Thanks a lot for the re-spin.

 On Tue, Sep 30, 2014 at 1:02 PM, Vikas Sajjan vikas.saj...@samsung.com 
 wrote:

 Tested on Kukjin Kim's tree, for-next branch +
 1] http://www.spinics.net/lists/linux-samsung-soc/msg33750.html
 2] https://lkml.org/lkml/2014/9/30/156

 I wanted to test your series but I noticed that Abhilash's patch:

 [PATCH v7] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420

 does not apply cleanly on Kukjin's for-next branch. I see that all the
 dependencies mentioned (modulo $subject or course) have already been
 merged though.

If you are looking to test this series right now then I can post an
untested rebased version. Otherwise, I will test it tomorrow and post.

Regards,
Abhilash

 Did you rebase Abhilash's to test your series?. I can forward port as
 well but just want to be sure that I'm not missing any other
 dependency.

 These are the patches I've on top of Kukjin's for-next branch fyi:

 663dfa7 ARM: exynos5: Add Suspend-to-RAM support for 5420
 b4b3b76 ARM: exynos5: Add PMU support for 5420
 6c0e381 ARM: EXYNOS: Move PMU specific definitions from common.h
 cdf79fe ARM: EXYNOS: Add platform driver support for Exynos PMU
 d2d8bc6 mfd: syscon: Decouple syscon interface from platform devices

 Best regards,
 Javier

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Re: [PATCH v3 3/6] pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts

Hi Tomasz,

On Tue, Sep 30, 2014 at 4:16 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
 Hi Abhilash,

 Just two minor issues inline. I leave them up to Linus to decide.

 Linus, if you don't mind them, feel free to apply this patch with my Ack.

 On 29.09.2014 07:15, Abhilash Kesavan wrote:
 Exynos7 uses different offsets for wakeup interrupt configuration registers.
 So a new irq_chip instance for Exynos7 wakeup interrupts is added. The 
 irq_chip
 selection is now based on the wakeup interrupt controller compatible string.

 [snip]

 @@ -469,12 +488,18 @@ static int exynos_eint_wkup_init(struct 
 samsung_pinctrl_drv_data *d)
   struct samsung_pin_bank *bank;
   struct exynos_weint_data *weint_data;
   struct exynos_muxed_weint_data *muxed_data;
 + struct exynos_irq_chip *exynos_wkup_irq_chip;

 Quite an awful name for a local variable. irq_chip alone would be enough.

   unsigned int muxed_banks = 0;
   unsigned int i;
   int idx, irq;

   for_each_child_of_node(dev-of_node, np) {
 - if (of_match_node(exynos_wkup_irq_ids, np)) {
 + const struct of_device_id *match;
 +
 + match = of_match_node(exynos_wkup_irq_ids, np);
 + if (match) {
 + exynos_wkup_irq_chip = kmemdup(match-data,
 + sizeof(struct exynos_irq_chip), GFP_KERNEL);

 sizeof(*exynos_wkup_irq_chip) (or irq_chip considering my comment above)
 could be used instead.

Thanks for the acks. Will post a new version with these nits fixed.

 Best regards,
 Tomasz

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[PATCH v4 2/6] pinctrl: exynos: Consolidate irq domain callbacks

Adding a irq_chip field to the samsung_pin_bank struct helps in
consolidating the irq domain callbacks for external gpio and wakeup
interrupt controllers. The exynos_wkup_irqd_ops and exynos_gpio_irqd_ops
have now been merged into a single exynos_eint_irqd_ops.

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Tested-by: Thomas Abraham thomas...@samsung.com
Acked-by: Tomasz Figa tomasz.f...@gmail.com
Cc: Linus Walleij linus.wall...@linaro.org
---
 drivers/pinctrl/samsung/pinctrl-exynos.c |   32 ++
 1 file changed, 6 insertions(+), 26 deletions(-)

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c 
b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 14b9b44..54ebcb6 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -254,7 +254,7 @@ static struct exynos_irq_chip exynos_gpio_irq_chip = {
.eint_pend = EXYNOS_GPIO_EPEND_OFFSET,
 };
 
-static int exynos_gpio_irq_map(struct irq_domain *h, unsigned int virq,
+static int exynos_eint_irq_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
 {
struct samsung_pin_bank *b = h-host_data;
@@ -267,10 +267,10 @@ static int exynos_gpio_irq_map(struct irq_domain *h, 
unsigned int virq,
 }
 
 /*
- * irq domain callbacks for external gpio interrupt controller.
+ * irq domain callbacks for external gpio and wakeup interrupt controllers.
  */
-static const struct irq_domain_ops exynos_gpio_irqd_ops = {
-   .map= exynos_gpio_irq_map,
+static const struct irq_domain_ops exynos_eint_irqd_ops = {
+   .map= exynos_eint_irq_map,
.xlate  = irq_domain_xlate_twocell,
 };
 
@@ -330,7 +330,7 @@ static int exynos_eint_gpio_init(struct 
samsung_pinctrl_drv_data *d)
if (bank-eint_type != EINT_TYPE_GPIO)
continue;
bank-irq_domain = irq_domain_add_linear(bank-of_node,
-   bank-nr_pins, exynos_gpio_irqd_ops, bank);
+   bank-nr_pins, exynos_eint_irqd_ops, bank);
if (!bank-irq_domain) {
dev_err(dev, gpio irq domain add failed\n);
ret = -ENXIO;
@@ -457,26 +457,6 @@ static void exynos_irq_demux_eint16_31(unsigned int irq, 
struct irq_desc *desc)
chained_irq_exit(chip, desc);
 }
 
-static int exynos_wkup_irq_map(struct irq_domain *h, unsigned int virq,
-   irq_hw_number_t hw)
-{
-   struct samsung_pin_bank *b = h-host_data;
-
-   irq_set_chip_and_handler(virq, b-irq_chip-chip,
-   handle_level_irq);
-   irq_set_chip_data(virq, h-host_data);
-   set_irq_flags(virq, IRQF_VALID);
-   return 0;
-}
-
-/*
- * irq domain callbacks for external wakeup interrupt controller.
- */
-static const struct irq_domain_ops exynos_wkup_irqd_ops = {
-   .map= exynos_wkup_irq_map,
-   .xlate  = irq_domain_xlate_twocell,
-};
-
 /*
  * exynos_eint_wkup_init() - setup handling of external wakeup interrupts.
  * @d: driver data of samsung pinctrl driver.
@@ -508,7 +488,7 @@ static int exynos_eint_wkup_init(struct 
samsung_pinctrl_drv_data *d)
continue;
 
bank-irq_domain = irq_domain_add_linear(bank-of_node,
-   bank-nr_pins, exynos_wkup_irqd_ops, bank);
+   bank-nr_pins, exynos_eint_irqd_ops, bank);
if (!bank-irq_domain) {
dev_err(dev, wkup irq domain add failed\n);
return -ENXIO;
-- 
1.7.9.5

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[PATCH v4 1/6] pinctrl: exynos: Generalize the eint16_31 demux code

The function exynos_irq_demux_eint16_31 uses pre-defined offsets for external
interrupt pending status and mask registers. So this function is not extensible
for Exynos7 SoC which has these registers at different offsets. Generalize
the exynos_irq_demux_eint16_31 function by using the pending/mask register
offset values from the exynos_irq_chip structure. This is done by adding a
irq_chip field to the samsung_pin_bank struct.

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Tested-by: Thomas Abraham thomas...@samsung.com
Acked-by: Tomasz Figa tomasz.f...@gmail.com
Cc: Linus Walleij linus.wall...@linaro.org
---
 drivers/pinctrl/samsung/pinctrl-exynos.c  |   14 ++
 drivers/pinctrl/samsung/pinctrl-samsung.h |2 ++
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c 
b/drivers/pinctrl/samsung/pinctrl-exynos.c
index d7154ed..14b9b44 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -260,7 +260,7 @@ static int exynos_gpio_irq_map(struct irq_domain *h, 
unsigned int virq,
struct samsung_pin_bank *b = h-host_data;
 
irq_set_chip_data(virq, b);
-   irq_set_chip_and_handler(virq, exynos_gpio_irq_chip.chip,
+   irq_set_chip_and_handler(virq, b-irq_chip-chip,
handle_level_irq);
set_irq_flags(virq, IRQF_VALID);
return 0;
@@ -344,6 +344,8 @@ static int exynos_eint_gpio_init(struct 
samsung_pinctrl_drv_data *d)
ret = -ENOMEM;
goto err_domains;
}
+
+   bank-irq_chip = exynos_gpio_irq_chip;
}
 
return 0;
@@ -445,9 +447,9 @@ static void exynos_irq_demux_eint16_31(unsigned int irq, 
struct irq_desc *desc)
 
for (i = 0; i  eintd-nr_banks; ++i) {
struct samsung_pin_bank *b = eintd-banks[i];
-   pend = readl(d-virt_base + EXYNOS_WKUP_EPEND_OFFSET
+   pend = readl(d-virt_base + b-irq_chip-eint_pend
+ b-eint_offset);
-   mask = readl(d-virt_base + EXYNOS_WKUP_EMASK_OFFSET
+   mask = readl(d-virt_base + b-irq_chip-eint_mask
+ b-eint_offset);
exynos_irq_demux_eint(pend  ~mask, b-irq_domain);
}
@@ -458,7 +460,9 @@ static void exynos_irq_demux_eint16_31(unsigned int irq, 
struct irq_desc *desc)
 static int exynos_wkup_irq_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
 {
-   irq_set_chip_and_handler(virq, exynos_wkup_irq_chip.chip,
+   struct samsung_pin_bank *b = h-host_data;
+
+   irq_set_chip_and_handler(virq, b-irq_chip-chip,
handle_level_irq);
irq_set_chip_data(virq, h-host_data);
set_irq_flags(virq, IRQF_VALID);
@@ -510,6 +514,8 @@ static int exynos_eint_wkup_init(struct 
samsung_pinctrl_drv_data *d)
return -ENXIO;
}
 
+   bank-irq_chip = exynos_wkup_irq_chip;
+
if (!of_find_property(bank-of_node, interrupts, NULL)) {
bank-eint_type = EINT_TYPE_WKUP_MUX;
++muxed_banks;
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h 
b/drivers/pinctrl/samsung/pinctrl-samsung.h
index 5cedc9d..d2c38c8 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -127,6 +127,7 @@ struct samsung_pin_bank_type {
  * @irq_domain: IRQ domain of the bank.
  * @gpio_chip: GPIO chip of the bank.
  * @grange: linux gpio pin range supported by this bank.
+ * @irq_chip: link to irq chip for external gpio and wakeup interrupts.
  * @slock: spinlock protecting bank registers
  * @pm_save: saved register values during suspend
  */
@@ -146,6 +147,7 @@ struct samsung_pin_bank {
struct irq_domain *irq_domain;
struct gpio_chip gpio_chip;
struct pinctrl_gpio_range grange;
+   struct exynos_irq_chip *irq_chip;
spinlock_t slock;
 
u32 pm_save[PINCFG_TYPE_NUM + 1]; /* +1 to handle double CON registers*/
-- 
1.7.9.5

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[PATCH v4 3/6] pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts

Exynos7 uses different offsets for wakeup interrupt configuration registers.
So a new irq_chip instance for Exynos7 wakeup interrupts is added. The irq_chip
selection is now based on the wakeup interrupt controller compatible string.

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Tested-by: Thomas Abraham thomas...@samsung.com
Acked-by: Tomasz Figa tomasz.f...@gmail.com
Cc: Linus Walleij linus.wall...@linaro.org
---
 .../bindings/pinctrl/samsung-pinctrl.txt   |2 +
 drivers/pinctrl/samsung/pinctrl-exynos.c   |   45 +++-
 drivers/pinctrl/samsung/pinctrl-exynos.h   |3 ++
 3 files changed, 40 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt 
b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index e82aaf4..f80519a 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -136,6 +136,8 @@ B. External Wakeup Interrupts: For supporting external 
wakeup interrupts, a
found on Samsung S3C64xx SoCs,
  - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.
+ - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller
+   found on Samsung Exynos7 SoC.
- interrupt-parent: phandle of the interrupt parent to which the external
  wakeup interrupts are forwarded to.
- interrupts: interrupt used by multiplexed wakeup interrupts.
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c 
b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 54ebcb6..771e821 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -56,12 +56,6 @@ static struct samsung_pin_bank_type bank_type_alive = {
.reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
 };
 
-/* list of external wakeup controllers supported */
-static const struct of_device_id exynos_wkup_irq_ids[] = {
-   { .compatible = samsung,exynos4210-wakeup-eint, },
-   { }
-};
-
 static void exynos_irq_mask(struct irq_data *irqd)
 {
struct irq_chip *chip = irq_data_get_irq_chip(irqd);
@@ -385,9 +379,9 @@ static int exynos_wkup_irq_set_wake(struct irq_data *irqd, 
unsigned int on)
 /*
  * irq_chip for wakeup interrupts
  */
-static struct exynos_irq_chip exynos_wkup_irq_chip = {
+static struct exynos_irq_chip exynos4210_wkup_irq_chip __initdata = {
.chip = {
-   .name = exynos_wkup_irq_chip,
+   .name = exynos4210_wkup_irq_chip,
.irq_unmask = exynos_irq_unmask,
.irq_mask = exynos_irq_mask,
.irq_ack = exynos_irq_ack,
@@ -401,6 +395,31 @@ static struct exynos_irq_chip exynos_wkup_irq_chip = {
.eint_pend = EXYNOS_WKUP_EPEND_OFFSET,
 };
 
+static struct exynos_irq_chip exynos7_wkup_irq_chip __initdata = {
+   .chip = {
+   .name = exynos7_wkup_irq_chip,
+   .irq_unmask = exynos_irq_unmask,
+   .irq_mask = exynos_irq_mask,
+   .irq_ack = exynos_irq_ack,
+   .irq_set_type = exynos_irq_set_type,
+   .irq_set_wake = exynos_wkup_irq_set_wake,
+   .irq_request_resources = exynos_irq_request_resources,
+   .irq_release_resources = exynos_irq_release_resources,
+   },
+   .eint_con = EXYNOS7_WKUP_ECON_OFFSET,
+   .eint_mask = EXYNOS7_WKUP_EMASK_OFFSET,
+   .eint_pend = EXYNOS7_WKUP_EPEND_OFFSET,
+};
+
+/* list of external wakeup controllers supported */
+static const struct of_device_id exynos_wkup_irq_ids[] = {
+   { .compatible = samsung,exynos4210-wakeup-eint,
+   .data = exynos4210_wkup_irq_chip },
+   { .compatible = samsung,exynos7-wakeup-eint,
+   .data = exynos7_wkup_irq_chip },
+   { }
+};
+
 /* interrupt handler for wakeup interrupts 0..15 */
 static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
 {
@@ -469,12 +488,18 @@ static int exynos_eint_wkup_init(struct 
samsung_pinctrl_drv_data *d)
struct samsung_pin_bank *bank;
struct exynos_weint_data *weint_data;
struct exynos_muxed_weint_data *muxed_data;
+   struct exynos_irq_chip *irq_chip;
unsigned int muxed_banks = 0;
unsigned int i;
int idx, irq;
 
for_each_child_of_node(dev-of_node, np) {
-   if (of_match_node(exynos_wkup_irq_ids, np)) {
+   const struct of_device_id *match;
+
+   match = of_match_node(exynos_wkup_irq_ids, np);
+   if (match) {
+   irq_chip = kmemdup(match-data,
+   sizeof(*irq_chip), GFP_KERNEL);
wkup_np = np;
break;
}
@@ -494,7 +519,7 @@ static int exynos_eint_wkup_init(struct

[PATCH 1/2] tty: serial: samsung: Clean-up selection of number of available UARTs

Remove symbols SERIAL_SAMSUNG_UARTS_4 and SERIAL_SAMSUNG_UARTS which
select the number of UART ports available on the SoC. Use the maximum
number of UART ports possible across the serial driver in place of
SERIAL_SAMSUNG_UARTS. Removal of these symbols also helps in Exynos7
serial enablement.

Signed-off-by: Abhilasih Kesavan a.kesa...@samsung.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
---
Build tested using s3c2410_defconfig, s3c6400_defconfig, exynos_defconfig
and arm64's defconfig with and without the serial driver enabled. Boot tested
on Exynos5420 and Exynos7.

 drivers/tty/serial/Kconfig   |   16 
 drivers/tty/serial/samsung.c |   11 +++
 drivers/tty/serial/samsung.h |5 -
 3 files changed, 7 insertions(+), 25 deletions(-)

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 81f6ee7..9fc9092 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -247,22 +247,6 @@ config SERIAL_SAMSUNG
  provide all of these ports, depending on how the serial port
  pins are configured.
 
-config SERIAL_SAMSUNG_UARTS_4
-   bool
-   depends on PLAT_SAMSUNG
-   default y if !(CPU_S3C2410 || CPU_S3C2412 || CPU_S3C2440 || CPU_S3C2442)
-   help
- Internal node for the common case of 4 Samsung compatible UARTs
-
-config SERIAL_SAMSUNG_UARTS
-   int
-   depends on PLAT_SAMSUNG
-   default 4 if SERIAL_SAMSUNG_UARTS_4 || CPU_S3C2416
-   default 3
-   help
- Select the number of available UART ports for the Samsung S3C
- serial driver
-   
 config SERIAL_SAMSUNG_DEBUG
bool Samsung SoC serial debug
depends on SERIAL_SAMSUNG  DEBUG_LL
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index c78f43a..ba04c6d 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -962,14 +962,14 @@ static struct uart_ops s3c24xx_serial_ops = {
 static struct uart_driver s3c24xx_uart_drv = {
.owner  = THIS_MODULE,
.driver_name= s3c2410_serial,
-   .nr = CONFIG_SERIAL_SAMSUNG_UARTS,
+   .nr = MAX_SAMSUNG_UARTS,
.cons   = S3C24XX_SERIAL_CONSOLE,
.dev_name   = S3C24XX_SERIAL_NAME,
.major  = S3C24XX_SERIAL_MAJOR,
.minor  = S3C24XX_SERIAL_MINOR,
 };
 
-static struct s3c24xx_uart_port 
s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS] = {
+static struct s3c24xx_uart_port s3c24xx_serial_ports[MAX_SAMSUNG_UARTS] = {
[0] = {
.port = {
.lock   = 
__SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[0].port.lock),
@@ -992,8 +992,6 @@ static struct s3c24xx_uart_port 
s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS
.line   = 1,
}
},
-#if CONFIG_SERIAL_SAMSUNG_UARTS  2
-
[2] = {
.port = {
.lock   = 
__SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[2].port.lock),
@@ -1005,8 +1003,6 @@ static struct s3c24xx_uart_port 
s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS
.line   = 2,
}
},
-#endif
-#if CONFIG_SERIAL_SAMSUNG_UARTS  3
[3] = {
.port = {
.lock   = 
__SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[3].port.lock),
@@ -1018,7 +1014,6 @@ static struct s3c24xx_uart_port 
s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS
.line   = 3,
}
}
-#endif
 };
 
 /* s3c24xx_serial_resetport
@@ -1590,7 +1585,7 @@ s3c24xx_serial_console_setup(struct console *co, char 
*options)
 
/* is this a valid port */
 
-   if (co-index == -1 || co-index = CONFIG_SERIAL_SAMSUNG_UARTS)
+   if (co-index == -1 || co-index = MAX_SAMSUNG_UARTS)
co-index = 0;
 
port = s3c24xx_serial_ports[co-index].port;
diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h
index eb071dd..484b49e 100644
--- a/drivers/tty/serial/samsung.h
+++ b/drivers/tty/serial/samsung.h
@@ -1,6 +1,9 @@
 #ifndef __SAMSUNG_H
 #define __SAMSUNG_H
 
+/* Maximum UART ports available */
+#define MAX_SAMSUNG_UARTS   4
+
 /*
  * Driver for Samsung SoC onboard UARTs.
  *
@@ -38,7 +41,7 @@ struct s3c24xx_uart_info {
 struct s3c24xx_serial_drv_data {
struct s3c24xx_uart_info*info;
struct s3c2410_uartcfg  *def_cfg;
-   unsigned intfifosize[CONFIG_SERIAL_SAMSUNG_UARTS];
+   unsigned intfifosize[MAX_SAMSUNG_UARTS];
 };
 
 struct s3c24xx_uart_port {
-- 
1.7.9.5

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[PATCH v4 0/6] Add initial support for pinctrl on Exynos7

Changes since v3:
- Changed variable name from exynos_wkup_irq_chip to irq_chip
- Added acked-by tag from Tomasz Figa

Changes since v2:
- Added a .irq_chip field to the samsung_pin_bank struct
- Consolidated the wakeup and gpio irqd_ops

Changes since v1:
- Marked the newly created irq_chip instances as __initdata
- Used kmemdup to keep a copy of the irq_chip
- Change the pinctrl name from sd0_rdqs to sd0_ds as per UM
- Moved the pinctrl enablement for exynos7 into a separate patch
- Added tested-by and reviewed-by tags from Thomas Abraham

Following patches have been tested on linux-next (20140926).
https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/
 
Following patches are required for this series:
1) tty/serial: fix config dependencies for samsung serial
   https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg36208.html
2) dts, kbuild: Implement support for dtb vendor subdirs patchset 
   http://comments.gmane.org/gmane.linux.kbuild.devel/12131
3) arch: arm64: enable support for Samsung Exynos7 SoC patchset (v5)
   http://www.spinics.net/lists/arm-kernel/msg364014.html

Abhilash Kesavan (3):
  pinctrl: exynos: Generalize the eint16_31 demux code
  pinctrl: exynos: Consolidate irq domain callbacks
  pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts

Naveen Krishna Ch (3):
  pinctrl: exynos: Add initial driver data for Exynos7
  arm64: dts: Add initial pinctrl support to EXYNOS7
  arm64: exynos: Enable pinctrl support for Exynos7

 .../bindings/pinctrl/samsung-pinctrl.txt   |3 +
 arch/arm64/Kconfig |2 +
 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi|  560 
 arch/arm64/boot/dts/exynos/exynos7.dtsi|   66 +++
 drivers/pinctrl/samsung/pinctrl-exynos.c   |  196 +--
 drivers/pinctrl/samsung/pinctrl-exynos.h   |3 +
 drivers/pinctrl/samsung/pinctrl-samsung.c  |2 +
 drivers/pinctrl/samsung/pinctrl-samsung.h  |3 +
 8 files changed, 799 insertions(+), 36 deletions(-)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi

-- 
1.7.9.5

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[PATCH 2/2] arch: arm: samsung: Clean-up usage of CONFIG_SERIAL_SAMSUNG_UARTS symbol

Remove usage of CONFIG_SERIAL_SAMSUNG_UARTS symbol from platform
specific code.

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
 arch/arm/mach-s3c64xx/irq-pm.c |6 +++---
 arch/arm/plat-samsung/init.c   |6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c
index ae4ea76..b20024e 100644
--- a/arch/arm/mach-s3c64xx/irq-pm.c
+++ b/arch/arm/mach-s3c64xx/irq-pm.c
@@ -55,10 +55,10 @@ static struct irq_grp_save {
u32 mask;
 } eint_grp_save[5];
 
-#ifndef CONFIG_SERIAL_SAMSUNG_UARTS
-#define SERIAL_SAMSUNG_UARTS 0
+#ifndef CONFIG_SERIAL_SAMSUNG
+#define SERIAL_SAMSUNG_UARTS   0
 #else
-#defineSERIAL_SAMSUNG_UARTS CONFIG_SERIAL_SAMSUNG_UARTS
+#define SERIAL_SAMSUNG_UARTS   4
 #endif
 
 static u32 irq_uart_mask[SERIAL_SAMSUNG_UARTS];
diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c
index 11fbbc2..03cafe9 100644
--- a/arch/arm/plat-samsung/init.c
+++ b/arch/arm/plat-samsung/init.c
@@ -93,8 +93,8 @@ void __init s3c24xx_init_clocks(int xtal)
 #if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
 static int nr_uarts __initdata = 0;
 
-#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
-static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS];
+#ifdef CONFIG_SERIAL_SAMSUNG
+static struct s3c2410_uartcfg uart_cfgs[4];
 #endif
 
 /* s3c24xx_init_uartdevs
@@ -110,7 +110,7 @@ void __init s3c24xx_init_uartdevs(char *name,
  struct s3c24xx_uart_resources *res,
  struct s3c2410_uartcfg *cfg, int no)
 {
-#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
+#ifdef CONFIG_SERIAL_SAMSUNG
struct platform_device *platdev;
struct s3c2410_uartcfg *cfgptr = uart_cfgs;
struct s3c24xx_uart_resources *resp;
-- 
1.7.9.5

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[PATCH v4 6/6] arm64: exynos: Enable pinctrl support for Exynos7

From: Naveen Krishna Ch naveenkrishna...@gmail.com

Enable pinctrl support for exynos7 SoCs.

Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Tested-by: Thomas Abraham thomas...@samsung.com
Acked-by: Tomasz Figa tomasz.f...@gmail.com
Cc: Rob Herring r...@kernel.org
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Linus Walleij linus.wall...@linaro.org
---
 arch/arm64/Kconfig |2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 5285f9c..e8ddd84 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -145,6 +145,8 @@ config ARCH_EXYNOS7
bool ARMv8 based Samsung Exynos7
select ARCH_EXYNOS
select COMMON_CLK_SAMSUNG
+   select PINCTRL
+   select PINCTRL_EXYNOS
help
  This enables support for Samsung Exynos7 SoC family
 
-- 
1.7.9.5

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Re: [PATCH] serial: samsung: Fix serial config dependencies for exynos7

Hi Tomasz,

On Tue, Sep 30, 2014 at 4:08 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
 Hi Abhilash,

 The patch itself seems fine, but I wonder if those config options aren't
 really just leftovers from the past and couldn't be completely removed.

 On 29.09.2014 07:16, Abhilash Kesavan wrote:
 From: Pankaj Dubey pankaj.du...@samsung.com

 Exynos7 has a similar serial controller to that present in older Samsung
 SoCs. To re-use the existing serial driver on Exynos7 we need to have
 SERIAL_SAMSUNG_UARTS_4 and SERIAL_SAMSUNG_UARTS selected. This is not
 possible because these symbols are dependent on PLAT_SAMSUNG which is
 not present for the ARMv8 based exynos7.

 Change the dependency of these symbols from PLAT_SAMSUNG to the serial
 driver thus making it available on exynos7. As the existing platform
 specific code making use of these symbols is related to uart driver this
 change in dependency should not cause any issues.

 Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
 Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
 Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
 Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
 ---
 Build tested with s3c6400_defconfig, exynos_defconfig and arm64's defconfig
 with and without the serial driver enabled.

  drivers/tty/serial/Kconfig |4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

 diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
 index 81f6ee7..e6c0bcb 100644
 --- a/drivers/tty/serial/Kconfig
 +++ b/drivers/tty/serial/Kconfig
 @@ -249,14 +249,14 @@ config SERIAL_SAMSUNG

  config SERIAL_SAMSUNG_UARTS_4
   bool
 - depends on PLAT_SAMSUNG
 + depends on SERIAL_SAMSUNG
   default y if !(CPU_S3C2410 || CPU_S3C2412 || CPU_S3C2440 || 
 CPU_S3C2442)
   help
 Internal node for the common case of 4 Samsung compatible UARTs

 The only place where this symbol is used is below.


  config SERIAL_SAMSUNG_UARTS
   int
 - depends on PLAT_SAMSUNG
 + depends on SERIAL_SAMSUNG
   default 4 if SERIAL_SAMSUNG_UARTS_4 || CPU_S3C2416
   default 3
   help


 With this symbol the situation isn't that easy, but still should be
 manageable.

 Looking at the serial-samsung driver, all occurrences of
 CONFIG_SERIAL_SAMSUNG_UARTS could be simply replaced with a locally
 defined number equal to the maximum value - in this case 4.

 There are also two places in arch/arm where this symbol is used:

 1) In arch/arm/mach-s3c64xx/irq-pm.c it's used as the number of serial
 ports which need suspend/resume handling. Since on s3c64xx the number is
 always 4, it can be simply defined locally as a constant.

 2) In arch/arm/plat-samsung/init.c it is used to determine size of a
 static array of UART ports and to check whether the UART driver is
 enabled. In former case I believe it should be safe to hardcode it to 4
 as well, in latter CONFIG_SERIAL_SAMSUNG can be used.

I will post patches removing these two symbols.

Regards,
Abhilash

 Best regards,
 Tomasz
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Re: [PATCH v8 0/2] Adds PMU and S2R support for exynos5420

2014-09-30 Thread Javier Martinez Canillas

Hello Abhilash,

Thanks a lot for your quick reply.

On Tue, Sep 30, 2014 at 4:24 PM, Abhilash Kesavan
kesavan.abhil...@gmail.com wrote:
 Hi Javier,

 On Tue, Sep 30, 2014 at 7:00 PM, Javier Martinez Canillas
 jav...@dowhile0.org wrote:
 Hello Vikas,

 Thanks a lot for the re-spin.

 On Tue, Sep 30, 2014 at 1:02 PM, Vikas Sajjan vikas.saj...@samsung.com 
 wrote:

 Tested on Kukjin Kim's tree, for-next branch +
 1] http://www.spinics.net/lists/linux-samsung-soc/msg33750.html
 2] https://lkml.org/lkml/2014/9/30/156

 I wanted to test your series but I noticed that Abhilash's patch:

 [PATCH v7] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420

 does not apply cleanly on Kukjin's for-next branch. I see that all the
 dependencies mentioned (modulo $subject or course) have already been
 merged though.

 If you are looking to test this series right now then I can post an
 untested rebased version. Otherwise, I will test it tomorrow and post.


Up to you. If is easy for you to post an untested version, that would
be great and I can test it. But is OK if you prefer to do it tomorrow
too.

 Regards,
 Abhilash


Best regards,
Javier
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Re: [PATCH v8 0/2] Adds PMU and S2R support for exynos5420

HI Javier,

On Tue, Sep 30, 2014 at 8:12 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
 Hello Abhilash,

 Thanks a lot for your quick reply.

 On Tue, Sep 30, 2014 at 4:24 PM, Abhilash Kesavan
 kesavan.abhil...@gmail.com wrote:
 Hi Javier,

 On Tue, Sep 30, 2014 at 7:00 PM, Javier Martinez Canillas
 jav...@dowhile0.org wrote:
 Hello Vikas,

 Thanks a lot for the re-spin.

 On Tue, Sep 30, 2014 at 1:02 PM, Vikas Sajjan vikas.saj...@samsung.com 
 wrote:

 Tested on Kukjin Kim's tree, for-next branch +
 1] http://www.spinics.net/lists/linux-samsung-soc/msg33750.html
 2] https://lkml.org/lkml/2014/9/30/156

 I wanted to test your series but I noticed that Abhilash's patch:

 [PATCH v7] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420

 does not apply cleanly on Kukjin's for-next branch. I see that all the
 dependencies mentioned (modulo $subject or course) have already been
 merged though.

 If you are looking to test this series right now then I can post an
 untested rebased version. Otherwise, I will test it tomorrow and post.


 Up to you. If is easy for you to post an untested version, that would
 be great and I can test it. But is OK if you prefer to do it tomorrow
 too.

Just posted the rebased patch.

Regards,
Abhilash

 Regards,
 Abhilash


 Best regards,
 Javier
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[PATCH v8] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420

Use the MCPM layer to handle core suspend/resume on Exynos5420.
Also, restore the entry address setup code post-resume.

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Acked-by: Nicolas Pitre n...@linaro.org
---
Changes in v2:
- Made use of the MCPM suspend/powered_up call-backs
Changes in v3:
- Used the residency value to indicate the entered state
Changes in v4:
- Checked if MCPM has been enabled to prevent build error
Changes in v5:
- Removed the MCPM flags and just used a local flag to
indicate that we are suspending.
Changes in v6:
- Read the SYS_PWR_REG value to decide if we are suspending
the system.
- Restore the SYS_PWR_REG value post-resume.
- Modified the comments to reflect the first change.
Changes in v7:
- Add the suspend check in exynos_cpu_power_down() rather
than the MCPM back-end.
- Clean-up unnecessary changes related to earlier versions.
Changes in v8:
- Rebased on the latest exynos PMU/PM support patches.

This patch is based on kgene's for-next branch.
http://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/log/?h=for-next

Here are the dependencies:
1) Decouple syscon interface from platform devices - v7
http://lkml.org/lkml/2014/9/30/156

2) ARM: Exynos: Convert PMU implementation into a platform driver - v8
http://www.spinics.net/lists/arm-kernel/msg366831.html

3) Exynos5420 PMU/S2R Series - v8
http://www.spinics.net/lists/arm-kernel/msg366846.html

 arch/arm/mach-exynos/mcpm-exynos.c | 32 
 arch/arm/mach-exynos/platsmp.c | 12 +
 arch/arm/mach-exynos/suspend.c | 50 ++
 3 files changed, 79 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-exynos/mcpm-exynos.c 
b/arch/arm/mach-exynos/mcpm-exynos.c
index dc9a764..b0d3c2e 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -15,6 +15,7 @@
 #include linux/delay.h
 #include linux/io.h
 #include linux/of_address.h
+#include linux/syscore_ops.h
 
 #include asm/cputype.h
 #include asm/cp15.h
@@ -30,6 +31,8 @@
 #define EXYNOS5420_USE_ARM_CORE_DOWN_STATE BIT(29)
 #define EXYNOS5420_USE_L2_COMMON_UP_STATE  BIT(30)
 
+static void __iomem *ns_sram_base_addr;
+
 /*
  * The common v7_exit_coherency_flush API could not be used because of the
  * Erratum 799270 workaround. This macro is the same as the common one (in
@@ -318,10 +321,26 @@ static const struct of_device_id exynos_dt_mcpm_match[] = 
{
{},
 };
 
+static void exynos_mcpm_setup_entry_point(void)
+{
+   /*
+* U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
+* as part of secondary_cpu_start().  Let's redirect it to the
+* mcpm_entry_point(). This is done during both secondary boot-up as
+* well as system resume.
+*/
+   __raw_writel(0xe59f, ns_sram_base_addr); /* ldr r0, [pc, #0] */
+   __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx  r0 */
+   __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
+}
+
+static struct syscore_ops exynos_mcpm_syscore_ops = {
+   .resume = exynos_mcpm_setup_entry_point,
+};
+
 static int __init exynos_mcpm_init(void)
 {
struct device_node *node;
-   void __iomem *ns_sram_base_addr;
unsigned int value, i;
int ret;
 
@@ -387,16 +406,9 @@ static int __init exynos_mcpm_init(void)
pmu_raw_writel(value, EXYNOS_COMMON_OPTION(i));
}
 
-   /*
-* U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
-* as part of secondary_cpu_start().  Let's redirect it to the
-* mcpm_entry_point().
-*/
-   __raw_writel(0xe59f, ns_sram_base_addr); /* ldr r0, [pc, #0] */
-   __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx  r0 */
-   __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
+   exynos_mcpm_setup_entry_point();
 
-   iounmap(ns_sram_base_addr);
+   register_syscore_ops(exynos_mcpm_syscore_ops);
 
return ret;
 }
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index adb36a8..222aa3c 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -137,6 +137,18 @@ void exynos_cpu_power_down(int cpu)
  */
 void exynos_cpu_power_up(int cpu)
 {
+   if (cpu == 0  (of_machine_is_compatible(samsung,exynos5420) ||
+   of_machine_is_compatible(samsung,exynos5800))) {
+   /*
+* Bypass power down for CPU0 during suspend. Check for
+* the SYS_PWR_REG value to decide if we are suspending
+* the system.
+*/
+   int val = __raw_readl(pmu_base_addr +
+   EXYNOS5_ARM_CORE0_SYS_PWR_REG);
+   if (!(val  S5P_CORE_LOCAL_PWR_EN))
+   return;
+   }

Re: [PATCH v8 0/2] Adds PMU and S2R support for exynos5420

2014-09-30 Thread Javier Martinez Canillas

Hello Abhilash,

On Tue, Sep 30, 2014 at 4:58 PM, Abhilash Kesavan
kesavan.abhil...@gmail.com wrote:

 If you are looking to test this series right now then I can post an
 untested rebased version. Otherwise, I will test it tomorrow and post.


 Up to you. If is easy for you to post an untested version, that would
 be great and I can test it. But is OK if you prefer to do it tomorrow
 too.

 Just posted the rebased patch.


Perfect, thanks a lot for your help!

Best regards,
Javier
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Re: [PATCH 2/2] arch: arm: samsung: Clean-up usage of CONFIG_SERIAL_SAMSUNG_UARTS symbol

2014-09-30 Thread Arnd Bergmann

On Tuesday 30 September 2014 20:04:55 Abhilash Kesavan wrote:
 --- a/arch/arm/mach-s3c64xx/irq-pm.c
 +++ b/arch/arm/mach-s3c64xx/irq-pm.c
 @@ -55,10 +55,10 @@ static struct irq_grp_save {
 u32 mask;
  } eint_grp_save[5];
  
 -#ifndef CONFIG_SERIAL_SAMSUNG_UARTS
 -#define SERIAL_SAMSUNG_UARTS 0
 +#ifndef CONFIG_SERIAL_SAMSUNG
 +#define SERIAL_SAMSUNG_UARTS   0
  #else
 -#defineSERIAL_SAMSUNG_UARTS CONFIG_SERIAL_SAMSUNG_UARTS
 +#define SERIAL_SAMSUNG_UARTS   4
  #endif
  
  static u32 irq_uart_mask[SERIAL_SAMSUNG_UARTS];

I think this won't work because now you access invalid registers
on machines that have only three uarts.

 diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c
 index 11fbbc2..03cafe9 100644
 --- a/arch/arm/plat-samsung/init.c
 +++ b/arch/arm/plat-samsung/init.c
 @@ -93,8 +93,8 @@ void __init s3c24xx_init_clocks(int xtal)
  #if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
  static int nr_uarts __initdata = 0;
  
 -#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
 -static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS];
 +#ifdef CONFIG_SERIAL_SAMSUNG
 +static struct s3c2410_uartcfg uart_cfgs[4];
  #endif
  
  /* s3c24xx_init_uartdevs
 @@ -110,7 +110,7 @@ void __init s3c24xx_init_uartdevs(char *name,
   struct s3c24xx_uart_resources *res,
   struct s3c2410_uartcfg *cfg, int no)
  {
 -#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
 +#ifdef CONFIG_SERIAL_SAMSUNG
 struct platform_device *platdev;
 struct s3c2410_uartcfg *cfgptr = uart_cfgs;
 struct s3c24xx_uart_resources *resp;

Since you hardcode the number here now, you can actually drop this #ifdef.

Arnd
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Re: [PATCH v5 0/8] arch: arm64: Enable support for Samsung Exynos7 SoC

2014-09-30 Thread Catalin Marinas

On Tue, Sep 30, 2014 at 04:15:21PM +0100, Abhilash Kesavan wrote:
 On Tue, Sep 23, 2014 at 2:18 PM, Abhilash Kesavan
 kesavan.abhil...@gmail.com wrote:
  This patchset supports the new Exynos7 Samsung SoC based on Cortex-A57.
  Exynos7 is a System-On-Chip (SoC) that is based on 64-bit ARMv8 RISC
  processor.
 
  The following patches are tested based on linux-next tree (20140919).
  https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/
 
  Following patches are required for this series:
  1- tty/serial: fix config dependencies for samsung serial
 
  https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg36208.html
  2- dts, kbuild: Implement support for dtb vendor subdirs patchset
 http://comments.gmane.org/gmane.linux.kbuild.devel/12131
 
  Thanks for your comments. I have mentioned Robert's patchset as being
  a dependency for my series here.
 
 Do you have any comments on the arch and dts changes ?

The arch changes look fine to me (not much in there, just Kconfig,
defconfig, Makefile). Regarding the dts, I'd like to see some acks from
the DT or arm-soc maintainers.

BTW, the arch/arm64/ patches in your series should be merged via the
arm-soc tree (Arnd/Olof, cc'ing them now).

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Re: [PATCH v5 0/8] arch: arm64: Enable support for Samsung Exynos7 SoC

On 30.09.2014 17:12, Abhilash Kesavan wrote:
 Hi Tomasz,
 
 On Mon, Sep 22, 2014 at 2:22 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
 Hi Abhilash,

 On 22.09.2014 06:47, Abhilash Kesavan wrote:
 Changes since v4:
 - Fixed comments from Tomasz Figa:
   - Changed the namespace prefix from exynos to samsung
   - Defined bindings to take all input clocks
   - Sorted the Kconfig entries alphabetically in clock Makefile
   - Used consistent 1 tab line breaks across the clock file
   - Statically initialized the samsung_cmu_info struct
 - Enabled exynos7 in the arm64 defconfig as per Catalin Marinas' comment.
 - Added Kukjin Kim's ack along with Thomas Abraham's tested and reviewed 
 tags.


 The clock patches look good to me, but since they are doing quite a lot
 of code moving I'd prefer to take them through clk tree. Based on the
 fact that there are no code dependencies between clock patches and
 remaining ones and Exynos7 is a new material for 3.18, I'm inclined to
 apply them to my tree if nobody minds.
 
 Will you be picking up the clock changes soon ?

I'd like to do so. Kukjin, since clock changes are a part of this
series, might I have your Ack for them to be applied separately?

Best regards,
Tomasz
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Re: [PATCH v7] mfd: syscon: Decouple syscon interface from platform devices

2014-09-30 Thread Doug Anderson

Pankaj,

On Tue, Sep 30, 2014 at 1:35 AM, Pankaj Dubey pankaj.du...@samsung.com wrote:
 Currently a syscon entity can be only registered directly through a
 platform device that binds to a dedicated syscon driver. However in
 certain use cases it is desirable to make a device used with another
 driver a syscon interface provider.

 For example, certain SoCs (e.g. Exynos) contain system controller
 blocks which perform various functions such as power domain control,
 CPU power management, low power mode control, but in addition contain
 certain IP integration glue, such as various signal masks,
 coprocessor power control, etc. In such case, there is a need to have
 a dedicated driver for such system controller but also share registers
 with other drivers. The latter is where the syscon interface is helpful.

 In case of DT based platforms, this patch decouples syscon object from
 syscon platform driver, and allows to create syscon objects first time
 when it is required by calling of syscon_regmap_lookup_by APIs and keep
 a list of such syscon objects along with syscon provider device_nodes
 and regmap handles.

 For non-DT based platforms, this patch keeps syscon platform driver
 structure so that syscon can be probed and such non-DT based drivers
 can use syscon_regmap_lookup_by_pdev API and access regmap handles.
 Once all users of syscon_regmap_lookup_by_pdev migrated to DT based,
 we can completely remove platform driver of syscon, and keep only helper
 functions to get regmap handles.

 Suggested-by: Arnd Bergmann a...@arndb.de
 Suggested-by: Tomasz Figa tomasz.f...@gmail.com
 Tested-by: Vivek Gautam gautam.vi...@samsung.com
 Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
 Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
 Reviewed-by: Arnd Bergmann a...@arndb.de
 Tested-by: Heiko Stuebner he...@sntech.de
 Reviewed-by: Heiko Stuebner he...@sntech.de
 ---
 Patch v6 and related discussions can be found here [1].

 Change since v5:
  - Addressed review comments from Heiko Stuebner.
  - Updated commit description.
  - Including Arnd's and Heiko's Reviewed-by.

 Change since v5:
  - Dropping creation of dummy platform device in of_syscon_register.
  - As we are changing syscon to decouple from platform_device, creation of
dummy platform_device does not look good option, and as suggested by Arnd,
I made another attempt so that regmap_mmio_init API should work with NULL
dev pointer itself. Since regmap needs to know about Syscon device node
properties so let's parse device node of syscon in syscon itself for any
such properties and using regmap_config parameter pass all such information
to regmap. Other concern of crashes due to NULL dev pointer in regmap 
 already
addressed in separate patches of regmap. Please see [2] and [3].

 Changes since v4:
  - Addressed Tomasz Figa's comments for v4.
  - Added error handing in of_syscon_register function.
  - Using devm_regmap_init_mmio instead of regmap_init_mmio.

 Changes since v3:
  - Addressed Arnd's comment for v2.
  - Updated of_syscon_register for adding dev pointer in regmap_init_mmio.
  - For early users created dummy platform device.

 Changes since v2:
  - Added back platform device support from syscon, with one change that
syscon will not be probed for DT based platform.
  - Added back syscon_regmap_lookup_by_pdevname API so that non-DT base
users of syscon will not be broken.
  - Removed unwanted change in syscon.h.
  - Modified Signed-off-by list, added Suggested-by of Tomasz Figa and
Arnd Bergmann.
  - Added Tested-by of Vivek Gautam for testing on Exynos platform.

 Changes since v1:
  - Removed of_syscon_unregister function.
  - Modified of_syscon_register function and it will be used by syscon.c
to create syscon objects whenever required.
  - Removed platform device support from syscon.
  - Removed syscon_regmap_lookup_by_pdevname API support.
  - As there are significant changes w.r.t patchset v1, I am taking over
author for this patchset from Tomasz Figa.

 [1]: https://lkml.org/lkml/2014/9/29/99
 [2]: https://lkml.org/lkml/2014/9/18/130
 [3]: https://lkml.org/lkml/2014/9/27/2
  drivers/mfd/syscon.c |   96 
 ++
  1 file changed, 74 insertions(+), 22 deletions(-)

You probably already have enough tags, but just in case.  ;)  On an
rk3288-based system (this patch backported to 3.14):

Tested-by: Doug Anderson diand...@chromium.org
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Re: [PATCH 2/2] arch: arm: samsung: Clean-up usage of CONFIG_SERIAL_SAMSUNG_UARTS symbol

On 30.09.2014 17:13, Arnd Bergmann wrote:
 On Tuesday 30 September 2014 20:04:55 Abhilash Kesavan wrote:
 --- a/arch/arm/mach-s3c64xx/irq-pm.c
 +++ b/arch/arm/mach-s3c64xx/irq-pm.c
 @@ -55,10 +55,10 @@ static struct irq_grp_save {
 u32 mask;
  } eint_grp_save[5];
  
 -#ifndef CONFIG_SERIAL_SAMSUNG_UARTS
 -#define SERIAL_SAMSUNG_UARTS 0
 +#ifndef CONFIG_SERIAL_SAMSUNG
 +#define SERIAL_SAMSUNG_UARTS   0
  #else
 -#defineSERIAL_SAMSUNG_UARTS CONFIG_SERIAL_SAMSUNG_UARTS
 +#define SERIAL_SAMSUNG_UARTS   4
  #endif
  
  static u32 irq_uart_mask[SERIAL_SAMSUNG_UARTS];
 
 I think this won't work because now you access invalid registers
 on machines that have only three uarts.

Both S3C6400 and S3C6410 SoCs have 4 UART blocks. AFAICT
CONFIG_SERIAL_SAMSUNG_UARTS was always set to 4 on ARCH_S3C64XX.

 
 diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c
 index 11fbbc2..03cafe9 100644
 --- a/arch/arm/plat-samsung/init.c
 +++ b/arch/arm/plat-samsung/init.c
 @@ -93,8 +93,8 @@ void __init s3c24xx_init_clocks(int xtal)
  #if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
  static int nr_uarts __initdata = 0;
  
 -#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
 -static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS];
 +#ifdef CONFIG_SERIAL_SAMSUNG
 +static struct s3c2410_uartcfg uart_cfgs[4];

Abhilash: Instead of using 4 directly, you could define a constant for it.

  #endif
  
  /* s3c24xx_init_uartdevs
 @@ -110,7 +110,7 @@ void __init s3c24xx_init_uartdevs(char *name,
   struct s3c24xx_uart_resources *res,
   struct s3c2410_uartcfg *cfg, int no)
  {
 -#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
 +#ifdef CONFIG_SERIAL_SAMSUNG
 struct platform_device *platdev;
 struct s3c2410_uartcfg *cfgptr = uart_cfgs;
 struct s3c24xx_uart_resources *resp;
 
 Since you hardcode the number here now, you can actually drop this #ifdef.

I believe what Abhilash did is correct, because this code is not needed
when there is no serial support enabled.

Best regards,
Tomasz
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Re: [PATCH 2/2] arch: arm: samsung: Clean-up usage of CONFIG_SERIAL_SAMSUNG_UARTS symbol

Hi Arnd,

On Tue, Sep 30, 2014 at 8:43 PM, Arnd Bergmann a...@arndb.de wrote:
 On Tuesday 30 September 2014 20:04:55 Abhilash Kesavan wrote:
 --- a/arch/arm/mach-s3c64xx/irq-pm.c
 +++ b/arch/arm/mach-s3c64xx/irq-pm.c
 @@ -55,10 +55,10 @@ static struct irq_grp_save {
 u32 mask;
  } eint_grp_save[5];

 -#ifndef CONFIG_SERIAL_SAMSUNG_UARTS
 -#define SERIAL_SAMSUNG_UARTS 0
 +#ifndef CONFIG_SERIAL_SAMSUNG
 +#define SERIAL_SAMSUNG_UARTS   0
  #else
 -#defineSERIAL_SAMSUNG_UARTS CONFIG_SERIAL_SAMSUNG_UARTS
 +#define SERIAL_SAMSUNG_UARTS   4
  #endif

  static u32 irq_uart_mask[SERIAL_SAMSUNG_UARTS];

 I think this won't work because now you access invalid registers
 on machines that have only three uarts.

The 6400 and 6410 SoCs both have 4 uarts. Prior to this patch
CONFIG_SERIAL_SAMSUNG_UARTS would have been 4 for 64xx.

 diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c
 index 11fbbc2..03cafe9 100644
 --- a/arch/arm/plat-samsung/init.c
 +++ b/arch/arm/plat-samsung/init.c
 @@ -93,8 +93,8 @@ void __init s3c24xx_init_clocks(int xtal)
  #if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
  static int nr_uarts __initdata = 0;

 -#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
 -static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS];
 +#ifdef CONFIG_SERIAL_SAMSUNG
 +static struct s3c2410_uartcfg uart_cfgs[4];
  #endif

  /* s3c24xx_init_uartdevs
 @@ -110,7 +110,7 @@ void __init s3c24xx_init_uartdevs(char *name,
   struct s3c24xx_uart_resources *res,
   struct s3c2410_uartcfg *cfg, int no)
  {
 -#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
 +#ifdef CONFIG_SERIAL_SAMSUNG
 struct platform_device *platdev;
 struct s3c2410_uartcfg *cfgptr = uart_cfgs;
 struct s3c24xx_uart_resources *resp;

 Since you hardcode the number here now, you can actually drop this #ifdef.

Will remove it.

Regards,
Abhilash

 Arnd

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[PATCH] ASoC: samsung: fix CDCLK handling

2014-09-30 Thread Daniel Drake

ODROID is the only platform that uses CDCLK, and right now,
CDCLK handling is buggy. If you start pulseaudio on ODROID,
audio is broken until reboot (even after killing pulse).

This happens because CDCLK gets disabled by i2s.c and never enabled again.

pulseaudio does:
1. i2s_startup for playback channel
2. i2s_startup for capture channel
3. i2s_shutdown for capture channel
4. i2s_shutdown for playback channel

In step 3 we disable CDCLK even though playback should still be active.

In step 4 we do this:
u32 mod = readl(i2s-addr + I2SMOD);
i2s-cdclk_out = !(mod  MOD_CDCLKCON);

and now cdclk_out is always going to be 0, so we'll never turn it back
on again.

Both this bug and the one that b97c60abf9a tries to fix happened
because of the way that CDCLK handling is painfully split between
platform and i2s drivers.

Simplify the situation and solve the bug with the following approach:
 - as before, samsung_i2s_dai_probe() gates CDCLK by default
   (no need for smartq_wm8987 to do this as well)
 - platform drivers can gate/ungate CDCLK as necessary
   (currently only odroidx2 needs to do this)
 - i2s code has no other interaction with CDCLK

Signed-off-by: Daniel Drake dr...@endlessm.com
---
 sound/soc/samsung/i2s.c   | 19 ++
 sound/soc/samsung/odroidx2_max98090.c | 36 ++-
 sound/soc/samsung/smartq_wm8987.c |  6 --
 3 files changed, 29 insertions(+), 32 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 9d51347..6654ce6 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -68,8 +68,6 @@ struct i2s_dai {
 #define DAI_OPENED (1  0) /* Dai is opened */
 #define DAI_MANAGER(1  1) /* Dai is the manager */
unsigned mode;
-   /* CDCLK pin direction: 0  - input, 1 - output */
-   unsigned int cdclk_out:1;
/* Driver for this DAI */
struct snd_soc_dai_driver i2s_dai_drv;
/* DMA parameters */
@@ -739,9 +737,6 @@ static int i2s_startup(struct snd_pcm_substream *substream,
 
spin_unlock_irqrestore(lock, flags);
 
-   if (!is_opened(other)  i2s-cdclk_out)
-   i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
-   0, SND_SOC_CLOCK_OUT);
return 0;
 }
 
@@ -757,24 +752,14 @@ static void i2s_shutdown(struct snd_pcm_substream 
*substream,
i2s-mode = ~DAI_OPENED;
i2s-mode = ~DAI_MANAGER;
 
-   if (is_opened(other)) {
+   if (is_opened(other))
other-mode |= DAI_MANAGER;
-   } else {
-   u32 mod = readl(i2s-addr + I2SMOD);
-   i2s-cdclk_out = !(mod  MOD_CDCLKCON);
-   if (other)
-   other-cdclk_out = i2s-cdclk_out;
-   }
+
/* Reset any constraint on RFS and BFS */
i2s-rfs = 0;
i2s-bfs = 0;
 
spin_unlock_irqrestore(lock, flags);
-
-   /* Gate CDCLK by default */
-   if (!is_opened(other))
-   i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
-   0, SND_SOC_CLOCK_IN);
 }
 
 static int config_setup(struct i2s_dai *i2s)
diff --git a/sound/soc/samsung/odroidx2_max98090.c 
b/sound/soc/samsung/odroidx2_max98090.c
index 278edf9..b700284 100644
--- a/sound/soc/samsung/odroidx2_max98090.c
+++ b/sound/soc/samsung/odroidx2_max98090.c
@@ -21,20 +21,37 @@ struct odroidx2_drv_data {
 /* The I2S CDCLK output clock frequency for the MAX98090 codec */
 #define MAX98090_MCLK 1920
 
+static int odroidx2_startup(struct snd_pcm_substream *substream)
+{
+   struct snd_soc_pcm_runtime *rtd = substream-private_data;
+
+   if (rtd-cpu_dai-active)
+   return 0;
+
+   return snd_soc_dai_set_sysclk(rtd-cpu_dai, SAMSUNG_I2S_CDCLK,
+ 0, SND_SOC_CLOCK_OUT);
+}
+
+static void odroidx2_shutdown(struct snd_pcm_substream *substream)
+{
+   struct snd_soc_pcm_runtime *rtd = substream-private_data;
+
+   if (!rtd-cpu_dai-active)
+   snd_soc_dai_set_sysclk(rtd-cpu_dai, SAMSUNG_I2S_CDCLK,
+  0, SND_SOC_CLOCK_IN);
+}
+
+static const struct snd_soc_ops odroidx2_ops = {
+   .startup = odroidx2_startup,
+   .shutdown = odroidx2_shutdown,
+};
+
 static int odroidx2_late_probe(struct snd_soc_card *card)
 {
struct snd_soc_dai *codec_dai = card-rtd[0].codec_dai;
-   struct snd_soc_dai *cpu_dai = card-rtd[0].cpu_dai;
-   int ret;
 
-   ret = snd_soc_dai_set_sysclk(codec_dai, 0, MAX98090_MCLK,
+   return snd_soc_dai_set_sysclk(codec_dai, 0, MAX98090_MCLK,
SND_SOC_CLOCK_IN);
-   if (ret  0)
-   return ret;
-
-   /* Set the cpu DAI configuration in order to use CDCLK */
-   return snd_soc_dai_set_sysclk(cpu_dai, SAMSUNG_I2S_CDCLK,
-   0, SND_SOC_CLOCK_OUT);
 }
 
 static const struct snd_soc_dapm_widget odroidx2_dapm_widgets[] = {

Re: [PATCH V2 1/3] mmc: dw_mmc: use mmc_regulator_get_supply to handle regulators

2014-09-30 Thread Doug Anderson

Bartlomiej

On Mon, Sep 29, 2014 at 5:31 AM, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:

 Hi,

 On Friday, August 29, 2014 01:34:44 PM Ulf Hansson wrote:
 On 22 August 2014 15:47, Yuvaraj Kumar C D yuvaraj...@gmail.com wrote:
  This patch makes use of mmc_regulator_get_supply() to handle
  the vmmc and vqmmc regulators.Also it moves the code handling
  the these regulators to dw_mci_set_ios().It turned on the vmmc
  and vqmmc during MMC_POWER_UP and MMC_POWER_ON,and turned off
  during MMC_POWER_OFF.
 
  Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com

 Thanks! Applied for next.

 Unfortunately this patch breaks mmc1 card (Kingston 32GB micro SDHC)
 detection on Exynos5420 Arndale Octa for me:

 [   10.797979] dwmmc_exynos 1222.mmc: no support for card's volts
 [   10.797998] mmc1: error -22 whilst initialising SD card

 Without the patch:

 [   10.866926] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (slot req 
 5000Hz, actual 5000HZ div = 0)
 [   10.866977] mmc1: new high speed SDHC card at address 1234
 [   10.868730] mmcblk1: mmc1:1234 SA32G 29.3 GiB
 [   10.915054]  mmcblk1: p1 p2 p3

 The config is attached (exynos_defconfig doesn't work correctly for
 this board yet).

Yup, this is an expected behavior, unfortunately.  This was talked
about extensively during the review of this patch series.

I believe that patch #3 in Yuvaraj's series would fix your problem.
Specifically https://patchwork.kernel.org/patch/4763891/.


The current summary of this issue is (Ulf, please correct me if I got
anything wrong):

1. If nothing else, Yuvaraj's patch should probably be split in two.
One half should be the MMC core half that I originally sent Yuvaraj.
I just rebased and re-uploaed it at
https://chromium-review.googlesource.com/220560 in case you're
curious.  The second half should be the dw_mmc piece that Yuvaraj
wrote.

2. Ulf has indicated that he thinks that the MMC core change (and thus
Yuvaraj's patch) is ugly and not necessary.  He advocates instead
using the MMC_CAP_NEEDS_POLL on all affected platforms.  That means
we'll turn on the power every second, check for the card, then turn
off power.

3. I'm still of the opinion that the MMC core change isn't _that_
ugly.  Given that there are a large number of systems affected (across
at least two SoC vendors) and that it would be nice if those systems
didn't have to poll, I'd still be happy if the MMC core change could
go in.  ...but I'm a pragmatist and know that the polling isn't
_terrible_, so if that's the way we need to go then so be it.

--

My understanding was that Yuvaraj was going to spin his patch to use a
similar type of scheme to autodetect affected SoCs (looking for SoCs
known to have this problem where the platform data shows them using
the built-in card detect) and then enable MMC_CAP_NEEDS_POLL.  I
haven't seen a patch from him, so maybe you could post this up?

Note: the reason why exynos5250-snow and some other boards aren't
affected yet is that the regulator is simply not specified in the
device tree (it's just left always on).

---

-Doug
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Re: exynos5420/arndale-octa: imprecise external aborts on exynos_defconfig

2014-09-30 Thread Bartlomiej Zolnierkiewicz

Hi,

On Wednesday, September 17, 2014 05:39:29 PM Kevin Hilman wrote:
Thomas Abraham ta.oma...@gmail.com writes:

On Thu, Sep 11, 2014 at 12:16 AM, Kevin Hilman khil...@kernel.org wrote:
Tyler Baker tyler.ba...@linaro.org writes:

Exynos5420-based Arndale octa boards have recently started failing boot
tests due to imprecise external aborts. This only appears to happen
when using exynos_defconfig and boots fine with multi_v7_defconfig. The
issue seems to be intermittent, so is not reliably reproducable and
difficult to bisect. Here are a few boot logs from recent
mainline/linux-next kernels that are failing:

FYI, I'm seeing the same periodic aborts. For example, here's my boot
of next-20140910:
http://images.armcloud.us/kernel-ci/next/next-20140910/arm-exynos_defconfig/boot-exynos5420-arndale-octa.html

However, my userspace is much simpler and doesn't seem to cause a panic,
so my boot tests report passing. (I should fixup my scripts so these
imprecise aborts are reported as a FAIL.)

I'm glad you pointed out that it happens only with exynos_defconfig and
not multi_v7_defconfig because I noticed that too. I haven't had the
time to track it any further than that, so maybe the exynos folks can
help track it down from here.

Thanks for reporting this,

Kevin

Hi Tyler, Kevin,

From the bootlog you have shared,

[1.060016] CPU4: failed to come online
[2.070031] CPU5: failed to come online
[3.080049] CPU6: failed to come online
[4.090066] CPU7: failed to come online
[4.090099] Brought up 4 CPUs
[4.090109] SMP: Total of 4 processors activated.
[4.090119] CPU: WARNING: CPU(s) started in wrong/inconsistent
modes (primary CPU mode 0x13)
[4.090128] CPU: This may indicate a broken bootloader or firmware.

Would it be possible to set max cpus to 1, disable switcher and try

Which max cpus do you mean? For NR_CPUS the lower limit is 2.

again. I don't have a arndale octa board but I have tested mainline
kernel with smdk5420 board. It boots all eight CPUs, switcher works
fine and there are no imprecise aborts seen.

Sorry for the delay, I'm travelling this week.

FWIW, the same CPU boot failures you hilight above are happening on
multi_v7_defconfig[1] which is not getting the imprecise abort. This is
only happening on exynos_defconfig[2], so I'm curious why you think the
switcher or NR_CPUS might be the issues.

Anyways, I narrowed this down a bit and discovered it's
CONFIG_EXYNOS5420_MCPM=y that's the root cause. If I use
exynos_defconfig and then disable that option, I don't get any more
imprecise aborts.

I have exactly the same issue with Exynos5420 Arndale Octa.

CONFIG_EXYNOS5420_MCPM was enabled by commit fc3791f3a95d
(ARM: exynos_defconfig: Update exynos_defconfig) which
get merged into v3.17-rc1. It seems that this part of
the patch should be reverted for the final v3.17 kernel.

Kevin

[1]
http://images.armcloud.us/kernel-ci/mainline/v3.17-rc5-25-g8ba4caf/arm-multi_v7_defconfig/boot-exynos5420-arndale-octa.html
[2]
http://images.armcloud.us/kernel-ci/mainline/v3.17-rc5-25-g8ba4caf/arm-exynos_defconfig/boot-exynos5420-arndale-octa.html

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung RD Institute Poland
Samsung Electronics

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Re: [PATCH 2/2] arch: arm: samsung: Clean-up usage of CONFIG_SERIAL_SAMSUNG_UARTS symbol



On 30.09.2014 20:36, Arnd Bergmann wrote:
 On Tuesday 30 September 2014 18:10:14 Tomasz Figa wrote:
 @@ -110,7 +110,7 @@ void __init s3c24xx_init_uartdevs(char *name,
   struct s3c24xx_uart_resources *res,
   struct s3c2410_uartcfg *cfg, int no)
  {
 -#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
 +#ifdef CONFIG_SERIAL_SAMSUNG
 struct platform_device *platdev;
 struct s3c2410_uartcfg *cfgptr = uart_cfgs;
 struct s3c24xx_uart_resources *resp;

 Since you hardcode the number here now, you can actually drop this #ifdef.

 I believe what Abhilash did is correct, because this code is not needed
 when there is no serial support enabled.

 
 I only added the #ifdef here because it was broken when
 CONFIG_SERIAL_SAMSUNG_UARTS was undefined.

Fair enough. This isn't really that much code to really care and most
(if not all) use cases have UART enabled anyway.

Best regards,
Tomasz
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Re: [PATCH 1/2] tty: serial: samsung: Clean-up selection of number of available UARTs

Abhilash,

On 30.09.2014 16:34, Abhilash Kesavan wrote:
 Remove symbols SERIAL_SAMSUNG_UARTS_4 and SERIAL_SAMSUNG_UARTS which
 select the number of UART ports available on the SoC. Use the maximum
 number of UART ports possible across the serial driver in place of
 SERIAL_SAMSUNG_UARTS. Removal of these symbols also helps in Exynos7
 serial enablement.
 

AFAICT this patch should be second in the series, because it removes
symbols which are used by code that is yet to be updated in current patch 2.

Otherwise:

Reviewed-by: Tomasz Figa tomasz.f...@gmail.com

Best regards,
Tomasz
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Re: [PATCH v7 00/11] kernel: Add support for restart handler call chain

2014-09-30 Thread Andrew Morton

On Tue, 19 Aug 2014 17:45:27 -0700 Guenter Roeck li...@roeck-us.net wrote:

 Introduce a system restart handler call chain to solve the described problems.

So someone has merged eight of these patches into linux-next but these
three:

watchdog-s3c2410-add-restart-handler.patch
clk-samsung-register-restart-handlers-for-s3c2412-and-s3c2443.patch
clk-rockchip-add-restart-handler.patch

were omitted.  What's up?
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Re: [PATCH v7 00/11] kernel: Add support for restart handler call chain

2014-09-30 Thread Guenter Roeck

On Tue, Sep 30, 2014 at 02:20:02PM -0700, Andrew Morton wrote:
 On Tue, 19 Aug 2014 17:45:27 -0700 Guenter Roeck li...@roeck-us.net wrote:
 
  Introduce a system restart handler call chain to solve the described 
  problems.
 
 So someone has merged eight of these patches into linux-next but these
 three:
 
 watchdog-s3c2410-add-restart-handler.patch
 clk-samsung-register-restart-handlers-for-s3c2412-and-s3c2443.patch
 clk-rockchip-add-restart-handler.patch
 
 were omitted.  What's up?

Most likely PBKC on my side; Looks like I forgot to add those when I created
the immutable branch for others to merge. Sorry for that :-(.

Having said that, I somehow thought that the clock patches would go in through
the clock tree. Heiko, did I get that wrong ? Separately, I sent a pull request
that includes the watchdog patch to Wim.

Thanks,
Guenter
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Re: [PATCH v7 00/11] kernel: Add support for restart handler call chain

2014-09-30 Thread Stephen Rothwell

Hi Guenter,

On Tue, 30 Sep 2014 15:30:00 -0700 Guenter Roeck li...@roeck-us.net wrote:

 On Tue, Sep 30, 2014 at 02:20:02PM -0700, Andrew Morton wrote:
  On Tue, 19 Aug 2014 17:45:27 -0700 Guenter Roeck li...@roeck-us.net wrote:
  
   Introduce a system restart handler call chain to solve the described 
   problems.
  
  So someone has merged eight of these patches into linux-next but these
  three:
  
  watchdog-s3c2410-add-restart-handler.patch
  clk-samsung-register-restart-handlers-for-s3c2412-and-s3c2443.patch
  clk-rockchip-add-restart-handler.patch
  
  were omitted.  What's up?
 
 Most likely PBKC on my side; Looks like I forgot to add those when I created
 the immutable branch for others to merge. Sorry for that :-(.
 
 Having said that, I somehow thought that the clock patches would go in through
 the clock tree. Heiko, did I get that wrong ? Separately, I sent a pull 
 request
 that includes the watchdog patch to Wim.

So far, that immutable branch has been merged into the battery tree
(and thus into linux-next) by Sebastian in order to add (I assume):

18a702e0de98 power: reset: use restart_notifier mechanism for msm-poweroff
371bb20d6927 power: Add simple gpio-restart driver

on top of it.

So, I guess the watchdog and clk trees also need to merge that
immutable branch and then add their respective patches from the mmotm
series to their trees.
-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au


signature.asc
Description: PGP signature

RE: [PATCH v8 2/2] ARM: EXYNOS: Move PMU specific definitions from common.h

Hi Arnd,

On Tuesday, September 30, 2014 4:09 PM, Arnd Bergmann wrote,
 To: linux-arm-ker...@lists.infradead.org
 Cc: Pankaj Dubey; linux-ker...@vger.kernel.org;
linux-samsung-soc@vger.kernel.org;
 kgene@samsung.com; li...@arm.linux.org.uk; naus...@samsung.com;
 tomasz.f...@gmail.com; thomas...@samsung.com; vikas.saj...@samsung.com
 Subject: Re: [PATCH v8 2/2] ARM: EXYNOS: Move PMU specific definitions
from
 common.h
 
 On Tuesday 30 September 2014 15:51:21 Pankaj Dubey wrote:
 
  +static inline void pmu_raw_writel(u32 val, u32 offset) {
  +   __raw_writel(val, pmu_base_addr + offset); }
  +
  +static inline u32 pmu_raw_readl(u32 offset) {
  +   return __raw_readl(pmu_base_addr + offset); }
  +
 
 
 While you're at it, please convert these to use readl_relaxed() instead,
which is safe to
 use in drivers and works independent of CPU endianess.
 

OK, I will update this. 

Thanks,
Pankaj Dubey
   Arnd

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Re: [PATCH v7 00/11] kernel: Add support for restart handler call chain

2014-09-30 Thread Guenter Roeck


On 09/30/2014 04:40 PM, Stephen Rothwell wrote:

Hi Guenter,

On Tue, 30 Sep 2014 15:30:00 -0700 Guenter Roeck li...@roeck-us.net wrote:


On Tue, Sep 30, 2014 at 02:20:02PM -0700, Andrew Morton wrote:

On Tue, 19 Aug 2014 17:45:27 -0700 Guenter Roeck li...@roeck-us.net wrote:


Introduce a system restart handler call chain to solve the described problems.


So someone has merged eight of these patches into linux-next but these
three:

watchdog-s3c2410-add-restart-handler.patch
clk-samsung-register-restart-handlers-for-s3c2412-and-s3c2443.patch
clk-rockchip-add-restart-handler.patch

were omitted.  What's up?


Most likely PBKC on my side; Looks like I forgot to add those when I created
the immutable branch for others to merge. Sorry for that :-(.

Having said that, I somehow thought that the clock patches would go in through
the clock tree. Heiko, did I get that wrong ? Separately, I sent a pull request
that includes the watchdog patch to Wim.


So far, that immutable branch has been merged into the battery tree
(and thus into linux-next) by Sebastian in order to add (I assume):

18a702e0de98 power: reset: use restart_notifier mechanism for msm-poweroff
371bb20d6927 power: Add simple gpio-restart driver

on top of it.

So, I guess the watchdog and clk trees also need to merge that
immutable branch and then add their respective patches from the mmotm
series to their trees.


Yes, and now I remember why I did not include those patches: They are not
authored by myself. I thought it was not appropriate for me to include them
in the branch I created. Maybe flawed thinking, but that was my reasoning.

Guenter

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Re: [PATCH] drm/exynos: remove ifdeferry from initialization code

2014-09-30 Thread Inki Dae

On 2014년 09월 30일 20:29, Andrzej Hajda wrote:
 Hi Inki,
 
 Gently ping.

Hi Andrzej,

I merged it to local repository to test. But now exynos drm doesn't work
correctly since pulling drm-next of Dave regardless of your patch.

Problems are,
1. error occurs when we try to test modetest with -v option from second
times.
2. error occurs when we try to test unbind.

Now we are checking these problems. Can you try to also check it?

Thanks,
Inki Dae

 
 Andrzej
 
 On 09/10/2014 01:53 PM, Andrzej Hajda wrote:
 The patch replaces separate calls to driver (de)registration by
 loops over the array of drivers. As a result it significantly
 decreases number of ifdefs. Additionally it moves device registration
 related ifdefs to header file.

 Signed-off-by: Andrzej Hajda a.ha...@samsung.com
 ---
 Hi Inki,

 During testing your component match support patch [1] I have prepared patch
 removing most ifdefs from exynos_drm_drv.c. It is based on your patch, but
 I can rebase it if necessary.

 [1]: http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/37031

 Regards
 Andrzej
 ---
  drivers/gpu/drm/exynos/exynos_drm_drv.c | 170 
 +++-
  drivers/gpu/drm/exynos/exynos_drm_drv.h |  25 +++--
  2 files changed, 48 insertions(+), 147 deletions(-)

 diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
 b/drivers/gpu/drm/exynos/exynos_drm_drv.c
 index b2c710a..a660e46 100644
 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
 +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
 @@ -553,74 +553,54 @@ static const struct component_master_ops 
 exynos_drm_ops = {
  .unbind = exynos_drm_unbind,
  };
  
 -static int exynos_drm_platform_probe(struct platform_device *pdev)
 -{
 -struct component_match *match;
 -int ret;
 -
 -pdev-dev.coherent_dma_mask = DMA_BIT_MASK(32);
 -exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls);
 -
 +static struct platform_driver * const exynos_drm_drivers[] = {
  #ifdef CONFIG_DRM_EXYNOS_FIMD
 -ret = platform_driver_register(fimd_driver);
 -if (ret  0)
 -return ret;
 +fimd_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_DP
 -ret = platform_driver_register(dp_driver);
 -if (ret  0)
 -goto err_unregister_fimd_drv;
 +dp_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_DSI
 -ret = platform_driver_register(dsi_driver);
 -if (ret  0)
 -goto err_unregister_dp_drv;
 +dsi_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_HDMI
 -ret = platform_driver_register(mixer_driver);
 -if (ret  0)
 -goto err_unregister_dsi_drv;
 -ret = platform_driver_register(hdmi_driver);
 -if (ret  0)
 -goto err_unregister_mixer_drv;
 +mixer_driver,
 +hdmi_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_G2D
 -ret = platform_driver_register(g2d_driver);
 -if (ret  0)
 -goto err_unregister_hdmi_drv;
 +g2d_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_FIMC
 -ret = platform_driver_register(fimc_driver);
 -if (ret  0)
 -goto err_unregister_g2d_drv;
 +fimc_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_ROTATOR
 -ret = platform_driver_register(rotator_driver);
 -if (ret  0)
 -goto err_unregister_fimc_drv;
 +rotator_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_GSC
 -ret = platform_driver_register(gsc_driver);
 -if (ret  0)
 -goto err_unregister_rotator_drv;
 +gsc_driver,
  #endif
 -
  #ifdef CONFIG_DRM_EXYNOS_IPP
 -ret = platform_driver_register(ipp_driver);
 -if (ret  0)
 -goto err_unregister_gsc_drv;
 +ipp_driver,
 +#endif
 +};
 +
 +static int exynos_drm_platform_probe(struct platform_device *pdev)
 +{
 +struct component_match *match;
 +int ret, i;
 +
 +pdev-dev.coherent_dma_mask = DMA_BIT_MASK(32);
 +exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls);
 +
 +for (i = 0; i  ARRAY_SIZE(exynos_drm_drivers); ++i) {
 +ret = platform_driver_register(exynos_drm_drivers[i]);
 +if (ret  0)
 +goto err_unregister_drivers;
 +}
  
  ret = exynos_platform_device_ipp_register();
  if (ret  0)
 -goto err_unregister_ipp_drv;
 -#endif
 +goto err_unregister_drivers;
  
  match = exynos_drm_match_add(pdev-dev);
  if (IS_ERR(match)) {
 @@ -632,96 +612,24 @@ static int exynos_drm_platform_probe(struct 
 platform_device *pdev)
  match);
  
  err_unregister_ipp_dev:
 -
 -#ifdef CONFIG_DRM_EXYNOS_IPP
  exynos_platform_device_ipp_unregister();
 -err_unregister_ipp_drv:
 -platform_driver_unregister(ipp_driver);
 -err_unregister_gsc_drv:
 -#endif
  
 -#ifdef CONFIG_DRM_EXYNOS_GSC
 -platform_driver_unregister(gsc_driver);
 -err_unregister_rotator_drv:
 -#endif
 +err_unregister_drivers:
 +while (--i = 0)
 +platform_driver_unregister(exynos_drm_drivers[i]);
  
 -#ifdef CONFIG_DRM_EXYNOS_ROTATOR
 -

[PATCH 1/2] clk: samsung: exynos5440: move restart code into clock driver

Let's register reboot_notifier for Exynos5440 from it's clock driver
for reboot functionality. So that we can cleanup restart hooks from
machine specific file.

CC: Sylwester Nawrocki s.nawro...@samsung.com
CC: Mike Turquette mturque...@linaro.org
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
 arch/arm/mach-exynos/exynos.c|   13 
 drivers/clk/samsung/clk-exynos5440.c |   37 ++
 2 files changed, 37 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 2f2f7b2..d56134a 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -143,19 +143,6 @@ static void exynos_restart(enum reboot_mode mode, const 
char *cmd)
u32 val = 0x1;
void __iomem *addr = pmu_base_addr + EXYNOS_SWRESET;
 
-   if (of_machine_is_compatible(samsung,exynos5440)) {
-   u32 status;
-   np = of_find_compatible_node(NULL, NULL, 
samsung,exynos5440-clock);
-
-   addr = of_iomap(np, 0) + 0xbc;
-   status = __raw_readl(addr);
-
-   addr = of_iomap(np, 0) + 0xcc;
-   val = __raw_readl(addr);
-
-   val = (val  0x) | (status  0x);
-   }
-
__raw_writel(val, addr);
 }
 
diff --git a/drivers/clk/samsung/clk-exynos5440.c 
b/drivers/clk/samsung/clk-exynos5440.c
index 00d1d00..171d3af 100644
--- a/drivers/clk/samsung/clk-exynos5440.c
+++ b/drivers/clk/samsung/clk-exynos5440.c
@@ -15,6 +15,8 @@
 #include linux/clk-provider.h
 #include linux/of.h
 #include linux/of_address.h
+#include linux/notifier.h
+#include linux/reboot.h
 
 #include clk.h
 #include clk-pll.h
@@ -89,6 +91,38 @@ static const struct of_device_id ext_clk_match[] __initconst 
= {
{},
 };
 
+static int exynos5440_clk_reboot_notify_handler(struct notifier_block *this,
+   unsigned long code, void *unused)
+{
+   if (code == SYS_RESTART) {
+   struct device_node *np;
+   void __iomem *addr;
+   u32 val, status;
+
+   np = of_find_compatible_node(NULL, NULL,
+   samsung,exynos5440-clock);
+
+   addr = of_iomap(np, 0) + 0xbc;
+   status = readl_relaxed(addr);
+
+   addr = of_iomap(np, 0) + 0xcc;
+   val = readl_relaxed(addr);
+
+   val = (val  0x) | (status  0x);
+
+   writel_relaxed(val, addr);
+   }
+   return NOTIFY_DONE;
+}
+
+/*
+ * Exynos5440 Clock reboot notifier, handles reboot functionality
+ */
+static struct notifier_block exynos5440_clk_reboot_notifier = {
+   .notifier_call = exynos5440_clk_reboot_notify_handler,
+   .priority = 128,
+};
+
 /* register exynos5440 clocks */
 static void __init exynos5440_clk_init(struct device_node *np)
 {
@@ -125,6 +159,9 @@ static void __init exynos5440_clk_init(struct device_node 
*np)
 
samsung_clk_of_add_provider(np, ctx);
 
+   if (register_reboot_notifier(exynos5440_clk_reboot_notifier))
+   pr_err(exynos5440 clock can't register reboot notifier\n);
+
pr_info(Exynos5440: arm_clk = %ldHz\n, _get_rate(arm_clk));
pr_info(exynos5440 clock initialization complete\n);
 }
-- 
1.7.9.5

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[PATCH 2/2] ARM: EXYNOS: PMU: move restart code into pmu driver