date:20141020

This patch adds a call to s3c_hsotg_disconnect() from 'end session'
interrupt (GOTGINT_SES_END_DET) to correctly notify gadget subsystem
about unplugged usb cable. 'disconnected' interrupt (DISCONNINT) might
look a bit more suitable for this event, but it is asserted only in
host mode, so in device mode we need to use something else.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/usb/dwc2/gadget.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 7b5856fadd93..119c8a3effc2 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2279,6 +2279,12 @@ irq_retry:
dev_info(hsotg-dev, OTGInt: %08x\n, otgint);
 
writel(otgint, hsotg-regs + GOTGINT);
+
+   if (otgint  GOTGINT_SES_END_DET) {
+   if (hsotg-gadget.speed != USB_SPEED_UNKNOWN)
+   s3c_hsotg_disconnect(hsotg);
+   hsotg-gadget.speed = USB_SPEED_UNKNOWN;
+   }
}
 
if (gintsts  GINTSTS_SESSREQINT) {
-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 00/10] more dwc2/gadget fixes

Hi!

This patchset contains a set of fixes to solve vaious minor issues
related to cable connect/disconnect events, pull-up control,
soft-disconnect mode, proper usb phy operation and restoring gadget
state after suspend/resume cycle.

Changes since v1 (http://www.spinics.net/lists/linux-samsung-soc/msg37842.html):
- fixed issues spotted by Felipe Balbi

Best regards
Marek Szyprowski, PhD
Samsung RD Institute Poland

Marek Szyprowski (10):
  usb: dwc2/gadget: report disconnect event from 'end session' irq
  usb: dwc2/gadget: fix enumeration issues
  usb: dwc2/gadget: fix gadget unregistration in udc_stop() function
  usb: dwc2/gadget: disable phy before turning off power regulators
  usb: dwc2/gadget: move setting last reset time to s3c_hsotg_core_init
  usb: dwc2/gadget: decouple setting soft-disconnect from
s3c_hsotg_core_init
  usb: dwc2/gadget: move phy control calls out of pullup() method
  usb: dwc2/gadget: use soft-disconnect udc feature in pullup() method
  usb: dwc2/gadget: fix calls to phy control functions in suspend/resume
code
  usb: dwc2/gadget: rework suspend/resume code to correctly restore
gadget state

 drivers/usb/dwc2/core.h   |  4 +-
 drivers/usb/dwc2/gadget.c | 95 ---
 2 files changed, 69 insertions(+), 30 deletions(-)

-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 09/10] usb: dwc2/gadget: fix calls to phy control functions in suspend/resume code

This patch moves calls to phy enable/disable out of spinlock protected
blocks in device suspend/resume to fix incorrect caller context. Phy
related functions must not be called from atomic context. To protect
device internal state from a race during suspend, a call to
s3c_hsotg_core_disconnect() is added under a spinlock, what prevents any
further activity on the usb bus.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/usb/dwc2/gadget.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index e8ffc080e6c7..0d34cfc71bfb 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3653,11 +3653,13 @@ static int s3c_hsotg_suspend(struct platform_device 
*pdev, pm_message_t state)
 hsotg-driver-driver.name);
 
spin_lock_irqsave(hsotg-lock, flags);
+   s3c_hsotg_core_disconnect(hsotg);
s3c_hsotg_disconnect(hsotg);
-   s3c_hsotg_phy_disable(hsotg);
hsotg-gadget.speed = USB_SPEED_UNKNOWN;
spin_unlock_irqrestore(hsotg-lock, flags);
 
+   s3c_hsotg_phy_disable(hsotg);
+
if (hsotg-driver) {
int ep;
for (ep = 0; ep  hsotg-num_of_eps; ep++)
@@ -3686,8 +3688,9 @@ static int s3c_hsotg_resume(struct platform_device *pdev)
  hsotg-supplies);
}
 
-   spin_lock_irqsave(hsotg-lock, flags);
s3c_hsotg_phy_enable(hsotg);
+
+   spin_lock_irqsave(hsotg-lock, flags);
s3c_hsotg_core_init_disconnected(hsotg);
s3c_hsotg_core_connect(hsotg);
spin_unlock_irqrestore(hsotg-lock, flags);
-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 02/10] usb: dwc2/gadget: fix enumeration issues

Excessive debug messages might cause timing issues that prevent correct
usb enumeration. This patch hides information about USB bus reset to let
driver enumerate fast enough to avoid making host angry. This fixes
endless enumeration and usb reset loop observed with some Linux hosts.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Reviewed-by: Felipe Balbi ba...@ti.com
---
 drivers/usb/dwc2/gadget.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 119c8a3effc2..8870e38c1d82 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2333,7 +2333,7 @@ irq_retry:
 
u32 usb_status = readl(hsotg-regs + GOTGCTL);
 
-   dev_info(hsotg-dev, %s: USBRst\n, __func__);
+   dev_dbg(hsotg-dev, %s: USBRst\n, __func__);
dev_dbg(hsotg-dev, GNPTXSTS=%08x\n,
readl(hsotg-regs + GNPTXSTS));
 
-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 10/10] usb: dwc2/gadget: rework suspend/resume code to correctly restore gadget state

Suspend/resume code assumed that the gadget was always enabled and
connected to usb bus. This means that the actual state of the gadget
(soft-enabled/disabled or connected/disconnected) was not correctly
preserved on suspend/resume cycle. This patch fixes this issue.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/usb/dwc2/core.h   |  4 +++-
 drivers/usb/dwc2/gadget.c | 43 +++
 2 files changed, 30 insertions(+), 17 deletions(-)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index bf015ab3b44c..3648b76a18b4 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -210,7 +210,9 @@ struct s3c_hsotg {
u8  ctrl_buff[8];
 
struct usb_gadget   gadget;
-   unsigned intsetup;
+   unsigned intsetup:1;
+   unsigned intconnected:1;
+   unsigned intenabled:1;
unsigned long   last_rst;
struct s3c_hsotg_ep *eps;
 };
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 0d34cfc71bfb..c6c6cf982c90 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2925,6 +2925,8 @@ static int s3c_hsotg_udc_start(struct usb_gadget *gadget,
spin_lock_irqsave(hsotg-lock, flags);
s3c_hsotg_init(hsotg);
s3c_hsotg_core_init_disconnected(hsotg);
+   hsotg-enabled = 1;
+   hsotg-connected = 0;
spin_unlock_irqrestore(hsotg-lock, flags);
 
dev_info(hsotg-dev, bound driver %s\n, driver-driver.name);
@@ -2961,6 +2963,8 @@ static int s3c_hsotg_udc_stop(struct usb_gadget *gadget,
 
hsotg-driver = NULL;
hsotg-gadget.speed = USB_SPEED_UNKNOWN;
+   hsotg-enabled = 0;
+   hsotg-connected = 0;
 
spin_unlock_irqrestore(hsotg-lock, flags);
 
@@ -2999,11 +3003,14 @@ static int s3c_hsotg_pullup(struct usb_gadget *gadget, 
int is_on)
dev_dbg(hsotg-dev, %s: is_on: %d\n, __func__, is_on);
 
spin_lock_irqsave(hsotg-lock, flags);
+
if (is_on) {
clk_enable(hsotg-clk);
+   hsotg-connected = 1;
s3c_hsotg_core_connect(hsotg);
} else {
s3c_hsotg_core_disconnect(hsotg);
+   hsotg-connected = 0;
clk_disable(hsotg-clk);
}
 
@@ -3652,16 +3659,18 @@ static int s3c_hsotg_suspend(struct platform_device 
*pdev, pm_message_t state)
dev_info(hsotg-dev, suspending usb gadget %s\n,
 hsotg-driver-driver.name);
 
-   spin_lock_irqsave(hsotg-lock, flags);
-   s3c_hsotg_core_disconnect(hsotg);
-   s3c_hsotg_disconnect(hsotg);
-   hsotg-gadget.speed = USB_SPEED_UNKNOWN;
-   spin_unlock_irqrestore(hsotg-lock, flags);
+   if (hsotg-enabled) {
+   int ep;
 
-   s3c_hsotg_phy_disable(hsotg);
+   spin_lock_irqsave(hsotg-lock, flags);
+   if (hsotg-connected)
+   s3c_hsotg_core_disconnect(hsotg);
+   s3c_hsotg_disconnect(hsotg);
+   hsotg-gadget.speed = USB_SPEED_UNKNOWN;
+   spin_unlock_irqrestore(hsotg-lock, flags);
+
+   s3c_hsotg_phy_disable(hsotg);
 
-   if (hsotg-driver) {
-   int ep;
for (ep = 0; ep  hsotg-num_of_eps; ep++)
s3c_hsotg_ep_disable(hsotg-eps[ep].ep);
 
@@ -3679,21 +3688,23 @@ static int s3c_hsotg_resume(struct platform_device 
*pdev)
unsigned long flags;
int ret = 0;
 
-   if (hsotg-driver) {
+   if (hsotg-driver)
dev_info(hsotg-dev, resuming usb gadget %s\n,
 hsotg-driver-driver.name);
 
+   if (hsotg-enabled) {
clk_enable(hsotg-clk);
ret = regulator_bulk_enable(ARRAY_SIZE(hsotg-supplies),
- hsotg-supplies);
-   }
+   hsotg-supplies);
 
-   s3c_hsotg_phy_enable(hsotg);
+   s3c_hsotg_phy_enable(hsotg);
 
-   spin_lock_irqsave(hsotg-lock, flags);
-   s3c_hsotg_core_init_disconnected(hsotg);
-   s3c_hsotg_core_connect(hsotg);
-   spin_unlock_irqrestore(hsotg-lock, flags);
+   spin_lock_irqsave(hsotg-lock, flags);
+   s3c_hsotg_core_init_disconnected(hsotg);
+   if (hsotg-connected)
+   s3c_hsotg_core_connect(hsotg);
+   spin_unlock_irqrestore(hsotg-lock, flags);
+   }
 
return ret;
 }
-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 06/10] usb: dwc2/gadget: decouple setting soft-disconnect from s3c_hsotg_core_init

This patch changes s3c_hsotg_core_init function to leave hardware in
soft disconnect mode, so the moment of coupling the hardware to the usb
bus can be later controlled by the separate functions for enabling and
disabling soft disconnect mode. This patch is a preparation to rework
pullup() method.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/usb/dwc2/gadget.c | 22 +-
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index c1dad46bbbdd..5eb2473031c4 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2124,7 +2124,7 @@ static int s3c_hsotg_corereset(struct s3c_hsotg *hsotg)
  *
  * Issue a soft reset to the core, and await the core finishing it.
  */
-static void s3c_hsotg_core_init(struct s3c_hsotg *hsotg)
+static void s3c_hsotg_core_init_disconnected(struct s3c_hsotg *hsotg)
 {
s3c_hsotg_corereset(hsotg);
 
@@ -2241,14 +2241,23 @@ static void s3c_hsotg_core_init(struct s3c_hsotg *hsotg)
readl(hsotg-regs + DOEPCTL0));
 
/* clear global NAKs */
-   writel(DCTL_CGOUTNAK | DCTL_CGNPINNAK,
+   writel(DCTL_CGOUTNAK | DCTL_CGNPINNAK | DCTL_SFTDISCON,
   hsotg-regs + DCTL);
 
/* must be at-least 3ms to allow bus to see disconnect */
mdelay(3);
 
hsotg-last_rst = jiffies;
+}
+
+static void s3c_hsotg_core_disconnect(struct s3c_hsotg *hsotg)
+{
+   /* set the soft-disconnect bit */
+   __orr32(hsotg-regs + DCTL, DCTL_SFTDISCON);
+}
 
+static void s3c_hsotg_core_connect(struct s3c_hsotg *hsotg)
+{
/* remove the soft-disconnect and let's go */
__bic32(hsotg-regs + DCTL, DCTL_SFTDISCON);
 }
@@ -2348,7 +2357,8 @@ irq_retry:
kill_all_requests(hsotg, hsotg-eps[0],
  -ECONNRESET, true);
 
-   s3c_hsotg_core_init(hsotg);
+   s3c_hsotg_core_init_disconnected(hsotg);
+   s3c_hsotg_core_connect(hsotg);
}
}
}
@@ -2981,7 +2991,8 @@ static int s3c_hsotg_pullup(struct usb_gadget *gadget, 
int is_on)
if (is_on) {
s3c_hsotg_phy_enable(hsotg);
clk_enable(hsotg-clk);
-   s3c_hsotg_core_init(hsotg);
+   s3c_hsotg_core_init_disconnected(hsotg);
+   s3c_hsotg_core_connect(hsotg);
} else {
clk_disable(hsotg-clk);
s3c_hsotg_phy_disable(hsotg);
@@ -3668,7 +3679,8 @@ static int s3c_hsotg_resume(struct platform_device *pdev)
 
spin_lock_irqsave(hsotg-lock, flags);
s3c_hsotg_phy_enable(hsotg);
-   s3c_hsotg_core_init(hsotg);
+   s3c_hsotg_core_init_disconnected(hsotg);
+   s3c_hsotg_core_connect(hsotg);
spin_unlock_irqrestore(hsotg-lock, flags);
 
return ret;
-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 03/10] usb: dwc2/gadget: fix gadget unregistration in udc_stop() function

udc_stop() should clear -driver pointer unconditionally to let the UDC
framework to work correctly with both registering/unregistering gadgets
and enabling/disabling gadgets by writing to
/sys/class/udc/*hsotg/soft_connect interface.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/usb/dwc2/gadget.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 8870e38c1d82..a4b4def23afd 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2940,9 +2940,7 @@ static int s3c_hsotg_udc_stop(struct usb_gadget *gadget,
 
spin_lock_irqsave(hsotg-lock, flags);
 
-   if (!driver)
-   hsotg-driver = NULL;
-
+   hsotg-driver = NULL;
hsotg-gadget.speed = USB_SPEED_UNKNOWN;
 
spin_unlock_irqrestore(hsotg-lock, flags);
-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 8/9] usb: dwc2/gadget: fix calls to phy control functions in suspend/resume code


Hello,

On 2014-10-16 15:42, Felipe Balbi wrote:

On Thu, Oct 16, 2014 at 02:58:04PM +0200, Marek Szyprowski wrote:

This patch moves calls to phy enable/disable out of spinlock protected
blocks in device suspend/resume to fix incorrect caller context. Phy
related functions must not be called from atomic context.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
  drivers/usb/dwc2/gadget.c | 9 ++---
  1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index cdf417a7ae63..052b1a857291 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3656,11 +3656,13 @@ static int s3c_hsotg_suspend(struct platform_device 
*pdev, pm_message_t state)
 hsotg-driver-driver.name);
  
  	spin_lock_irqsave(hsotg-lock, flags);

+   s3c_hsotg_core_disconnect(hsotg);
s3c_hsotg_disconnect(hsotg);
-   s3c_hsotg_phy_disable(hsotg);
hsotg-gadget.speed = USB_SPEED_UNKNOWN;
spin_unlock_irqrestore(hsotg-lock, flags);
  
+	s3c_hsotg_phy_disable(hsotg);

this is aching to have a locked version as well as an unlocked version.
Look at what you do here. There's a minor race when you release that
spinlock. By the time -suspend() is called, IRQs are not yet disabled.


s3c_hsotg_core_disconnect() disconnects the udc hardware from the usb bus, so 
even
if the irq comes before s3c_hsotg_phy_disable(), nothing wrong happens, because 
the
driver state is already set to disconnected.

Best regards
--
Marek Szyprowski, PhD
Samsung RD Institute Poland

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 6/9] usb: dwc2/gadget: decouple setting soft disconnect from s3c_hsotg_core_init


Hello,

On 2014-10-16 15:38, Felipe Balbi wrote:

On Thu, Oct 16, 2014 at 02:58:02PM +0200, Marek Szyprowski wrote:

This patch changes s3c_hsotg_core_init function to leave hardware in
soft disconnect mode, so the actual moment of coupling the hardware to
the usb bus can be later controlled by the driver in the more accurate

what is this more accurate way you talk about ? Why is it more
accurate ? Perhaps you have failed some USB Certification test ? Which
test id was that ? Why did it fail ? and why does this patch solve the
issue ?


This patch is just a preparation for the next patches, which introduces 
usage

of soft-disconnect feature in pullup() method.


way. For this purpose, separate functions for enabling and disabling
soft disconnect mode have been added.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
  drivers/usb/dwc2/gadget.c | 22 +-
  1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 1ba0682fb252..d039334967d7 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2124,7 +2124,7 @@ static int s3c_hsotg_corereset(struct s3c_hsotg *hsotg)
   *
   * Issue a soft reset to the core, and await the core finishing it.
   */
-static void s3c_hsotg_core_init(struct s3c_hsotg *hsotg)
+static void s3c_hsotg_core_init_disconnected(struct s3c_hsotg *hsotg)
  {
s3c_hsotg_corereset(hsotg);
  
@@ -2241,14 +2241,23 @@ static void s3c_hsotg_core_init(struct s3c_hsotg *hsotg)

readl(hsotg-regs + DOEPCTL0));
  
  	/* clear global NAKs */

-   writel(DCTL_CGOUTNAK | DCTL_CGNPINNAK,
+   writel(DCTL_CGOUTNAK | DCTL_CGNPINNAK | DCTL_SFTDISCON,
   hsotg-regs + DCTL);
  
  	/* must be at-least 3ms to allow bus to see disconnect */

mdelay(3);
  
  	hsotg-last_rst = jiffies;

+}
+
+static void s3c_hsotg_core_disconnect(struct s3c_hsotg *hsotg)
+{
+   /* set the soft-disconnect bit */
+   __orr32(hsotg-regs + DCTL, DCTL_SFTDISCON);
+}
  
+static void s3c_hsotg_core_connect(struct s3c_hsotg *hsotg)

+{
/* remove the soft-disconnect and let's go */
__bic32(hsotg-regs + DCTL, DCTL_SFTDISCON);
  }
@@ -2348,7 +2357,8 @@ irq_retry:
kill_all_requests(hsotg, hsotg-eps[0],
  -ECONNRESET, true);
  
-s3c_hsotg_core_init(hsotg);

+   s3c_hsotg_core_init_disconnected(hsotg);
+   s3c_hsotg_core_connect(hsotg);
}
}
}
@@ -2983,7 +2993,8 @@ static int s3c_hsotg_pullup(struct usb_gadget *gadget, 
int is_on)
if (is_on) {
s3c_hsotg_phy_enable(hsotg);
clk_enable(hsotg-clk);
-   s3c_hsotg_core_init(hsotg);
+   s3c_hsotg_core_init_disconnected(hsotg);
+   s3c_hsotg_core_connect(hsotg);
} else {
clk_disable(hsotg-clk);
s3c_hsotg_phy_disable(hsotg);
@@ -3670,7 +3681,8 @@ static int s3c_hsotg_resume(struct platform_device *pdev)
  
  	spin_lock_irqsave(hsotg-lock, flags);

s3c_hsotg_phy_enable(hsotg);
-   s3c_hsotg_core_init(hsotg);
+   s3c_hsotg_core_init_disconnect(hsotg);
+   s3c_hsotg_core_connect(hsotg);
spin_unlock_irqrestore(hsotg-lock, flags);
  
  	return ret;

--
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-usb in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html



Best regards
--
Marek Szyprowski, PhD
Samsung RD Institute Poland

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 08/10] usb: dwc2/gadget: use soft-disconnect udc feature in pullup() method

This patch moves udc initialization from pullup() method to
s3c_hsotg_udc_start(), so that method ends with hardware fully
initialized and left in soft-disconnected state. After this change, the
pullup() method simply clears soft-disconnect start() when called with
is_on=1. For completeness, a call to s3c_hsotg_core_disconnect() has
been added when pullup() method is called with is_on=0, what puts the
udc hardware back to soft-disconnected state.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/usb/dwc2/gadget.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 98adf8d17493..e8ffc080e6c7 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2883,6 +2883,7 @@ static int s3c_hsotg_udc_start(struct usb_gadget *gadget,
   struct usb_gadget_driver *driver)
 {
struct s3c_hsotg *hsotg = to_hsotg(gadget);
+   unsigned long flags;
int ret;
 
if (!hsotg) {
@@ -2921,7 +2922,13 @@ static int s3c_hsotg_udc_start(struct usb_gadget *gadget,
 
s3c_hsotg_phy_enable(hsotg);
 
+   spin_lock_irqsave(hsotg-lock, flags);
+   s3c_hsotg_init(hsotg);
+   s3c_hsotg_core_init_disconnected(hsotg);
+   spin_unlock_irqrestore(hsotg-lock, flags);
+
dev_info(hsotg-dev, bound driver %s\n, driver-driver.name);
+
return 0;
 
 err:
@@ -2994,9 +3001,9 @@ static int s3c_hsotg_pullup(struct usb_gadget *gadget, 
int is_on)
spin_lock_irqsave(hsotg-lock, flags);
if (is_on) {
clk_enable(hsotg-clk);
-   s3c_hsotg_core_init_disconnected(hsotg);
s3c_hsotg_core_connect(hsotg);
} else {
+   s3c_hsotg_core_disconnect(hsotg);
clk_disable(hsotg-clk);
}
 
-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 05/10] usb: dwc2/gadget: move setting last reset time to s3c_hsotg_core_init

This patch removes duplicated code and sets last_rst variable in the
function which does the hardware reset.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/usb/dwc2/gadget.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index fd52a8b23649..c1dad46bbbdd 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2247,6 +2247,8 @@ static void s3c_hsotg_core_init(struct s3c_hsotg *hsotg)
/* must be at-least 3ms to allow bus to see disconnect */
mdelay(3);
 
+   hsotg-last_rst = jiffies;
+
/* remove the soft-disconnect and let's go */
__bic32(hsotg-regs + DCTL, DCTL_SFTDISCON);
 }
@@ -2347,7 +2349,6 @@ irq_retry:
  -ECONNRESET, true);
 
s3c_hsotg_core_init(hsotg);
-   hsotg-last_rst = jiffies;
}
}
}
@@ -2908,7 +2909,6 @@ static int s3c_hsotg_udc_start(struct usb_gadget *gadget,
goto err;
}
 
-   hsotg-last_rst = jiffies;
dev_info(hsotg-dev, bound driver %s\n, driver-driver.name);
return 0;
 
@@ -3667,7 +3667,6 @@ static int s3c_hsotg_resume(struct platform_device *pdev)
}
 
spin_lock_irqsave(hsotg-lock, flags);
-   hsotg-last_rst = jiffies;
s3c_hsotg_phy_enable(hsotg);
s3c_hsotg_core_init(hsotg);
spin_unlock_irqrestore(hsotg-lock, flags);
-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 04/10] usb: dwc2/gadget: disable phy before turning off power regulators

This patch fixes probe function to match the pattern used elsewhere in
the driver, where power regulators are turned off as the last element in
the device shutdown procedure.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/usb/dwc2/gadget.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index a4b4def23afd..fd52a8b23649 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3571,6 +3571,7 @@ static int s3c_hsotg_probe(struct platform_device *pdev)
s3c_hsotg_initep(hsotg, hsotg-eps[epnum], epnum);
 
/* disable power and clock */
+   s3c_hsotg_phy_disable(hsotg);
 
ret = regulator_bulk_disable(ARRAY_SIZE(hsotg-supplies),
hsotg-supplies);
@@ -3579,8 +3580,6 @@ static int s3c_hsotg_probe(struct platform_device *pdev)
goto err_ep_mem;
}
 
-   s3c_hsotg_phy_disable(hsotg);
-
ret = usb_add_gadget_udc(pdev-dev, hsotg-gadget);
if (ret)
goto err_ep_mem;
-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 07/10] usb: dwc2/gadget: move phy control calls out of pullup() method

This patch moves phy enable/disable calls from pullup() method to
udc_start/stop functions. This solves the issue related to limited caller
context for PHY functions, because they cannot be called from non-sleeping
context. This is also a preparation for using soft-disconnect feature of
udc controller in pullup() method.

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 drivers/usb/dwc2/gadget.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 5eb2473031c4..98adf8d17493 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2919,6 +2919,8 @@ static int s3c_hsotg_udc_start(struct usb_gadget *gadget,
goto err;
}
 
+   s3c_hsotg_phy_enable(hsotg);
+
dev_info(hsotg-dev, bound driver %s\n, driver-driver.name);
return 0;
 
@@ -2955,6 +2957,8 @@ static int s3c_hsotg_udc_stop(struct usb_gadget *gadget,
 
spin_unlock_irqrestore(hsotg-lock, flags);
 
+   s3c_hsotg_phy_disable(hsotg);
+
regulator_bulk_disable(ARRAY_SIZE(hsotg-supplies), hsotg-supplies);
 
clk_disable(hsotg-clk);
@@ -2989,13 +2993,11 @@ static int s3c_hsotg_pullup(struct usb_gadget *gadget, 
int is_on)
 
spin_lock_irqsave(hsotg-lock, flags);
if (is_on) {
-   s3c_hsotg_phy_enable(hsotg);
clk_enable(hsotg-clk);
s3c_hsotg_core_init_disconnected(hsotg);
s3c_hsotg_core_connect(hsotg);
} else {
clk_disable(hsotg-clk);
-   s3c_hsotg_phy_disable(hsotg);
}
 
hsotg-gadget.speed = USB_SPEED_UNKNOWN;
-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v3 0/2] serial: samsung: add support for early console

This patchset adds support for early console defined in device tree. As
an example, DTS files for all Exynos4 based machines are updated with
the correct value for common chosen/sdtout property.

To get it fully functional on ARM architecture, additional improvements
(support for early_ioremap) are needed in early console code.

Best regards
Marek Szyprowski
Samsung RD Institute Poland

Change log:

v3:
- rebased onto v3.18-rc1
- removed options from documentation (they are not yet supported)

v2: http://www.spinics.net/lists/linux-samsung-soc/msg37278.html
- added support for command line based initialization

v1: http://www.spinics.net/lists/linux-samsung-soc/msg37094.html
- initial version

Tomasz Figa (2):
  serial: samsung: Add support for early console
  ARM: dts: exynos4: Add stdout-path properties

 Documentation/kernel-parameters.txt |  12 +++
 arch/arm/boot/dts/exynos4210-origen.dts |   1 +
 arch/arm/boot/dts/exynos4210-smdkv310.dts   |   1 +
 arch/arm/boot/dts/exynos4210-trats.dts  |   1 +
 arch/arm/boot/dts/exynos4210-universal_c210.dts |   1 +
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi |   4 +
 arch/arm/boot/dts/exynos4412-origen.dts |   1 +
 arch/arm/boot/dts/exynos4412-smdk4412.dts   |   1 +
 arch/arm/boot/dts/exynos4412-tiny4412.dts   |   4 +
 arch/arm/boot/dts/exynos4412-trats2.dts |   1 +
 drivers/tty/serial/Kconfig  |   1 +
 drivers/tty/serial/samsung.c| 103 
 12 files changed, 131 insertions(+)

-- 
1.9.2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v3 1/2] serial: samsung: Add support for early console

From: Tomasz Figa t.f...@samsung.com

This patch adds support for early console initialized from device tree
and kernel command line to all variants of Samsung serial driver.

Signed-off-by: Tomasz Figa t.f...@samsung.com
[mszyprow: added support for command line based initialization,
   fixed comments, added documentation]
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Reviewed-by: Alim Akhtar alim.akh...@samsung.com
Tested-by: Alim Akhtar alim.akh...@samsung.com
---
 Documentation/kernel-parameters.txt |  12 +
 drivers/tty/serial/Kconfig  |   1 +
 drivers/tty/serial/samsung.c| 103 
 3 files changed, 116 insertions(+)

diff --git a/Documentation/kernel-parameters.txt 
b/Documentation/kernel-parameters.txt
index 7dbe5ec9d9cd..24f363108ab3 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -961,6 +961,18 @@ bytes respectively. Such letter suffixes can also be 
entirely omitted.
 
smh Use ARM semihosting calls for early console.
 
+   s3c2410,addr
+   s3c2412,addr
+   s3c2440,addr
+   s3c6400,addr
+   s5pv210,addr
+   exynos4210,addr
+   Use early console provided by serial driver available
+   on Samsung SoCs, requires selecting proper type and
+   a correct base address of the selected UART port. The
+   serial port must already be setup and configured.
+   Options are not yet supported.
+
earlyprintk=[X86,SH,BLACKFIN,ARM,M68k]
earlyprintk=vga
earlyprintk=efi
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 649b784081c7..50997be6cf6d 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -241,6 +241,7 @@ config SERIAL_SAMSUNG
tristate Samsung SoC serial support
depends on PLAT_SAMSUNG || ARCH_EXYNOS
select SERIAL_CORE
+   select SERIAL_EARLYCON
help
  Support for the on-chip UARTs on the Samsung S3C24XX series CPUs,
  providing /dev/ttySAC0, 1 and 2 (note, some machines may not
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index c78f43a481ce..8ad453a5d845 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1856,6 +1856,109 @@ static struct platform_driver samsung_serial_driver = {
 
 module_platform_driver(samsung_serial_driver);
 
+/*
+ * Early console.
+ */
+
+struct samsung_early_console_data {
+   u32 txfull_mask;
+};
+
+static void samsung_early_busyuart(struct uart_port *port)
+{
+   while (!(readl(port-membase + S3C2410_UTRSTAT)  S3C2410_UTRSTAT_TXFE))
+   ;
+}
+
+static void samsung_early_busyuart_fifo(struct uart_port *port)
+{
+   struct samsung_early_console_data *data = port-private_data;
+
+   while (readl(port-membase + S3C2410_UFSTAT)  data-txfull_mask)
+   ;
+}
+
+static void samsung_early_putc(struct uart_port *port, int c)
+{
+   if (readl(port-membase + S3C2410_UFCON)  S3C2410_UFCON_FIFOMODE)
+   samsung_early_busyuart_fifo(port);
+   else
+   samsung_early_busyuart(port);
+
+   writeb(c, port-membase + S3C2410_UTXH);
+}
+
+static void samsung_early_write(struct console *con, const char *s, unsigned n)
+{
+   struct earlycon_device *dev = con-data;
+
+   uart_console_write(dev-port, s, n, samsung_early_putc);
+}
+
+static int __init samsung_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+   if (!device-port.membase)
+   return -ENODEV;
+
+   device-con-write = samsung_early_write;
+   return 0;
+}
+
+/* S3C2410 */
+static struct samsung_early_console_data s3c2410_early_console_data = {
+   .txfull_mask = S3C2410_UFSTAT_TXFULL,
+};
+
+static int __init s3c2410_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+   device-port.private_data = s3c2410_early_console_data;
+   return samsung_early_console_setup(device, opt);
+}
+OF_EARLYCON_DECLARE(s3c2410, samsung,s3c2410-uart,
+   s3c2410_early_console_setup);
+EARLYCON_DECLARE(s3c2410, s3c2410_early_console_setup);
+
+/* S3C2412, S3C2440, S3C64xx */
+static struct samsung_early_console_data s3c2440_early_console_data = {
+   .txfull_mask = S3C2440_UFSTAT_TXFULL,
+};
+
+static int __init s3c2440_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+   device-port.private_data = s3c2440_early_console_data;
+   return samsung_early_console_setup(device, opt);
+}
+OF_EARLYCON_DECLARE(s3c2412, samsung,s3c2412-uart,
+   s3c2440_early_console_setup);

[PATCH v3 2/2] ARM: dts: exynos4: Add stdout-path properties

From: Tomasz Figa t.f...@samsung.com

This patch adds stdout-path property to chosen nodes of Exynos4 boards
to enable use of earlycon feature without the need to hardcode port
number in kernel itself.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 arch/arm/boot/dts/exynos4210-origen.dts | 1 +
 arch/arm/boot/dts/exynos4210-smdkv310.dts   | 1 +
 arch/arm/boot/dts/exynos4210-trats.dts  | 1 +
 arch/arm/boot/dts/exynos4210-universal_c210.dts | 1 +
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4 
 arch/arm/boot/dts/exynos4412-origen.dts | 1 +
 arch/arm/boot/dts/exynos4412-smdk4412.dts   | 1 +
 arch/arm/boot/dts/exynos4412-tiny4412.dts   | 4 
 arch/arm/boot/dts/exynos4412-trats2.dts | 1 +
 9 files changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-origen.dts 
b/arch/arm/boot/dts/exynos4210-origen.dts
index f767c425d0b5..b81146141402 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -31,6 +31,7 @@
 
chosen {
bootargs =root=/dev/ram0 rw ramdisk=8192 initrd=0x4100,8M 
console=ttySAC2,115200 init=/linuxrc;
+   stdout-path = serial_2;
};
 
regulators {
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts 
b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 676e6e0c8cf3..86216fff1b4f 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -27,6 +27,7 @@
 
chosen {
bootargs = root=/dev/ram0 rw ramdisk=8192 initrd=0x4100,8M 
console=ttySAC1,115200 init=/linuxrc;
+   stdout-path = serial_1;
};
 
sdhci@1253 {
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts 
b/arch/arm/boot/dts/exynos4210-trats.dts
index f516da9e8b3a..b351c7bddf2d 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -28,6 +28,7 @@
 
chosen {
bootargs = console=ttySAC2,115200N8 root=/dev/mmcblk0p5 
rootwait earlyprintk panic=5;
+   stdout-path = serial_2;
};
 
regulators {
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts 
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index d50eb3aa708e..e65ee3cb36c3 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -26,6 +26,7 @@
 
chosen {
bootargs = console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw 
rootwait earlyprintk panic=5 maxcpus=1;
+   stdout-path = serial_2;
};
 
sysram@0202 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index c697ff01ae8d..7c49bddf44b6 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -11,6 +11,10 @@
 #include exynos4412.dtsi
 
 / {
+   chosen {
+   stdout-path = serial_1;
+   };
+
firmware@0204F000 {
compatible = samsung,secure-firmware;
reg = 0x0204F000 0x1000;
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts 
b/arch/arm/boot/dts/exynos4412-origen.dts
index de15114fd07c..bd8b73077d41 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -26,6 +26,7 @@
 
chosen {
bootargs =console=ttySAC2,115200;
+   stdout-path = serial_2;
};
 
firmware@0203F000 {
diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts 
b/arch/arm/boot/dts/exynos4412-smdk4412.dts
index ded0b70f7644..b9256afbcc68 100644
--- a/arch/arm/boot/dts/exynos4412-smdk4412.dts
+++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts
@@ -25,6 +25,7 @@
 
chosen {
bootargs =root=/dev/ram0 rw ramdisk=8192 initrd=0x4100,8M 
console=ttySAC1,115200 init=/linuxrc;
+   stdout-path = serial_1;
};
 
g2d@1080 {
diff --git a/arch/arm/boot/dts/exynos4412-tiny4412.dts 
b/arch/arm/boot/dts/exynos4412-tiny4412.dts
index ea6929d9c621..d46fd4c2aeaa 100644
--- a/arch/arm/boot/dts/exynos4412-tiny4412.dts
+++ b/arch/arm/boot/dts/exynos4412-tiny4412.dts
@@ -18,6 +18,10 @@
model = FriendlyARM TINY4412 board based on Exynos4412;
compatible = friendlyarm,tiny4412, samsung,exynos4412, 
samsung,exynos4;
 
+   chosen {
+   stdout-path = serial_0;
+   };
+
memory {
reg = 0x4000 0x4000;
};
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts 
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 5e066cd87f66..c8b38359d54e 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -30,6 +30,7 @@
 
chosen {
bootargs = console=ttySAC2,115200N8 root=/dev/mmcblk0p5 
rootwait earlyprintk panic=5;
+

[PATCH v11 0/6] cpufreq: use generic cpufreq drivers for exynos platforms

Changes since v10:
- Rebased on top of v3.18-rc1

This patch series removes the use of Exynos4210 and Exynos5250 specific cpufreq
drivers and enables the use of cpufreq-dt driver for these platforms. This
series also enables cpufreq support for Exynos5420 using arm_big_little cpufreq
driver.

This patch series is based and tested on v3.18-rc1 and depends on the patch
- clk: exynos4: remove duplicate div_core2 divider clock instantiation
  (http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg34859.html)
  This patch has been merged in arm-soc/samsung/dt3 branch of arm-soc tree.

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v11 1/6] clk: samsung: add infrastructure to register cpu clocks

The CPU clock provider supplies the clock to the CPU clock domain. The
composition and organization of the CPU clock provider could vary among
Exynos SoCs. A CPU clock provider can be composed of clock mux, dividers
and gates. This patch defines a new clock type for CPU clock provider and
adds infrastructure to register the CPU clock providers for Samsung
platforms.

Signed-off-by: Thomas Abraham thomas...@samsung.com
Reviewed-by: Tomasz Figa tomasz.f...@gmail.com
Acked-by: Mike Turquette mturque...@linaro.org
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
 drivers/clk/samsung/Makefile  |2 +-
 drivers/clk/samsung/clk-cpu.c |  335 +
 drivers/clk/samsung/clk-cpu.h |   91 +++
 3 files changed, 427 insertions(+), 1 deletions(-)
 create mode 100644 drivers/clk/samsung/clk-cpu.c
 create mode 100644 drivers/clk/samsung/clk-cpu.h

diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index 6fb4bc6..8909c93 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -2,7 +2,7 @@
 # Samsung Clock specific Makefile
 #
 
-obj-$(CONFIG_COMMON_CLK)   += clk.o clk-pll.o
+obj-$(CONFIG_COMMON_CLK)   += clk.o clk-pll.o clk-cpu.o
 obj-$(CONFIG_SOC_EXYNOS3250)   += clk-exynos3250.o
 obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4.o
 obj-$(CONFIG_SOC_EXYNOS5250)   += clk-exynos5250.o
diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c
new file mode 100644
index 000..009a21b
--- /dev/null
+++ b/drivers/clk/samsung/clk-cpu.c
@@ -0,0 +1,335 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * Author: Thomas Abraham thomas...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This file contains the utility function to register CPU clock for Samsung
+ * Exynos platforms. A CPU clock is defined as a clock supplied to a CPU or a
+ * group of CPUs. The CPU clock is typically derived from a hierarchy of clock
+ * blocks which includes mux and divider blocks. There are a number of other
+ * auxiliary clocks supplied to the CPU domain such as the debug blocks and AXI
+ * clock for CPU domain. The rates of these auxiliary clocks are related to the
+ * CPU clock rate and this relation is usually specified in the hardware manual
+ * of the SoC or supplied after the SoC characterization.
+ *
+ * The below implementation of the CPU clock allows the rate changes of the CPU
+ * clock and the corresponding rate changes of the auxillary clocks of the CPU
+ * domain. The platform clock driver provides a clock register configuration
+ * for each configurable rate which is then used to program the clock hardware
+ * registers to acheive a fast co-oridinated rate change for all the CPU domain
+ * clocks.
+ *
+ * On a rate change request for the CPU clock, the rate change is propagated
+ * upto the PLL supplying the clock to the CPU domain clock blocks. While the
+ * CPU domain PLL is reconfigured, the CPU domain clocks are driven using an
+ * alternate clock source. If required, the alternate clock source is divided
+ * down in order to keep the output clock rate within the previous OPP limits.
+*/
+
+#include linux/errno.h
+#include clk-cpu.h
+
+#define E4210_SRC_CPU  0x0
+#define E4210_STAT_CPU 0x200
+#define E4210_DIV_CPU0 0x300
+#define E4210_DIV_CPU1 0x304
+#define E4210_DIV_STAT_CPU00x400
+#define E4210_DIV_STAT_CPU10x404
+
+#define E4210_DIV0_RATIO0_MASK 0x7
+#define E4210_DIV1_HPM_MASK(0x7  4)
+#define E4210_DIV1_COPY_MASK   (0x7  0)
+#define E4210_MUX_HPM_MASK (1  20)
+#define E4210_DIV0_ATB_SHIFT   16
+#define E4210_DIV0_ATB_MASK(DIV_MASK  E4210_DIV0_ATB_SHIFT)
+
+#define MAX_DIV8
+#define DIV_MASK   7
+#define DIV_MASK_ALL   0x
+#define MUX_MASK   7
+
+/*
+ * Helper function to wait until divider(s) have stabilized after the divider
+ * value has changed.
+ */
+static void wait_until_divider_stable(void __iomem *div_reg, unsigned long 
mask)
+{
+   unsigned long timeout = jiffies + msecs_to_jiffies(10);
+
+   do {
+   if (!(readl(div_reg)  mask))
+   return;
+   } while (time_before(jiffies, timeout));
+
+   pr_err(%s: timeout in divider stablization\n, __func__);
+}
+
+/*
+ * Helper function to wait until mux has stabilized after the mux selection
+ * value was changed.
+ */
+static void wait_until_mux_stable(void __iomem *mux_reg, u32 mux_pos,
+   unsigned long mux_value)
+{
+   unsigned long timeout = jiffies + msecs_to_jiffies(10);
+
+   do {
+   if (((readl(mux_reg)  mux_pos)  MUX_MASK) == mux_value)
+   return;
+   } while

[PATCH v11 2/6] clk: samsung: add cpu clock configuration data and instantiate cpu clock

With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos4210,
Exynos5250 and Exynos5420.

Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Thomas Abraham thomas...@samsung.com
Acked-by: Mike Turquette mturque...@linaro.org
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
 drivers/clk/samsung/clk-exynos4.c  |   15 ++
 drivers/clk/samsung/clk-exynos5250.c   |   25 +
 drivers/clk/samsung/clk-exynos5420.c   |   45 
 include/dt-bindings/clock/exynos5250.h |1 +
 include/dt-bindings/clock/exynos5420.h |2 +
 5 files changed, 88 insertions(+), 0 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos4.c 
b/drivers/clk/samsung/clk-exynos4.c
index 940f028..9af5767 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -19,6 +19,7 @@
 #include linux/syscore_ops.h
 
 #include clk.h
+#include clk-cpu.h
 
 /* Exynos4 clock controller register offsets */
 #define SRC_LEFTBUS0x4200
@@ -1354,6 +1355,16 @@ static struct samsung_pll_clock exynos4x12_plls[nr_plls] 
__initdata = {
VPLL_LOCK, VPLL_CON0, NULL),
 };
 
+static const struct exynos_cpuclk_cfg_data e4210_armclk_d[] __initconst = {
+   { 120, E4210_CPU_DIV0(7, 1, 4, 3, 7, 3), E4210_CPU_DIV1(0, 5), },
+   { 100, E4210_CPU_DIV0(7, 1, 4, 3, 7, 3), E4210_CPU_DIV1(0, 4), },
+   {  80, E4210_CPU_DIV0(7, 1, 3, 3, 7, 3), E4210_CPU_DIV1(0, 3), },
+   {  50, E4210_CPU_DIV0(7, 1, 3, 3, 7, 3), E4210_CPU_DIV1(0, 3), },
+   {  40, E4210_CPU_DIV0(7, 1, 3, 3, 7, 3), E4210_CPU_DIV1(0, 3), },
+   {  20, E4210_CPU_DIV0(0, 1, 1, 1, 3, 1), E4210_CPU_DIV1(0, 3), },
+   {  0 },
+};
+
 static void __init exynos4_core_down_clock(enum exynos4_soc soc)
 {
unsigned int tmp;
@@ -1457,6 +1468,10 @@ static void __init exynos4_clk_init(struct device_node 
*np,
samsung_clk_register_fixed_factor(ctx,
exynos4210_fixed_factor_clks,
ARRAY_SIZE(exynos4210_fixed_factor_clks));
+   exynos_register_cpu_clock(ctx, CLK_ARM_CLK, armclk,
+   mout_core_p4210[0], mout_core_p4210[1], 0x14200,
+   e4210_armclk_d, ARRAY_SIZE(e4210_armclk_d),
+   CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1);
} else {
samsung_clk_register_mux(ctx, exynos4x12_mux_clks,
ARRAY_SIZE(exynos4x12_mux_clks));
diff --git a/drivers/clk/samsung/clk-exynos5250.c 
b/drivers/clk/samsung/clk-exynos5250.c
index 70ec3d2..e19e365 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -19,6 +19,7 @@
 #include linux/syscore_ops.h
 
 #include clk.h
+#include clk-cpu.h
 
 #define APLL_LOCK  0x0
 #define APLL_CON0  0x100
@@ -748,6 +749,26 @@ static struct samsung_pll_clock exynos5250_plls[nr_plls] 
__initdata = {
VPLL_LOCK, VPLL_CON0, NULL),
 };
 
+static const struct exynos_cpuclk_cfg_data exynos5250_armclk_d[] __initconst = 
{
+   { 170, E5250_CPU_DIV0(5, 3, 7, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
+   { 160, E5250_CPU_DIV0(4, 1, 7, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
+   { 150, E5250_CPU_DIV0(4, 1, 7, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+   { 140, E5250_CPU_DIV0(4, 1, 6, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+   { 130, E5250_CPU_DIV0(3, 1, 6, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+   { 120, E5250_CPU_DIV0(3, 1, 5, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+   { 110, E5250_CPU_DIV0(3, 1, 5, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
+   { 100, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+   {  90, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+   {  80, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+   {  70, E5250_CPU_DIV0(1, 1, 3, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+   {  60, E5250_CPU_DIV0(1, 1, 3, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+   {  50, E5250_CPU_DIV0(1, 1, 2, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+   {  40, E5250_CPU_DIV0(1, 1, 2, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+   {  30, E5250_CPU_DIV0(1, 1, 1, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+   {  20, E5250_CPU_DIV0(1, 1, 1, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+   {  0 },
+};
+
 static const struct of_device_id ext_clk_match[] __initconst = {
{ .compatible = samsung,clock-xxti, .data = (void *)0, },
{ },
@@ -797,6 +818,10 @@ static void __init exynos5250_clk_init(struct device_node 
*np)
ARRAY_SIZE(exynos5250_div_clks));
samsung_clk_register_gate(ctx, exynos5250_gate_clks,
ARRAY_SIZE(exynos5250_gate_clks));
+

[PATCH v11 3/6] ARM: dts: Exynos: add CPU OPP and regulator supply property

For Exynos 4210/5250/5420 based platforms, add CPU operating points and CPU
regulator supply properties for migrating from Exynos specific cpufreq driver
to using generic cpufreq drivers.

Cc: Kukjin Kim kgene@samsung.com
Cc: Doug Anderson diand...@chromium.org
Cc: Javier Martinez Canillas javier.marti...@collabora.co.uk
Cc: Andreas Faerber afaer...@suse.de
Cc: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Thomas Abraham thomas...@samsung.com
Reviewed-by: Andreas Farber afaer...@suse.de
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
 arch/arm/boot/dts/exynos4210-origen.dts |4 ++
 arch/arm/boot/dts/exynos4210-trats.dts  |4 ++
 arch/arm/boot/dts/exynos4210-universal_c210.dts |4 ++
 arch/arm/boot/dts/exynos4210.dtsi   |   14 -
 arch/arm/boot/dts/exynos5250-arndale.dts|4 ++
 arch/arm/boot/dts/exynos5250-smdk5250.dts   |4 ++
 arch/arm/boot/dts/exynos5250-snow.dts   |4 ++
 arch/arm/boot/dts/exynos5250.dtsi   |   25 ++-
 arch/arm/boot/dts/exynos5420.dtsi   |   38 +++
 9 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210-origen.dts 
b/arch/arm/boot/dts/exynos4210-origen.dts
index f767c42..887dded 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -334,3 +334,7 @@
};
};
 };
+
+cpu0 {
+   cpu0-supply = buck1_reg;
+};
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts 
b/arch/arm/boot/dts/exynos4210-trats.dts
index f516da9..66119dd 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -446,3 +446,7 @@
};
};
 };
+
+cpu0 {
+   cpu0-supply = varm_breg;
+};
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts 
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index d50eb3a..bf0a39c 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -492,3 +492,7 @@
 mdma1 {
reg = 0x1284 0x1000;
 };
+
+cpu0 {
+   cpu0-supply = vdd_arm_reg;
+};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi 
b/arch/arm/boot/dts/exynos4210.dtsi
index bcc9e63..69bac07 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -35,10 +35,22 @@
#address-cells = 1;
#size-cells = 0;
 
-   cpu@900 {
+   cpu0: cpu@900 {
device_type = cpu;
compatible = arm,cortex-a9;
reg = 0x900;
+   clocks = clock CLK_ARM_CLK;
+   clock-names = cpu;
+   clock-latency = 16;
+
+   operating-points = 
+   120 125
+   100 115
+   80  1075000
+   50  975000
+   40  975000
+   20  95
+   ;
};
 
cpu@901 {
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts 
b/arch/arm/boot/dts/exynos5250-arndale.dts
index 7e728a1..ac07cdf 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -548,6 +548,10 @@
cap-sd-highspeed;
 };
 
+cpu0 {
+   cpu0-supply = buck2_reg;
+};
+
 rtc {
status = okay;
 };
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index bc27cc2..d91db82 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -410,3 +410,7 @@
};
};
 };
+
+cpu0 {
+   cpu0-supply = buck2_reg;
+};
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts 
b/arch/arm/boot/dts/exynos5250-snow.dts
index f9bc04b..8459fb6 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -599,6 +599,10 @@
};
 };
 
+cpu0 {
+   cpu0-supply = buck2_reg;
+};
+
 rtc {
status = okay;
clocks = clock CLK_RTC, max77686 MAX77686_CLK_AP;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 012b021..bccdd22 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -58,11 +58,34 @@
#address-cells = 1;
#size-cells = 0;
 
-   cpu@0 {
+   cpu0: cpu@0 {
device_type = cpu;
compatible = arm,cortex-a15;
reg = 0;
clock-frequency = 17;
+
+   clocks = clock CLK_ARM_CLK;
+   clock-names = cpu;
+   clock-latency =

[PATCH v11 4/6] ARM: Exynos: switch to using generic cpufreq driver for Exynos4210/5250/5420

The new CPU clock type allows the use of generic CPUfreq drivers. So for
Exynos4210/5250, switch to using generic cpufreq driver. For Exynos5420,
which did not have CPUfreq driver support, enable the use of generic
CPUfreq driver.

Suggested-by: Tomasz Figa tomasz.f...@gmail.com
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Thomas Abraham thomas...@samsung.com
Reviewed-by: Tomasz Figa tomasz.f...@gmail.com
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
 arch/arm/mach-exynos/exynos.c |   24 +++-
 1 files changed, 23 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 6b283eb..a1be294 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -282,6 +282,28 @@ static void __init exynos_init_irq(void)
exynos_map_pmu();
 }
 
+static const struct of_device_id exynos_cpufreq_matches[] = {
+   { .compatible = samsung,exynos5420, .data = arm-bL-cpufreq-dt },
+   { .compatible = samsung,exynos5250, .data = cpufreq-dt },
+   { .compatible = samsung,exynos4210, .data = cpufreq-dt },
+   { .compatible = samsung,exynos5440, .data = exynos5440-cpufreq },
+   { /* sentinel */ }
+};
+
+static void __init exynos_cpufreq_init(void)
+{
+   struct device_node *root = of_find_node_by_path(/);
+   const struct of_device_id *match;
+
+   match = of_match_node(exynos_cpufreq_matches, root);
+   if (!match) {
+   platform_device_register_simple(exynos-cpufreq, -1, NULL, 0);
+   return;
+   }
+
+   platform_device_register_simple(match-data, -1, NULL, 0);
+}
+
 static void __init exynos_dt_machine_init(void)
 {
struct device_node *i2c_np;
@@ -321,7 +343,7 @@ static void __init exynos_dt_machine_init(void)
of_machine_is_compatible(samsung,exynos5250))
platform_device_register(exynos_cpuidle);
 
-   platform_device_register_simple(exynos-cpufreq, -1, NULL, 0);
+   exynos_cpufreq_init();
 
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
-- 
1.6.6.rc2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v11 5/6] cpufreq: exynos: remove exynos4210/5250 specific cpufreq driver support

Exynos4210 and Exynos5250 based platforms have switched over to use generic
cpufreq drivers for cpufreq functionality. So the Exynos specific cpufreq
drivers for these platforms can be removed.

Cc: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Thomas Abraham thomas...@samsung.com
Acked-by: Viresh Kumar viresh.ku...@linaro.org
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
 drivers/cpufreq/Kconfig.arm |   22 --
 drivers/cpufreq/Makefile|2 --
 2 files changed, 0 insertions(+), 24 deletions(-)

diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 83a75dc..701f5ca 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -28,17 +28,6 @@ config ARM_VEXPRESS_SPC_CPUFREQ
 config ARM_EXYNOS_CPUFREQ
bool
 
-config ARM_EXYNOS4210_CPUFREQ
-   bool SAMSUNG EXYNOS4210
-   depends on CPU_EXYNOS4210
-   default y
-   select ARM_EXYNOS_CPUFREQ
-   help
- This adds the CPUFreq driver for Samsung EXYNOS4210
- SoC (S5PV310 or S5PC210).
-
- If in doubt, say N.
-
 config ARM_EXYNOS4X12_CPUFREQ
bool SAMSUNG EXYNOS4x12
depends on SOC_EXYNOS4212 || SOC_EXYNOS4412
@@ -50,17 +39,6 @@ config ARM_EXYNOS4X12_CPUFREQ
 
  If in doubt, say N.
 
-config ARM_EXYNOS5250_CPUFREQ
-   bool SAMSUNG EXYNOS5250
-   depends on SOC_EXYNOS5250
-   default y
-   select ARM_EXYNOS_CPUFREQ
-   help
- This adds the CPUFreq driver for Samsung EXYNOS5250
- SoC.
-
- If in doubt, say N.
-
 config ARM_EXYNOS5440_CPUFREQ
bool SAMSUNG EXYNOS5440
depends on SOC_EXYNOS5440
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 40c53dc..74e55f9 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -52,9 +52,7 @@ obj-$(CONFIG_ARM_DT_BL_CPUFREQ)   += 
arm_big_little_dt.o
 obj-$(CONFIG_ARCH_DAVINCI) += davinci-cpufreq.o
 obj-$(CONFIG_UX500_SOC_DB8500) += dbx500-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS_CPUFREQ)   += exynos-cpufreq.o
-obj-$(CONFIG_ARM_EXYNOS4210_CPUFREQ)   += exynos4210-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS4X12_CPUFREQ)   += exynos4x12-cpufreq.o
-obj-$(CONFIG_ARM_EXYNOS5250_CPUFREQ)   += exynos5250-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ)   += exynos5440-cpufreq.o
 obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o
 obj-$(CONFIG_ARM_IMX6Q_CPUFREQ)+= imx6q-cpufreq.o
-- 
1.6.6.rc2

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v11 6/6] clk: samsung: remove unused clock aliases and update clock flags

With some of the Exynos SoCs switched over to use the generic CPUfreq drivers,
the unused clock aliases can be removed. In addition to this, the individual
clock blocks which are now encapsulated with the consolidate CPU clock type
can now be marked with read-only flags.

Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Thomas Abraham thomas...@samsung.com
Acked-by: Viresh Kumar viresh.ku...@linaro.org
Acked-by: Mike Turquette mturque...@linaro.org
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
 drivers/clk/samsung/clk-exynos4.c|   48 +-
 drivers/clk/samsung/clk-exynos5250.c |   19 -
 drivers/clk/samsung/clk-exynos5420.c |   27 --
 3 files changed, 53 insertions(+), 41 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos4.c 
b/drivers/clk/samsung/clk-exynos4.c
index 9af5767..3731fc7 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -578,7 +578,8 @@ static struct samsung_mux_clock exynos4210_mux_clks[] 
__initdata = {
MUX(0, mout_fimd1, group1_p4210, E4210_SRC_LCD1, 0, 4),
MUX(0, mout_mipi1, group1_p4210, E4210_SRC_LCD1, 12, 4),
MUX(CLK_SCLK_MPLL, sclk_mpll, mout_mpll_p, SRC_CPU, 8, 1),
-   MUX(CLK_MOUT_CORE, mout_core, mout_core_p4210, SRC_CPU, 16, 1),
+   MUX_F(CLK_MOUT_CORE, mout_core, mout_core_p4210, SRC_CPU, 16, 1, 0,
+   CLK_MUX_READ_ONLY),
MUX(0, mout_hpm, mout_core_p4210, SRC_CPU, 20, 1),
MUX(CLK_SCLK_VPLL, sclk_vpll, sclk_vpll_p4210, SRC_TOP0, 8, 1),
MUX(CLK_MOUT_FIMC0, mout_fimc0, group1_p4210, SRC_CAM, 0, 4),
@@ -714,15 +715,24 @@ static struct samsung_div_clock exynos4_div_clks[] 
__initdata = {
DIV(0, div_clkout_rightbus, mout_clkout_rightbus,
CLKOUT_CMU_RIGHTBUS, 8, 6),
 
-   DIV(0, div_core, mout_core, DIV_CPU0, 0, 3),
-   DIV(0, div_corem0, div_core2, DIV_CPU0, 4, 3),
-   DIV(0, div_corem1, div_core2, DIV_CPU0, 8, 3),
-   DIV(0, div_periph, div_core2, DIV_CPU0, 12, 3),
-   DIV(0, div_atb, mout_core, DIV_CPU0, 16, 3),
-   DIV(0, div_pclk_dbg, div_atb, DIV_CPU0, 20, 3),
-   DIV(CLK_ARM_CLK, div_core2, div_core, DIV_CPU0, 28, 3),
-   DIV(0, div_copy, mout_hpm, DIV_CPU1, 0, 3),
-   DIV(0, div_hpm, div_copy, DIV_CPU1, 4, 3),
+   DIV_F(0, div_core, mout_core, DIV_CPU0, 0, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(0, div_corem0, div_core2, DIV_CPU0, 4, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(0, div_corem1, div_core2, DIV_CPU0, 8, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(0, div_periph, div_core2, DIV_CPU0, 12, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(0, div_atb, mout_core, DIV_CPU0, 16, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(0, div_pclk_dbg, div_atb, DIV_CPU0, 20, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(CLK_ARM_CLK, div_core2, div_core, DIV_CPU0, 28, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(0, div_copy, mout_hpm, DIV_CPU1, 0, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(0, div_hpm, div_copy, DIV_CPU1, 4, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
DIV(0, div_clkout_cpu, mout_clkout_cpu, CLKOUT_CMU_CPU, 8, 6),
 
DIV(0, div_fimc0, mout_fimc0, DIV_CAM, 0, 4),
@@ -769,7 +779,8 @@ static struct samsung_div_clock exynos4_div_clks[] 
__initdata = {
DIV(0, div_spi_pre2, div_spi2, DIV_PERIL2, 8, 8),
DIV(0, div_audio1, mout_audio1, DIV_PERIL4, 0, 4),
DIV(0, div_audio2, mout_audio2, DIV_PERIL4, 16, 4),
-   DIV(CLK_SCLK_APLL, sclk_apll, mout_apll, DIV_CPU0, 24, 3),
+   DIV_F(CLK_SCLK_APLL, sclk_apll, mout_apll, DIV_CPU0, 24, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
DIV_F(0, div_mipi_pre0, div_mipi0, DIV_LCD0, 20, 4,
CLK_SET_RATE_PARENT, 0),
DIV_F(0, div_mmc_pre0, div_mmc0, DIV_FSYS1, 8, 8,
@@ -1186,17 +1197,10 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] 
__initdata = {
0),
 };
 
-static struct samsung_clock_alias exynos4_aliases[] __initdata = {
+static struct samsung_clock_alias exynos4x12_aliases[] __initdata = {
ALIAS(CLK_MOUT_CORE, NULL, moutcore),
ALIAS(CLK_ARM_CLK, NULL, armclk),
ALIAS(CLK_SCLK_APLL, NULL, mout_apll),
-};
-
-static struct samsung_clock_alias exynos4210_aliases[] __initdata = {
-   ALIAS(CLK_SCLK_MPLL, NULL, mout_mpll),
-};
-
-static struct samsung_clock_alias exynos4x12_aliases[] __initdata = {
ALIAS(CLK_MOUT_MPLL_USER_C, NULL, mout_mpll),
 };
 
@@ -1463,8 +1467,6 @@ static void __init

Re: [PATCH v11 5/6] cpufreq: exynos: remove exynos4210/5250 specific cpufreq driver support

2014-10-20 Thread Viresh Kumar

On 20 October 2014 17:11, Thomas Abraham thomas...@samsung.com wrote:
 Exynos4210 and Exynos5250 based platforms have switched over to use generic
 cpufreq drivers for cpufreq functionality. So the Exynos specific cpufreq
 drivers for these platforms can be removed.

 Cc: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
 Signed-off-by: Thomas Abraham thomas...@samsung.com
 Acked-by: Viresh Kumar viresh.ku...@linaro.org
 Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
 Tested-by: Chander Kashyap k.chan...@samsung.com
 ---
  drivers/cpufreq/Kconfig.arm |   22 --
  drivers/cpufreq/Makefile|2 --
  2 files changed, 0 insertions(+), 24 deletions(-)

Looks like you forgot removing drivers ;)
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v11 0/6] cpufreq: use generic cpufreq drivers for exynos platforms

2014-10-20 Thread Tomasz Figa

On 20.10.2014 13:41, Thomas Abraham wrote:
 Changes since v10:
 - Rebased on top of v3.18-rc1
 
 This patch series removes the use of Exynos4210 and Exynos5250 specific 
 cpufreq
 drivers and enables the use of cpufreq-dt driver for these platforms. This
 series also enables cpufreq support for Exynos5420 using arm_big_little 
 cpufreq
 driver.
 
 This patch series is based and tested on v3.18-rc1 and depends on the patch
 - clk: exynos4: remove duplicate div_core2 divider clock instantiation
   
 (http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg34859.html)
   This patch has been merged in arm-soc/samsung/dt3 branch of arm-soc tree.
 

That patch actually went through clock tree, but it doesn't matter,
because AFAIK all the dependencies for this series are already in
3.18-rc1. I'll try to apply it in next days

Best regards,
Tomasz
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v11 5/6] cpufreq: exynos: remove exynos4210/5250 specific cpufreq driver support

On Mon, Oct 20, 2014 at 5:02 PM, Viresh Kumar viresh.ku...@linaro.org wrote:
 On 20 October 2014 17:11, Thomas Abraham thomas...@samsung.com wrote:
 Exynos4210 and Exynos5250 based platforms have switched over to use generic
 cpufreq drivers for cpufreq functionality. So the Exynos specific cpufreq
 drivers for these platforms can be removed.

 Cc: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
 Signed-off-by: Thomas Abraham thomas...@samsung.com
 Acked-by: Viresh Kumar viresh.ku...@linaro.org
 Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
 Tested-by: Chander Kashyap k.chan...@samsung.com
 ---
  drivers/cpufreq/Kconfig.arm |   22 --
  drivers/cpufreq/Makefile|2 --
  2 files changed, 0 insertions(+), 24 deletions(-)

 Looks like you forgot removing drivers ;)

Sorry, missed it while doing the rebase. I will fix and send an updated patch.

Thanks,
Thomas.

 --
 To unsubscribe from this list: send the line unsubscribe linux-pm in
 the body of a message to majord...@vger.kernel.org
 More majordomo info at  http://vger.kernel.org/majordomo-info.html
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v11 0/6] cpufreq: use generic cpufreq drivers for exynos platforms

Hi Tomasz,

On Mon, Oct 20, 2014 at 5:05 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
 On 20.10.2014 13:41, Thomas Abraham wrote:
 Changes since v10:
 - Rebased on top of v3.18-rc1

 This patch series removes the use of Exynos4210 and Exynos5250 specific 
 cpufreq
 drivers and enables the use of cpufreq-dt driver for these platforms. This
 series also enables cpufreq support for Exynos5420 using arm_big_little 
 cpufreq
 driver.

 This patch series is based and tested on v3.18-rc1 and depends on the patch
 - clk: exynos4: remove duplicate div_core2 divider clock instantiation
   
 (http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg34859.html)
   This patch has been merged in arm-soc/samsung/dt3 branch of arm-soc tree.


 That patch actually went through clock tree, but it doesn't matter,
 because AFAIK all the dependencies for this series are already in
 3.18-rc1. I'll try to apply it in next days

Thanks. The patch clk: exynos4: remove duplicate div_core2 divider
clock instantiation is not available in 3.18-rc1. So for testing, I
picked this patch from samsung/dt3 branch from arm-soc tree.

Regards,
Thomas.



 Best regards,
 Tomasz
 --
 To unsubscribe from this list: send the line unsubscribe linux-samsung-soc 
 in
 the body of a message to majord...@vger.kernel.org
 More majordomo info at  http://vger.kernel.org/majordomo-info.html
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v11 5/6] cpufreq: exynos: remove exynos4210/5250 specific cpufreq driver support

Exynos4210 and Exynos5250 based platforms have switched over to use generic
cpufreq drivers for cpufreq functionality. So the Exynos specific cpufreq
drivers for these platforms can be removed.

Cc: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Thomas Abraham thomas...@samsung.com
Acked-by: Viresh Kumar viresh.ku...@linaro.org
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
 drivers/cpufreq/Kconfig.arm  |   22 
 drivers/cpufreq/Makefile |2 -
 drivers/cpufreq/exynos4210-cpufreq.c |  184 -
 drivers/cpufreq/exynos5250-cpufreq.c |  210 --
 4 files changed, 0 insertions(+), 418 deletions(-)
 delete mode 100644 drivers/cpufreq/exynos4210-cpufreq.c
 delete mode 100644 drivers/cpufreq/exynos5250-cpufreq.c

diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 83a75dc..701f5ca 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -28,17 +28,6 @@ config ARM_VEXPRESS_SPC_CPUFREQ
 config ARM_EXYNOS_CPUFREQ
bool
 
-config ARM_EXYNOS4210_CPUFREQ
-   bool SAMSUNG EXYNOS4210
-   depends on CPU_EXYNOS4210
-   default y
-   select ARM_EXYNOS_CPUFREQ
-   help
- This adds the CPUFreq driver for Samsung EXYNOS4210
- SoC (S5PV310 or S5PC210).
-
- If in doubt, say N.
-
 config ARM_EXYNOS4X12_CPUFREQ
bool SAMSUNG EXYNOS4x12
depends on SOC_EXYNOS4212 || SOC_EXYNOS4412
@@ -50,17 +39,6 @@ config ARM_EXYNOS4X12_CPUFREQ
 
  If in doubt, say N.
 
-config ARM_EXYNOS5250_CPUFREQ
-   bool SAMSUNG EXYNOS5250
-   depends on SOC_EXYNOS5250
-   default y
-   select ARM_EXYNOS_CPUFREQ
-   help
- This adds the CPUFreq driver for Samsung EXYNOS5250
- SoC.
-
- If in doubt, say N.
-
 config ARM_EXYNOS5440_CPUFREQ
bool SAMSUNG EXYNOS5440
depends on SOC_EXYNOS5440
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 40c53dc..74e55f9 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -52,9 +52,7 @@ obj-$(CONFIG_ARM_DT_BL_CPUFREQ)   += 
arm_big_little_dt.o
 obj-$(CONFIG_ARCH_DAVINCI) += davinci-cpufreq.o
 obj-$(CONFIG_UX500_SOC_DB8500) += dbx500-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS_CPUFREQ)   += exynos-cpufreq.o
-obj-$(CONFIG_ARM_EXYNOS4210_CPUFREQ)   += exynos4210-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS4X12_CPUFREQ)   += exynos4x12-cpufreq.o
-obj-$(CONFIG_ARM_EXYNOS5250_CPUFREQ)   += exynos5250-cpufreq.o
 obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ)   += exynos5440-cpufreq.o
 obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o
 obj-$(CONFIG_ARM_IMX6Q_CPUFREQ)+= imx6q-cpufreq.o
diff --git a/drivers/cpufreq/exynos4210-cpufreq.c 
b/drivers/cpufreq/exynos4210-cpufreq.c
deleted file mode 100644
index 843ec82..000
--- a/drivers/cpufreq/exynos4210-cpufreq.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * EXYNOS4210 - CPU frequency scaling support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include linux/module.h
-#include linux/kernel.h
-#include linux/err.h
-#include linux/clk.h
-#include linux/io.h
-#include linux/slab.h
-#include linux/cpufreq.h
-#include linux/of.h
-#include linux/of_address.h
-
-#include exynos-cpufreq.h
-
-static struct clk *cpu_clk;
-static struct clk *moutcore;
-static struct clk *mout_mpll;
-static struct clk *mout_apll;
-static struct exynos_dvfs_info *cpufreq;
-
-static unsigned int exynos4210_volt_table[] = {
-   125, 115, 105, 975000, 95,
-};
-
-static struct cpufreq_frequency_table exynos4210_freq_table[] = {
-   {0, L0, 1200 * 1000},
-   {0, L1, 1000 * 1000},
-   {0, L2,  800 * 1000},
-   {0, L3,  500 * 1000},
-   {0, L4,  200 * 1000},
-   {0, 0, CPUFREQ_TABLE_END},
-};
-
-static struct apll_freq apll_freq_4210[] = {
-   /*
-* values:
-* freq
-* clock divider for CORE, COREM0, COREM1, PERIPH, ATB, PCLK_DBG, APLL, 
RESERVED
-* clock divider for COPY, HPM, RESERVED
-* PLL M, P, S
-*/
-   APLL_FREQ(1200, 0, 3, 7, 3, 4, 1, 7, 0, 5, 0, 0, 150, 3, 1),
-   APLL_FREQ(1000, 0, 3, 7, 3, 4, 1, 7, 0, 4, 0, 0, 250, 6, 1),
-   APLL_FREQ(800,  0, 3, 7, 3, 3, 1, 7, 0, 3, 0, 0, 200, 6, 1),
-   APLL_FREQ(500,  0, 3, 7, 3, 3, 1, 7, 0, 3, 0, 0, 250, 6, 2),
-   APLL_FREQ(200,  0, 1, 3, 1, 3, 1, 0, 0, 3, 0, 0, 200, 6, 3),
-};
-
-static void exynos4210_set_clkdiv(unsigned int div_index)
-{
-   unsigned int tmp;
-
-   /* Change Divider - CPU0 */
-
-   tmp = apll_freq_4210[div_index].clk_div_cpu0;
-
-   __raw_writel(tmp,

[PATCHv4 0/4] cpufreq: Use cpufreq-dt driver for Exynos3250

This patchset use cpufreq-dt driver to support Exynos3250 cpufreq and tested it
on Exynos3250-based Rinato board.

Changes from v3:
- This patchset is based on 3.18-rc1 with new patchset[3] of Thomas Abraham
  [3] [PATCH v11 0/6] cpufreq: use generic cpufreq drivers for exynos platforms
  - http://www.spinics.net/lists/arm-kernel/msg370412.html

Changes from v2:
- Rebased on new patchset of Thomas Abraham
  and for-next branch of samsunc-clk.git of Tomasz Figa

Changes from v1:
- Rebased on new patchset[1] by Thomas Abraham
  [1] [PATCH v10 0/6] cpufreq: use generic cpufreq drivers for exynos platforms
  - http://www.spinics.net/lists/arm-kernel/msg364790.html
- Modify clk-cpu.c to support Exynos3250
- Drop documentation patch on previous patchset[2]
  [2] http://www.spinics.net/lists/cpufreq/msg10265.html
- Add only operating-points for Exynos3250 without armclk-divider-table

Chanwoo Choi (4):
  clk: samsung: exynos3250: Add cpu clock configuration data and instaniate cpu 
clock
  clk: samsung: exynos3250: Update clock flags related to CPU to use cpu-clock 
type
  ARM: exynos: Add exynos3250 compatible to use generic cpufreq driver
  ARM: dts: Add CPU OPP and regulator supply property for Exynos3250

 arch/arm/boot/dts/exynos3250.dtsi| 15 +++
 arch/arm/mach-exynos/exynos.c|  1 +
 drivers/clk/samsung/clk-cpu.h|  4 +++
 drivers/clk/samsung/clk-exynos3250.c | 49 
 4 files changed, 59 insertions(+), 10 deletions(-)

-- 
1.8.0

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCHv4 2/4] clk: samsung: exynos3250: Update clock flags related to CPU to use cpu-clock type

This patch update clock flags related to CPU with read only flag
to use cpu-clock type.

Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/clk/samsung/clk-exynos3250.c | 30 --
 1 file changed, 20 insertions(+), 10 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos3250.c 
b/drivers/clk/samsung/clk-exynos3250.c
index aa55218..21e70ed 100644
--- a/drivers/clk/samsung/clk-exynos3250.c
+++ b/drivers/clk/samsung/clk-exynos3250.c
@@ -378,8 +378,10 @@ static struct samsung_mux_clock mux_clks[] __initdata = {
MUX(CLK_MOUT_MPLL_USER_C, mout_mpll_user_c, mout_mpll_user_p,
SRC_CPU, 24, 1),
MUX(CLK_MOUT_HPM, mout_hpm, mout_hpm_p, SRC_CPU, 20, 1),
-   MUX(CLK_MOUT_CORE, mout_core, mout_core_p, SRC_CPU, 16, 1),
-   MUX(CLK_MOUT_APLL, mout_apll, mout_apll_p, SRC_CPU, 0, 1),
+   MUX_F(CLK_MOUT_CORE, mout_core, mout_core_p, SRC_CPU, 16, 1, 0,
+   CLK_MUX_READ_ONLY),
+   MUX_F(CLK_MOUT_APLL, mout_apll, mout_apll_p, SRC_CPU, 0, 1,
+   CLK_SET_RATE_PARENT, 0),
 };
 
 static struct samsung_div_clock div_clks[] __initdata = {
@@ -467,16 +469,24 @@ static struct samsung_div_clock div_clks[] __initdata = {
DIV(CLK_DIV_I2S, div_i2s, div_audio, DIV_PERIL5, 8, 6),
 
/* DIV_CPU0 */
-   DIV(CLK_DIV_CORE2, div_core2, div_core, DIV_CPU0, 28, 3),
-   DIV(CLK_DIV_APLL, div_apll, mout_apll, DIV_CPU0, 24, 3),
-   DIV(CLK_DIV_PCLK_DBG, div_pclk_dbg, div_core2, DIV_CPU0, 20, 3),
-   DIV(CLK_DIV_ATB, div_atb, div_core2, DIV_CPU0, 16, 3),
-   DIV(CLK_DIV_COREM, div_corem, div_core2, DIV_CPU0, 4, 3),
-   DIV(CLK_DIV_CORE, div_core, mout_core, DIV_CPU0, 0, 3),
+   DIV_F(CLK_DIV_CORE2, div_core2, div_core, DIV_CPU0, 28, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(CLK_DIV_APLL, div_apll, mout_apll, DIV_CPU0, 24, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(CLK_DIV_PCLK_DBG, div_pclk_dbg, div_core2, DIV_CPU0, 20, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(CLK_DIV_ATB, div_atb, div_core2, DIV_CPU0, 16, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(CLK_DIV_COREM, div_corem, div_core2, DIV_CPU0, 4, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(CLK_DIV_CORE, div_core, mout_core, DIV_CPU0, 0, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
 
/* DIV_CPU1 */
-   DIV(CLK_DIV_HPM, div_hpm, div_copy, DIV_CPU1, 4, 3),
-   DIV(CLK_DIV_COPY, div_copy, mout_hpm, DIV_CPU1, 0, 3),
+   DIV_F(CLK_DIV_HPM, div_hpm, div_copy, DIV_CPU1, 4, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+   DIV_F(CLK_DIV_COPY, div_copy, mout_hpm, DIV_CPU1, 0, 3,
+   CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
 };
 
 static struct samsung_gate_clock gate_clks[] __initdata = {
-- 
1.8.0

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCHv4 4/4] ARM: dts: Add CPU OPP and regulator supply property for Exynos3250

This patch add CPU operating points which include CPU frequency and regulator
voltage to use generic cpufreq drivers.

Cc: Kukjin Kim kgene@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
---
 arch/arm/boot/dts/exynos3250.dtsi | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi 
b/arch/arm/boot/dts/exynos3250.dtsi
index 693a327..0b5bea8 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -52,6 +52,21 @@
compatible = arm,cortex-a7;
reg = 0;
clock-frequency = 10;
+   clocks = cmu CLK_DIV_CORE2;
+   clock-names = cpu;
+
+   operating-points = 
+   100 115
+   90  1112500
+   80  1075000
+   70  1037500
+   60  100
+   50  962500
+   40  925000
+   30  887500
+   20  85
+   10  85
+   ;
};
 
cpu1: cpu@1 {
-- 
1.8.0

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCHv4 3/4] ARM: exynos: Add exynos3250 compatible to use generic cpufreq driver

This patch add exynos3250 compatible string to exynos_cpufreq_matches
for supporting generic cpufreq driver on Exynos3250.

Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/exynos.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index a1be294..c835a389 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -286,6 +286,7 @@ static const struct of_device_id exynos_cpufreq_matches[] = 
{
{ .compatible = samsung,exynos5420, .data = arm-bL-cpufreq-dt },
{ .compatible = samsung,exynos5250, .data = cpufreq-dt },
{ .compatible = samsung,exynos4210, .data = cpufreq-dt },
+   { .compatible = samsung,exynos3250, .data = cpufreq-dt },
{ .compatible = samsung,exynos5440, .data = exynos5440-cpufreq },
{ /* sentinel */ }
 };
-- 
1.8.0

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH] thermal: exynos: use correct offset for TMU_CONTROL register on Exynos5260

2014-10-20 Thread Bartlomiej Zolnierkiewicz


Hi,

Eduardo, could you please merge this patch?

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung RD Institute Poland
Samsung Electronics

On Thursday, September 11, 2014 03:00:49 PM Bartlomiej Zolnierkiewicz wrote:
 In exynos5260_tmu_registers tmu_ctrl entry is erroneously
 assigned twice.  The second assignment (to EXYNOS_TMU_REG_CONTROL1
 define which represents 0x24 value) overrides the first one
 (to EXYNOS_TMU_REG_CONTROL define which represents 0x20 value)
 which results in the wrong (according to the Exynos5260 SoC
 documentation that I have) offset being used for TMU_CONTROL
 register.  Fix it by removing the wrong assignment and then
 remove no longer used EXYNOS_TMU_REG_CONTROL1 define.
 
 Cc: Naveen Krishna Chatradhi ch.nav...@samsung.com
 Cc: Amit Daniel Kachhap amit.dan...@samsung.com
 Cc: Lukasz Majewski l.majew...@samsung.com
 Cc: Eduardo Valentin edubez...@gmail.com
 Cc: Zhang Rui rui.zh...@intel.com
 Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
 Acked-by: Kyungmin Park kyungmin.p...@samsung.com
 ---
  drivers/thermal/samsung/exynos_tmu_data.c |1 -
  drivers/thermal/samsung/exynos_tmu_data.h |1 -
  2 files changed, 2 deletions(-)
 
 Index: b/drivers/thermal/samsung/exynos_tmu_data.c
 ===
 --- a/drivers/thermal/samsung/exynos_tmu_data.c   2014-09-11 
 14:41:12.567347442 +0200
 +++ b/drivers/thermal/samsung/exynos_tmu_data.c   2014-09-11 
 14:43:00.211350284 +0200
 @@ -273,7 +273,6 @@ struct exynos_tmu_init_data const exynos
  static const struct exynos_tmu_registers exynos5260_tmu_registers = {
   .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
   .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
 - .tmu_ctrl = EXYNOS_TMU_REG_CONTROL1,
   .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
   .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
   .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
 Index: b/drivers/thermal/samsung/exynos_tmu_data.h
 ===
 --- a/drivers/thermal/samsung/exynos_tmu_data.h   2014-09-11 
 14:41:12.243347433 +0200
 +++ b/drivers/thermal/samsung/exynos_tmu_data.h   2014-09-11 
 14:43:36.167351233 +0200
 @@ -83,7 +83,6 @@
  #define EXYNOS_MAX_TRIGGER_PER_REG   4
  
  /* Exynos5260 specific */
 -#define EXYNOS_TMU_REG_CONTROL1  0x24
  #define EXYNOS5260_TMU_REG_INTEN 0xC0
  #define EXYNOS5260_TMU_REG_INTSTAT   0xC4
  #define EXYNOS5260_TMU_REG_INTCLEAR  0xC8
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH] thermal: exynos: fix IRQ clearing on TMU initialization

2014-10-20 Thread Bartlomiej Zolnierkiewicz


Hi,

Eduaro, could you please merge this patch?

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung RD Institute Poland
Samsung Electronics

On Friday, October 03, 2014 06:17:17 PM Bartlomiej Zolnierkiewicz wrote:
 * Factor out code for clearing raised IRQs from exynos_tmu_work() to
   exynos_tmu_clear_irqs().
 
 * Add a comment about documentation bugs to exynos_tmu_clear_irqs().
 
   [ The documentation for Exynos3250, Exynos4412, Exynos5250 and
 Exynos5260 incorrectly states that INTCLEAR register has
 a different placing of bits responsible for FALL IRQs than
 INTSTAT register.  Exynos5420 and Exynos5440 documentation is
 correct (Exynos4210 doesn't support FALL IRQs at all). ]
 
 * Use exynos_tmu_clear_irqs() in exynos_tmu_initialize() instead
   of open-coded code trying to clear IRQs according to predefined
   masks.  After this change exynos_tmu_initialize() just clears
   IRQs that are raised like it is already done in exynos_tmu_work().
 
   As a nice side-effect the code now uses the correct offset
   (16 instead of 12) for bits responsible for clearing FALL IRQs
   in INTCLEAR register on Exynos3250, Exynos4412 and Exynos5250.
 
 * Remove no longer needed intclr_rise_[mask,shift] and
   intclr_fall_[mask,shift] fields from struct exynos_tmu_registers.
 
 * Remove no longer needed defines.
 
 This patch has been tested on Exynos4412 and Exynos5420 SoCs.
 
 Cc: Amit Daniel Kachhap amit.dan...@samsung.com
 Cc: Lukasz Majewski l.majew...@samsung.com
 Cc: Eduardo Valentin edubez...@gmail.com
 Cc: Zhang Rui rui.zh...@intel.com
 Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
 Acked-by: Kyungmin Park kyungmin.p...@samsung.com
 ---
  drivers/thermal/samsung/exynos_tmu.c  | 29 +
  drivers/thermal/samsung/exynos_tmu.h  |  8 
  drivers/thermal/samsung/exynos_tmu_data.c | 21 -
  drivers/thermal/samsung/exynos_tmu_data.h | 15 ---
  4 files changed, 21 insertions(+), 52 deletions(-)
 
 diff --git a/drivers/thermal/samsung/exynos_tmu.c 
 b/drivers/thermal/samsung/exynos_tmu.c
 index 092ab69..49c0924 100644
 --- a/drivers/thermal/samsung/exynos_tmu.c
 +++ b/drivers/thermal/samsung/exynos_tmu.c
 @@ -122,6 +122,23 @@ static int code_to_temp(struct exynos_tmu_data *data, u8 
 temp_code)
   return temp;
  }
  
 +static void exynos_tmu_clear_irqs(struct exynos_tmu_data *data)
 +{
 + const struct exynos_tmu_registers *reg = data-pdata-registers;
 + unsigned int val_irq;
 +
 + val_irq = readl(data-base + reg-tmu_intstat);
 + /*
 +  * Clear the interrupts.  Please note that the documentation for
 +  * Exynos3250, Exynos4412, Exynos5250 and Exynos5260 incorrectly
 +  * states that INTCLEAR register has a different placing of bits
 +  * responsible for FALL IRQs than INTSTAT register.  Exynos5420
 +  * and Exynos5440 documentation is correct (Exynos4210 doesn't
 +  * support FALL IRQs at all).
 +  */
 + writel(val_irq, data-base + reg-tmu_intclear);
 +}
 +
  static int exynos_tmu_initialize(struct platform_device *pdev)
  {
   struct exynos_tmu_data *data = platform_get_drvdata(pdev);
 @@ -207,7 +224,7 @@ static int exynos_tmu_initialize(struct platform_device 
 *pdev)
   writeb(pdata-trigger_levels[i], data-base +
   reg-threshold_th0 + i * sizeof(reg-threshold_th0));
  
 - writel(reg-intclr_rise_mask, data-base + reg-tmu_intclear);
 + exynos_tmu_clear_irqs(data);
   } else {
   /* Write temperature code for rising and falling threshold */
   for (i = 0; i  pdata-non_hw_trigger_levels; i++) {
 @@ -228,9 +245,7 @@ static int exynos_tmu_initialize(struct platform_device 
 *pdev)
   writel(falling_threshold,
   data-base + reg-threshold_th1);
  
 - writel((reg-intclr_rise_mask  reg-intclr_rise_shift) |
 - (reg-intclr_fall_mask  reg-intclr_fall_shift),
 - data-base + reg-tmu_intclear);
 + exynos_tmu_clear_irqs(data);
  
   /* if last threshold limit is also present */
   i = pdata-max_trigger_level - 1;
 @@ -396,7 +411,7 @@ static void exynos_tmu_work(struct work_struct *work)
   struct exynos_tmu_data, irq_work);
   struct exynos_tmu_platform_data *pdata = data-pdata;
   const struct exynos_tmu_registers *reg = pdata-registers;
 - unsigned int val_irq, val_type;
 + unsigned int val_type;
  
   if (!IS_ERR(data-clk_sec))
   clk_enable(data-clk_sec);
 @@ -414,9 +429,7 @@ static void exynos_tmu_work(struct work_struct *work)
   clk_enable(data-clk);
  
   /* TODO: take action based on particular interrupt */
 - val_irq = readl(data-base + reg-tmu_intstat);
 - /* clear the interrupts */
 - writel(val_irq, data-base + reg-tmu_intclear);
 +

Re: [PATCH 00/33] thermal: exynos: convert the driver to use per-SoC type operations

2014-10-20 Thread Bartlomiej Zolnierkiewicz


Hi,

Eduaro/Amit, any comments on this series?
Could it be merged for v3.19?

[ Currently this series conflicts with [PATCH] thermal: exynos: fix IRQ
  clearing on TMU initialization patch so I'm planning to refresh it but
  it would be great to get some feedback first. ]

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung RD Institute Poland
Samsung Electronics

On Thursday, September 18, 2014 05:27:17 PM Bartlomiej Zolnierkiewicz wrote:
 Hi,
 
 This patch series replaces the hardware registers abstractions in
 the Exynos thermal driver by the usage of per-SoC type operations.
 Such solution provides simpler, easier to understand code and
 allows removal of ~250 LOCs (~11% of the whole source code) from
 the driver.  Some other driver improvements are now also possible
 thanks to these changes but are scheduled at later time (like
 consolidating code for clearing IRQs using INTCLEAR register).
 
 The patchset should not cause any functionality changes.  This
 means that unless there are some bugs in the patches itself there
 should be no behavior changes for the driver (this also includes
 lack of changes in the way hardware is accessed by the driver).
 
 All testing was done on (Exynos4412 SoC based) ODROID U3 board
 (some additional patches are needed to make the Exynos thermal
 driver work on this hardware).
 
 Depends on:
 - 'next' branch of linux-soc-thermal.git kernel tree from Eduardo
 - [PATCH] thermal: exynos: use correct offset for TMU_CONTROL
   register on Exynos5260
   
 (http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg36529.html)
 
 Best regards,
 --
 Bartlomiej Zolnierkiewicz
 Samsung RD Institute Poland
 Samsung Electronics
 
 
 Bartlomiej Zolnierkiewicz (33):
   thermal: exynos: remove needless triminfo_data abstraction
   thermal: exynos: remove needless tmu_status abstraction
   thermal: exynos: remove needless threshold_temp abstraction
   thermal: exynos: remove needless triminfo_ctrl abstraction
   thermal: exynos: remove needless test_mux_addr_shift abstraction
   thermal: exynos: remove needless therm_trip_[mode,mask]_shift
 abstractions
   thermal: exynos: remove needless therm_trip_en_shift abstraction
   thermal: exynos: remove needless emul_temp_shift abstraction
   thermal: exynos: remove needless emul_time_shift abstraction
   thermal: exynos: replace tmu_irqstatus check by Exynos5440 one
   thermal: exynos: replace tmu_pmin check by Exynos5440 one
   thermal: exynos: simplify HW_TRIP level setting
   thermal: exynos: replace threshold_falling check by Exynos SoC type
 one
   thermal: exynos: remove TMU_SUPPORT_READY_STATUS flag
   thermal: exynos: remove TMU_SUPPORT_TRIM_RELOAD flag
   thermal: exynos: add sanitize_temp_error() helper
   thermal: exynos: add get_th_reg() helper
   thermal: exynos: add -tmu_initialize method
   thermal: exynos: add get_con_reg() helper
   thermal: exynos: add -tmu_control method
   thermal: exynos: add -tmu_read method
   thermal: exynos: add get_emul_con_reg() helper
   thermal: exynos: add -tmu_set_emulation method
   thermal: exynos: add -tmu_clear_irqs method
   thermal: exynos: remove TMU_SUPPORT_FALLING_TRIP flag
   thermal: exynos: remove TMU_SUPPORT_EMUL_TIME flag
   thermal: exynos: remove TMU_SUPPORT_EMULATION flag
   thermal: exynos: remove TMU_SUPPORT_ADDRESS_MULTIPLE flag
   thermal: exynos: remove TMU_SUPPORT_MULTI_INST flag
   thermal: exynos: remove test_mux pdata field
   thermal: exynos: remove SoC type ifdefs
   thermal: exynos: remove __EXYNOS5420_TMU_DATA macro
   thermal: exynos: remove exynos_tmu_data.h include
 
  drivers/thermal/samsung/exynos_thermal_common.h |   1 -
  drivers/thermal/samsung/exynos_tmu.c| 706 
 +---
  drivers/thermal/samsung/exynos_tmu.h| 131 +
  drivers/thermal/samsung/exynos_tmu_data.c   | 260 +
  drivers/thermal/samsung/exynos_tmu_data.h   | 174 --
  5 files changed, 509 insertions(+), 763 deletions(-)
  delete mode 100644 drivers/thermal/samsung/exynos_tmu_data.h

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 1/2] arch: arm: samsung: Clean-up usage of CONFIG_SERIAL_SAMSUNG_UARTS symbol

Hi Kukjin,

On Wed, Oct 1, 2014 at 10:12 PM, Abhilash Kesavan a.kesa...@samsung.com wrote:
 Remove usage of CONFIG_SERIAL_SAMSUNG_UARTS symbol from platform
 specific code.

 Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
 Reviewed-by: Tomasz Figa tomasz.f...@gmail.com

Can you please pick this up if it looks OK ?

Abhilash
 ---
 Changes in v2:
 - Re-ordered the patches
 - Added a define for number of uart ports in 
 arch/arm/plat-samsung/init.c
 - Removed CONFIG_SERIAL_SAMSUNG #ifdef in arch/arm/plat-samsung/init.c

 Build tested using s3c2410_defconfig, s3c6400_defconfig, exynos_defconfig
 and arm64's defconfig with and without the serial driver enabled. Boot tested
 on Exynos5420 and Exynos7.

  arch/arm/mach-s3c64xx/irq-pm.c |6 +++---
  arch/arm/plat-samsung/init.c   |7 ++-
  2 files changed, 5 insertions(+), 8 deletions(-)

 diff --git a/arch/arm/mach-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c
 index ae4ea76..b20024e 100644
 --- a/arch/arm/mach-s3c64xx/irq-pm.c
 +++ b/arch/arm/mach-s3c64xx/irq-pm.c
 @@ -55,10 +55,10 @@ static struct irq_grp_save {
 u32 mask;
  } eint_grp_save[5];

 -#ifndef CONFIG_SERIAL_SAMSUNG_UARTS
 -#define SERIAL_SAMSUNG_UARTS 0
 +#ifndef CONFIG_SERIAL_SAMSUNG
 +#define SERIAL_SAMSUNG_UARTS   0
  #else
 -#defineSERIAL_SAMSUNG_UARTS CONFIG_SERIAL_SAMSUNG_UARTS
 +#define SERIAL_SAMSUNG_UARTS   4
  #endif

  static u32 irq_uart_mask[SERIAL_SAMSUNG_UARTS];
 diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c
 index 11fbbc2..6114942 100644
 --- a/arch/arm/plat-samsung/init.c
 +++ b/arch/arm/plat-samsung/init.c
 @@ -92,10 +92,9 @@ void __init s3c24xx_init_clocks(int xtal)
  /* uart management */
  #if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
  static int nr_uarts __initdata = 0;
 +#define MAX_UART_PORTS 4

 -#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
 -static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS];
 -#endif
 +static struct s3c2410_uartcfg uart_cfgs[MAX_UART_PORTS];

  /* s3c24xx_init_uartdevs
   *
 @@ -110,7 +109,6 @@ void __init s3c24xx_init_uartdevs(char *name,
   struct s3c24xx_uart_resources *res,
   struct s3c2410_uartcfg *cfg, int no)
  {
 -#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
 struct platform_device *platdev;
 struct s3c2410_uartcfg *cfgptr = uart_cfgs;
 struct s3c24xx_uart_resources *resp;
 @@ -133,7 +131,6 @@ void __init s3c24xx_init_uartdevs(char *name,
 }

 nr_uarts = no;
 -#endif
  }

  void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 --
 1.7.9.5

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 2/7] clk: samsung: exynos7: add clocks for MMC block

Hi Vivek,

On Mon, Oct 20, 2014 at 3:19 PM, Vivek Gautam gautam.vi...@samsung.com wrote:
 Hi Abhilash,


 On Fri, Oct 17, 2014 at 9:41 PM, Abhilash Kesavan a.kesa...@samsung.com 
 wrote:
 From: Naveen Krishna Ch naveenkrishna...@gmail.com

 Exynos7 supports 3 MMC channels, add the MMC gate clocks to
 support them.

 Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
 Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
 ---
  .../devicetree/bindings/clock/exynos7-clock.txt|3 +
  drivers/clk/samsung/clk-exynos7.c  |  224 
 
  include/dt-bindings/clock/exynos7-clk.h|   20 ++
  3 files changed, 247 insertions(+)

 diff --git a/Documentation/devicetree/bindings/clock/exynos7-clock.txt 
 b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
 index 789f761..4c69b66 100644
 --- a/Documentation/devicetree/bindings/clock/exynos7-clock.txt
 +++ b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
 @@ -27,9 +27,12 @@ Required Properties for Clock Controller:

 - samsung,exynos7-clock-topc
 - samsung,exynos7-clock-top0
 +   - samsung,exynos7-clock-top1
 - samsung,exynos7-clock-peric0
 - samsung,exynos7-clock-peric1
 - samsung,exynos7-clock-peris
 +   - samsung,exynos7-clock-fsys0
 +   - samsung,exynos7-clock-fsys1

 same here, the input clocks for top1, fsys0 and fsys1 block need to be
 mentioned in this doc.

Thanks for the review. I missed adding these, will fix in the next version.

Regards,
Abhilash


   - reg: physical base address of the controller and the length of
 memory mapped region.
 diff --git a/drivers/clk/samsung/clk-exynos7.c 
 b/drivers/clk/samsung/clk-exynos7.c
 index c700f65..f5e43fa 100644
 --- a/drivers/clk/samsung/clk-exynos7.c
 +++ b/drivers/clk/samsung/clk-exynos7.c
 @@ -267,6 +267,132 @@ static void __init exynos7_clk_top0_init(struct 
 device_node *np)
  CLK_OF_DECLARE(exynos7_clk_top0, samsung,exynos7-clock-top0,
 exynos7_clk_top0_init);

 +/* Register Offset definitions for CMU_TOP1 (0x105E) */
 +#define MUX_SEL_TOP10  0x0200
 +#define MUX_SEL_TOP11  0x0204
 +#define MUX_SEL_TOP13  0x020C
 +#define MUX_SEL_TOP1_FSYS0 0x0224
 +#define MUX_SEL_TOP1_FSYS1 0x0228
 +#define DIV_TOP13  0x060C
 +#define DIV_TOP1_FSYS0 0x0624
 +#define DIV_TOP1_FSYS1 0x0628
 +#define ENABLE_ACLK_TOP13  0x080C
 +#define ENABLE_SCLK_TOP1_FSYS0 0x0A24
 +#define ENABLE_SCLK_TOP1_FSYS1 0x0A28
 +
 +/* List of parent clocks for Muxes in CMU_TOP1 */
 +PNAME(mout_top1_bus0_pll_p)= { fin_pll, dout_sclk_bus0_pll };
 +PNAME(mout_top1_bus1_pll_p)= { fin_pll, dout_sclk_bus1_pll_b };
 +PNAME(mout_top1_cc_pll_p)  = { fin_pll, dout_sclk_cc_pll_b };
 +PNAME(mout_top1_mfc_pll_p) = { fin_pll, dout_sclk_mfc_pll_b };
 +
 +PNAME(mout_top1_half_bus0_pll_p) = {mout_top1_bus0_pll,
 +   ffac_top1_bus0_pll_div2};
 +PNAME(mout_top1_half_bus1_pll_p) = {mout_top1_bus1_pll,
 +   ffac_top1_bus1_pll_div2};
 +PNAME(mout_top1_half_cc_pll_p) = {mout_top1_cc_pll,
 +   ffac_top1_cc_pll_div2};
 +PNAME(mout_top1_half_mfc_pll_p) = {mout_top1_mfc_pll,
 +   ffac_top1_mfc_pll_div2};
 +
 +PNAME(mout_top1_group1) = {mout_top1_half_bus0_pll,
 +   mout_top1_half_bus1_pll, mout_top1_half_cc_pll,
 +   mout_top1_half_mfc_pll};
 +
 +static unsigned long top1_clk_regs[] __initdata = {
 +   MUX_SEL_TOP10,
 +   MUX_SEL_TOP11,
 +   MUX_SEL_TOP13,
 +   MUX_SEL_TOP1_FSYS0,
 +   MUX_SEL_TOP1_FSYS1,
 +   DIV_TOP13,
 +   DIV_TOP1_FSYS0,
 +   DIV_TOP1_FSYS1,
 +   ENABLE_ACLK_TOP13,
 +   ENABLE_SCLK_TOP1_FSYS0,
 +   ENABLE_SCLK_TOP1_FSYS1,
 +};
 +
 +static struct samsung_mux_clock top1_mux_clks[] __initdata = {
 +   MUX(0, mout_top1_mfc_pll, mout_top1_mfc_pll_p, MUX_SEL_TOP10, 4, 
 1),
 +   MUX(0, mout_top1_cc_pll, mout_top1_cc_pll_p, MUX_SEL_TOP10, 8, 1),
 +   MUX(0, mout_top1_bus1_pll, mout_top1_bus1_pll_p,
 +   MUX_SEL_TOP10, 12, 1),
 +   MUX(0, mout_top1_bus0_pll, mout_top1_bus0_pll_p,
 +   MUX_SEL_TOP10, 16, 1),
 +
 +   MUX(0, mout_top1_half_mfc_pll, mout_top1_half_mfc_pll_p,
 +   MUX_SEL_TOP11, 4, 1),
 +   MUX(0, mout_top1_half_cc_pll, mout_top1_half_cc_pll_p,
 +   MUX_SEL_TOP11, 8, 1),
 +   MUX(0, mout_top1_half_bus1_pll, mout_top1_half_bus1_pll_p,
 +   MUX_SEL_TOP11, 12, 1),
 +   MUX(0, mout_top1_half_bus0_pll, mout_top1_half_bus0_pll_p,
 +   MUX_SEL_TOP11, 16, 1),
 +
 +   MUX(0, mout_aclk_fsys1_200, mout_top1_group1, MUX_SEL_TOP13, 24, 
 2),
 +   MUX(0, mout_aclk_fsys0_200, mout_top1_group1, MUX_SEL_TOP13, 28, 
 2),
 +
 +   MUX(0, mout_sclk_mmc2, mout_top1_group1, MUX_SEL_TOP1_FSYS0, 24, 
 2),
 +
 +   MUX(0, mout_sclk_mmc1, mout_top1_group1, MUX_SEL_TOP1_FSYS1, 24, 
 2),

Re: [PATCH v5 0/6] Add initial support for pinctrl on Exynos7

Hi Linus,

On Sun, Oct 12, 2014 at 12:27 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
 Abhilash, Linus,

 On 09.10.2014 15:54, Abhilash Kesavan wrote:
 Changes since v4:
   - Rebased over Tomasz Figa's pinctrl clean-up patches[1]

 Changes since v3:
   - Changed variable name from exynos_wkup_irq_chip to irq_chip
   - Added acked-by tag from Tomasz Figa

 Changes since v2:
   - Added a .irq_chip field to the samsung_pin_bank struct
   - Consolidated the wakeup and gpio irqd_ops

 Changes since v1:
   - Marked the newly created irq_chip instances as __initdata
   - Used kmemdup to keep a copy of the irq_chip
   - Change the pinctrl name from sd0_rdqs to sd0_ds as per UM
   - Moved the pinctrl enablement for exynos7 into a separate patch
   - Added tested-by and reviewed-by tags from Thomas Abraham

 This series has been tested on linux-next (20141008)
 https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/ with
 the following dependencies and [1].

 a) Samsung Serial symbol clean-up for exynos7 serial driver enablement (v2)
http://www.spinics.net/lists/arm-kernel/msg366947.html
http://www.spinics.net/lists/arm-kernel/msg366948.html
 b) dts, kbuild: Implement support for dtb vendor subdirs patchset - rebased
http://comments.gmane.org/gmane.linux.kbuild.devel/12131
 c) arch: arm64: enable support for Samsung Exynos7 SoC patchset (v5) - 
 rebased
http://www.spinics.net/lists/arm-kernel/msg364014.html

 [1] https://lkml.org/lkml/2014/10/2/476

 Abhilash Kesavan (3):
   pinctrl: exynos: Generalize the eint16_31 demux code
   pinctrl: exynos: Consolidate irq domain callbacks
   pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts

 Naveen Krishna Ch (3):
   pinctrl: exynos: Add initial driver data for Exynos7
   arm64: dts: Add initial pinctrl support to EXYNOS7
   arm64: exynos: Enable pinctrl support for Exynos7

  .../bindings/pinctrl/samsung-pinctrl.txt   |3 +
  arch/arm64/Kconfig |2 +
  arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi|  560 
 
  arch/arm64/boot/dts/exynos/exynos7.dtsi|   66 +++
  drivers/pinctrl/samsung/pinctrl-exynos.c   |  188 +--
  drivers/pinctrl/samsung/pinctrl-exynos.h   |3 +
  drivers/pinctrl/samsung/pinctrl-samsung.c  |2 +
  drivers/pinctrl/samsung/pinctrl-samsung.h  |3 +
  8 files changed, 791 insertions(+), 36 deletions(-)
  create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi


 No further comments from me. Thanks Abhilash for addressing all of them.

 Linus, feel free to apply this series with my ACK (which seems to be
 already present in all patches).

Can you please pick this series up.

Thanks,
Abhilash

 Best regards,
 Tomasz

 ___
 linux-arm-kernel mailing list
 linux-arm-ker...@lists.infradead.org
 http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v11 0/6] cpufreq: use generic cpufreq drivers for exynos platforms

2014-10-20 Thread Tomasz Figa

On 20.10.2014 13:48, Thomas Abraham wrote:
Hi Tomasz,

On Mon, Oct 20, 2014 at 5:05 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
On 20.10.2014 13:41, Thomas Abraham wrote:
Changes since v10:
- Rebased on top of v3.18-rc1

This patch series removes the use of Exynos4210 and Exynos5250 specific
cpufreq
drivers and enables the use of cpufreq-dt driver for these platforms. This
series also enables cpufreq support for Exynos5420 using arm_big_little
cpufreq
driver.

This patch series is based and tested on v3.18-rc1 and depends on the patch
- clk: exynos4: remove duplicate div_core2 divider clock instantiation

(http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg34859.html)
This patch has been merged in arm-soc/samsung/dt3 branch of arm-soc
tree.

That patch actually went through clock tree, but it doesn't matter,
because AFAIK all the dependencies for this series are already in
3.18-rc1. I'll try to apply it in next days

Thanks. The patch clk: exynos4: remove duplicate div_core2 divider
clock instantiation is not available in 3.18-rc1. So for testing, I
picked this patch from samsung/dt3 branch from arm-soc tree.

Hmm? I can see it there:

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/log/drivers/clk/samsung?id=v3.18-rc1

Best regards,
Tomasz
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH v3 2/5] regulator: core: Add regulator mode and initial mode properties

Some regulators can run on different operating modes (opmodes). This
allows systems to choose the most efficient opmode for each regulator.

This patch adds a regulator-initial-mode property to configure at
startup the operating mode for the regulators that support changing
its mode during normal operation and a regulator-mode to be used as
a property of the suspend states regulator-state-[mem/disk] nodes
for the regulators that supports changing its operating mode when the
system enters in a suspend state.

The set of possible modes that a regulator can operate depends on
the hardware capabilities so a list of generic operating modes can't
be provided. Instead, each hardware should define the list of valid
operating modes for the regulators found on that device.

Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
 Documentation/devicetree/bindings/regulator/regulator.txt | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/regulator/regulator.txt 
b/Documentation/devicetree/bindings/regulator/regulator.txt
index aaad615..8b54be1 100644
--- a/Documentation/devicetree/bindings/regulator/regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/regulator.txt
@@ -28,6 +28,20 @@ Optional properties:
 - regulator-state-[mem/disk] node has following common properties:
- regulator-on-in-suspend: regulator should be on in suspend state.
- regulator-off-in-suspend: regulator should be off in suspend state.
+   - regulator-mode: operating mode in the given suspend state.
+ The set of possible operating modes depends on the capabilities of
+ every hardware so the valid modes are documented on each regulator
+ device tree binding document.
+ The regulator-mode property only takes effect if the regulator is
+ enabled for the given suspend state using regulator-on-in-suspend.
+ If the regulator has not been explicitly disabled for the given state
+ with regulator-off-in-suspend, then setting the operating mode
+ will also have no effect.
+- regulator-initial-mode: initial operating mode. The set of possible operating
+  modes is the same used for the regulator-mode property and the device binding
+  documentation explains which property each regulator supports.
+If no mode is defined, then the OS will not manage the modes and the hardware
+default values will be used instead.
 
 Deprecated properties:
 - regulator-compatible: If a regulator chip contains multiple
-- 
2.1.0

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v3 0/5] Add max77802 regulator operating mode support

Hello Mark,

This is the third version of the series that adds operating modes
support for the regulators in the max77802 PMIC. This version uses the
standard regulator suspend states bindings as you suggested and also
drops the patches already picked by you from the first [0] and second [1]
version of the series.

The series adds a regulator-initial-mode property to configure at
startup the operating mode for the regulators that support changing
its mode during normal operation and a regulator-mode property for the
regulators that supports changing its operating mode when the system
enters in a suspend state. These properties were originally part of
Chanwoo Choi's regulator suspend state series [2] but were removed since
there wasn't a way to define the operatin modes in a generic way.

In this series, the generic regulator DT binding doc explains that each
device has to document what their valid operating modes are and the
driver has to parse those and translate to the standard regulator modes.

This series depend on [2] and also v2 of patch:
ARM: EXYNOS: Call regulator core suspend prepare and finish functions [3].

Javier Martinez Canillas (5):
  regulator: of: Decrement refcount for suspend state nodes
  regulator: core: Add regulator mode and initial mode properties
  regulator: max77802: Document regulator operating modes
  regulator: max77802: Parse regulator operating mode properties
  ARM: dts: Configure regulators for suspend on exynos Peach boards

 .../devicetree/bindings/regulator/max77802.txt | 33 +
 .../devicetree/bindings/regulator/regulator.txt| 14 
 arch/arm/boot/dts/exynos5420-peach-pit.dts | 81 ++
 arch/arm/boot/dts/exynos5800-peach-pi.dts  | 81 ++
 drivers/regulator/max77802.c   | 44 
 drivers/regulator/of_regulator.c   |  1 +
 6 files changed, 254 insertions(+)

Patch #1 is a trivial fix to of_get_regulation_constraints() where the
suspend state device node refcount was not decremented after usage.

Patch #2 adds the regulator-initial-mode and regulator-mode properties to the
generic regulator suspend state bindings.

Patch #3 documents the valid operating modes for the max77802 regulators.

Patch #4 adds the parse logic to fill the regulation constraints to change the
regulator operating modes by the core.

Patch #5 configure the regulators operating modes on Exynos Peach Chromebooks.

Best regards,
Javier

[0]: https://lkml.org/lkml/2014/10/8/331
[1]: https://lkml.org/lkml/2014/10/16/504
[2]: https://lkml.org/lkml/2014/10/10/161
[3]: http://www.spinics.net/lists/arm-kernel/msg369923.html
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v3 1/5] regulator: of: Decrement refcount for suspend state nodes

of_get_regulation_constraints() calls of_get_child_by_name() to find the
regulator-state-{mem,disk} child nodes for each regulator. This function
increments the device node reference counter but this is not decremented
once the function is done using the node.

Fix that by calling of_node_put() after finishing using the device node.

Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
 drivers/regulator/of_regulator.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/regulator/of_regulator.c b/drivers/regulator/of_regulator.c
index b375ffe..f0d19fc 100644
--- a/drivers/regulator/of_regulator.c
+++ b/drivers/regulator/of_regulator.c
@@ -107,6 +107,7 @@ static void of_get_regulation_constraints(struct 
device_node *np,
regulator-off-in-suspend))
suspend_state-disabled = true;
 
+   of_node_put(suspend_np);
suspend_state = NULL;
suspend_np = NULL;
}
-- 
2.1.0

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v3 5/5] ARM: dts: Configure regulators for suspend on exynos Peach boards

The regulator core now has support to choose if a regulator
has to be enabled or disabled during system suspend and also
the max77802 driver supports changing the regulator operating
mode during runtime and when the system enters into sleep mode.

To lower power during suspend, configure the regulators state
using the same configuration found in the ChromeOS 3.8 kernel.

Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---

Changes since v2:
 - Use the standard suspend state binding as suggested by Mark Brown.

 arch/arm/boot/dts/exynos5420-peach-pit.dts | 81 ++
 arch/arm/boot/dts/exynos5800-peach-pi.dts  | 81 ++
 2 files changed, 162 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 9a050e1..8b744c7 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -13,6 +13,7 @@
 #include dt-bindings/gpio/gpio.h
 #include dt-bindings/interrupt-controller/irq.h
 #include dt-bindings/clock/maxim,max77802.h
+#include dt-bindings/regulator/maxim,max77802.h
 #include exynos5420.dtsi
 
 / {
@@ -192,6 +193,9 @@
regulator-always-on;
regulator-boot-on;
regulator-ramp-delay = 12500;
+   regulator-state-mem {
+   regulator-off-in-suspend;
+   };
};
 
buck2_reg: BUCK2 {
@@ -201,6 +205,9 @@
regulator-always-on;
regulator-boot-on;
regulator-ramp-delay = 12500;
+   regulator-state-mem {
+   regulator-off-in-suspend;
+   };
};
 
buck3_reg: BUCK3 {
@@ -210,6 +217,9 @@
regulator-always-on;
regulator-boot-on;
regulator-ramp-delay = 12500;
+   regulator-state-mem {
+   regulator-off-in-suspend;
+   };
};
 
buck4_reg: BUCK4 {
@@ -219,6 +229,9 @@
regulator-always-on;
regulator-boot-on;
regulator-ramp-delay = 12500;
+   regulator-state-mem {
+   regulator-off-in-suspend;
+   };
};
 
buck5_reg: BUCK5 {
@@ -227,6 +240,9 @@
regulator-max-microvolt = 120;
regulator-always-on;
regulator-boot-on;
+   regulator-state-mem {
+   regulator-off-in-suspend;
+   };
};
 
buck6_reg: BUCK6 {
@@ -236,6 +252,9 @@
regulator-always-on;
regulator-boot-on;
regulator-ramp-delay = 12500;
+   regulator-state-mem {
+   regulator-off-in-suspend;
+   };
};
 
buck7_reg: BUCK7 {
@@ -244,6 +263,9 @@
regulator-max-microvolt = 135;
regulator-always-on;
regulator-boot-on;
+   regulator-state-mem {
+   regulator-on-in-suspend;
+   };
};
 
buck8_reg: BUCK8 {
@@ -252,6 +274,9 @@
regulator-max-microvolt = 285;
regulator-always-on;
regulator-boot-on;
+   regulator-state-mem {
+   regulator-off-in-suspend;
+   };
};
 
buck9_reg: BUCK9 {
@@ -260,6 +285,9 @@
regulator-max-microvolt = 200;
regulator-always-on;
regulator-boot-on;
+   regulator-state-mem {
+   regulator-on-in-suspend;
+   };
};
 
buck10_reg: BUCK10 {
@@ -268,6 +296,9 @@

[PATCH v3 4/5] regulator: max77802: Parse regulator operating mode properties

The max77802 PMIC regulators output can be configured in one of two
modes: Output ON (normal) and Output ON in Low Power Mode. Some of
the regulators support their operating mode to be changed on startup
or by consumers when the system is running while others only support
their operating mode to be changed while the system has entered in a
suspend state.

The regulator Device Tree binding documents a set of properties to
configure the regulators operating modes from a FDT. This patch parse
those properties and fills the regulator constraints so the regulator
core can call the suspend handlers when the system enters into sleep.

Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---

Changes since v2:
 - Use the standard suspend states binding instead of custom properties.
   Suggested by Mark Brown.

Changes since v1:
 - Use the static inline max77802_map_mode() function instead of a macro.
   Suggested by Mark Brown.

 drivers/regulator/max77802.c | 44 
 1 file changed, 44 insertions(+)

diff --git a/drivers/regulator/max77802.c b/drivers/regulator/max77802.c
index 5839c45..2cbf980 100644
--- a/drivers/regulator/max77802.c
+++ b/drivers/regulator/max77802.c
@@ -518,6 +518,48 @@ static struct regulator_desc regulators[] = {
 };
 
 #ifdef CONFIG_OF
+
+static void max77802_parse_opmodes(struct device_node *np,
+  struct regulation_constraints *cons)
+{
+   u32 pval;
+   int i;
+   char *states[PM_SUSPEND_MAX + 1] = {
+   [PM_SUSPEND_MEM] = regulator-state-mem,
+   [PM_SUSPEND_MAX] = regulator-state-disk,
+   };
+   struct regulator_state *state;
+   struct device_node *state_np;
+
+   if (!of_property_read_u32(np, regulator-initial-mode, pval))
+   cons-initial_mode = max77802_map_mode(pval);
+
+   for (i = 0; i  ARRAY_SIZE(states); i++) {
+   switch (i) {
+   case PM_SUSPEND_MEM:
+   state = cons-state_mem;
+   break;
+   case PM_SUSPEND_MAX:
+   state = cons-state_disk;
+   break;
+   default:
+   continue;
+   };
+
+   state_np = of_get_child_by_name(np, states[i]);
+   if (!state_np || !state)
+   continue;
+
+   if (!of_property_read_u32(np, regulator-mode, pval))
+   state-mode = max77802_map_mode(pval);
+
+   of_node_put(state_np);
+
+   state = NULL;
+   state_np = NULL;
+   };
+}
+
 static int max77802_pmic_dt_parse_pdata(struct platform_device *pdev,
struct max77686_platform_data *pdata)
 {
@@ -555,6 +597,8 @@ static int max77802_pmic_dt_parse_pdata(struct 
platform_device *pdev,
rdata[i].initdata = rmatch.init_data;
rdata[i].of_node = rmatch.of_node;
rdata[i].id = regulators[i].id;
+   max77802_parse_opmodes(rdata[i].of_node,
+  rdata[i].initdata-constraints);
}
 
pdata-regulators = rdata;
-- 
2.1.0

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v3 3/5] regulator: max77802: Document regulator operating modes

Some regulators from the max77802 PMIC support to be configured in one
of two operating mode: Output ON (normal) and Output On Low Power Mode.
Not all regulators support these two modes and for some of them, the
mode can be changed while the system is running in normal operation
while others only support their mode to be changed on system suspend.

Extend the max77802 PMIC binding, documenting the possible operating
modes values so the regulators modes can be correctly configured.

Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---

Changes since v2:
 - Use the standard suspend states bindings as suggested by Mark Brown.

 .../devicetree/bindings/regulator/max77802.txt | 33 ++
 1 file changed, 33 insertions(+)

diff --git a/Documentation/devicetree/bindings/regulator/max77802.txt 
b/Documentation/devicetree/bindings/regulator/max77802.txt
index 5aeaffc..f265319 100644
--- a/Documentation/devicetree/bindings/regulator/max77802.txt
+++ b/Documentation/devicetree/bindings/regulator/max77802.txt
@@ -25,6 +25,27 @@ with their hardware counterparts as follow. The valid names 
are:
example: LDO1, LDO2, LDO35.
-BUCKn  :   for BUCKs, where n can lie in range 1 to 10.
example: BUCK1, BUCK5, BUCK10.
+
+The max77802 regulator supports two different operating modes: Normal and Low
+Power Mode. Some regulators support the modes to be changed at startup or by
+the consumers during normal operation while others only support to change the
+mode during system suspend. The standard regulator suspend states binding can
+be used to configure the regulator operating mode.
+
+The regulators that support the standard regulator-initial-mode property,
+changing their mode during normal operation are: LDOs 1, 3, 20 and 21.
+
+The possible values for regulator-initial-mode and regulator-mode are:
+   1: Normal regulator voltage output mode.
+   3: Low Power which reduces the quiescent current down to only 1uA
+
+The list of valid modes are defined in the dt-bindings/regulator/regulator.h
+header and can be included by device tree source files.
+
+The standard regulator-mode property can only be used for regulators that
+support changing their mode to Low Power Mode during suspend. These regulators
+are: BUCKs 2-4 and LDOs 1-35.
+
 Example:
 
max77802@09 {
@@ -36,11 +57,23 @@ Example:
#size-cells = 0;
 
regulators {
+   ldo1_reg: LDO1 {
+   regulator-name = vdd_1v0;
+   regulator-min-microvolt = 100;
+   regulator-max-microvolt = 100;
+   regulator-always-on;
+   regulator-initial-mode = MAX77802_OPMODE_LP;
+   };
+
ldo11_reg: LDO11 {
regulator-name = vdd_ldo11;
regulator-min-microvolt = 190;
regulator-max-microvolt = 190;
regulator-always-on;
+   regulator-state-mem {
+   regulator-on-in-suspend;
+   regulator-mode = MAX77802_OPMODE_LP;
+   };
};
 
buck1_reg: BUCK1 {
-- 
2.1.0

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[GIT PULL 1/3] 1st Round of Samsung cleanup for v3.19

2014-10-20 Thread Kukjin Kim


Hi,

Here is 1st round of Samsung updates for v3.19 and actually it has been 
sent out to arm-soc for v3.18 before but as you know missed. I've just 
rebased the branch on top of v3.18-rc1, please pull.


Thanks,
Kukjin



The following changes since commit f114040e3ea6e07372334ade75d1ee0775c355e1:

  Linux 3.18-rc1 (2014-10-19 18:08:38 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/samsung-cleanup


for you to fetch changes up to 13cfa6c4f7facfc690ba9e99ec382c151fddaced:

  ARM: EXYNOS: Fix CPU idle clock down after CPU off (2014-10-21 
00:06:22 +0900)



Samsung cleanup for v3.19

- Cleanup SMP/hotplug codes from hotplug.c to platsmp.c
- Remove unneeded __ref annotation for exynos_cpu_die()
- Fix the way to power down CPU on exynos4 and CPUidle
  clock down after power down some CPU


Krzysztof Kozlowski (3):
  ARM: EXYNOS: Move code from hotplug.c to platsmp.c
  ARM: EXYNOS: Remove unneeded __ref annotation for cpu_die function
  ARM: EXYNOS: Fix CPU idle clock down after CPU off

 arch/arm/mach-exynos/Makefile   |   3 --
 arch/arm/mach-exynos/common.h   |   2 -
 arch/arm/mach-exynos/hotplug.c  |  91 
 arch/arm/mach-exynos/platsmp.c  | 113 


 arch/arm/mach-exynos/regs-pmu.h |   3 ++
 5 files changed, 116 insertions(+), 96 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/hotplug.c
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[GIT PULL 3/3] 1st Round of Samsung DT updates for v3.19

2014-10-20 Thread Kukjin Kim


Hi,

Here is Samsung DT updates for v3.19, please pull.

Thanks,
Kukjin

---

The following changes since commit f114040e3ea6e07372334ade75d1ee0775c355e1:

  Linux 3.18-rc1 (2014-10-19 18:08:38 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/samsung-dt


for you to fetch changes up to e540920cf21c2764047b8a6ddaeaa0683624e46e:

  ARM: dts: add CPU nodes for Exynos4 SoCs (2014-10-21 00:12:42 +0900)


Samsung DT updates for v3.19

- add CPU nodes for exynos4210, exynos4212, exynos4412

- exynos4x12-pinctrl: add utility macro to define pin sleep states
- exynos4412-trats2: add Maxim77693 PMIC node, add sleep mode pin
  configuration and keep eMMC regulators soft-disabled

- add new exynos5250-spring DT

- cleanup exynos5250-arndale, exynos5250-smdk5250 and exynos5250-snow

- exynos5250-arndale: fix apparent GPIO typo and simplify USB3503
- exynos5250-snow and exynos Peach boards: add rtc_src clock for RTC

- correct mmc0 capability string exynos5420-peach-pit and exynos5800-
  peach-pi

- exynos3250: add MFC codec nodes

- s3c64xx: enable PWM node by default


Andreas Faerber (8):
  ARM: dts: Prepare node labels for exynos5250
  ARM: dts: Clean up exynos5250-snow
  ARM: dts: Fill in bootargs for exynos5250-snow
  ARM: dts: Clean up exynos5250-smdk5250
  ARM: dts: Clean up exynos5250-arndale
  ARM: dts: Fix apparent GPIO typo in exynos5250-arndale
  ARM: dts: Simplify USB3503 on exynos5250-arndale
  ARM: dts: Add exynos5250-spring device tree

Bartlomiej Zolnierkiewicz (1):
  ARM: dts: add CPU nodes for Exynos4 SoCs

Jacek Anaszewski (1):
  ARM: dts: add MFC codec device node for exynos3250

Javier Martinez Canillas (2):
  ARM: dts: Add rtc_src clk for s3c-rtc on exynos Peach boards
  ARM: dts: Add rtc_src clk for s3c-rtc on exynos5250-snow

Krzysztof Kozlowski (1):
  ARM: dts: Add Maxim 77693 PMIC to exynos4412-trats2

Naveen Krishna Chatradhi (1):
  ARM: dts: correct the mmc0 capability string for exynos Peach boards

Tomasz Figa (4):
  ARM: dts: Enable PWM node by default for s3c64xx
  ARM: dts: Keep eMMC regulators soft-disabled for exynos4412-trats2
  ARM: dts: Add utility macro to define pin sleep states for 
exynos4x12-pinctrl

  ARM: dts: Add sleep mode pin configuration for exynos4412-trats2

 arch/arm/boot/dts/Makefile |   1 +
 arch/arm/boot/dts/exynos3250.dtsi  |  10 +
 arch/arm/boot/dts/exynos4210.dtsi  |  17 +
 arch/arm/boot/dts/exynos4212.dtsi  |  17 +
 arch/arm/boot/dts/exynos4412-trats2.dts| 352 ++-
 arch/arm/boot/dts/exynos4412.dtsi  |  29 +
 arch/arm/boot/dts/exynos4x12-pinctrl.dtsi  |  16 +
 arch/arm/boot/dts/exynos5250-arndale.dts   | 907 
++---

 arch/arm/boot/dts/exynos5250-smdk5250.dts  | 618 ++--
 arch/arm/boot/dts/exynos5250-snow.dts  | 266 -
 arch/arm/boot/dts/exynos5250-spring.dts| 536 +
 arch/arm/boot/dts/exynos5250.dtsi  |  16 +-
 arch/arm/boot/dts/exynos5420-peach-pit.dts |   7 +-
 arch/arm/boot/dts/exynos5800-peach-pi.dts  |   7 +-
 arch/arm/boot/dts/s3c6410-mini6410.dts |   4 -
 arch/arm/boot/dts/s3c64xx.dtsi |   1 -
 16 files changed, 1890 insertions(+), 914 deletions(-)
 create mode 100644 arch/arm/boot/dts/exynos5250-spring.dts
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 2/2] ARM: EXYNOS: Call regulator core suspend prepare and finish functions

2014-10-20 Thread Doug Anderson

Javier,

On Thu, Oct 16, 2014 at 3:13 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
 The regulator framework has a set of helpers functions to be used when
 the system is entering and leaving from suspend but these are not called
 on Exynos platforms. This means that the .set_suspend_* function handlers
 defined by regulator drivers are not called when the system is suspended.

 Suggested-by: Doug Anderson diand...@chromium.org
 Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
 ---
  arch/arm/mach-exynos/suspend.c | 18 ++
  1 file changed, 18 insertions(+)

 diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
 index cc8d237..ee9a8e0 100644
 --- a/arch/arm/mach-exynos/suspend.c
 +++ b/arch/arm/mach-exynos/suspend.c
 @@ -20,6 +20,7 @@
  #include linux/io.h
  #include linux/irqchip/arm-gic.h
  #include linux/err.h
 +#include linux/regulator/machine.h

  #include asm/cacheflush.h
  #include asm/hardware/cache-l2x0.h
 @@ -443,6 +444,22 @@ static int exynos_suspend_enter(suspend_state_t state)

  static int exynos_suspend_prepare(void)
  {
 +   int ret;
 +
 +   /*
 +* REVISIT: It would be better if struct platform_suspend_ops
 +* .prepare handler get the suspend_state_t as a parameter to
 +* avoid hard-coding the suspend to mem state. It's safe to do
 +* it now only because the suspend_valid_only_mem function is
 +* used as the .valid callback used to check if a given state
 +* is supported by the platform anyways.
 +*/
 +   ret = regulator_suspend_prepare(PM_SUSPEND_MEM);
 +   if (ret) {
 +   pr_err(Failed to prepare regulators for system suspend\n);
 +   return ret;
 +   }
 +
 s3c_pm_check_prepare();

 return 0;
 @@ -451,6 +468,7 @@ static int exynos_suspend_prepare(void)
  static void exynos_suspend_finish(void)
  {
 s3c_pm_check_cleanup();
 +   regulator_suspend_finish();

It turns out that regulator_suspend_finish() actually returns an error
code.  Could you print a warning if you see it?

Other than that, feel free to add my Reviewed-by.  Thanks!

-Doug
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 2/2] ARM: EXYNOS: Call regulator core suspend prepare and finish functions

[adding Chris Zong as cc who posted a similar patch for Rockchip]

Hello Doug,

On 10/20/2014 06:26 PM, Doug Anderson wrote:
 Javier,
 
 On Thu, Oct 16, 2014 at 3:13 AM, Javier Martinez Canillas
 javier.marti...@collabora.co.uk wrote:
 The regulator framework has a set of helpers functions to be used when
 the system is entering and leaving from suspend but these are not called
 on Exynos platforms. This means that the .set_suspend_* function handlers
 defined by regulator drivers are not called when the system is suspended.

 Suggested-by: Doug Anderson diand...@chromium.org
 Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
 ---
  arch/arm/mach-exynos/suspend.c | 18 ++
  1 file changed, 18 insertions(+)

 diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
 index cc8d237..ee9a8e0 100644
 --- a/arch/arm/mach-exynos/suspend.c
 +++ b/arch/arm/mach-exynos/suspend.c
 @@ -20,6 +20,7 @@
  #include linux/io.h
  #include linux/irqchip/arm-gic.h
  #include linux/err.h
 +#include linux/regulator/machine.h

  #include asm/cacheflush.h
  #include asm/hardware/cache-l2x0.h
 @@ -443,6 +444,22 @@ static int exynos_suspend_enter(suspend_state_t state)

  static int exynos_suspend_prepare(void)
  {
 +   int ret;
 +
 +   /*
 +* REVISIT: It would be better if struct platform_suspend_ops
 +* .prepare handler get the suspend_state_t as a parameter to
 +* avoid hard-coding the suspend to mem state. It's safe to do
 +* it now only because the suspend_valid_only_mem function is
 +* used as the .valid callback used to check if a given state
 +* is supported by the platform anyways.
 +*/
 +   ret = regulator_suspend_prepare(PM_SUSPEND_MEM);
 +   if (ret) {
 +   pr_err(Failed to prepare regulators for system suspend\n);
 +   return ret;
 +   }
 +
 s3c_pm_check_prepare();

 return 0;
 @@ -451,6 +468,7 @@ static int exynos_suspend_prepare(void)
  static void exynos_suspend_finish(void)
  {
 s3c_pm_check_cleanup();
 +   regulator_suspend_finish();
 
 It turns out that regulator_suspend_finish() actually returns an error
 code.  Could you print a warning if you see it?
 

Yes, I noticed this when looking at Chris patch for Rockchip but didn't re-spin
because I'm not sure anymore if this is the right solution. I mean, if is
correct to add the same calls on every platform or if the regulator suspend
prepare and finish functions should be called from the suspend core instead.

For example calling regulator_suspend_prepare() from platform_suspend_prepare()
[0] will have the advantage of passing the correct suspend_state_t state instead
of hard-coding PM_SUSPEND_MEM and will make the regulator suspend states to work
on all platforms.

 Other than that, feel free to add my Reviewed-by.  Thanks!
 
 -Doug
 

Best regards,
Javier

[0]: http://lxr.free-electrons.com/source/kernel/power/suspend.c#L141

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 2/2] ARM: EXYNOS: Call regulator core suspend prepare and finish functions

2014-10-20 Thread Doug Anderson

Javier,

On Mon, Oct 20, 2014 at 9:58 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
 It turns out that regulator_suspend_finish() actually returns an error
 code.  Could you print a warning if you see it?


 Yes, I noticed this when looking at Chris patch for Rockchip but didn't 
 re-spin
 because I'm not sure anymore if this is the right solution. I mean, if is
 correct to add the same calls on every platform or if the regulator suspend
 prepare and finish functions should be called from the suspend core instead.

 For example calling regulator_suspend_prepare() from 
 platform_suspend_prepare()
 [0] will have the advantage of passing the correct suspend_state_t state 
 instead
 of hard-coding PM_SUSPEND_MEM and will make the regulator suspend states to 
 work
 on all platforms.

Yes.  If we can get this added to the core that would be better.

I guess I was just trying to follow the suggestion that was in the
regulator code:
http://lxr.free-electrons.com/source/drivers/regulator/core.c#L3699
that says This will usually be called by machine suspend code prior
to supending.

-Doug
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 2/2] ARM: EXYNOS: Call regulator core suspend prepare and finish functions

[adding Rafael Wysocki to cc as Suspend-to-RAM maintainer]

On 10/20/2014 07:36 PM, Doug Anderson wrote:
 Javier,
 
 On Mon, Oct 20, 2014 at 9:58 AM, Javier Martinez Canillas
 javier.marti...@collabora.co.uk wrote:
 It turns out that regulator_suspend_finish() actually returns an error
 code.  Could you print a warning if you see it?


 Yes, I noticed this when looking at Chris patch for Rockchip but didn't 
 re-spin
 because I'm not sure anymore if this is the right solution. I mean, if is
 correct to add the same calls on every platform or if the regulator suspend
 prepare and finish functions should be called from the suspend core instead.

 For example calling regulator_suspend_prepare() from 
 platform_suspend_prepare()
 [0] will have the advantage of passing the correct suspend_state_t state 
 instead
 of hard-coding PM_SUSPEND_MEM and will make the regulator suspend states to 
 work
 on all platforms.
 
 Yes.  If we can get this added to the core that would be better.
 

Agreed, let's see what Rafael says about it.

 I guess I was just trying to follow the suggestion that was in the
 regulator code:
 http://lxr.free-electrons.com/source/drivers/regulator/core.c#L3699
 that says This will usually be called by machine suspend code prior
 to supending.
 
 -Doug
 

I see, but still I feel as if it may be a lot of duplication since most
platforms will likely want to call the regulator core suspend prepare
and finish functions. Maybe it can be added as a Kconfig option so each
platform can choose at the config level if they want those to be called?

Best regard,
Javier
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 2/2] ARM: EXYNOS: Call regulator core suspend prepare and finish functions

2014-10-20 Thread Mark Brown

On Mon, Oct 20, 2014 at 09:50:57PM +0200, Javier Martinez Canillas wrote:
 On 10/20/2014 07:36 PM, Doug Anderson wrote:

  I guess I was just trying to follow the suggestion that was in the
  regulator code:
  http://lxr.free-electrons.com/source/drivers/regulator/core.c#L3699
  that says This will usually be called by machine suspend code prior
  to supending.

 I see, but still I feel as if it may be a lot of duplication since most
 platforms will likely want to call the regulator core suspend prepare

Note that architectures are an example of a platform.  It really depends
what's responsible for final poweroff, we want this called as late as we
possibly can.

 and finish functions. Maybe it can be added as a Kconfig option so each
 platform can choose at the config level if they want those to be called?

No, that's obviously not going to do anything useful for multiplatform.


signature.asc
Description: Digital signature

Re: [PATCH v2 2/2] ARM: EXYNOS: Call regulator core suspend prepare and finish functions

Hello Mark,

On 10/20/2014 09:56 PM, Mark Brown wrote:
 On Mon, Oct 20, 2014 at 09:50:57PM +0200, Javier Martinez Canillas wrote:
 On 10/20/2014 07:36 PM, Doug Anderson wrote:
 
  I guess I was just trying to follow the suggestion that was in the
  regulator code:
  http://lxr.free-electrons.com/source/drivers/regulator/core.c#L3699
  that says This will usually be called by machine suspend code prior
  to supending.
 
 I see, but still I feel as if it may be a lot of duplication since most
 platforms will likely want to call the regulator core suspend prepare
 
 Note that architectures are an example of a platform.  It really depends
 what's responsible for final poweroff, we want this called as late as we
 possibly can.
 

Got it. Thanks for the explanation.

 and finish functions. Maybe it can be added as a Kconfig option so each
 platform can choose at the config level if they want those to be called?
 
 No, that's obviously not going to do anything useful for multiplatform.
 

Ok, then let's keep to do it per-platform as is proposed on $subject for
Exynos and what Chris proposed for Rockchip in [0] since it seems that's
the place where these calls belong.

Best regards,
Javier

[0]: http://www.spinics.net/lists/devicetree/msg53640.html
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v3 0/2] ARM: EXYNOS: Call regulator suspend prepare/finish

Hello,

This series add support for Exynos platforms to prepare regulators for
system suspend. The regulator core has a set of helpers functions to be
used when the system is entering and leaving from a suspend state but
currently there is only one user in mainline.

This user is drivers/mfd/sec-core.c but it calls regulator_suspend_prepare()
from within the driver power-management suspend function. This does not
seems to be correct since the regulator suspend prepare function affects all
regulators in the system and not only the ones managed by this device.

So patch #1 in this series revert the commit that introduced that change and
patch #2 calls the regulator framework suspend/finish functions from the
Exynos platform power-management code. The first patch should be queued through
the mfd tree and the second through the linux-samsung tree.

Changes since v2:
 - Check for regulator_suspend_finish() return value for an error.
   Suggested by Doug Anderson.

Changes since v1:
 - Remove the call to regulator_suspend_prepare() from drivers/mfd/sec-core.c
   as suggested by Doug Anderson.
 - Call regulator_suspend_prepare() before s3c_pm_check_prepare() as suggested
   by Doug Anderson.
 - Added Lee Jones to cc list since there is a change for the mfd framework.

Javier Martinez Canillas (2):
  Revert mfd: sec-core: Prepare regulators for suspend state to reduce
power-consumption
  ARM: EXYNOS: Call regulator core suspend prepare and finish functions

 arch/arm/mach-exynos/suspend.c | 23 +++
 drivers/mfd/Kconfig|  1 -
 drivers/mfd/sec-core.c | 10 --
 3 files changed, 23 insertions(+), 11 deletions(-)

-- 
2.1.0

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v3 2/2] ARM: EXYNOS: Call regulator core suspend prepare and finish functions

The regulator framework has a set of helpers functions to be used when
the system is entering and leaving from suspend but these are not called
on Exynos platforms. This means that the .set_suspend_* function handlers
defined by regulator drivers are not called when the system is suspended.

Suggested-by: Doug Anderson diand...@chromium.org
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Doug Anderson diand...@chromium.org
---
 arch/arm/mach-exynos/suspend.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index cc8d237..f8e7dcd 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -20,6 +20,7 @@
 #include linux/io.h
 #include linux/irqchip/arm-gic.h
 #include linux/err.h
+#include linux/regulator/machine.h
 
 #include asm/cacheflush.h
 #include asm/hardware/cache-l2x0.h
@@ -443,6 +444,22 @@ static int exynos_suspend_enter(suspend_state_t state)
 
 static int exynos_suspend_prepare(void)
 {
+   int ret;
+
+   /*
+* REVISIT: It would be better if struct platform_suspend_ops
+* .prepare handler get the suspend_state_t as a parameter to
+* avoid hard-coding the suspend to mem state. It's safe to do
+* it now only because the suspend_valid_only_mem function is
+* used as the .valid callback used to check if a given state
+* is supported by the platform anyways.
+*/
+   ret = regulator_suspend_prepare(PM_SUSPEND_MEM);
+   if (ret) {
+   pr_err(Failed to prepare regulators for suspend (%d)\n, ret);
+   return ret;
+   }
+
s3c_pm_check_prepare();
 
return 0;
@@ -450,7 +467,13 @@ static int exynos_suspend_prepare(void)
 
 static void exynos_suspend_finish(void)
 {
+   int ret;
+
s3c_pm_check_cleanup();
+
+   ret = regulator_suspend_finish();
+   if (ret)
+   pr_warn(Failed to resume regulators from suspend (%d)\n, ret);
 }
 
 static const struct platform_suspend_ops exynos_suspend_ops = {
-- 
2.1.0

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v3 1/2] Revert mfd: sec-core: Prepare regulators for suspend state to reduce power-consumption

This reverts commit b7cde7078d2344073c310aa65fc2b0a845d2cb5b
(mfd: sec-core: Prepare regulators for suspend state to reduce 
power-consumption)

Commit b7cde7078d23 called regulator_suspend_prepare() to prepare the
regulators for a suspend state. But it did from the device pm suspend
handler while the regulator suspend prepare function iterates over all
regulators and not only the one managed by this device so it doesn't
seems to be correct to call it from within a device driver.

It is better to call the regulator suspend prepare/finish functions
from platform code instead so this patch reverts the mentioned commit.

Suggested-by: Doug Anderson diand...@chromium.org
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
 drivers/mfd/Kconfig|  1 -
 drivers/mfd/sec-core.c | 10 --
 2 files changed, 11 deletions(-)

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 1456ea7..fd8cc4c 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -655,7 +655,6 @@ config MFD_SEC_CORE
select MFD_CORE
select REGMAP_I2C
select REGMAP_IRQ
-   select REGULATOR
help
 Support for the Samsung Electronics MFD series.
 This driver provides common support for accessing the device,
diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index dba7e2b..5993608 100644
--- a/drivers/mfd/sec-core.c
+++ b/drivers/mfd/sec-core.c
@@ -31,7 +31,6 @@
 #include linux/mfd/samsung/s2mpu02.h
 #include linux/mfd/samsung/s5m8763.h
 #include linux/mfd/samsung/s5m8767.h
-#include linux/regulator/machine.h
 #include linux/regmap.h
 
 static const struct mfd_cell s5m8751_devs[] = {
@@ -432,15 +431,6 @@ static int sec_pmic_suspend(struct device *dev)
 */
disable_irq(sec_pmic-irq);
 
-   switch (sec_pmic-device_type) {
-   case S2MPS14X:
-   case S2MPU02:
-   regulator_suspend_prepare(PM_SUSPEND_MEM);
-   break;
-   default:
-   break;
-   }
-
return 0;
 }
 
-- 
2.1.0

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v3 1/2] Revert mfd: sec-core: Prepare regulators for suspend state to reduce power-consumption

2014-10-20 Thread Doug Anderson

Javier,

On Mon, Oct 20, 2014 at 2:05 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
 This reverts commit b7cde7078d2344073c310aa65fc2b0a845d2cb5b
 (mfd: sec-core: Prepare regulators for suspend state to reduce 
 power-consumption)

 Commit b7cde7078d23 called regulator_suspend_prepare() to prepare the
 regulators for a suspend state. But it did from the device pm suspend
 handler while the regulator suspend prepare function iterates over all
 regulators and not only the one managed by this device so it doesn't
 seems to be correct to call it from within a device driver.

 It is better to call the regulator suspend prepare/finish functions
 from platform code instead so this patch reverts the mentioned commit.

 Suggested-by: Doug Anderson diand...@chromium.org
 Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk

Reviewed-by: Doug Anderson diand...@chromium.org
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v3 2/2] ARM: EXYNOS: Call regulator core suspend prepare and finish functions

Hello Doug,

On 10/20/2014 11:40 PM, Doug Anderson wrote:
 Javier,
 
 On Mon, Oct 20, 2014 at 2:05 PM, Javier Martinez Canillas
 javier.marti...@collabora.co.uk wrote:
 The regulator framework has a set of helpers functions to be used when
 the system is entering and leaving from suspend but these are not called
 on Exynos platforms. This means that the .set_suspend_* function handlers
 defined by regulator drivers are not called when the system is suspended.

 Suggested-by: Doug Anderson diand...@chromium.org
 Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
 Reviewed-by: Doug Anderson diand...@chromium.org
 
 I think you forgot to carry Chanwoo's review:
 
 Reviewed-by: Chanwoo Choicw00.c...@samsung.com
 
 I don't think you've made any changes that would need to invalidate his 
 review.
 

Yes, I forgot to add the tag to my local branch so it was missed when generating
the patch for the new version, sorry about that...

Best regards,
Javier
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v3 1/2] Revert mfd: sec-core: Prepare regulators for suspend state to reduce power-consumption

Hi Javier,

On 10/21/2014 06:05 AM, Javier Martinez Canillas wrote:
 This reverts commit b7cde7078d2344073c310aa65fc2b0a845d2cb5b
 (mfd: sec-core: Prepare regulators for suspend state to reduce 
 power-consumption)
 
 Commit b7cde7078d23 called regulator_suspend_prepare() to prepare the
 regulators for a suspend state. But it did from the device pm suspend
 handler while the regulator suspend prepare function iterates over all
 regulators and not only the one managed by this device so it doesn't
 seems to be correct to call it from within a device driver.
 
 It is better to call the regulator suspend prepare/finish functions
 from platform code instead so this patch reverts the mentioned commit.
 
 Suggested-by: Doug Anderson diand...@chromium.org
 Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
 ---
  drivers/mfd/Kconfig|  1 -
  drivers/mfd/sec-core.c | 10 --
  2 files changed, 11 deletions(-)
 
 diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
 index 1456ea7..fd8cc4c 100644
 --- a/drivers/mfd/Kconfig
 +++ b/drivers/mfd/Kconfig
 @@ -655,7 +655,6 @@ config MFD_SEC_CORE
   select MFD_CORE
   select REGMAP_I2C
   select REGMAP_IRQ
 - select REGULATOR
   help
Support for the Samsung Electronics MFD series.
This driver provides common support for accessing the device,
 diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
 index dba7e2b..5993608 100644
 --- a/drivers/mfd/sec-core.c
 +++ b/drivers/mfd/sec-core.c
 @@ -31,7 +31,6 @@
  #include linux/mfd/samsung/s2mpu02.h
  #include linux/mfd/samsung/s5m8763.h
  #include linux/mfd/samsung/s5m8767.h
 -#include linux/regulator/machine.h
  #include linux/regmap.h
  
  static const struct mfd_cell s5m8751_devs[] = {
 @@ -432,15 +431,6 @@ static int sec_pmic_suspend(struct device *dev)
*/
   disable_irq(sec_pmic-irq);
  
 - switch (sec_pmic-device_type) {
 - case S2MPS14X:
 - case S2MPU02:
 - regulator_suspend_prepare(PM_SUSPEND_MEM);
 - break;
 - default:
 - break;
 - }
 -
   return 0;
  }
  
 

Reviewed-by: Chanwoo Choi cw00.c...@samsung.com

Thanks,
Chanwoo Choi
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 35/47] arm: Register with kernel poweroff handler

2014-10-20 Thread Guenter Roeck

Register with kernel poweroff handler instead of setting pm_power_off
directly. Always use register_power_off_handler_simple as there is no
indication that more than one poweroff handler is registered.

If the poweroff handler only resets the system or puts the CPU in sleep mode,
select the fallback priority to indicate that the poweroff handler is one
of last resort. If the poweroff handler powers off the system, select the
default priority.

Cc: Russell King li...@arm.linux.org.uk
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
- Use defines to specify poweroff handler priorities
- Drop changes in arch/arm/mach-at91/setup.c (file removed upstream)

 arch/arm/kernel/psci.c | 3 ++-
 arch/arm/mach-at91/board-gsia18s.c | 3 ++-
 arch/arm/mach-bcm/board_bcm2835.c  | 3 ++-
 arch/arm/mach-cns3xxx/cns3420vb.c  | 3 ++-
 arch/arm/mach-cns3xxx/core.c   | 3 ++-
 arch/arm/mach-highbank/highbank.c  | 3 ++-
 arch/arm/mach-imx/mach-mx31moboard.c   | 3 ++-
 arch/arm/mach-iop32x/em7210.c  | 3 ++-
 arch/arm/mach-iop32x/glantank.c| 3 ++-
 arch/arm/mach-iop32x/iq31244.c | 3 ++-
 arch/arm/mach-iop32x/n2100.c   | 3 ++-
 arch/arm/mach-ixp4xx/dsmg600-setup.c   | 3 ++-
 arch/arm/mach-ixp4xx/nas100d-setup.c   | 3 ++-
 arch/arm/mach-ixp4xx/nslu2-setup.c | 3 ++-
 arch/arm/mach-omap2/board-omap3touchbook.c | 3 ++-
 arch/arm/mach-orion5x/board-mss2.c | 3 ++-
 arch/arm/mach-orion5x/dns323-setup.c   | 9 ++---
 arch/arm/mach-orion5x/kurobox_pro-setup.c  | 3 ++-
 arch/arm/mach-orion5x/ls-chl-setup.c   | 3 ++-
 arch/arm/mach-orion5x/ls_hgl-setup.c   | 3 ++-
 arch/arm/mach-orion5x/lsmini-setup.c   | 3 ++-
 arch/arm/mach-orion5x/mv2120-setup.c   | 3 ++-
 arch/arm/mach-orion5x/net2big-setup.c  | 3 ++-
 arch/arm/mach-orion5x/terastation_pro2-setup.c | 3 ++-
 arch/arm/mach-orion5x/ts209-setup.c| 3 ++-
 arch/arm/mach-orion5x/ts409-setup.c| 3 ++-
 arch/arm/mach-pxa/corgi.c  | 3 ++-
 arch/arm/mach-pxa/mioa701.c| 3 ++-
 arch/arm/mach-pxa/poodle.c | 3 ++-
 arch/arm/mach-pxa/spitz.c  | 3 ++-
 arch/arm/mach-pxa/tosa.c   | 3 ++-
 arch/arm/mach-pxa/viper.c  | 3 ++-
 arch/arm/mach-pxa/z2.c | 7 ---
 arch/arm/mach-pxa/zeus.c   | 7 ---
 arch/arm/mach-s3c24xx/mach-gta02.c | 3 ++-
 arch/arm/mach-s3c24xx/mach-jive.c  | 3 ++-
 arch/arm/mach-s3c24xx/mach-vr1000.c| 3 ++-
 arch/arm/mach-s3c64xx/mach-smartq.c| 3 ++-
 arch/arm/mach-sa1100/generic.c | 3 ++-
 arch/arm/mach-sa1100/simpad.c  | 3 ++-
 arch/arm/mach-u300/regulator.c | 3 ++-
 arch/arm/mach-vt8500/vt8500.c  | 3 ++-
 arch/arm/xen/enlighten.c   | 3 ++-
 43 files changed, 94 insertions(+), 49 deletions(-)

diff --git a/arch/arm/kernel/psci.c b/arch/arm/kernel/psci.c
index f73891b..4917c99 100644
--- a/arch/arm/kernel/psci.c
+++ b/arch/arm/kernel/psci.c
@@ -264,7 +264,8 @@ static int psci_0_2_init(struct device_node *np)
 
arm_pm_restart = psci_sys_reset;
 
-   pm_power_off = psci_sys_poweroff;
+   register_power_off_handler_simple(psci_sys_poweroff,
+ POWEROFF_PRIORITY_DEFAULT);
 
 out_put_node:
of_node_put(np);
diff --git a/arch/arm/mach-at91/board-gsia18s.c 
b/arch/arm/mach-at91/board-gsia18s.c
index bf5cc55..cb5d1c3 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -521,7 +521,8 @@ static void gsia18s_power_off(void)
 
 static int __init gsia18s_power_off_init(void)
 {
-   pm_power_off = gsia18s_power_off;
+   register_power_off_handler_simple(gsia18s_power_off,
+ POWEROFF_PRIORITY_DEFAULT);
return 0;
 }
 
diff --git a/arch/arm/mach-bcm/board_bcm2835.c 
b/arch/arm/mach-bcm/board_bcm2835.c
index 70f2f39..307ebc1 100644
--- a/arch/arm/mach-bcm/board_bcm2835.c
+++ b/arch/arm/mach-bcm/board_bcm2835.c
@@ -111,7 +111,8 @@ static void __init bcm2835_init(void)
 
bcm2835_setup_restart();
if (wdt_regs)
-   pm_power_off = bcm2835_power_off;
+   register_power_off_handler_simple(bcm2835_power_off,
+ POWEROFF_PRIORITY_FALLBACK);
 
bcm2835_init_clocks();
 
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c 
b/arch/arm/mach-cns3xxx/cns3420vb.c
index 6428bcc7..3f48979 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -224,7 +224,8 @@ static void __init cns3420_init(void)
cns3xxx_ahci_init();
cns3xxx_sdhci_init();
 
-   pm_power_off =

Re: [RFC PATCH] drm/exynos: Add DECON driver

2014-10-20 Thread Ajay kumar

ping!

On Fri, Oct 10, 2014 at 6:18 PM, Ajay Kumar ajaykumar...@samsung.com wrote:
 This series is based on exynos-drm-next branch of Inki Dae's tree at:
 git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git

 DECON(Display and Enhancement Controller) is the new IP
 in exynos7 SOC for generating video signals using pixel data.

 DECON driver can be used to drive 2 different interfaces on Exynos7:
 DECON-INT(video controller) and DECON-EXT(Mixer for HDMI)

 The existing FIMD driver code was used as a template to create
 DECON driver. Only DECON-INT is supported as of now, and
 DECON-EXT support will be added later.

 Signed-off-by: Akshu Agrawal aksh...@samsung.com
 Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
 ---
  .../devicetree/bindings/video/exynos-decon.txt |   68 ++
  drivers/gpu/drm/exynos/Kconfig |   11 +-
  drivers/gpu/drm/exynos/Makefile|1 +
  drivers/gpu/drm/exynos/exynos_drm_decon.c  | 1086 
 
  drivers/gpu/drm/exynos/exynos_drm_drv.c|   17 +-
  drivers/gpu/drm/exynos/exynos_drm_drv.h|   11 +
  include/video/samsung_decon.h  |  346 +++
  7 files changed, 1537 insertions(+), 3 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/video/exynos-decon.txt
  create mode 100644 drivers/gpu/drm/exynos/exynos_drm_decon.c
  create mode 100644 include/video/samsung_decon.h

 diff --git a/Documentation/devicetree/bindings/video/exynos-decon.txt 
 b/Documentation/devicetree/bindings/video/exynos-decon.txt
 new file mode 100644
 index 000..e865650
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/video/exynos-decon.txt
 @@ -0,0 +1,68 @@
 +Device-Tree bindings for Samsung Exynos7 SoC display controller (DECON)
 +
 +DECON (Display and Enhancement Controller) is the Display Controller for the
 +Exynos7 series of SoCs which transfers the image data from a video memory
 +buffer to an external LCD interface.
 +
 +Required properties:
 +- compatible: value should be samsung,exynos7-decon;
 +
 +- reg: physical base address and length of the DECON registers set.
 +
 +- interrupt-parent: should be the phandle of the decon controller's
 +   parent interrupt controller.
 +
 +- interrupts: should contain a list of all DECON IP block interrupts in the
 +order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
 +format depends on the interrupt controller used.
 +
 +- interrupt-names: should contain the interrupt names: fifo, vsync,
 +   lcd_sys, in the same order as they were listed in the interrupts
 +property.
 +
 +- pinctrl-0: pin control group to be used for this controller.
 +
 +- pinctrl-names: must contain a default entry.
 +
 +- clocks: must include clock specifiers corresponding to entries in the
 + clock-names property.
 +
 +- clock-names: list of clock names sorted in the same order as the clocks
 +   property. Must contain pclk_decon0, aclk_decon0,
 +  decon0_eclk, decon0_vclk, sclk_dsd, aclk_lh_disp0,
 +  aclk_disp, aclk_lh_disp1.
 +
 +Optional Properties:
 +- samsung,power-domain: a phandle to DECON power domain node.
 +
 +Example:
 +
 +SoC specific DT entry:
 +
 +   decon@1393 {
 +   compatible = samsung,exynos7-decon;
 +   interrupt-parent = combiner;
 +   reg = 0x1393 0x1000;
 +   interrupt-names = lcd_sys, vsync, fifo;
 +   interrupts = 0 188 0, 0 189 0, 0 190 0;
 +   clocks = clock_disp PCLK_DECON_INT,
 +clock_disp ACLK_DECON_INT,
 +clock_disp SCLK_DECON_INT_ECLK,
 +clock_disp SCLK_DECON_INT_EXTCLKPLL,
 +clock_disp SCLK_DSD,
 +clock_bus0 ACLK_LH_DISP0,
 +clock_disp ACLK_CP_DISP,
 +clock_bus0 ACLK_LH_DISP1;
 +   clock-names = pclk_decon0, aclk_decon0, decon0_eclk,
 +   decon0_vclk, sclk_dsd, aclk_lh_disp0,
 +   aclk_disp, aclk_lh_disp1;
 +   status = disabled;
 +   };
 +
 +Board specific DT entry:
 +
 +   decon@1393 {
 +   pinctrl-0 = lcd_clk pwm1_out;
 +   pinctrl-names = default;
 +   status = okay;
 +   };
 diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
 index fd1c070..89275ea 100644
 --- a/drivers/gpu/drm/exynos/Kconfig
 +++ b/drivers/gpu/drm/exynos/Kconfig
 @@ -31,6 +31,13 @@ config DRM_EXYNOS_FIMD
 help
   Choose this option if you want to use Exynos FIMD for DRM.

 +config DRM_EXYNOS_DECON
 +   bool Exynos DRM DECON
 +   depends on DRM_EXYNOS
 +   select FB_MODE_HELPERS
 +   help
 + Choose this option if you want to use Exynos DECON for DRM.
 +
  config DRM_EXYNOS_DPI
 bool

[PATCH v2 0/7] Add clock and DT support for a few IPs on Exynos7

Changes since v1:
- Added documentation for input clocks of the newly added CMUs

Following are the dependencies:
1) dts, kbuild: Implement support for dtb vendor subdirs patchset 
http://comments.gmane.org/gmane.linux.kbuild.devel/12131
2) arch: arm64: Enable support for Samsung Exynos7 SoC
http://www.spinics.net/lists/linux-samsung-soc/msg37047.html
3) Serial clean-up patches for Exynos7
http://www.spinics.net/lists/arm-kernel/msg367348.html
http://www.spinics.net/lists/arm-kernel/msg367349.html
4) Add initial support for pinctrl on Exynos7
http://www.spinics.net/lists/linux-samsung-soc/msg37708.html

For testing I have applied the following:
1) mmc: dw_mmc: Add IDMAC 64-bit address mode support
http://www.spinics.net/lists/kernel/msg1842300.html
2) mmc: dw_mmc: Reset DMA before enabling IDMAC
http://www.gossamer-threads.com/lists/linux/kernel/2021576?page=last
3) drivers: rtc: fix s3c-rtc initialization failure without rtc source clock
https://lkml.org/lkml/2014/10/15/210
4) mfd: sec: add S2MPS15 PMIC support
https://lkml.org/lkml/2014/10/14/50
5) regulator: s2mps11: add support for S2MPS15 regulators
https://lkml.org/lkml/2014/10/14/52
6) Regulators dt nodes were added in the espresso dts file and I2C channel 4
which has the PMIC on it was tested.
7) watchdog: s3c2410_wdt: Fix the mask bit offset for Exynos7
http://www.spinics.net/lists/linux-watchdog/msg05292.html

Abhilash Kesavan (3):
  arm64: dts: Add PMU DT node for exynos7 SoC
  arm64: dts: Add nodes for mmc, i2c, rtc, watchdog on Exynos7
  arm64: exynos: Enable rtc and watchdog support for Exynos7

Naveen Krishna Ch (4):
  clk: samsung: exynos7: add clocks for I2C block
  clk: samsung: exynos7: add clocks for MMC block
  clk: samsung: exynos7: add clocks for RTC block
  clk: samsung: exynos7: add gate clocks for WDT, TMU and PWM blocks

 .../devicetree/bindings/arm/samsung/pmu.txt|1 +
 .../devicetree/bindings/clock/exynos7-clock.txt|   26 ++
 arch/arm64/Kconfig |3 +
 arch/arm64/boot/dts/exynos/exynos7-espresso.dts|   41 +++
 arch/arm64/boot/dts/exynos/exynos7.dtsi|  261 
 drivers/clk/samsung/clk-exynos7.c  |  316 
 include/dt-bindings/clock/exynos7-clk.h|   60 +++-
 7 files changed, 699 insertions(+), 9 deletions(-)

-- 
1.7.9.5

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 1/7] clk: samsung: exynos7: add clocks for I2C block

From: Naveen Krishna Ch naveenkrishna...@gmail.com

Exynos7 supports 12 I2C channels, add the I2C gate clocks to
support them.

Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
 drivers/clk/samsung/clk-exynos7.c   |   24 
 include/dt-bindings/clock/exynos7-clk.h |   16 ++--
 2 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos7.c 
b/drivers/clk/samsung/clk-exynos7.c
index 54206d4..c700f65 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -290,6 +290,20 @@ static struct samsung_mux_clock peric0_mux_clks[] 
__initdata = {
 };
 
 static struct samsung_gate_clock peric0_gate_clks[] __initdata = {
+   GATE(PCLK_HSI2C0, pclk_hsi2c0, mout_aclk_peric0_66_user,
+   ENABLE_PCLK_PERIC0, 8, 0, 0),
+   GATE(PCLK_HSI2C1, pclk_hsi2c1, mout_aclk_peric0_66_user,
+   ENABLE_PCLK_PERIC0, 9, 0, 0),
+   GATE(PCLK_HSI2C4, pclk_hsi2c4, mout_aclk_peric0_66_user,
+   ENABLE_PCLK_PERIC0, 10, 0, 0),
+   GATE(PCLK_HSI2C5, pclk_hsi2c5, mout_aclk_peric0_66_user,
+   ENABLE_PCLK_PERIC0, 11, 0, 0),
+   GATE(PCLK_HSI2C9, pclk_hsi2c9, mout_aclk_peric0_66_user,
+   ENABLE_PCLK_PERIC0, 12, 0, 0),
+   GATE(PCLK_HSI2C10, pclk_hsi2c10, mout_aclk_peric0_66_user,
+   ENABLE_PCLK_PERIC0, 13, 0, 0),
+   GATE(PCLK_HSI2C11, pclk_hsi2c11, mout_aclk_peric0_66_user,
+   ENABLE_PCLK_PERIC0, 14, 0, 0),
GATE(PCLK_UART0, pclk_uart0, mout_aclk_peric0_66_user,
ENABLE_PCLK_PERIC0, 16, 0, 0),
 
@@ -347,6 +361,16 @@ static struct samsung_mux_clock peric1_mux_clks[] 
__initdata = {
 };
 
 static struct samsung_gate_clock peric1_gate_clks[] __initdata = {
+   GATE(PCLK_HSI2C2, pclk_hsi2c2, mout_aclk_peric1_66_user,
+   ENABLE_PCLK_PERIC1, 4, 0, 0),
+   GATE(PCLK_HSI2C3, pclk_hsi2c3, mout_aclk_peric1_66_user,
+   ENABLE_PCLK_PERIC1, 5, 0, 0),
+   GATE(PCLK_HSI2C6, pclk_hsi2c6, mout_aclk_peric1_66_user,
+   ENABLE_PCLK_PERIC1, 6, 0, 0),
+   GATE(PCLK_HSI2C7, pclk_hsi2c7, mout_aclk_peric1_66_user,
+   ENABLE_PCLK_PERIC1, 7, 0, 0),
+   GATE(PCLK_HSI2C8, pclk_hsi2c8, mout_aclk_peric1_66_user,
+   ENABLE_PCLK_PERIC1, 8, 0, 0),
GATE(PCLK_UART1, pclk_uart1, mout_aclk_peric1_66_user,
ENABLE_PCLK_PERIC1, 9, 0, 0),
GATE(PCLK_UART2, pclk_uart2, mout_aclk_peric1_66_user,
diff --git a/include/dt-bindings/clock/exynos7-clk.h 
b/include/dt-bindings/clock/exynos7-clk.h
index 00fd6de..6d07b6f 100644
--- a/include/dt-bindings/clock/exynos7-clk.h
+++ b/include/dt-bindings/clock/exynos7-clk.h
@@ -30,7 +30,14 @@
 /* PERIC0 */
 #define PCLK_UART0 1
 #define SCLK_UART0 2
-#define PERIC0_NR_CLK  3
+#define PCLK_HSI2C03
+#define PCLK_HSI2C14
+#define PCLK_HSI2C45
+#define PCLK_HSI2C56
+#define PCLK_HSI2C97
+#define PCLK_HSI2C10   8
+#define PCLK_HSI2C11   9
+#define PERIC0_NR_CLK  10
 
 /* PERIC1 */
 #define PCLK_UART1 1
@@ -39,7 +46,12 @@
 #define SCLK_UART1 4
 #define SCLK_UART2 5
 #define SCLK_UART3 6
-#define PERIC1_NR_CLK  7
+#define PCLK_HSI2C27
+#define PCLK_HSI2C38
+#define PCLK_HSI2C69
+#define PCLK_HSI2C710
+#define PCLK_HSI2C811
+#define PERIC1_NR_CLK  12
 
 /* PERIS */
 #define PCLK_CHIPID1
-- 
1.7.9.5

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 2/7] clk: samsung: exynos7: add clocks for MMC block

From: Naveen Krishna Ch naveenkrishna...@gmail.com

Exynos7 supports 3 MMC channels, add the MMC gate clocks to
support them.

Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
 .../devicetree/bindings/clock/exynos7-clock.txt|   21 ++
 drivers/clk/samsung/clk-exynos7.c  |  224 
 include/dt-bindings/clock/exynos7-clk.h|   20 ++
 3 files changed, 265 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/exynos7-clock.txt 
b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
index 789f761..b29cb50 100644
--- a/Documentation/devicetree/bindings/clock/exynos7-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
@@ -27,9 +27,12 @@ Required Properties for Clock Controller:
 
- samsung,exynos7-clock-topc
- samsung,exynos7-clock-top0
+   - samsung,exynos7-clock-top1
- samsung,exynos7-clock-peric0
- samsung,exynos7-clock-peric1
- samsung,exynos7-clock-peris
+   - samsung,exynos7-clock-fsys0
+   - samsung,exynos7-clock-fsys1
 
  - reg: physical base address of the controller and the length of
memory mapped region.
@@ -50,6 +53,13 @@ Input clocks for top0 clock controller:
- dout_sclk_cc_pll
- dout_sclk_mfc_pll
 
+Input clocks for top1 clock controller:
+   - fin_pll
+   - dout_sclk_bus0_pll
+   - dout_sclk_bus1_pll
+   - dout_sclk_cc_pll
+   - dout_sclk_mfc_pll
+
 Input clocks for peric0 clock controller:
- fin_pll
- dout_aclk_peric0_66
@@ -65,3 +75,14 @@ Input clocks for peric1 clock controller:
 Input clocks for peris clock controller:
- fin_pll
- dout_aclk_peris_66
+
+Input clocks for fsys0 clock controller:
+   - fin_pll
+   - dout_aclk_fsys0_200
+   - dout_sclk_mmc2
+
+Input clocks for fsys1 clock controller:
+   - fin_pll
+   - dout_aclk_fsys1_200
+   - dout_sclk_mmc0
+   - dout_sclk_mmc1
diff --git a/drivers/clk/samsung/clk-exynos7.c 
b/drivers/clk/samsung/clk-exynos7.c
index c700f65..f5e43fa 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -267,6 +267,132 @@ static void __init exynos7_clk_top0_init(struct 
device_node *np)
 CLK_OF_DECLARE(exynos7_clk_top0, samsung,exynos7-clock-top0,
exynos7_clk_top0_init);
 
+/* Register Offset definitions for CMU_TOP1 (0x105E) */
+#define MUX_SEL_TOP10  0x0200
+#define MUX_SEL_TOP11  0x0204
+#define MUX_SEL_TOP13  0x020C
+#define MUX_SEL_TOP1_FSYS0 0x0224
+#define MUX_SEL_TOP1_FSYS1 0x0228
+#define DIV_TOP13  0x060C
+#define DIV_TOP1_FSYS0 0x0624
+#define DIV_TOP1_FSYS1 0x0628
+#define ENABLE_ACLK_TOP13  0x080C
+#define ENABLE_SCLK_TOP1_FSYS0 0x0A24
+#define ENABLE_SCLK_TOP1_FSYS1 0x0A28
+
+/* List of parent clocks for Muxes in CMU_TOP1 */
+PNAME(mout_top1_bus0_pll_p)= { fin_pll, dout_sclk_bus0_pll };
+PNAME(mout_top1_bus1_pll_p)= { fin_pll, dout_sclk_bus1_pll_b };
+PNAME(mout_top1_cc_pll_p)  = { fin_pll, dout_sclk_cc_pll_b };
+PNAME(mout_top1_mfc_pll_p) = { fin_pll, dout_sclk_mfc_pll_b };
+
+PNAME(mout_top1_half_bus0_pll_p) = {mout_top1_bus0_pll,
+   ffac_top1_bus0_pll_div2};
+PNAME(mout_top1_half_bus1_pll_p) = {mout_top1_bus1_pll,
+   ffac_top1_bus1_pll_div2};
+PNAME(mout_top1_half_cc_pll_p) = {mout_top1_cc_pll,
+   ffac_top1_cc_pll_div2};
+PNAME(mout_top1_half_mfc_pll_p) = {mout_top1_mfc_pll,
+   ffac_top1_mfc_pll_div2};
+
+PNAME(mout_top1_group1) = {mout_top1_half_bus0_pll,
+   mout_top1_half_bus1_pll, mout_top1_half_cc_pll,
+   mout_top1_half_mfc_pll};
+
+static unsigned long top1_clk_regs[] __initdata = {
+   MUX_SEL_TOP10,
+   MUX_SEL_TOP11,
+   MUX_SEL_TOP13,
+   MUX_SEL_TOP1_FSYS0,
+   MUX_SEL_TOP1_FSYS1,
+   DIV_TOP13,
+   DIV_TOP1_FSYS0,
+   DIV_TOP1_FSYS1,
+   ENABLE_ACLK_TOP13,
+   ENABLE_SCLK_TOP1_FSYS0,
+   ENABLE_SCLK_TOP1_FSYS1,
+};
+
+static struct samsung_mux_clock top1_mux_clks[] __initdata = {
+   MUX(0, mout_top1_mfc_pll, mout_top1_mfc_pll_p, MUX_SEL_TOP10, 4, 1),
+   MUX(0, mout_top1_cc_pll, mout_top1_cc_pll_p, MUX_SEL_TOP10, 8, 1),
+   MUX(0, mout_top1_bus1_pll, mout_top1_bus1_pll_p,
+   MUX_SEL_TOP10, 12, 1),
+   MUX(0, mout_top1_bus0_pll, mout_top1_bus0_pll_p,
+   MUX_SEL_TOP10, 16, 1),
+
+   MUX(0, mout_top1_half_mfc_pll, mout_top1_half_mfc_pll_p,
+   MUX_SEL_TOP11, 4, 1),
+   MUX(0, mout_top1_half_cc_pll, mout_top1_half_cc_pll_p,
+   MUX_SEL_TOP11, 8, 1),
+   MUX(0, mout_top1_half_bus1_pll, mout_top1_half_bus1_pll_p,
+   MUX_SEL_TOP11, 12, 1),
+   MUX(0, mout_top1_half_bus0_pll, mout_top1_half_bus0_pll_p,
+   MUX_SEL_TOP11, 16, 1),
+
+   MUX(0,

[PATCH v2 3/7] clk: samsung: exynos7: add clocks for RTC block

From: Naveen Krishna Ch naveenkrishna...@gmail.com

Add clock support for the RTC block in Exynos7.

Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
 .../devicetree/bindings/clock/exynos7-clock.txt|5 ++
 drivers/clk/samsung/clk-exynos7.c  |   54 
 include/dt-bindings/clock/exynos7-clk.h|   17 +++---
 3 files changed, 70 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/exynos7-clock.txt 
b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
index b29cb50..6d3d5f8 100644
--- a/Documentation/devicetree/bindings/clock/exynos7-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
@@ -28,6 +28,7 @@ Required Properties for Clock Controller:
- samsung,exynos7-clock-topc
- samsung,exynos7-clock-top0
- samsung,exynos7-clock-top1
+   - samsung,exynos7-clock-ccore
- samsung,exynos7-clock-peric0
- samsung,exynos7-clock-peric1
- samsung,exynos7-clock-peris
@@ -60,6 +61,10 @@ Input clocks for top1 clock controller:
- dout_sclk_cc_pll
- dout_sclk_mfc_pll
 
+Input clocks for ccore clock controller:
+   - fin_pll
+   - dout_aclk_ccore_133
+
 Input clocks for peric0 clock controller:
- fin_pll
- dout_aclk_peric0_66
diff --git a/drivers/clk/samsung/clk-exynos7.c 
b/drivers/clk/samsung/clk-exynos7.c
index f5e43fa..3a30f43 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -29,7 +29,9 @@
 #define AUD_PLL_CON0   0x0140
 #define MUX_SEL_TOPC0  0x0200
 #define MUX_SEL_TOPC1  0x0204
+#define MUX_SEL_TOPC2  0x0208
 #define MUX_SEL_TOPC3  0x020C
+#define DIV_TOPC0  0x0600
 #define DIV_TOPC1  0x0604
 #define DIV_TOPC3  0x060C
 
@@ -78,7 +80,9 @@ static unsigned long topc_clk_regs[] __initdata = {
AUD_PLL_CON0,
MUX_SEL_TOPC0,
MUX_SEL_TOPC1,
+   MUX_SEL_TOPC2,
MUX_SEL_TOPC3,
+   DIV_TOPC0,
DIV_TOPC1,
DIV_TOPC3,
 };
@@ -101,10 +105,15 @@ static struct samsung_mux_clock topc_mux_clks[] 
__initdata = {
MUX(0, mout_sclk_bus0_pll_out, mout_sclk_bus0_pll_out_p,
MUX_SEL_TOPC1, 16, 1),
 
+   MUX(0, mout_aclk_ccore_133, mout_topc_group2, MUX_SEL_TOPC2, 4, 2),
+
MUX(0, mout_aclk_peris_66, mout_topc_group2, MUX_SEL_TOPC3, 24, 2),
 };
 
 static struct samsung_div_clock topc_div_clks[] __initdata = {
+   DIV(DOUT_ACLK_CCORE_133, dout_aclk_ccore_133, mout_aclk_ccore_133,
+   DIV_TOPC0, 4, 4),
+
DIV(DOUT_ACLK_PERIS, dout_aclk_peris_66, mout_aclk_peris_66,
DIV_TOPC1, 24, 4),
 
@@ -393,6 +402,51 @@ static void __init exynos7_clk_top1_init(struct 
device_node *np)
 CLK_OF_DECLARE(exynos7_clk_top1, samsung,exynos7-clock-top1,
exynos7_clk_top1_init);
 
+/* Register Offset definitions for CMU_CCORE (0x105B) */
+#define MUX_SEL_CCORE  0x0200
+#define DIV_CCORE  0x0600
+#define ENABLE_ACLK_CCORE0 0x0800
+#define ENABLE_ACLK_CCORE1 0x0804
+#define ENABLE_PCLK_CCORE  0x0900
+
+/*
+ * List of parent clocks for Muxes in CMU_CCORE
+ */
+PNAME(mout_aclk_ccore_133_p)   = { fin_pll, dout_aclk_ccore_133 };
+
+static unsigned long ccore_clk_regs[] __initdata = {
+   MUX_SEL_CCORE,
+   ENABLE_PCLK_CCORE,
+};
+
+static struct samsung_mux_clock ccore_mux_clks[] __initdata = {
+   MUX(0, mout_aclk_ccore_133_user, mout_aclk_ccore_133_p,
+   MUX_SEL_CCORE, 1, 1),
+};
+
+static struct samsung_gate_clock ccore_gate_clks[] __initdata = {
+   GATE(PCLK_RTC, pclk_rtc, mout_aclk_ccore_133_user,
+   ENABLE_PCLK_CCORE, 8, 0, 0),
+};
+
+static struct samsung_cmu_info ccore_cmu_info __initdata = {
+   .mux_clks   = ccore_mux_clks,
+   .nr_mux_clks= ARRAY_SIZE(ccore_mux_clks),
+   .gate_clks  = ccore_gate_clks,
+   .nr_gate_clks   = ARRAY_SIZE(ccore_gate_clks),
+   .nr_clk_ids = CCORE_NR_CLK,
+   .clk_regs   = ccore_clk_regs,
+   .nr_clk_regs= ARRAY_SIZE(ccore_clk_regs),
+};
+
+static void __init exynos7_clk_ccore_init(struct device_node *np)
+{
+   samsung_cmu_register_one(np, ccore_cmu_info);
+}
+
+CLK_OF_DECLARE(exynos7_clk_ccore, samsung,exynos7-clock-ccore,
+   exynos7_clk_ccore_init);
+
 /* Register Offset definitions for CMU_PERIC0 (0x1361) */
 #define MUX_SEL_PERIC0 0x0200
 #define ENABLE_PCLK_PERIC0 0x0900
diff --git a/include/dt-bindings/clock/exynos7-clk.h 
b/include/dt-bindings/clock/exynos7-clk.h
index ff63c4e..3227679 100644
--- a/include/dt-bindings/clock/exynos7-clk.h
+++ b/include/dt-bindings/clock/exynos7-clk.h
@@ -11,12 +11,13 @@
 #define _DT_BINDINGS_CLOCK_EXYNOS7_H
 
 /* TOPC */

[PATCH v2 4/7] clk: samsung: exynos7: add gate clocks for WDT, TMU and PWM blocks

From: Naveen Krishna Ch naveenkrishna...@gmail.com

Add clock support for the watchdog timer, pwm timer and thermal
management unit IPs in Exynos7.

Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
 drivers/clk/samsung/clk-exynos7.c   |   14 ++
 include/dt-bindings/clock/exynos7-clk.h |9 +++--
 2 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos7.c 
b/drivers/clk/samsung/clk-exynos7.c
index 3a30f43..17e5cf4 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -486,9 +486,12 @@ static struct samsung_gate_clock peric0_gate_clks[] 
__initdata = {
ENABLE_PCLK_PERIC0, 14, 0, 0),
GATE(PCLK_UART0, pclk_uart0, mout_aclk_peric0_66_user,
ENABLE_PCLK_PERIC0, 16, 0, 0),
+   GATE(PCLK_PWM, pclk_pwm, mout_aclk_peric0_66_user,
+   ENABLE_PCLK_PERIC0, 21, 0, 0),
 
GATE(SCLK_UART0, sclk_uart0_user, mout_sclk_uart0_user,
ENABLE_SCLK_PERIC0, 16, 0, 0),
+   GATE(SCLK_PWM, sclk_pwm, fin_pll, ENABLE_SCLK_PERIC0, 21, 0, 0),
 };
 
 static struct samsung_cmu_info peric0_cmu_info __initdata = {
@@ -586,7 +589,9 @@ CLK_OF_DECLARE(exynos7_clk_peric1, 
samsung,exynos7-clock-peric1,
 
 /* Register Offset definitions for CMU_PERIS (0x1004) */
 #define MUX_SEL_PERIS  0x0200
+#define ENABLE_PCLK_PERIS  0x0900
 #define ENABLE_PCLK_PERIS_SECURE_CHIPID0x0910
+#define ENABLE_SCLK_PERIS  0x0A00
 #define ENABLE_SCLK_PERIS_SECURE_CHIPID0x0A10
 
 /* List of parent clocks for Muxes in CMU_PERIS */
@@ -594,7 +599,9 @@ PNAME(mout_aclk_peris_66_p) = { fin_pll, 
dout_aclk_peris_66 };
 
 static unsigned long peris_clk_regs[] __initdata = {
MUX_SEL_PERIS,
+   ENABLE_PCLK_PERIS,
ENABLE_PCLK_PERIS_SECURE_CHIPID,
+   ENABLE_SCLK_PERIS,
ENABLE_SCLK_PERIS_SECURE_CHIPID,
 };
 
@@ -604,10 +611,17 @@ static struct samsung_mux_clock peris_mux_clks[] 
__initdata = {
 };
 
 static struct samsung_gate_clock peris_gate_clks[] __initdata = {
+   GATE(PCLK_WDT, pclk_wdt, mout_aclk_peris_66_user,
+   ENABLE_PCLK_PERIS, 6, 0, 0),
+   GATE(PCLK_TMU, pclk_tmu_apbif, mout_aclk_peris_66_user,
+   ENABLE_PCLK_PERIS, 10, 0, 0),
+
GATE(PCLK_CHIPID, pclk_chipid, mout_aclk_peris_66_user,
ENABLE_PCLK_PERIS_SECURE_CHIPID, 0, 0, 0),
GATE(SCLK_CHIPID, sclk_chipid, fin_pll,
ENABLE_SCLK_PERIS_SECURE_CHIPID, 0, 0, 0),
+
+   GATE(SCLK_TMU, sclk_tmu, fin_pll, ENABLE_SCLK_PERIS, 10, 0, 0),
 };
 
 static struct samsung_cmu_info peris_cmu_info __initdata = {
diff --git a/include/dt-bindings/clock/exynos7-clk.h 
b/include/dt-bindings/clock/exynos7-clk.h
index 3227679..28c8aa7 100644
--- a/include/dt-bindings/clock/exynos7-clk.h
+++ b/include/dt-bindings/clock/exynos7-clk.h
@@ -53,7 +53,9 @@
 #define PCLK_HSI2C97
 #define PCLK_HSI2C10   8
 #define PCLK_HSI2C11   9
-#define PERIC0_NR_CLK  10
+#define PCLK_PWM   10
+#define SCLK_PWM   11
+#define PERIC0_NR_CLK  12
 
 /* PERIC1 */
 #define PCLK_UART1 1
@@ -72,7 +74,10 @@
 /* PERIS */
 #define PCLK_CHIPID1
 #define SCLK_CHIPID2
-#define PERIS_NR_CLK   3
+#define PCLK_WDT   3
+#define PCLK_TMU   4
+#define SCLK_TMU   5
+#define PERIS_NR_CLK   6
 
 /* FSYS0 */
 #define ACLK_MMC2  1
-- 
1.7.9.5

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 5/7] arm64: dts: Add PMU DT node for exynos7 SoC

Adds PMU DT node for exynos7 SoC.

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
 .../devicetree/bindings/arm/samsung/pmu.txt|1 +
 arch/arm64/boot/dts/exynos/exynos7.dtsi|5 +
 2 files changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
index 1e1979b..67b2113 100644
--- a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -10,6 +10,7 @@ Properties:
   - samsung,exynos5260-pmu - for Exynos5260 SoC.
   - samsung,exynos5410-pmu - for Exynos5410 SoC,
   - samsung,exynos5420-pmu - for Exynos5420 SoC.
+  - samsung,exynos7-pmu - for Exynos7 SoC.
second value must be always syscon.
 
  - reg : offset and length of the register set.
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi 
b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index ce221ac..6db8c78 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -243,6 +243,11 @@
 1 11 0xff01,
 1 10 0xff01;
};
+
+   pmu_system_controller: system-controller@105c {
+   compatible = samsung,exynos7-pmu, syscon;
+   reg = 0x105c 0x5000;
+   };
};
 };
 
-- 
1.7.9.5

--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 6/7] arm64: dts: Add nodes for mmc, i2c, rtc, watchdog on Exynos7

Add nodes for 3 mmc channels, 12 i2c channels, rtc, and watchdog
on Exynos7.

Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
 arch/arm64/boot/dts/exynos/exynos7-espresso.dts |   41 
 arch/arm64/boot/dts/exynos/exynos7.dtsi |  256 +++
 2 files changed, 297 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts 
b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
index e2c8283..d081c26 100644
--- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
+++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
@@ -18,6 +18,8 @@
 
aliases {
serial0 = serial_2;
+   mshc0 = mmc_0;
+   mshc2 = mmc_2;
};
 
chosen {
@@ -37,3 +39,42 @@
 serial_2 {
status = okay;
 };
+
+rtc {
+   status = okay;
+};
+
+watchdog {
+   status = okay;
+};
+
+mmc_0 {
+   status = okay;
+   num-slots = 1;
+   broken-cd;
+   caps2-mmc-hs200-1_8v;
+   supports-highspeed;
+   non-removable;
+   card-detect-delay = 200;
+   clock-frequency = 8;
+   samsung,dw-mshc-ciu-div = 3;
+   samsung,dw-mshc-sdr-timing = 0 4;
+   samsung,dw-mshc-ddr-timing = 0 2;
+   pinctrl-names = default;
+   pinctrl-0 = sd0_clk sd0_cmd sd0_qrdy sd0_bus1 sd0_bus4 sd0_bus8;
+   bus-width = 8;
+};
+
+mmc_2 {
+   status = okay;
+   num-slots = 1;
+   supports-highspeed;
+   card-detect-delay = 200;
+   clock-frequency = 4;
+   samsung,dw-mshc-ciu-div = 3;
+   samsung,dw-mshc-sdr-timing = 2 3;
+   samsung,dw-mshc-ddr-timing = 1 2;
+   pinctrl-names = default;
+   pinctrl-0 = sd2_clk sd2_cmd sd2_cd sd2_bus1 sd2_bus4;
+   bus-width = 4;
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi 
b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index 6db8c78..1300ded 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -113,6 +113,27 @@
  dout_sclk_mfc_pll;
};
 
+   clock_top1: clock-controller@105e {
+   compatible = samsung,exynos7-clock-top1;
+   reg = 0x105e 0xb000;
+   #clock-cells = 1;
+   clocks = fin_pll, clock_topc DOUT_SCLK_BUS0_PLL,
+clock_topc DOUT_SCLK_BUS1_PLL,
+clock_topc DOUT_SCLK_CC_PLL,
+clock_topc DOUT_SCLK_MFC_PLL;
+   clock-names = fin_pll, dout_sclk_bus0_pll,
+ dout_sclk_bus1_pll, dout_sclk_cc_pll,
+ dout_sclk_mfc_pll;
+   };
+
+   clock_ccore: clock-controller@105b {
+   compatible = samsung,exynos7-clock-ccore;
+   reg = 0x105b 0xd00;
+   #clock-cells = 1;
+   clocks = fin_pll, clock_topc DOUT_ACLK_CCORE_133;
+   clock-names = fin_pll, dout_aclk_ccore_133;
+   };
+
clock_peric0: clock-controller@1361 {
compatible = samsung,exynos7-clock-peric0;
reg = 0x1361 0xd00;
@@ -143,6 +164,27 @@
clock-names = fin_pll, dout_aclk_peris_66;
};
 
+   clock_fsys0: clock-controller@10e9 {
+   compatible = samsung,exynos7-clock-fsys0;
+   reg = 0x10e9 0xd00;
+   #clock-cells = 1;
+   clocks = fin_pll, clock_top1 DOUT_ACLK_FSYS0_200,
+clock_top1 DOUT_SCLK_MMC2;
+   clock-names = fin_pll, dout_aclk_fsys0_200,
+ dout_sclk_mmc2;
+   };
+
+   clock_fsys1: clock-controller@156e {
+   compatible = samsung,exynos7-clock-fsys1;
+   reg = 0x156e 0xd00;
+   #clock-cells = 1;
+   clocks = fin_pll, clock_top1 DOUT_ACLK_FSYS1_200,
+clock_top1 DOUT_SCLK_MMC0,
+clock_top1 DOUT_SCLK_MMC1;
+   clock-names = fin_pll, dout_aclk_fsys1_200,
+ dout_sclk_mmc0, dout_sclk_mmc1;
+   };
+
serial_0: serial@1363 {
compatible = samsung,exynos4210-uart;
reg = 0x1363 0x100;
@@ -236,6 +278,162 @@
interrupts = 0 203 0;
};
 
+   hsi2c_0: hsi2c@1364 {
+   compatible = samsung,exynos7-hsi2c;
+   reg = 0x1364 0x1000;
+   interrupts = 0 441 0;
+

[PATCH v2 7/7] arm64: exynos: Enable rtc and watchdog support for Exynos7