Re: [PATCH 12/41] drivers: tty: serial: uartlite: use dev_dbg() instead of pr_debug()
>>>>> "Enrico" == Enrico Weigelt, metux IT consult writes: > Using dev_dbg() instead of pr_debg() for more consistent output. > (prints device name, etc). > Signed-off-by: Enrico Weigelt Acked-by: Peter Korsgaard -- Bye, Peter Korsgaard
Re: [PATCH 16/41] drivers: tty: serial: uartlite: fix overlong lines
>>>>> "Enrico" == Enrico Weigelt, metux IT consult writes:
> Fix checkpatch warnings:
> WARNING: line over 80 characters
> #283: FILE: drivers/tty/serial/uartlite.c:283:
> +ret = request_irq(port->irq, ulite_isr, IRQF_SHARED |
> IRQF_TRIGGER_RISING,
> WARNING: Missing a blank line after declarations
> #577: FILE: drivers/tty/serial/uartlite.c:577:
> +struct earlycon_device *device = console->data;
> +uart_console_write(>port, s, n, early_uartlite_putc);
> WARNING: line over 80 characters
> #590: FILE: drivers/tty/serial/uartlite.c:590:
> +OF_EARLYCON_DECLARE(uartlite_b, "xlnx,opb-uartlite-1.00.b",
> early_uartlite_setup);
> WARNING: line over 80 characters
> #591: FILE: drivers/tty/serial/uartlite.c:591:
> +OF_EARLYCON_DECLARE(uartlite_a, "xlnx,xps-uartlite-1.00.a",
> early_uartlite_setup);
Given that these are just a few characters more than 80 I don't really
think these changes improve readability.
> Signed-off-by: Enrico Weigelt
> ---
> drivers/tty/serial/uartlite.c | 10 +++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
> diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c
> index 6f79353..0140cec 100644
> --- a/drivers/tty/serial/uartlite.c
> +++ b/drivers/tty/serial/uartlite.c
> @@ -280,7 +280,8 @@ static int ulite_startup(struct uart_port *port)
> return ret;
> }
> -ret = request_irq(port->irq, ulite_isr, IRQF_SHARED |
> IRQF_TRIGGER_RISING,
> +ret = request_irq(port->irq, ulite_isr,
> + IRQF_SHARED | IRQF_TRIGGER_RISING,
>"uartlite", port);
> if (ret)
> return ret;
> @@ -574,6 +575,7 @@ static void early_uartlite_write(struct console *console,
> const char *s, unsigned int n)
> {
> struct earlycon_device *device = console->data;
> +
> uart_console_write(>port, s, n, early_uartlite_putc);
Unrelated change?
--
Bye, Peter Korsgaard
Re: [PATCH 15/41] drivers: tty: serial: uartlite: fix use fix bare 'unsigned'
>>>>> "Enrico" == Enrico Weigelt, metux IT consult writes: > Fix checkpatch warnings: > WARNING: Prefer 'unsigned int' to bare use of 'unsigned' > #562: FILE: drivers/tty/serial/uartlite.c:562: > +unsigned retries = 100; > WARNING: Prefer 'unsigned int' to bare use of 'unsigned' > #574: FILE: drivers/tty/serial/uartlite.c:574: > + const char *s, unsigned n) s/fix use fix/fix use of/ in Subject. Other than that: Acked-by: Peter Korsgaard -- Bye, Peter Korsgaard
Re: [PATCH 14/41] drivers: tty: serial: uartlite: remove unnecessary braces
>>>>> "Enrico" == Enrico Weigelt, metux IT consult writes:
> checkpatch complains:
> WARNING: braces {} are not necessary for any arm of this statement
> #489: FILE: drivers/tty/serial/uartlite.c:489:
> +if (oops_in_progress) {
> [...]
> +} else
> [...]
> Signed-off-by: Enrico Weigelt
Acked-by: Peter Korsgaard
--
Bye, Peter Korsgaard
Re: [PATCH 13/41] drivers: tty: serial: uartlite: fill mapsize and use it
>>>>> "Enrico" == Enrico Weigelt, metux IT consult writes: > Fill the struct uart_port->mapsize field and use it, insteaf of s/insteaf/instead/ > hardcoded values in many places. This makes the code layout a bit > more consistent and easily allows using generic helpers for the > io memory handling. > Candidates for such helpers could be eg. the request+ioremap and > iounmap+release combinations. > Signed-off-by: Enrico Weigelt Acked-by: Peter Korsgaard -- Bye, Peter Korsgaard
Re: [PATCH] i2c: don't print error when adding adapter fails
>>>>> "Wolfram" == Wolfram Sang <wsa-...@sang-engineering.com> writes: > The core will do this for us now. > Signed-off-by: Wolfram Sang <wsa-...@sang-engineering.com> > --- > drivers/i2c/busses/i2c-ocores.c | 4 +--- For i2c-ocores.c: Acked-by: Peter Korsgaard <pe...@korsgaard.com> -- Bye, Peter Korsgaard
Re: [PATCH 05/35 linux-next] tty: constify of_device_id array
Fabian == Fabian Frederick f...@skynet.be writes: of_device_id is always used as const. (See driver.of_match_table and open firmware functions) Signed-off-by: Fabian Frederick f...@skynet.be --- For this: drivers/tty/serial/uartlite.c | 2 +- Acked-by: Peter Korsgaard pe...@korsgaard.com -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] i2c: Remove unneeded xxx_set_drvdata(..., NULL) calls
Doug == Doug Anderson diand...@chromium.org writes: Doug There is simply no reason to be manually setting the private driver Doug data to NULL in the remove/fail to probe cases. This is just extra Doug cruft code that can be removed. Doug A few notes: Doug * Nothing relies on drvdata being set to NULL. Doug * The __device_release_driver() function eventually calls Doug dev_set_drvdata(dev, NULL) anyway, so there's no need to do it Doug twice. Doug * I verified that there were no cases where xxx_get_drvdata() was Doug being called in these drivers and checking for / relying on the NULL Doug return value. Doug This could be cleaned up kernel-wide but for now just take the baby Doug step and remove from the i2c subsystem. Doug Reported-by: Wolfram Sang w...@the-dreams.de Doug Reported-by: Stephen Warren swar...@wwwdotorg.org Doug Signed-off-by: Doug Anderson diand...@chromium.org For i2c-ocores.c + i2c-mux-gpio.c: Acked-by: Peter Korsgaard jac...@sunsite.dk -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 119/493] usb: remove use of __devexit_p
Nicolas == Nicolas Ferre nicolas.fe...@atmel.com writes: Nicolas On 11/19/2012 07:21 PM, Bill Pemberton : CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer needed. Signed-off-by: Bill Pemberton wf...@virginia.edu Cc: Peter Korsgaard jac...@sunsite.dk Cc: Alexander Shishkin alexander.shish...@linux.intel.com Cc: Felipe Balbi ba...@ti.com Cc: Li Yang le...@freescale.com Cc: Alan Stern st...@rowland.harvard.edu Cc: Wan ZongShun mcuos@gmail.com Cc: Ben Dooks ben-li...@fluff.org Cc: Kukjin Kim kgene@samsung.com Cc: linux-...@vger.kernel.org Cc: linux-o...@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-arm-ker...@lists.infradead.org Cc: linux-samsung-...@vger.kernel.org Nicolas [..] drivers/usb/host/ehci-atmel.c| 2 +- drivers/usb/host/ohci-at91.c | 2 +- Nicolas For Atmel: Nicolas Acked-by: Nicolas Ferre nicolas.fe...@atmel.com For c67x00 and g_hid: Acked-by: Peter Korsgaard jac...@sunsite.dk -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] i2c: let the core register devices from devicetree
Wolfram == Wolfram Sang w.s...@pengutronix.de writes: Wolfram Currently, every driver has to do it on its own, but it should Wolfram be done in the core, like we already do with board_info Wolfram structs. Wolfram Signed-off-by: Wolfram Sang w.s...@pengutronix.de Wolfram --- Wolfram Based on v3.5-rc2. Only build tested, I don't have a OF based device Wolfram around at the moment. Neither have I, but it looks good. Acked-by: Peter Korsgaard jac...@sunsite.dk Wolfram @Peter: Why does ocores do the device registration manually via Wolfram platform_data instead of using board_info? Because of dd14be4c274 (i2c-ocores: Can add I2C devices to the bus), a patch I wasn't CC'ed on and haven't acked. I only noticed it later when the I2C tree got merged into mainline. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 21/28] powerpc: sysdev/mpc8xxx_gpio irq_data conversion.
Lennert == Lennert Buytenhek buyt...@wantstofly.org writes: Lennert Signed-off-by: Lennert Buytenhek buyt...@secretlab.ca Lennert --- Lennert v2: get_irq_chip_data(d-irq) = irq_data_get_irq_chip_data(d) Acked-by: Peter Korsgaard jac...@sunsite.dk -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [RFC PATCH 07/15] dt: uartlite: merge platform and of_platform driver bindings
Grant == Grant Likely grant.lik...@secretlab.ca writes:
Grant of_platform_driver is getting removed, and a single platform_driver
Grant can now support both devicetree and non-devicetree use cases. This
Grant patch merges the two driver registrations.
Wee!
Grant static int __devinit ulite_probe(struct platform_device *pdev)
Grant {
Grant struct resource *res, *res2;
Grant + const __be32 *prop;
Grant + int id = pdev-id;
Grant res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Grant if (!res)
Grant @@ -583,7 +586,13 @@ static int __devinit ulite_probe(struct
platform_device *pdev)
Grant if (!res2)
Grant return -ENODEV;
Grant - return ulite_assign(pdev-dev, pdev-id, res-start,
res2-start);
Grant +#ifdef CONFIG_OF
Grant + prop = of_get_property(pdev-dev.of_node, port-number, NULL);
Grant + if (prop)
Grant + id = be32_to_cpup(prop);
Grant +#endif
Grant +
Grant + return ulite_assign(pdev-dev, id, res-start, res2-start);
Grant }
Isn't this going to give a build warning about prop being unused on
!CONFIG_OF builds? Perhaps move it down into the CONFIG_OF conditional?
Other than that,
Acked-by: Peter Korsgaard jac...@sunsite.dk
--
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Re: [PATCH] powerpc: Consolidate obj-y assignments
Michael == Michael Ellerman mich...@ellerman.id.au writes: Michael No need to have three of them. Michael Signed-off-by: Michael Ellerman mich...@ellerman.id.au Michael --- Michael arch/powerpc/kernel/Makefile |9 - Michael 1 files changed, 4 insertions(+), 5 deletions(-) Michael - signal.o sysfs.o cacheinfo.o Michael -obj-y+= vdso32/ Michael + signal.o sysfs.o cacheinfo.o time.o \ Michael + time.o prom.o traps.o setup-common.o \ You have time.o twice. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v4] powerpc/mpc8xxx_gpio.c: extend the driver to support mpc512x gpios
Anatolij == Anatolij Gustschin ag...@denx.de writes: Anatolij The GPIO controller of MPC512x is slightly different from Anatolij 8xxx GPIO controllers. The register interface is the same Anatolij except the external interrupt control register. The MPC512x Anatolij GPIO controller differentiates between four interrupt event Anatolij types and therefore provides two interrupt control registers, Anatolij GPICR1 and GPICR2. GPIO[0:15] interrupt event types are Anatolij configured in GPICR1 register, GPIO[16:31] - in GPICR2 register. Anatolij This patch adds MPC512x speciffic set_type() callback and Anatolij updates config file and comments. Additionally the gpio chip Anatolij registration function is changed to use for_each_matching_node() Anatolij preventing multiple registration if a node claimes compatibility Anatolij with another gpio controller type. Anatolij Signed-off-by: Anatolij Gustschin ag...@denx.de Sorry, was away on holiday. Acked-by: Peter Korsgaard jac...@sunsite.dk -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH V5] powerpc/mpc512x: Add gpio driver
Anatolij == Anatolij Gustschin ag...@denx.de writes:
Hi,
Old mail, I know ..
Anatolij From: Matthias Fuchs matthias.fu...@esd.eu
Anatolij This patch adds a gpio driver for MPC512X PowerPCs.
Anatolij It has been tested on our CAN-CBX-CPU5201 module that
Anatolij uses a MPC5121 CPU. This platform comes with a couple of
Anatolij LEDs and configuration switches that have been used for testing.
Anatolij After change to the of-gpio api the reworked driver has been
Anatolij tested on pdm360ng board with some configuration switches.
This looks very similar to the existing
arch/powerpc/sysdev/mpc8xxx_gpio.c - Couldn't we just add 5121 support
there instead?
Anatolij +struct mpc512x_gpio_regs {
Anatolij +u32 gpdir;
Anatolij +u32 gpodr;
Anatolij +u32 gpdat;
Anatolij +u32 gpier;
Anatolij +u32 gpimr;
Anatolij +u32 gpicr1;
Anatolij +u32 gpicr2;
Anatolij +};
--
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Re: How to trun off udbg0 during bootup?
景文林 == 景文林 wenlinj...@gmail.com writes: 景文林 Hi, 景文林 I `m working on a freescale-MPC8379eRDB like board.And I want 景文林 to trun off kernel message during bootup. 景文林 I tried to modify console = XXX argument in uboot but it 景文林 did not work(It works on ARM). Kernel always print: 景文林 console [udbg0] enabled or console handover: boot 景文林 [udbg0] - real [ttyS1] 景文林 Does anybody know how can I turn off this udbg0? It's currently not configurable. I sent a (not applied) patch to make it configurable back in Dec 2008: http://lists.ozlabs.org/pipermail/linuxppc-dev/2008-December/066461.html You can probably still get it to apply with a bit of fuzz. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH-V3] mpc8xxx_gpio: add interrupt support
Peter Korsgaard jac...@sunsite.dk writes:
Hi,
Anton, any comments on this?
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
Changes since v1:
- Document OF binding for IRQ as requested by Kumar.
Changes since v2:
- Fix xlate prototype mismatch warning (intspec should be const)
.../powerpc/dts-bindings/fsl/8xxx_gpio.txt | 22 +++-
arch/powerpc/sysdev/mpc8xxx_gpio.c | 147
2 files changed, 168 insertions(+), 1 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
index d015dce..b0019eb 100644
--- a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
@@ -11,7 +11,7 @@ Required properties:
83xx, fsl,mpc8572-gpio for 85xx and fsl,mpc8610-gpio for 86xx.
- #gpio-cells : Should be two. The first cell is the pin number and the
second cell is used to specify optional parameters (currently unused).
- - interrupts : Interrupt mapping for GPIO IRQ (currently unused).
+ - interrupts : Interrupt mapping for GPIO IRQ.
- interrupt-parent : Phandle for the interrupt controller that
services interrupts for this device.
- gpio-controller : Marks the port as GPIO controller.
@@ -38,3 +38,23 @@ Example of gpio-controller nodes for a MPC8347 SoC:
See booting-without-of.txt for details of how to specify GPIO
information for devices.
+
+To use GPIO pins as interrupt sources for peripherals, specify the
+GPIO controller as the interrupt parent and define GPIO number +
+trigger mode using the interrupts property, which is defined like
+this:
+
+interrupts = number trigger, where:
+ - number: GPIO pin (0..31)
+ - trigger: trigger mode:
+2 = trigger on falling edge
+3 = trigger on both edges
+
+Example of device using this is:
+
+funkyf...@0 {
+compatible = funky-fpga;
+...
+interrupts = 4 3;
+interrupt-parent = gpio1;
+};
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c
b/arch/powerpc/sysdev/mpc8xxx_gpio.c
index ee1c0e1..1bd930e 100644
--- a/arch/powerpc/sysdev/mpc8xxx_gpio.c
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -15,6 +15,7 @@
#include linux/of.h
#include linux/of_gpio.h
#include linux/gpio.h
+#include linux/irq.h
#define MPC8XXX_GPIO_PINS 32
@@ -34,6 +35,7 @@ struct mpc8xxx_gpio_chip {
* open drain mode safely
*/
u32 data;
+struct irq_host *irq;
};
static inline u32 mpc8xxx_gpio2mask(unsigned int gpio)
@@ -127,12 +129,136 @@ static int mpc8xxx_gpio_dir_out(struct gpio_chip *gc,
unsigned int gpio, int val
return 0;
}
+static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
+{
+struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
+struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
+
+if (mpc8xxx_gc-irq offset MPC8XXX_GPIO_PINS)
+return irq_create_mapping(mpc8xxx_gc-irq, offset);
+else
+return -ENXIO;
+}
+
+static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc
*desc)
+{
+struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_desc_data(desc);
+struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+unsigned int mask;
+
+mask = in_be32(mm-regs + GPIO_IER) in_be32(mm-regs + GPIO_IMR);
+if (mask)
+generic_handle_irq(irq_linear_revmap(mpc8xxx_gc-irq,
+ 32 - ffs(mask)));
+}
+
+static void mpc8xxx_irq_unmask(unsigned int virq)
+{
+struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+unsigned long flags;
+
+spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+
+setbits32(mm-regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+
+spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
+}
+
+static void mpc8xxx_irq_mask(unsigned int virq)
+{
+struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+unsigned long flags;
+
+spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+
+clrbits32(mm-regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+
+spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
+}
+
+static void mpc8xxx_irq_ack(unsigned int virq)
+{
+struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+
+out_be32(mm-regs + GPIO_IER, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+}
+
+static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type)
+{
+struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+unsigned long flags
[PATCHv2] spi_mpc8xxx: fix WARN_ON on remove after 4c1fba44296
Commit 4c1fba44296 (Add support for QE DMA mode and CPM1/CPM2 chips)
added unconditional calls to _cpm_init() / _cpm_free() from
probe()/remove(), but only checked if we're actually using CPM mode
in _init(), causing the WARN_ON in mpc8xxx_spi_free_dummy_rx() for !CPM.
Fix it by adding the same check in _cpm_free() as well.
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
drivers/spi/spi_mpc8xxx.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
Changes since v1:
Fix return statement, mpc8xxx_spi_cpm_free() has void return type.
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 1fb2a6e..674e7a2 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -946,6 +946,9 @@ static void mpc8xxx_spi_cpm_free(struct mpc8xxx_spi *mspi)
{
struct device *dev = mspi-dev;
+ if (!(mspi-flags SPI_CPM_MODE))
+ return;
+
dma_unmap_single(dev, mspi-dma_dummy_rx, SPI_MRBLR, DMA_FROM_DEVICE);
dma_unmap_single(dev, mspi-dma_dummy_tx, PAGE_SIZE, DMA_TO_DEVICE);
cpm_muram_free(cpm_muram_offset(mspi-tx_bd));
--
1.6.5
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[PATCH-V3] mpc8xxx_gpio: add interrupt support
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
Changes since v1:
- Document OF binding for IRQ as requested by Kumar.
Changes since v2:
- Fix xlate prototype mismatch warning (intspec should be const)
.../powerpc/dts-bindings/fsl/8xxx_gpio.txt | 22 +++-
arch/powerpc/sysdev/mpc8xxx_gpio.c | 147
2 files changed, 168 insertions(+), 1 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
index d015dce..b0019eb 100644
--- a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
@@ -11,7 +11,7 @@ Required properties:
83xx, fsl,mpc8572-gpio for 85xx and fsl,mpc8610-gpio for 86xx.
- #gpio-cells : Should be two. The first cell is the pin number and the
second cell is used to specify optional parameters (currently unused).
- - interrupts : Interrupt mapping for GPIO IRQ (currently unused).
+ - interrupts : Interrupt mapping for GPIO IRQ.
- interrupt-parent : Phandle for the interrupt controller that
services interrupts for this device.
- gpio-controller : Marks the port as GPIO controller.
@@ -38,3 +38,23 @@ Example of gpio-controller nodes for a MPC8347 SoC:
See booting-without-of.txt for details of how to specify GPIO
information for devices.
+
+To use GPIO pins as interrupt sources for peripherals, specify the
+GPIO controller as the interrupt parent and define GPIO number +
+trigger mode using the interrupts property, which is defined like
+this:
+
+interrupts = number trigger, where:
+ - number: GPIO pin (0..31)
+ - trigger: trigger mode:
+ 2 = trigger on falling edge
+ 3 = trigger on both edges
+
+Example of device using this is:
+
+ funkyf...@0 {
+ compatible = funky-fpga;
+ ...
+ interrupts = 4 3;
+ interrupt-parent = gpio1;
+ };
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c
b/arch/powerpc/sysdev/mpc8xxx_gpio.c
index ee1c0e1..1bd930e 100644
--- a/arch/powerpc/sysdev/mpc8xxx_gpio.c
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -15,6 +15,7 @@
#include linux/of.h
#include linux/of_gpio.h
#include linux/gpio.h
+#include linux/irq.h
#define MPC8XXX_GPIO_PINS 32
@@ -34,6 +35,7 @@ struct mpc8xxx_gpio_chip {
* open drain mode safely
*/
u32 data;
+ struct irq_host *irq;
};
static inline u32 mpc8xxx_gpio2mask(unsigned int gpio)
@@ -127,12 +129,136 @@ static int mpc8xxx_gpio_dir_out(struct gpio_chip *gc,
unsigned int gpio, int val
return 0;
}
+static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
+{
+ struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
+
+ if (mpc8xxx_gc-irq offset MPC8XXX_GPIO_PINS)
+ return irq_create_mapping(mpc8xxx_gc-irq, offset);
+ else
+ return -ENXIO;
+}
+
+static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_desc_data(desc);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned int mask;
+
+ mask = in_be32(mm-regs + GPIO_IER) in_be32(mm-regs + GPIO_IMR);
+ if (mask)
+ generic_handle_irq(irq_linear_revmap(mpc8xxx_gc-irq,
+32 - ffs(mask)));
+}
+
+static void mpc8xxx_irq_unmask(unsigned int virq)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned long flags;
+
+ spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+
+ setbits32(mm-regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+
+ spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
+}
+
+static void mpc8xxx_irq_mask(unsigned int virq)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned long flags;
+
+ spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+
+ clrbits32(mm-regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+
+ spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
+}
+
+static void mpc8xxx_irq_ack(unsigned int virq)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+
+ out_be32(mm-regs + GPIO_IER, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+}
+
+static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned long flags;
+
+ switch (flow_type) {
+ case IRQ_TYPE_EDGE_FALLING:
+ spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+ setbits32(mm-regs + GPIO_ICR
[PATCH] spi_mpc8xxx: fix WARN_ON on remove after 4c1fba44296
Commit 4c1fba44296 (Add support for QE DMA mode and CPM1/CPM2 chips)
added unconditional calls to _cpm_init() / _cpm_free() from
probe()/remove(), but only checked if we're actually using CPM mode
in _init(), causing the WARN_ON in mpc8xxx_spi_free_dummy_rx() for !CPM.
Fix it by adding the same check in _cpm_free() as well.
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
drivers/spi/spi_mpc8xxx.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 1fb2a6e..0604d6b 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -946,6 +946,9 @@ static void mpc8xxx_spi_cpm_free(struct mpc8xxx_spi *mspi)
{
struct device *dev = mspi-dev;
+ if (!(mspi-flags SPI_CPM_MODE))
+ return 0;
+
dma_unmap_single(dev, mspi-dma_dummy_rx, SPI_MRBLR, DMA_FROM_DEVICE);
dma_unmap_single(dev, mspi-dma_dummy_tx, PAGE_SIZE, DMA_TO_DEVICE);
cpm_muram_free(cpm_muram_offset(mspi-tx_bd));
--
1.6.5
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Re: [PATCH-V2] mpc8xxx_gpio: add interrupt support
Peter == Peter Korsgaard jac...@sunsite.dk writes: Peter Signed-off-by: Peter Korsgaard jac...@sunsite.dk Comments? With the added documentation I believe it's ready to go.. Peter --- Peter .../powerpc/dts-bindings/fsl/8xxx_gpio.txt | 22 +++- Peter arch/powerpc/sysdev/mpc8xxx_gpio.c | 147 Peter 2 files changed, 168 insertions(+), 1 deletions(-) -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 3/3] powerpc: Add support for ram filesystems in FIT uImages
Wolfgang == Wolfgang Denk w...@denx.de writes: What do you think about changing the U-Boot documentation to rename those 2 image types to: 1 uImages 2 FIT Images Wolfgang Let's make this uImage.old (or uImage.legacy similar) and Wolfgang uImage, then. No, that would break stuff for the existing users. The existing format make/file names shouldn't change. The FIT images could be called fitimage or uImage.new or something. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 3/3] powerpc: Add support for ram filesystems in FIT uImages
Wolfgang == Wolfgang Denk w...@denx.de writes: Hi, No, that would break stuff for the existing users. The existing format make/file names shouldn't change. Wolfgang Well, with this argument you can block all progress and freeze all Wolfgang development to some ancient state. We only break backwards compatibility when we have to. There's no technical reason for renaming the existing make targets. The FIT images could be called fitimage or uImage.new or something. Wolfgang I disagree. We want to make this the new default, so let's Wolfgang use the default name for this, and continue to support he Wolfgang legacy image format using another name. Wolfgang Also, your approach does not scale. Assume we come up with an Wolfgang even more advanced image format in the future - how should we Wolfgang name it then? uImage.newer ? uImage.verynew ? Wolfgang uImage.new2 ? Hence fitimage. The next thing will presumably be called something else again. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 3/3] powerpc: Add support for ram filesystems in FIT uImages
Grant == Grant Likely grant.lik...@secretlab.ca writes: Hi, Grant Personally, I don't get any benefit out of the new image format, Grant so I haven't spent any time looking at it. However, I'm Grant concerned about the drift back towards a different image per Grant target when the move over the last 4 years has been towards Grant multiplatform kernel images. I certainly don't want to Grant encourage embedding the device tree blob into the kernel image, Grant and I'm not very interested in merging code to do that into the Grant kernel tree. If someone really needs to do that for their Grant particular target, it is certainly easy enough for them to weld Grant in the .dtb after the fact before transferring the image to the Grant target, but I want that mode to be the exception, not the rule. I understand the advantages of being able to compile multiplatform kernels - But for the typical embedded device, having the device tree together with the kernel makes stuff a lot simpler when upgrading because of the version depencies of the dts. That's also why I submitted the (nacked) multifile uimage support some time ago: http://thread.gmane.org/gmane.linux.ports.ppc64.devel/46825/ The fitimage stuff is the logical continuation of that. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Does gpio_to_irq() work for MPC52xx gpios?
Bill == Bill Gatliff b...@billgatliff.com writes: Bill Guys: Bill Is it possible to specify an individual GPIO pin as an interrupt source Bill with the current MPC52xx code? No (not yet). In Ben's latest pull request there's a patch from me to add basic infrastructure for gpio_to_irq(). I've recently added irq support to the mpc8xxx driver, but so far nothing has been written for 52xx. http://patchwork.ozlabs.org/patch/41550/ -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH-V2] mpc8xxx_gpio: add interrupt support
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
.../powerpc/dts-bindings/fsl/8xxx_gpio.txt | 22 +++-
arch/powerpc/sysdev/mpc8xxx_gpio.c | 147
2 files changed, 168 insertions(+), 1 deletions(-)
Changes since v1:
- Document OF binding for IRQ as requested by Kumar.
diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
index d015dce..b0019eb 100644
--- a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
@@ -11,7 +11,7 @@ Required properties:
83xx, fsl,mpc8572-gpio for 85xx and fsl,mpc8610-gpio for 86xx.
- #gpio-cells : Should be two. The first cell is the pin number and the
second cell is used to specify optional parameters (currently unused).
- - interrupts : Interrupt mapping for GPIO IRQ (currently unused).
+ - interrupts : Interrupt mapping for GPIO IRQ.
- interrupt-parent : Phandle for the interrupt controller that
services interrupts for this device.
- gpio-controller : Marks the port as GPIO controller.
@@ -38,3 +38,23 @@ Example of gpio-controller nodes for a MPC8347 SoC:
See booting-without-of.txt for details of how to specify GPIO
information for devices.
+
+To use GPIO pins as interrupt sources for peripherals, specify the
+GPIO controller as the interrupt parent and define GPIO number +
+trigger mode using the interrupts property, which is defined like
+this:
+
+interrupts = number trigger, where:
+ - number: GPIO pin (0..31)
+ - trigger: trigger mode:
+ 2 = trigger on falling edge
+ 3 = trigger on both edges
+
+Example of device using this is:
+
+ funkyf...@0 {
+ compatible = funky-fpga;
+ ...
+ interrupts = 4 3;
+ interrupt-parent = gpio1;
+ };
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c
b/arch/powerpc/sysdev/mpc8xxx_gpio.c
index ee1c0e1..b4f861a 100644
--- a/arch/powerpc/sysdev/mpc8xxx_gpio.c
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -15,6 +15,7 @@
#include linux/of.h
#include linux/of_gpio.h
#include linux/gpio.h
+#include linux/irq.h
#define MPC8XXX_GPIO_PINS 32
@@ -34,6 +35,7 @@ struct mpc8xxx_gpio_chip {
* open drain mode safely
*/
u32 data;
+ struct irq_host *irq;
};
static inline u32 mpc8xxx_gpio2mask(unsigned int gpio)
@@ -127,12 +129,136 @@ static int mpc8xxx_gpio_dir_out(struct gpio_chip *gc,
unsigned int gpio, int val
return 0;
}
+static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
+{
+ struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
+
+ if (mpc8xxx_gc-irq offset MPC8XXX_GPIO_PINS)
+ return irq_create_mapping(mpc8xxx_gc-irq, offset);
+ else
+ return -ENXIO;
+}
+
+static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_desc_data(desc);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned int mask;
+
+ mask = in_be32(mm-regs + GPIO_IER) in_be32(mm-regs + GPIO_IMR);
+ if (mask)
+ generic_handle_irq(irq_linear_revmap(mpc8xxx_gc-irq,
+32 - ffs(mask)));
+}
+
+static void mpc8xxx_irq_unmask(unsigned int virq)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned long flags;
+
+ spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+
+ setbits32(mm-regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+
+ spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
+}
+
+static void mpc8xxx_irq_mask(unsigned int virq)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned long flags;
+
+ spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+
+ clrbits32(mm-regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+
+ spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
+}
+
+static void mpc8xxx_irq_ack(unsigned int virq)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+
+ out_be32(mm-regs + GPIO_IER, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+}
+
+static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned long flags;
+
+ switch (flow_type) {
+ case IRQ_TYPE_EDGE_FALLING:
+ spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+ setbits32(mm-regs + GPIO_ICR,
+ mpc8xxx_gpio2mask(virq_to_hw(virq)));
+ spin_unlock_irqrestore(mpc8xxx_gc-lock, flags
Re: [PATCH 3/3] mpc8xxx_gpio: add interrupt support
Peter == Peter Korsgaard jac...@sunsite.dk writes: Kumar == Kumar Gala ga...@kernel.crashing.org writes: Peter Hi, Kumar We need a binding document to go with this. Peter Ok, but where should it go? In the existing Peter powerpc/dts-bindings/fsl/8xxx_gpio.txt or somewhere seperate? I don't Peter see any other interrupt controller documentation besides the stuff in Peter booting-without-of.txt Any comments? -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 3/3] mpc8xxx_gpio: add interrupt support
Kumar == Kumar Gala ga...@kernel.crashing.org writes: Hi, Kumar We need a binding document to go with this. Ok, but where should it go? In the existing powerpc/dts-bindings/fsl/8xxx_gpio.txt or somewhere seperate? I don't see any other interrupt controller documentation besides the stuff in booting-without-of.txt -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 1/3] show_interrupts: use irq_chip::name if available
Benjamin == Benjamin Herrenschmidt b...@kernel.crashing.org writes: Benjamin On Wed, 2009-12-09 at 08:32 +0100, Peter Korsgaard wrote: Peter == Peter Korsgaard jac...@sunsite.dk writes: Peter struct irq_chip::typename is going away (replaced by name). Use name if Peter set instead of typename in show_interrupt to make ease transition. Comments? Benjamin Hi Peter ! Benjamin There's already a patch in my -next tree from Thomas Gleixner Benjamin that fixes that up along with a few others in arch/powerpc. Ahh, ok - Hadn't noticed - Sorry. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 1/3] show_interrupts: use irq_chip::name if available
Peter == Peter Korsgaard jac...@sunsite.dk writes: Peter struct irq_chip::typename is going away (replaced by name). Use name if Peter set instead of typename in show_interrupt to make ease transition. Comments? Peter Signed-off-by: Peter Korsgaard jac...@sunsite.dk Peter --- Peter arch/powerpc/kernel/irq.c |3 ++- Peter 1 files changed, 2 insertions(+), 1 deletions(-) Peter diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c Peter index e5d1211..33e1130 100644 Peter --- a/arch/powerpc/kernel/irq.c Peter +++ b/arch/powerpc/kernel/irq.c Peter @@ -203,7 +203,8 @@ int show_interrupts(struct seq_file *p, void *v) Peter seq_printf(p, %10u , kstat_irqs(i)); Peter #endif /* CONFIG_SMP */ Peter if (desc-chip) Peter - seq_printf(p, %s , desc-chip-typename); Peter + seq_printf(p, %s , desc-chip-name ? Peter + desc-chip-name : desc-chip-typename); Peter else Peter seq_puts(p, None ); Peter seq_printf(p, %s, (desc-status IRQ_LEVEL) ? Level : Edge ); Peter -- Peter 1.6.5 -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 3/3] mpc8xxx_gpio: add interrupt support
Peter == Peter Korsgaard jac...@sunsite.dk writes:
Comments?
Peter Signed-off-by: Peter Korsgaard jac...@sunsite.dk
Peter ---
Peter arch/powerpc/sysdev/mpc8xxx_gpio.c | 147
Peter 1 files changed, 147 insertions(+), 0 deletions(-)
Peter diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c
b/arch/powerpc/sysdev/mpc8xxx_gpio.c
Peter index 103eace..b46f28b 100644
Peter --- a/arch/powerpc/sysdev/mpc8xxx_gpio.c
Peter +++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
Peter @@ -15,6 +15,7 @@
Peter #include linux/of.h
Peter #include linux/of_gpio.h
Peter #include linux/gpio.h
Peter +#include linux/irq.h
Peter #define MPC8XXX_GPIO_PINS 32
Peter @@ -34,6 +35,7 @@ struct mpc8xxx_gpio_chip {
Peter * open drain mode safely
Peter */
Peter u32 data;
Peter + struct irq_host *irq;
Peter };
Peter static inline u32 mpc8xxx_gpio2mask(unsigned int gpio)
Peter @@ -111,12 +113,136 @@ static int mpc8xxx_gpio_dir_out(struct gpio_chip
*gc, unsigned int gpio, int val
Peter return 0;
Peter }
Peter +static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
Peter +{
Peter + struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
Peter + struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
Peter +
Peter + if (mpc8xxx_gc-irq offset MPC8XXX_GPIO_PINS)
Peter + return irq_create_mapping(mpc8xxx_gc-irq, offset);
Peter + else
Peter + return -ENXIO;
Peter +}
Peter +
Peter +static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc
*desc)
Peter +{
Peter + struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_desc_data(desc);
Peter + struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
Peter + unsigned int mask;
Peter +
Peter + mask = in_be32(mm-regs + GPIO_IER) in_be32(mm-regs +
GPIO_IMR);
Peter + if (mask)
Peter + generic_handle_irq(irq_linear_revmap(mpc8xxx_gc-irq,
Peter +32 - ffs(mask)));
Peter +}
Peter +
Peter +static void mpc8xxx_irq_unmask(unsigned int virq)
Peter +{
Peter + struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
Peter + struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
Peter + unsigned long flags;
Peter +
Peter + spin_lock_irqsave(mpc8xxx_gc-lock, flags);
Peter +
Peter + setbits32(mm-regs + GPIO_IMR,
mpc8xxx_gpio2mask(virq_to_hw(virq)));
Peter +
Peter + spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
Peter +}
Peter +
Peter +static void mpc8xxx_irq_mask(unsigned int virq)
Peter +{
Peter + struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
Peter + struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
Peter + unsigned long flags;
Peter +
Peter + spin_lock_irqsave(mpc8xxx_gc-lock, flags);
Peter +
Peter + clrbits32(mm-regs + GPIO_IMR,
mpc8xxx_gpio2mask(virq_to_hw(virq)));
Peter +
Peter + spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
Peter +}
Peter +
Peter +static void mpc8xxx_irq_ack(unsigned int virq)
Peter +{
Peter + struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
Peter + struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
Peter +
Peter + out_be32(mm-regs + GPIO_IER,
mpc8xxx_gpio2mask(virq_to_hw(virq)));
Peter +}
Peter +
Peter +static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int
flow_type)
Peter +{
Peter + struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
Peter + struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
Peter + unsigned long flags;
Peter +
Peter + switch (flow_type) {
Peter + case IRQ_TYPE_EDGE_FALLING:
Peter + spin_lock_irqsave(mpc8xxx_gc-lock, flags);
Peter + setbits32(mm-regs + GPIO_ICR,
Peter + mpc8xxx_gpio2mask(virq_to_hw(virq)));
Peter + spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
Peter + break;
Peter +
Peter + case IRQ_TYPE_EDGE_BOTH:
Peter + spin_lock_irqsave(mpc8xxx_gc-lock, flags);
Peter + clrbits32(mm-regs + GPIO_ICR,
Peter + mpc8xxx_gpio2mask(virq_to_hw(virq)));
Peter + spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
Peter + break;
Peter +
Peter + default:
Peter + return -EINVAL;
Peter + }
Peter +
Peter + return 0;
Peter +}
Peter +
Peter +static struct irq_chip mpc8xxx_irq_chip = {
Peter + .name = mpc8xxx-gpio,
Peter + .unmask = mpc8xxx_irq_unmask,
Peter + .mask = mpc8xxx_irq_mask,
Peter + .ack= mpc8xxx_irq_ack,
Peter + .set_type = mpc8xxx_irq_set_type,
Peter +};
Peter +
Peter +static int mpc8xxx_gpio_irq_map(struct irq_host *h, unsigned int virq,
Peter
[PATCH 1/3] show_interrupts: use irq_chip::name if available
struct irq_chip::typename is going away (replaced by name). Use name if set instead of typename in show_interrupt to make ease transition. Signed-off-by: Peter Korsgaard jac...@sunsite.dk --- arch/powerpc/kernel/irq.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index e5d1211..33e1130 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c @@ -203,7 +203,8 @@ int show_interrupts(struct seq_file *p, void *v) seq_printf(p, %10u , kstat_irqs(i)); #endif /* CONFIG_SMP */ if (desc-chip) - seq_printf(p, %s , desc-chip-typename); + seq_printf(p, %s , desc-chip-name ? + desc-chip-name : desc-chip-typename); else seq_puts(p, None ); seq_printf(p, %s, (desc-status IRQ_LEVEL) ? Level : Edge ); -- 1.6.5 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 2/3] asm/gpio.h: support gpio_to_irq()
gpiolib returns -ENXIO if struct gpio_chip::to_irq isn't set, so it's
safe to always call.
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
arch/powerpc/include/asm/gpio.h |5 +
1 files changed, 1 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h
index ea04632..38762ed 100644
--- a/arch/powerpc/include/asm/gpio.h
+++ b/arch/powerpc/include/asm/gpio.h
@@ -38,12 +38,9 @@ static inline int gpio_cansleep(unsigned int gpio)
return __gpio_cansleep(gpio);
}
-/*
- * Not implemented, yet.
- */
static inline int gpio_to_irq(unsigned int gpio)
{
- return -ENOSYS;
+ return __gpio_to_irq(gpio);
}
static inline int irq_to_gpio(unsigned int irq)
--
1.6.5
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[PATCH 3/3] mpc8xxx_gpio: add interrupt support
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
arch/powerpc/sysdev/mpc8xxx_gpio.c | 147
1 files changed, 147 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c
b/arch/powerpc/sysdev/mpc8xxx_gpio.c
index 103eace..b46f28b 100644
--- a/arch/powerpc/sysdev/mpc8xxx_gpio.c
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -15,6 +15,7 @@
#include linux/of.h
#include linux/of_gpio.h
#include linux/gpio.h
+#include linux/irq.h
#define MPC8XXX_GPIO_PINS 32
@@ -34,6 +35,7 @@ struct mpc8xxx_gpio_chip {
* open drain mode safely
*/
u32 data;
+ struct irq_host *irq;
};
static inline u32 mpc8xxx_gpio2mask(unsigned int gpio)
@@ -111,12 +113,136 @@ static int mpc8xxx_gpio_dir_out(struct gpio_chip *gc,
unsigned int gpio, int val
return 0;
}
+static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
+{
+ struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
+
+ if (mpc8xxx_gc-irq offset MPC8XXX_GPIO_PINS)
+ return irq_create_mapping(mpc8xxx_gc-irq, offset);
+ else
+ return -ENXIO;
+}
+
+static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_desc_data(desc);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned int mask;
+
+ mask = in_be32(mm-regs + GPIO_IER) in_be32(mm-regs + GPIO_IMR);
+ if (mask)
+ generic_handle_irq(irq_linear_revmap(mpc8xxx_gc-irq,
+32 - ffs(mask)));
+}
+
+static void mpc8xxx_irq_unmask(unsigned int virq)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned long flags;
+
+ spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+
+ setbits32(mm-regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+
+ spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
+}
+
+static void mpc8xxx_irq_mask(unsigned int virq)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned long flags;
+
+ spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+
+ clrbits32(mm-regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+
+ spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
+}
+
+static void mpc8xxx_irq_ack(unsigned int virq)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+
+ out_be32(mm-regs + GPIO_IER, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+}
+
+static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type)
+{
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+ struct of_mm_gpio_chip *mm = mpc8xxx_gc-mm_gc;
+ unsigned long flags;
+
+ switch (flow_type) {
+ case IRQ_TYPE_EDGE_FALLING:
+ spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+ setbits32(mm-regs + GPIO_ICR,
+ mpc8xxx_gpio2mask(virq_to_hw(virq)));
+ spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
+ break;
+
+ case IRQ_TYPE_EDGE_BOTH:
+ spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+ clrbits32(mm-regs + GPIO_ICR,
+ mpc8xxx_gpio2mask(virq_to_hw(virq)));
+ spin_unlock_irqrestore(mpc8xxx_gc-lock, flags);
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static struct irq_chip mpc8xxx_irq_chip = {
+ .name = mpc8xxx-gpio,
+ .unmask = mpc8xxx_irq_unmask,
+ .mask = mpc8xxx_irq_mask,
+ .ack= mpc8xxx_irq_ack,
+ .set_type = mpc8xxx_irq_set_type,
+};
+
+static int mpc8xxx_gpio_irq_map(struct irq_host *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ set_irq_chip_data(virq, h-host_data);
+ set_irq_chip_and_handler(virq, mpc8xxx_irq_chip, handle_level_irq);
+ set_irq_type(virq, IRQ_TYPE_NONE);
+
+ return 0;
+}
+
+static int mpc8xxx_gpio_irq_xlate(struct irq_host *h, struct device_node *ct,
+ u32 *intspec, unsigned int intsize,
+ irq_hw_number_t *out_hwirq,
+ unsigned int *out_flags)
+
+{
+ /* interrupt sense values coming from the device tree equal either
+* EDGE_FALLING or EDGE_BOTH
+*/
+ *out_hwirq = intspec[0];
+ *out_flags = intspec[1];
+
+ return 0;
+}
+
+static struct irq_host_ops mpc8xxx_gpio_irq_ops = {
+ .map= mpc8xxx_gpio_irq_map,
+ .xlate = mpc8xxx_gpio_irq_xlate,
+};
+
static void __init mpc8xxx_add_controller(struct
Re: [PATCH] i2c-mpc: Do not generate STOP after read.
Joakim == Joakim Tjernlund joakim.tjernl...@transmode.se writes: Hi, Joakim Ah, that explains it. Who then will look after i2c-mpc? Kumar? Ben Dooks (embedded i2c maintainer). He's afaik coming home today, so give him a few days to catch up on mails. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: GPIO driver for MPC8313.
Johnny == Johnny Hung johnny.hack...@gmail.com writes: Johnny The kerne source I used now is 2.6.23 with MPC8313-erdb Johnny pached. I think I should port 2.6.28 gpio function back to Johnny 2.6.23. Is it a common way to implement it in the kernel I used Johnny or I should port MPC8313-erdb pached to 2.6.28 opposite? It shouldn't be that hard to back port, but I would certainly go for 2.6.28 (or rather 2.6.31) unless something keeps you at 2.6.23. -- Bye, Peter Korsgaard -- To unsubscribe from this list: send the line unsubscribe linux-embedded in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: GPIO driver for MPC8313.
Johnny == Johnny Hung johnny.hack...@gmail.com writes: Johnny Hi All: Johnny Is there a alreday written GPIO dirver or example for Johnny MPC8313/similar ppc platform. It looks like many people need GPIO Johnny dirver to control LED, etc... I think is it possible to write a Johnny general gpio driver for all ppc platform and only need to modify gpio Johnny iomap information of dtb file. Please give me a advice. Thanks in Johnny advanced. Sure, it's arch/powerpc/sysdev/mpc8xxx_gpio.c, included since 2.6.28. To use it, simply enable CONFIG_MPC8xxx_GPIO and add a gpio-controller node to your dts, similar to how it's done in arch/powerpc/boot/dts/mpc837*_rdb.dts. See Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt for details of the dts bindings. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: GPIO driver for MPC8313.
Johnny == Johnny Hung johnny.hack...@gmail.com writes: Johnny Thanks, got it. BTW, how to trigger GPIO level in user space Johnny application? I also found Johnny arch/powerpc/platforms/52xx/mpc52xx_gpio.c is a good Johnny example. Any reply is appreciate. Through sysfs. See 'Sysfs Interface for Userspace' section of Documentation/gpio.txt -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] mpc83xx/usb.c: fix usb mux setup for mpc834x
Kumar == Kumar Gala ga...@kernel.crashing.org writes: Hi, Kumar On Jun 9, 2009, at 6:43 AM, Peter Korsgaard wrote: usb0 and usb1 mux settings in the sicrl register were swapped (twice!) in mpc834x_usb_cfg(), leading to various strange issues with fsl-ehci and full speed devices. The USB port config on mpc834x is done using 2 muxes: Port 0 is always used for MPH port 0, and port 1 can either be used for MPH port 1 or DR (unless DR uses TMDI phy or OTG, then it uses both ports) - See 8349 RM figure 1-4.. mpc8349_usb_cfg() had this inverted for the DR, and it also had the bit positions of the usb0 / usb1 mux settings swapped. It would basically work if you specified port1 instead of port0 for the MPH controller (and happened to use ULPI phys), which is what all the 834x dts have done, even though that configuration is physically invalid. Instead fix mpc8349_usb_cfg() and adjust the dts files to match reality. Signed-off-by: Peter Korsgaard jac...@sunsite.dk Kumar applied.. Please remind me to send this linux-stable for .30 and .29 *Remind* -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Device tree for c67x00
Jorge == Jorge Sánchez de Nova j.s.den...@gmail.com writes: Jorge Hi, Jorge It doesn't work at all since it doesn't load anything. I have Jorge looked at the driver and there is apparently no openfirmware Jorge support for it, so maybe the dts info won't work without Jorge it. Am I wrong? Does this means that the c67x00 needs OF Jorge support to work in this configuration? How can I make it Jorge otherwise? Yes, the c67x00 driver doesn't currently have any OF bindings. Either you can add it, or simply manually create the struct platform_device in your board file (or scan the DT in your board file and fill in the correct base address / interrupt number from it). Remember that arch/powerpc uses virtual interrupt numbers if you're going to fill in the platform_device by hand. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] mpc83xx/usb.c: fix usb mux setup for mpc834x
usb0 and usb1 mux settings in the sicrl register were swapped (twice!)
in mpc834x_usb_cfg(), leading to various strange issues with fsl-ehci
and full speed devices.
The USB port config on mpc834x is done using 2 muxes: Port 0 is always
used for MPH port 0, and port 1 can either be used for MPH port 1 or DR
(unless DR uses TMDI phy or OTG, then it uses both ports) - See 8349 RM
figure 1-4..
mpc8349_usb_cfg() had this inverted for the DR, and it also had the bit
positions of the usb0 / usb1 mux settings swapped. It would basically
work if you specified port1 instead of port0 for the MPH controller (and
happened to use ULPI phys), which is what all the 834x dts have done,
even though that configuration is physically invalid.
Instead fix mpc8349_usb_cfg() and adjust the dts files to match reality.
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
arch/powerpc/boot/dts/asp834x-redboot.dts |2 +-
arch/powerpc/boot/dts/mpc8349emitx.dts|2 +-
arch/powerpc/boot/dts/mpc834x_mds.dts |2 +-
arch/powerpc/boot/dts/sbc8349.dts |2 +-
arch/powerpc/platforms/83xx/mpc83xx.h |4 ++--
arch/powerpc/platforms/83xx/usb.c | 10 +-
6 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts
b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 7da84fd..261d10c 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -167,7 +167,7 @@
interrupt-parent = ipic;
interrupts = 39 0x8;
phy_type = ulpi;
- port1;
+ port0;
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
u...@23000 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts
b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 1ae38f0..e540d44 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -156,7 +156,7 @@
interrupt-parent = ipic;
interrupts = 39 0x8;
phy_type = ulpi;
- port1;
+ port0;
};
u...@23000 {
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts
b/arch/powerpc/boot/dts/mpc834x_mds.dts
index d9f0a23..a667fe7 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -153,7 +153,7 @@
interrupt-parent = ipic;
interrupts = 39 0x8;
phy_type = ulpi;
- port1;
+ port0;
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
u...@23000 {
diff --git a/arch/powerpc/boot/dts/sbc8349.dts
b/arch/powerpc/boot/dts/sbc8349.dts
index a36dbbc..c7e1c4b 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -144,7 +144,7 @@
interrupt-parent = ipic;
interrupts = 39 0x8;
phy_type = ulpi;
- port1;
+ port0;
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
u...@23000 {
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h
b/arch/powerpc/platforms/83xx/mpc83xx.h
index 83cfe51..d1dc5b0 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -22,8 +22,8 @@
/* system i/o configuration register low */
#define MPC83XX_SICRL_OFFS 0x114
#define MPC834X_SICRL_USB_MASK 0x6000
-#define MPC834X_SICRL_USB0 0x4000
-#define MPC834X_SICRL_USB1 0x2000
+#define MPC834X_SICRL_USB0 0x2000
+#define MPC834X_SICRL_USB1 0x4000
#define MPC831X_SICRL_USB_MASK 0x0c00
#define MPC831X_SICRL_USB_ULPI 0x0800
#define MPC8315_SICRL_USB_MASK 0x00fc
diff --git a/arch/powerpc/platforms/83xx/usb.c
b/arch/powerpc/platforms/83xx/usb.c
index 11e1fac..f53eba3 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -51,21 +51,21 @@ int mpc834x_usb_cfg(void)
!strcmp(prop, utmi_wide))) {
sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;
sicrh |= MPC834X_SICRH_USB_UTMI;
- port1_is_dr = 1;
+ port0_is_dr = 1;
} else if (prop !strcmp(prop, serial)) {
dr_mode = of_get_property(np, dr_mode, NULL);
if (dr_mode !strcmp(dr_mode, otg)) {
sicrl |= MPC834X_SICRL_USB0 |
MPC834X_SICRL_USB1;
- port1_is_dr = 1;
+ port0_is_dr = 1;
} else {
- sicrl
Re: SD card over (xilinx_)SPI, timeout error while CID
Joachim == Joachim Foerster j...@gmx.de writes: Hi, Joachim Any hints? Does anybody use SD card support with Joachim mmc_spi+xilinx_spi ? I don't, but have you compared the spi signals on a scope in the 2 setups? Is timing significantly different? -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] [POWERPC] 83xx: Add support for the Thecus N1200 NAS device
David == David Gibson da...@gibson.dropbear.id.au writes:
David On Thu, Jun 04, 2009 at 09:59:04PM +0100, Byron Bradley wrote:
The Thecus N1200 is a NAS device with a single internal SATA disk and
an eSATA port based on an MPC8347 SoC.
David Comments on a number of fairly minor device tree nits below:
David [snip]
+ soc8...@e000 {
+ #address-cells = 1;
+ #size-cells = 1;
+ device_type = soc;
+ compatible = simple-bus;
+ };
+
+ gpio1: gpio-control...@c00 {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8347-gpio, fsl,mpc8349-gpio;
David This actually is an 8349 board, yes? Generally compatible should be
David listed from most specific to least specific, so the 8349 entry should
David go first.
No, it's an 8347, to the gpio compatible is fine, but the soc8349
should be changed to 8347 above.
--
Bye, Peter Korsgaard
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Re: [PATCH V3 4/4] Fabric bindings for STAC9766 on the Efika
Jon == Jon Smirl jonsm...@gmail.com writes: Hi, Jon Fabric bindings for STAC9766 AC97 codec on the Efika. Jon Signed-off-by: Jon Smirl jonsm...@gmail.com Jon --- Jon sound/soc/fsl/Kconfig |8 +++ Jon sound/soc/fsl/Makefile |1 Jon sound/soc/fsl/efika-audio-fabric.c | 95 Jon 3 files changed, 104 insertions(+), 0 deletions(-) Jon create mode 100644 sound/soc/fsl/efika-audio-fabric.c Jon diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig Jon index 79579ae..f571c6e 100644 Jon --- a/sound/soc/fsl/Kconfig Jon +++ b/sound/soc/fsl/Kconfig Jon @@ -47,3 +47,11 @@ config SND_MPC52xx_SOC_PCM030 Jon help Jon Say Y if you want to add support for sound on the Phytec pcm030 baseboard. Jon +config SND_MPC52xx_SOC_EFIKA Jon + tristate SoC AC97 Audio support for bbplan Efika and STAC9766 Jon + depends on PPC_EFIKA Jon + select SND_SOC_MPC5200_AC97 Jon + select SND_SOC_STAC9766 Jon + help Jon + Say Y if you want to add support for sound on the Efika. Jon + Wouldn't it make more sense to make this default y when it has such specific dependencies and is so deep down in the tree - Most efika users probably want to enable this if they have enabled ALSA and SND_SOC? -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v2] i2c-mpc: generate START condition after STOP caused by read i2c_msg
Esben == Esben Haabendal esbenhaaben...@gmail.com writes: Hi, I wanted to test it, but it does not apply due to line breaks (check @@-line). Also, I don't really have the time to dig into the topic, so I would only test it and give a tested-by-tag if it doesn't break anything here. I think Joakim would be a good candidate for an acked-by . Esben I've checked both my copy in my Sent folder and the copy Esben received from the list, and I cannot see any line break Esben breakage of the patch. I guess Wolfram referred to the context line which was clearly word wrapped: @@ -456,17 +456,22 @@ static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) The other lines look fine. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v2] i2c-mpc: generate START condition after STOP caused by read i2c_msg
Esben == Esben Haabendal esbenhaaben...@gmail.com writes: Hi, Esben It's strange, that line looks perfectly fine when I check the Esben mail in my GMail inbox and the outbox from the account I sent Esben it from. Well, it is here and in the archive: http://ozlabs.org/pipermail/linuxppc-dev/2009-May/072274.html Please consider using git send-email for patches. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [MTD] ofpart: Partitions at same address cannot have the same name
Ricardo == Ricardo Ribalda Delgado ricardo.riba...@uam.es writes:
Hi,
Ricardo Sometimes, an special partition is included in the device
Ricardo tree including all the partitions. Like in:
Ricardo drivers/mtd/ofpart.c |3 ++-
Ricardo 1 files changed, 2 insertions(+), 1 deletions(-)
Ricardo diff --git a/drivers/mtd/ofpart.c b/drivers/mtd/ofpart.c
Ricardo index 3e164f0..0af3b07 100644
Ricardo --- a/drivers/mtd/ofpart.c
Ricardo +++ b/drivers/mtd/ofpart.c
Ricardo @@ -48,7 +48,8 @@ int __devinit of_mtd_parse_partitions(struct device
*dev,
Ricardo /* check if this is a partition node */
Ricardo partname = of_get_property(pp, name, len);
Ricardo - if (strcmp(partname, partition) != 0) {
Ricardo + if (strncmp(partname, partition,
strlen(partition)-1)
Why strlen() - 1 ?
--
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Re: [PATCH 6/6] powerpc/fsl_soc: Isolate legacy fsl_spi support to mpc832x_rdb boards
Peter == Peter Korsgaard jac...@sunsite.dk writes:
Anyone? I've locally reverted the commit, but most likely I'm not the
only one using the spi_mpc83xx driver without direct gpio controlled
chip select handling.
Anton The advantages of this:
Anton - Don't encourage legacy support;
Anton - Less external symbols, less code to compile-in for !MPC832x_RDB
Anton platforms.
Peter It's nice with your cleanups, but I wonder how to handle more
Peter complicated chip select handling than simply toggling a single gpio.
Peter I have a board (or 2 actually, but they are similar in this regard)
Peter with a mpc8347 using SPI to a number of addon boards. For signal
Peter integrity reasons the SPI signals are routed to a MUX, so the chip
Peter select logic has to set the MUX in addition to controlling the CS line
Peter of the device.
Peter I've been using code like this since late 2007, but this patch
Peter ofcourse breaks it:
Peter static void thinx_spi_activate_cs(u8 cs, u8 polarity)
Peter {
Peter static u8 old_cs = 255;
Peter if (cs != old_cs) {
Peter /* mux setup (cs 2:1)*/
Peter gpio_set_value(gpio1 + GPIO_SPI_MUX_NOE, 1);
Peter gpio_set_value(gpio1 + GPIO_SPI_MUX_SEL0, cs2);
Peter gpio_set_value(gpio1 + GPIO_SPI_MUX_SEL1, cs4);
Peter gpio_set_value(gpio1 + GPIO_SPI_MUX_NOE, 0);
Peter old_cs = cs;
Peter }
Peter switch (cs) {
Peter case 0: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL1, polarity);
break;
Peter case 1: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL2, polarity);
break;
Peter case 2: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT1, polarity);
break;
Peter case 3: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT2, polarity);
break;
Peter }
Peter }
Peter static void thinx_spi_deactivate_cs(u8 cs, u8 polarity)
Peter {
Peter switch (cs) {
Peter case 0: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL1, !polarity);
break;
Peter case 1: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL2, !polarity);
break;
Peter case 2: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT1, !polarity);
break;
Peter case 3: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT2, !polarity);
break;
Peter }
Peter }
Peter static __init int thinx_spi_init(void)
Peter {
Peter struct device_node *np;
Peter struct of_gpio_chip *gc;
Peter static const int gpios[] = {
Peter GPIO_SPI_CS_BKL1,
Peter GPIO_SPI_CS_BKL2,
Peter GPIO_SPI_CS_OPT1,
Peter GPIO_SPI_CS_OPT2,
Peter GPIO_SPI_MUX_NOE,
Peter GPIO_SPI_MUX_SEL0,
Peter GPIO_SPI_MUX_SEL1
Peter };
Peter int i;
Peter np = of_find_node_by_name(NULL, gpio-controller);
Peter if (!np || !np-data) {
Peter printk(KERN_ERR
Petergpio1 node not found or controller not
registerred\n);
Peter return -ENODEV;
Peter }
Peter gc = np-data;
Peter gpio1 = gc-gc.base;
Peter for (i=0; iARRAY_SIZE(gpios); i++) {
Peter gpio_request(gpio1 + gpios[i], spi);
Peter gpio_direction_output(gpio1 + gpios[i], 1);
Peter }
Peter fsl_spi_init(thinx_spi_boardinfo,
ARRAY_SIZE(thinx_spi_boardinfo),
Peter thinx_spi_activate_cs, thinx_spi_deactivate_cs);
Peter return 0;
Peter }
Peter Now, I don't quite see how to handle this with the new OF bindings -
Peter Any ideas?
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Re: [PATCH 6/6] powerpc/fsl_soc: Isolate legacy fsl_spi support to mpc832x_rdb boards
Anton == Anton Vorontsov avoront...@ru.mvista.com writes:
Hi,
Anton The advantages of this:
Anton - Don't encourage legacy support;
Anton - Less external symbols, less code to compile-in for !MPC832x_RDB
Anton platforms.
It's nice with your cleanups, but I wonder how to handle more
complicated chip select handling than simply toggling a single gpio.
I have a board (or 2 actually, but they are similar in this regard)
with a mpc8347 using SPI to a number of addon boards. For signal
integrity reasons the SPI signals are routed to a MUX, so the chip
select logic has to set the MUX in addition to controlling the CS line
of the device.
I've been using code like this since late 2007, but this patch
ofcourse breaks it:
static void thinx_spi_activate_cs(u8 cs, u8 polarity)
{
static u8 old_cs = 255;
if (cs != old_cs) {
/* mux setup (cs 2:1)*/
gpio_set_value(gpio1 + GPIO_SPI_MUX_NOE, 1);
gpio_set_value(gpio1 + GPIO_SPI_MUX_SEL0, cs2);
gpio_set_value(gpio1 + GPIO_SPI_MUX_SEL1, cs4);
gpio_set_value(gpio1 + GPIO_SPI_MUX_NOE, 0);
old_cs = cs;
}
switch (cs) {
case 0: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL1, polarity); break;
case 1: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL2, polarity); break;
case 2: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT1, polarity); break;
case 3: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT2, polarity); break;
}
}
static void thinx_spi_deactivate_cs(u8 cs, u8 polarity)
{
switch (cs) {
case 0: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL1, !polarity); break;
case 1: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL2, !polarity); break;
case 2: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT1, !polarity); break;
case 3: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT2, !polarity); break;
}
}
static __init int thinx_spi_init(void)
{
struct device_node *np;
struct of_gpio_chip *gc;
static const int gpios[] = {
GPIO_SPI_CS_BKL1,
GPIO_SPI_CS_BKL2,
GPIO_SPI_CS_OPT1,
GPIO_SPI_CS_OPT2,
GPIO_SPI_MUX_NOE,
GPIO_SPI_MUX_SEL0,
GPIO_SPI_MUX_SEL1
};
int i;
np = of_find_node_by_name(NULL, gpio-controller);
if (!np || !np-data) {
printk(KERN_ERR
gpio1 node not found or controller not registerred\n);
return -ENODEV;
}
gc = np-data;
gpio1 = gc-gc.base;
for (i=0; iARRAY_SIZE(gpios); i++) {
gpio_request(gpio1 + gpios[i], spi);
gpio_direction_output(gpio1 + gpios[i], 1);
}
fsl_spi_init(thinx_spi_boardinfo, ARRAY_SIZE(thinx_spi_boardinfo),
thinx_spi_activate_cs, thinx_spi_deactivate_cs);
return 0;
}
Now, I don't quite see how to handle this with the new OF bindings -
Any ideas?
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Re: U-Boot image
Günter == Günter Leonhardt guenter.leonha...@men.de writes: Günter Hello, Günter I'am looking for an image to boot a embedded device with a Günter single image. Günter I though the generated uImage in arch/powerpc/boot should Günter work, but u-boot cannot but this, because the addresses of Günter initrd and dtb not found. Günter Now I'am creating the image by hand with mkimage: Günter mkimage -A ppc -n F302 -O linux \ Günter-T multi -C gzip -a 0x0 -e 0x0 \ Günter -d vmlinux.bin.gz:initramfs_data.cpio.gz:f302.dtb \ Günter uImage I posted a patch to add support for multi image uImages to the kernel makefiles, E.G. uImage.platform some time ago. It got nack'ed by wdenx though as he wants people to use the new fitimage stuff in u-boot instead. Anyway, it might be useful to you: http://peter.korsgaard.com/patches/linux/bootwrapper-uboot-multi-2.patch To use it, add: image-$(CONFIG_your-platform) + uImage.your-platform to arch/powerpc/boot/Makefile. Günter This file is bootable, but I don't understand how a standard Günter file has to be booted. With an external dtb / initrd. Günter Can someone explain me the different fileforamts for booting Günter a powerpc with u-boot? Which is the simplest to use? Have a look at Documentation/powerpc/bootwrapper.txt -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] add gpio to mpc837X rdb
Reynes == Reynes Philippe philippe.rey...@isismpp.fr writes:
Reynes Signed-off-by: Philippe Reynes philippe.rey...@isismpp.fr
Reynes ---
Reynes Index: powerpc/arch/powerpc/boot/dts/mpc8377_rdb.dts
Reynes ===
Reynes --- powerpc.orig/arch/powerpc/boot/dts/mpc8377_rdb.dts
Reynes +++ powerpc/arch/powerpc/boot/dts/mpc8377_rdb.dts
Reynes @@ -109,6 +109,24 @@
Reynesreg = 0x200 0x100;
Reynes};
Reynes + gpio1: gpio-control...@c00 {
Reynes + #gpio-cells = 2;
Reynes + compatible = fsl,mpc8377-gpio,
Reynes fsl,mpc8349-gpio;
Still word wrapped. Please try sending the patch to yourself first and
check if you can apply it before sending it to the list.
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Re: [PATCH] add gpio to mpc837X rdb
Reynes == Reynes Philippe philippe.rey...@isismpp.fr writes:
Hi,
Reynes Signed-off-by: Philippe Reynes philippe.rey...@isismpp.fr
Reynes + gpio1: gpio-control...@c00 {
Reynes + #gpio-cells = 2;
Reynes + compatible = fsl,mpc8347-gpio,
Reynes fsl,mpc8349-gpio;
The patch is wordwrapped, and you should use fsl,mpc8377-gpio, not
mpc8347 (E.G. actual platform, mpc8349)
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[PATCH] dts-bindings/fsl/dma.txt: fix IRQ number in mpc83xx dma example
The DMAC IRQ number of the mpc8349 is 71 and not 47, according to
http://www.freescale.com/files/32bit/doc/ref_manual/MPC8349EARMAD.pdf
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
Documentation/powerpc/dts-bindings/fsl/dma.txt |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/dma.txt
b/Documentation/powerpc/dts-bindings/fsl/dma.txt
index cc45311..3df1552 100644
--- a/Documentation/powerpc/dts-bindings/fsl/dma.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/dma.txt
@@ -38,7 +38,7 @@ Example:
reg = 82a8 4;
ranges = 0 8100 1a4;
interrupt-parent = ipic;
- interrupts = 47 8;
+ interrupts = 71 8;
cell-index = 0;
dma-chan...@0 {
compatible = fsl,mpc8349-dma-channel,
fsl,elo-dma-channel;
--
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[PATCH] fsldma: print correct IRQ on mpc83xx
The mpc83xx variant uses a shared IRQ for all channels, so the individual channel nodes don't have an interrupt property. Fix the code to print the controller IRQ instead if there isn't any for the channel. Signed-off-by: Peter Korsgaard jac...@sunsite.dk --- drivers/dma/fsldma.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c index ca70a21..61b6e08 100644 --- a/drivers/dma/fsldma.c +++ b/drivers/dma/fsldma.c @@ -875,7 +875,8 @@ static int __devinit fsl_dma_chan_probe(struct fsl_dma_device *fdev, } dev_info(fdev-dev, #%d (%s), irq %d\n, new_fsl_chan-id, - compatible, new_fsl_chan-irq); +compatible, +new_fsl_chan-irq != NO_IRQ ? new_fsl_chan-irq : fdev-irq); return 0; -- 1.5.6.5 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] dts-bindings/fsl/dma.txt: fix IRQ number in mpc83xx dma example
Anton == Anton Vorontsov avoront...@ru.mvista.com writes: Hi, interrupt-parent = ipic; - interrupts = 47 8; + interrupts = 71 8; Anton 0x47 = 71 ;-) The example is in the dts-v0 format, all the numbers Anton are hexadecimal. Ahh ;) -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] dts-bindings/fsl/dma.txt: convert to dts-v1 syntax
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
Documentation/powerpc/dts-bindings/fsl/dma.txt | 34
1 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/dma.txt
b/Documentation/powerpc/dts-bindings/fsl/dma.txt
index cc45311..0732cdd 100644
--- a/Documentation/powerpc/dts-bindings/fsl/dma.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/dma.txt
@@ -35,30 +35,30 @@ Example:
#address-cells = 1;
#size-cells = 1;
compatible = fsl,mpc8349-dma, fsl,elo-dma;
- reg = 82a8 4;
- ranges = 0 8100 1a4;
+ reg = 0x82a8 4;
+ ranges = 0 0x8100 0x1a4;
interrupt-parent = ipic;
- interrupts = 47 8;
+ interrupts = 71 8;
cell-index = 0;
dma-chan...@0 {
compatible = fsl,mpc8349-dma-channel,
fsl,elo-dma-channel;
cell-index = 0;
- reg = 0 80;
+ reg = 0 0x80;
};
dma-chan...@80 {
compatible = fsl,mpc8349-dma-channel,
fsl,elo-dma-channel;
cell-index = 1;
- reg = 80 80;
+ reg = 0x80 0x80;
};
dma-chan...@100 {
compatible = fsl,mpc8349-dma-channel,
fsl,elo-dma-channel;
cell-index = 2;
- reg = 100 80;
+ reg = 0x100 0x80;
};
dma-chan...@180 {
compatible = fsl,mpc8349-dma-channel,
fsl,elo-dma-channel;
cell-index = 3;
- reg = 180 80;
+ reg = 0x180 0x80;
};
};
@@ -93,36 +93,36 @@ Example:
#address-cells = 1;
#size-cells = 1;
compatible = fsl,mpc8540-dma, fsl,eloplus-dma;
- reg = 21300 4;
- ranges = 0 21100 200;
+ reg = 0x21300 4;
+ ranges = 0 0x21100 0x200;
cell-index = 0;
dma-chan...@0 {
compatible = fsl,mpc8540-dma-channel,
fsl,eloplus-dma-channel;
- reg = 0 80;
+ reg = 0 0x80;
cell-index = 0;
interrupt-parent = mpic;
- interrupts = 14 2;
+ interrupts = 20 2;
};
dma-chan...@80 {
compatible = fsl,mpc8540-dma-channel,
fsl,eloplus-dma-channel;
- reg = 80 80;
+ reg = 0x80 0x80;
cell-index = 1;
interrupt-parent = mpic;
- interrupts = 15 2;
+ interrupts = 21 2;
};
dma-chan...@100 {
compatible = fsl,mpc8540-dma-channel,
fsl,eloplus-dma-channel;
- reg = 100 80;
+ reg = 0x100 0x80;
cell-index = 2;
interrupt-parent = mpic;
- interrupts = 16 2;
+ interrupts = 22 2;
};
dma-chan...@180 {
compatible = fsl,mpc8540-dma-channel,
fsl,eloplus-dma-channel;
- reg = 180 80;
+ reg = 0x180 0x80;
cell-index = 3;
interrupt-parent = mpic;
- interrupts = 17 2;
+ interrupts = 23 2;
};
};
--
1.5.6.5
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Re: [PATCH] fsldma: print correct IRQ on mpc83xx
Timur == Timur Tabi ti...@freescale.com writes: Timur Peter Korsgaard wrote: @@ -875,7 +875,8 @@ static int __devinit fsl_dma_chan_probe(struct fsl_dma_device *fdev, } dev_info(fdev-dev, #%d (%s), irq %d\n, new_fsl_chan-id, - compatible, new_fsl_chan-irq); +compatible, +new_fsl_chan-irq != NO_IRQ ? new_fsl_chan-irq : fdev-irq); Timur Wouldn't it be better to make sure that, on 83xx, Timur new_fsl_chan-irq has the same value as fdev-irq before we Timur get here? Why? Does it buy us anything to request_irq again for each channel? Now we're at it, it seems like there's a check for != NO_IRQ missing in fsl_dma_chan_remove(). -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] fsldma: check for NO_IRQ in fsl_dma_chan_remove()
There's no per-channel IRQ on mpc83xx, so only call free_irq if we have one.
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
drivers/dma/fsldma.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index ca70a21..f48c0e6 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -890,7 +890,8 @@ err_no_reg:
static void fsl_dma_chan_remove(struct fsl_dma_chan *fchan)
{
- free_irq(fchan-irq, fchan);
+ if (fchan-irq != NO_IRQ)
+ free_irq(fchan-irq, fchan);
list_del(fchan-common.device_node);
iounmap(fchan-reg_base);
kfree(fchan);
--
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Re: [PATCH] fsldma: print correct IRQ on mpc83xx
Timur == Timur Tabi ti...@freescale.com writes: Timur Peter Korsgaard wrote: Why? Does it buy us anything to request_irq again for each channel? Now we're at it, it seems like there's a check for != NO_IRQ missing in fsl_dma_chan_remove(). Timur If the device tree doesn't specify an interrupts property in Timur the device channel, then I think that's an error. All the Timur device trees already do that. So where do you see this Timur problem? Documentation/powerpc/dts-bindings/fsl/dma.txt and The NO_IRQ check in fsldma.c:fsl_dma_chan_probe() And it makes sense, there's no per-channel DMAC interrupts on mpc83xx. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] fsldma: print correct IRQ on mpc83xx
Timur == Timur Tabi ti...@freescale.com writes: Timur Peter Korsgaard wrote: Documentation/powerpc/dts-bindings/fsl/dma.txt and The NO_IRQ check in fsldma.c:fsl_dma_chan_probe() And it makes sense, there's no per-channel DMAC interrupts on mpc83xx. Timur But the device trees do have IRQs in the channels: Timur arch/powerpc/boot/dts/mpc836x_mds.dts: Timur So I don't see what bug you're trying to fix. If you're Timur saying that the interrupts should not be specific DMA Timur channels, then the proper fix is to have the DMA driver pick Timur up the interrupts from the DMA controller's node when Timur necessary. Hacking up a printk doesn't fix anything. Ok, let me try again. SOME device trees indeed have an interrupt property per channel, but the bindings (Documentation/powerpc/dts-bindings/fsl/dma.txt) and the probe code in fsldma.c doesn't require it. The only minor issues we have is the cosmetic problem of the driver printing NO_IRQ (E.G. this patch), and the driver calling free_irq(NO_IRQ) (E.G. the other patch I sent today) in the release path. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH RESEND] powerpc: make udbg 16550 boot console configurable for EMBEDDED
The udbg console is currently always enabled for platforms selecting
the PPC_UDBG_16550 symbol (needed to create platform devices for
8250 SoC UARTs from DT).
Now, the udbg console is nice for debugging as it works so early, but
it also has a number of disadvantages:
- It doesn't respect console= and still outputs console messages even
if console isn't ttySx (E.G. if CONFIG_SILENT_CONSOLE is enabled in
U-Boot which sets 'console='
- It's slow (boot is ~0.3s slower on my mpc8347 platform compared to
using the 8250 driver right away)
- It slightly bloats the kernel (pretty insignificant, around 1K)
As that isn't always desirable, add a PPC_UDBG_16550_CONSOLE kconfig
symbol to let the user disable it (only visible if CONFIG_EMBEDDED).
Signed-off-by: Peter Korsgaard jac...@sunsite.dk
---
arch/powerpc/kernel/Makefile|3 ++-
arch/powerpc/kernel/legacy_serial.c |4
arch/powerpc/platforms/Kconfig |7 +++
3 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 92673b4..4651c0b 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -80,7 +80,8 @@ obj-$(CONFIG_MODULES) += ppc_ksyms.o
obj-$(CONFIG_BOOTX_TEXT) += btext.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_KPROBES) += kprobes.o
-obj-$(CONFIG_PPC_UDBG_16550) += legacy_serial.o udbg_16550.o
+obj-$(CONFIG_PPC_UDBG_16550) += legacy_serial.o
+obj-$(CONFIG_PPC_UDBG_16550_CONSOLE) += udbg_16550.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o
pci64-$(CONFIG_PPC64) += pci_dn.o isa-bridge.o
diff --git a/arch/powerpc/kernel/legacy_serial.c
b/arch/powerpc/kernel/legacy_serial.c
index 9ddfaef..c0e9866 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -279,6 +279,7 @@ static int __init add_legacy_pci_port(struct device_node
*np,
}
#endif
+#ifdef CONFIG_PPC_UDBG_16550_CONSOLE
static void __init setup_legacy_serial_console(int console)
{
struct legacy_serial_info *info =
@@ -295,6 +296,9 @@ static void __init setup_legacy_serial_console(int console)
DBG(default console speed = %d\n, info-speed);
udbg_init_uart(addr, info-speed, info-clock);
}
+#else
+#define setup_legacy_serial_console(console) do { } while (0)
+#endif
/*
* This is called very early, as part of setup_system() or eventually
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 47e956c..bc3ce47 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -312,4 +312,11 @@ config MPC8xxx_GPIO
Say Y here if you're going to use hardware that connects to the
MPC831x/834x/837x/8572/8610 GPIOs.
+config PPC_UDBG_16550_CONSOLE
+ bool Boot console on 16550 UDBG if EMBEDDED
+ depends on PPC_UDBG_16550
+ default y
+ help
+ Say Y here to use the UDBG infrastructure for early boot messages.
+
endmenu
--
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Re: Commits added to powerpc.git next and master branches
Paul == Paul Mackerras pau...@samba.org writes: Hi, I still don't see 'make udbg 16550 boot console configurable for EMBEDDED' (http://patchwork.ozlabs.org/patch/15441/) - Please consider. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: More commits added to powerpc.git next and master branches
Paul == Paul Mackerras pau...@samba.org writes: Paul I have added the following commits to the next and master Paul branches of my powerpc.git tree (including commits pulled from Paul Kumar's tree). I have also pulled in Linus' current tree and Paul the 3 commits that I just asked him to pull. I would like to see http://patchwork.ozlabs.org/patch/13164/ in 2.6.29 - Any comments? -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] powerpc: make udbg 16550 boot console configurable for EMBEDDED
The udbg console is currently always enabled for platforms selecting
the PPC_UDBG_16550 symbol (needed to create platform devices for
8250 SoC UARTs from DT).
Now, the udbg console is nice for debugging as it works so early, but
it also has a number of disadvantages:
- It doesn't respect console= and still outputs console messages even
if console isn't ttySx (E.G. if CONFIG_SILENT_CONSOLE is enabled in
U-Boot which sets 'console='
- It's slow (boot is ~0.3s slower on my mpc8347 platform compared to
using the 8250 driver right away)
- It slightly bloats the kernel (pretty insignificant, around 1K)
As that isn't always desirable, add a PPC_UDBG_16550_CONSOLE kconfig
symbol to let the user disable it (only visible if CONFIG_EMBEDDED).
Signed-off-by: Peter Korsgaard [EMAIL PROTECTED]
---
arch/powerpc/kernel/Makefile|3 ++-
arch/powerpc/kernel/legacy_serial.c |4
arch/powerpc/platforms/Kconfig |7 +++
3 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 92673b4..4651c0b 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -80,7 +80,8 @@ obj-$(CONFIG_MODULES) += ppc_ksyms.o
obj-$(CONFIG_BOOTX_TEXT) += btext.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_KPROBES) += kprobes.o
-obj-$(CONFIG_PPC_UDBG_16550) += legacy_serial.o udbg_16550.o
+obj-$(CONFIG_PPC_UDBG_16550) += legacy_serial.o
+obj-$(CONFIG_PPC_UDBG_16550_CONSOLE) += udbg_16550.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o
pci64-$(CONFIG_PPC64) += pci_dn.o isa-bridge.o
diff --git a/arch/powerpc/kernel/legacy_serial.c
b/arch/powerpc/kernel/legacy_serial.c
index 9ddfaef..c0e9866 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -279,6 +279,7 @@ static int __init add_legacy_pci_port(struct device_node
*np,
}
#endif
+#ifdef CONFIG_PPC_UDBG_16550_CONSOLE
static void __init setup_legacy_serial_console(int console)
{
struct legacy_serial_info *info =
@@ -295,6 +296,9 @@ static void __init setup_legacy_serial_console(int console)
DBG(default console speed = %d\n, info-speed);
udbg_init_uart(addr, info-speed, info-clock);
}
+#else
+#define setup_legacy_serial_console(console) do { } while (0)
+#endif
/*
* This is called very early, as part of setup_system() or eventually
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 47e956c..bc3ce47 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -312,4 +312,11 @@ config MPC8xxx_GPIO
Say Y here if you're going to use hardware that connects to the
MPC831x/834x/837x/8572/8610 GPIOs.
+config PPC_UDBG_16550_CONSOLE
+ bool Boot console on 16550 UDBG if EMBEDDED
+ depends on PPC_UDBG_16550
+ default y
+ help
+ Say Y here to use the UDBG infrastructure for early boot messages.
+
endmenu
--
1.5.6.5
___
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Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [v5] powerpc: gpio driver for mpc8349/8572/8610 and compatible
Trent == Trent Piepho [EMAIL PROTECTED] writes: Trent On Tue, 23 Sep 2008, Peter Korsgaard wrote: +- compatible : fsl,CHIP-gpio followed by fsl,mpc8349-gpio for + 83xx, fsl,mpc8572-gpio for 85xx and fsl,mpc8610-gpio for 86xx. Trent Why have the three different compatible settings when the code Trent doesn't do anything different? Purely for cosmetics / ease of use - As requested by Kumar: http://ozlabs.org/pipermail/linuxppc-dev/2008-September/062934.html +#define MPC8XXX_GPIO_PINS 32 Trent 8572 has eight GPIOs. Doesn't matter - It's register interface is compatible. Most real world design with the other SoCs also don't have all 32 gpio pins available because of pin multiplexing. Trent I wrote an MPC8572 GPIO driver back in March, and posted it Trent internally at Freescale on June 2nd. But it was just Trent ignored... I wonder what your secret is to get Kumar to apply Trent your patches? It's too bad this work keeps getting Trent duplicated. Did you try bribing? ;) No, seriously, why didn't you post it to linuxppc-dev, so the rest of the world would know about it? Trent My patch started out *very* much like yours, except it Trent pre-dated the OF gpio controller stuff and of_mm_gpiochip so Trent it didn't use that. Trent But, I'm using the GPIOs to bit-bang a JTAG bus in the 20-30 Trent MHz range. The obvious GPIO driver is *much* too slow for Trent that. I got less than 3 MHz, and your driver looks like it Trent might be slightly slower than my initial driver. I would write a dedicated driver for something like that instead of using gpiolib. Gpiolib has quite some overhead compared to the actual work for changing a SoC gpio pin, but it also has some very nice advantages. For most stuff people use GPIO pins for, the overhead is not an issue (SPI chip selects, leds, keys, reset signals, ..). It's very handy that we nowadays have generic drivers that work with any GPIO (being SoC gpios or stuff on spi/i2c). Trent So I went to a lot of effort to speed it up and managed to Trent increase GPIO performance by nearly a factor of 10. Trying to Trent commit my driver at this point is probably hopeless and I Trent doubt anyone else cares about gpio speed. But at least the Trent number of gpios for 8572 can be fixed. Sure, going dedicated always can improve performance. I recently did some work in u-boot talking directly to the mpc83xx spi controller and got ~5x throughput compared to the Linux driver. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: USB support on mpc5200 broken
Jon == Jon Smirl [EMAIL PROTECTED] writes: Hi, Jon How do I adjust my build to put the DTB into a wrapper? I'm Jon based on the pcm030 makefile and it assumes the DTB is built Jon externally. Jon Can u-boot handle the wrapped DTB? I'm using a pointer to kernel Jon and one to DTB when booting from u-boot. See my recent (nacked by Wolfgang, but sane in principle) patch for uImage.platform support: http://patchwork.ozlabs.org/patch/589/ -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: USB support on mpc5200 broken
Jon == Jon Smirl [EMAIL PROTECTED] writes: Hi, Jon Can u-boot handle the wrapped DTB? I'm using a pointer to kernel Jon and one to DTB when booting from u-boot. See my recent (nacked by Wolfgang, but sane in principle) patch for uImage.platform support: http://patchwork.ozlabs.org/patch/589/ Jon So I should wait for the version that uses FIT images. Well, yeah. As I said earlier, I won't have time to work on that right away, so you can either use the patch as is, wait or implement FIT support yourself. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: USB support on mpc5200 broken
Sven == Sven Luther [EMAIL PROTECTED] writes: Hi, This, of course, is exactly why I *don't* recommend embedded platforms move to including the device tree in the flashed firmware. Keeping the device tree in the bootwrapper means that it *is* updated with the kernel and we don't have to mess around with as much backwards compatibility junk. Sven This completely defeats the purpopse of having a separate Sven device tree though, no ? I mean, we could just as well hardcode Sven the device-tree info in the kernel in this case ? Well, yes and no. The device tree brings a number of advantages (and a few disadvantages as well), one of those being the potential decoupling of kernel and DT. Even if you don't make use of that feature in a production build you still have the other advantages (E.G. easy compile test of multiple boards, limited repeated-these-are-my-platform-devices code in board files, ...). Sven (In embedded cases, the kernel is usyually in the flash as Sven well, so you just upgrade both at the same time :) Sure, but if you do that you might as well include them in a single uImage because: - They are always in sync - You don't waste flash space (E.G. the DT is very small, but you waste a complete flash sector) With uImage.platform U-Boot can still fix up the tree before booting the kernel, so you don't lose any functionality (E.G. if you enable/disable certain nodes based on what option boards are available). -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] powerpc: Move 8xxx GPIO Kconfig under the platform menu
Kumar == Kumar Gala [EMAIL PROTECTED] writes: Kumar The initial patch had the option at the top level which wasn't Kumar quite right. Moving under the platform options is a bit better. Kumar Signed-off-by: Kumar Gala [EMAIL PROTECTED] Acked-by: Peter Korsgaard [EMAIL PROTECTED] -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v4] powerpc: gpio driver for mpc8349/8572/8610 and compatible
Kumar == Kumar Gala [EMAIL PROTECTED] writes: Hi, Kumar Peter, can you respin. Doesn't seem to apply cleanly to latest Kumar powerpc-next since paulus merged in things. Sure, it's on it's way. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v5] powerpc: gpio driver for mpc8349/8572/8610 and compatible
Structured similar to the existing QE GPIO support.
Signed-off-by: Peter Korsgaard [EMAIL PROTECTED]
Acked-by: Anton Vorontsov [EMAIL PROTECTED]
---
Changes since v4:
- Respun against powerpc-next, no functional changes
- Added Anton's ack
Changes since v3:
- Incorporated feedback from Anton
Changes since v2:
- Clarified documentation as requested by Kumar.
Changes since v1:
Incorporated feedback from Anton and Kumar:
- Core is also used on 8572/8610 so s/83xx/8xxx/
- Use fsl,mpc8572-gpio / fsl,mpc8610-gpio for 85xx/86xx as compatible
- Use shadowed data register to handle open drain outputs
- Expandend dts binding doc, use 8347 as example instead of 8349
- Misc small cleanups
.../powerpc/dts-bindings/fsl/8xxx_gpio.txt | 40 +
arch/powerpc/sysdev/Kconfig|9 +
arch/powerpc/sysdev/Makefile |1 +
arch/powerpc/sysdev/mpc8xxx_gpio.c | 171
4 files changed, 221 insertions(+), 0 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
create mode 100644 arch/powerpc/sysdev/mpc8xxx_gpio.c
diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
new file mode 100644
index 000..d015dce
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
@@ -0,0 +1,40 @@
+GPIO controllers on MPC8xxx SoCs
+
+This is for the non-QE/CPM/GUTs GPIO controllers as found on
+8349, 8572, 8610 and compatible.
+
+Every GPIO controller node must have #gpio-cells property defined,
+this information will be used to translate gpio-specifiers.
+
+Required properties:
+- compatible : fsl,CHIP-gpio followed by fsl,mpc8349-gpio for
+ 83xx, fsl,mpc8572-gpio for 85xx and fsl,mpc8610-gpio for 86xx.
+- #gpio-cells : Should be two. The first cell is the pin number and the
+ second cell is used to specify optional parameters (currently unused).
+ - interrupts : Interrupt mapping for GPIO IRQ (currently unused).
+ - interrupt-parent : Phandle for the interrupt controller that
+ services interrupts for this device.
+- gpio-controller : Marks the port as GPIO controller.
+
+Example of gpio-controller nodes for a MPC8347 SoC:
+
+ gpio1: [EMAIL PROTECTED] {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8347-gpio, fsl,mpc8349-gpio;
+ reg = 0xc00 0x100;
+ interrupts = 74 0x8;
+ interrupt-parent = ipic;
+ gpio-controller;
+ };
+
+ gpio2: [EMAIL PROTECTED] {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8347-gpio, fsl,mpc8349-gpio;
+ reg = 0xd00 0x100;
+ interrupts = 75 0x8;
+ interrupt-parent = ipic;
+ gpio-controller;
+ };
+
+See booting-without-of.txt for details of how to specify GPIO
+information for devices.
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index 3965828..d0e7bb0 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@ -7,6 +7,15 @@ config PPC4xx_PCI_EXPRESS
depends on PCI 4xx
default n
+config MPC8xxx_GPIO
+ bool MPC8xxx GPIO support
+ depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || PPC_85xx ||
PPC_86xx
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
+ help
+ Say Y here if you're going to use hardware that connects to the
+ MPC831x/834x/837x/8572/8610 GPIOs.
+
config PPC_MSI_BITMAP
bool
depends on PCI_MSI
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index b6c269e..55618ba 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
+obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o
obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE)+= tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c
b/arch/powerpc/sysdev/mpc8xxx_gpio.c
new file mode 100644
index 000..103eace
--- /dev/null
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -0,0 +1,171 @@
+/*
+ * GPIOs on MPC8349/8572/8610 and compatible
+ *
+ * Copyright (C) 2008 Peter Korsgaard [EMAIL PROTECTED]
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/spinlock.h
+#include linux/io.h
+#include linux/of.h
+#include linux/of_gpio.h
+#include linux/gpio.h
+
+#define MPC8XXX_GPIO_PINS 32
+
+#define GPIO_DIR 0x00
+#define GPIO_ODR 0x04
+#define GPIO_DAT
Re: [PATCH v2] powerpc: gpio driver for mpc8349/8572/8610 and compatible
Kumar == Kumar Gala [EMAIL PROTECTED] writes: Hi, Kumar Also, any plans to follow this up with .dts updates to add the Kumar GPIO block into the various files we have? Yes, but I wanted to get the driver/dts bindings in the tree first. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc: gpio driver for mpc8349/8572/8610 and compatible
Kumar == Kumar Gala [EMAIL PROTECTED] writes: Kumar On Sep 21, 2008, at 2:46 PM, Peter Korsgaard wrote: +GPIO controllers on MPC8xxx SoCs + +Every GPIO controller node must have #gpio-cells property defined, +this information will be used to translate gpio-specifiers. + Kumar Can we add a comment about this being the non-QE/CPM/GUTs GPIO Kumar support. And maybe a reference to the 8349 as an example of the Kumar controller if unsure about the compatibility. Sure. Kumar Also, does it make sense to have a reference to the top-level generic Kumar GPIO info w/regards to pin specific info, etc.. Ok, I'll add that and resend. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v3] powerpc: gpio driver for mpc8349/8572/8610 and compatible with OF bindings
Structured similar to the existing QE GPIO support.
Signed-off-by: Peter Korsgaard [EMAIL PROTECTED]
---
Changes since v2:
- Clarified documentation as requested by Kumar.
Changes since v1:
Incorporated feedback from Anton and Kumar:
- Core is also used on 8572/8610 so s/83xx/8xxx/
- Use fsl,mpc8572-gpio / fsl,mpc8610-gpio for 85xx/86xx as compatible
- Use shadowed data register to handle open drain outputs
- Expandend dts binding doc, use 8347 as example instead of 8349
- Misc small cleanups
.../powerpc/dts-bindings/fsl/8xxx_gpio.txt | 40 +
arch/powerpc/sysdev/Kconfig|9 +
arch/powerpc/sysdev/Makefile |1 +
arch/powerpc/sysdev/mpc8xxx_gpio.c | 170
4 files changed, 220 insertions(+), 0 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
create mode 100644 arch/powerpc/sysdev/mpc8xxx_gpio.c
diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
new file mode 100644
index 000..26c29c4
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
@@ -0,0 +1,40 @@
+GPIO controllers on MPC8xxx SoCs
+
+This is for the non-QE/CPM/GUTs GPIO controllers as found on
+8349, 8572, 8610 and compatible.
+
+Every GPIO controller node must have #gpio-cells property defined,
+this information will be used to translate gpio-specifiers.
+
+Required properties:
+- compatible : fsl,CHIP-gpio followed by fsl,mpc8349-gpio for
+ 83xx, fsl,mpc8572-gpio for 85xx and fsl,mpc8610-gpio for 86xx.
+- #gpio-cells : Should be two. The first cell is the pin number and the
+ second cell is used to specify optional parameters (currently unused).
+ - interrupts : Interrupt mapping for GPIO IRQ (currently unused).
+ - interrupt-parent : Phandle for the interrupt controller that
+ services interrupts for this device.
+- gpio-controller : Marks the port as GPIO controller.
+
+Example of gpio-controller nodes for a MPC8347 SoC:
+
+ gpio1: [EMAIL PROTECTED] {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8347-gpio, fsl,mpc8349-gpio;
+ reg = 0xc00 0x100;
+ interrupts = 74 0x8;
+ interrupt-parent = ipic;
+ gpio-controller;
+ };
+
+ gpio2: [EMAIL PROTECTED] {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8347-gpio, fsl,mpc8349-gpio;
+ reg = 0xd00 0x100;
+ interrupts = 75 0x8;
+ interrupt-parent = ipic;
+ gpio-controller;
+ };
+
+See booting-without-of.txt for details of how to specify GPIO
+information for devices.
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index 72fb35b..a11cc8f 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@ -6,3 +6,12 @@ config PPC4xx_PCI_EXPRESS
bool
depends on PCI 4xx
default n
+
+config MPC8xxx_GPIO
+ bool MPC8xxx GPIO support
+ depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || PPC_85xx ||
PPC_86xx
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
+ help
+ Say Y here if you're going to use hardware that connects to the
+ MPC831x/834x/837x/8572/8610 GPIOs.
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index a90054b..e410764 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
+obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o
obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE)+= tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c
b/arch/powerpc/sysdev/mpc8xxx_gpio.c
new file mode 100644
index 000..3c1f608
--- /dev/null
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -0,0 +1,170 @@
+/*
+ * GPIOs on MPC8349/8572/8610 and compatible
+ *
+ * Copyright (C) 2008 Peter Korsgaard [EMAIL PROTECTED]
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/spinlock.h
+#include linux/io.h
+#include linux/of.h
+#include linux/of_gpio.h
+#include linux/gpio.h
+
+#define MPC8XXX_GPIO_PINS 32
+
+#define GPIO_DIR 0x00
+#define GPIO_ODR 0x04
+#define GPIO_DAT 0x08
+#define GPIO_IER 0x0c
+#define GPIO_IMR 0x10
+#define GPIO_ICR 0x14
+
+struct mpc8xxx_gpio_chip {
+ struct of_mm_gpio_chip mm_gc;
+ spinlock_t lock;
+
+ /* shadowed data
Re: [PATCH v2] bootwrapper: support u-boot multi component images
Wolfgang == Wolfgang Denk [EMAIL PROTECTED] writes: Hi, Support uImage.platform, which are U-Boot multi component images containing a kernel, dtb and possibly an initrd. Wolfgang NAK. Wolfgang Please do not add such a patch to mainline. I agree that FIT images probably are the way to go for the future, but I do think there's room for uImage.% just like we have cuImage.% for really old uboots. I'm sure a patch adding FIT images support to bootwrapper would be appreciated. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v3] powerpc: gpio driver for mpc8349/8572/8610 and compatible with OF bindings
Anton == Anton Vorontsov [EMAIL PROTECTED] writes:
Anton On Mon, Sep 22, 2008 at 08:32:34AM +0200, Peter Korsgaard wrote:
Structured similar to the existing QE GPIO support.
Signed-off-by: Peter Korsgaard [EMAIL PROTECTED]
Anton Looks good to me, thanks.
Anton Few comments below, might want to consider some of them if you want to.
+ gpio1: [EMAIL PROTECTED] {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8347-gpio, fsl,mpc8349-gpio;
Anton Some quotes are missing. Should be fsl,mpc8347-gpio,
Anton fsl,mpc8349-gpio;
Argh, sorry about that.
+#define GPIO_DIR 0x00
+#define GPIO_ODR 0x04
+#define GPIO_DAT 0x08
+#define GPIO_IER 0x0c
+#define GPIO_IMR 0x10
+#define GPIO_ICR 0x14
Anton This is better described in a struct. Will save few characters,
Anton and just looks nicer. That is,
I think that's basically a question about taste. Some people like
structs, some don't - I prefer the defines as it's very easy to see
exactly what addresses gets used.
+struct mpc8xxx_gpio_chip {
+ struct of_mm_gpio_chip mm_gc;
+ spinlock_t lock;
+
+ /* shadowed data register to be able to clear/set output pins in
+ open drain mode safely */
Anton Why not a canonical comment?
Anton /*
Anton * Multi-line
Anton * comment.
Anton */
Fine with me. It started as a single line comment that I later
expanded on.
+static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
+
+ return !!(in_be32(mm-regs + GPIO_DAT) mpc8xxx_gpio2mask(gpio));
Anton No need for !!. gpio api spec says that you may return any
Anton value != 0 for the logical 1. Negative values are ok.
True.
+static int mpc8xxx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
+ unsigned long flags;
+
+ spin_lock_irqsave(mpc8xxx_gc-lock, flags);
+
+ out_be32(mm-regs + GPIO_DIR,
+in_be32(mm-regs + GPIO_DIR) ~mpc8xxx_gpio2mask(gpio));
Anton Would look better if you'd use clrbits32().
Ok.
+static int __init mpc8xxx_add_controller(struct device_node *np)
+{
Anton You don't check return value for this function. `void' return type
Anton would work.
Yes, I kept it as we already keep track of the return value within the
function (for error reporting) - I'll get rid of it.
I'll send an updated patch shortly.
--
Bye, Peter Korsgaard
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[PATCH v4] powerpc: gpio driver for mpc8349/8572/8610 and compatible
Structured similar to the existing QE GPIO support.
Signed-off-by: Peter Korsgaard [EMAIL PROTECTED]
---
Changes since v3:
- Incorporated feedback from Anton
Changes since v2:
- Clarified documentation as requested by Kumar.
Changes since v1:
Incorporated feedback from Anton and Kumar:
- Core is also used on 8572/8610 so s/83xx/8xxx/
- Use fsl,mpc8572-gpio / fsl,mpc8610-gpio for 85xx/86xx as compatible
- Use shadowed data register to handle open drain outputs
- Expandend dts binding doc, use 8347 as example instead of 8349
- Misc small cleanups
.../powerpc/dts-bindings/fsl/8xxx_gpio.txt | 40 +
arch/powerpc/sysdev/Kconfig|9 +
arch/powerpc/sysdev/Makefile |1 +
arch/powerpc/sysdev/mpc8xxx_gpio.c | 171
4 files changed, 221 insertions(+), 0 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
create mode 100644 arch/powerpc/sysdev/mpc8xxx_gpio.c
diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
new file mode 100644
index 000..d015dce
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
@@ -0,0 +1,40 @@
+GPIO controllers on MPC8xxx SoCs
+
+This is for the non-QE/CPM/GUTs GPIO controllers as found on
+8349, 8572, 8610 and compatible.
+
+Every GPIO controller node must have #gpio-cells property defined,
+this information will be used to translate gpio-specifiers.
+
+Required properties:
+- compatible : fsl,CHIP-gpio followed by fsl,mpc8349-gpio for
+ 83xx, fsl,mpc8572-gpio for 85xx and fsl,mpc8610-gpio for 86xx.
+- #gpio-cells : Should be two. The first cell is the pin number and the
+ second cell is used to specify optional parameters (currently unused).
+ - interrupts : Interrupt mapping for GPIO IRQ (currently unused).
+ - interrupt-parent : Phandle for the interrupt controller that
+ services interrupts for this device.
+- gpio-controller : Marks the port as GPIO controller.
+
+Example of gpio-controller nodes for a MPC8347 SoC:
+
+ gpio1: [EMAIL PROTECTED] {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8347-gpio, fsl,mpc8349-gpio;
+ reg = 0xc00 0x100;
+ interrupts = 74 0x8;
+ interrupt-parent = ipic;
+ gpio-controller;
+ };
+
+ gpio2: [EMAIL PROTECTED] {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8347-gpio, fsl,mpc8349-gpio;
+ reg = 0xd00 0x100;
+ interrupts = 75 0x8;
+ interrupt-parent = ipic;
+ gpio-controller;
+ };
+
+See booting-without-of.txt for details of how to specify GPIO
+information for devices.
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index 72fb35b..a11cc8f 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@ -6,3 +6,12 @@ config PPC4xx_PCI_EXPRESS
bool
depends on PCI 4xx
default n
+
+config MPC8xxx_GPIO
+ bool MPC8xxx GPIO support
+ depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || PPC_85xx ||
PPC_86xx
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
+ help
+ Say Y here if you're going to use hardware that connects to the
+ MPC831x/834x/837x/8572/8610 GPIOs.
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index a90054b..e410764 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
+obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o
obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE)+= tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c
b/arch/powerpc/sysdev/mpc8xxx_gpio.c
new file mode 100644
index 000..103eace
--- /dev/null
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -0,0 +1,171 @@
+/*
+ * GPIOs on MPC8349/8572/8610 and compatible
+ *
+ * Copyright (C) 2008 Peter Korsgaard [EMAIL PROTECTED]
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/spinlock.h
+#include linux/io.h
+#include linux/of.h
+#include linux/of_gpio.h
+#include linux/gpio.h
+
+#define MPC8XXX_GPIO_PINS 32
+
+#define GPIO_DIR 0x00
+#define GPIO_ODR 0x04
+#define GPIO_DAT 0x08
+#define GPIO_IER 0x0c
+#define GPIO_IMR 0x10
+#define GPIO_ICR 0x14
+
+struct mpc8xxx_gpio_chip {
+ struct of_mm_gpio_chip mm_gc
Re: [PATCH] powerpc: gpio driver for mpc831x/834x/837x with OF bindings
Kumar == Kumar Gala [EMAIL PROTECTED] writes: Hi, create mode 100644 arch/powerpc/sysdev/mpc83xx_gpio.c Kumar So we need to make this mpc8xxx_gpio.c 83xx, 8610, 85xx all have the Kumar same GPIO hw. Ok. I'm not really familiar with the other 8xxx SoCs, but from looking at the reference manuals it seems like the following are compatible: 831x, 834x and 837x 8572 (but not the other 85xx) 8610 (but not the other 86xx) Worth noting is also that mpc5121 seems to use a newer version of the core which is basically backwards compatible (It has more IRQ trigger possibilities). I'll respind the patch with 83xx-8xxx - Do you still want to keep the OF bindings like they are? (compatible = fsl,mpc8349-gpio) -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc: implement support for MPC8349-compatible SOC GPIOs
Kumar == Kumar Gala [EMAIL PROTECTED] writes: Hi, Kumar This way the compatiable binding in the code just lists something like Kumar fsl,mpc8349-gpio, fsl,mpc8610-gpio, fsl,mpc8572-gpio. Kumar Does that make sense? Yes, sounds fine - I'll adapt the patch and resend. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v2] powerpc: gpio driver for mpc8349/8572/8610 and compatible
Structured similar to the existing QE GPIO support.
Signed-off-by: Peter Korsgaard [EMAIL PROTECTED]
---
Changes since v1:
Incorporated feedback from Anton and Kumar:
- Core is also used on 8572/8610 so s/83xx/8xxx/
- Use fsl,mpc8572-gpio / fsl,mpc8610-gpio for 85xx/86xx as compatible
- Use shadowed data register to handle open drain outputs
- Expandend dts binding doc, use 8347 as example instead of 8349
- Misc small cleanups
.../powerpc/dts-bindings/fsl/8xxx_gpio.txt | 34
arch/powerpc/sysdev/Kconfig|9 +
arch/powerpc/sysdev/Makefile |1 +
arch/powerpc/sysdev/mpc8xxx_gpio.c | 170
4 files changed, 214 insertions(+), 0 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
create mode 100644 arch/powerpc/sysdev/mpc8xxx_gpio.c
diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
new file mode 100644
index 000..0f3731e
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
@@ -0,0 +1,34 @@
+GPIO controllers on MPC8xxx SoCs
+
+Every GPIO controller node must have #gpio-cells property defined,
+this information will be used to translate gpio-specifiers.
+
+Required properties:
+- compatible : fsl,CHIP-gpio followed by fsl,mpc8349-gpio for
+ 83xx, fsl,mpc8572-gpio for 85xx and fsl,mpc8610-gpio for 86xx.
+- #gpio-cells : Should be two. The first cell is the pin number and the
+ second cell is used to specify optional parameters (currently unused).
+ - interrupts : Interrupt mapping for GPIO IRQ (currently unused).
+ - interrupt-parent : Phandle for the interrupt controller that
+ services interrupts for this device.
+- gpio-controller : Marks the port as GPIO controller.
+
+Example of gpio-controller nodes for a MPC8347 SoC:
+
+ gpio1: [EMAIL PROTECTED] {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8347-gpio, fsl,mpc8349-gpio;
+ reg = 0xc00 0x100;
+ interrupts = 74 0x8;
+ interrupt-parent = ipic;
+ gpio-controller;
+ };
+
+ gpio2: [EMAIL PROTECTED] {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8347-gpio, fsl,mpc8349-gpio;
+ reg = 0xd00 0x100;
+ interrupts = 75 0x8;
+ interrupt-parent = ipic;
+ gpio-controller;
+ };
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index 72fb35b..a11cc8f 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@ -6,3 +6,12 @@ config PPC4xx_PCI_EXPRESS
bool
depends on PCI 4xx
default n
+
+config MPC8xxx_GPIO
+ bool MPC8xxx GPIO support
+ depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || PPC_85xx ||
PPC_86xx
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
+ help
+ Say Y here if you're going to use hardware that connects to the
+ MPC831x/834x/837x/8572/8610 GPIOs.
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index a90054b..e410764 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
+obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o
obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE)+= tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c
b/arch/powerpc/sysdev/mpc8xxx_gpio.c
new file mode 100644
index 000..3c1f608
--- /dev/null
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -0,0 +1,170 @@
+/*
+ * GPIOs on MPC8349/8572/8610 and compatible
+ *
+ * Copyright (C) 2008 Peter Korsgaard [EMAIL PROTECTED]
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/spinlock.h
+#include linux/io.h
+#include linux/of.h
+#include linux/of_gpio.h
+#include linux/gpio.h
+
+#define MPC8XXX_GPIO_PINS 32
+
+#define GPIO_DIR 0x00
+#define GPIO_ODR 0x04
+#define GPIO_DAT 0x08
+#define GPIO_IER 0x0c
+#define GPIO_IMR 0x10
+#define GPIO_ICR 0x14
+
+struct mpc8xxx_gpio_chip {
+ struct of_mm_gpio_chip mm_gc;
+ spinlock_t lock;
+
+ /* shadowed data register to be able to clear/set output pins in
+ open drain mode safely */
+ u32 data;
+};
+
+static inline u32 mpc8xxx_gpio2mask(unsigned int gpio)
+{
+ return 1u (MPC8XXX_GPIO_PINS - 1 - gpio);
+}
+
+static inline struct mpc8xxx_gpio_chip
Re: [PATCH] bootwrapper: support u-boot multi component images
Grant == Grant Likely [EMAIL PROTECTED] writes: Hi, Grant On Mon, Sep 15, 2008 at 08:53:53PM +0200, Peter Korsgaard wrote: + uImage.thinx: U-Boot multi component image. Similar to uImage, Grant Change this to uImage.%: to match the rest of this document. Argh, guess what my platform is called ;) - otheros.bld *.dtb + otheros.bld uImage.* *.dtb Grant Actually, you can probably make this uImage* instead because plain Grant 'uImage' targets are missing from this list. Ok, will do. -miboot|uboot) +miboot|uboot|uboot-*) Grant Similarly, uboot and uboot-* can probably be collapsed to 'uboot*' Yeah, I kept it like this to keep it clear that it doesn't impact the normal uImage support - Will fix. I'll send an updated patch. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v2] bootwrapper: support u-boot multi component images
From: peter Korsgaard [EMAIL PROTECTED]
Support uImage.platform, which are U-Boot multi component images
containing a kernel, dtb and possibly an initrd.
Signed-off-by: Peter Korsgaard [EMAIL PROTECTED]
---
v2: Incorporated Grant Likely's feedback.
Documentation/powerpc/bootwrapper.txt |4
arch/powerpc/boot/Makefile| 11 +--
arch/powerpc/boot/wrapper | 20 +++-
3 files changed, 32 insertions(+), 3 deletions(-)
diff --git a/Documentation/powerpc/bootwrapper.txt
b/Documentation/powerpc/bootwrapper.txt
index d60fced..fa2e014 100644
--- a/Documentation/powerpc/bootwrapper.txt
+++ b/Documentation/powerpc/bootwrapper.txt
@@ -91,6 +91,10 @@ Currently, the following image format targets exist:
a device tree to the kernel at boot. If using an older
version of U-Boot, then you need to use a cuImage
instead.
+ uImage.%: U-Boot multi component image. Similar to uImage,
+ except device tree blob is embedded inside the
+ image together with the kernel (and potentially
+ an initrd).
zImage.%: Image format which does not embed a device tree.
Used by OpenFirmware and other firmware interfaces
which are able to supply a device tree. This image
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 717a3bc..8d2e789 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -282,8 +282,9 @@ image-y += $(subst ,,$(CONFIG_EXTRA_TARGETS))
initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-))
initrd-y := $(patsubst zImage%, zImage.initrd%, \
$(patsubst dtbImage%, dtbImage.initrd%, \
+ $(patsubst uImage.%, uImage.initrd.%, \
$(patsubst simpleImage%, simpleImage.initrd%, \
- $(patsubst treeImage%, treeImage.initrd%, $(image-y)
+ $(patsubst treeImage%, treeImage.initrd%, $(image-y))
initrd-y := $(filter-out $(image-y), $(initrd-y))
targets+= $(image-y) $(initrd-y)
@@ -316,6 +317,12 @@ $(obj)/zImage.iseries: vmlinux
$(obj)/uImage: vmlinux $(wrapperbits)
$(call if_changed,wrap,uboot)
+$(obj)/uImage.initrd.%: vmlinux $(wrapperbits) $(obj)/%.dtb
+ $(call if_changed,wrap,uboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
+
+$(obj)/uImage.%: vmlinux $(wrapperbits) $(obj)/%.dtb
+ $(call if_changed,wrap,uboot-$*,,$(obj)/$*.dtb)
+
$(obj)/cuImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb)
@@ -352,7 +359,7 @@ install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
zImage.iseries zImage.miboot zImage.pmac zImage.pseries \
- otheros.bld *.dtb
+ otheros.bld uImage* *.dtb
# clean up files cached by wrapper
clean-kernel := vmlinux.strip vmlinux.bin
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 965c237..548b087 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -153,7 +153,7 @@ coff)
lds=$object/zImage.coff.lds
link_address='0x50'
;;
-miboot|uboot)
+miboot|uboot*)
# miboot and U-boot want just the bare bits, not an ELF binary
ext=bin
objflags=-O binary
@@ -262,6 +262,24 @@ uboot)
fi
exit 0
;;
+uboot-*)
+rm -f $ofile
+# we always need an initrd - create a dummy initrd if none provided
+if [ ! -f initrd ]; then
+ initrd=$tmpdir/dummy.initrd
+ echo -n fill $initrd
+fi
+mkimage -A ppc -O linux -T multi -C gzip -a $membase -e $membase \
+ $uboot_version -d $vmz:$initrd:$dtb $ofile
+if [ $initrd == $tmpdir/dummy.initrd ]; then
+ rm $initrd;
+fi
+if [ -z $cacheit ]; then
+ rm -f $vmz
+fi
+exit 0
+;;
+
esac
addsec() {
--
1.5.6.3
___
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Re: [PATCH v2] bootwrapper: support u-boot multi component images
Gerhard == Gerhard Pircher [EMAIL PROTECTED] writes: Hi, Support uImage.platform, which are U-Boot multi component images containing a kernel, dtb and possibly an initrd. Gerhard Just out of interest: Do you intend to replace the code for building Gerhard cuImage.platform (zImage target) with this new build target? No, they are for different use cases. cuImages are interesting when you cannot upgrade uboot to add device tree support and you want to use a new kernel - uImage.% is interesting when you want to use device trees but you want the simplicity of having a single file (And you acknowledge the fact that the device tree as it is today is pretty much kernel version dependent so it makes most sense to keep them in sync). -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc: implement support for MPC8349-compatible SOC GPIOs
Anton == Anton Vorontsov [EMAIL PROTECTED] writes: Hi, It seems basically the same as my patch (gpio driver for mpc831x/mpc834x/mpc837x with OF bindings) from September 5th except you don't have any documentation Anton Well, do we really need documentation for every trivial gpio Anton controller? The bindings are the same, only different compatible Anton entries... Well, we need some way of knowing that atleast. Having people grepping through arch/powerpc/boot/dts/ (and knowing that they should look for 8349 even though they might use 8313 or 8610) doesn't seem optimal to me - I take it that's why we created Documentation/powerpc/dts-bindings in the first place? Anton If we do need the documentation for this, I can readily include it. and the Kconfig doesn't depend on 831x/834x/837x. Anton This is purposely. We also need support for 8610, and maybe Anton later we'll find another chip with the same unit. So, to not touch Anton the Kconfig for every new chip I just made it PPC32-wide. Other Anton option is to depend on FSL_SOC, but the driver really does not Anton depend on any fsl_soc stuff... Adding another symbol to the Kconfig once it is verified that a new SoC is compatible doesn't seem like a big deal - Figuring out all the knobs we already have is, without having options for stuff that is known to be irrelevant for the SoC. The other 83xx specific drivers also depend on PPC_83xx. Why do you need this when you have the lock? Anton See this discussion: Anton http://www.mail-archive.com/linuxppc-dev@ozlabs.org/msg12299.html Ahh, for open drain outputs. gpiolib doesn't actually provide an interface to put the gpios in that mode, but it could ofcause have been set up in the bootloader. I'll fix that and send an updated patch. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc: implement support for MPC8349-compatible SOC GPIOs
Anton == Anton Vorontsov [EMAIL PROTECTED] writes:
Hi,
Anton This patch implements GPIOLIB support for MPC8349-compatible SOC GPIOs.
Anton MPC8610 adopted this GPIO unit, so let's place it into sysdev.
Anton We'll need these gpios to support IrDA transceiver on MPC8610HPCD.
It seems basically the same as my patch (gpio driver for
mpc831x/mpc834x/mpc837x with OF bindings) from September 5th except
you don't have any documentation and the Kconfig doesn't depend on
831x/834x/837x.
Galak, did you have time to look at these patches yet?
Anton +struct fsl_gpio_chip {
Anton + struct of_mm_gpio_chip mm_gc;
Anton + spinlock_t lock;
Anton +
Anton + /* shadowed data register to clear/set bits safely */
Anton + u32 gpdat;
Why do you need this when you have the lock?
--
Bye, Peter Korsgaard
___
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[PATCH] bootwrapper: support u-boot multi component images
From: peter Korsgaard [EMAIL PROTECTED]
Support uImage.platform, which are U-Boot multi component images
containing a kernel, dtb and possibly an initrd.
Signed-off-by: Peter Korsgaard [EMAIL PROTECTED]
---
Documentation/powerpc/bootwrapper.txt |4
arch/powerpc/boot/Makefile| 11 +--
arch/powerpc/boot/wrapper | 20 +++-
3 files changed, 32 insertions(+), 3 deletions(-)
diff --git a/Documentation/powerpc/bootwrapper.txt
b/Documentation/powerpc/bootwrapper.txt
index d60fced..f0b34b3 100644
--- a/Documentation/powerpc/bootwrapper.txt
+++ b/Documentation/powerpc/bootwrapper.txt
@@ -91,6 +91,10 @@ Currently, the following image format targets exist:
a device tree to the kernel at boot. If using an older
version of U-Boot, then you need to use a cuImage
instead.
+ uImage.thinx: U-Boot multi component image. Similar to uImage,
+ except device tree blob is embedded inside the
+ image together with the kernel (and potentially
+ an initrd).
zImage.%: Image format which does not embed a device tree.
Used by OpenFirmware and other firmware interfaces
which are able to supply a device tree. This image
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 717a3bc..41ab6aa 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -282,8 +282,9 @@ image-y += $(subst ,,$(CONFIG_EXTRA_TARGETS))
initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-))
initrd-y := $(patsubst zImage%, zImage.initrd%, \
$(patsubst dtbImage%, dtbImage.initrd%, \
+ $(patsubst uImage.%, uImage.initrd.%, \
$(patsubst simpleImage%, simpleImage.initrd%, \
- $(patsubst treeImage%, treeImage.initrd%, $(image-y)
+ $(patsubst treeImage%, treeImage.initrd%, $(image-y))
initrd-y := $(filter-out $(image-y), $(initrd-y))
targets+= $(image-y) $(initrd-y)
@@ -316,6 +317,12 @@ $(obj)/zImage.iseries: vmlinux
$(obj)/uImage: vmlinux $(wrapperbits)
$(call if_changed,wrap,uboot)
+$(obj)/uImage.initrd.%: vmlinux $(wrapperbits) $(obj)/%.dtb
+ $(call if_changed,wrap,uboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
+
+$(obj)/uImage.%: vmlinux $(wrapperbits) $(obj)/%.dtb
+ $(call if_changed,wrap,uboot-$*,,$(obj)/$*.dtb)
+
$(obj)/cuImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb)
@@ -352,7 +359,7 @@ install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
zImage.iseries zImage.miboot zImage.pmac zImage.pseries \
- otheros.bld *.dtb
+ otheros.bld uImage.* *.dtb
# clean up files cached by wrapper
clean-kernel := vmlinux.strip vmlinux.bin
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 965c237..b7c0b23 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -153,7 +153,7 @@ coff)
lds=$object/zImage.coff.lds
link_address='0x50'
;;
-miboot|uboot)
+miboot|uboot|uboot-*)
# miboot and U-boot want just the bare bits, not an ELF binary
ext=bin
objflags=-O binary
@@ -262,6 +262,24 @@ uboot)
fi
exit 0
;;
+uboot-*)
+rm -f $ofile
+# we always need an initrd - create a dummy initrd if none provided
+if [ ! -f initrd ]; then
+ initrd=$tmpdir/dummy.initrd
+ echo -n fill $initrd
+fi
+mkimage -A ppc -O linux -T multi -C gzip -a $membase -e $membase \
+ $uboot_version -d $vmz:$initrd:$dtb $ofile
+if [ $initrd == $tmpdir/dummy.initrd ]; then
+ rm $initrd;
+fi
+if [ -z $cacheit ]; then
+ rm -f $vmz
+fi
+exit 0
+;;
+
esac
addsec() {
--
1.5.6.3
___
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[PATCH] powerpc: gpio driver for mpc831x/834x/837x with OF bindings
Structured similar to the existing QE GPIO support.
Signed-off-by: Peter Korsgaard [EMAIL PROTECTED]
---
.../powerpc/dts-bindings/fsl/83xx_gpio.txt | 33 +
arch/powerpc/sysdev/Kconfig|9 ++
arch/powerpc/sysdev/Makefile |1 +
arch/powerpc/sysdev/mpc83xx_gpio.c | 141
4 files changed, 184 insertions(+), 0 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/fsl/83xx_gpio.txt
create mode 100644 arch/powerpc/sysdev/mpc83xx_gpio.c
diff --git a/Documentation/powerpc/dts-bindings/fsl/83xx_gpio.txt
b/Documentation/powerpc/dts-bindings/fsl/83xx_gpio.txt
new file mode 100644
index 000..f43f048
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/83xx_gpio.txt
@@ -0,0 +1,33 @@
+GPIO controllers on MPC831x/834x/837x SoCs
+
+Every GPIO controller node must have #gpio-cells property defined,
+this information will be used to translate gpio-specifiers.
+
+Required properties:
+- compatible : fsl,mpc8349-gpio
+- #gpio-cells : Should be two. The first cell is the pin number and the
+ second cell is used to specify optional parameters (currently unused).
+ - interrupts : Interrupt mapping for GPIO IRQ (currently unused).
+ - interrupt-parent : Phandle for the interrupt controller that
+ services interrupts for this device.
+- gpio-controller : Marks the port as GPIO controller.
+
+Example of gpio-controller nodes for a MPC8349 SoC:
+
+ gpio1: [EMAIL PROTECTED] {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8349-gpio;
+ reg = 0xc00 0x100;
+ interrupts = 74 0x8;
+ interrupt-parent = ipic;
+ gpio-controller;
+ };
+
+ gpio2: [EMAIL PROTECTED] {
+ #gpio-cells = 2;
+ compatible = fsl,mpc8349-gpio;
+ reg = 0xd00 0x100;
+ interrupts = 75 0x8;
+ interrupt-parent = ipic;
+ gpio-controller;
+ };
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index 72fb35b..d28c3c5 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@ -6,3 +6,12 @@ config PPC4xx_PCI_EXPRESS
bool
depends on PCI 4xx
default n
+
+config MPC83xx_GPIO
+ bool MPC83xx GPIO support
+ depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
+ help
+ Say Y here if you're going to use hardware that connects to the
+ MPC831x/834x/837x GPIOs.
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index a90054b..ced5793 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
+obj-$(CONFIG_MPC83xx_GPIO) += mpc83xx_gpio.o
obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE)+= tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
diff --git a/arch/powerpc/sysdev/mpc83xx_gpio.c
b/arch/powerpc/sysdev/mpc83xx_gpio.c
new file mode 100644
index 000..a8a132d
--- /dev/null
+++ b/arch/powerpc/sysdev/mpc83xx_gpio.c
@@ -0,0 +1,141 @@
+/*
+ * GPIOs on MPC831x/834x/837x
+ *
+ * Copyright (C) 2008 Peter Korsgaard [EMAIL PROTECTED]
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/spinlock.h
+#include linux/io.h
+#include linux/of.h
+#include linux/of_gpio.h
+#include linux/gpio.h
+
+#define GPIO_DIR 0x00
+#define GPIO_ODR 0x04
+#define GPIO_DAT 0x08
+#define GPIO_IER 0x0c
+#define GPIO_IMR 0x10
+#define GPIO_ICR 0x14
+
+struct mpc83xx_gpio_chip {
+ struct of_mm_gpio_chip mm_gc;
+ spinlock_t lock;
+};
+
+static inline struct mpc83xx_gpio_chip *
+to_mpc83xx_gpio_chip(struct of_mm_gpio_chip *mm)
+{
+ return container_of(mm, struct mpc83xx_gpio_chip, mm_gc);
+}
+
+static int mpc83xx_gpio_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
+ u32 bit = 1u (31-gpio);
+
+ return !!(in_be32(mm-regs + GPIO_DAT) bit);
+}
+
+static void mpc83xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
+ struct mpc83xx_gpio_chip *mpc83xx_gc = to_mpc83xx_gpio_chip(mm);
+ unsigned long flags;
+ u32 data, bit = 1u (31-gpio);
+
+ spin_lock_irqsave(mpc83xx_gc-lock, flags);
+
+ data = in_be32(mm-regs + GPIO_DAT);
+ if (val)
+ data |= bit;
+ else
+ data = ~bit
Re: [PATCH] powerpc: gpio driver for mpc831x/834x/837x with OF bindings
Anton == Anton Vorontsov [EMAIL PROTECTED] writes: Anton On Fri, Sep 05, 2008 at 05:08:47PM +0200, Peter Korsgaard wrote: Structured similar to the existing QE GPIO support. Signed-off-by: Peter Korsgaard [EMAIL PROTECTED] --- Anton I posted identical driver in June. ;-) Anton http://ozlabs.org/pipermail/linuxppc-dev/2008-June/057395.html Ahh, I must have missed it back then. Seems like you never got any feedback on it - Now, as we both independently got to ~same result, it must be a good approach ;) Kumar, what do you say? From a quick look, your driver seems to set the data / direction registers in the wrong order in fsl_gpio_dir_out causing a glitch with high level outputs: http://peter.korsgaard.com/patches/uboot/mpc83xx-gpio-level-before-direction.patch (Never seems to have made it to the U-Boot list archive, but it's in git now). -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] spi_mpc83xx: fix clockrate calculation for low speed
Commit a61f5345 (spi_mpc83xx clockrate fixes) broke clockrate
calculation for low speeds. SPMODE_DIV16 should be set if the
divider is higher than 64, not only if the divider gets clipped
to 1024.
Furthermore, the clipping check was off by a factor 16 as well.
Signed-off-by: Peter Korsgaard [EMAIL PROTECTED]
---
drivers/spi/spi_mpc83xx.c | 13 +
1 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index 070c621..ab7ee44 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -267,16 +267,13 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi,
struct spi_transfer *t)
cs-hw_mode |= SPMODE_LEN(bits_per_word);
if ((mpc83xx_spi-spibrg / hz) 64) {
+ cs-hw_mode |= SPMODE_DIV16;
pm = mpc83xx_spi-spibrg / (hz * 64);
if (pm 16) {
- cs-hw_mode |= SPMODE_DIV16;
- pm /= 16;
- if (pm 16) {
- dev_err(spi-dev, Requested speed is too
- low: %d Hz. Will use %d Hz instead.\n,
- hz, mpc83xx_spi-spibrg / 1024);
- pm = 16;
- }
+ dev_err(spi-dev, Requested speed is too
+ low: %d Hz. Will use %d Hz instead.\n,
+ hz, mpc83xx_spi-spibrg / 1024);
+ pm = 16;
}
} else
pm = mpc83xx_spi-spibrg / (hz * 4);
--
1.5.6.3
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Re: [PATCH 1/2] rtc: rtc-ds1374: fix 'no irq' case handling
Anton == Anton Vorontsov [EMAIL PROTECTED] writes: Anton On a PowerPC board with ds1374 RTC I'm getting this error while Anton RTC tries to probe: Anton rtc-ds1374 0-0068: unable to request IRQ Anton This happens because I2C probing code (drivers/of/of_i2c.c) is Anton specifying IRQ0 for 'no irq' case, which is correct. Anton The driver handles this incorrectly, though. This patch fixes it. Great, I was just about to send a similar patch. Another advantage of using 0 for 'no irq' is for I2C_BOARD_INFO(). With that you can simply not assign anything to .irq instead of having to set it to -1. Acked-by: Peter Korsgaard [EMAIL PROTECTED] -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] powerpc: Xilinx: PS2: driver updates based on review
John == John Linn [EMAIL PROTECTED] writes:
Review comments were incorporated to improve the driver.
1. Some data was eliminated that was not needed.
2. Renaming of variables for clarity.
3. Removed unneeded type casting.
4. Changed to use dev_err rather than other I/O.
5. Merged together some functions.
6. Added kerneldoc format to functions.
Signed-off-by: Sadanand [EMAIL PROTECTED]
Signed-off-by: John Linn [EMAIL PROTECTED]
If the minor issues below gets fixed:
Acked-by: Peter Korsgaard [EMAIL PROTECTED]
This patch is an incremental patch to be applied to
[V3] powerpc: Xilinx: PS2: Added new XPS PS2 driver.
drivers/input/serio/xilinx_ps2.c | 220
+
1 files changed, 125 insertions(+), 95 deletions(-)
diff --git a/drivers/input/serio/xilinx_ps2.c
b/drivers/input/serio/xilinx_ps2.c
index e86f11b..eba46c7 100644
--- a/drivers/input/serio/xilinx_ps2.c
+++ b/drivers/input/serio/xilinx_ps2.c
@@ -58,23 +58,20 @@
/* Mask for all the Receive Interrupts */
#define XPS2_IPIXR_RX_ALL (XPS2_IPIXR_RX_OVF | XPS2_IPIXR_RX_ERR | \
-XPS2_IPIXR_RX_FULL)
+ XPS2_IPIXR_RX_FULL)
/* Mask for all the Interrupts */
#define XPS2_IPIXR_ALL (XPS2_IPIXR_TX_ALL | XPS2_IPIXR_RX_ALL
| \
-XPS2_IPIXR_WDT_TOUT)
+ XPS2_IPIXR_WDT_TOUT)
/* Global Interrupt Enable mask */
#define XPS2_GIER_GIE_MASK 0x8000
struct xps2data {
int irq;
-u32 phys_addr;
-u32 remap_size;
spinlock_t lock;
-u8 rxb; /* Rx buffer */
void __iomem *base_address; /* virt. address of control registers */
-unsigned int dfl;
+unsigned int flags;
struct serio serio; /* serio */
};
@@ -82,8 +79,13 @@ struct xps2data {
/* XPS PS/2 data transmission calls */
//
-/*
- * xps2_recv() will attempt to receive a byte of data from the PS/2 port.
+/**
+ * xps2_recv() - attempts to receive a byte from the PS/2 port.
+ * @drvdata:pointer to ps2 device private data structure
+ * @byte: address where the read data will be copied
+ *
+ * If there is any data available in the PS/2 receiver, this functions reads
+ * the data, otherwise it returns error.
*/
static int xps2_recv(struct xps2data *drvdata, u8 *byte)
{
@@ -105,7 +107,7 @@ static int xps2_recv(struct xps2data *drvdata, u8 *byte)
/*/
static irqreturn_t xps2_interrupt(int irq, void *dev_id)
{
-struct xps2data *drvdata = (struct xps2data *)dev_id;
+struct xps2data *drvdata = dev_id;
u32 intr_sr;
u8 c;
int status;
@@ -115,35 +117,28 @@ static irqreturn_t xps2_interrupt(int irq, void
*dev_id)
out_be32(drvdata-base_address + XPS2_IPISR_OFFSET, intr_sr);
/* Check which interrupt is active */
-if (intr_sr XPS2_IPIXR_RX_OVF) {
-printk(KERN_ERR %s: receive overrun error\n,
-drvdata-serio.name);
-}
+if (intr_sr XPS2_IPIXR_RX_OVF)
+dev_err(drvdata-serio.dev.parent, receive overrun error\n);
if (intr_sr XPS2_IPIXR_RX_ERR)
-drvdata-dfl |= SERIO_PARITY;
+drvdata-flags |= SERIO_PARITY;
if (intr_sr (XPS2_IPIXR_TX_NOACK | XPS2_IPIXR_WDT_TOUT))
-drvdata-dfl |= SERIO_TIMEOUT;
+drvdata-flags |= SERIO_TIMEOUT;
if (intr_sr XPS2_IPIXR_RX_FULL) {
-status = xps2_recv(drvdata, drvdata-rxb);
+status = xps2_recv(drvdata, c);
/* Error, if a byte is not received */
if (status) {
-printk(KERN_ERR
-%s: wrong rcvd byte count (%d)\n,
-drvdata-serio.name, status);
+dev_err(drvdata-serio.dev.parent,
+wrong rcvd byte count\n);
You used to print the byte count - Isn't that interesting debugging
data?
} else {
-c = drvdata-rxb;
-serio_interrupt(drvdata-serio, c, drvdata-dfl);
-drvdata-dfl = 0;
+serio_interrupt(drvdata-serio, c, drvdata-flags);
+drvdata-flags = 0;
}
}
-if (intr_sr XPS2_IPIXR_TX_ACK)
-drvdata-dfl = 0;
-
return IRQ_HANDLED;
}
@@ -151,8 +146,15 @@ static irqreturn_t xps2_interrupt(int irq, void *dev_id)
/* serio callbacks */
/***/
-/*
- * sxps2_write() sends a byte out through the PS/2 interface.
+/**
+ * sxps2_write() - sends a byte out through the PS/2 port.
+ * @pserio: pointer to the serio structure of the PS/2 port
+ * @c: data
Re: [PATCH] [V3] powerpc: Xilinx: PS2: Added new XPS PS2 driver
)
+{
+of_unregister_platform_driver(xps2_of_driver);
+}
+
+module_init(xps2_init);
+module_exit(xps2_cleanup);
+
+MODULE_AUTHOR(Xilinx, Inc.);
+MODULE_DESCRIPTION(Xilinx XPS PS/2 driver);
+MODULE_LICENSE(GPL);
+
--
1.5.2.1
--
Bye, Peter Korsgaard
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Re: [PATCH] powerpc: Xilinx: PS2: Added new XPS PS2 driver
John == John Linn [EMAIL PROTECTED] writes:
Added a new driver for Xilinx XPS PS2 IP. This driver is
a flat driver to better match the Linux driver pattern.
This should probably go to the linux-input@ list as well.
Signed-off-by: Sadanand [EMAIL PROTECTED]
Signed-off-by: John Linn [EMAIL PROTECTED]
---
drivers/input/serio/Kconfig |5 +
drivers/input/serio/Makefile |1 +
drivers/input/serio/xilinx_ps2.c | 464
++
drivers/input/serio/xilinx_ps2.h | 97
4 files changed, 567 insertions(+), 0 deletions(-)
create mode 100644 drivers/input/serio/xilinx_ps2.c
create mode 100644 drivers/input/serio/xilinx_ps2.h
diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
index ec4b661..0e62b39 100644
--- a/drivers/input/serio/Kconfig
+++ b/drivers/input/serio/Kconfig
@@ -190,4 +190,9 @@ config SERIO_RAW
To compile this driver as a module, choose M here: the
module will be called serio_raw.
+config SERIO_XILINX_XPS_PS2
+tristate Xilinx XPS PS/2 Controller Support
+help
+ This driver supports XPS PS/2 IP from Xilinx EDK.
+
endif
diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile
index 38b8868..9b6c813 100644
--- a/drivers/input/serio/Makefile
+++ b/drivers/input/serio/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_SERIO_PCIPS2) += pcips2.o
obj-$(CONFIG_SERIO_MACEPS2) += maceps2.o
obj-$(CONFIG_SERIO_LIBPS2) += libps2.o
obj-$(CONFIG_SERIO_RAW) += serio_raw.o
+obj-$(CONFIG_SERIO_XILINX_XPS_PS2) += xilinx_ps2.o
diff --git a/drivers/input/serio/xilinx_ps2.c
b/drivers/input/serio/xilinx_ps2.c
new file mode 100644
index 000..670d47f
--- /dev/null
+++ b/drivers/input/serio/xilinx_ps2.c
@@ -0,0 +1,464 @@
+/*
+ * xilinx_ps2.c
+ *
+ * Xilinx PS/2 driver to interface PS/2 component to Linux
+ *
+ * Author: MontaVista Software, Inc.
+ * [EMAIL PROTECTED]
+ *
+ * (c) 2005 MontaVista Software, Inc.
+ * (c) 2008 Xilinx Inc.
+ *
Is the montavista stuff still valid?
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include linux/module.h
+#include linux/serio.h
+#include linux/interrupt.h
+#include linux/errno.h
+#include linux/init.h
+#include linux/list.h
+#include asm/io.h
linux/io.h please.
+
+#ifdef CONFIG_OF/* For open firmware */
Why support !CONFIG_OF?
+ #include linux/of_device.h
+ #include linux/of_platform.h
+#endif /* CONFIG_OF */
+
+#include xilinx_ps2.h
Why the seperate header? You're the only user of it, right?
+
+#define DRIVER_NAME xilinx_ps2
+#define DRIVER_DESCRIPTION Xilinx XPS PS/2 driver
+
+#define XPS2_NAME_DESC Xilinx XPS PS/2 Port #%d
+#define XPS2_PHYS_DESC xilinxps2/serio%d
Why have defines to stuff only used once?
...
+
+/**/
+/* The platform device driver */
+/**/
+
+static int xps2_probe(struct device *dev)
__devinit please.
+{
+struct platform_device *pdev = to_platform_device(dev);
+
+struct resource *irq_res = NULL;/* Interrupt resources */
+struct resource *regs_res = NULL; /* IO mem resources */
+
+if (!dev) {
+dev_err(dev, Probe called with NULL param\n);
+return -EINVAL;
+}
+
+/* Find irq number, map the control registers in */
+irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+return xps2_setup(dev, pdev-id, regs_res, irq_res);
+}
...
+
+/*
+ * xps2_remove() dissociates the driver with the Xilinx PS/2 device.
+ */
+static int xps2_remove(struct device *dev)
__devexit please.
+{
+struct xps2data *drvdata;
+
+if (!dev)
+return -EINVAL;
+
+drvdata = (struct xps2data *)dev_get_drvdata(dev);
+
+serio_unregister_port(drvdata-serio);
+
+iounmap(drvdata-base_address);
+
+release_mem_region(drvdata-phys_addr, drvdata-remap_size);
+
+kfree(drvdata);
+dev_set_drvdata(dev, NULL);
+
+return 0; /* success */
+}
+
+static struct device_driver xps2_driver = {
Please use a real struct platform_driver instead.
+.name = DRIVER_NAME,
+.bus = platform_bus_type,
+.probe = xps2_probe,
+.remove = xps2_remove
+};
+
--
Bye, Peter Korsgaard
Re: [PATCH] [V2] powerpc: Xilinx: PS2: Added new XPS PS2 driver
John == John Linn [EMAIL PROTECTED] writes: John Added a new driver for Xilinx XPS PS2 IP. This driver is John a flat driver to better match the Linux driver pattern. John Signed-off-by: Sadanand [EMAIL PROTECTED] John Signed-off-by: John Linn [EMAIL PROTECTED] John --- John V2 John Changes from v1: John Ran the scripts/checkpatch.pl on the patch as I should have done John before sending it (thanks to Stephen). What about my comments? -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 60/60] microblaze_v4: Enable drivers for Microblaze
monstr == monstr [EMAIL PROTECTED] writes: monstr From: Michal Simek [EMAIL PROTECTED] monstr Signed-off-by: Michal Simek [EMAIL PROTECTED] Acked-by: Peter Korsgaard [EMAIL PROTECTED] monstr config SERIAL_UARTLITE monstrtristate Xilinx uartlite serial port support monstr - depends on PPC32 monstr + depends on PPC32 || MICROBLAZE monstrselect SERIAL_CORE monstrhelp -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] [RFC] powerpc: Xilinx: adding virtex5 powerpc 440 support
John == John Linn [EMAIL PROTECTED] writes: Hi John, +config PPC_FPU + depends on XILINX_VIRTEX_5_FXT + bool Enable Xilinx Soft FPU + help +This option enables the Xilinx Soft FPU attached to the APU +interface of the PPC440 (requires DP_FULL FPU pcore). There is already a PPC_FPU option in platforms/Kconfig.cputype Is the Xilinx soft FPU compatible with the normal powerpc FPU? -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] [RFC] powerpc: Xilinx: adding virtex5 powerpc 440 support
John == John Linn [EMAIL PROTECTED] writes: John Yes it is compatible with the normal powerpc FPU. Ahh, great - That didn't used to be the case with the earlier fpu stuff afaik. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[patch v11 0/4] Cypress c67x00 (EZ-Host/EZ-OTG) support
The Cypress c67x00 (EZ-Host/EZ-OTG) controllers are multi-role low/fullspeed
USB controllers. This patch series implements a HCD driver and shows the
work-in-progress status of a gadget driver.
I believe patch 1..3 are ready, and I would like to see them queued up for
mainline.
Changes since v10:
- Rebased against mainline, platform driver MODULE_ALIAS, checkpatch fixes
- Gadget driver accesses hw directly instead of using BIOS and working around
it's limitations. Still not merge ready though.
Changes since v9:
- Put Kconfig in alphabetical order, use ccflags-$(CONFIG_USB_DEBUG)
(feedback from David)
Changes since v8:
- checkpatch.pl fixes (__FUNCTION__ - __func__, indent)
Changes since v7:
- Moved dummy hcd probe/remove functions for conditional hcd support into
udc patch.
- Moved usb_disabled() check into c67x00_hcd_probe().
- Moved c67x00_get_comm_reg() to udc patch as it is only needed for gadget
support.
Changes since v6:
- Addressed David and Alan's comments (removed done list + tasklet)
Changes since v5:
- Merged c67x00_ll_{get,set}_siemsg() into c67x00_ll_fetch_siemsg().
- Fix for interrupt race condition at probe time (reported by Grant)
Changes since v4:
- Addressed Grant's comments (c67x00_dev-c67x00_hcd_dev, label indent)
- Moved c67x00_ll_set_ep_{ctrl,packet_size}_reg() to patch 4 as they are
only needed for gadget support.
Changes since v3:
- Lots of cleanups: checkpatch, interrupt handling, c67x00_ prefixes, ..
- The dummy platform_device's created per serial engine are gone.
- Gadget driver (WIP)
--
Bye, Peter Korsgaard
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[patch v11 2/4] USB: add Cypress c67x00 OTG controller core driver
This patch add the core driver for the c67x00 USB OTG controller. The core
driver is responsible for the platform bus binding and creating either
USB HCD or USB Gadget instances for each of the serial interface engines
on the chip.
This driver does not directly implement the HCD or gadget behaviours; it
just controls access to the chip.
Signed-off-by: Peter Korsgaard [EMAIL PROTECTED]
Acked-by: David Brownell [EMAIL PROTECTED]
---
MAINTAINERS |6 +
drivers/usb/c67x00/c67x00-drv.c | 230
include/linux/usb/c67x00.h | 48
3 files changed, 284 insertions(+)
Index: linux-2.6/drivers/usb/c67x00/c67x00-drv.c
===
--- /dev/null
+++ linux-2.6/drivers/usb/c67x00/c67x00-drv.c
@@ -0,0 +1,230 @@
+/*
+ * c67x00-drv.c: Cypress C67X00 USB Common infrastructure
+ *
+ * Copyright (C) 2006-2008 Barco N.V.
+ *Derived from the Cypress cy7c67200/300 ezusb linux driver and
+ *based on multiple host controller drivers inside the linux kernel.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA.
+ */
+
+/*
+ * This file implements the common infrastructure for using the c67x00.
+ * It is both the link between the platform configuration and subdrivers and
+ * the link between the common hardware parts and the subdrivers (e.g.
+ * interrupt handling).
+ *
+ * The c67x00 has 2 SIE's (serial interface engine) wich can be configured
+ * to be host, device or OTG (with some limitations, E.G. only SIE1 can be
OTG).
+ *
+ * Depending on the platform configuration, the SIE's are created and
+ * the corresponding subdriver is initialized (c67x00_probe_sie).
+ */
+
+#include linux/device.h
+#include linux/io.h
+#include linux/list.h
+#include linux/usb.h
+#include linux/usb/c67x00.h
+
+#include c67x00.h
+
+static void c67x00_probe_sie(struct c67x00_sie *sie,
+struct c67x00_device *dev, int sie_num)
+{
+ spin_lock_init(sie-lock);
+ sie-dev = dev;
+ sie-sie_num = sie_num;
+ sie-mode = c67x00_sie_config(dev-pdata-sie_config, sie_num);
+
+ switch (sie-mode) {
+ case C67X00_SIE_UNUSED:
+ dev_info(sie_dev(sie),
+Not using SIE %d as requested\n, sie-sie_num);
+ break;
+
+ default:
+ dev_err(sie_dev(sie),
+ Unsupported configuration: 0x%x for SIE %d\n,
+ sie-mode, sie-sie_num);
+ break;
+ }
+}
+
+static void c67x00_remove_sie(struct c67x00_sie *sie)
+{
+}
+
+static irqreturn_t c67x00_irq(int irq, void *__dev)
+{
+ struct c67x00_device *c67x00 = __dev;
+ struct c67x00_sie *sie;
+ u16 msg, int_status;
+ int i, count = 8;
+
+ int_status = c67x00_ll_hpi_status(c67x00);
+ if (!int_status)
+ return IRQ_NONE;
+
+ while (int_status != 0 (count-- = 0)) {
+ c67x00_ll_irq(c67x00, int_status);
+ for (i = 0; i C67X00_SIES; i++) {
+ sie = c67x00-sie[i];
+ msg = 0;
+ if (int_status SIEMSG_FLG(i))
+ msg = c67x00_ll_fetch_siemsg(c67x00, i);
+ if (sie-irq)
+ sie-irq(sie, int_status, msg);
+ }
+ int_status = c67x00_ll_hpi_status(c67x00);
+ }
+
+ if (int_status)
+ dev_warn(c67x00-pdev-dev, Not all interrupts handled!
+status = 0x%04x\n, int_status);
+
+ return IRQ_HANDLED;
+}
+
+/* - */
+
+static int __devinit c67x00_drv_probe(struct platform_device *pdev)
+{
+ struct c67x00_device *c67x00;
+ struct c67x00_platform_data *pdata;
+ struct resource *res, *res2;
+ int ret, i;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -ENODEV;
+
+ res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!res2)
+ return -ENODEV;
+
+ pdata = pdev-dev.platform_data;
+ if (!pdata)
+ return -ENODEV;
+
+ c67x00 = kzalloc(sizeof(*c67x00
[patch v11 1/4] USB: add Cypress c67x00 low level interface code
This patch adds the low level support code for the Cypress c67x00 family of OTG controllers. The low level code is responsible for register access and implements the software protocol for communicating with the 16bit microcontroller inside the c67x00 device. Communication is done over the HPI interface (16bit SRAM-like parallel bus). Signed-off-by: Peter Korsgaard [EMAIL PROTECTED] Acked-by: David Brownell [EMAIL PROTECTED] --- drivers/usb/c67x00/c67x00-ll-hpi.c | 405 + drivers/usb/c67x00/c67x00.h| 285 ++ 2 files changed, 690 insertions(+) Index: linux-2.6/drivers/usb/c67x00/c67x00.h === --- /dev/null +++ linux-2.6/drivers/usb/c67x00/c67x00.h @@ -0,0 +1,285 @@ +/* + * c67x00.h: Cypress C67X00 USB register and field definitions + * + * Copyright (C) 2006-2008 Barco N.V. + *Derived from the Cypress cy7c67200/300 ezusb linux driver and + *based on multiple host controller drivers inside the linux kernel. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA. + */ + +#ifndef _USB_C67X00_H +#define _USB_C67X00_H + +#include linux/spinlock.h +#include linux/platform_device.h +#include linux/completion.h +#include linux/mutex.h + +/* - + * Cypress C67x00 register definitions + */ + +/* Hardware Revision Register */ +#define HW_REV_REG 0xC004 + +/* General USB registers */ +/* = */ + +/* USB Control Register */ +#define USB_CTL_REG(x) ((x) ? 0xC0AA : 0xC08A) + +#define LOW_SPEED_PORT(x) ((x) ? 0x0800 : 0x0400) +#define HOST_MODE 0x0200 +#define PORT_RES_EN(x) ((x) ? 0x0100 : 0x0080) +#define SOF_EOP_EN(x) ((x) ? 0x0002 : 0x0001) + +/* USB status register - Notice it has different content in hcd/udc mode */ +#define USB_STAT_REG(x)((x) ? 0xC0B0 : 0xC090) + +#define EP0_IRQ_FLG0x0001 +#define EP1_IRQ_FLG0x0002 +#define EP2_IRQ_FLG0x0004 +#define EP3_IRQ_FLG0x0008 +#define EP4_IRQ_FLG0x0010 +#define EP5_IRQ_FLG0x0020 +#define EP6_IRQ_FLG0x0040 +#define EP7_IRQ_FLG0x0080 +#define RESET_IRQ_FLG 0x0100 +#define SOF_EOP_IRQ_FLG0x0200 +#define ID_IRQ_FLG 0x4000 +#define VBUS_IRQ_FLG 0x8000 + +/* USB Host only registers */ +/* === */ + +/* Host n Control Register */ +#define HOST_CTL_REG(x)((x) ? 0xC0A0 : 0xC080) + +#define PREAMBLE_EN0x0080 /* Preamble enable */ +#define SEQ_SEL0x0040 /* Data Toggle Sequence Bit Select */ +#define ISO_EN 0x0010 /* Isochronous enable */ +#define ARM_EN 0x0001 /* Arm operation */ + +/* Host n Interrupt Enable Register */ +#define HOST_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C) + +#define SOF_EOP_IRQ_EN 0x0200 /* SOF/EOP Interrupt Enable */ +#define SOF_EOP_TMOUT_IRQ_EN 0x0800 /* SOF/EOP Timeout Interrupt Enable */ +#define ID_IRQ_EN 0x4000 /* ID interrupt enable */ +#define VBUS_IRQ_EN0x8000 /* VBUS interrupt enable */ +#define DONE_IRQ_EN0x0001 /* Done Interrupt Enable */ + +/* USB status register */ +#define HOST_STAT_MASK 0x02FD +#define PORT_CONNECT_CHANGE(x) ((x) ? 0x0020 : 0x0010) +#define PORT_SE0_STATUS(x) ((x) ? 0x0008 : 0x0004) + +/* Host Frame Register */ +#define HOST_FRAME_REG(x) ((x) ? 0xC0B6 : 0xC096) + +#define HOST_FRAME_MASK0x07FF + +/* USB Peripheral only registers */ +/* = */ + +/* Device n Port Sel reg */ +#define DEVICE_N_PORT_SEL(x) ((x) ? 0xC0A4 : 0xC084) + +/* Device n Interrupt Enable Register */ +#define DEVICE_N_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C) + +#define DEVICE_N_ENDPOINT_N_CTL_REG(dev, ep) ((dev) \ +? (0x0280 + (ep 4)) \ +: (0x0200 + (ep 4))) +#define DEVICE_N_ENDPOINT_N_STAT_REG(dev, ep) ((dev) \ +? (0x0286 + (ep 4
