[PATCH 1/1 v2] AMCC PPC 460SX redwood SoC platform initial framework
From: Madhulika Madishetty mmadishe...@amcc.com
This patch contains initial framework for the AMCC Redwood board.
Signed-off-by: Madhulika Madishetty mmadishe...@amcc.com
Signed-off-by: Tirumala Marri tma...@amcc.com
Signed-off-by: Feng Kan f...@amcc.com
Signed-off-by: Vidhyananth Venkatasamy vvenkatas...@amcc.com
Signed-off-by: Preetesh Parekh ppar...@amcc.com
Acked-by: Loc Ho l...@amcc.com
Acked-by: Feng Kan f...@amcc.com
---
arch/powerpc/boot/dts/redwood.dts | 245 ++
arch/powerpc/configs/44x/redwood_defconfig | 1174
arch/powerpc/kernel/cpu_setup_44x.S|1 +
arch/powerpc/kernel/cputable.c | 13 +
arch/powerpc/platforms/44x/Kconfig | 19 +
arch/powerpc/platforms/44x/ppc44x_simple.c |1 +
6 files changed, 1453 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/redwood.dts
create mode 100644 arch/powerpc/configs/44x/redwood_defconfig
diff --git a/arch/powerpc/boot/dts/redwood.dts
b/arch/powerpc/boot/dts/redwood.dts
new file mode 100644
index 000..1c525ee
--- /dev/null
+++ b/arch/powerpc/boot/dts/redwood.dts
@@ -0,0 +1,245 @@
+/*
+ * Device Tree Source for AMCC Redwood(460SX)
+ *
+ * Copyright 2008 AMCC tma...@amcc.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed as is without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = 2;
+ #size-cells = 1;
+ model = amcc,redwood;
+ compatible = amcc,redwood;
+ dcr-parent = {/cpus/c...@0};
+
+ aliases {
+ ethernet0 = EMAC0;
+ serial0 = UART0;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ c...@0 {
+ device_type = cpu;
+ model = PowerPC,460SX;
+ reg = 0x;
+ clock-frequency = 0; /* Filled in by U-Boot */
+ timebase-frequency = 0; /* Filled in by U-Boot */
+ i-cache-line-size = 32;
+ d-cache-line-size = 32;
+ i-cache-size = 32768;
+ d-cache-size = 32768;
+ dcr-controller;
+ dcr-access-method = native;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x 0x 0x; /* Filled in by
U-Boot */
+ };
+
+ UIC0: interrupt-controller0 {
+ compatible = ibm,uic-460sx,ibm,uic;
+ interrupt-controller;
+ cell-index = 0;
+ dcr-reg = 0x0c0 0x009;
+ #address-cells = 0;
+ #size-cells = 0;
+ #interrupt-cells = 2;
+ };
+
+ UIC1: interrupt-controller1 {
+ compatible = ibm,uic-460sx,ibm,uic;
+ interrupt-controller;
+ cell-index = 1;
+ dcr-reg = 0x0d0 0x009;
+ #address-cells = 0;
+ #size-cells = 0;
+ #interrupt-cells = 2;
+ interrupts = 0x1e 0x4 0x1f 0x4; /* cascade */
+ interrupt-parent = UIC0;
+ };
+
+ UIC2: interrupt-controller2 {
+ compatible = ibm,uic-460sx,ibm,uic;
+ interrupt-controller;
+ cell-index = 2;
+ dcr-reg = 0x0e0 0x009;
+ #address-cells = 0;
+ #size-cells = 0;
+ #interrupt-cells = 2;
+ interrupts = 0xa 0x4 0xb 0x4; /* cascade */
+ interrupt-parent = UIC0;
+ };
+
+ UIC3: interrupt-controller3 {
+ compatible = ibm,uic-460sx,ibm,uic;
+ interrupt-controller;
+ cell-index = 3;
+ dcr-reg = 0x0f0 0x009;
+ #address-cells = 0;
+ #size-cells = 0;
+ #interrupt-cells = 2;
+ interrupts = 0x10 0x4 0x11 0x4; /* cascade */
+ interrupt-parent = UIC0;
+ };
+
+ SDR0: sdr {
+ compatible = ibm,sdr-460sx;
+ dcr-reg = 0x00e 0x002;
+ };
+
+ CPR0: cpr {
+ compatible = ibm,cpr-460sx;
+ dcr-reg = 0x00c 0x002;
+ };
+
+ plb {
+ compatible = ibm,plb-460sx, ibm,plb4;
+ #address-cells = 2;
+ #size-cells = 1;
+ ranges;
+ clock-frequency = 0; /* Filled in by U-Boot */
+
+ SDRAM0: sdram {
+ compatible = ibm,sdram-460sx, ibm,sdram-405gp;
+ dcr-reg = 0x010 0x002;
+ };
+
+ MAL0: mcmal {
+ compatible = ibm,mcmal-460sx, ibm,mcmal2;
+ dcr-reg = 0x180 0x62;
+ num-tx-chans = 4;
+
[PATCH] Add_460SX_Initial_Framework
From: Madhulika Madishetty [EMAIL PROTECTED]
This patch contains the initial framework for AMCC Redwood board.
Signed-off-by: Madhulika Madishetty [EMAIL PROTECTED], Tirumala Reddy
Marri [EMAIL PROTECTED],
Feng Kan [EMAIL PROTECTED], Vidhyananth Venkatasamy [EMAIL PROTECTED],
Preetesh Parekh [EMAIL PROTECTED]
Acked-by: Loc Ho [EMAIL PROTECTED], Feng Kan [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/redwood_amcc.dts | 247 +++
arch/powerpc/configs/44x/redwood_defconfig | 1082
arch/powerpc/kernel/cpu_setup_44x.S|2 +
arch/powerpc/kernel/cputable.c | 13 +
arch/powerpc/platforms/44x/Kconfig | 22 +-
arch/powerpc/platforms/44x/Makefile|1 +
arch/powerpc/platforms/44x/ppc44x_simple.c |2 +
arch/powerpc/platforms/44x/redwood.c | 103 +++
8 files changed, 1470 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/boot/dts/redwood_amcc.dts
create mode 100644 arch/powerpc/configs/44x/redwood_defconfig
create mode 100644 arch/powerpc/platforms/44x/redwood.c
diff --git a/arch/powerpc/boot/dts/redwood_amcc.dts
b/arch/powerpc/boot/dts/redwood_amcc.dts
new file mode 100644
index 000..e4f5efd
--- /dev/null
+++ b/arch/powerpc/boot/dts/redwood_amcc.dts
@@ -0,0 +1,247 @@
+/*
+ * Device Tree Source for AMCC Redwood(460SX)
+ *
+ * Copyright 2008 AMCC [EMAIL PROTECTED]
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed as is without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = 2;
+ #size-cells = 1;
+ model = amcc,redwood;
+ compatible = amcc,redwood;
+ dcr-parent = /cpus/[EMAIL PROTECTED];
+
+ aliases {
+ ethernet0 = EMAC0;
+ serial0 = UART0;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ [EMAIL PROTECTED] {
+ device_type = cpu;
+ model = PowerPC,460SX;
+ reg = 0;
+ clock-frequency = 0; /* Filled in by U-Boot */
+ timebase-frequency = 0; /* Filled in by U-Boot */
+ i-cache-line-size = 20;
+ d-cache-line-size = 20;
+ i-cache-size = 8000;
+ d-cache-size = 8000;
+ dcr-controller;
+ dcr-access-method = native;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0 0 0; /* Filled in by U-Boot */
+ };
+
+ UIC0: interrupt-controller0 {
+ compatible = ibm,uic-460sx,ibm,uic;
+ interrupt-controller;
+ cell-index = 0;
+ dcr-reg = 0c0 009;
+ #address-cells = 0;
+ #size-cells = 0;
+ #interrupt-cells = 2;
+ };
+
+ UIC1: interrupt-controller1 {
+ compatible = ibm,uic-460sx,ibm,uic;
+ interrupt-controller;
+ cell-index = 1;
+ dcr-reg = 0d0 009;
+ #address-cells = 0;
+ #size-cells = 0;
+ #interrupt-cells = 2;
+ interrupts = 1e 4 1f 4; /* cascade */
+ interrupt-parent = UIC0;
+ };
+
+ UIC2: interrupt-controller2 {
+ compatible = ibm,uic-460sx,ibm,uic;
+ interrupt-controller;
+ cell-index = 2;
+ dcr-reg = 0e0 009;
+ #address-cells = 0;
+ #size-cells = 0;
+ #interrupt-cells = 2;
+ interrupts = a 4 b 4; /* cascade */
+ interrupt-parent = UIC0;
+ };
+
+ UIC3: interrupt-controller3 {
+ compatible = ibm,uic-460sx,ibm,uic;
+ interrupt-controller;
+ cell-index = 3;
+ dcr-reg = 0f0 009;
+ #address-cells = 0;
+ #size-cells = 0;
+ #interrupt-cells = 2;
+ interrupts = 10 4 11 4; /* cascade */
+ interrupt-parent = UIC0;
+ };
+
+ SDR0: sdr {
+ compatible = ibm,sdr-460sx;
+ dcr-reg = 00e 002;
+ };
+
+ CPR0: cpr {
+ compatible = ibm,cpr-460sx;
+ dcr-reg = 00c 002;
+ };
+ plb {
+ compatible = ibm,plb-460sx, ibm,plb4;
+ #address-cells = 2;
+ #size-cells = 1;
+ ranges;
+ clock-frequency = 0; /* Filled in by U-Boot */
+
+ SDRAM0: sdram {
+ compatible = ibm,sdram-460sx, ibm,sdram-405gp;
+ dcr-reg = 010 2;
+ };
+
+ MAL0: mcmal {
+ compatible = ibm,mcmal-460sx, ibm,mcmal2;
+ dcr-reg = 180 62;
+
