PowerPC Linux PCI ethernet device Probe Error

2008-05-16 Thread mohit_kumar

Hi 
We are using PowerPC Port of Linux 2.6 kernel.
The processor architecture is PPC440EPx and the PCI card is Intel PRO PCI
Adapter card.

e100_probe: Cannot find proper PCI device base address, aborting

If I use linux shell command,lspci -vv
It shows:
lspci -vv
00:0c.0 Class 0200: 8086:1229 (rev 0c)
Subsystem: 8086:0040
Interrupt: pin A routed to IRQ 67
Region 1: I/O ports at unassigned [disabled]
Capabilities: [dc] Power Management version 2

It seems Linux can detect PCI device,Read Configuration Space like
Vendor id, Device Id, Class Id  but others Registers like Device Control,
Interrupt Line, Cache Line Size,
latency Timer and Base Address Registers are not being updated even software
is
writing some values to them . Please give me some idea to resolve
the pci access problem...feel free to ask information i missed to mention
anything important...
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eth0: WakeUp interrupt ! (PPC 405EP board)

2008-05-16 Thread Albert David
Dear Friends,
we have a custom board based on PPC405EP processor, this design is
based on bubinga reference board.
we have ported u-boot 1.4 and linux kernel 2.4.32 - this design is
already in production for several months
recently, on few boards we started seeing eth0: WakeUp interrupt !
message while linux bootup(to be specific when ethernet driver is
loaded). but this problem is sort of intermittant in nature, out of 5
reboots, once or twice eth0: WakeUp interrupt ! keeps printing on
terminal without proceeding any further

can anyone give me a direction why this happens?
Thanks for your support,
Albert.


following is the boot message from my target board,


U-Boot 1.1.4.1.4 (Dec  5 2007 - 17:22:12)

CPU:   AMCC PowerPC 405EP Rev. B at 266.666 MHz (PLB=133, OPB=66, EBC=33 MHz)
   I2C boot EEPROM disabled
   16 kB I-Cache 16 kB D-Cache
Board: ### No HW ID - assuming PICO4
I2C:   ready
DRAM:  32 MB
FLASH: 16 MB
Hit any key to stop autoboot:  0
00fd: fd.

## Checking Image at ff00 ...
   Bad Magic Number
## Booting image at ff96 ...
   Image Name:   GH2(PICO4) ukernel V-2.4.32-2.6
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:789480 Bytes = 771 kB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
## Loading RAMDisk Image at ffc0 ...
   Image Name:   GH2(PICO4) uramdisk V-2.4.32
   Image Type:   PowerPC Linux RAMDisk Image (gzip compressed)
   Data Size:1640575 Bytes =  1.6 MB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... OK
   Loading Ramdisk to 01dae000, end 01f3e87f ... OK
id mach(): done
MMU:enter
MMU:hw init
MMU:mapin
MMU:mapin_ram done
MMU:setio
MMU:exit
setup_arch: enter
setup_arch: bootmem
setup_arch: ocp_early_init
arch: exit
Linux version 2.4.32-2.6 ([EMAIL PROTECTED]) (gcc version 3.4.2) #7
Mon Feb 12 17:31:12 IST 2007
Pico4 Barco
On node 0 totalpages: 8192
zone(0): 8192 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/ram rw
ip=192.168.1.144:192.168.1.128:192.168.1.1:255.255.255.0::eth0:off
panic=1 console=ttyS0,115200
Calibrating delay loop... 266.24 BogoMIPS
Memory: 28968k available (1352k kernel code, 388k data, 64k init, 0k highmem)
Dentry cache hash table entries: 4096 (order: 3, 32768 bytes)
Inode cache hash table entries: 2048 (order: 2, 16384 bytes)
Mount cache hash table entries: 512 (order: 0, 4096 bytes)
Buffer cache hash table entries: 1024 (order: 0, 4096 bytes)
Page-cache hash table entries: 8192 (order: 3, 32768 bytes)
POSIX conformance testing by UNIFIX

Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
JFFS2 version 2.2. (NAND) (C) 2001-2003 Red Hat, Inc.
Squashfs 2.2-r2 (released 2005/09/08) (C) 2002-2005 Phillip Lougher
i2c-core.o: i2c core module version 2.6.1 (20010830)
i2c-dev.o: i2c /dev entries driver module version 2.6.1 (20010830)
i2c-algo-bit.o: i2c bit algorithm module
i2c-proc.o version 2.6.1 (20010830)
pty: 256 Unix98 ptys configured
Serial driver version 5.05c (2001-07-08) with no serial options enabled
ttyS00 at 0xef600300 (irq = 0) is a 16550A
ttyS01 at 0xef600400 (irq = 1) is a 16550A
IBM gpio driver version 07.25.02
GPIO #0 at 0xc307d700
RAMDISK driver initialized: 16 RAM disks of 8192K size 1024 blocksize
loop: loaded (max 8 devices)
emac: IBM OCP EMAC Ethernet driver, version 2.0
Maintained by Benjamin Herrenschmidt [EMAIL PROTECTED]
mal0: Initialized, 4 tx channels, 2 rx channels
eth0: IBM emac, MAC 00:04:a5:06:15:6b
eth0: Found Generic MII PHY (0x00)
emac1: Cannot reset EMAC
Looking for 3 devices
probing for memory type cfi_probe
physmap flash device: 100 at ff00
phys_mapped_flash: Found 1 x16 devices at 0x0 in 8-bit mode
 Amd/Fujitsu Extended Query Table at 0x0040
phys_mapped_flash: CFI does not contain boot bank location. Assuming top.
number of CFI chips: 1
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.
probing for memory type map_ram
physmap flash device: 800 at f000
probing for memory type map_ram
physmap flash device: 800 at e000
Pico40: Found 1 x16 devices at 0x0 in 8-bit mode
 Amd/Fujitsu Extended Query Table at 0x0040
Pico40: CFI does not contain boot bank location. Assuming top.
number of CFI chips: 1
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.
Pico4 flash bank 0: Using static image partition definition
Creating 13 MTD partitions on Pico40:
0x-0x0036 : uscratchpad (3.4MB)
0x0036-0x0066 : ugh2disk (3MB)
0x0066-0x0076 : ujffs2_1 (1MB)
0x0076-0x0096 : ujffs2_2 (2MB)
0x0096-0x00b0 : uimage (1.6MB)
0x00b0-0x00b8 : ufpga (512Kb)
0x00b8-0x00be : uiiu (384Kb)
0x00c0-0x00ee : uramdisk (2944KB)
0x00f6-0x0100 : uboot (640KB)
0x00360040-0x0066 : Pico4 GH2Disk mount point
mtd: partition Pico4 GH2Disk mount point doesn't start on an erase

Suitability of patchs as attachments

2008-05-16 Thread Welch, Martyn (GE EntSol, Intelligent Platforms)
Hi all,

I wish I didn't have to ask this but...

For now I'm stuck using Outlook and Exchange for email, despite my best
efforts I have been unable to force it to send patchs inline without
breaking them (I can get it to do plain text, however it seems to have
the habbit of wrapping ling lines, such as the diff --git... lines).

Is anyone in the same position and has worked out how to do this?

I also have a patch for initial support of one of our boards waiting
here, would it be acceptable to attach this as a patch on this mailing
list?

Thanks,

Martyn


Martyn Welch MEng MPhil MIET
Principal Software Engineer

GE Fanuc Intelligent Platforms
Tove Valley Business Park, Towcester,
Northants, NN12 6PF, United Kingdom

Telephone: +44 (0) 1327 359444
Direct Dial: +44 (0) 1327 322748
Fax: +44 (0) 1327 322800
email: [EMAIL PROTECTED]
web: www.gefanuc.com

GE Fanuc Intelligent Platforms Ltd, registered in England and Wales
(3828642) at 100 Barbirolli Square, Manchester, M2 3AB, VAT GB 729 849
476  

GE Fanuc Intelligent Platforms Confidential and Proprietary. If you have
received this message in error please notify us immediately and
permanently remove it from your system and destroy any printed
hardcopies.
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Booting Linux from an ACE File

2008-05-16 Thread mojtaba
Dear all,

Could you please explain what happens exactly when Linux is booting from a
compact flash?

To my few knowledge, the Linux compressed image will be copied somewhere in
memory, will be uncompressed and the control will jump to the beginning
address of the Linux kernel.

Is there any boot loader that copies the Linux compressed image to the
memory?

Where in memory does it put the Linux kernel? For example, if I have 2 DDRs
in my hardware, in which of them it will be put the kernel?

Can I set the kernel location in memory manually?

Might be an stupid question but: Is it possible for the kernel to be half in
BRAMS and half in DDR?

Regards,
Moji

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Re: Booting Linux from an ACE File

2008-05-16 Thread Marco Stornelli

mojtaba ha scritto:

Dear all,

Could you please explain what happens exactly when Linux is booting from a
compact flash?

To my few knowledge, the Linux compressed image will be copied somewhere in
memory, will be uncompressed and the control will jump to the beginning
address of the Linux kernel.

Is there any boot loader that copies the Linux compressed image to the
memory?

Where in memory does it put the Linux kernel? For example, if I have 2 DDRs
in my hardware, in which of them it will be put the kernel?

Can I set the kernel location in memory manually?

Might be an stupid question but: Is it possible for the kernel to be half in
BRAMS and half in DDR?

Regards,
Moji

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 Is there any boot loader that copies the Linux compressed image to the
 memory?

Yes there are several boot-loader for example U-Boot.

 Where in memory does it put the Linux kernel? For example, if I have 
2 DDRs in my hardware, in which of them it will be put the kernel?


The kernel usually is copied at the start of the memory, so if you have 
mapped the address 0x in the first bank, here will be copied it.


 Can I set the kernel location in memory manually?

Yes but usually it's not needed and you have to be carefully to modify it.
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Re: Suitability of patchs as attachments

2008-05-16 Thread Josh Boyer
On Fri, 16 May 2008 09:46:31 +0100
Welch, Martyn (GE EntSol, Intelligent Platforms)
[EMAIL PROTECTED] wrote:

 Hi all,
 
 I wish I didn't have to ask this but...
 
 For now I'm stuck using Outlook and Exchange for email, despite my best
 efforts I have been unable to force it to send patchs inline without
 breaking them (I can get it to do plain text, however it seems to have
 the habbit of wrapping ling lines, such as the diff --git... lines).
 
 Is anyone in the same position and has worked out how to do this?

Use gmail.  It's free, and as long as you make sure your message is
plaintext it won't mess with patches.

josh
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Re: removal of arch/ppc in 2.6.27?

2008-05-16 Thread Suresh Chandra Mannava
On Sat, Apr 19, 2008 at 9:00 PM, Kumar Gala [EMAIL PROTECTED]
wrote:

 This is intended as a reminder that we plan on getting rid of arch/ppc this
 summer.  I'm guessing based on kernel release times that will be 2.6.27. That 
 would mean 2.6.26 will be the last kernel to support arch/ppc.

 If people have boards that like ported over please let us know and work
 with us to port this over to arch/powerpc.

 Here is a list based on arch/ppc/platforms.  Its not intended to be
 complete but a general idea of what's left in arch/ppc.



I am still struggling to make SPRUCE work with 2.6.24 arch/ppc. I think no
body had tested 2.6.x on SPRUCE. I think there is some issue with cpc700 pic
driver.
I feel it is better to move SPRUCE along with other arch/ppc boards to
arch/powerpc

Thanks,
Suresh




 PPC_PREPe6xx
 PQ2ADS  82xxin arch/powerpc?
 TQM8260 82xx
 CPCI690 e6xx/mv64x60
 EV64260 e6xx/mv64x60
 CHESTNUTe6xx/mv64x60
 LOPEC   e6xx
 KATANA  e6xx/mv64x60
 HDPUe6xx/mv64x60
 MVME5100e6xx
 PAL4e6xx
 POWERPMC250 e6xx
 PPLUS   e6xx
 PRPMC750e6xx
 PRPMC800e6xx
 RADSTONE_PPC7D  e6xx
 SANDPOINT   e6xx
 SBC82xx 82xx
 SPRUCE  e6xx
 LITE520052xx
 EV64360 e6xx/mv64x60
 MPC86XADS   8xx in arch/powerpc
 MPC885ADS   8xx in arch/powerpc
 ADS8272 82xxin arch/powerpc

 4xx:
 BAMBOO  44x in arch/powerpc
 CPCI405 40x
 EBONY   44x in arch/powerpc
 EP405   40x in arch/powerpc
 BUBINGA 40x
 LUAN44x
 YUCCA   44x
 OCOTEA  44x
 REDWOOD_5   40x
 REDWOOD_6   40x
 SYCAMORE40x
 TAISHAN 44x in arch/powerpc
 WALNUT  40x in arch/powerpc
 XILINX_ML30040x
 XILINX_ML40340x

 - k
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Re: Booting Linux from an ACE File

2008-05-16 Thread Grant Likely
On Fri, May 16, 2008 at 5:57 AM, mojtaba [EMAIL PROTECTED] wrote:
 Dear all,

 Could you please explain what happens exactly when Linux is booting from a
 compact flash?

 To my few knowledge, the Linux compressed image will be copied somewhere in
 memory, will be uncompressed and the control will jump to the beginning
 address of the Linux kernel.

There are several methods to do this.

Option 1 is to pass the kernel zImage.elf to genace so that it gets
wrapped up into the ace file itself and is loaded into RAM by the
SystemACE on FPGA initialization.  However, this requires that your
FPGA design gets RAM initialized before the SysACE starts squirting in
the Linux image (which isn't always the case).  This option is also
slow.

Option 2 is to use an small bootloader blob (I think Xilinx has a
technote with something suitable) loaded into BRAM that reads the CF
card and copies a Linux image (hint; build a simpleImage when using
arch/powerpc) off the CF and into RAM.  This method boots the system
faster, but requires a little bit more work.

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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OCM instruction memory

2008-05-16 Thread mojtaba
Dear all,
I have a problem with OCM instruction memory.
When I create a simple hardware design without OCM instruction memory, I can
easily run Linux on it.
But, when I add an OCM instruction cache with the size 128K, the system
freezes at this point:

loaded at: 0040 004CE1A0
board data at: 004CC120 004CC19C
relocated to:  00404050 004040CC
zimage at: 00404E88 004CBE3E
avail ram: 004CF000 1000

Linux/PPC load: console=ttyS0,9600 root=/dev/xsa2
Uncompressing Linux...done.
Now booting the kernel


I already test the memory and it's ok. I asked my pervious question about
system ACE because of this problem. Actually I thought that the linux image
might be copied to the OCM instruction memory. If the linux image is copied
to the address zero which my DDR is mapped there, there should be no
difference between the platform with OCM and without? 

Can you please help me on this issue?

Best regards,
Mojtaba


# 
#

##
# 
# Created by Base System Builder Wizard for Xilinx EDK 9.1.02 Build
EDK_J_SP2.4
# 
# Fri May 16 15:06:06 2008
# 
# Target Board:  Xilinx Virtex-4 ML410 Evaluation Platform Rev B
# Family:virtex4
# Device:XC4VFX60
# Package:   ff1152
# Speed Grade:   -11
# 
# Processor: PPC 405
# Processor clock frequency: 300.00 MHz
# Bus clock frequency: 100.00 MHz
# Debug interface: FPGA JTAG
# On Chip Memory : 256 KB
# Total Off Chip Memory : 256 MB
#   - DDR2_SDRAM_32Mx64 = 256 MB
# 
#

##


 PARAMETER VERSION = 2.1.0


 PORT fpga_0_RS232_Uart_1_ctsN_pin = fpga_0_RS232_Uart_1_ctsN, DIR = I
 PORT fpga_0_RS232_Uart_1_rtsN_pin = fpga_0_RS232_Uart_1_rtsN, DIR = O
 PORT fpga_0_RS232_Uart_1_sin_pin = fpga_0_RS232_Uart_1_sin, DIR = I
 PORT fpga_0_RS232_Uart_1_sout_pin = fpga_0_RS232_Uart_1_sout, DIR = O
 PORT fpga_0_SysACE_CompactFlash_SysACE_CLK_pin =
fpga_0_SysACE_CompactFlash_SysACE_CLK, DIR = I
 PORT fpga_0_SysACE_CompactFlash_clk_enable_n_pin = net_vcc, DIR = O
 PORT fpga_0_SysACE_CompactFlash_SysACE_MPA_pin =
fpga_0_SysACE_CompactFlash_SysACE_MPA, DIR = O, VEC = [6:0]
 PORT fpga_0_SysACE_CompactFlash_SysACE_MPD_pin =
fpga_0_SysACE_CompactFlash_SysACE_MPD, DIR = IO, VEC = [15:0]
 PORT fpga_0_SysACE_CompactFlash_SysACE_CEN_pin =
fpga_0_SysACE_CompactFlash_SysACE_CEN, DIR = O
 PORT fpga_0_SysACE_CompactFlash_SysACE_OEN_pin =
fpga_0_SysACE_CompactFlash_SysACE_OEN, DIR = O
 PORT fpga_0_SysACE_CompactFlash_SysACE_WEN_pin =
fpga_0_SysACE_CompactFlash_SysACE_WEN, DIR = O
 PORT fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin =
fpga_0_SysACE_CompactFlash_SysACE_MPIRQ, DIR = I
 PORT fpga_0_ORGate_1_Res_pin = fpga_0_ORGate_1_Res, DIR = O
 PORT fpga_0_ORGate_1_Res_1_pin = fpga_0_ORGate_1_Res, DIR = O
 PORT fpga_0_ORGate_1_Res_2_pin = fpga_0_ORGate_1_Res, DIR = O
 PORT fpga_0_Ethernet_MAC_reset_sgmii_n_pin = net_gnd, DIR = O
 PORT fpga_0_Ethernet_MAC_PHY_tx_clk_pin = fpga_0_Ethernet_MAC_PHY_tx_clk,
DIR = I
 PORT fpga_0_Ethernet_MAC_PHY_rx_clk_pin = fpga_0_Ethernet_MAC_PHY_rx_clk,
DIR = I
 PORT fpga_0_Ethernet_MAC_PHY_dv_pin = fpga_0_Ethernet_MAC_PHY_dv, DIR = I
 PORT fpga_0_Ethernet_MAC_PHY_rx_data_pin = fpga_0_Ethernet_MAC_PHY_rx_data,
DIR = I, VEC = [3:0]
 PORT fpga_0_Ethernet_MAC_PHY_rx_er_pin = fpga_0_Ethernet_MAC_PHY_rx_er, DIR
= I
 PORT fpga_0_Ethernet_MAC_PHY_tx_er_pin = fpga_0_Ethernet_MAC_PHY_tx_er, DIR
= O
 PORT fpga_0_Ethernet_MAC_PHY_tx_en_pin = fpga_0_Ethernet_MAC_PHY_tx_en, DIR
= O
 PORT fpga_0_Ethernet_MAC_PHY_tx_data_pin = fpga_0_Ethernet_MAC_PHY_tx_data,
DIR = O, VEC = [3:0]
 PORT fpga_0_Ethernet_MAC_PHY_Mii_clk_pin = fpga_0_Ethernet_MAC_PHY_Mii_clk,
DIR = IO
 PORT fpga_0_Ethernet_MAC_PHY_Mii_data_pin =
fpga_0_Ethernet_MAC_PHY_Mii_data, DIR = IO
 PORT fpga_0_Ethernet_MAC_PHY_rst_n_pin = fpga_0_Ethernet_MAC_PHY_rst_n, DIR
= O
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_ODT_pin =
fpga_0_DDR2_SDRAM_32Mx64_DDR_ODT, DIR = O
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_Addr_pin =
fpga_0_DDR2_SDRAM_32Mx64_DDR_Addr, DIR = O, VEC = [0:12]
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_BankAddr_pin =
fpga_0_DDR2_SDRAM_32Mx64_DDR_BankAddr, DIR = O, VEC = [0:1]
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_CASn_pin =
fpga_0_DDR2_SDRAM_32Mx64_DDR_CASn, DIR = O
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_CKE_pin =
fpga_0_DDR2_SDRAM_32Mx64_DDR_CKE, DIR = O
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_CSn_pin =
fpga_0_DDR2_SDRAM_32Mx64_DDR_CSn, DIR = O
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_RASn_pin =
fpga_0_DDR2_SDRAM_32Mx64_DDR_RASn, DIR = O
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_WEn_pin =
fpga_0_DDR2_SDRAM_32Mx64_DDR_WEn, DIR = O
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_DM_pin = fpga_0_DDR2_SDRAM_32Mx64_DDR_DM,
DIR = O, VEC = [0:7]
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_DQS_pin =
fpga_0_DDR2_SDRAM_32Mx64_DDR_DQS, DIR = IO, VEC = [0:7]
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_DQSn_pin =
fpga_0_DDR2_SDRAM_32Mx64_DDR_DQSn, DIR = IO, VEC = [0:7]
 PORT fpga_0_DDR2_SDRAM_32Mx64_DDR_DQ_pin = 

RE: linux 2.6 hangs at __delay function on Viretx 4 board

2008-05-16 Thread swamydp

John

Thanks for your suggestions.

 I looked up the virtual address for __log_buf in System.map and subtracted
0xc000 to get the physical address. I then reset the processor from XMD
and dump contents of the physical address of __log_buf using 'mrd' command
from XMD. All I see is bunch of zeros in those locations.

I am debugging but do not have much clue.

Swamy



John Linn wrote:
 
 Hi Swamy,
 
 I have seen this sometime before I think, but don't remember why.
 
 I see that udelay depends on loops_per_jiffy, have you looked to see
 what value it is? Maybe it's garbage and some large value?
 
 Have you tried dumping the __log_buf to understand how far it got thru
 booting the kernel before it got hung?
 
 I assume you must be using xmd to load the image, you can also use it to
 dump the buffer.
 
 On another processor I have seen it get hung in the calibrate_delay call
 from the kernel if the interrupts or timer aren't working, but haven't
 ever seen that on the Powerpc.
 
 Thanks,
 John
 
 
 -Original Message-
 From: [EMAIL PROTECTED]
 [mailto:[EMAIL PROTECTED] On
 Behalf Of swamydp
 Sent: Tuesday, May 13, 2008 9:29 PM
 To: linuxppc-embedded@ozlabs.org
 Subject: linux 2.6 hangs at __delay function on Viretx 4 board
 
 
 
 I am trying to boot linux 2.6 on HITECH virtex 4(fx60) board. Linux
 hangs at
 address 0xc00045ec which is in the __udelay function. I am using EDK
 9.2i
 and gcc version 4.0.2 for compiling the kernel. The following is the
 boot
 message from the bootloader. 
 
 loaded at: 0040 0054E19C
 board data at: 0054C120 0054C19C
 relocated to:  00404064 004040E0
 zimage at: 00404E55 0054B5B4
 avail ram: 0054F000 0200
 
 Linux/PPC load: console=ttyS0,9600 console=tty0 root=/dev/sda2
 Uncompressing Linux...done.
 Now booting the kernel
 
 Any help is greatly appreciated. I have run out of ideas to fix this.
 
 Thanks
 swamy
 
 -- 
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 http://www.nabble.com/linux-2.6-hangs-at-__delay-function-on-Viretx-4-bo
 ard-tp17222725p17222725.html
 Sent from the linuxppc-embedded mailing list archive at Nabble.com.
 
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Re: Suitability of patchs as attachments

2008-05-16 Thread Grant Likely
On Fri, May 16, 2008 at 2:46 AM, Welch, Martyn (GE EntSol, Intelligent
Platforms) [EMAIL PROTECTED] wrote:
 Hi all,

 I wish I didn't have to ask this but...

 For now I'm stuck using Outlook and Exchange for email, despite my best
 efforts I have been unable to force it to send patchs inline without
 breaking them (I can get it to do plain text, however it seems to have
 the habbit of wrapping ling lines, such as the diff --git... lines).

 Is anyone in the same position and has worked out how to do this?

Yes, don't use your email client for actually sending the patches.
Use git-send-email for 'stg mail' to send your patches from the
command line.  Your Exchange server should have SMTP turned on and you
can send directly to it.  Otherwise, you can try connecting to an
external open SMTP relay.

You'll still receive the replies and comments in Outlook.

Cheers,
g.


 I also have a patch for initial support of one of our boards waiting
 here, would it be acceptable to attach this as a patch on this mailing
 list?

 Thanks,

 Martyn

 
 Martyn Welch MEng MPhil MIET
 Principal Software Engineer

 GE Fanuc Intelligent Platforms
 Tove Valley Business Park, Towcester,
 Northants, NN12 6PF, United Kingdom

 Telephone: +44 (0) 1327 359444
 Direct Dial: +44 (0) 1327 322748
 Fax: +44 (0) 1327 322800
 email: [EMAIL PROTECTED]
 web: www.gefanuc.com

 GE Fanuc Intelligent Platforms Ltd, registered in England and Wales
 (3828642) at 100 Barbirolli Square, Manchester, M2 3AB, VAT GB 729 849
 476

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-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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RE: linux 2.6 hangs at __delay function on Viretx 4 board

2008-05-16 Thread John Linn
Swamy,

Looks like the kernel is probably not running at all yet, may stuck in
early initialization.

1. Has the kernel ever ran on this board or is this development to get
it running?

I have ran into issues with the memory being setup incorrectly (the end
address/how much memory) and seen something similar to this. I would
review the bootstrap loader output carefully to ensure the memory is
setup correctly.

2. Not sure on the tools you are using to build it.  You mention the
EDK, but you must not be using it's compiler as it's not configured in
the EDK to build Linux. 

I use the ELDK 4.1 right now as we are still figuring out our tool
situation. 

3. Without a good JTAG emulator, bring up can be painful in my
experience.  The EDK GDB/XMD is not fully MMU aware, so once the MMU is
one it won't allow you to debug.  If you have access to an MMU aware
debugger that could help.

I have used BDI 2000 for these type of problems and it helped.

4. In the absense of an MMU debugger, using the UART to slam bytes out
of the serial port can help. The UART lite is easier for that as there's
no setup required. The kernel can map an MMU TLB so that the UART is
usable early, make sure that is setup in the early startup.  Then I just
use *(char *)The UART xmt reg address = data byte in the code to see
what it's doing.

5. I would probably see where the udelay is called early in the kernel
startup and why. I sometimes hack on it, comment stuff out, to get past
it and figure out more data.  Not always a good path, but can help.

Good luck,
John


-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On
Behalf Of swamydp
Sent: Friday, May 16, 2008 8:57 AM
To: linuxppc-embedded@ozlabs.org
Subject: RE: linux 2.6 hangs at __delay function on Viretx 4 board


John

Thanks for your suggestions.

 I looked up the virtual address for __log_buf in System.map and
subtracted
0xc000 to get the physical address. I then reset the processor from
XMD
and dump contents of the physical address of __log_buf using 'mrd'
command
from XMD. All I see is bunch of zeros in those locations.

I am debugging but do not have much clue.

Swamy



John Linn wrote:
 
 Hi Swamy,
 
 I have seen this sometime before I think, but don't remember why.
 
 I see that udelay depends on loops_per_jiffy, have you looked to see
 what value it is? Maybe it's garbage and some large value?
 
 Have you tried dumping the __log_buf to understand how far it got thru
 booting the kernel before it got hung?
 
 I assume you must be using xmd to load the image, you can also use it
to
 dump the buffer.
 
 On another processor I have seen it get hung in the calibrate_delay
call
 from the kernel if the interrupts or timer aren't working, but haven't
 ever seen that on the Powerpc.
 
 Thanks,
 John
 
 
 -Original Message-
 From: [EMAIL PROTECTED]
 [mailto:[EMAIL PROTECTED] On
 Behalf Of swamydp
 Sent: Tuesday, May 13, 2008 9:29 PM
 To: linuxppc-embedded@ozlabs.org
 Subject: linux 2.6 hangs at __delay function on Viretx 4 board
 
 
 
 I am trying to boot linux 2.6 on HITECH virtex 4(fx60) board. Linux
 hangs at
 address 0xc00045ec which is in the __udelay function. I am using EDK
 9.2i
 and gcc version 4.0.2 for compiling the kernel. The following is the
 boot
 message from the bootloader. 
 
 loaded at: 0040 0054E19C
 board data at: 0054C120 0054C19C
 relocated to:  00404064 004040E0
 zimage at: 00404E55 0054B5B4
 avail ram: 0054F000 0200
 
 Linux/PPC load: console=ttyS0,9600 console=tty0 root=/dev/sda2
 Uncompressing Linux...done.
 Now booting the kernel
 
 Any help is greatly appreciated. I have run out of ideas to fix this.
 
 Thanks
 swamy
 
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arch/powerpc, Xilinx, and mainline kernel support

2008-05-16 Thread Koss, Mike (Mission Systems)
Is there any reason why the mainline 2.6.25.3 (and from what I could see
.4) is missing the files to build for the Xilinx Virtex platform?

Or in other words, I tried to build from 2.6.25.3 for the Xilinx Virtex
under arch/powerpc (because arch/ppc actually crashes when once apps
start to run) and it failed when trying to actually create the zImage. I
hopped over to Xilinx's git server and noticed a bunch of missing
entries in the boot/Makefile and source code to actually support the
complete image build for a Xilinx Virtex PPC405.

When is the Xilinx Virtex support going to be mainline official? I need
to be able to grab a stable kernel and work from there rather than using
the latest -rc that Xilinx is hosting on their git server.

-- Mike
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Re: arch/powerpc, Xilinx, and mainline kernel support

2008-05-16 Thread Grant Likely
On Fri, May 16, 2008 at 4:06 PM, Koss, Mike (Mission Systems)
[EMAIL PROTECTED] wrote:
 Is there any reason why the mainline 2.6.25.3 (and from what I could see .4)
 is missing the files to build for the Xilinx Virtex platform?

 Or in other words, I tried to build from 2.6.25.3 for the Xilinx Virtex
 under arch/powerpc (because arch/ppc actually crashes when once apps start
 to run) and it failed when trying to actually create the zImage. I hopped
 over to Xilinx's git server and noticed a bunch of missing entries in the
 boot/Makefile and source code to actually support the complete image build
 for a Xilinx Virtex PPC405.

 When is the Xilinx Virtex support going to be mainline official? I need to
 be able to grab a stable kernel and work from there rather than using the
 latest -rc that Xilinx is hosting on their git server.

Working on it.  Biggest problem is getting the device drivers in
shape.  However, other than Ethernet support, current arch/powerpc
(head of Linus' tree, not 2.6.25) should work for building virtex
kernels.

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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RE: arch/powerpc, Xilinx, and mainline kernel support

2008-05-16 Thread Stephen Neuendorffer


 -Original Message-
 From: [EMAIL PROTECTED]
[mailto:linuxppc-embedded-
 [EMAIL PROTECTED] On Behalf Of Grant
Likely
 Sent: Friday, May 16, 2008 3:27 PM
 To: Koss, Mike (Mission Systems)
 Cc: linuxppc-embedded@ozlabs.org
 Subject: Re: arch/powerpc, Xilinx, and mainline kernel support
 
 On Fri, May 16, 2008 at 4:06 PM, Koss, Mike (Mission Systems)
 [EMAIL PROTECTED] wrote:
  Is there any reason why the mainline 2.6.25.3 (and from what I could
see .4)
  is missing the files to build for the Xilinx Virtex platform?
 
  Or in other words, I tried to build from 2.6.25.3 for the Xilinx
Virtex
  under arch/powerpc (because arch/ppc actually crashes when once apps
start
  to run) and it failed when trying to actually create the zImage. I
hopped
  over to Xilinx's git server and noticed a bunch of missing entries
in the
  boot/Makefile and source code to actually support the complete image
build
  for a Xilinx Virtex PPC405.
 
  When is the Xilinx Virtex support going to be mainline official? I
need to
  be able to grab a stable kernel and work from there rather than
using the
  latest -rc that Xilinx is hosting on their git server.
 
 Working on it.  Biggest problem is getting the device drivers in
 shape.  However, other than Ethernet support, current arch/powerpc
 (head of Linus' tree, not 2.6.25) should work for building virtex
 kernels.

Mike,

What is your objection to using what is in the git tree, because it is
based on 24-rc8 and not 25, or something more fundamental?

Steve


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