Re: [Mesa-dev] [PATCH 7/7] nir: add nir_ssa_for_alu_src()

[Jason Ekstrand]

On Fri, Nov 6, 2015 at 8:35 AM, Rob Clark  wrote:
> From: Rob Clark 
>
> Using something like:
>
>numer = nir_ssa_for_src(bld, alu->src[0].src,
>nir_ssa_alu_instr_src_components(alu, 0));
>
> for alu src's with swizzle, like:
>
>vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
>vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
>vec2 ssa_2 = udiv ssa_10.xx, ssa_11
>
> ends up turning into something like:
>
>vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
>vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
>vec2 ssa_13 = imov ssa_10
>...
>
> because nir_ssa_for_src() ignore's the original nir_alu_src's swizzle.
> Instead for alu instructions, nir_src_for_alu_src() should be used to
> ensure the original alu src's swizzle doesn't get lost in translation:
>
>vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
>vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
>vec2 ssa_13 = imov ssa_10.xx
>...
>
> Signed-off-by: Rob Clark 
> ---
>  src/glsl/nir/nir_builder.h| 25 +
>  src/glsl/nir/nir_lower_idiv.c |  6 ++
>  2 files changed, 27 insertions(+), 4 deletions(-)
>
> diff --git a/src/glsl/nir/nir_builder.h b/src/glsl/nir/nir_builder.h
> index 624329d..8e57231 100644
> --- a/src/glsl/nir/nir_builder.h
> +++ b/src/glsl/nir/nir_builder.h
> @@ -259,6 +259,8 @@ nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
>  /**
>   * Turns a nir_src into a nir_ssa_def * so it can be passed to
>   * nir_build_alu()-based builder calls.
> + *
> + * See nir_ssa_for_alu_src() for alu instructions.
>   */
>  static inline nir_ssa_def *
>  nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
> @@ -274,6 +276,29 @@ nir_ssa_for_src(nir_builder *build, nir_src src, int 
> num_components)
> return nir_imov_alu(build, alu, num_components);
>  }
>
> +/**
> + * Similar to nir_ssa_for_src(), but for alu src's, respecting the
> + * nir_alu_src's swizzle.
> + */
> +static inline nir_ssa_def *
> +nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
> +{
> +   static uint8_t trivial_swizzle[4] = { 0, 1, 2, 3 };
> +   nir_alu_src *src = >src[srcn];
> +   unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
> +
> +   if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
> +   (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
> +  return src->src.ssa;

You should probably also check that abs and negate are false.

> +
> +   nir_alu_src alu = { NIR_SRC_INIT };
> +   alu.src = src->src;
> +   for (int j = 0; j < 4; j++)
> +  alu.swizzle[j] = src->swizzle[j];

I think you should be able to pass src directly into nir_imov_alu.

> +
> +   return nir_imov_alu(build, alu, num_components);
> +}
> +
>  static inline nir_ssa_def *
>  nir_load_var(nir_builder *build, nir_variable *var)
>  {
> diff --git a/src/glsl/nir/nir_lower_idiv.c b/src/glsl/nir/nir_lower_idiv.c
> index c961178..3b8af2c 100644
> --- a/src/glsl/nir/nir_lower_idiv.c
> +++ b/src/glsl/nir/nir_lower_idiv.c
> @@ -52,10 +52,8 @@ convert_instr(nir_builder *bld, nir_alu_instr *alu)
>
> bld->cursor = nir_before_instr(>instr);
>
> -   numer = nir_ssa_for_src(bld, alu->src[0].src,
> -   nir_ssa_alu_instr_src_components(alu, 0));
> -   denom = nir_ssa_for_src(bld, alu->src[1].src,
> -   nir_ssa_alu_instr_src_components(alu, 1));
> +   numer = nir_ssa_for_alu_src(bld, alu, 0);
> +   denom = nir_ssa_for_alu_src(bld, alu, 1);
>
> if (is_signed) {
>af = nir_i2f(bld, numer);
> --
> 2.5.0
>
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Re: [Mesa-dev] [PATCH 2/7] nir: remove nir_variable::max_ifc_array_access

[Jason Ekstrand]

Yes, please!

Reviewed-by: Jason Ekstrand 

On Fri, Nov 6, 2015 at 8:35 AM, Rob Clark  wrote:
> From: Rob Clark 
>
> No users.
>
> Signed-off-by: Rob Clark 
> ---
>  src/glsl/nir/glsl_to_nir.cpp |  9 -
>  src/glsl/nir/nir.h   | 13 -
>  2 files changed, 22 deletions(-)
>
> diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
> index 57aba5b..0854a52 100644
> --- a/src/glsl/nir/glsl_to_nir.cpp
> +++ b/src/glsl/nir/glsl_to_nir.cpp
> @@ -291,15 +291,6 @@ nir_visitor::visit(ir_variable *ir)
> var->type = ir->type;
> var->name = ralloc_strdup(var, ir->name);
>
> -   if (ir->is_interface_instance() && ir->get_max_ifc_array_access() != 
> NULL) {
> -  unsigned size = ir->get_interface_type()->length;
> -  var->max_ifc_array_access = ralloc_array(var, unsigned, size);
> -  memcpy(var->max_ifc_array_access, ir->get_max_ifc_array_access(),
> - size * sizeof(unsigned));
> -   } else {
> -  var->max_ifc_array_access = NULL;
> -   }
> -
> var->data.read_only = ir->data.read_only;
> var->data.centroid = ir->data.centroid;
> var->data.sample = ir->data.sample;
> diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
> index e2d75df..0d98847 100644
> --- a/src/glsl/nir/nir.h
> +++ b/src/glsl/nir/nir.h
> @@ -148,19 +148,6 @@ typedef struct {
>  */
> char *name;
>
> -   /**
> -* For variables which satisfy the is_interface_instance() predicate, this
> -* points to an array of integers such that if the ith member of the
> -* interface block is an array, max_ifc_array_access[i] is the maximum
> -* array element of that member that has been accessed.  If the ith member
> -* of the interface block is not an array, max_ifc_array_access[i] is
> -* unused.
> -*
> -* For variables whose type is not an interface block, this pointer is
> -* NULL.
> -*/
> -   unsigned *max_ifc_array_access;
> -
> struct nir_variable_data {
>
>/**
> --
> 2.5.0
>
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Re: [Mesa-dev] [PATCH 4/7] nir/print: show shader name/label if set

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand 

On Fri, Nov 6, 2015 at 8:35 AM, Rob Clark  wrote:
> From: Rob Clark 
>
> Signed-off-by: Rob Clark 
> ---
>  src/glsl/nir/nir_print.c | 6 ++
>  1 file changed, 6 insertions(+)
>
> diff --git a/src/glsl/nir/nir_print.c b/src/glsl/nir/nir_print.c
> index 30220c5..bde7535 100644
> --- a/src/glsl/nir/nir_print.c
> +++ b/src/glsl/nir/nir_print.c
> @@ -973,6 +973,12 @@ nir_print_shader(nir_shader *shader, FILE *fp)
>
> fprintf(fp, "shader: %s\n", gl_shader_stage_name(shader->stage));
>
> +   if (shader->info.name)
> +  fprintf(fp, "name: %s\n", shader->info.name);
> +
> +   if (shader->info.label)
> +  fprintf(fp, "label: %s\n", shader->info.label);
> +
> nir_foreach_variable(var, >uniforms) {
>print_var_decl(var, );
> }
> --
> 2.5.0
>
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Re: [Mesa-dev] [PATCH mesa 0/5] nouveau: codegen: Make use of double immediates

[Ilia Mirkin]

Hi Hans,

All pushed. I made a few additional fixes and improvement to fp64
immediate handling along the way, but all your commits were fine
as-is. (Except that they enabled fp64 immediates on nv50 implicitly
which is wrong -- there are no immediate-taking variants on nv50, so I
fixed that glitch. But only the G200 can do fp64 in the first place,
and nouveau doesn't actually expose it. Corner case of a corner case
:) )

Thanks for taking care of this... it was a small bit of fp64 which I
always felt bad about not having finished up. (But not bad enough to
actually finish it myself.)

Cheers,

  -ilia


On Thu, Nov 5, 2015 at 8:32 AM, Hans de Goede  wrote:
> Hi All,
>
> This series implements using double immediates in the nouveau codegen code.
>
> This turns the following (nvc0) code:
>   1: mov u32 $r2 0x (8)
>   2: mov u32 $r3 0x3fe0 (8)
>   3: add f64 $r0d $r0d $r2d (8)
>
> Into:
>   1: add f64 $r0d $r0d 0.50 (8)
>
> This has been tested with the 2 double shader tests which I just send to
> the piglet list. On a gk208 (gk110 / SM35) card, and by checking the output
> of nouveau_compiler with both nvdisasm and envydis on gf100 / gk104 / gm107.
>
> Regards,
>
> Hans
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[Mesa-dev] [PATCH v2 6/9] i965: Add annotation_insert_error() and support for printing errors.

[Matt Turner]

Will allow annotations to contain error messages (indicating an
instruction violates a rule for instance) that are printed after the
disassembly of the block.
---
 src/mesa/drivers/dri/i965/intel_asm_annotation.c | 71 +---
 src/mesa/drivers/dri/i965/intel_asm_annotation.h |  7 +++
 2 files changed, 71 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_asm_annotation.c 
b/src/mesa/drivers/dri/i965/intel_asm_annotation.c
index fe9d80a..52878fd 100644
--- a/src/mesa/drivers/dri/i965/intel_asm_annotation.c
+++ b/src/mesa/drivers/dri/i965/intel_asm_annotation.c
@@ -69,6 +69,10 @@ dump_assembly(void *assembly, int num_annotations, struct 
annotation *annotation
 
   brw_disassemble(devinfo, assembly, start_offset, end_offset, stderr);
 
+  if (annotation[i].error) {
+ fputs(annotation[i].error, stderr);
+  }
+
   if (annotation[i].block_end) {
  fprintf(stderr, "   END B%d", annotation[i].block_end->num);
  foreach_list_typed(struct bblock_link, successor_link, link,
@@ -82,25 +86,34 @@ dump_assembly(void *assembly, int num_annotations, struct 
annotation *annotation
fprintf(stderr, "\n");
 }
 
-void annotate(const struct brw_device_info *devinfo,
-  struct annotation_info *annotation, const struct cfg_t *cfg,
-  struct backend_instruction *inst, unsigned offset)
+static bool
+annotation_array_ensure_space(struct annotation_info *annotation)
 {
-   if (annotation->mem_ctx == NULL)
-  annotation->mem_ctx = ralloc_context(NULL);
-
if (annotation->ann_size <= annotation->ann_count) {
   int old_size = annotation->ann_size;
   annotation->ann_size = MAX2(1024, annotation->ann_size * 2);
   annotation->ann = reralloc(annotation->mem_ctx, annotation->ann,
  struct annotation, annotation->ann_size);
   if (!annotation->ann)
- return;
+ return false;
 
   memset(annotation->ann + old_size, 0,
  (annotation->ann_size - old_size) * sizeof(struct annotation));
}
 
+   return true;
+}
+
+void annotate(const struct brw_device_info *devinfo,
+  struct annotation_info *annotation, const struct cfg_t *cfg,
+  struct backend_instruction *inst, unsigned offset)
+{
+   if (annotation->mem_ctx == NULL)
+  annotation->mem_ctx = ralloc_context(NULL);
+
+   if (!annotation_array_ensure_space(annotation))
+  return;
+
struct annotation *ann = >ann[annotation->ann_count++];
ann->offset = offset;
if ((INTEL_DEBUG & DEBUG_ANNOTATION) != 0) {
@@ -156,3 +169,47 @@ annotation_finalize(struct annotation_info *annotation,
}
annotation->ann[annotation->ann_count].offset = next_inst_offset;
 }
+
+void
+annotation_insert_error(struct annotation_info *annotation, unsigned offset,
+const char *error)
+{
+   struct annotation *ann;
+
+   if (!annotation->ann_count)
+  return;
+
+   /* We may have to split an annotation, so ensure we have enough space
+* allocated for that case up front.
+*/
+   if (!annotation_array_ensure_space(annotation))
+  return;
+
+   for (int i = 0; i < annotation->ann_count; i++) {
+  struct annotation *cur = >ann[i];
+  struct annotation *next = >ann[i + 1];
+  ann = cur;
+
+  if (next->offset <= offset)
+ continue;
+
+  if (offset + sizeof(brw_inst) != next->offset) {
+ memmove(next, cur,
+ (annotation->ann_count - i + 2) * sizeof(struct annotation));
+ cur->error = NULL;
+ cur->error_length = 0;
+ cur->block_end = NULL;
+ next->offset = offset + sizeof(brw_inst);
+ next->block_start = NULL;
+ annotation->ann_count++;
+  }
+  break;
+   }
+
+   assume(ann != NULL);
+
+   if (ann->error)
+  ralloc_strcat(>error, error);
+   else
+  ann->error = ralloc_strdup(annotation->mem_ctx, error);
+}
diff --git a/src/mesa/drivers/dri/i965/intel_asm_annotation.h 
b/src/mesa/drivers/dri/i965/intel_asm_annotation.h
index 6c72326..662a4b4 100644
--- a/src/mesa/drivers/dri/i965/intel_asm_annotation.h
+++ b/src/mesa/drivers/dri/i965/intel_asm_annotation.h
@@ -37,6 +37,9 @@ struct cfg_t;
 struct annotation {
int offset;
 
+   size_t error_length;
+   char *error;
+
/* Pointers to the basic block in the CFG if the instruction group starts
 * or ends a basic block.
 */
@@ -69,6 +72,10 @@ annotate(const struct brw_device_info *devinfo,
 void
 annotation_finalize(struct annotation_info *annotation, unsigned offset);
 
+void
+annotation_insert_error(struct annotation_info *annotation, unsigned offset,
+const char *error);
+
 #ifdef __cplusplus
 } /* extern "C" */
 #endif
-- 
2.4.9

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Re: [Mesa-dev] [PATCH 1/7] nir: add nir_var_all enum

[Jason Ekstrand]

On Fri, Nov 6, 2015 at 8:35 AM, Rob Clark  wrote:
> Otherwise, passing -1 gets you:
>
>   error: invalid conversion from 'int' to 'nir_variable_mode' [-fpermissive]
>
> Signed-off-by: Rob Clark 
> ---
> I was going to convert the enum values to bitmask/flags which could
> be OR'd, but that doesn't play nicely w/ nir_variable::data which
> tries to stuff this into a 4 bit bitfield.. so just re-sending this
> one as-is since it's at least good enough to fix a compiler warn.

Bah!  Oh, well, makes sense.

Reviewed-by: Jason Ekstrand 

>
>  src/glsl/nir/nir.c  | 4 
>  src/glsl/nir/nir.h  | 1 +
>  src/glsl/nir/nir_lower_io.c | 2 +-
>  src/mesa/drivers/dri/i965/brw_nir.c | 3 ++-
>  4 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/src/glsl/nir/nir.c b/src/glsl/nir/nir.c
> index bb7a5fa..e1e3f0c 100644
> --- a/src/glsl/nir/nir.c
> +++ b/src/glsl/nir/nir.c
> @@ -107,6 +107,10 @@ void
>  nir_shader_add_variable(nir_shader *shader, nir_variable *var)
>  {
> switch (var->data.mode) {
> +   case nir_var_all:
> +  assert(!"invalid mode");
> +  break;
> +
> case nir_var_local:
>assert(!"nir_shader_add_variable cannot be used for local variables");
>break;
> diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
> index ef39df5..e2d75df 100644
> --- a/src/glsl/nir/nir.h
> +++ b/src/glsl/nir/nir.h
> @@ -82,6 +82,7 @@ typedef struct {
>  } nir_state_slot;
>
>  typedef enum {
> +   nir_var_all = -1,
> nir_var_shader_in,
> nir_var_shader_out,
> nir_var_global,
> diff --git a/src/glsl/nir/nir_lower_io.c b/src/glsl/nir/nir_lower_io.c
> index 688b48f..b4ed857 100644
> --- a/src/glsl/nir/nir_lower_io.c
> +++ b/src/glsl/nir/nir_lower_io.c
> @@ -176,7 +176,7 @@ nir_lower_io_block(nir_block *block, void *void_state)
>
>nir_variable_mode mode = intrin->variables[0]->var->data.mode;
>
> -  if (state->mode != -1 && state->mode != mode)
> +  if (state->mode != nir_var_all && state->mode != mode)
>   continue;
>
>switch (intrin->intrinsic) {
> diff --git a/src/mesa/drivers/dri/i965/brw_nir.c 
> b/src/mesa/drivers/dri/i965/brw_nir.c
> index dece208..07cb476 100644
> --- a/src/mesa/drivers/dri/i965/brw_nir.c
> +++ b/src/mesa/drivers/dri/i965/brw_nir.c
> @@ -270,7 +270,8 @@ brw_create_nir(struct brw_context *brw,
> nir_assign_var_locations(>uniforms,
>  >num_uniforms,
>  is_scalar ? type_size_scalar : type_size_vec4);
> -   nir_lower_io(nir, -1, is_scalar ? type_size_scalar : type_size_vec4);
> +   nir_lower_io(nir, nir_var_all,
> +is_scalar ? type_size_scalar : type_size_vec4);
> nir_validate_shader(nir);
>
> nir_remove_dead_variables(nir);
> --
> 2.5.0
>
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Re: [Mesa-dev] [PATCH 6/9] i965: Add annotation_insert_error() and support for printing errors.

[Matt Turner]

On Tue, Nov 3, 2015 at 10:44 PM, Kenneth Graunke  wrote:
> On Tuesday, November 03, 2015 10:20:26 PM Matt Turner wrote:
>> On Tue, Nov 3, 2015 at 9:47 PM, Kenneth Graunke  
>> wrote:
>> >  memmove(cur + 1, cur,
>> >  (annotation->ann_count - i + 2) * sizeof(struct 
>> > annotation));
>> >  ann = cur;
>> >  ann->error = NULL;
>> >  ann->error_length = 0;
>> >  ann->block_end = NULL;
>> >  ann->offset = insertion_point;
>> >  annotation->ann_count++;
>> >  break;
>> >   }
>> >}
>
> I still think my code is correct and easier to read...

I tried your code -- it's not correct -- it inserts the errors in the
wrong place. The good news is that the misunderstanding in it reminded
me why my code looks strange.

To know whether an offset is in an annotation block, you have to check
if it's before the next.

And, to insert an error for a given instruction, that instruction must
end the annotation block.

I've simplified the code and made the cur/next names make sense in
relation to the iteration variable i.

I'll send v2 in reply.
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Re: [Mesa-dev] [PATCH 6/7] nir: fix missing increments of num_inputs/num_outputs

[Jason Ekstrand]

On Fri, Nov 6, 2015 at 8:35 AM, Rob Clark  wrote:
> From: Rob Clark 
>
> Signed-off-by: Rob Clark 
> ---
>  src/glsl/nir/nir_lower_clip.c| 2 ++
>  src/glsl/nir/nir_lower_two_sided_color.c | 2 ++
>  2 files changed, 4 insertions(+)
>
> diff --git a/src/glsl/nir/nir_lower_clip.c b/src/glsl/nir/nir_lower_clip.c
> index 31ccfb2..4a91527 100644
> --- a/src/glsl/nir/nir_lower_clip.c
> +++ b/src/glsl/nir/nir_lower_clip.c
> @@ -55,9 +55,11 @@ create_clipdist_var(nir_shader *shader, unsigned drvloc,
>
> if (output) {
>exec_list_push_tail(>outputs, >node);
> +  shader->num_outputs++;
> }
> else {
>exec_list_push_tail(>inputs, >node);
> +  shader->num_inputs++;

I'm not sure what I think about this.  Usually, num_inputs/outputs is
set by nir_lower_io or similar.  They don't have to be vec4's.  In the
i965 driver, FS inputs are in terms of floats.  Maybe tgsi_to_nir
provides you those guarantees but we haven't for i965.

--Jason

> }
> return var;
>  }
> diff --git a/src/glsl/nir/nir_lower_two_sided_color.c 
> b/src/glsl/nir/nir_lower_two_sided_color.c
> index db519bf..269e252 100644
> --- a/src/glsl/nir/nir_lower_two_sided_color.c
> +++ b/src/glsl/nir/nir_lower_two_sided_color.c
> @@ -60,6 +60,8 @@ create_input(nir_shader *shader, unsigned drvloc, 
> gl_varying_slot slot)
>
> exec_list_push_tail(>inputs, >node);
>
> +   shader->num_inputs++;
> +
> return var;
>  }
>
> --
> 2.5.0
>
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Re: [Mesa-dev] [PATCH] glsl: remove redundant function inout assignments

[Timothy Arceri]

On Tue, 2015-11-03 at 20:42 -0500, Ilia Mirkin wrote:
> On Tue, Nov 3, 2015 at 8:23 PM, Timothy Arceri
>  wrote:
> > On Wed, 2015-11-04 at 12:12 +1100, Timothy Arceri wrote:
> > > On Tue, 2015-11-03 at 19:39 -0500, Ilia Mirkin wrote:
> > > > On Tue, Nov 3, 2015 at 7:31 PM, Timothy Arceri 
> > > > wrote:
> > > > > On Tue, 2015-11-03 at 19:21 -0500, Ilia Mirkin wrote:
> > > > > > I'm still unclear what problem you're trying to solve here? What's
> > > > > > wrong with having b[1] = b[1]?
> > > > > 
> > > > > There is nothing wrong with it, but nir seems to expect this type of
> > > > > assignment to be optimised out and hits an assert if its not. Its
> > > > > removed
> > > > > for
> > > > > non arrays in opt_copy_propagation.cpp see add_copy()
> > > > 
> > > > Sounds like a bugfix for nir might be in order then? What if you have,
> > > > say, b[1] = b[1] + 0 and then NIR optimizes away the + 0? Or +
> > > > some_var which happens to become 0 as a result of optimizations?
> > > 
> > > Assuming the GLSL IR doesn't get to it first your right, however this is
> > > tripping up nir_lower_vars_to_ssa() which is the first optimisation call
> > > for
> > > nir drivers, so we still need to add this to the GLSL IR optimisations
> > > unless
> > > there is an argument to move the lower pass until after the other
> > > optimisation
> > > passes but I assume it was added to the beginning for a reason.
> > > 
> > > I moved the lower call to the end of the optimisation list to see what
> > > happens
> > > and it does indeed still fail. I can have a go at adding the
> > > optimisation to
> > > nir when I get some time
> > 
> > I can also note this in the bug report and leave it open until it is
> > resolved.
> > 
> > >  but I don't think this should be a blocker to the
> > > GLSL IR fix.
> 
> Perhaps you should wait for someone with a better understanding of
> what's going on than me to review.
> 
> It just seems odd to have this super-special-cased thing in a GLSL IR
> opt just because of some generic-looking NIR deficiency. It sounds
> like the sort of thing that'd be very easy to fix there, instead of
> adding seemingly unnecessary extra work in the GLSL IR.


Hi Jason,

Since you wrote the nir_lower_vars_to_ssa pass do you have any comments on
this? If we end up with a case were we have have var = var should this pass
just not try to lower it rather than hitting the assert, should we try remove
it here? Or should we try to removing it in other optisation passes?

My patch removes it in the GLSL IR for the scenario it was dicovered for, but
as Ilia pointed out it could be possible to hit it as the results of
optimisation passes in nir.

Thanks,
Tim

 


> 
>   -ilia
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Re: [Mesa-dev] [PATCH 6/7] nir: fix missing increments of num_inputs/num_outputs

[Rob Clark]

On Fri, Nov 6, 2015 at 6:39 PM, Rob Clark  wrote:
> On Fri, Nov 6, 2015 at 6:23 PM, Jason Ekstrand  wrote:
>> On Fri, Nov 6, 2015 at 8:35 AM, Rob Clark  wrote:
>>> From: Rob Clark 
>>>
>>> Signed-off-by: Rob Clark 
>>> ---
>>>  src/glsl/nir/nir_lower_clip.c| 2 ++
>>>  src/glsl/nir/nir_lower_two_sided_color.c | 2 ++
>>>  2 files changed, 4 insertions(+)
>>>
>>> diff --git a/src/glsl/nir/nir_lower_clip.c b/src/glsl/nir/nir_lower_clip.c
>>> index 31ccfb2..4a91527 100644
>>> --- a/src/glsl/nir/nir_lower_clip.c
>>> +++ b/src/glsl/nir/nir_lower_clip.c
>>> @@ -55,9 +55,11 @@ create_clipdist_var(nir_shader *shader, unsigned drvloc,
>>>
>>> if (output) {
>>>exec_list_push_tail(>outputs, >node);
>>> +  shader->num_outputs++;
>>> }
>>> else {
>>>exec_list_push_tail(>inputs, >node);
>>> +  shader->num_inputs++;
>>
>> I'm not sure what I think about this.  Usually, num_inputs/outputs is
>> set by nir_lower_io or similar.  They don't have to be vec4's.  In the
>> i965 driver, FS inputs are in terms of floats.  Maybe tgsi_to_nir
>> provides you those guarantees but we haven't for i965.
>
> hmm, what do you recommend then?  There isn't really any
> straightforward way to run this *prior* to lower_io... tgsi->nir gives
> me something that is already i/o lowered, and what I'm doing so far w/
> gallium support for glsl->nir is doing lower_io (and a few other
> steps) in gallium so that the result the driver gets is equivalent to
> tgsi->nir..
>

btw Jason, how do you feel about stuffing the type_size fxn ptr in
nir_shader_compiler_options?  It shouldn't ever change over the
lifetime of the shader, we could drop it as arg to
nir_assign_var_locations() (err, well, replace w/ nir_shader ptr), and
we could use it to dtrt here..

BR,
-R
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[Mesa-dev] [PATCH] i965/skl/gt4: Fix URB programming restriction.

[Ben Widawsky]

The comment in the code details the restriction. Thanks to Ken for having a very
helpful conversation with me, and spotting the blurb in the link I sent him :P.

There are still stability problems for me on GT4, but this definitely helps with
some of the failures.

Cc: Kenneth Graunke 
Cc: Jordan Justen 
Cc: mesa-sta...@lists.freedesktop.org (if the original gt4 patch goes to stable)
---

Sarah, you should check this on KBL.
Cc: Sarah Sharp 
---
 src/mesa/drivers/dri/i965/brw_device_info.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_device_info.c 
b/src/mesa/drivers/dri/i965/brw_device_info.c
index 2ebc084..6117fd3 100644
--- a/src/mesa/drivers/dri/i965/brw_device_info.c
+++ b/src/mesa/drivers/dri/i965/brw_device_info.c
@@ -337,6 +337,14 @@ static const struct brw_device_info 
brw_device_info_skl_gt3 = {
 
 static const struct brw_device_info brw_device_info_skl_gt4 = {
GEN9_FEATURES, .gt = 4,
+   /* From the docs:
+*   URB is limited to 1008KB due to programming restrictions. This is not a
+*   restriction of the L3 implementation, but of the FF and other clients.
+*   Therefore, in a GT4 implementation it is possible for the programmed
+*   allocation of the L3 data array to provide 3*384KB=1152MB [sic] for 
URB,
+*   but only 1008KB of this will be used.
+*/
+   .urb.size = 1008 / 3,
 };
 
 static const struct brw_device_info brw_device_info_bxt = {
-- 
2.6.2

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[Mesa-dev] [PATCH 1/2] dri_interface: Introduce __DRI_IMAGE_USE_SCANOUT_ROTATION_* flags (v2)

[Vivek Kasireddy]

These flags can be used by the DRI driver to set additional requirements
such as tiling while creating buffers.

v2: Added a brief comment to explain the rotation orientation.

Cc: Michel Danzer 
Signed-off-by: Vivek Kasireddy 
---
 include/GL/internal/dri_interface.h | 9 +
 1 file changed, 9 insertions(+)

diff --git a/include/GL/internal/dri_interface.h 
b/include/GL/internal/dri_interface.h
index 6bbd3fa..c72c365 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -1101,6 +1101,15 @@ struct __DRIdri2ExtensionRec {
 #define __DRI_IMAGE_USE_CURSOR 0x0004 /* Depricated */
 #define __DRI_IMAGE_USE_LINEAR 0x0008
 
+/**
+ * Setting a rotation angle of 90 or 270 would result in the scanout
+ * buffer being rotated in a clounter clockwise manner. This is the
+ * expected behavior for ensuring XRandR compliance.
+ */
+#define __DRI_IMAGE_USE_SCANOUT_ROTATION_900x0010
+#define __DRI_IMAGE_USE_SCANOUT_ROTATION_180   0x0020
+#define __DRI_IMAGE_USE_SCANOUT_ROTATION_270   0x0040
+
 
 /**
  * Four CC formats that matches with WL_DRM_FORMAT_* from wayland_drm.h,
-- 
2.4.3

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[Mesa-dev] [PATCH 2/2] gbm: Add flags to enable creation of rotated scanout buffers (v4)

[Vivek Kasireddy]

For certain platforms that support rotated scanout buffers, currently,
there is no way to create them with the GBM DRI interface. These flags
will instruct the DRI driver to create the buffer by setting
additional requirements such as tiling mode.

v2: Reserve a bit per angle. (Ville and Michel)

v3:
- Combine all GBM_BO_USE_SCANOUT_ROTATION_* flags into
  GBM_BO_USE_SCANOUT_ANY macro (Michel)
- Pull the code that updates dri_use based on the rotation flag
  into a separate function.

v4:
- Added a brief comment to explain the rotation orientation.
- Augmented the helper function gbm_to_dri_flag() introduced in v3
  to handle GBM_BO_USE_CURSOR and GBM_BO_USE_LINEAR as well. (Michel)

Cc: Michel Danzer 
Cc: Ville Syrjala 
Signed-off-by: Vivek Kasireddy 
---
 src/gbm/backends/dri/gbm_dri.c | 35 +++
 src/gbm/main/gbm.h | 15 +++
 2 files changed, 38 insertions(+), 12 deletions(-)

diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
index 57cdeac..6616d37 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@ -124,6 +124,24 @@ image_get_buffers(__DRIdrawable *driDrawable,
 }
 
 static void
+gbm_to_dri_flag(uint32_t usage,
+unsigned *dri_use)
+{
+   if (usage & GBM_BO_USE_SCANOUT)
+  *dri_use |= __DRI_IMAGE_USE_SCANOUT;
+   if (usage & GBM_BO_USE_SCANOUT_ROTATION_90)
+  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_90;
+   if (usage & GBM_BO_USE_SCANOUT_ROTATION_180)
+  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_180;
+   if (usage & GBM_BO_USE_SCANOUT_ROTATION_270)
+  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_270;
+   if (usage & GBM_BO_USE_CURSOR)
+  *dri_use |= __DRI_IMAGE_USE_CURSOR;
+   if (usage & GBM_BO_USE_LINEAR)
+  *dri_use |= __DRI_IMAGE_USE_LINEAR;
+}
+
+static void
 swrast_get_drawable_info(__DRIdrawable *driDrawable,
  int   *x,
  int   *y,
@@ -539,7 +557,7 @@ gbm_dri_is_format_supported(struct gbm_device *gbm,
   break;
case GBM_BO_FORMAT_ARGB:
case GBM_FORMAT_ARGB:
-  if (usage & GBM_BO_USE_SCANOUT)
+  if (usage & GBM_BO_USE_SCANOUT_ANY)
  return 0;
   break;
default:
@@ -746,10 +764,8 @@ gbm_dri_bo_import(struct gbm_device *gbm,
 
bo->image = image;
 
-   if (usage & GBM_BO_USE_SCANOUT)
-  dri_use |= __DRI_IMAGE_USE_SCANOUT;
-   if (usage & GBM_BO_USE_CURSOR)
-  dri_use |= __DRI_IMAGE_USE_CURSOR;
+   gbm_to_dri_flag(usage, _use);
+
if (dri->image->base.version >= 2 &&
!dri->image->validateUsage(bo->image, dri_use)) {
   errno = EINVAL;
@@ -786,7 +802,7 @@ create_dumb(struct gbm_device *gbm,
 
is_cursor = (usage & GBM_BO_USE_CURSOR) != 0 &&
   format == GBM_FORMAT_ARGB;
-   is_scanout = (usage & GBM_BO_USE_SCANOUT) != 0 &&
+   is_scanout = (usage & GBM_BO_USE_SCANOUT_ANY) != 0 &&
   format == GBM_FORMAT_XRGB;
if (!is_cursor && !is_scanout) {
   errno = EINVAL;
@@ -878,12 +894,7 @@ gbm_dri_bo_create(struct gbm_device *gbm,
   goto failed;
}
 
-   if (usage & GBM_BO_USE_SCANOUT)
-  dri_use |= __DRI_IMAGE_USE_SCANOUT;
-   if (usage & GBM_BO_USE_CURSOR)
-  dri_use |= __DRI_IMAGE_USE_CURSOR;
-   if (usage & GBM_BO_USE_LINEAR)
-  dri_use |= __DRI_IMAGE_USE_LINEAR;
+   gbm_to_dri_flag(usage, _use);
 
/* Gallium drivers requires shared in order to get the handle/stride */
dri_use |= __DRI_IMAGE_USE_SHARE;
diff --git a/src/gbm/main/gbm.h b/src/gbm/main/gbm.h
index 8db2153..667fcf7 100644
--- a/src/gbm/main/gbm.h
+++ b/src/gbm/main/gbm.h
@@ -214,8 +214,23 @@ enum gbm_bo_flags {
 * Buffer is linear, i.e. not tiled.
 */
GBM_BO_USE_LINEAR = (1 << 4),
+   /**
+* Buffer would be rotated and some platforms have additional tiling
+* requirements for rotated scanout buffers.
+* And, setting a rotation angle of 90 or 270 would result in the
+* scanout buffer being rotated in a clounter clockwise manner. This
+* is the expected behavior for ensuring XRandR compliance.
+*/
+   GBM_BO_USE_SCANOUT_ROTATION_90 = (1 << 5),
+   GBM_BO_USE_SCANOUT_ROTATION_180 = (1 << 6),
+   GBM_BO_USE_SCANOUT_ROTATION_270 = (1 << 7),
 };
 
+#define GBM_BO_USE_SCANOUT_ANY (GBM_BO_USE_SCANOUT |  \
+GBM_BO_USE_SCANOUT_ROTATION_90 |  \
+GBM_BO_USE_SCANOUT_ROTATION_180 | \
+GBM_BO_USE_SCANOUT_ROTATION_270)
+
 int
 gbm_device_get_fd(struct gbm_device *gbm);
 
-- 
2.4.3

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[Mesa-dev] [PATCH 1/3] glsl: Parse shared keyword for compute shader variables

[Jordan Justen]

Signed-off-by: Jordan Justen 
---

Notes:
git://people.freedesktop.org/~jljusten/mesa cs-parse-shared-vars-v1
http://patchwork.freedesktop.org/bundle/jljusten/cs-parse-shared-vars-v1

With these environment overrides:

  export MESA_GL_VERSION_OVERRIDE=4.3
  export MESA_GLSL_VERSION_OVERRIDE=430
  export MESA_EXTENSION_OVERRIDE=GL_ARB_compute_shader

This fixes my recently posted piglit test:

  tests/spec/arb_compute_shader/compiler/shared-variables.comp
  http://patchwork.freedesktop.org/patch/63944/

 src/glsl/ast_to_hir.cpp | 2 +-
 src/glsl/glsl_lexer.ll  | 2 ++
 src/glsl/glsl_parser.yy | 6 ++
 3 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 0306530..dd5ba4e 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -3081,7 +3081,7 @@ apply_type_qualifier_to_variable(const struct 
ast_type_qualifier *qual,
if (qual->flags.q.std140 ||
qual->flags.q.std430 ||
qual->flags.q.packed ||
-   qual->flags.q.shared) {
+   (qual->flags.q.shared && (state->stage != MESA_SHADER_COMPUTE))) {
   _mesa_glsl_error(loc, state,
"uniform and shader storage block layout qualifiers "
"std140, std430, packed, and shared can only be "
diff --git a/src/glsl/glsl_lexer.ll b/src/glsl/glsl_lexer.ll
index 2142817..e59f93e 100644
--- a/src/glsl/glsl_lexer.ll
+++ b/src/glsl/glsl_lexer.ll
@@ -414,6 +414,8 @@ writeonly  KEYWORD_WITH_ALT(420, 300, 420, 310, 
yyextra->ARB_shader_image_lo
 
 atomic_uint KEYWORD_WITH_ALT(420, 300, 420, 310, 
yyextra->ARB_shader_atomic_counters_enable, ATOMIC_UINT);
 
+shared  KEYWORD_WITH_ALT(430, 310, 430, 310, 
yyextra->ARB_compute_shader_enable, SHARED);
+
 struct return STRUCT;
 void   return VOID_TOK;
 
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
index 4636435..2598356 100644
--- a/src/glsl/glsl_parser.yy
+++ b/src/glsl/glsl_parser.yy
@@ -165,6 +165,7 @@ static bool match_layout_qualifier(const char *s1, const 
char *s2,
 %token IMAGE1DSHADOW IMAGE2DSHADOW IMAGE1DARRAYSHADOW IMAGE2DARRAYSHADOW
 %token COHERENT VOLATILE RESTRICT READONLY WRITEONLY
 %token ATOMIC_UINT
+%token SHARED
 %token STRUCT VOID_TOK WHILE
 %token  IDENTIFIER TYPE_IDENTIFIER NEW_IDENTIFIER
 %type  any_identifier
@@ -1958,6 +1959,11 @@ memory_qualifier:
   memset(& $$, 0, sizeof($$));
   $$.flags.q.write_only = 1;
}
+   | SHARED
+   {
+  memset(& $$, 0, sizeof($$));
+  $$.flags.q.shared = 1;
+   }
;
 
 array_specifier:
-- 
2.6.2

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[Mesa-dev] [PATCH 3/3] glsl: Use shared storage variable type for shared variables

[Jordan Justen]

Signed-off-by: Jordan Justen 
---
 src/glsl/ast_to_hir.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index dd5ba4e..4ef770f 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -2790,6 +2790,8 @@ apply_type_qualifier_to_variable(const struct 
ast_type_qualifier *qual,
   var->data.mode = ir_var_uniform;
else if (qual->flags.q.buffer)
   var->data.mode = ir_var_shader_storage;
+   else if (qual->flags.q.shared)
+  var->data.mode = ir_var_shader_shared;
 
if (!is_parameter && is_varying_var(var, state->stage)) {
   /* User-defined ins/outs are not permitted in compute shaders. */
-- 
2.6.2

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[Mesa-dev] [PATCH 2/3] glsl: Add shared variable type

[Jordan Justen]

Shared variables are stored in a common pool accessible by all threads
in a compute shader local work group.

These variables are similar to OpenCL's local/__local variables.

Signed-off-by: Jordan Justen 
---
 src/glsl/ir.h | 15 ---
 src/glsl/ir_print_visitor.cpp |  4 ++--
 2 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index 9c9f22d..32a766e 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -322,18 +322,19 @@ protected:
  * Variable storage classes
  */
 enum ir_variable_mode {
-   ir_var_auto = 0, /**< Function local variables and globals. */
-   ir_var_uniform,  /**< Variable declared as a uniform. */
-   ir_var_shader_storage,   /**< Variable declared as an ssbo. */
+   ir_var_auto = 0, /**< Function local variables and globals. */
+   ir_var_uniform,  /**< Variable declared as a uniform. */
+   ir_var_shader_storage,   /**< Variable declared as an ssbo. */
+   ir_var_shader_shared,/**< Variable declared as shared. */
ir_var_shader_in,
ir_var_shader_out,
ir_var_function_in,
ir_var_function_out,
ir_var_function_inout,
-   ir_var_const_in,/**< "in" param that must be a constant expression */
-   ir_var_system_value, /**< Ex: front-face, instance-id, etc. */
-   ir_var_temporary,   /**< Temporary variable generated during compilation. */
-   ir_var_mode_count   /**< Number of variable modes */
+   ir_var_const_in, /**< "in" param that must be a constant 
expression */
+   ir_var_system_value, /**< Ex: front-face, instance-id, etc. */
+   ir_var_temporary,/**< Temporary variable generated during 
compilation. */
+   ir_var_mode_count/**< Number of variable modes */
 };
 
 /**
diff --git a/src/glsl/ir_print_visitor.cpp b/src/glsl/ir_print_visitor.cpp
index b919690..42b03fd 100644
--- a/src/glsl/ir_print_visitor.cpp
+++ b/src/glsl/ir_print_visitor.cpp
@@ -173,8 +173,8 @@ void ir_print_visitor::visit(ir_variable *ir)
const char *const samp = (ir->data.sample) ? "sample " : "";
const char *const patc = (ir->data.patch) ? "patch " : "";
const char *const inv = (ir->data.invariant) ? "invariant " : "";
-   const char *const mode[] = { "", "uniform ", "shader_storage",
-"shader_in ", "shader_out ",
+   const char *const mode[] = { "", "uniform ", "shader_storage ",
+"shader_shared ", "shader_in ", "shader_out ",
 "in ", "out ", "inout ",
"const_in ", "sys ", "temporary " };
STATIC_ASSERT(ARRAY_SIZE(mode) == ir_var_mode_count);
-- 
2.6.2

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Re: [Mesa-dev] [PATCH 4/6] glsl: add support for complie-time constant expressions

[Timothy Arceri]

On Fri, 2015-11-06 at 14:17 +, Emil Velikov wrote:
> Hi Tim,

Hi Emil, Thanks for taking a look over these.

> 
> In my (limited) experience going through the glsl code, I've noticed
> that in a few cases we tend to do the same "flags.q.foo &&
> validate_foo()" in a number of occasions. In some cases we silently
> ignore errors, while on others we omit checking the return value of
> validate_foo() all together.
> 
> I'm leaning that at least some of these look fishy, although I would
> appreciate any feedback (from everyone for that matter).
> Should we try to consolidate all the above pattern(s), where is the
> clear cut when we can and cannot continue if the validation fails ?

Yeah I was wondering the same thing when I started but I think in most cases
this is fine and in fact desirable. The reason to continue doing validation
even after we have hit an error is because we can have a list of qualifiers
for example:

layout(offset = 44, align = 8)

If offset is invalid we can continue on and check align so that we can return
two error messages if they are both invalid. This is a more useful way to
return error messages then doing it one at a time as the developer fixes their
code.

With compile time constants we need to skip over the rest of the validations
for the current qualifier we are processing if there is an error to avoid
returning incorrect error messages, for example if the expression is not a
constant expression we don't have any value to validate so we don't want to
return incorrect error messages.

> 
> A couple of related (and other) comments inline.
> 
> On 5 November 2015 at 11:17, Timothy Arceri  wrote:
> > From: Timothy Arceri 
> > 
> > In this patch we introduce a new ast type for holding the new
> > compile-time constant expressions. The main reason for this is that
> > we can no longer do merging of layout qualifiers before they have been
> > converted into GLSL IR.
> > 
> > The remainder of the patch replaces all the old interger constant
> > qualifiers with either the new ast_layout_expression type if
> > the qualifier requires merging or ast_expression if the qualifier
> > can't have mulitple declorations or if all but he newest qualifier
> > is simply ignored.
> > 
> > There are three main helper functions introduced in this patch:
> > 
> > - process_qualifier_constant()
> > 
> >  Used to evaluate qualifiers of type ast_expression
> > 
> > - ast_layout_expression::process_qualifier_constant()
> > 
> >  Used to merge and then evaluate qualifiers of type ast_layout_expression
> > 
> > - ast_layout_expression::merge_qualifier()
> > 
> >  Simply appends a qualifier to a list to be merged later by
> >  process_qualifier_constant()
> > 
> > In order to avoid cascading error messages the
> > process_qualifier_constant()
> > helpers return a bool.
> > ---
> >  src/glsl/ast.h  |  60 ++---
> >  src/glsl/ast_to_hir.cpp | 274 ---
> > -
> >  src/glsl/ast_type.cpp   | 128 +++
> >  src/glsl/glsl_parser.yy |  25 ++--
> >  src/glsl/glsl_parser_extras.cpp |  68 ++
> >  5 files changed, 363 insertions(+), 192 deletions(-)
> > 
> > diff --git a/src/glsl/ast.h b/src/glsl/ast.h
> > index afd2d41..8fbb5dd 100644
> > --- a/src/glsl/ast.h
> > +++ b/src/glsl/ast.h
> > @@ -350,6 +350,26 @@ public:
> > exec_list array_dimensions;
> >  };
> > 
> > +class ast_layout_expression : public ast_node {
> > +public:
> > +   ast_layout_expression(const struct YYLTYPE , ast_expression
> > *expr)
> > +   {
> > +  set_location(locp);
> > +  layout_const_expressions.push_tail(>link);
> > +   }
> > +
> > +   bool process_qualifier_constant(struct _mesa_glsl_parse_state *state,
> > +   const char *qual_indentifier,
> > +   int *value);
> > +
> > +   void merge_qualifier(ast_layout_expression *l_expr)
> > +   {
> > +  layout_const_expressions.append_list(_expr
> > ->layout_const_expressions);
> > +   }
> > +
> > +   exec_list layout_const_expressions;
> > +};
> > +
> >  /**
> >   * C-style aggregate initialization class
> >   *
> > @@ -553,13 +573,11 @@ struct ast_type_qualifier {
> >uint64_t i;
> > } flags;
> > 
> > -   struct YYLTYPE *loc;
> > -
> > /** Precision of the type (highp/medium/lowp). */
> > unsigned precision:2;
> > 
> > /** Geometry shader invocations for GL_ARB_gpu_shader5. */
> > -   int invocations;
> > +   ast_layout_expression *invocations;
> > 
> > /**
> >  * Location specified via GL_ARB_explicit_attrib_location layout
> > @@ -567,20 +585,20 @@ struct ast_type_qualifier {
> >  * \note
> >  * This field is only valid if \c explicit_location is set.
> >  */
> > -   int location;
> > +   ast_expression *location;
> > /**
> >  * Index specified via GL_ARB_explicit_attrib_location layout
> >  *
> >  * \note
> >  

Re: [Mesa-dev] [PATCH 6/7] nir: fix missing increments of num_inputs/num_outputs

[Rob Clark]

On Fri, Nov 6, 2015 at 6:23 PM, Jason Ekstrand  wrote:
> On Fri, Nov 6, 2015 at 8:35 AM, Rob Clark  wrote:
>> From: Rob Clark 
>>
>> Signed-off-by: Rob Clark 
>> ---
>>  src/glsl/nir/nir_lower_clip.c| 2 ++
>>  src/glsl/nir/nir_lower_two_sided_color.c | 2 ++
>>  2 files changed, 4 insertions(+)
>>
>> diff --git a/src/glsl/nir/nir_lower_clip.c b/src/glsl/nir/nir_lower_clip.c
>> index 31ccfb2..4a91527 100644
>> --- a/src/glsl/nir/nir_lower_clip.c
>> +++ b/src/glsl/nir/nir_lower_clip.c
>> @@ -55,9 +55,11 @@ create_clipdist_var(nir_shader *shader, unsigned drvloc,
>>
>> if (output) {
>>exec_list_push_tail(>outputs, >node);
>> +  shader->num_outputs++;
>> }
>> else {
>>exec_list_push_tail(>inputs, >node);
>> +  shader->num_inputs++;
>
> I'm not sure what I think about this.  Usually, num_inputs/outputs is
> set by nir_lower_io or similar.  They don't have to be vec4's.  In the
> i965 driver, FS inputs are in terms of floats.  Maybe tgsi_to_nir
> provides you those guarantees but we haven't for i965.

hmm, what do you recommend then?  There isn't really any
straightforward way to run this *prior* to lower_io... tgsi->nir gives
me something that is already i/o lowered, and what I'm doing so far w/
gallium support for glsl->nir is doing lower_io (and a few other
steps) in gallium so that the result the driver gets is equivalent to
tgsi->nir..

BR,
-R

> --Jason
>
>> }
>> return var;
>>  }
>> diff --git a/src/glsl/nir/nir_lower_two_sided_color.c 
>> b/src/glsl/nir/nir_lower_two_sided_color.c
>> index db519bf..269e252 100644
>> --- a/src/glsl/nir/nir_lower_two_sided_color.c
>> +++ b/src/glsl/nir/nir_lower_two_sided_color.c
>> @@ -60,6 +60,8 @@ create_input(nir_shader *shader, unsigned drvloc, 
>> gl_varying_slot slot)
>>
>> exec_list_push_tail(>inputs, >node);
>>
>> +   shader->num_inputs++;
>> +
>> return var;
>>  }
>>
>> --
>> 2.5.0
>>
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[Mesa-dev] [PATCH] glsl: simplify interface block stream qualifier validation

[Timothy Arceri]

Qualifiers on member variables are redundent all we need to do
if check if it matches the stream associated with the block and
throw an error if its not.

Cc: Samuel Iglesias Gonsalvez 
Cc: Emil Velikov 
---
 src/glsl/ast_to_hir.cpp   | 27 +--
 src/glsl/nir/glsl_types.h | 10 +-
 2 files changed, 14 insertions(+), 23 deletions(-)

diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 0306530..5a22820 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -5964,8 +5964,19 @@ ast_process_structure_or_interface_block(exec_list 
*instructions,
  fields[i].sample = qual->flags.q.sample ? 1 : 0;
  fields[i].patch = qual->flags.q.patch ? 1 : 0;
 
- /* Only save explicitly defined streams in block's field */
- fields[i].stream = qual->flags.q.explicit_stream ? qual->stream : -1;
+ /* From Section 4.4.2.3 (Geometry Outputs) of the GLSL 4.50 spec:
+  *
+  *   "A block member may be declared with a stream identifier, but
+  *   the specified stream must match the stream associated with the
+  *   containing block."
+  */
+ if (qual->flags.q.explicit_stream &&
+ qual->stream != layout->stream) {
+_mesa_glsl_error(, state, "stream layout qualifier on "
+ "interface block member `%s' does not match "
+ "the interface block (%d vs %d)",
+ fields[i].name, qual->stream, layout->stream);
+ }
 
  if (qual->flags.q.row_major || qual->flags.q.column_major) {
 if (!qual->flags.q.uniform && !qual->flags.q.buffer) {
@@ -6267,18 +6278,6 @@ ast_interface_block::hir(exec_list *instructions,
 
state->struct_specifier_depth--;
 
-   for (unsigned i = 0; i < num_variables; i++) {
-  if (fields[i].stream != -1 &&
-  (unsigned) fields[i].stream != this->layout.stream) {
- _mesa_glsl_error(, state,
-  "stream layout qualifier on "
-  "interface block member `%s' does not match "
-  "the interface block (%d vs %d)",
-  fields[i].name, fields[i].stream,
-  this->layout.stream);
-  }
-   }
-
if (!redeclaring_per_vertex) {
   validate_identifier(this->block_name, loc, state);
 
diff --git a/src/glsl/nir/glsl_types.h b/src/glsl/nir/glsl_types.h
index 52ca826..1f17ad5 100644
--- a/src/glsl/nir/glsl_types.h
+++ b/src/glsl/nir/glsl_types.h
@@ -829,13 +829,6 @@ struct glsl_struct_field {
unsigned patch:1;
 
/**
-* For interface blocks, it has a value if this variable uses multiple 
vertex
-* streams (as in ir_variable::stream). -1 otherwise.
-*/
-   int stream;
-
-
-   /**
 * Image qualifiers, applicable to buffer variables defined in shader
 * storage buffer objects (SSBOs)
 */
@@ -847,8 +840,7 @@ struct glsl_struct_field {
 
glsl_struct_field(const struct glsl_type *_type, const char *_name)
   : type(_type), name(_name), location(-1), interpolation(0), centroid(0),
-sample(0), matrix_layout(GLSL_MATRIX_LAYOUT_INHERITED), patch(0),
-stream(-1)
+sample(0), matrix_layout(GLSL_MATRIX_LAYOUT_INHERITED), patch(0)
{
   /* empty */
}
-- 
2.4.3

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Re: [Mesa-dev] [PATCH] android: fix LOCAL_C_INCLUDES to find glsl_types.h

[Mauro Rossi]

Hi Emil,

by exporting the path of glsl nir headers, mesa builds without problems.

You can find in the attachment the formatted patch.
Thanks

Mauro



2015-11-06 18:26 GMT+01:00 Emil Velikov :

> Hi Mauro
>
> On 6 November 2015 at 03:31, Mauro Rossi  wrote:
> > These changes are necessary to avoid building errors in glsl and i965
> > ---
> >  src/glsl/Android.mk  | 6 --
> >  src/mesa/drivers/dri/i965/Android.mk | 3 ++-
> >  2 files changed, 6 insertions(+), 3 deletions(-)
> >
> > diff --git a/src/glsl/Android.mk b/src/glsl/Android.mk
> > index f63b7da..6902ea4 100644
> > --- a/src/glsl/Android.mk
> > +++ b/src/glsl/Android.mk
> > @@ -42,7 +42,8 @@ LOCAL_C_INCLUDES := \
> > $(MESA_TOP)/src/mapi \
> > $(MESA_TOP)/src/mesa \
> > $(MESA_TOP)/src/gallium/include \
> > -   $(MESA_TOP)/src/gallium/auxiliary
> > +   $(MESA_TOP)/src/gallium/auxiliary \
> > +   $(MESA_TOP)/src/glsl/nir
> >
> >  LOCAL_MODULE := libmesa_glsl
> >
> > @@ -63,7 +64,8 @@ LOCAL_C_INCLUDES := \
> > $(MESA_TOP)/src/mapi \
> > $(MESA_TOP)/src/mesa \
> > $(MESA_TOP)/src/gallium/include \
> > -   $(MESA_TOP)/src/gallium/auxiliary
> > +   $(MESA_TOP)/src/gallium/auxiliary \
> > +   $(MESA_TOP)/src/glsl/nir
> >
> >  LOCAL_STATIC_LIBRARIES := libmesa_glsl libmesa_glsl_utils libmesa_util
> >
> > diff --git a/src/mesa/drivers/dri/i965/Android.mk
> b/src/mesa/drivers/dri/i965/Android.mk
> > index d30a053..f9a914a 100644
> > --- a/src/mesa/drivers/dri/i965/Android.mk
> > +++ b/src/mesa/drivers/dri/i965/Android.mk
> > @@ -45,7 +45,8 @@ LOCAL_CFLAGS += \
> >  endif
> >
> >  LOCAL_C_INCLUDES := \
> > -   $(MESA_DRI_C_INCLUDES)
> > +   $(MESA_DRI_C_INCLUDES) \
> > +   $(MESA_TOP)/src/glsl/nir
> >
> >  LOCAL_SRC_FILES := \
> > $(i965_compiler_FILES) \
>
> Following the Android way of exporting includes I believe you want the
> following
>
> diff --git a/src/glsl/Android.gen.mk b/src/glsl/Android.gen.mk
> index 6898fb0..59cc857 100644
> --- a/src/glsl/Android.gen.mk
> +++ b/src/glsl/Android.gen.mk
> @@ -38,7 +38,8 @@ LOCAL_C_INCLUDES += \
>   $(MESA_TOP)/src/glsl/nir
>
>  LOCAL_EXPORT_C_INCLUDE_DIRS += \
> - $(intermediates)/nir
> + $(intermediates)/nir \
> + $(MESA_TOP)/src/glsl/nir
>
>  LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/, \
>   $(LIBGLCPP_GENERATED_FILES) \
>
>
> Formatting might be broken (thanks gmail), although the gist is there.
> Can you give it a try (note the order is important)
>
> Thanks
> Emil
>
From 4afd21bdd79811d65163eeedc24fc2ef4295630d Mon Sep 17 00:00:00 2001
From: Mauro Rossi 
Date: Sat, 7 Nov 2015 01:23:46 +0100
Subject: [PATCH] android: export the path of glsl nir headers

The change is necessary to avoid building errors in glsl and i965
modules due to missing glsl_types.h header
---
 src/glsl/Android.gen.mk | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/glsl/Android.gen.mk b/src/glsl/Android.gen.mk
index 6898fb0..59cc857 100644
--- a/src/glsl/Android.gen.mk
+++ b/src/glsl/Android.gen.mk
@@ -38,7 +38,8 @@ LOCAL_C_INCLUDES += \
 	$(MESA_TOP)/src/glsl/nir
 
 LOCAL_EXPORT_C_INCLUDE_DIRS += \
-	$(intermediates)/nir
+	$(intermediates)/nir \
+	$(MESA_TOP)/src/glsl/nir
 
 LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/, \
 	$(LIBGLCPP_GENERATED_FILES) \
-- 
2.5.0

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Re: [Mesa-dev] [PATCH] i965/skl/gt4: Fix URB programming restriction.

[Jordan Justen]

On 2015-11-06 18:12:27, Ben Widawsky wrote:
> The comment in the code details the restriction. Thanks to Ken for having a 
> very
> helpful conversation with me, and spotting the blurb in the link I sent him 
> :P.
> 
> There are still stability problems for me on GT4, but this definitely helps 
> with
> some of the failures.

The line wrapping seems a bit too long.

Reviewed-by: Jordan Justen 

> 
> Cc: Kenneth Graunke 
> Cc: Jordan Justen 
> Cc: mesa-sta...@lists.freedesktop.org (if the original gt4 patch goes to 
> stable)
> ---
> 
> Sarah, you should check this on KBL.
> Cc: Sarah Sharp 
> ---
>  src/mesa/drivers/dri/i965/brw_device_info.c | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_device_info.c 
> b/src/mesa/drivers/dri/i965/brw_device_info.c
> index 2ebc084..6117fd3 100644
> --- a/src/mesa/drivers/dri/i965/brw_device_info.c
> +++ b/src/mesa/drivers/dri/i965/brw_device_info.c
> @@ -337,6 +337,14 @@ static const struct brw_device_info 
> brw_device_info_skl_gt3 = {
>  
>  static const struct brw_device_info brw_device_info_skl_gt4 = {
> GEN9_FEATURES, .gt = 4,
> +   /* From the docs:
> +*   URB is limited to 1008KB due to programming restrictions. This is 
> not a
> +*   restriction of the L3 implementation, but of the FF and other 
> clients.
> +*   Therefore, in a GT4 implementation it is possible for the programmed
> +*   allocation of the L3 data array to provide 3*384KB=1152MB [sic] for 
> URB,
> +*   but only 1008KB of this will be used.
> +*/
> +   .urb.size = 1008 / 3,
>  };
>  
>  static const struct brw_device_info brw_device_info_bxt = {
> -- 
> 2.6.2
> 
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Re: [Mesa-dev] [PATCH 1/3] glsl: Parse shared keyword for compute shader variables

[Timothy Arceri]

On Fri, 2015-11-06 at 17:56 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen 
> ---
> 
> Notes:
> git://people.freedesktop.org/~jljusten/mesa cs-parse-shared-vars-v1
> http://patchwork.freedesktop.org/bundle/jljusten/cs-parse-shared-vars-v1
> 
> With these environment overrides:
> 
>   export MESA_GL_VERSION_OVERRIDE=4.3
>   export MESA_GLSL_VERSION_OVERRIDE=430
>   export MESA_EXTENSION_OVERRIDE=GL_ARB_compute_shader
> 
> This fixes my recently posted piglit test:
> 
>   tests/spec/arb_compute_shader/compiler/shared-variables.comp
>   http://patchwork.freedesktop.org/patch/63944/
> 
>  src/glsl/ast_to_hir.cpp | 2 +-
>  src/glsl/glsl_lexer.ll  | 2 ++
>  src/glsl/glsl_parser.yy | 6 ++
>  3 files changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> index 0306530..dd5ba4e 100644
> --- a/src/glsl/ast_to_hir.cpp
> +++ b/src/glsl/ast_to_hir.cpp
> @@ -3081,7 +3081,7 @@ apply_type_qualifier_to_variable(const struct
> ast_type_qualifier *qual,
> if (qual->flags.q.std140 ||
> qual->flags.q.std430 ||
> qual->flags.q.packed ||
> -   qual->flags.q.shared) {
> +   (qual->flags.q.shared && (state->stage != MESA_SHADER_COMPUTE))) {

I think you should just create a new flag:

qual->flags.q.storage_shared??

The reason is so you can make use of has_storage() and has_layout() without
any hacks.

As for some more piglit suggestions:

Invalid tests:
- struct members with shared qualifier (assuming this is illegal?)

- variable with multiple storage qualifiers including a shared qualifier 
e.g. shared uniform vec4 test; 

From section 4.11 "a declaration can have at most one storage qualifier"

>_mesa_glsl_error(loc, state,
> "uniform and shader storage block layout qualifiers
> "
> "std140, std430, packed, and shared can only be "
> diff --git a/src/glsl/glsl_lexer.ll b/src/glsl/glsl_lexer.ll
> index 2142817..e59f93e 100644
> --- a/src/glsl/glsl_lexer.ll
> +++ b/src/glsl/glsl_lexer.ll
> @@ -414,6 +414,8 @@ writeonly  KEYWORD_WITH_ALT(420, 300, 420, 310,
> yyextra->ARB_shader_image_lo
>  
>  atomic_uint KEYWORD_WITH_ALT(420, 300, 420, 310, yyextra
> ->ARB_shader_atomic_counters_enable, ATOMIC_UINT);
>  
> +shared  KEYWORD_WITH_ALT(430, 310, 430, 310, yyextra
> ->ARB_compute_shader_enable, SHARED);
> +
>  struct   return STRUCT;
>  void return VOID_TOK;
>  
> diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
> index 4636435..2598356 100644
> --- a/src/glsl/glsl_parser.yy
> +++ b/src/glsl/glsl_parser.yy
> @@ -165,6 +165,7 @@ static bool match_layout_qualifier(const char *s1, const
> char *s2,
>  %token IMAGE1DSHADOW IMAGE2DSHADOW IMAGE1DARRAYSHADOW IMAGE2DARRAYSHADOW
>  %token COHERENT VOLATILE RESTRICT READONLY WRITEONLY
>  %token ATOMIC_UINT
> +%token SHARED
>  %token STRUCT VOID_TOK WHILE
>  %token  IDENTIFIER TYPE_IDENTIFIER NEW_IDENTIFIER
>  %type  any_identifier
> @@ -1958,6 +1959,11 @@ memory_qualifier:
>memset(& $$, 0, sizeof($$));
>$$.flags.q.write_only = 1;
> }
> +   | SHARED
> +   {
> +  memset(& $$, 0, sizeof($$));
> +  $$.flags.q.shared = 1;
> +   }
> ;
>  
>  array_specifier:
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Re: [Mesa-dev] [PATCH 3/3] glsl: Use shared storage variable type for shared variables

[Timothy Arceri]

On Fri, 2015-11-06 at 17:56 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen 
> ---
>  src/glsl/ast_to_hir.cpp | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> index dd5ba4e..4ef770f 100644
> --- a/src/glsl/ast_to_hir.cpp
> +++ b/src/glsl/ast_to_hir.cpp
> @@ -2790,6 +2790,8 @@ apply_type_qualifier_to_variable(const struct
> ast_type_qualifier *qual,
>var->data.mode = ir_var_uniform;
> else if (qual->flags.q.buffer)
>var->data.mode = ir_var_shader_storage;
> +   else if (qual->flags.q.shared)

If you introduce a new flag as suggested in my feedback for patch 1 then:

Reviewed-by: Timothy Arceri 

> +  var->data.mode = ir_var_shader_shared; 
> if (!is_parameter && is_varying_var(var, state->stage)) {
>/* User-defined ins/outs are not permitted in compute shaders. */
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Re: [Mesa-dev] [PATCH] i965/skl/gt4: Fix URB programming restriction.

[Kenneth Graunke]

On Friday, November 06, 2015 06:12:27 PM Ben Widawsky wrote:
> The comment in the code details the restriction. Thanks to Ken for having a 
> very
> helpful conversation with me, and spotting the blurb in the link I sent him 
> :P.
> 
> There are still stability problems for me on GT4, but this definitely helps 
> with
> some of the failures.
> 
> Cc: Kenneth Graunke 
> Cc: Jordan Justen 
> Cc: mesa-sta...@lists.freedesktop.org (if the original gt4 patch goes to 
> stable)
> ---
> 
> Sarah, you should check this on KBL.
> Cc: Sarah Sharp 
> ---
>  src/mesa/drivers/dri/i965/brw_device_info.c | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_device_info.c 
> b/src/mesa/drivers/dri/i965/brw_device_info.c
> index 2ebc084..6117fd3 100644
> --- a/src/mesa/drivers/dri/i965/brw_device_info.c
> +++ b/src/mesa/drivers/dri/i965/brw_device_info.c
> @@ -337,6 +337,14 @@ static const struct brw_device_info 
> brw_device_info_skl_gt3 = {
>  
>  static const struct brw_device_info brw_device_info_skl_gt4 = {
> GEN9_FEATURES, .gt = 4,
> +   /* From the docs:
> +*   URB is limited to 1008KB due to programming restrictions. This is 
> not a
> +*   restriction of the L3 implementation, but of the FF and other 
> clients.
> +*   Therefore, in a GT4 implementation it is possible for the programmed
> +*   allocation of the L3 data array to provide 3*384KB=1152MB [sic] for 
> URB,
> +*   but only 1008KB of this will be used.
> +*/

We should at least say which page/section this comes from (the section
name exists in the Broadwell PRM, so it's not particularly secret).

Please put the text in quotes too.  My suggested formatting:

   /* From the "L3 Allocation and Programming" documentation:
*
* "URB is limited to 1008KB due to programming restrictions.  This
*  is not a restriction of the L3 implementation, but of the FF and
*  other clients.  Therefore, in a GT4 implementation it is
*  possible for the programmed allocation of the L3 data array to
*  provide 3*384KB=1152MB [sic] for URB, but only 1008KB of this
*  will be used."
*/

Regardless,
Reviewed-by: Kenneth Graunke 

> +   .urb.size = 1008 / 3,
>  };
>  
>  static const struct brw_device_info brw_device_info_bxt = {
> 


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Re: [Mesa-dev] [PATCH 6/7] nir: fix missing increments of num_inputs/num_outputs

[Jason Ekstrand]

On Fri, Nov 6, 2015 at 5:10 PM, Rob Clark  wrote:
> On Fri, Nov 6, 2015 at 6:39 PM, Rob Clark  wrote:
>> On Fri, Nov 6, 2015 at 6:23 PM, Jason Ekstrand  wrote:
>>> On Fri, Nov 6, 2015 at 8:35 AM, Rob Clark  wrote:
 From: Rob Clark 

 Signed-off-by: Rob Clark 
 ---
  src/glsl/nir/nir_lower_clip.c| 2 ++
  src/glsl/nir/nir_lower_two_sided_color.c | 2 ++
  2 files changed, 4 insertions(+)

 diff --git a/src/glsl/nir/nir_lower_clip.c b/src/glsl/nir/nir_lower_clip.c
 index 31ccfb2..4a91527 100644
 --- a/src/glsl/nir/nir_lower_clip.c
 +++ b/src/glsl/nir/nir_lower_clip.c
 @@ -55,9 +55,11 @@ create_clipdist_var(nir_shader *shader, unsigned drvloc,

 if (output) {
exec_list_push_tail(>outputs, >node);
 +  shader->num_outputs++;
 }
 else {
exec_list_push_tail(>inputs, >node);
 +  shader->num_inputs++;
>>>
>>> I'm not sure what I think about this.  Usually, num_inputs/outputs is
>>> set by nir_lower_io or similar.  They don't have to be vec4's.  In the
>>> i965 driver, FS inputs are in terms of floats.  Maybe tgsi_to_nir
>>> provides you those guarantees but we haven't for i965.
>>
>> hmm, what do you recommend then?  There isn't really any
>> straightforward way to run this *prior* to lower_io... tgsi->nir gives
>> me something that is already i/o lowered, and what I'm doing so far w/
>> gallium support for glsl->nir is doing lower_io (and a few other
>> steps) in gallium so that the result the driver gets is equivalent to
>> tgsi->nir..

Hrm... That does make things a bit sticky.  If you'd like, you can go
ahead and push it with

Akced-by: Jason Ekstrand 

> btw Jason, how do you feel about stuffing the type_size fxn ptr in
> nir_shader_compiler_options?  It shouldn't ever change over the
> lifetime of the shader, we could drop it as arg to
> nir_assign_var_locations() (err, well, replace w/ nir_shader ptr), and
> we could use it to dtrt here..

That won't work.  The type_size function we use depends on shader
stage, gen, and type of thing we're lowering.  Stuffing it into
nir_shader_compiler_options won't work.
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Re: [Mesa-dev] [PATCH 1/3] glsl: Parse shared keyword for compute shader variables

[Timothy Arceri]

On Fri, 2015-11-06 at 17:56 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen 
> ---
> 
> Notes:
> git://people.freedesktop.org/~jljusten/mesa cs-parse-shared-vars-v1
> http://patchwork.freedesktop.org/bundle/jljusten/cs-parse-shared-vars-v1
> 
> With these environment overrides:
> 
>   export MESA_GL_VERSION_OVERRIDE=4.3
>   export MESA_GLSL_VERSION_OVERRIDE=430
>   export MESA_EXTENSION_OVERRIDE=GL_ARB_compute_shader
> 
> This fixes my recently posted piglit test:
> 
>   tests/spec/arb_compute_shader/compiler/shared-variables.comp
>   http://patchwork.freedesktop.org/patch/63944/
> 
>  src/glsl/ast_to_hir.cpp | 2 +-
>  src/glsl/glsl_lexer.ll  | 2 ++
>  src/glsl/glsl_parser.yy | 6 ++
>  3 files changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> index 0306530..dd5ba4e 100644
> --- a/src/glsl/ast_to_hir.cpp
> +++ b/src/glsl/ast_to_hir.cpp
> @@ -3081,7 +3081,7 @@ apply_type_qualifier_to_variable(const struct
> ast_type_qualifier *qual,
> if (qual->flags.q.std140 ||
> qual->flags.q.std430 ||
> qual->flags.q.packed ||
> -   qual->flags.q.shared) {
> +   (qual->flags.q.shared && (state->stage != MESA_SHADER_COMPUTE))) {
>_mesa_glsl_error(loc, state,
> "uniform and shader storage block layout qualifiers
> "
> "std140, std430, packed, and shared can only be "
> diff --git a/src/glsl/glsl_lexer.ll b/src/glsl/glsl_lexer.ll
> index 2142817..e59f93e 100644
> --- a/src/glsl/glsl_lexer.ll
> +++ b/src/glsl/glsl_lexer.ll
> @@ -414,6 +414,8 @@ writeonly  KEYWORD_WITH_ALT(420, 300, 420, 310,
> yyextra->ARB_shader_image_lo
>  
>  atomic_uint KEYWORD_WITH_ALT(420, 300, 420, 310, yyextra
> ->ARB_shader_atomic_counters_enable, ATOMIC_UINT);
>  
> +shared  KEYWORD_WITH_ALT(430, 310, 430, 310, yyextra
> ->ARB_compute_shader_enable, SHARED);
> +
>  struct   return STRUCT;
>  void return VOID_TOK;
>  
> diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
> index 4636435..2598356 100644
> --- a/src/glsl/glsl_parser.yy
> +++ b/src/glsl/glsl_parser.yy
> @@ -165,6 +165,7 @@ static bool match_layout_qualifier(const char *s1, const
> char *s2,
>  %token IMAGE1DSHADOW IMAGE2DSHADOW IMAGE1DARRAYSHADOW IMAGE2DARRAYSHADOW
>  %token COHERENT VOLATILE RESTRICT READONLY WRITEONLY
>  %token ATOMIC_UINT
> +%token SHARED
>  %token STRUCT VOID_TOK WHILE
>  %token  IDENTIFIER TYPE_IDENTIFIER NEW_IDENTIFIER
>  %type  any_identifier
> @@ -1958,6 +1959,11 @@ memory_qualifier:
>memset(& $$, 0, sizeof($$));
>$$.flags.q.write_only = 1;
> }
> +   | SHARED
> +   {
> +  memset(& $$, 0, sizeof($$));
> +  $$.flags.q.shared = 1;
> +   }

Hi Jordan,

This should be in storage_qualifier: rather than memory_qualifier:

Also it should be restricted to the computer shader stage e.g.

if (state->stage == MESA_SHADER_COMPUTE) {
  memset(& $$, 0, sizeof($$));
  $$.flags.q.shared = 1;
} else {
_mesa_glsl_error(&@1, state, "the shared storage qualifiers can only  
 "be used with compute shaders");
}

Maybe add a piglit test to make sure it fails in another stage?

> ;
>  
>  array_specifier:
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Re: [Mesa-dev] [PATCH 2/3] glsl: Add shared variable type

[Timothy Arceri]

On Fri, 2015-11-06 at 17:56 -0800, Jordan Justen wrote:
> Shared variables are stored in a common pool accessible by all threads
> in a compute shader local work group.
> 
> These variables are similar to OpenCL's local/__local variables.
> 
> Signed-off-by: Jordan Justen 

Normally whitespace changes are done in their own patch for clarity.

If you split that out then both are:

Reviewed-by: Timothy Arceri 

> ---
>  src/glsl/ir.h | 15 ---
>  src/glsl/ir_print_visitor.cpp |  4 ++--
>  2 files changed, 10 insertions(+), 9 deletions(-)
> 
> diff --git a/src/glsl/ir.h b/src/glsl/ir.h
> index 9c9f22d..32a766e 100644
> --- a/src/glsl/ir.h
> +++ b/src/glsl/ir.h
> @@ -322,18 +322,19 @@ protected:
>   * Variable storage classes
>   */
>  enum ir_variable_mode {
> -   ir_var_auto = 0, /**< Function local variables and globals. */
> -   ir_var_uniform,  /**< Variable declared as a uniform. */
> -   ir_var_shader_storage,   /**< Variable declared as an ssbo. */
> +   ir_var_auto = 0, /**< Function local variables and globals.
> */
> +   ir_var_uniform,  /**< Variable declared as a uniform. */
> +   ir_var_shader_storage,   /**< Variable declared as an ssbo. */
> +   ir_var_shader_shared,/**< Variable declared as shared. */
> ir_var_shader_in,
> ir_var_shader_out,
> ir_var_function_in,
> ir_var_function_out,
> ir_var_function_inout,
> -   ir_var_const_in,  /**< "in" param that must be a constant
> expression */
> -   ir_var_system_value, /**< Ex: front-face, instance-id, etc. */
> -   ir_var_temporary, /**< Temporary variable generated during
> compilation. */
> -   ir_var_mode_count /**< Number of variable modes */
> +   ir_var_const_in, /**< "in" param that must be a constant
> expression */
> +   ir_var_system_value, /**< Ex: front-face, instance-id, etc. */
> +   ir_var_temporary,/**< Temporary variable generated during
> compilation. */
> +   ir_var_mode_count/**< Number of variable modes */
>  };
>  
>  /**
> diff --git a/src/glsl/ir_print_visitor.cpp b/src/glsl/ir_print_visitor.cpp
> index b919690..42b03fd 100644
> --- a/src/glsl/ir_print_visitor.cpp
> +++ b/src/glsl/ir_print_visitor.cpp
> @@ -173,8 +173,8 @@ void ir_print_visitor::visit(ir_variable *ir)
> const char *const samp = (ir->data.sample) ? "sample " : "";
> const char *const patc = (ir->data.patch) ? "patch " : "";
> const char *const inv = (ir->data.invariant) ? "invariant " : "";
> -   const char *const mode[] = { "", "uniform ", "shader_storage",
> -"shader_in ", "shader_out ",
> +   const char *const mode[] = { "", "uniform ", "shader_storage ",
> +"shader_shared ", "shader_in ", "shader_out
> ",
>  "in ", "out ", "inout ",
>   "const_in ", "sys ", "temporary " };
> STATIC_ASSERT(ARRAY_SIZE(mode) == ir_var_mode_count);
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Re: [Mesa-dev] [PATCH 2/2] gbm: Add flags to enable creation of rotated scanout buffers (v4)

[Dieter Nützel]

Am 07.11.2015 04:05, schrieb Vivek Kasireddy:

For certain platforms that support rotated scanout buffers, currently,
there is no way to create them with the GBM DRI interface. These flags
will instruct the DRI driver to create the buffer by setting
additional requirements such as tiling mode.

v2: Reserve a bit per angle. (Ville and Michel)

v3:
- Combine all GBM_BO_USE_SCANOUT_ROTATION_* flags into
  GBM_BO_USE_SCANOUT_ANY macro (Michel)
- Pull the code that updates dri_use based on the rotation flag
  into a separate function.

v4:
- Added a brief comment to explain the rotation orientation.
- Augmented the helper function gbm_to_dri_flag() introduced in v3
  to handle GBM_BO_USE_CURSOR and GBM_BO_USE_LINEAR as well. (Michel)

Cc: Michel Danzer 
Cc: Ville Syrjala 
Signed-off-by: Vivek Kasireddy 
---
 src/gbm/backends/dri/gbm_dri.c | 35 
+++

 src/gbm/main/gbm.h | 15 +++
 2 files changed, 38 insertions(+), 12 deletions(-)

diff --git a/src/gbm/backends/dri/gbm_dri.c 
b/src/gbm/backends/dri/gbm_dri.c

index 57cdeac..6616d37 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@ -124,6 +124,24 @@ image_get_buffers(__DRIdrawable *driDrawable,
 }

 static void
+gbm_to_dri_flag(uint32_t usage,
+unsigned *dri_use)
+{
+   if (usage & GBM_BO_USE_SCANOUT)
+  *dri_use |= __DRI_IMAGE_USE_SCANOUT;
+   if (usage & GBM_BO_USE_SCANOUT_ROTATION_90)
+  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_90;
+   if (usage & GBM_BO_USE_SCANOUT_ROTATION_180)
+  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_180;
+   if (usage & GBM_BO_USE_SCANOUT_ROTATION_270)
+  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_270;
+   if (usage & GBM_BO_USE_CURSOR)
+  *dri_use |= __DRI_IMAGE_USE_CURSOR;
+   if (usage & GBM_BO_USE_LINEAR)
+  *dri_use |= __DRI_IMAGE_USE_LINEAR;
+}
+
+static void
 swrast_get_drawable_info(__DRIdrawable *driDrawable,
  int   *x,
  int   *y,
@@ -539,7 +557,7 @@ gbm_dri_is_format_supported(struct gbm_device *gbm,
   break;
case GBM_BO_FORMAT_ARGB:
case GBM_FORMAT_ARGB:
-  if (usage & GBM_BO_USE_SCANOUT)
+  if (usage & GBM_BO_USE_SCANOUT_ANY)
  return 0;
   break;
default:
@@ -746,10 +764,8 @@ gbm_dri_bo_import(struct gbm_device *gbm,

bo->image = image;

-   if (usage & GBM_BO_USE_SCANOUT)
-  dri_use |= __DRI_IMAGE_USE_SCANOUT;
-   if (usage & GBM_BO_USE_CURSOR)
-  dri_use |= __DRI_IMAGE_USE_CURSOR;
+   gbm_to_dri_flag(usage, _use);
+
if (dri->image->base.version >= 2 &&
!dri->image->validateUsage(bo->image, dri_use)) {
   errno = EINVAL;
@@ -786,7 +802,7 @@ create_dumb(struct gbm_device *gbm,

is_cursor = (usage & GBM_BO_USE_CURSOR) != 0 &&
   format == GBM_FORMAT_ARGB;
-   is_scanout = (usage & GBM_BO_USE_SCANOUT) != 0 &&
+   is_scanout = (usage & GBM_BO_USE_SCANOUT_ANY) != 0 &&
   format == GBM_FORMAT_XRGB;
if (!is_cursor && !is_scanout) {
   errno = EINVAL;
@@ -878,12 +894,7 @@ gbm_dri_bo_create(struct gbm_device *gbm,
   goto failed;
}

-   if (usage & GBM_BO_USE_SCANOUT)
-  dri_use |= __DRI_IMAGE_USE_SCANOUT;
-   if (usage & GBM_BO_USE_CURSOR)
-  dri_use |= __DRI_IMAGE_USE_CURSOR;
-   if (usage & GBM_BO_USE_LINEAR)
-  dri_use |= __DRI_IMAGE_USE_LINEAR;
+   gbm_to_dri_flag(usage, _use);

/* Gallium drivers requires shared in order to get the 
handle/stride */

dri_use |= __DRI_IMAGE_USE_SHARE;
diff --git a/src/gbm/main/gbm.h b/src/gbm/main/gbm.h
index 8db2153..667fcf7 100644
--- a/src/gbm/main/gbm.h
+++ b/src/gbm/main/gbm.h
@@ -214,8 +214,23 @@ enum gbm_bo_flags {
 * Buffer is linear, i.e. not tiled.
 */
GBM_BO_USE_LINEAR = (1 << 4),
+   /**
+* Buffer would be rotated and some platforms have additional 
tiling

+* requirements for rotated scanout buffers.
+* And, setting a rotation angle of 90 or 270 would result in the
+* scanout buffer being rotated in a clounter clockwise manner. 
This


Spelling: ...counter...

Greetings,
Dieter


+* is the expected behavior for ensuring XRandR compliance.
+*/
+   GBM_BO_USE_SCANOUT_ROTATION_90 = (1 << 5),
+   GBM_BO_USE_SCANOUT_ROTATION_180 = (1 << 6),
+   GBM_BO_USE_SCANOUT_ROTATION_270 = (1 << 7),
 };

+#define GBM_BO_USE_SCANOUT_ANY (GBM_BO_USE_SCANOUT |  \
+GBM_BO_USE_SCANOUT_ROTATION_90 |  \
+GBM_BO_USE_SCANOUT_ROTATION_180 | \
+GBM_BO_USE_SCANOUT_ROTATION_270)
+
 int
 gbm_device_get_fd(struct gbm_device *gbm);

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Re: [Mesa-dev] [PATCH 2/2] gbm: Add flags to enable creation of rotated scanout buffers (v3)

[Michel Dänzer]

On 06.11.2015 12:08, Vivek Kasireddy wrote:
> For certain platforms that support rotated scanout buffers, currently,
> there is no way to create them with the GBM DRI interface. These flags
> will instruct the DRI driver to create the buffer by setting
> additional requirements such as tiling mode.
> 
> v2: Reserve a bit per angle. (Ville and Michel)
> 
> v3:
> - Combine all GBM_BO_USE_SCANOUT_ROTATION_* flags into
>   GBM_BO_USE_SCANOUT_ANY macro (Michel)
> - Pull the code that updates dri_use based on the rotation flag
>   into a separate function.

[...]

> diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
> index 57cdeac..741e509 100644
> --- a/src/gbm/backends/dri/gbm_dri.c
> +++ b/src/gbm/backends/dri/gbm_dri.c
> @@ -124,6 +124,20 @@ image_get_buffers(__DRIdrawable *driDrawable,
>  }
>  
>  static void
> +gbm_to_dri_flag(uint32_t usage,
> +unsigned *dri_use)
> +{
> +   if (usage & GBM_BO_USE_SCANOUT)
> +  *dri_use |= __DRI_IMAGE_USE_SCANOUT;
> +   if (usage & GBM_BO_USE_SCANOUT_ROTATION_90)
> +  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_90;
> +   if (usage & GBM_BO_USE_SCANOUT_ROTATION_180)
> +  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_180;
> +   if (usage & GBM_BO_USE_SCANOUT_ROTATION_270)
> +  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_270;
> +}

I like the idea of this helper function, but it could handle
GBM_BO_USE_CURSOR and GBM_BO_USE_LINEAR as well. Ideally, there would be
a separate preparatory change which creates the helper function and
makes gbm_dri_bo_import and gbm_dri_bo_create use it; then this change
can just add the new flags in the helper function. If that's too much
trouble, the handling of the other flags can be moved into the helper
function in a followup change.


> diff --git a/src/gbm/main/gbm.h b/src/gbm/main/gbm.h
> index 8db2153..4bda089 100644
> --- a/src/gbm/main/gbm.h
> +++ b/src/gbm/main/gbm.h
> @@ -214,6 +214,13 @@ enum gbm_bo_flags {
>  * Buffer is linear, i.e. not tiled.
>  */
> GBM_BO_USE_LINEAR = (1 << 4),
> +   /**
> +* Buffer would be rotated and some platforms have additional tiling
> +* requirements for rotated scanout buffers.
> +*/
> +   GBM_BO_USE_SCANOUT_ROTATION_90 = (1 << 5),
> +   GBM_BO_USE_SCANOUT_ROTATION_180 = (1 << 6),
> +   GBM_BO_USE_SCANOUT_ROTATION_270 = (1 << 7),
>  };

Hmm, we should probably explicitly specify the orientation of the 90 and
270 degree rotations. Clockwise? (Same in patch 1)


> @@ -240,6 +247,10 @@ gbm_bo_create(struct gbm_device *gbm,
>  #define GBM_BO_IMPORT_WL_BUFFER 0x5501
>  #define GBM_BO_IMPORT_EGL_IMAGE 0x5502
>  #define GBM_BO_IMPORT_FD0x5503
> +#define GBM_BO_USE_SCANOUT_ANY (GBM_BO_USE_SCANOUT |   \
> + GBM_BO_USE_SCANOUT_ROTATION_90 |  \
> + GBM_BO_USE_SCANOUT_ROTATION_180 | \
> + GBM_BO_USE_SCANOUT_ROTATION_170)
>  
>  struct gbm_import_fd_data {
> int fd;
> 

Please add the define after the definition of enum gbm_bo_flags instead
of here.


Other than that, these are starting to look pretty good to me.


-- 
Earthling Michel Dänzer   |   http://www.amd.com
Libre software enthusiast | Mesa and X developer
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Re: [Mesa-dev] [PATCH] nvc0: enable compute support on Fermi

[Hans de Goede]

Hi,

On 06-11-15 00:51, Samuel Pitoiset wrote:



On 11/06/2015 12:43 AM, Ilia Mirkin wrote:

On Thu, Nov 5, 2015 at 6:41 PM, Samuel Pitoiset
 wrote:

Altough the compute support is still not complete because textures and
surfaces need to be implemented, it allows to launch very simple compute
kernel like one which reads reading MP performance counters.


Didn't those end up breaking 3d rendering? Have you figured out what
was overwriting what?


This doesn't break any stuff related to 3D rendering. The compute kernel for 
reading perf counters has been tested a lot on different chips.

The compute support is already enabled on Kepler and it doesn't seem to break 
3D rendering, btw.

In the series which fixed those perf counters, I actually introduced a bug 
which has been fixed since: fc5ae0c13f71f049065b1422c20491d2264ae164





This turns on PIPE_CAP_COMPUTE and PIPE_SHADER_COMPUTE.

Signed-off-by: Samuel Pitoiset 
---
  src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 4 +---
  1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 7d96977..5b7b39b 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -186,7 +186,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
 case PIPE_CAP_COMPUTE:
-  return (class_3d == NVE4_3D_CLASS) ? 1 : 0;
+  return 1;


Of course this also enables it for NVF0_3D_CLASS. Pretty sure compute
doesn't work there for some dumb reason (like we're missing some in
our ctxsw fw...)


Hmm, my only compute capable card actually is a nvf0 card (gk208 based). Can you
provide some quick test instructions how I can test compute on that card
(with the patch from this thread applied) ?

And if it does not work, any suggestions how to go about debugging this ?
Or better any info I can provide to help you debug this :)

Regards,

Hans
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Re: [Mesa-dev] [PATCH v3 1/3] glsl: Add new barrier functions for compute shaders

[Francisco Jerez]

Jordan Justen  writes:

> When these functions are called in GLSL code, we create an intrinsic
> function call:
>
>  * groupMemoryBarrier => __intrinsic_group_memory_barrier
>  * memoryBarrierAtomicCounter => __intrinsic_memory_barrier_atomic_counter
>  * memoryBarrierBuffer => __intrinsic_memory_barrier_buffer
>  * memoryBarrierImage => __intrinsic_memory_barrier_image
>  * memoryBarrierShared => __intrinsic_memory_barrier_shared
>
> v2:
>  * Consolidate with memoryBarrier function/intrinsic creation (curro)
>
> v3:
>  * Instead of add_memory_barrier_function, add an intrinsic_name
>parameter to _memory_barrier (curro)
>
> Signed-off-by: Jordan Justen 
> Cc: Francisco Jerez 

Reviewed-by: Francisco Jerez 

> ---
>  src/glsl/builtin_functions.cpp | 55 
> +-
>  1 file changed, 49 insertions(+), 6 deletions(-)
>
> diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
> index 509a57b..1349444 100644
> --- a/src/glsl/builtin_functions.cpp
> +++ b/src/glsl/builtin_functions.cpp
> @@ -459,9 +459,15 @@ fp64(const _mesa_glsl_parse_state *state)
>  }
>  
>  static bool
> +compute_shader(const _mesa_glsl_parse_state *state)
> +{
> +   return state->stage == MESA_SHADER_COMPUTE;
> +}
> +
> +static bool
>  barrier_supported(const _mesa_glsl_parse_state *state)
>  {
> -   return state->stage == MESA_SHADER_COMPUTE ||
> +   return compute_shader(state) ||
>state->stage == MESA_SHADER_TESS_CTRL;
>  }
>  
> @@ -785,8 +791,8 @@ private:
>  
> ir_function_signature *_memory_barrier_intrinsic(
>builtin_available_predicate avail);
> -   ir_function_signature *_memory_barrier(
> -  builtin_available_predicate avail);
> +   ir_function_signature *_memory_barrier(const char *intrinsic_name,
> +  builtin_available_predicate avail);
>  
> ir_function_signature 
> *_shader_clock_intrinsic(builtin_available_predicate avail,
>const glsl_type *type);
> @@ -963,6 +969,21 @@ builtin_builder::create_intrinsics()
> add_function("__intrinsic_memory_barrier",
>  _memory_barrier_intrinsic(shader_image_load_store),
>  NULL);
> +   add_function("__intrinsic_group_memory_barrier",
> +_memory_barrier_intrinsic(compute_shader),
> +NULL);
> +   add_function("__intrinsic_memory_barrier_atomic_counter",
> +_memory_barrier_intrinsic(compute_shader),
> +NULL);
> +   add_function("__intrinsic_memory_barrier_buffer",
> +_memory_barrier_intrinsic(compute_shader),
> +NULL);
> +   add_function("__intrinsic_memory_barrier_image",
> +_memory_barrier_intrinsic(compute_shader),
> +NULL);
> +   add_function("__intrinsic_memory_barrier_shared",
> +_memory_barrier_intrinsic(compute_shader),
> +NULL);
>  
> add_function("__intrinsic_shader_clock",
>  _shader_clock_intrinsic(shader_clock,
> @@ -2754,7 +2775,28 @@ builtin_builder::create_builtins()
> add_image_functions(true);
>  
> add_function("memoryBarrier",
> -_memory_barrier(shader_image_load_store),
> +_memory_barrier("__intrinsic_memory_barrier",
> +shader_image_load_store),
> +NULL);
> +   add_function("groupMemoryBarrier",
> +_memory_barrier("__intrinsic_group_memory_barrier",
> +compute_shader),
> +NULL);
> +   add_function("memoryBarrierAtomicCounter",
> +_memory_barrier("__intrinsic_memory_barrier_atomic_counter",
> +compute_shader),
> +NULL);
> +   add_function("memoryBarrierBuffer",
> +_memory_barrier("__intrinsic_memory_barrier_buffer",
> +compute_shader),
> +NULL);
> +   add_function("memoryBarrierImage",
> +_memory_barrier("__intrinsic_memory_barrier_image",
> +compute_shader),
> +NULL);
> +   add_function("memoryBarrierShared",
> +_memory_barrier("__intrinsic_memory_barrier_shared",
> +compute_shader),
>  NULL);
>  
> add_function("clock2x32ARB",
> @@ -5264,10 +5306,11 @@ 
> builtin_builder::_memory_barrier_intrinsic(builtin_available_predicate avail)
>  }
>  
>  ir_function_signature *
> -builtin_builder::_memory_barrier(builtin_available_predicate avail)
> +builtin_builder::_memory_barrier(const char *intrinsic_name,
> + builtin_available_predicate avail)
>  {
> MAKE_SIG(glsl_type::void_type, avail, 0);
> -   
> 

[Mesa-dev] [PATCH v2 3/4] vl/buffers: add RGBX and BGRX to the supported formats

[Julien Isorce]

Useful is one wants to create RGBX or BGRX surfaces.
The infrastructure is such that it required just a
few definitions to support these formats.

Signed-off-by: Julien Isorce 
---
 src/gallium/auxiliary/vl/vl_video_buffer.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/src/gallium/auxiliary/vl/vl_video_buffer.c 
b/src/gallium/auxiliary/vl/vl_video_buffer.c
index 5e0ae0e..6cd2557 100644
--- a/src/gallium/auxiliary/vl/vl_video_buffer.c
+++ b/src/gallium/auxiliary/vl/vl_video_buffer.c
@@ -62,6 +62,18 @@ const enum pipe_format const_resource_formats_VUYA[3] = {
PIPE_FORMAT_NONE
 };
 
+const enum pipe_format const_resource_formats_YUVX[3] = {
+   PIPE_FORMAT_R8G8B8X8_UNORM,
+   PIPE_FORMAT_NONE,
+   PIPE_FORMAT_NONE
+};
+
+const enum pipe_format const_resource_formats_VUYX[3] = {
+   PIPE_FORMAT_B8G8R8X8_UNORM,
+   PIPE_FORMAT_NONE,
+   PIPE_FORMAT_NONE
+};
+
 const enum pipe_format const_resource_formats_YUYV[3] = {
PIPE_FORMAT_R8G8_R8B8_UNORM,
PIPE_FORMAT_NONE,
@@ -102,6 +114,12 @@ vl_video_buffer_formats(struct pipe_screen *screen, enum 
pipe_format format)
case PIPE_FORMAT_B8G8R8A8_UNORM:
   return const_resource_formats_VUYA;
 
+   case PIPE_FORMAT_R8G8B8X8_UNORM:
+  return const_resource_formats_VUYX;
+
+   case PIPE_FORMAT_B8G8R8X8_UNORM:
+  return const_resource_formats_VUYX;
+
case PIPE_FORMAT_YUYV:
   return const_resource_formats_YUYV;
 
-- 
1.9.1

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[Mesa-dev] [PATCH v2 2/4] st/va: properly use brackets in vlVaAcquireBufferHandle's switch

[Julien Isorce]

In "switch (mem_type)" the brackets were surrounding "case+default"
instead of "case" only.

Signed-off-by: Julien Isorce 
---
 src/gallium/state_trackers/va/buffer.c | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/src/gallium/state_trackers/va/buffer.c 
b/src/gallium/state_trackers/va/buffer.c
index 47bf35a..769305e 100644
--- a/src/gallium/state_trackers/va/buffer.c
+++ b/src/gallium/state_trackers/va/buffer.c
@@ -280,15 +280,14 @@ vlVaAcquireBufferHandle(VADriverContextP ctx, VABufferID 
buf_id,
 
  buf_info->handle = (intptr_t)whandle.handle;
  break;
+  }
   default:
  return VA_STATUS_ERROR_UNSUPPORTED_MEMORY_TYPE;
   }
-   }
-
-   buf_info->type = buf->type;
-   buf_info->mem_type = mem_type;
-   buf_info->mem_size = buf->num_elements * buf->size;
 
+  buf_info->type = buf->type;
+  buf_info->mem_type = mem_type;
+  buf_info->mem_size = buf->num_elements * buf->size;
}
 
buf->export_refcount++;
-- 
1.9.1

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[Mesa-dev] [PATCH v2 1/4] st/va: properly indent buffer.c, config.c, image.c and picture.c

[Julien Isorce]

Some lines were using 4 indentation spaces instead of 3.

The switch in vlVaAcquireBufferHandle actually had wrong brackets
surrounding case+default.

Signed-off-by: Julien Isorce 
---
 src/gallium/state_trackers/va/buffer.c  | 14 +++---
 src/gallium/state_trackers/va/config.c  | 12 ++---
 src/gallium/state_trackers/va/image.c   |  4 +-
 src/gallium/state_trackers/va/picture.c | 82 -
 4 files changed, 56 insertions(+), 56 deletions(-)

diff --git a/src/gallium/state_trackers/va/buffer.c 
b/src/gallium/state_trackers/va/buffer.c
index 71a6503..47bf35a 100644
--- a/src/gallium/state_trackers/va/buffer.c
+++ b/src/gallium/state_trackers/va/buffer.c
@@ -152,11 +152,11 @@ vlVaUnmapBuffer(VADriverContextP ctx, VABufferID buf_id)
   return VA_STATUS_ERROR_INVALID_BUFFER;
 
if (buf->derived_surface.resource) {
- if (!buf->derived_surface.transfer)
-return VA_STATUS_ERROR_INVALID_BUFFER;
+  if (!buf->derived_surface.transfer)
+ return VA_STATUS_ERROR_INVALID_BUFFER;
 
- pipe_buffer_unmap(drv->pipe, buf->derived_surface.transfer);
- buf->derived_surface.transfer = NULL;
+  pipe_buffer_unmap(drv->pipe, buf->derived_surface.transfer);
+  buf->derived_surface.transfer = NULL;
}
 
return VA_STATUS_SUCCESS;
@@ -175,10 +175,10 @@ vlVaDestroyBuffer(VADriverContextP ctx, VABufferID buf_id)
   return VA_STATUS_ERROR_INVALID_BUFFER;
 
if (buf->derived_surface.resource) {
- if (buf->export_refcount > 0)
-   return VA_STATUS_ERROR_INVALID_BUFFER;
+  if (buf->export_refcount > 0)
+ return VA_STATUS_ERROR_INVALID_BUFFER;
 
- pipe_resource_reference(>derived_surface.resource, NULL);
+  pipe_resource_reference(>derived_surface.resource, NULL);
}
 
FREE(buf->data);
diff --git a/src/gallium/state_trackers/va/config.c 
b/src/gallium/state_trackers/va/config.c
index 0f47aac..a545a18 100644
--- a/src/gallium/state_trackers/va/config.c
+++ b/src/gallium/state_trackers/va/config.c
@@ -71,8 +71,8 @@ vlVaQueryConfigEntrypoints(VADriverContextP ctx, VAProfile 
profile,
*num_entrypoints = 0;
 
if (profile == VAProfileNone) {
-   entrypoint_list[(*num_entrypoints)++] = VAEntrypointVideoProc;
-   return VA_STATUS_SUCCESS;
+  entrypoint_list[(*num_entrypoints)++] = VAEntrypointVideoProc;
+  return VA_STATUS_SUCCESS;
}
 
p = ProfileToPipe(profile);
@@ -104,7 +104,7 @@ vlVaGetConfigAttributes(VADriverContextP ctx, VAProfile 
profile, VAEntrypoint en
  value = VA_RT_FORMAT_YUV420;
  break;
   case VAConfigAttribRateControl:
-value = VA_RC_NONE;
+ value = VA_RC_NONE;
  break;
   default:
  value = VA_ATTRIB_NOT_SUPPORTED;
@@ -127,8 +127,8 @@ vlVaCreateConfig(VADriverContextP ctx, VAProfile profile, 
VAEntrypoint entrypoin
   return VA_STATUS_ERROR_INVALID_CONTEXT;
 
if (profile == VAProfileNone && entrypoint == VAEntrypointVideoProc) {
-   *config_id = PIPE_VIDEO_PROFILE_UNKNOWN;
-   return VA_STATUS_SUCCESS;
+  *config_id = PIPE_VIDEO_PROFILE_UNKNOWN;
+  return VA_STATUS_SUCCESS;
}
 
p = ProfileToPipe(profile);
@@ -167,7 +167,7 @@ vlVaQueryConfigAttributes(VADriverContextP ctx, VAConfigID 
config_id, VAProfile
 
if (config_id == PIPE_VIDEO_PROFILE_UNKNOWN) {
   *entrypoint = VAEntrypointVideoProc;
-   *num_attribs = 0;
+  *num_attribs = 0;
   return VA_STATUS_SUCCESS;
}
 
diff --git a/src/gallium/state_trackers/va/image.c 
b/src/gallium/state_trackers/va/image.c
index c6d0c5a..ae07da8 100644
--- a/src/gallium/state_trackers/va/image.c
+++ b/src/gallium/state_trackers/va/image.c
@@ -447,8 +447,8 @@ vlVaPutImage(VADriverContextP ctx, VASurfaceID surface, 
VAImageID image,
   tmp_buf = drv->pipe->create_video_buffer(drv->pipe, >templat);
 
   if (!tmp_buf) {
-  surf->templat.buffer_format = old_surf_format;
-  return VA_STATUS_ERROR_ALLOCATION_FAILED;
+ surf->templat.buffer_format = old_surf_format;
+ return VA_STATUS_ERROR_ALLOCATION_FAILED;
   }
 
   surf->buffer->destroy(surf->buffer);
diff --git a/src/gallium/state_trackers/va/picture.c 
b/src/gallium/state_trackers/va/picture.c
index e850689..644b848 100644
--- a/src/gallium/state_trackers/va/picture.c
+++ b/src/gallium/state_trackers/va/picture.c
@@ -65,7 +65,7 @@ vlVaBeginPicture(VADriverContextP ctx, VAContextID 
context_id, VASurfaceID rende
   if ((context->target->buffer_format != PIPE_FORMAT_B8G8R8A8_UNORM  &&
context->target->buffer_format != PIPE_FORMAT_R8G8B8A8_UNORM) ||
context->target->interlaced)
-  return VA_STATUS_ERROR_UNIMPLEMENTED;
+ return VA_STATUS_ERROR_UNIMPLEMENTED;
   return VA_STATUS_SUCCESS;
}
 
@@ -717,60 +717,60 @@ handleVASliceDataBufferType(vlVaContext *context, 
vlVaBuffer *buf)
 static VAStatus
 handleVAProcPipelineParameterBufferType(vlVaDriver *drv, vlVaContext *context, 

[Mesa-dev] [PATCH v2 4/4] st/va: add support for RGBX and BGRX in VPP

[Julien Isorce]

Before it was only possible to convert a NV12 surface to
RGBA or BGRA. This patch uses the same post processing
function, "handleVAProcPipelineParameterBufferType", but
add definitions for RGBX and BGRX.

This patch also makes vlVaQuerySurfaceAttributes more generic
to avoid copy and pasting the same lines.

Signed-off-by: Julien Isorce 
---
 src/gallium/state_trackers/va/picture.c |  5 +++--
 src/gallium/state_trackers/va/surface.c | 36 ++---
 2 files changed, 23 insertions(+), 18 deletions(-)

diff --git a/src/gallium/state_trackers/va/picture.c 
b/src/gallium/state_trackers/va/picture.c
index 644b848..d6cdbea 100644
--- a/src/gallium/state_trackers/va/picture.c
+++ b/src/gallium/state_trackers/va/picture.c
@@ -59,11 +59,12 @@ vlVaBeginPicture(VADriverContextP ctx, VAContextID 
context_id, VASurfaceID rende
   return VA_STATUS_ERROR_INVALID_SURFACE;
 
context->target = surf->buffer;
-
if (!context->decoder) {
   /* VPP */
   if ((context->target->buffer_format != PIPE_FORMAT_B8G8R8A8_UNORM  &&
-   context->target->buffer_format != PIPE_FORMAT_R8G8B8A8_UNORM) ||
+   context->target->buffer_format != PIPE_FORMAT_R8G8B8A8_UNORM  &&
+   context->target->buffer_format != PIPE_FORMAT_B8G8R8X8_UNORM  &&
+   context->target->buffer_format != PIPE_FORMAT_R8G8B8X8_UNORM) ||
context->target->interlaced)
  return VA_STATUS_ERROR_UNIMPLEMENTED;
   return VA_STATUS_SUCCESS;
diff --git a/src/gallium/state_trackers/va/surface.c 
b/src/gallium/state_trackers/va/surface.c
index 3db21c3..589d686 100644
--- a/src/gallium/state_trackers/va/surface.c
+++ b/src/gallium/state_trackers/va/surface.c
@@ -45,6 +45,11 @@
 
 #include 
 
+static const enum pipe_format vpp_surface_formats[] = {
+   PIPE_FORMAT_B8G8R8A8_UNORM, PIPE_FORMAT_R8G8B8A8_UNORM,
+   PIPE_FORMAT_B8G8R8X8_UNORM, PIPE_FORMAT_R8G8B8X8_UNORM
+};
+
 VAStatus
 vlVaCreateSurfaces(VADriverContextP ctx, int width, int height, int format,
int num_surfaces, VASurfaceID *surfaces)
@@ -314,7 +319,9 @@ vlVaQuerySurfaceAttributes(VADriverContextP ctx, VAConfigID 
config,
vlVaDriver *drv;
VASurfaceAttrib *attribs;
struct pipe_screen *pscreen;
-   int i;
+   int i, j;
+
+   STATIC_ASSERT(ARRAY_SIZE(vpp_surface_formats) <= VL_VA_MAX_IMAGE_FORMATS);
 
if (config == VA_INVALID_ID)
   return VA_STATUS_ERROR_INVALID_CONFIG;
@@ -323,7 +330,7 @@ vlVaQuerySurfaceAttributes(VADriverContextP ctx, VAConfigID 
config,
   return VA_STATUS_ERROR_INVALID_PARAMETER;
 
if (!attrib_list) {
-  *num_attribs = VASurfaceAttribCount;
+  *num_attribs = VL_VA_MAX_IMAGE_FORMATS + VASurfaceAttribCount;
   return VA_STATUS_SUCCESS;
}
 
@@ -340,27 +347,24 @@ vlVaQuerySurfaceAttributes(VADriverContextP ctx, 
VAConfigID config,
if (!pscreen)
   return VA_STATUS_ERROR_INVALID_CONTEXT;
 
-   attribs = CALLOC(VASurfaceAttribCount, sizeof(VASurfaceAttrib));
+   attribs = CALLOC(VL_VA_MAX_IMAGE_FORMATS + VASurfaceAttribCount,
+sizeof(VASurfaceAttrib));
 
if (!attribs)
   return VA_STATUS_ERROR_ALLOCATION_FAILED;
 
i = 0;
 
+   /* vlVaCreateConfig returns PIPE_VIDEO_PROFILE_UNKNOWN
+* only for VAEntrypointVideoProc. */
if (config == PIPE_VIDEO_PROFILE_UNKNOWN) {
-  /* vlVaCreateConfig returns PIPE_VIDEO_PROFILE_UNKNOWN
-  only for VAEntrypointVideoProc. */
-  attribs[i].type = VASurfaceAttribPixelFormat;
-  attribs[i].value.type = VAGenericValueTypeInteger;
-  attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | 
VA_SURFACE_ATTRIB_SETTABLE;
-  attribs[i].value.value.i = VA_FOURCC_BGRA;
-  i++;
-
-  attribs[i].type = VASurfaceAttribPixelFormat;
-  attribs[i].value.type = VAGenericValueTypeInteger;
-  attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | 
VA_SURFACE_ATTRIB_SETTABLE;
-  attribs[i].value.value.i = VA_FOURCC_RGBA;
-  i++;
+  for (j = 0; j < ARRAY_SIZE(vpp_surface_formats); ++j) {
+ attribs[i].type = VASurfaceAttribPixelFormat;
+ attribs[i].value.type = VAGenericValueTypeInteger;
+ attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | 
VA_SURFACE_ATTRIB_SETTABLE;
+ attribs[i].value.value.i = 
PipeFormatToVaFourcc(vpp_surface_formats[j]);
+ i++;
+  }
} else {
   /* Assume VAEntrypointVLD for now. */
   attribs[i].type = VASurfaceAttribPixelFormat;
-- 
1.9.1

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[Mesa-dev] [PATCH] radeon/uvd: add H.265/HEVC to legal notes

[Christian König]

From: Christian König 

Signed-off-by: Christian König 
---
 docs/README.UVD | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/docs/README.UVD b/docs/README.UVD
index 38ea864..b0f4b9d 100644
--- a/docs/README.UVD
+++ b/docs/README.UVD
@@ -2,8 +2,8 @@ The software may implement third party technologies (e.g. third 
party
 libraries) that are not licensed to you by AMD and for which you may need
 to obtain licenses from other parties.  Unless explicitly stated otherwise,
 these third party technologies are not licensed hereunder.  Such third
-party technologies include, but are not limited, to H.264, MPEG-2, MPEG-4,
-AVC, and VC-1.
+party technologies include, but are not limited, to H.264, H.265, HEVC, MPEG-2,
+MPEG-4, AVC, and VC-1.
 
 For MPEG-2 Encoding Products ANY USE OF THIS PRODUCT IN ANY MANNER OTHER
 THAN PERSONAL USE THAT COMPLIES WITH THE MPEG-2 STANDARD FOR ENCODING VIDEO
-- 
1.9.1

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Re: [Mesa-dev] memoryBarrier + SSBO

[Marek Olšák]

On Tue, Nov 3, 2015 at 8:40 PM, Ilia Mirkin  wrote:
> Ian, any comment on this?
>
> On Fri, Sep 25, 2015 at 1:32 PM, Ilia Mirkin  wrote:
>> Hi Ian (and other spec experts),
>>
>> The ARB_ssbo spec mentions the following:
>>
>> OpenGL 4.0 (either core or compatibility profile) is required.
>>
>> ...
>>
>> Additionally, the shading language provides the memoryBarrier() function
>> to control the relative order of memory accesses within individual shader
>> invocations and provides various memory qualifiers controlling how the
>> memory corresponding to individual variables is accessed.
>>
>> However the memoryBarrier() function only becomes available in GLSL
>> 4.20 [along with the glMemoryBarrier() function that the spec also
>> refers to] or with ARB_shader_image_load_store.
>>
>> Is the implication that such functionality should be auto-exposed in
>> image-less drivers that support ssbo? Or that this functionality
>> should just not exist unless images are supported?

That looks like a spec bug. If the spec says "the shading language provides
the memoryBarrier", it should provide it.

Marek
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Re: [Mesa-dev] [PATCH] nvc0: enable compute support on Fermi

[Samuel Pitoiset]

On 11/06/2015 11:23 AM, Hans de Goede wrote:

Hi,

On 06-11-15 00:51, Samuel Pitoiset wrote:



On 11/06/2015 12:43 AM, Ilia Mirkin wrote:

On Thu, Nov 5, 2015 at 6:41 PM, Samuel Pitoiset
 wrote:

Altough the compute support is still not complete because textures and
surfaces need to be implemented, it allows to launch very simple
compute
kernel like one which reads reading MP performance counters.


Didn't those end up breaking 3d rendering? Have you figured out what
was overwriting what?


This doesn't break any stuff related to 3D rendering. The compute
kernel for reading perf counters has been tested a lot on different
chips.

The compute support is already enabled on Kepler and it doesn't seem
to break 3D rendering, btw.

In the series which fixed those perf counters, I actually introduced a
bug which has been fixed since: fc5ae0c13f71f049065b1422c20491d2264ae164





This turns on PIPE_CAP_COMPUTE and PIPE_SHADER_COMPUTE.

Signed-off-by: Samuel Pitoiset 
---
  src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 4 +---
  1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 7d96977..5b7b39b 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -186,7 +186,7 @@ nvc0_screen_get_param(struct pipe_screen
*pscreen, enum pipe_cap param)
 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
 case PIPE_CAP_COMPUTE:
-  return (class_3d == NVE4_3D_CLASS) ? 1 : 0;
+  return 1;


Of course this also enables it for NVF0_3D_CLASS. Pretty sure compute
doesn't work there for some dumb reason (like we're missing some in
our ctxsw fw...)


Hmm, my only compute capable card actually is a nvf0 card (gk208 based).
Can you
provide some quick test instructions how I can test compute on that card
(with the patch from this thread applied) ?

And if it does not work, any suggestions how to go about debugging this ?
Or better any info I can provide to help you debug this :)



Unfortunately, the compute support is only supported on Fermi and Kepler 
(< GK110).


I could have a look and implement it for your card but since I don't 
have this chipset, this is not going to be easy.


Anyway, the first step is to trace what the blob does using 
valgrind-mmt. Basically, the vectorAdd sample in CUDA should do the job


http://nouveau.freedesktop.org/wiki/Valgrind-mmt/

Once it's done, please send me the MMT trace.

But the quickest way for you to test that compute support would be to 
have a chip < GK110 :-)



Regards,

Hans


--
-Samuel
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[Mesa-dev] [PATCH 2/2] radeon/uvd: fix VC-1 simple/main profile decode v2

[Christian König]

From: Boyuan Zhang 

We just needed to set the extra width/height fields to get this working.

v2 (chk): rebased, CC stable added, commit message added, fixed coding style

Signed-off-by: Boyuan Zhang 
Signed-off-by: Christian König 
Cc: "10.6 11.0" 
---
 src/gallium/drivers/radeon/radeon_uvd.c   | 6 ++
 src/gallium/drivers/radeon/radeon_video.c | 3 +--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c 
b/src/gallium/drivers/radeon/radeon_uvd.c
index 33b0136..0c643e5 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -947,6 +947,12 @@ static void ruvd_end_frame(struct pipe_video_codec 
*decoder,
dec->msg->body.decode.width_in_samples = dec->base.width;
dec->msg->body.decode.height_in_samples = dec->base.height;
 
+   if ((picture->profile == PIPE_VIDEO_PROFILE_VC1_SIMPLE) ||
+   (picture->profile == PIPE_VIDEO_PROFILE_VC1_MAIN)) {
+   dec->msg->body.decode.width_in_samples = 
align(dec->msg->body.decode.width_in_samples, 16) / 16;
+   dec->msg->body.decode.height_in_samples = 
align(dec->msg->body.decode.height_in_samples, 16) / 16;
+   }
+
dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
dec->msg->body.decode.bsd_size = bs_size;
dec->msg->body.decode.db_pitch = dec->base.width;
diff --git a/src/gallium/drivers/radeon/radeon_video.c 
b/src/gallium/drivers/radeon/radeon_video.c
index 32bfc32..f56c6cf 100644
--- a/src/gallium/drivers/radeon/radeon_video.c
+++ b/src/gallium/drivers/radeon/radeon_video.c
@@ -244,8 +244,7 @@ int rvid_get_video_param(struct pipe_screen *screen,
return codec != PIPE_VIDEO_FORMAT_MPEG4;
return true;
case PIPE_VIDEO_FORMAT_VC1:
-   /* FIXME: VC-1 simple/main profile is broken */
-   return profile == PIPE_VIDEO_PROFILE_VC1_ADVANCED;
+   return true;
case PIPE_VIDEO_FORMAT_HEVC:
/* Carrizo only supports HEVC Main */
return rscreen->family >= CHIP_CARRIZO &&
-- 
1.9.1

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[Mesa-dev] [PATCH 1/2] st/vaapi: fix vaapi VC-1 simple/main corruption v2

[Christian König]

From: Boyuan Zhang 

Apply the start code fix only to advanced profile.

v2 (chk): add commit message

Signed-off-by: Boyuan Zhang 
Reviewed-by: Christian König 
Cc: "10.6 11.0" 
---
 src/gallium/state_trackers/va/picture.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/state_trackers/va/picture.c 
b/src/gallium/state_trackers/va/picture.c
index e850689..f9593fe 100644
--- a/src/gallium/state_trackers/va/picture.c
+++ b/src/gallium/state_trackers/va/picture.c
@@ -693,8 +693,10 @@ handleVASliceDataBufferType(vlVaContext *context, 
vlVaBuffer *buf)
   bufHasStartcode(buf, 0x010b, 32))
  break;
 
+  if (context->decoder->profile == PIPE_VIDEO_PROFILE_VC1_ADVANCED) {
  buffers[num_buffers] = (void *const)_code_vc1;
  sizes[num_buffers++] = sizeof(start_code_vc1);
+  }
   break;
case PIPE_VIDEO_FORMAT_MPEG4:
   if (bufHasStartcode(buf, 0x01, 24))
-- 
1.9.1

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[Mesa-dev] fix VC-1 simple/main profile

[Christian König]

Hi list,

we haven't fixed all the issues yet, but this is a clearly step in the
right direction.

If nobody has any more objections I'm going to push these by the end of today.

Regards,
Christian.

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Re: [Mesa-dev] [PATCH] winsys/radeon: Use CPU page size instead of hardcoding 4096 bytes v2

[Marek Olšák]

On Wed, Nov 4, 2015 at 11:05 AM, Michel Dänzer  wrote:
> From: Michel Dänzer 
>
> Fixes GPUVM conflicts with non-4K page size.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92738
>
> v2: Replace sanitization of VM base address alignment with comment why
> that's not necessary.
>
> Cc: mesa-sta...@lists.freedesktop.org
> Signed-off-by: Michel Dänzer 
> Reviewed-by: Christian König  (v1)
> ---
>
> Christian, does this address your concern? I think making the alignment
> larger than necessary would be confusing as well.
>
>  src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 30 
> +--
>  1 file changed, 19 insertions(+), 11 deletions(-)
>
> diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c 
> b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
> index 2878c8f..2c36db3 100644
> --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
> +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
> @@ -76,6 +76,9 @@ struct radeon_bomgr {
>  bool va;
>  uint64_t va_offset;
>  struct list_head va_holes;
> +
> +/* BO size alignment */
> +long size_align;

Any reason to use "long"? It's not like this will ever be greater than
2^32. "unsigned" should be enough. Other than that:

Reviewed-by: Marek Olšák 

Marek
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Re: [Mesa-dev] [PATCH v3 3/3] i965/nir/fs: Implement new barrier functions for compute shaders

[Francisco Jerez]

Jordan Justen  writes:

> For these nir intrinsics, we emit the same code as
> nir_intrinsic_memory_barrier:
>
>  * nir_intrinsic_memory_barrier_atomic_counter
>  * nir_intrinsic_memory_barrier_buffer
>  * nir_intrinsic_memory_barrier_image
>
> We treat these nir intrinsics as no-ops:
>  * nir_intrinsic_group_memory_barrier
>  * nir_intrinsic_memory_barrier_shared
>
> v3:
>  * Add comment for no-op cases (curro)
>
> Signed-off-by: Jordan Justen 
> Cc: Francisco Jerez 
> ---
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 11 +++
>  1 file changed, 11 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index b6f4c52..3b3bc67 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -1697,6 +1697,9 @@ fs_visitor::nir_emit_intrinsic(const fs_builder , 
> nir_intrinsic_instr *instr
>break;
> }
>  
> +   case nir_intrinsic_memory_barrier_atomic_counter:
> +   case nir_intrinsic_memory_barrier_buffer:
> +   case nir_intrinsic_memory_barrier_image:
> case nir_intrinsic_memory_barrier: {
>const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UD, 16 / dispatch_width);
>bld.emit(SHADER_OPCODE_MEMORY_FENCE, tmp)
> @@ -1704,6 +1707,14 @@ fs_visitor::nir_emit_intrinsic(const fs_builder , 
> nir_intrinsic_instr *instr
>break;
> }
>  
> +   case nir_intrinsic_group_memory_barrier:
> +   case nir_intrinsic_memory_barrier_shared:
> +  /* We treat these single workgroup level barriers as no-ops. This is
> +   * safe today because we don't allow memory functions to be re-ordered
> +   * and we only execute programs on a single sub-slice.
> +   */

You forgot to mention the fault-and-stream thing, which is going to be a
problem already on Gen9.5.  How about the following:

| /* We treat these workgroup-level barriers as no-ops.  This should be
|  * safe at present and as long as:
|  *
|  *  - Memory access instructions are not subsequently reordered by the
|  *compiler back-end.
|  *
|  *  - All threads from a given compute shader workgroup fit within a
|  *single subslice and therefore talk to the same HDC shared unit
|  *what supposedly guarantees ordering and coherency between threads
|  *from the same workgroup.  This may change in the future when we
|  *start splitting workgroups across multiple subslices.
|  *
|  *  - The context is not in fault-and-stream mode, which could cause
|  *memory transactions (including to SLM) prior to the barrier to be
|  *replayed after the barrier if a pagefault occurs.  This shouldn't
|  *be a problem up to and including SKL because fault-and-stream is
|  *not usable due to hardware issues, but that's likely to change in
|  *the future.
|  */

If you use that comment instead this patch is:

Reviewed-by: Francisco Jerez 


> +  break;
> +
> case nir_intrinsic_shader_clock: {
>/* We cannot do anything if there is an event, so ignore it for now */
>fs_reg shader_clock = get_timestamp(bld);
> -- 
> 2.6.2


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Re: [Mesa-dev] [PATCH 1/6] mesa: add ARB_enhanced_layouts

[Emil Velikov]

Hi Tim,

A few comments below

On 5 November 2015 at 11:17, Timothy Arceri  wrote:
> From: Timothy Arceri 
>
> Set to dummy_false until the remaining features are added.
> ---
>  src/glsl/glcpp/glcpp-parse.y| 1 +
>  src/glsl/glsl_parser_extras.cpp | 1 +
>  src/glsl/glsl_parser_extras.h   | 2 ++
>  src/mesa/main/extensions.c  | 1 +
>  4 files changed, 5 insertions(+)
>
> diff --git a/src/glsl/glcpp/glcpp-parse.y b/src/glsl/glcpp/glcpp-parse.y
> index 4acccf7..6aa7abe 100644
> --- a/src/glsl/glcpp/glcpp-parse.y
> +++ b/src/glsl/glcpp/glcpp-parse.y
> @@ -2387,6 +2387,7 @@ _glcpp_parser_handle_version_declaration(glcpp_parser_t 
> *parser, intmax_t versio
>}
> } else {
>add_builtin_define(parser, "GL_ARB_draw_buffers", 1);
> +   add_builtin_define(parser, "GL_ARB_enhanced_layouts", 1);
> add_builtin_define(parser, "GL_ARB_separate_shader_objects", 1);
>add_builtin_define(parser, "GL_ARB_texture_rectangle", 1);
> add_builtin_define(parser, "GL_AMD_shader_trinary_minmax", 1);
> diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_parser_extras.cpp
> index 14cb9fc..be344d6 100644
> --- a/src/glsl/glsl_parser_extras.cpp
> +++ b/src/glsl/glsl_parser_extras.cpp
> @@ -594,6 +594,7 @@ static const _mesa_glsl_extension 
> _mesa_glsl_supported_extensions[] = {
> EXT(ARB_derivative_control,   true,  false, 
> ARB_derivative_control),
> EXT(ARB_draw_buffers, true,  false, dummy_true),
> EXT(ARB_draw_instanced,   true,  false, 
> ARB_draw_instanced),
> +   EXT(ARB_enhanced_layouts, true,  false, dummy_true),
> EXT(ARB_explicit_attrib_location, true,  false, 
> ARB_explicit_attrib_location),
> EXT(ARB_explicit_uniform_location,true,  false, 
> ARB_explicit_uniform_location),
> EXT(ARB_fragment_coord_conventions,   true,  false, 
> ARB_fragment_coord_conventions),
> diff --git a/src/glsl/glsl_parser_extras.h b/src/glsl/glsl_parser_extras.h
> index b54c535..684b917 100644
> --- a/src/glsl/glsl_parser_extras.h
> +++ b/src/glsl/glsl_parser_extras.h
> @@ -499,6 +499,8 @@ struct _mesa_glsl_parse_state {
> bool ARB_draw_buffers_warn;
> bool ARB_draw_instanced_enable;
> bool ARB_draw_instanced_warn;
> +   bool ARB_enhanced_layouts_enable;
> +   bool ARB_enhanced_layouts_warn;
> bool ARB_explicit_attrib_location_enable;
> bool ARB_explicit_attrib_location_warn;
> bool ARB_explicit_uniform_location_enable;
> diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
> index bdc6817..b8556aa 100644
> --- a/src/mesa/main/extensions.c
> +++ b/src/mesa/main/extensions.c
> @@ -111,6 +111,7 @@ static const struct extension extension_table[] = {
> { "GL_ARB_draw_elements_base_vertex",   
> o(ARB_draw_elements_base_vertex),   GL, 2009 },
> { "GL_ARB_draw_indirect",   o(ARB_draw_indirect), 
>   GLC,2010 },
> { "GL_ARB_draw_instanced",  o(ARB_draw_instanced),
>   GL, 2008 },
> +   { "GL_ARB_enhanced_layouts",o(dummy_false),   
>   GLC,2013 },
> { "GL_ARB_explicit_attrib_location",
> o(ARB_explicit_attrib_location),GL, 2009 },
> { "GL_ARB_explicit_uniform_location",   
> o(ARB_explicit_uniform_location),   GL, 2012 },
> { "GL_ARB_fragment_coord_conventions",  
> o(ARB_fragment_coord_conventions),  GL, 2009 },
Please add gl_extensions::ARB_enhanced_layouts and use it in the above
two tables. Otherwise the extension override won't work. We can always
nuke it at the end, if it turns out that this extension can be enabled
everywhere.

Thanks
Emil
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[Mesa-dev] [PATCH] i965/fs: Use regs_read/written for post-RA scheduling in calculate_deps

[Jason Ekstrand]

Previously, we were assuming that everything read/wrote exactly 1 logical
GRF (1 in SIMD8 and 2 in SIMD16).  This isn't actually true.  In
particular, the PLN instruction reads 2 logical registers in one of the
components.  This commit changes post-RA scheduling to use regs_read and
regs_written instead so that we add enough dependencies.

Cc: Connor Abbott 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92770
---
 src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 15 ---
 1 file changed, 4 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp 
b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 88c45f7..d21bc67 100644
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -927,7 +927,6 @@ fs_instruction_scheduler::calculate_deps()
 * granular level.
 */
schedule_node *last_fixed_grf_write = NULL;
-   int reg_width = v->dispatch_width / 8;
 
/* The last instruction always needs to still be the last
 * instruction.  Either it's flow control (IF, ELSE, ENDIF, DO,
@@ -964,10 +963,7 @@ fs_instruction_scheduler::calculate_deps()
 (inst->src[i].fixed_hw_reg.file ==
  BRW_GENERAL_REGISTER_FILE)) {
 if (post_reg_alloc) {
-   int size = reg_width;
-   if (inst->src[i].fixed_hw_reg.vstride == BRW_VERTICAL_STRIDE_0)
-  size = 1;
-   for (int r = 0; r < size; r++)
+   for (int r = 0; r < inst->regs_read(i); r++)
   add_dep(last_grf_write[inst->src[i].fixed_hw_reg.nr + r], n);
 } else {
add_dep(last_fixed_grf_write, n);
@@ -1031,7 +1027,7 @@ fs_instruction_scheduler::calculate_deps()
   } else if (inst->dst.file == HW_REG &&
  inst->dst.fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) {
  if (post_reg_alloc) {
-for (int r = 0; r < reg_width; r++)
+for (int r = 0; r < inst->regs_written; r++)
last_grf_write[inst->dst.fixed_hw_reg.nr + r] = n;
  } else {
 last_fixed_grf_write = n;
@@ -1093,10 +1089,7 @@ fs_instruction_scheduler::calculate_deps()
 (inst->src[i].fixed_hw_reg.file ==
  BRW_GENERAL_REGISTER_FILE)) {
 if (post_reg_alloc) {
-   int size = reg_width;
-   if (inst->src[i].fixed_hw_reg.vstride == BRW_VERTICAL_STRIDE_0)
-  size = 1;
-   for (int r = 0; r < size; r++)
+   for (int r = 0; r < inst->regs_read(i); r++)
   add_dep(n, last_grf_write[inst->src[i].fixed_hw_reg.nr + r], 
0);
 } else {
add_dep(n, last_fixed_grf_write, 0);
@@ -1159,7 +1152,7 @@ fs_instruction_scheduler::calculate_deps()
   } else if (inst->dst.file == HW_REG &&
  inst->dst.fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) {
  if (post_reg_alloc) {
-for (int r = 0; r < reg_width; r++)
+for (int r = 0; r < inst->regs_written; r++)
last_grf_write[inst->dst.fixed_hw_reg.nr + r] = n;
  } else {
 last_fixed_grf_write = n;
-- 
2.5.0.400.gff86faf

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Re: [Mesa-dev] [PATCH] nvc0: enable compute support on Fermi

[Ilia Mirkin]

On Fri, Nov 6, 2015 at 5:23 AM, Hans de Goede  wrote:
> On 06-11-15 00:51, Samuel Pitoiset wrote:
>> On 11/06/2015 12:43 AM, Ilia Mirkin wrote:
>>> Of course this also enables it for NVF0_3D_CLASS. Pretty sure compute
>>> doesn't work there for some dumb reason (like we're missing some in
>>> our ctxsw fw...)
>
> Hmm, my only compute capable card actually is a nvf0 card (gk208 based). Can
> you
> provide some quick test instructions how I can test compute on that card
> (with the patch from this thread applied) ?
>
> And if it does not work, any suggestions how to go about debugging this ?
> Or better any info I can provide to help you debug this :)

As I recall, merely turning the support on would cause the screen init
function to do something which would result in a dmesg spew from the
kernel (something about the ctxsw fw being unhappy... maybe?). Since
compute didn't actually do anything particularly useful, seemed
easiest to just disable it. Sorry, I don't remember specifics.

  -ilia
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Re: [Mesa-dev] [PATCH] st/va: add mpeg4 startcode workaround

[Ilia Mirkin]

On Fri, Nov 6, 2015 at 1:48 PM, Zhang, Boyuan  wrote:
> Hi Emil,
>
> Please see the following information about this patch.
>
> - Issue: For Mpeg4, the VOP and GOV headers were truncated. With the existing 
> workaround in st/va, playback shows massive corruptions.
> - This Patch: Provide another way to get the truncated headers back. Massive 
> corruptions are gone with this patch. At the same time, add an environmental 
> variable to allow user to decide whether to use this patch.

Why would the user not want to use this? Sounds like a correctness
fix, no? Or is it some thing that a hypothetical gallium driver might
not need but the radeon uvd-based ones do? In that case it should be
behind a PIPE_VIDEO_CAP_bla (sorry, I'm still not too clear on what
"bla" is here...)

  -ilia
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Re: [Mesa-dev] [PATCH] st/va: add mpeg4 startcode workaround

[Christian König]

On 06.11.2015 20:10, Ilia Mirkin wrote:

On Fri, Nov 6, 2015 at 1:48 PM, Zhang, Boyuan  wrote:

Hi Emil,

Please see the following information about this patch.

- Issue: For Mpeg4, the VOP and GOV headers were truncated. With the existing 
workaround in st/va, playback shows massive corruptions.
- This Patch: Provide another way to get the truncated headers back. Massive 
corruptions are gone with this patch. At the same time, add an environmental 
variable to allow user to decide whether to use this patch.

Why would the user not want to use this? Sounds like a correctness
fix, no? Or is it some thing that a hypothetical gallium driver might
not need but the radeon uvd-based ones do? In that case it should be
behind a PIPE_VIDEO_CAP_bla (sorry, I'm still not too clear on what
"bla" is here...)


The problem is that this is a rather extreme hack.

As you probably knew VA-API didn't correctly specify which start code 
should be included and which shouldn't for MPEG-4. This is an issue for 
AMD as well as NVidia hardware and pretty much everybody which sticks 
close to an elementary stream.


What we do in this hack is just searching the bytes *before* the pointer 
and size we got from the application for the stuff that's missing. E.g. 
we access memory the application didn't told us to access.


This is rather speculative, but works surprisingly well with a lot of 
applications.


Regards,
Christian.



   -ilia
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Re: [Mesa-dev] [PATCH] egl/dri2: expose srgb configs when KHR_gl_colorspace is available

[Marek Olšák]

On Thu, Oct 15, 2015 at 2:28 PM, Emil Velikov  wrote:
> On 3 October 2015 at 12:19, Emil Velikov  wrote:
>> On 3 October 2015 at 02:12, Marek Olšák  wrote:
>>> I'm not sure if this is correct or if we should just return NULL in
>>> this case like the "case" statement above that does.
>>>
>> Actually I was thinking about bailing out when the requested attribute
>> is set. I.e.
>>
>> diff --git a/src/egl/drivers/dri2/egl_dri2.c 
>> b/src/egl/drivers/dri2/egl_dri2.c
>> index 1740ee3..0450269 100644
>> --- a/src/egl/drivers/dri2/egl_dri2.c
>> +++ b/src/egl/drivers/dri2/egl_dri2.c
>> @@ -237,6 +237,8 @@ dri2_add_config(_EGLDisplay *disp, const
>> __DRIconfig *dri_config, int id,
>>
>>   case __DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE:
>>  srgb = value != 0;
>> + if (!dpy->Extensions.KHR_gl_colorspace && srgb)
>> +return NULL;
>>  break;
>>
>>   default:
>>
> Guys can anyone give this patch a quick test ? Afaict it is very
> uncommon to get here, but it still does the right thing.

It doesn't cause any piglit regressions. Sadly, I don't have any EGL
apps. eglgears_x11 in mesa/demos is already broken for me on VI/Tonga.
It might be a hw-specific issue.

Marek
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Re: [Mesa-dev] [PATCH] egl/dri2: expose srgb configs when KHR_gl_colorspace is available

[Marek Olšák]

On Fri, Nov 6, 2015 at 8:24 PM, Marek Olšák  wrote:
> On Thu, Oct 15, 2015 at 2:28 PM, Emil Velikov  
> wrote:
>> On 3 October 2015 at 12:19, Emil Velikov  wrote:
>>> On 3 October 2015 at 02:12, Marek Olšák  wrote:
 I'm not sure if this is correct or if we should just return NULL in
 this case like the "case" statement above that does.

>>> Actually I was thinking about bailing out when the requested attribute
>>> is set. I.e.
>>>
>>> diff --git a/src/egl/drivers/dri2/egl_dri2.c 
>>> b/src/egl/drivers/dri2/egl_dri2.c
>>> index 1740ee3..0450269 100644
>>> --- a/src/egl/drivers/dri2/egl_dri2.c
>>> +++ b/src/egl/drivers/dri2/egl_dri2.c
>>> @@ -237,6 +237,8 @@ dri2_add_config(_EGLDisplay *disp, const
>>> __DRIconfig *dri_config, int id,
>>>
>>>   case __DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE:
>>>  srgb = value != 0;
>>> + if (!dpy->Extensions.KHR_gl_colorspace && srgb)
>>> +return NULL;
>>>  break;
>>>
>>>   default:
>>>
>> Guys can anyone give this patch a quick test ? Afaict it is very
>> uncommon to get here, but it still does the right thing.
>
> It doesn't cause any piglit regressions. Sadly, I don't have any EGL
> apps. eglgears_x11 in mesa/demos is already broken for me on VI/Tonga.
> It might be a hw-specific issue.

BTW, I had to fix a compile failure in your patch.

Marek
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Re: [Mesa-dev] [PATCH] st/va: add mpeg4 startcode workaround

[Ilia Mirkin]

On Fri, Nov 6, 2015 at 2:15 PM, Christian König  wrote:
> On 06.11.2015 20:10, Ilia Mirkin wrote:
>>
>> On Fri, Nov 6, 2015 at 1:48 PM, Zhang, Boyuan 
>> wrote:
>>>
>>> Hi Emil,
>>>
>>> Please see the following information about this patch.
>>>
>>> - Issue: For Mpeg4, the VOP and GOV headers were truncated. With the
>>> existing workaround in st/va, playback shows massive corruptions.
>>> - This Patch: Provide another way to get the truncated headers back.
>>> Massive corruptions are gone with this patch. At the same time, add an
>>> environmental variable to allow user to decide whether to use this patch.
>>
>> Why would the user not want to use this? Sounds like a correctness
>> fix, no? Or is it some thing that a hypothetical gallium driver might
>> not need but the radeon uvd-based ones do? In that case it should be
>> behind a PIPE_VIDEO_CAP_bla (sorry, I'm still not too clear on what
>> "bla" is here...)
>
>
> The problem is that this is a rather extreme hack.
>
> As you probably knew VA-API didn't correctly specify which start code should
> be included and which shouldn't for MPEG-4. This is an issue for AMD as well
> as NVidia hardware and pretty much everybody which sticks close to an
> elementary stream.
>
> What we do in this hack is just searching the bytes *before* the pointer and
> size we got from the application for the stuff that's missing. E.g. we
> access memory the application didn't told us to access.
>
> This is rather speculative, but works surprisingly well with a lot of
> applications.

Hm, that is a little dodgy indeed. But making user-selectable options
(provided via env var) for correct decoding... doesn't seem ideal
either. Is there some "correct" way to resolve this without changing
the va api?

  -ilia
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Re: [Mesa-dev] [PATCH] st/va: add mpeg4 startcode workaround

[Zhang, Boyuan]

Hi Emil,

Please see the following information about this patch.

- Issue: For Mpeg4, the VOP and GOV headers were truncated. With the existing 
workaround in st/va, playback shows massive corruptions.
- This Patch: Provide another way to get the truncated headers back. Massive 
corruptions are gone with this patch. At the same time, add an environmental 
variable to allow user to decide whether to use this patch.

Regards,
Boyuan

-Original Message-
From: Liu, Leo 
Sent: November-05-15 10:15 PM
To: Emil Velikov; Zhang, Boyuan
Cc: ML mesa-dev
Subject: RE: [Mesa-dev] [PATCH] st/va: add mpeg4 startcode workaround

+Boyuan, forgot to Cc him when I sent.

Regards,
Leo


>-Original Message-
>From: Emil Velikov [mailto:emil.l.veli...@gmail.com]
>Sent: Thursday, November 05, 2015 7:00 PM
>To: Liu, Leo
>Cc: ML mesa-dev
>Subject: Re: [Mesa-dev] [PATCH] st/va: add mpeg4 startcode workaround
>
>On 5 November 2015 at 21:00, Leo Liu  wrote:
>> From: Boyuan Zhang 
>>
>> Signed-off-by: Boyuan Zhang 
>> Reviewed-by: Christian König 
>> ---
>>  src/gallium/state_trackers/va/buffer.c |  24 +-
>>  src/gallium/state_trackers/va/context.c|   7 ++
>>  src/gallium/state_trackers/va/picture.c| 117 
>> +
>>  src/gallium/state_trackers/va/va_private.h |   3 +
>>  4 files changed, 102 insertions(+), 49 deletions(-)
>>
>Guys can get some commit message please ? What is the workaround why is 
>it needed ?
>
>It's a bit sad that one has to ask for such a thing.
>
>
>> @@ -59,8 +70,17 @@ vlVaCreateBuffer(VADriverContextP ctx, VAContextID
>context, VABufferType type,
>>return VA_STATUS_ERROR_ALLOCATION_FAILED;
>> }
>>
>> -   if (data)
>> -  memcpy(buf->data, data, size * num_elements);
>> +   uint8_t* pExternalData = (uint8_t*) data;
>> +   if (data) {
>> +  if ((u_reduce_video_profile(pContext->desc.base.profile) ==
>PIPE_VIDEO_FORMAT_MPEG4)
>> +&& (pContext->mpeg4.vaapi_mpeg4_workaround == true)
>> +&& (buf->type == VASliceDataBufferType)) {
>Please follow st/va coding style - drop the explicit comparison against 
>true, && should be at the end of the line.
>
>
>> --- a/src/gallium/state_trackers/va/context.c
>> +++ b/src/gallium/state_trackers/va/context.c
>> @@ -35,6 +35,8 @@
>>
>>  #include "va_private.h"
>>
>> +DEBUG_GET_ONCE_BOOL_OPTION(mpeg4, "VAAPI_MPEG4_WORKAROUND",
>FALSE);
>> +
>You do realise that defined as it, one can only use 
>VAAPI_MPEG4_WORKAROUND on debug mesa builds ?
>
>
>> @@ -275,6 +277,11 @@ vlVaCreateContext(VADriverContextP ctx, 
>> VAConfigID
>config_id, int picture_width,
>>  return VA_STATUS_ERROR_ALLOCATION_FAILED;
>>   }
>>}
>> +
>> +  if (u_reduce_video_profile(context->decoder->profile) ==
>> +PIPE_VIDEO_FORMAT_MPEG4) {
>u_reduce_video_profile() is called three times already. Stash it into a 
>local variable and keep the comparison on a single line ?
>
>
>> --- a/src/gallium/state_trackers/va/picture.c
>> +++ b/src/gallium/state_trackers/va/picture.c
>> @@ -584,60 +584,83 @@ vlVaDecoderFixMPEG4Startcode(vlVaContext
>> *context)
>
>> +  for (int i = 0 ; i < VL_VA_MPEG4_BYTES_FOR_LOOKUP ; i++) {
>> + if (memcmp (p, start_code, sizeof(start_code)) == 0) {
>> +found = true;
>Just use startcode_available directly ?
>
>> +break;
>> + }
>> + p += 1;
>> + extraSize += 1;
>> +  }
>> +  if (found) {
>> + startcode_available = true;
>
>
>-Emil
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Re: [Mesa-dev] [PATCH v3 3/8] glsl: Add support for the new builtins that EXT_blend_func_extended provides.

[Ilia Mirkin]

On Fri, Nov 6, 2015 at 1:10 PM, Ian Romanick  wrote:
> On 11/05/2015 06:47 PM, Ryan Houdek wrote:
>> gl_MaxDualSourceDrawBuffersEXT - Maximum DS draw buffers supported
>>
>> Only for ESSL 1.0 it provides two builtins since you can't have user-defined
>> color output variables
>> gl_SecondaryFragColorEXT and gl_SecondaryFragDataEXT[MaxDSDrawBuffers]
>> ---
>>  src/glsl/ast_to_hir.cpp| 16 +++
>>  src/glsl/builtin_variables.cpp | 62 
>> ++
>>  2 files changed, 78 insertions(+)
>>
>> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
>> index 0306530..9ac7d80 100644
>> --- a/src/glsl/ast_to_hir.cpp
>> +++ b/src/glsl/ast_to_hir.cpp
>> @@ -6973,6 +6973,8 @@ detect_conflicting_assignments(struct 
>> _mesa_glsl_parse_state *state,
>>  {
>> bool gl_FragColor_assigned = false;
>> bool gl_FragData_assigned = false;
>> +   bool gl_FragSecondaryColor_assigned = false;
>> +   bool gl_FragSecondaryData_assigned = false;
>> bool user_defined_fs_output_assigned = false;
>> ir_variable *user_defined_fs_output = NULL;
>>
>> @@ -6990,6 +6992,10 @@ detect_conflicting_assignments(struct 
>> _mesa_glsl_parse_state *state,
>>   gl_FragColor_assigned = true;
>>else if (strcmp(var->name, "gl_FragData") == 0)
>>   gl_FragData_assigned = true;
>> + else if (strcmp(var->name, "gl_SecondaryFragColorEXT") == 0)
>> + gl_FragSecondaryColor_assigned = true;
>> + else if (strcmp(var->name, "gl_SecondaryFragDataEXT") == 0)
>> + gl_FragSecondaryData_assigned = true;
>>else if (!is_gl_identifier(var->name)) {
>>   if (state->stage == MESA_SHADER_FRAGMENT &&
>>   var->data.mode == ir_var_shader_out) {
>> @@ -7021,11 +7027,21 @@ detect_conflicting_assignments(struct 
>> _mesa_glsl_parse_state *state,
>>_mesa_glsl_error(, state, "fragment shader writes to both "
>> "`gl_FragColor' and `%s'",
>> user_defined_fs_output->name);
>> +   } else if (gl_FragSecondaryColor_assigned && 
>> gl_FragSecondaryData_assigned) {
>> +  _mesa_glsl_error(, state, "fragment shader writes to both "
>> +   "`gl_FragSecondaryColorEXT' and"
>> +   " `gl_FragSecondaryDataEXT'");
>> } else if (gl_FragData_assigned && user_defined_fs_output_assigned) {
>>_mesa_glsl_error(, state, "fragment shader writes to both "
>> "`gl_FragData' and `%s'",
>> user_defined_fs_output->name);
>> }
>> +
>> +   if ((gl_FragSecondaryColor_assigned || gl_FragSecondaryData_assigned) &&
>> +   !state->EXT_blend_func_extended_enable) {
>> +  _mesa_glsl_error(, state,
>> +   "Dual source blending requires 
>> EXT_blend_func_extended");
>> +   }
>
> The spec doesn't seem to provide any guidance about a shader like:
>
> #extension GL_EXT_blend_func_extended: require
> void main() {
> gl_FragData[0] = vec4(0);
> glSecondaryFragColorEXT = vec4(0);
> }
>
> What does NVIDIA's implementation do?  We should mimic that behavior,

It says "GL_EXT_blend_func_extended not supported" :) Why would the
above be problematic though?

> and have a comment here justifying it.  Something like
>
> /* The EXT_blend_func_extended spec doesn't say what to do if
>  * gl_FragData and glSecondaryFragColorEXT (or gl_FragColor and
>  * glSecondaryFragDataEXT) are written together.  NVIDIA's XXX.YY
>  * driver [say what it does], so we mimic that.
>  */
>
> We should also have piglit tests that exercise it.
>
>>  }
>>
>>
>> diff --git a/src/glsl/builtin_variables.cpp b/src/glsl/builtin_variables.cpp
>> index c30fb92..4933c8a 100644
>> --- a/src/glsl/builtin_variables.cpp
>> +++ b/src/glsl/builtin_variables.cpp
>> @@ -376,6 +376,11 @@ private:
>>return add_variable(name, type, ir_var_shader_out, slot);
>> }
>>
>> +   ir_variable *add_index_output(int slot, int index, const glsl_type 
>> *type, const char *name)
>> +   {
>> +  return add_index_variable(name, type, ir_var_shader_out, slot, index);
>> +   }
>> +
>> ir_variable *add_system_value(int slot, const glsl_type *type,
>>   const char *name)
>> {
>> @@ -384,6 +389,8 @@ private:
>>
>> ir_variable *add_variable(const char *name, const glsl_type *type,
>>   enum ir_variable_mode mode, int slot);
>> +   ir_variable *add_index_variable(const char *name, const glsl_type *type,
>> + enum ir_variable_mode mode, int slot, int 
>> index);
>> ir_variable *add_uniform(const glsl_type *type, const char *name);
>> ir_variable *add_const(const char *name, int value);
>> ir_variable *add_const_ivec3(const char *name, int x, int y, int z);
>> @@ -429,6 +436,46 @@ builtin_variable_generator::builtin_variable_generator(
>>  {
>>  }
>>
>> +ir_variable *
>> 

Re: [Mesa-dev] [PATCH 4/4] st/omx: add headless support

[Liu, Leo]

Hi Emil,

>Shorten the variable name - OMX_RENDER_NODE ? debug_get_option is only
>available on debug builds so better use getenv.
>

The debug_get_*_option() functions are used all around mesa, and functions are 
explicitly preferred to working with getenv() directly.

Regards,
Leo


>omx_render_node can be an empty string so we should check for that.
>
>>omx_display = XOpenDisplay(NULL);
>>if (!omx_display) {
>> - pipe_mutex_unlock(omx_lock);
>> - return NULL;
>> -  }
>> + if (!omx_render_node)
>> +goto error;
>> +  } else
>> + omx_render_node = NULL;
>The following will honour the env override, without attempting to connect to X.
>
>if (!omx_render_node && omx_render_node != "") {
>  int fd = loader_open_device()
>  vl_drm_screen_create()
>} else {
>  omx_display = XOpenDisplay()
>  vl_screen_create()
>}
>
>
>
>> }
>>
>> if (!omx_screen) {
>> -  omx_screen = vl_screen_create(omx_display, 0);
>> -  if (!omx_screen) {
>> - pipe_mutex_unlock(omx_lock);
>> - return NULL;
>> -  }
>> +  if (omx_render_node) {
>> + int fd = open(omx_render_node, O_RDWR);
>Use loader_open_device(), it gives you free C_CLOEXEC handling.
>
>As you send v2 of the series feel free to squash patches 2 and 3.
>
>Thanks
>Emil
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Re: [Mesa-dev] [PATCH 4/4] st/omx: add headless support

[Emil Velikov]

On 6 November 2015 at 03:19, Liu, Leo  wrote:
>>-Original Message-
>>From: Emil Velikov [mailto:emil.l.veli...@gmail.com]
>>Sent: Thursday, November 05, 2015 6:30 PM
>>To: Liu, Leo
>>Cc: ML mesa-dev
>>Subject: Re: [Mesa-dev] [PATCH 4/4] st/omx: add headless support
>>
>>On 5 November 2015 at 18:47, Leo Liu  wrote:
>>> This will allow dec/enc/transcode without X
>>>
>>Are we talking about multi GPU setup where X is running on one, and OMX on
>>another, or a true "without X" case ?
>
> Only one.
>
>> I'm leaning that the latter isn't really
>>possible, yet.
>
> Why?
>
It's a matter of definition - personally "without X" translates to
without X (and friends) _installed_, although in your case it's likely
without a _running_ X. Nothing to see here - It's a po-tay-to
po-tah-to case :)

Regards,
Emil
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[Mesa-dev] [PATCH 2/7] nir: remove nir_variable::max_ifc_array_access

[Rob Clark]

From: Rob Clark 

No users.

Signed-off-by: Rob Clark 
---
 src/glsl/nir/glsl_to_nir.cpp |  9 -
 src/glsl/nir/nir.h   | 13 -
 2 files changed, 22 deletions(-)

diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
index 57aba5b..0854a52 100644
--- a/src/glsl/nir/glsl_to_nir.cpp
+++ b/src/glsl/nir/glsl_to_nir.cpp
@@ -291,15 +291,6 @@ nir_visitor::visit(ir_variable *ir)
var->type = ir->type;
var->name = ralloc_strdup(var, ir->name);
 
-   if (ir->is_interface_instance() && ir->get_max_ifc_array_access() != NULL) {
-  unsigned size = ir->get_interface_type()->length;
-  var->max_ifc_array_access = ralloc_array(var, unsigned, size);
-  memcpy(var->max_ifc_array_access, ir->get_max_ifc_array_access(),
- size * sizeof(unsigned));
-   } else {
-  var->max_ifc_array_access = NULL;
-   }
-
var->data.read_only = ir->data.read_only;
var->data.centroid = ir->data.centroid;
var->data.sample = ir->data.sample;
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index e2d75df..0d98847 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -148,19 +148,6 @@ typedef struct {
 */
char *name;
 
-   /**
-* For variables which satisfy the is_interface_instance() predicate, this
-* points to an array of integers such that if the ith member of the
-* interface block is an array, max_ifc_array_access[i] is the maximum
-* array element of that member that has been accessed.  If the ith member
-* of the interface block is not an array, max_ifc_array_access[i] is
-* unused.
-*
-* For variables whose type is not an interface block, this pointer is
-* NULL.
-*/
-   unsigned *max_ifc_array_access;
-
struct nir_variable_data {
 
   /**
-- 
2.5.0

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[Mesa-dev] [PATCH 4/7] nir/print: show shader name/label if set

[Rob Clark]

From: Rob Clark 

Signed-off-by: Rob Clark 
---
 src/glsl/nir/nir_print.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/src/glsl/nir/nir_print.c b/src/glsl/nir/nir_print.c
index 30220c5..bde7535 100644
--- a/src/glsl/nir/nir_print.c
+++ b/src/glsl/nir/nir_print.c
@@ -973,6 +973,12 @@ nir_print_shader(nir_shader *shader, FILE *fp)
 
fprintf(fp, "shader: %s\n", gl_shader_stage_name(shader->stage));
 
+   if (shader->info.name)
+  fprintf(fp, "name: %s\n", shader->info.name);
+
+   if (shader->info.label)
+  fprintf(fp, "label: %s\n", shader->info.label);
+
nir_foreach_variable(var, >uniforms) {
   print_var_decl(var, );
}
-- 
2.5.0

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[Mesa-dev] [PATCH 5/7] nir/print: show # of uniforms/inputs/outputs

[Rob Clark]

From: Rob Clark 

Signed-off-by: Rob Clark 
---
 src/glsl/nir/nir_print.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/glsl/nir/nir_print.c b/src/glsl/nir/nir_print.c
index bde7535..a110945 100644
--- a/src/glsl/nir/nir_print.c
+++ b/src/glsl/nir/nir_print.c
@@ -979,6 +979,10 @@ nir_print_shader(nir_shader *shader, FILE *fp)
if (shader->info.label)
   fprintf(fp, "label: %s\n", shader->info.label);
 
+   fprintf(fp, "inputs: %u\n", shader->num_inputs);
+   fprintf(fp, "outputs: %u\n", shader->num_outputs);
+   fprintf(fp, "uniforms: %u\n", shader->num_uniforms);
+
nir_foreach_variable(var, >uniforms) {
   print_var_decl(var, );
}
-- 
2.5.0

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[Mesa-dev] [PATCH 7/7] nir: add nir_ssa_for_alu_src()

[Rob Clark]

From: Rob Clark 

Using something like:

   numer = nir_ssa_for_src(bld, alu->src[0].src,
   nir_ssa_alu_instr_src_components(alu, 0));

for alu src's with swizzle, like:

   vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
   vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
   vec2 ssa_2 = udiv ssa_10.xx, ssa_11

ends up turning into something like:

   vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
   vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
   vec2 ssa_13 = imov ssa_10
   ...

because nir_ssa_for_src() ignore's the original nir_alu_src's swizzle.
Instead for alu instructions, nir_src_for_alu_src() should be used to
ensure the original alu src's swizzle doesn't get lost in translation:

   vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
   vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
   vec2 ssa_13 = imov ssa_10.xx
   ...

Signed-off-by: Rob Clark 
---
 src/glsl/nir/nir_builder.h| 25 +
 src/glsl/nir/nir_lower_idiv.c |  6 ++
 2 files changed, 27 insertions(+), 4 deletions(-)

diff --git a/src/glsl/nir/nir_builder.h b/src/glsl/nir/nir_builder.h
index 624329d..8e57231 100644
--- a/src/glsl/nir/nir_builder.h
+++ b/src/glsl/nir/nir_builder.h
@@ -259,6 +259,8 @@ nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 /**
  * Turns a nir_src into a nir_ssa_def * so it can be passed to
  * nir_build_alu()-based builder calls.
+ *
+ * See nir_ssa_for_alu_src() for alu instructions.
  */
 static inline nir_ssa_def *
 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
@@ -274,6 +276,29 @@ nir_ssa_for_src(nir_builder *build, nir_src src, int 
num_components)
return nir_imov_alu(build, alu, num_components);
 }
 
+/**
+ * Similar to nir_ssa_for_src(), but for alu src's, respecting the
+ * nir_alu_src's swizzle.
+ */
+static inline nir_ssa_def *
+nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
+{
+   static uint8_t trivial_swizzle[4] = { 0, 1, 2, 3 };
+   nir_alu_src *src = >src[srcn];
+   unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
+
+   if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
+   (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
+  return src->src.ssa;
+
+   nir_alu_src alu = { NIR_SRC_INIT };
+   alu.src = src->src;
+   for (int j = 0; j < 4; j++)
+  alu.swizzle[j] = src->swizzle[j];
+
+   return nir_imov_alu(build, alu, num_components);
+}
+
 static inline nir_ssa_def *
 nir_load_var(nir_builder *build, nir_variable *var)
 {
diff --git a/src/glsl/nir/nir_lower_idiv.c b/src/glsl/nir/nir_lower_idiv.c
index c961178..3b8af2c 100644
--- a/src/glsl/nir/nir_lower_idiv.c
+++ b/src/glsl/nir/nir_lower_idiv.c
@@ -52,10 +52,8 @@ convert_instr(nir_builder *bld, nir_alu_instr *alu)
 
bld->cursor = nir_before_instr(>instr);
 
-   numer = nir_ssa_for_src(bld, alu->src[0].src,
-   nir_ssa_alu_instr_src_components(alu, 0));
-   denom = nir_ssa_for_src(bld, alu->src[1].src,
-   nir_ssa_alu_instr_src_components(alu, 1));
+   numer = nir_ssa_for_alu_src(bld, alu, 0);
+   denom = nir_ssa_for_alu_src(bld, alu, 1);
 
if (is_signed) {
   af = nir_i2f(bld, numer);
-- 
2.5.0

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[Mesa-dev] [PATCH 6/7] nir: fix missing increments of num_inputs/num_outputs

[Rob Clark]

From: Rob Clark 

Signed-off-by: Rob Clark 
---
 src/glsl/nir/nir_lower_clip.c| 2 ++
 src/glsl/nir/nir_lower_two_sided_color.c | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/src/glsl/nir/nir_lower_clip.c b/src/glsl/nir/nir_lower_clip.c
index 31ccfb2..4a91527 100644
--- a/src/glsl/nir/nir_lower_clip.c
+++ b/src/glsl/nir/nir_lower_clip.c
@@ -55,9 +55,11 @@ create_clipdist_var(nir_shader *shader, unsigned drvloc,
 
if (output) {
   exec_list_push_tail(>outputs, >node);
+  shader->num_outputs++;
}
else {
   exec_list_push_tail(>inputs, >node);
+  shader->num_inputs++;
}
return var;
 }
diff --git a/src/glsl/nir/nir_lower_two_sided_color.c 
b/src/glsl/nir/nir_lower_two_sided_color.c
index db519bf..269e252 100644
--- a/src/glsl/nir/nir_lower_two_sided_color.c
+++ b/src/glsl/nir/nir_lower_two_sided_color.c
@@ -60,6 +60,8 @@ create_input(nir_shader *shader, unsigned drvloc, 
gl_varying_slot slot)
 
exec_list_push_tail(>inputs, >node);
 
+   shader->num_inputs++;
+
return var;
 }
 
-- 
2.5.0

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[Mesa-dev] [PATCH 3/7] nir: add array length field

[Rob Clark]

From: Rob Clark 

This will simplify things somewhat in clone.

Signed-off-by: Rob Clark 
---
 src/glsl/nir/glsl_to_nir.cpp | 5 +
 src/glsl/nir/nir.h   | 5 +
 2 files changed, 10 insertions(+)

diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
index 0854a52..d225bed 100644
--- a/src/glsl/nir/glsl_to_nir.cpp
+++ b/src/glsl/nir/glsl_to_nir.cpp
@@ -238,6 +238,8 @@ constant_copy(ir_constant *ir, void *mem_ctx)
 
unsigned total_elems = ir->type->components();
unsigned i;
+
+   ret->num_elements = 0;
switch (ir->type->base_type) {
case GLSL_TYPE_UINT:
   for (i = 0; i < total_elems; i++)
@@ -262,6 +264,8 @@ constant_copy(ir_constant *ir, void *mem_ctx)
case GLSL_TYPE_STRUCT:
   ret->elements = ralloc_array(mem_ctx, nir_constant *,
ir->type->length);
+  ret->num_elements = ir->type->length;
+
   i = 0;
   foreach_in_list(ir_constant, field, >components) {
  ret->elements[i] = constant_copy(field, mem_ctx);
@@ -272,6 +276,7 @@ constant_copy(ir_constant *ir, void *mem_ctx)
case GLSL_TYPE_ARRAY:
   ret->elements = ralloc_array(mem_ctx, nir_constant *,
ir->type->length);
+  ret->num_elements = ir->type->length;
 
   for (i = 0; i < ir->type->length; i++)
  ret->elements[i] = constant_copy(ir->array_elements[i], mem_ctx);
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 0d98847..96d3033 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -112,6 +112,11 @@ typedef struct nir_constant {
 */
union nir_constant_data value;
 
+   /* we could get this from the var->type but makes clone *much* easier to
+* not have to care about the type.
+*/
+   unsigned num_elements;
+
/* Array elements / Structure Fields */
struct nir_constant **elements;
 } nir_constant;
-- 
2.5.0

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Re: [Mesa-dev] [PATCH 4/4] st/omx: add headless support

[Emil Velikov]

Hello Leo,

On 6 November 2015 at 16:00, Liu, Leo  wrote:
> Hi Emil,
>
>>Shorten the variable name - OMX_RENDER_NODE ? debug_get_option is only
>>available on debug builds so better use getenv.
>>
>
> The debug_get_*_option() functions are used all around mesa, and functions 
> are explicitly preferred to working with getenv() directly.
>
Upon closer look it seems that those are in place even for normal
builds. Got confused with some nouveau code which uses them only on
debug builds.

Sorry about that.

-Emil
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[Mesa-dev] [PATCH] nir/glsl_to_nir: use _mesa_fls() to compute num_textures

[Juan A. Suarez Romero]

Replace the current loop by a direct call to _mesa_fls() function.

It also fixes an implicit bug in the current code where num_textures
seems to be one value less than it should be when sh->Program->SamplersUsed > 0.

For instance, num_textures is 0 instead of 1 when
sh->Program->SamplersUsed is 1.

Signed-off-by: Juan A. Suarez Romero 
---
 src/glsl/nir/glsl_to_nir.cpp | 9 ++---
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
index 57aba5b..5c3fcd1 100644
--- a/src/glsl/nir/glsl_to_nir.cpp
+++ b/src/glsl/nir/glsl_to_nir.cpp
@@ -30,6 +30,7 @@
 #include "ir_visitor.h"
 #include "ir_hierarchical_visitor.h"
 #include "ir.h"
+#include "main/imports.h"
 
 /*
  * pass to lower GLSL IR to NIR
@@ -144,16 +145,10 @@ glsl_to_nir(const struct gl_shader_program *shader_prog,
 
nir_lower_outputs_to_temporaries(shader);
 
-   /* TODO: Use _mesa_fls instead */
-   unsigned num_textures = 0;
-   for (unsigned i = 0; i < 8 * sizeof(sh->Program->SamplersUsed); i++)
-  if (sh->Program->SamplersUsed & (1 << i))
- num_textures = i;
-
shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
if (shader_prog->Label)
   shader->info.label = ralloc_strdup(shader, shader_prog->Label);
-   shader->info.num_textures = num_textures;
+   shader->info.num_textures = _mesa_fls(sh->Program->SamplersUsed);
shader->info.num_ubos = sh->NumUniformBlocks;
shader->info.num_abos = shader_prog->NumAtomicBuffers;
shader->info.num_ssbos = sh->NumShaderStorageBlocks;
-- 
2.4.3

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Re: [Mesa-dev] [PATCH] vbo: fix another GL_LINE_LOOP bug

[Emil Velikov]

Hi Brian,

On 31 October 2015 at 13:38, Brian Paul  wrote:
> Very long line loops which spanned 3 or more vertex buffers were not
> handled correctly and could result in stray lines.
>
> The piglit lineloop test draws 1 vertices by default, and is not
> long enough to trigger this.  Even 'lineloop -count 10' doesn't
> trigger the bug.
>
> For future reference, the issue can be reproduced by changing Mesa's
> VBO_VERT_BUFFER_SIZE to 4096 and changing the piglit lineloop test to
> use glVertex2f(), draw 3 loops instead of 1, and specifying -count
> 1023.
I haven't been following on the VBO patches that you've sent recently.
Do you think that any of them are mesa-stable material ? If so can you
please forward the sha's the the ML (or just list them here).

Thanks
Emil
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[Mesa-dev] [PATCH 1/7] nir: add nir_var_all enum

[Rob Clark]

Otherwise, passing -1 gets you:

  error: invalid conversion from 'int' to 'nir_variable_mode' [-fpermissive]

Signed-off-by: Rob Clark 
---
I was going to convert the enum values to bitmask/flags which could
be OR'd, but that doesn't play nicely w/ nir_variable::data which
tries to stuff this into a 4 bit bitfield.. so just re-sending this
one as-is since it's at least good enough to fix a compiler warn.

 src/glsl/nir/nir.c  | 4 
 src/glsl/nir/nir.h  | 1 +
 src/glsl/nir/nir_lower_io.c | 2 +-
 src/mesa/drivers/dri/i965/brw_nir.c | 3 ++-
 4 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/glsl/nir/nir.c b/src/glsl/nir/nir.c
index bb7a5fa..e1e3f0c 100644
--- a/src/glsl/nir/nir.c
+++ b/src/glsl/nir/nir.c
@@ -107,6 +107,10 @@ void
 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 {
switch (var->data.mode) {
+   case nir_var_all:
+  assert(!"invalid mode");
+  break;
+
case nir_var_local:
   assert(!"nir_shader_add_variable cannot be used for local variables");
   break;
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index ef39df5..e2d75df 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -82,6 +82,7 @@ typedef struct {
 } nir_state_slot;
 
 typedef enum {
+   nir_var_all = -1,
nir_var_shader_in,
nir_var_shader_out,
nir_var_global,
diff --git a/src/glsl/nir/nir_lower_io.c b/src/glsl/nir/nir_lower_io.c
index 688b48f..b4ed857 100644
--- a/src/glsl/nir/nir_lower_io.c
+++ b/src/glsl/nir/nir_lower_io.c
@@ -176,7 +176,7 @@ nir_lower_io_block(nir_block *block, void *void_state)
 
   nir_variable_mode mode = intrin->variables[0]->var->data.mode;
 
-  if (state->mode != -1 && state->mode != mode)
+  if (state->mode != nir_var_all && state->mode != mode)
  continue;
 
   switch (intrin->intrinsic) {
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c 
b/src/mesa/drivers/dri/i965/brw_nir.c
index dece208..07cb476 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -270,7 +270,8 @@ brw_create_nir(struct brw_context *brw,
nir_assign_var_locations(>uniforms,
 >num_uniforms,
 is_scalar ? type_size_scalar : type_size_vec4);
-   nir_lower_io(nir, -1, is_scalar ? type_size_scalar : type_size_vec4);
+   nir_lower_io(nir, nir_var_all,
+is_scalar ? type_size_scalar : type_size_vec4);
nir_validate_shader(nir);
 
nir_remove_dead_variables(nir);
-- 
2.5.0

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[Mesa-dev] [PATCH 0/7] nir: few small patches that I've been collecting..

[Rob Clark]

From: Rob Clark 

From my ongoing clone + gallium glsl_to_nir branch.. figured I should
tidy them up and send to list.

Rob Clark (7):
  nir: add nir_var_all enum
  nir: remove nir_variable::max_ifc_array_access
  nir: add array length field
  nir/print: show shader name/label if set
  nir/print: show # of uniforms/inputs/outputs
  nir: fix missing increments of num_inputs/num_outputs
  nir: add nir_ssa_for_alu_src()

 src/glsl/nir/glsl_to_nir.cpp | 14 +-
 src/glsl/nir/nir.c   |  4 
 src/glsl/nir/nir.h   | 19 ++-
 src/glsl/nir/nir_builder.h   | 25 +
 src/glsl/nir/nir_lower_clip.c|  2 ++
 src/glsl/nir/nir_lower_idiv.c|  6 ++
 src/glsl/nir/nir_lower_io.c  |  2 +-
 src/glsl/nir/nir_lower_two_sided_color.c |  2 ++
 src/glsl/nir/nir_print.c | 10 ++
 src/mesa/drivers/dri/i965/brw_nir.c  |  3 ++-
 10 files changed, 59 insertions(+), 28 deletions(-)

-- 
2.5.0

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[Mesa-dev] [PATCH v2 4/4] st/omx: add headless support

[Leo Liu]

This will allow dec/enc/transcode without X

v2:  -use env override even with X,
 -use loader_open_device instead of open

Signed-off-by: Leo Liu 
Reviewed-by: Christian König 
---
 src/gallium/state_trackers/omx/entrypoint.c | 37 ++---
 1 file changed, 28 insertions(+), 9 deletions(-)

diff --git a/src/gallium/state_trackers/omx/entrypoint.c 
b/src/gallium/state_trackers/omx/entrypoint.c
index a765666..2ddb1aa 100644
--- a/src/gallium/state_trackers/omx/entrypoint.c
+++ b/src/gallium/state_trackers/omx/entrypoint.c
@@ -33,11 +33,13 @@
 
 #include 
 #include 
+#include 
 
 #include 
 
 #include "os/os_thread.h"
 #include "util/u_memory.h"
+#include "loader/loader.h"
 
 #include "entrypoint.h"
 #include "vid_dec.h"
@@ -47,6 +49,7 @@ pipe_static_mutex(omx_lock);
 static Display *omx_display = NULL;
 static struct vl_screen *omx_screen = NULL;
 static unsigned omx_usecount = 0;
+static const char *omx_render_node = NULL;
 
 int omx_component_library_Setup(stLoaderComponentType **stComponents)
 {
@@ -73,33 +76,49 @@ struct vl_screen *omx_get_screen(void)
pipe_mutex_lock(omx_lock);
 
if (!omx_display) {
+  omx_render_node = debug_get_option("OMX_RENDER_NODES", NULL);
   omx_display = XOpenDisplay(NULL);
   if (!omx_display) {
- pipe_mutex_unlock(omx_lock);
- return NULL;
+ if (!omx_render_node)
+goto error;
   }
}
 
if (!omx_screen) {
-  omx_screen = vl_screen_create(omx_display, 0);
-  if (!omx_screen) {
- pipe_mutex_unlock(omx_lock);
- return NULL;
-  }
+  if (omx_render_node) {
+ int fd = loader_open_device(omx_render_node);
+ if (fd < 0)
+goto error;
+ omx_screen = vl_drm_screen_create(fd);
+  } else
+ omx_screen = vl_screen_create(omx_display, 0);
+
+  if (!omx_screen)
+ goto error;
}
 
++omx_usecount;
 
pipe_mutex_unlock(omx_lock);
return omx_screen;
+
+error:
+   if (omx_display)
+  XCloseDisplay(omx_display);
+   pipe_mutex_unlock(omx_lock);
+   return NULL;
 }
 
 void omx_put_screen(void)
 {
pipe_mutex_lock(omx_lock);
if ((--omx_usecount) == 0) {
-  vl_screen_destroy(omx_screen);
-  XCloseDisplay(omx_display);
+  if (!omx_render_node) {
+ vl_screen_destroy(omx_screen);
+ if (omx_display)
+XCloseDisplay(omx_display);
+  } else
+ vl_drm_screen_destroy(omx_screen);
   omx_screen = NULL;
   omx_display = NULL;
}
-- 
1.9.1

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Re: [Mesa-dev] [PATCH v2 4/4] st/omx: add headless support

[Emil Velikov]

Hi Leo,

I've suggested a few things before, yet I might have been too subtle.
Let me try again.

On 6 November 2015 at 16:40, Leo Liu  wrote:
> This will allow dec/enc/transcode without X
Please add "running" in the above sentence "... without running X" or similar.

>
> v2:  -use env override even with X,
>  -use loader_open_device instead of open
>
> Signed-off-by: Leo Liu 
> Reviewed-by: Christian König 
> ---
>  src/gallium/state_trackers/omx/entrypoint.c | 37 
> ++---
>  1 file changed, 28 insertions(+), 9 deletions(-)
>
> diff --git a/src/gallium/state_trackers/omx/entrypoint.c 
> b/src/gallium/state_trackers/omx/entrypoint.c
> index a765666..2ddb1aa 100644
> --- a/src/gallium/state_trackers/omx/entrypoint.c
> +++ b/src/gallium/state_trackers/omx/entrypoint.c
> @@ -33,11 +33,13 @@
>
>  #include 
>  #include 
> +#include 
>
With the loader.h in place you shouldn't need this.

>  #include 
>
>  #include "os/os_thread.h"
>  #include "util/u_memory.h"
> +#include "loader/loader.h"
>
>  #include "entrypoint.h"
>  #include "vid_dec.h"
> @@ -47,6 +49,7 @@ pipe_static_mutex(omx_lock);
>  static Display *omx_display = NULL;
>  static struct vl_screen *omx_screen = NULL;
>  static unsigned omx_usecount = 0;
> +static const char *omx_render_node = NULL;
>
>  int omx_component_library_Setup(stLoaderComponentType **stComponents)
>  {
> @@ -73,33 +76,49 @@ struct vl_screen *omx_get_screen(void)
> pipe_mutex_lock(omx_lock);
>
> if (!omx_display) {
> +  omx_render_node = debug_get_option("OMX_RENDER_NODES", NULL);
>omx_display = XOpenDisplay(NULL);
You don't need/want to do this, if the variable is set. Environment
variables tend to override default behaviour.
Although as getenv() can return empty string, imho one can just ignore
the variable in that case.

>if (!omx_display) {
> - pipe_mutex_unlock(omx_lock);
> - return NULL;
> + if (!omx_render_node)
> +goto error;
>}
> }
>
> if (!omx_screen) {
> -  omx_screen = vl_screen_create(omx_display, 0);
> -  if (!omx_screen) {
> - pipe_mutex_unlock(omx_lock);
> - return NULL;
> -  }
> +  if (omx_render_node) {
> + int fd = loader_open_device(omx_render_node);
> + if (fd < 0)
> +goto error;
> + omx_screen = vl_drm_screen_create(fd);
> +  } else
> + omx_screen = vl_screen_create(omx_display, 0);
> +
> +  if (!omx_screen)
> + goto error;
> }
>
> ++omx_usecount;
>
> pipe_mutex_unlock(omx_lock);
> return omx_screen;
> +
> +error:
> +   if (omx_display)
> +  XCloseDisplay(omx_display);
Missing close(fd) ?

> +   pipe_mutex_unlock(omx_lock);
> +   return NULL;
>  }
>
>  void omx_put_screen(void)
>  {
> pipe_mutex_lock(omx_lock);
> if ((--omx_usecount) == 0) {
> -  vl_screen_destroy(omx_screen);
> -  XCloseDisplay(omx_display);
> +  if (!omx_render_node) {
> + vl_screen_destroy(omx_screen);
> + if (omx_display)
> +XCloseDisplay(omx_display);
> +  } else
> + vl_drm_screen_destroy(omx_screen);
Missing close(fd) ? Which reminds me that patch 2/4 needs an update.

Regards,
Emil
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Re: [Mesa-dev] [PATCH 2/4] vl: add drm support for vl_screen

[Emil Velikov]

On 5 November 2015 at 18:47, Leo Liu  wrote:
> This will allow the state trackers to use render nodes
> with screen creation
>
> Signed-off-by: Leo Liu 
> ---
>  src/gallium/auxiliary/Makefile.sources   |  3 +-
>  src/gallium/auxiliary/vl/vl_winsys.h |  6 +++
>  src/gallium/auxiliary/vl/vl_winsys_drm.c | 76 
> 
>  3 files changed, 84 insertions(+), 1 deletion(-)
>  create mode 100644 src/gallium/auxiliary/vl/vl_winsys_drm.c
>
> diff --git a/src/gallium/auxiliary/Makefile.sources 
> b/src/gallium/auxiliary/Makefile.sources
> index 6e22ced..82ef5ec 100644
> --- a/src/gallium/auxiliary/Makefile.sources
> +++ b/src/gallium/auxiliary/Makefile.sources
> @@ -349,7 +349,8 @@ VL_SOURCES := \
>
>  # XXX: Nuke this as our dri targets no longer depend on VL.
>  VL_WINSYS_SOURCES := \
> -   vl/vl_winsys_dri.c
> +   vl/vl_winsys_dri.c \
> +   vl/vl_winsys_drm.c
>
>  VL_STUB_SOURCES := \
> vl/vl_stubs.c
> diff --git a/src/gallium/auxiliary/vl/vl_winsys.h 
> b/src/gallium/auxiliary/vl/vl_winsys.h
> index f6b47c9..df01917 100644
> --- a/src/gallium/auxiliary/vl/vl_winsys.h
> +++ b/src/gallium/auxiliary/vl/vl_winsys.h
> @@ -66,4 +66,10 @@ vl_screen_set_next_timestamp(struct vl_screen *vscreen, 
> uint64_t stamp);
>  void*
>  vl_screen_get_private(struct vl_screen *vscreen);
>
> +struct vl_screen*
> +vl_drm_screen_create(int fd);
> +
> +void
> +vl_drm_screen_destroy(struct vl_screen *vscreen);
> +
>  #endif
> diff --git a/src/gallium/auxiliary/vl/vl_winsys_drm.c 
> b/src/gallium/auxiliary/vl/vl_winsys_drm.c
> new file mode 100644
> index 000..65b74eb
> --- /dev/null
> +++ b/src/gallium/auxiliary/vl/vl_winsys_drm.c
> @@ -0,0 +1,76 @@
> +/**
> + *
> + * Copyright 2009 Younes Manton.
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the
> + * "Software"), to deal in the Software without restriction, including
> + * without limitation the rights to use, copy, modify, merge, publish,
> + * distribute, sub license, and/or sell copies of the Software, and to
> + * permit persons to whom the Software is furnished to do so, subject to
> + * the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the
> + * next paragraph) shall be included in all copies or substantial portions
> + * of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
> + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
> + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
> + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
> + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> + *
> + **/
> +
> +#include 
> +
> +#include "pipe/p_screen.h"
> +#include "pipe-loader/pipe_loader.h"
> +
> +#include "util/u_memory.h"
> +#include "vl/vl_winsys.h"
> +
> +struct vl_screen*
> +vl_drm_screen_create(int fd)
> +{
> +   struct vl_screen *vscreen;
> +
> +   vscreen = CALLOC_STRUCT(vl_screen);
> +   if (!vscreen)
> +  return NULL;
> +
> +#if GALLIUM_STATIC_TARGETS
> +   vscreen->pscreen = dd_create_screen(fd);
> +#else
> +   if (pipe_loader_drm_probe_fd(>dev, fd)) {
Add a dup() in the above. So that it reads

if (pipe_loader_drm_probe_fd(>dev, dup(fd))) {

Thanks
Emil
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Re: [Mesa-dev] [PATCH 2/2] gbm: Add flags to enable creation of rotated scanout buffers (v3)

[Ville Syrjälä]

On Fri, Nov 06, 2015 at 06:56:13PM +0900, Michel Dänzer wrote:
> On 06.11.2015 12:08, Vivek Kasireddy wrote:
> > For certain platforms that support rotated scanout buffers, currently,
> > there is no way to create them with the GBM DRI interface. These flags
> > will instruct the DRI driver to create the buffer by setting
> > additional requirements such as tiling mode.
> > 
> > v2: Reserve a bit per angle. (Ville and Michel)
> > 
> > v3:
> > - Combine all GBM_BO_USE_SCANOUT_ROTATION_* flags into
> >   GBM_BO_USE_SCANOUT_ANY macro (Michel)
> > - Pull the code that updates dri_use based on the rotation flag
> >   into a separate function.
> 
> [...]
> 
> > diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
> > index 57cdeac..741e509 100644
> > --- a/src/gbm/backends/dri/gbm_dri.c
> > +++ b/src/gbm/backends/dri/gbm_dri.c
> > @@ -124,6 +124,20 @@ image_get_buffers(__DRIdrawable *driDrawable,
> >  }
> >  
> >  static void
> > +gbm_to_dri_flag(uint32_t usage,
> > +unsigned *dri_use)
> > +{
> > +   if (usage & GBM_BO_USE_SCANOUT)
> > +  *dri_use |= __DRI_IMAGE_USE_SCANOUT;
> > +   if (usage & GBM_BO_USE_SCANOUT_ROTATION_90)
> > +  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_90;
> > +   if (usage & GBM_BO_USE_SCANOUT_ROTATION_180)
> > +  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_180;
> > +   if (usage & GBM_BO_USE_SCANOUT_ROTATION_270)
> > +  *dri_use |= __DRI_IMAGE_USE_SCANOUT_ROTATION_270;
> > +}
> 
> I like the idea of this helper function, but it could handle
> GBM_BO_USE_CURSOR and GBM_BO_USE_LINEAR as well. Ideally, there would be
> a separate preparatory change which creates the helper function and
> makes gbm_dri_bo_import and gbm_dri_bo_create use it; then this change
> can just add the new flags in the helper function. If that's too much
> trouble, the handling of the other flags can be moved into the helper
> function in a followup change.
> 
> 
> > diff --git a/src/gbm/main/gbm.h b/src/gbm/main/gbm.h
> > index 8db2153..4bda089 100644
> > --- a/src/gbm/main/gbm.h
> > +++ b/src/gbm/main/gbm.h
> > @@ -214,6 +214,13 @@ enum gbm_bo_flags {
> >  * Buffer is linear, i.e. not tiled.
> >  */
> > GBM_BO_USE_LINEAR = (1 << 4),
> > +   /**
> > +* Buffer would be rotated and some platforms have additional tiling
> > +* requirements for rotated scanout buffers.
> > +*/
> > +   GBM_BO_USE_SCANOUT_ROTATION_90 = (1 << 5),
> > +   GBM_BO_USE_SCANOUT_ROTATION_180 = (1 << 6),
> > +   GBM_BO_USE_SCANOUT_ROTATION_270 = (1 << 7),
> >  };
> 
> Hmm, we should probably explicitly specify the orientation of the 90 and
> 270 degree rotations. Clockwise? (Same in patch 1)

kms (and xrandr) are ccw.

-- 
Ville Syrjälä
Intel OTC
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Re: [Mesa-dev] [PATCH 4/6] glsl: add support for complie-time constant expressions

[Emil Velikov]

Hi Tim,

In my (limited) experience going through the glsl code, I've noticed
that in a few cases we tend to do the same "flags.q.foo &&
validate_foo()" in a number of occasions. In some cases we silently
ignore errors, while on others we omit checking the return value of
validate_foo() all together.

I'm leaning that at least some of these look fishy, although I would
appreciate any feedback (from everyone for that matter).
Should we try to consolidate all the above pattern(s), where is the
clear cut when we can and cannot continue if the validation fails ?

A couple of related (and other) comments inline.

On 5 November 2015 at 11:17, Timothy Arceri  wrote:
> From: Timothy Arceri 
>
> In this patch we introduce a new ast type for holding the new
> compile-time constant expressions. The main reason for this is that
> we can no longer do merging of layout qualifiers before they have been
> converted into GLSL IR.
>
> The remainder of the patch replaces all the old interger constant
> qualifiers with either the new ast_layout_expression type if
> the qualifier requires merging or ast_expression if the qualifier
> can't have mulitple declorations or if all but he newest qualifier
> is simply ignored.
>
> There are three main helper functions introduced in this patch:
>
> - process_qualifier_constant()
>
>  Used to evaluate qualifiers of type ast_expression
>
> - ast_layout_expression::process_qualifier_constant()
>
>  Used to merge and then evaluate qualifiers of type ast_layout_expression
>
> - ast_layout_expression::merge_qualifier()
>
>  Simply appends a qualifier to a list to be merged later by
>  process_qualifier_constant()
>
> In order to avoid cascading error messages the process_qualifier_constant()
> helpers return a bool.
> ---
>  src/glsl/ast.h  |  60 ++---
>  src/glsl/ast_to_hir.cpp | 274 
> 
>  src/glsl/ast_type.cpp   | 128 +++
>  src/glsl/glsl_parser.yy |  25 ++--
>  src/glsl/glsl_parser_extras.cpp |  68 ++
>  5 files changed, 363 insertions(+), 192 deletions(-)
>
> diff --git a/src/glsl/ast.h b/src/glsl/ast.h
> index afd2d41..8fbb5dd 100644
> --- a/src/glsl/ast.h
> +++ b/src/glsl/ast.h
> @@ -350,6 +350,26 @@ public:
> exec_list array_dimensions;
>  };
>
> +class ast_layout_expression : public ast_node {
> +public:
> +   ast_layout_expression(const struct YYLTYPE , ast_expression *expr)
> +   {
> +  set_location(locp);
> +  layout_const_expressions.push_tail(>link);
> +   }
> +
> +   bool process_qualifier_constant(struct _mesa_glsl_parse_state *state,
> +   const char *qual_indentifier,
> +   int *value);
> +
> +   void merge_qualifier(ast_layout_expression *l_expr)
> +   {
> +  
> layout_const_expressions.append_list(_expr->layout_const_expressions);
> +   }
> +
> +   exec_list layout_const_expressions;
> +};
> +
>  /**
>   * C-style aggregate initialization class
>   *
> @@ -553,13 +573,11 @@ struct ast_type_qualifier {
>uint64_t i;
> } flags;
>
> -   struct YYLTYPE *loc;
> -
> /** Precision of the type (highp/medium/lowp). */
> unsigned precision:2;
>
> /** Geometry shader invocations for GL_ARB_gpu_shader5. */
> -   int invocations;
> +   ast_layout_expression *invocations;
>
> /**
>  * Location specified via GL_ARB_explicit_attrib_location layout
> @@ -567,20 +585,20 @@ struct ast_type_qualifier {
>  * \note
>  * This field is only valid if \c explicit_location is set.
>  */
> -   int location;
> +   ast_expression *location;
> /**
>  * Index specified via GL_ARB_explicit_attrib_location layout
>  *
>  * \note
>  * This field is only valid if \c explicit_index is set.
>  */
> -   int index;
> +   ast_expression *index;
>
> /** Maximum output vertices in GLSL 1.50 geometry shaders. */
> -   int max_vertices;
> +   ast_layout_expression *max_vertices;
>
> /** Stream in GLSL 1.50 geometry shaders. */
> -   unsigned stream;
> +   ast_expression *stream;
>
> /**
>  * Input or output primitive type in GLSL 1.50 geometry shaders
> @@ -594,7 +612,7 @@ struct ast_type_qualifier {
>  * \note
>  * This field is only valid if \c explicit_binding is set.
>  */
> -   int binding;
> +   ast_expression *binding;
>
> /**
>  * Offset specified via GL_ARB_shader_atomic_counter's "offset"
> @@ -603,14 +621,14 @@ struct ast_type_qualifier {
>  * \note
>  * This field is only valid if \c explicit_offset is set.
>  */
> -   int offset;
> +   ast_expression *offset;
>
> /**
>  * Local size specified via GL_ARB_compute_shader's "local_size_{x,y,z}"
>  * layout qualifier.  Element i of this array is only valid if
>  * flags.q.local_size & (1 << i) is set.
>  */
> -   int local_size[3];
> +   ast_layout_expression *local_size[3];
>
> /** 

[Mesa-dev] [PATCH v5 5/7] glsl: Add precision information to ir_variable

[Tapani Pälli]

From: Iago Toral Quiroga 

We will need this later on when we implement proper support for
precision qualifiers in the drivers and also to do link time checks for
uniforms as indicated by the spec.

This patch also adds compile-time checks for variables without precision
information (currently, Mesa only checks that a default precision is set
for floats in fragment shaders).

As indicated by Ian, the addition of the precision information to
ir_variable has been done using a bitfield and pahole to identify an
available hole so that memory requirements for ir_variable stay the
same.

v2 (Ian):
  - Avoid if-ladders by defining arrays of supported sampler names and
indexing
into them with type->sampler_array + 2 * type->sampler_shadow
  - Make the code that selects the precision qualifier to use an utility
function
  - Fix a typo

v3 (Tapani):
  - rebased
  - squashed in "Precision qualifiers are not allowed on structs"
  - fixed select_gles_precision for sampler arrays
  - fixed precision_qualifier_allowed for arrays of structs

v4 (Tapani):
  - add atomic_uint handling
  - do not allow precision qualifier on images
  (issues reported by Marta)

v5 (Tapani):
  - support precision qualifier on image types
---
 src/glsl/ast_to_hir.cpp | 296 
 src/glsl/ir.h   |  13 ++
 src/glsl/nir/glsl_types.cpp |   4 +
 src/glsl/nir/glsl_types.h   |  11 ++
 4 files changed, 301 insertions(+), 23 deletions(-)

diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index b6d662b..1240615 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -2189,10 +2189,10 @@ precision_qualifier_allowed(const glsl_type *type)
 * From this, we infer that GLSL 1.30 (and later) should allow precision
 * qualifiers on sampler types just like float and integer types.
 */
-   return type->is_float()
+   return (type->is_float()
|| type->is_integer()
-   || type->is_record()
-   || type->contains_opaque();
+   || type->contains_opaque())
+   && !type->without_array()->is_record();
 }
 
 const glsl_type *
@@ -2210,31 +2210,268 @@ ast_type_specifier::glsl_type(const char **name,
return type;
 }
 
-const glsl_type *
-ast_fully_specified_type::glsl_type(const char **name,
-struct _mesa_glsl_parse_state *state) const
+/**
+ * From the OpenGL ES 3.0 spec, 4.5.4 Default Precision Qualifiers:
+ *
+ * "The precision statement
+ *
+ *precision precision-qualifier type;
+ *
+ *  can be used to establish a default precision qualifier. The type field can
+ *  be either int or float or any of the sampler types, (...) If type is float,
+ *  the directive applies to non-precision-qualified floating point type
+ *  (scalar, vector, and matrix) declarations. If type is int, the directive
+ *  applies to all non-precision-qualified integer type (scalar, vector, 
signed,
+ *  and unsigned) declarations."
+ *
+ * We use the symbol table to keep the values of the default precisions for
+ * each 'type' in each scope and we use the 'type' string from the precision
+ * statement as key in the symbol table. When we want to retrieve the default
+ * precision associated with a given glsl_type we need to know the type string
+ * associated with it. This is what this function returns.
+ */
+static const char *
+get_type_name_for_precision_qualifier(const glsl_type *type)
 {
-   const struct glsl_type *type = this->specifier->glsl_type(name, state);
-
-   if (type == NULL)
-  return NULL;
+   switch (type->base_type) {
+   case GLSL_TYPE_FLOAT:
+  return "float";
+   case GLSL_TYPE_UINT:
+   case GLSL_TYPE_INT:
+  return "int";
+   case GLSL_TYPE_ATOMIC_UINT:
+  return "atomic_uint";
+   case GLSL_TYPE_IMAGE:
+   /* fallthrough */
+   case GLSL_TYPE_SAMPLER: {
+  const unsigned type_idx =
+ type->sampler_array + 2 * type->sampler_shadow;
+  const unsigned offset = type->base_type == GLSL_TYPE_SAMPLER ? 0 : 4;
+  assert(type_idx < 4);
+  switch (type->sampler_type) {
+  case GLSL_TYPE_FLOAT:
+ switch (type->sampler_dimensionality) {
+ case GLSL_SAMPLER_DIM_1D: {
+assert(type->base_type == GLSL_TYPE_SAMPLER);
+static const char *const names[4] = {
+  "sampler1D", "sampler1DArray",
+  "sampler1DShadow", "sampler1DArrayShadow"
+};
+return names[type_idx];
+ }
+ case GLSL_SAMPLER_DIM_2D: {
+static const char *const names[8] = {
+  "sampler2D", "sampler2DArray",
+  "sampler2DShadow", "sampler2DArrayShadow",
+  "image2D", "image2DArray", NULL, NULL
+};
+return names[offset + type_idx];
+ }
+ case GLSL_SAMPLER_DIM_3D: {
+static const char *const names[8] = {
+  "sampler3D", NULL, NULL, NULL,
+  "image3D", NULL, NULL, NULL
+   

Re: [Mesa-dev] [PATCH] android: fix LOCAL_C_INCLUDES to find glsl_types.h

[Emil Velikov]

Hi Mauro

On 6 November 2015 at 03:31, Mauro Rossi  wrote:
> These changes are necessary to avoid building errors in glsl and i965
> ---
>  src/glsl/Android.mk  | 6 --
>  src/mesa/drivers/dri/i965/Android.mk | 3 ++-
>  2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/src/glsl/Android.mk b/src/glsl/Android.mk
> index f63b7da..6902ea4 100644
> --- a/src/glsl/Android.mk
> +++ b/src/glsl/Android.mk
> @@ -42,7 +42,8 @@ LOCAL_C_INCLUDES := \
> $(MESA_TOP)/src/mapi \
> $(MESA_TOP)/src/mesa \
> $(MESA_TOP)/src/gallium/include \
> -   $(MESA_TOP)/src/gallium/auxiliary
> +   $(MESA_TOP)/src/gallium/auxiliary \
> +   $(MESA_TOP)/src/glsl/nir
>
>  LOCAL_MODULE := libmesa_glsl
>
> @@ -63,7 +64,8 @@ LOCAL_C_INCLUDES := \
> $(MESA_TOP)/src/mapi \
> $(MESA_TOP)/src/mesa \
> $(MESA_TOP)/src/gallium/include \
> -   $(MESA_TOP)/src/gallium/auxiliary
> +   $(MESA_TOP)/src/gallium/auxiliary \
> +   $(MESA_TOP)/src/glsl/nir
>
>  LOCAL_STATIC_LIBRARIES := libmesa_glsl libmesa_glsl_utils libmesa_util
>
> diff --git a/src/mesa/drivers/dri/i965/Android.mk 
> b/src/mesa/drivers/dri/i965/Android.mk
> index d30a053..f9a914a 100644
> --- a/src/mesa/drivers/dri/i965/Android.mk
> +++ b/src/mesa/drivers/dri/i965/Android.mk
> @@ -45,7 +45,8 @@ LOCAL_CFLAGS += \
>  endif
>
>  LOCAL_C_INCLUDES := \
> -   $(MESA_DRI_C_INCLUDES)
> +   $(MESA_DRI_C_INCLUDES) \
> +   $(MESA_TOP)/src/glsl/nir
>
>  LOCAL_SRC_FILES := \
> $(i965_compiler_FILES) \

Following the Android way of exporting includes I believe you want the following

diff --git a/src/glsl/Android.gen.mk b/src/glsl/Android.gen.mk
index 6898fb0..59cc857 100644
--- a/src/glsl/Android.gen.mk
+++ b/src/glsl/Android.gen.mk
@@ -38,7 +38,8 @@ LOCAL_C_INCLUDES += \
  $(MESA_TOP)/src/glsl/nir

 LOCAL_EXPORT_C_INCLUDE_DIRS += \
- $(intermediates)/nir
+ $(intermediates)/nir \
+ $(MESA_TOP)/src/glsl/nir

 LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/, \
  $(LIBGLCPP_GENERATED_FILES) \


Formatting might be broken (thanks gmail), although the gist is there.
Can you give it a try (note the order is important)

Thanks
Emil
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Re: [Mesa-dev] [PATCH v2 1/4] st/va: properly indent buffer.c, config.c, image.c and picture.c

[Christian König]

On 06.11.2015 11:33, Julien Isorce wrote:

Some lines were using 4 indentation spaces instead of 3.

The switch in vlVaAcquireBufferHandle actually had wrong brackets
surrounding case+default.

Signed-off-by: Julien Isorce 


Well you should probably remove the note about the switch statement from 
the commit message now that this fix is in a separate patch.


With that fixed the whole set is Reviewed-by: Christian König 



Regards,
Christian.


---
  src/gallium/state_trackers/va/buffer.c  | 14 +++---
  src/gallium/state_trackers/va/config.c  | 12 ++---
  src/gallium/state_trackers/va/image.c   |  4 +-
  src/gallium/state_trackers/va/picture.c | 82 -
  4 files changed, 56 insertions(+), 56 deletions(-)

diff --git a/src/gallium/state_trackers/va/buffer.c 
b/src/gallium/state_trackers/va/buffer.c
index 71a6503..47bf35a 100644
--- a/src/gallium/state_trackers/va/buffer.c
+++ b/src/gallium/state_trackers/va/buffer.c
@@ -152,11 +152,11 @@ vlVaUnmapBuffer(VADriverContextP ctx, VABufferID buf_id)
return VA_STATUS_ERROR_INVALID_BUFFER;
  
 if (buf->derived_surface.resource) {

- if (!buf->derived_surface.transfer)
-return VA_STATUS_ERROR_INVALID_BUFFER;
+  if (!buf->derived_surface.transfer)
+ return VA_STATUS_ERROR_INVALID_BUFFER;
  
- pipe_buffer_unmap(drv->pipe, buf->derived_surface.transfer);

- buf->derived_surface.transfer = NULL;
+  pipe_buffer_unmap(drv->pipe, buf->derived_surface.transfer);
+  buf->derived_surface.transfer = NULL;
 }
  
 return VA_STATUS_SUCCESS;

@@ -175,10 +175,10 @@ vlVaDestroyBuffer(VADriverContextP ctx, VABufferID buf_id)
return VA_STATUS_ERROR_INVALID_BUFFER;
  
 if (buf->derived_surface.resource) {

- if (buf->export_refcount > 0)
-   return VA_STATUS_ERROR_INVALID_BUFFER;
+  if (buf->export_refcount > 0)
+ return VA_STATUS_ERROR_INVALID_BUFFER;
  
- pipe_resource_reference(>derived_surface.resource, NULL);

+  pipe_resource_reference(>derived_surface.resource, NULL);
 }
  
 FREE(buf->data);

diff --git a/src/gallium/state_trackers/va/config.c 
b/src/gallium/state_trackers/va/config.c
index 0f47aac..a545a18 100644
--- a/src/gallium/state_trackers/va/config.c
+++ b/src/gallium/state_trackers/va/config.c
@@ -71,8 +71,8 @@ vlVaQueryConfigEntrypoints(VADriverContextP ctx, VAProfile 
profile,
 *num_entrypoints = 0;
  
 if (profile == VAProfileNone) {

-   entrypoint_list[(*num_entrypoints)++] = VAEntrypointVideoProc;
-   return VA_STATUS_SUCCESS;
+  entrypoint_list[(*num_entrypoints)++] = VAEntrypointVideoProc;
+  return VA_STATUS_SUCCESS;
 }
  
 p = ProfileToPipe(profile);

@@ -104,7 +104,7 @@ vlVaGetConfigAttributes(VADriverContextP ctx, VAProfile 
profile, VAEntrypoint en
   value = VA_RT_FORMAT_YUV420;
   break;
case VAConfigAttribRateControl:
-value = VA_RC_NONE;
+ value = VA_RC_NONE;
   break;
default:
   value = VA_ATTRIB_NOT_SUPPORTED;
@@ -127,8 +127,8 @@ vlVaCreateConfig(VADriverContextP ctx, VAProfile profile, 
VAEntrypoint entrypoin
return VA_STATUS_ERROR_INVALID_CONTEXT;
  
 if (profile == VAProfileNone && entrypoint == VAEntrypointVideoProc) {

-   *config_id = PIPE_VIDEO_PROFILE_UNKNOWN;
-   return VA_STATUS_SUCCESS;
+  *config_id = PIPE_VIDEO_PROFILE_UNKNOWN;
+  return VA_STATUS_SUCCESS;
 }
  
 p = ProfileToPipe(profile);

@@ -167,7 +167,7 @@ vlVaQueryConfigAttributes(VADriverContextP ctx, VAConfigID 
config_id, VAProfile
  
 if (config_id == PIPE_VIDEO_PROFILE_UNKNOWN) {

*entrypoint = VAEntrypointVideoProc;
-   *num_attribs = 0;
+  *num_attribs = 0;
return VA_STATUS_SUCCESS;
 }
  
diff --git a/src/gallium/state_trackers/va/image.c b/src/gallium/state_trackers/va/image.c

index c6d0c5a..ae07da8 100644
--- a/src/gallium/state_trackers/va/image.c
+++ b/src/gallium/state_trackers/va/image.c
@@ -447,8 +447,8 @@ vlVaPutImage(VADriverContextP ctx, VASurfaceID surface, 
VAImageID image,
tmp_buf = drv->pipe->create_video_buffer(drv->pipe, >templat);
  
if (!tmp_buf) {

-  surf->templat.buffer_format = old_surf_format;
-  return VA_STATUS_ERROR_ALLOCATION_FAILED;
+ surf->templat.buffer_format = old_surf_format;
+ return VA_STATUS_ERROR_ALLOCATION_FAILED;
}
  
surf->buffer->destroy(surf->buffer);

diff --git a/src/gallium/state_trackers/va/picture.c 
b/src/gallium/state_trackers/va/picture.c
index e850689..644b848 100644
--- a/src/gallium/state_trackers/va/picture.c
+++ b/src/gallium/state_trackers/va/picture.c
@@ -65,7 +65,7 @@ vlVaBeginPicture(VADriverContextP ctx, VAContextID 
context_id, VASurfaceID rende
if ((context->target->buffer_format != PIPE_FORMAT_B8G8R8A8_UNORM  &&
 context->target->buffer_format != PIPE_FORMAT_R8G8B8A8_UNORM) ||
  

Re: [Mesa-dev] [PATCH 3/6] glsl: move layout qualifier validation out of the parser

[Emil Velikov]

On 5 November 2015 at 11:17, Timothy Arceri  wrote:
> From: Timothy Arceri 
>
> This is in preperation for compile-time constant support.
typo "preparation"

>
> Also fix up the locations for some of the extension checking
> error messages in the parser. We now correctly give the location
> of the layout qualifier identifier rather than the integer constant.
>
> The validation is moved to two locations, for validation on variables the
> checks are moved to the ast to hir pass and for qualifiers that apply to the
> shader the validation is moved into glsl_parser_extras.cpp.
>
> In order to do validation at the later stage in glsl_parser_extras.cpp we
> need to temporarily add a field in ast_type_qualifier to keep track of the
> parser location, this will be removed in a following patch when we
> introduce a new type for storing the comiple-time qualifiers.
>
> Also as the set_shader_inout_layout() function in glsl parser extras is
> normally called after all validation is done we need to move the code that
> sets CompileStatus and InfoLog otherwise the newly moved error messages will
> be ignored.
Personally I would split the validate_layout_qualifiers() introduction
and the CompileStatus/InfoLog movement into separate patches.

Feel free to ignore, if others don't share my sentiment
-Emil
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Re: [Mesa-dev] [PATCH] glsl: Relax requirement on Centroid matching between shader stages

[Ian Romanick]

On 11/04/2015 01:04 AM, Marta Lofstedt wrote:
> From: Marta Lofstedt 
> 
> In OpenGL 4.4, section 4.5, the requirement for interpolation
> qualifiers to match over shader stages was removed.
> In OpenGL ES 3.1, section 9.2.1 there is a table showing that
> centroid does not have to match between shader stages.

I haven't checked this yet... does either spec provide guidance as to
what happens when only the vertex shader stage specifies centroid?  Is
the interpolation centroid or not?

...and are we doing the right thing? :)

> Also see bug 92743 for more discussions.

Please note this, after your s-o-b, as

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92743

I think this is also a candidate for stable:

Cc: mesa-sta...@lists.freedesktop.org

> Signed-off-by: Marta Lofstedt 
> ---
>  src/glsl/link_varyings.cpp | 14 --
>  1 file changed, 14 deletions(-)
> 
> diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
> index 7e77a67..d0edc71 100644
> --- a/src/glsl/link_varyings.cpp
> +++ b/src/glsl/link_varyings.cpp
> @@ -96,20 +96,6 @@ cross_validate_types_and_qualifiers(struct 
> gl_shader_program *prog,
>}
> }
>  
> -   /* Check that all of the qualifiers match between stages.
> -*/
> -   if (input->data.centroid != output->data.centroid) {
> -  linker_error(prog,
> -   "%s shader output `%s' %s centroid qualifier, "
> -   "but %s shader input %s centroid qualifier\n",
> -   _mesa_shader_stage_to_string(producer_stage),
> -   output->name,
> -   (output->data.centroid) ? "has" : "lacks",
> -   _mesa_shader_stage_to_string(consumer_stage),
> -   (input->data.centroid) ? "has" : "lacks");
> -  return;
> -   }
> -
> if (input->data.sample != output->data.sample) {
>linker_error(prog,
> "%s shader output `%s' %s sample qualifier, "
> 

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Re: [Mesa-dev] [PATCH] vbo: fix another GL_LINE_LOOP bug

[Brian Paul]

On 11/06/2015 09:40 AM, Emil Velikov wrote:

Hi Brian,

On 31 October 2015 at 13:38, Brian Paul  wrote:

Very long line loops which spanned 3 or more vertex buffers were not
handled correctly and could result in stray lines.

The piglit lineloop test draws 1 vertices by default, and is not
long enough to trigger this.  Even 'lineloop -count 10' doesn't
trigger the bug.

For future reference, the issue can be reproduced by changing Mesa's
VBO_VERT_BUFFER_SIZE to 4096 and changing the piglit lineloop test to
use glVertex2f(), draw 3 loops instead of 1, and specifying -count
1023.

I haven't been following on the VBO patches that you've sent recently.
Do you think that any of them are mesa-stable material ? If so can you
please forward the sha's the the ML (or just list them here).


I'd like to wait a bit to give time to see if any more corner case bugs 
are exposed.


When is the 11.1 release expected?

-Brian

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Re: [Mesa-dev] [PATCH v3 1/8] glapi: Add EXT_blend_func_extended XML definitions

[Ian Romanick]

On 11/05/2015 06:47 PM, Ryan Houdek wrote:
> ---
>  src/mapi/glapi/gen/EXT_gpu_shader4.xml  |  3 ++-
>  src/mapi/glapi/gen/es_EXT.xml   | 26 ++
>  src/mesa/main/tests/dispatch_sanity.cpp |  8 
>  3 files changed, 36 insertions(+), 1 deletion(-)
> 
> diff --git a/src/mapi/glapi/gen/EXT_gpu_shader4.xml 
> b/src/mapi/glapi/gen/EXT_gpu_shader4.xml
> index b1f7eae..b4120b9 100644
> --- a/src/mapi/glapi/gen/EXT_gpu_shader4.xml
> +++ b/src/mapi/glapi/gen/EXT_gpu_shader4.xml
> @@ -232,7 +232,8 @@
>  
>  
>  
> -
> + + es2="3.0">

Is this right?  It looks like patch 8 enables the extension in OpenGL ES
2.0 contexts.

There are more occurrences of this below...

>  
>  
>  
> diff --git a/src/mapi/glapi/gen/es_EXT.xml b/src/mapi/glapi/gen/es_EXT.xml
> index 9a777a2..577d825 100644
> --- a/src/mapi/glapi/gen/es_EXT.xml
> +++ b/src/mapi/glapi/gen/es_EXT.xml
> @@ -914,4 +914,30 @@
>  
>  
>  
> +
> +
> + alias="BindFragDataLocationIndexed"
> +es2="3.0">
> +
> +
> +
> +
> +
> +
> + +es2="3.0">
> +
> +
> +
> +
> +
> + alias="GetProgramResourceLocationIndex"
> +   es2="3.1">
> +
> +
> +
> +
> +
> +
> +
>  
> diff --git a/src/mesa/main/tests/dispatch_sanity.cpp 
> b/src/mesa/main/tests/dispatch_sanity.cpp
> index abe0f43..97f81f9 100644
> --- a/src/mesa/main/tests/dispatch_sanity.cpp
> +++ b/src/mesa/main/tests/dispatch_sanity.cpp
> @@ -2421,6 +2421,11 @@ const struct function gles3_functions_possible[] = {
> { "glProgramUniform4uiEXT", 30, -1 },
> { "glProgramUniform4uivEXT", 30, -1 },
>  
> +   /* GL_EXT_blend_func_extended */
> +   { "glBindFragDataLocationIndexedEXT", 30, -1 },
> +   { "glGetFragDataIndexEXT", 30, -1 },
> +   { "glBindFragDataLocationEXT", 30, -1 },
> +
> { NULL, 0, -1 }
>  };
>  
> @@ -2509,5 +2514,8 @@ const struct function gles31_functions_possible[] = {
> /* GL_EXT_buffer_storage */
> { "glBufferStorageEXT", 31, -1 },
>  
> +   /* GL_EXT_blend_func_extended */
> +   { "glGetProgramResourceLocationIndexEXT", 31, -1 },
> +
> { NULL, 0, -1 },
>   };
> 

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Re: [Mesa-dev] [PATCH 2/4] vl: add drm support for vl_screen

[Liu, Leo]

>> +#if GALLIUM_STATIC_TARGETS
>> +   vscreen->pscreen = dd_create_screen(fd);
>> +#else
>> +   if (pipe_loader_drm_probe_fd(>dev, fd)) {
>Add a dup() in the above. So that it reads
>
>if (pipe_loader_drm_probe_fd(>dev, dup(fd))) {
>

The dup is handled is in st/va/context.c before calling vl_drm_screen_create

Regards,
Leo

>Thanks
>Emil
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Re: [Mesa-dev] [PATCH v3 7/8] mesa: Allow MAX_DUAL_SOURCE_DRAW_BUFFERS to be available to ES

[Ian Romanick]

This patch is

Reviewed-by: Ian Romanick 

On 11/05/2015 06:47 PM, Ryan Houdek wrote:
> ---
>  src/mesa/main/get_hash_params.py | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/src/mesa/main/get_hash_params.py 
> b/src/mesa/main/get_hash_params.py
> index fbc7b8f..9b22b91 100644
> --- a/src/mesa/main/get_hash_params.py
> +++ b/src/mesa/main/get_hash_params.py
> @@ -330,6 +330,9 @@ descriptor=[
>  
>  # GL_KHR_context_flush_control
>[ "CONTEXT_RELEASE_BEHAVIOR", "CONTEXT_ENUM(Const.ContextReleaseBehavior), 
> NO_EXTRA" ],
> +
> +# blend_func_extended
> +  [ "MAX_DUAL_SOURCE_DRAW_BUFFERS", 
> "CONTEXT_INT(Const.MaxDualSourceDrawBuffers), extra_ARB_blend_func_extended" 
> ],
>  ]},
>  
>  # GLES3 is not a typo.
> @@ -801,7 +804,6 @@ descriptor=[
>  # GL_ARB_robustness
>[ "RESET_NOTIFICATION_STRATEGY_ARB", "CONTEXT_ENUM(Const.ResetStrategy), 
> NO_EXTRA" ],
>  
> -  [ "MAX_DUAL_SOURCE_DRAW_BUFFERS", 
> "CONTEXT_INT(Const.MaxDualSourceDrawBuffers), extra_ARB_blend_func_extended" 
> ],
>  
>  # GL_ARB_uniform_buffer_object
>[ "MAX_GEOMETRY_UNIFORM_BLOCKS", 
> "CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxUniformBlocks), 
> extra_ARB_uniform_buffer_object_and_geometry_shader" ],
> 

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Re: [Mesa-dev] [PATCH v3 4/8] glsl: Add GL_EXT_blend_func_extended preprocessor define

[Ian Romanick]

This patch is

Reviewed-by: Ian Romanick 

On 11/05/2015 06:47 PM, Ryan Houdek wrote:
> ---
>  src/glsl/glcpp/glcpp-parse.y | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/src/glsl/glcpp/glcpp-parse.y b/src/glsl/glcpp/glcpp-parse.y
> index 4acccf7..10bf83f 100644
> --- a/src/glsl/glcpp/glcpp-parse.y
> +++ b/src/glsl/glcpp/glcpp-parse.y
> @@ -2384,6 +2384,8 @@ _glcpp_parser_handle_version_declaration(glcpp_parser_t 
> *parser, intmax_t versio
>   add_builtin_define(parser, "GL_OES_standard_derivatives", 
> 1);
>if (extensions->ARB_texture_multisample)
>   add_builtin_define(parser, 
> "GL_OES_texture_storage_multisample_2d_array", 1);
> +  if (extensions->ARB_blend_func_extended)
> + add_builtin_define(parser, "GL_EXT_blend_func_extended", 1);
>  }
>   } else {
>  add_builtin_define(parser, "GL_ARB_draw_buffers", 1);
> 

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Re: [Mesa-dev] [PATCH 2/4] vl: add drm support for vl_screen

[Emil Velikov]

On 6 November 2015 at 18:01, Liu, Leo  wrote:
>
>>> +#if GALLIUM_STATIC_TARGETS
>>> +   vscreen->pscreen = dd_create_screen(fd);
>>> +#else
>>> +   if (pipe_loader_drm_probe_fd(>dev, fd)) {
>>Add a dup() in the above. So that it reads
>>
>>if (pipe_loader_drm_probe_fd(>dev, dup(fd))) {
>>
>
> The dup is handled is in st/va/context.c before calling vl_drm_screen_create
>
Please, move it here ? There little point in getting more of these
ugly (for which I'm to blame) GALLIUM_STATIC_TARGETS macros around
than needed.

Thanks
Emil
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Re: [Mesa-dev] [PATCH v3 1/8] glapi: Add EXT_blend_func_extended XML definitions

[Ryan Houdek]

Yes this is correct. These functions are only available in ES 3.0+ profiles.
The only things that ES 2.0 gets is the new builtins for the shading
language.

On Fri, Nov 6, 2015 at 12:49 PM, Ian Romanick  wrote:

> On 11/05/2015 06:47 PM, Ryan Houdek wrote:
> > ---
> >  src/mapi/glapi/gen/EXT_gpu_shader4.xml  |  3 ++-
> >  src/mapi/glapi/gen/es_EXT.xml   | 26 ++
> >  src/mesa/main/tests/dispatch_sanity.cpp |  8 
> >  3 files changed, 36 insertions(+), 1 deletion(-)
> >
> > diff --git a/src/mapi/glapi/gen/EXT_gpu_shader4.xml
> b/src/mapi/glapi/gen/EXT_gpu_shader4.xml
> > index b1f7eae..b4120b9 100644
> > --- a/src/mapi/glapi/gen/EXT_gpu_shader4.xml
> > +++ b/src/mapi/glapi/gen/EXT_gpu_shader4.xml
> > @@ -232,7 +232,8 @@
> >  
> >  
> >
> > - alias="BindFragDataLocation">
> > + alias="BindFragDataLocation"
> > + es2="3.0">
>
> Is this right?  It looks like patch 8 enables the extension in OpenGL ES
> 2.0 contexts.
>
> There are more occurrences of this below...
>
> >  
> >  
> >  
> > diff --git a/src/mapi/glapi/gen/es_EXT.xml
> b/src/mapi/glapi/gen/es_EXT.xml
> > index 9a777a2..577d825 100644
> > --- a/src/mapi/glapi/gen/es_EXT.xml
> > +++ b/src/mapi/glapi/gen/es_EXT.xml
> > @@ -914,4 +914,30 @@
> >  
> >  
> >
> > +
> > +
> > + alias="BindFragDataLocationIndexed"
> > +es2="3.0">
> > +
> > +
> > +
> > +
> > +
> > +
> > + > +es2="3.0">
> > +
> > +
> > +
> > +
> > +
> > + alias="GetProgramResourceLocationIndex"
> > +   es2="3.1">
> > +
> > +
> > +
> > +
> > +
> > +
> > +
> >  
> > diff --git a/src/mesa/main/tests/dispatch_sanity.cpp
> b/src/mesa/main/tests/dispatch_sanity.cpp
> > index abe0f43..97f81f9 100644
> > --- a/src/mesa/main/tests/dispatch_sanity.cpp
> > +++ b/src/mesa/main/tests/dispatch_sanity.cpp
> > @@ -2421,6 +2421,11 @@ const struct function gles3_functions_possible[]
> = {
> > { "glProgramUniform4uiEXT", 30, -1 },
> > { "glProgramUniform4uivEXT", 30, -1 },
> >
> > +   /* GL_EXT_blend_func_extended */
> > +   { "glBindFragDataLocationIndexedEXT", 30, -1 },
> > +   { "glGetFragDataIndexEXT", 30, -1 },
> > +   { "glBindFragDataLocationEXT", 30, -1 },
> > +
> > { NULL, 0, -1 }
> >  };
> >
> > @@ -2509,5 +2514,8 @@ const struct function gles31_functions_possible[]
> = {
> > /* GL_EXT_buffer_storage */
> > { "glBufferStorageEXT", 31, -1 },
> >
> > +   /* GL_EXT_blend_func_extended */
> > +   { "glGetProgramResourceLocationIndexEXT", 31, -1 },
> > +
> > { NULL, 0, -1 },
> >   };
> >
>
>
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[Mesa-dev] [PATCH v2 2/4] vl: add drm support for vl_screen

[Leo Liu]

This will allow the state trackers to use render nodes
with screen creation

v2 -dup fd for pipe loader

Signed-off-by: Leo Liu 
Reviewed-by: Christian König 
---
 src/gallium/auxiliary/Makefile.sources   |  3 +-
 src/gallium/auxiliary/vl/vl_winsys.h |  6 +++
 src/gallium/auxiliary/vl/vl_winsys_drm.c | 77 
 3 files changed, 85 insertions(+), 1 deletion(-)
 create mode 100644 src/gallium/auxiliary/vl/vl_winsys_drm.c

diff --git a/src/gallium/auxiliary/Makefile.sources 
b/src/gallium/auxiliary/Makefile.sources
index 6e22ced..82ef5ec 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -349,7 +349,8 @@ VL_SOURCES := \
 
 # XXX: Nuke this as our dri targets no longer depend on VL.
 VL_WINSYS_SOURCES := \
-   vl/vl_winsys_dri.c
+   vl/vl_winsys_dri.c \
+   vl/vl_winsys_drm.c
 
 VL_STUB_SOURCES := \
vl/vl_stubs.c
diff --git a/src/gallium/auxiliary/vl/vl_winsys.h 
b/src/gallium/auxiliary/vl/vl_winsys.h
index f6b47c9..df01917 100644
--- a/src/gallium/auxiliary/vl/vl_winsys.h
+++ b/src/gallium/auxiliary/vl/vl_winsys.h
@@ -66,4 +66,10 @@ vl_screen_set_next_timestamp(struct vl_screen *vscreen, 
uint64_t stamp);
 void*
 vl_screen_get_private(struct vl_screen *vscreen);
 
+struct vl_screen*
+vl_drm_screen_create(int fd);
+
+void
+vl_drm_screen_destroy(struct vl_screen *vscreen);
+
 #endif
diff --git a/src/gallium/auxiliary/vl/vl_winsys_drm.c 
b/src/gallium/auxiliary/vl/vl_winsys_drm.c
new file mode 100644
index 000..1167fcf
--- /dev/null
+++ b/src/gallium/auxiliary/vl/vl_winsys_drm.c
@@ -0,0 +1,77 @@
+/**
+ *
+ * Copyright 2015 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **/
+
+#include 
+
+#include "pipe/p_screen.h"
+#include "pipe-loader/pipe_loader.h"
+#include "state_tracker/drm_driver.h"
+
+#include "util/u_memory.h"
+#include "vl/vl_winsys.h"
+
+struct vl_screen*
+vl_drm_screen_create(int fd)
+{
+   struct vl_screen *vscreen;
+
+   vscreen = CALLOC_STRUCT(vl_screen);
+   if (!vscreen)
+  return NULL;
+
+#if GALLIUM_STATIC_TARGETS
+   vscreen->pscreen = dd_create_screen(fd);
+#else
+   if (pipe_loader_drm_probe_fd(>dev, dup(fd))) {
+  vscreen->pscreen =
+ pipe_loader_create_screen(vscreen->dev, PIPE_SEARCH_DIR);
+  if (!vscreen->pscreen)
+ pipe_loader_release(>dev, 1);
+   }
+#endif
+
+   if (!vscreen->pscreen) {
+  FREE(vscreen);
+  return NULL;
+   }
+
+   return vscreen;
+}
+
+void
+vl_drm_screen_destroy(struct vl_screen *vscreen)
+{
+   assert(vscreen);
+
+   vscreen->pscreen->destroy(vscreen->pscreen);
+
+#if !GALLIUM_STATIC_TARGETS
+   pipe_loader_release(>dev, 1);
+#endif
+
+   FREE(vscreen);
+}
-- 
1.9.1

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[Mesa-dev] [PATCH v3 4/4] st/omx: add headless support

[Leo Liu]

This will allow dec/enc/transcode without X

v2:  -use env override even with X,
 -use loader_open_device instead of open
v3:  -cleanup

Signed-off-by: Leo Liu 
Reviewed-by: Christian König 
---
 src/gallium/state_trackers/omx/entrypoint.c | 45 ++---
 1 file changed, 35 insertions(+), 10 deletions(-)

diff --git a/src/gallium/state_trackers/omx/entrypoint.c 
b/src/gallium/state_trackers/omx/entrypoint.c
index a765666..7df90b1 100644
--- a/src/gallium/state_trackers/omx/entrypoint.c
+++ b/src/gallium/state_trackers/omx/entrypoint.c
@@ -38,6 +38,7 @@
 
 #include "os/os_thread.h"
 #include "util/u_memory.h"
+#include "loader/loader.h"
 
 #include "entrypoint.h"
 #include "vid_dec.h"
@@ -47,6 +48,8 @@ pipe_static_mutex(omx_lock);
 static Display *omx_display = NULL;
 static struct vl_screen *omx_screen = NULL;
 static unsigned omx_usecount = 0;
+static const char *omx_render_node = NULL;
+static int drm_fd;
 
 int omx_component_library_Setup(stLoaderComponentType **stComponents)
 {
@@ -73,18 +76,30 @@ struct vl_screen *omx_get_screen(void)
pipe_mutex_lock(omx_lock);
 
if (!omx_display) {
-  omx_display = XOpenDisplay(NULL);
-  if (!omx_display) {
- pipe_mutex_unlock(omx_lock);
- return NULL;
+  omx_render_node = debug_get_option("OMX_RENDER_NODE", NULL);
+  if (!omx_render_node) {
+ omx_display = XOpenDisplay(NULL);
+ if (!omx_display)
+goto error;
   }
}
 
if (!omx_screen) {
-  omx_screen = vl_screen_create(omx_display, 0);
-  if (!omx_screen) {
- pipe_mutex_unlock(omx_lock);
- return NULL;
+  if (omx_render_node) {
+ drm_fd = loader_open_device(omx_render_node);
+ if (drm_fd < 0)
+goto error;
+ omx_screen = vl_drm_screen_create(drm_fd);
+ if (!omx_screen) {
+close(drm_fd);
+goto error;
+ }
+  } else {
+ omx_screen = vl_screen_create(omx_display, 0);
+ if (!omx_screen) {
+XCloseDisplay(omx_display);
+goto error;
+ }
   }
}
 
@@ -92,14 +107,24 @@ struct vl_screen *omx_get_screen(void)
 
pipe_mutex_unlock(omx_lock);
return omx_screen;
+
+error:
+   pipe_mutex_unlock(omx_lock);
+   return NULL;
 }
 
 void omx_put_screen(void)
 {
pipe_mutex_lock(omx_lock);
if ((--omx_usecount) == 0) {
-  vl_screen_destroy(omx_screen);
-  XCloseDisplay(omx_display);
+  if (!omx_render_node) {
+ vl_screen_destroy(omx_screen);
+ if (omx_display)
+XCloseDisplay(omx_display);
+  } else {
+ close(drm_fd);
+ vl_drm_screen_destroy(omx_screen);
+  }
   omx_screen = NULL;
   omx_display = NULL;
}
-- 
1.9.1

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Re: [Mesa-dev] [PATCH 2/2] radeon/uvd: fix VC-1 simple/main profile decode v2

[Alex Deucher]

On Fri, Nov 6, 2015 at 5:58 AM, Christian König  wrote:
> From: Boyuan Zhang 
>
> We just needed to set the extra width/height fields to get this working.
>
> v2 (chk): rebased, CC stable added, commit message added, fixed coding style
>
> Signed-off-by: Boyuan Zhang 
> Signed-off-by: Christian König 
> Cc: "10.6 11.0" 

For the series:
Reviewed-by: Alex Deucher 

> ---
>  src/gallium/drivers/radeon/radeon_uvd.c   | 6 ++
>  src/gallium/drivers/radeon/radeon_video.c | 3 +--
>  2 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/radeon_uvd.c 
> b/src/gallium/drivers/radeon/radeon_uvd.c
> index 33b0136..0c643e5 100644
> --- a/src/gallium/drivers/radeon/radeon_uvd.c
> +++ b/src/gallium/drivers/radeon/radeon_uvd.c
> @@ -947,6 +947,12 @@ static void ruvd_end_frame(struct pipe_video_codec 
> *decoder,
> dec->msg->body.decode.width_in_samples = dec->base.width;
> dec->msg->body.decode.height_in_samples = dec->base.height;
>
> +   if ((picture->profile == PIPE_VIDEO_PROFILE_VC1_SIMPLE) ||
> +   (picture->profile == PIPE_VIDEO_PROFILE_VC1_MAIN)) {
> +   dec->msg->body.decode.width_in_samples = 
> align(dec->msg->body.decode.width_in_samples, 16) / 16;
> +   dec->msg->body.decode.height_in_samples = 
> align(dec->msg->body.decode.height_in_samples, 16) / 16;
> +   }
> +
> dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
> dec->msg->body.decode.bsd_size = bs_size;
> dec->msg->body.decode.db_pitch = dec->base.width;
> diff --git a/src/gallium/drivers/radeon/radeon_video.c 
> b/src/gallium/drivers/radeon/radeon_video.c
> index 32bfc32..f56c6cf 100644
> --- a/src/gallium/drivers/radeon/radeon_video.c
> +++ b/src/gallium/drivers/radeon/radeon_video.c
> @@ -244,8 +244,7 @@ int rvid_get_video_param(struct pipe_screen *screen,
> return codec != PIPE_VIDEO_FORMAT_MPEG4;
> return true;
> case PIPE_VIDEO_FORMAT_VC1:
> -   /* FIXME: VC-1 simple/main profile is broken */
> -   return profile == PIPE_VIDEO_PROFILE_VC1_ADVANCED;
> +   return true;
> case PIPE_VIDEO_FORMAT_HEVC:
> /* Carrizo only supports HEVC Main */
> return rscreen->family >= CHIP_CARRIZO &&
> --
> 1.9.1
>
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[Mesa-dev] [PATCH v2 3/4] st/va: use vl screen drm support from vl_wys_drm

[Leo Liu]

v2: -move the dup to vl_wys_drm for pipe loader

Signed-off-by: Leo Liu 
Reviewed-by: Christian König 
---
 src/gallium/state_trackers/va/context.c | 24 +++-
 1 file changed, 3 insertions(+), 21 deletions(-)

diff --git a/src/gallium/state_trackers/va/context.c 
b/src/gallium/state_trackers/va/context.c
index 25fa905..98c4104 100644
--- a/src/gallium/state_trackers/va/context.c
+++ b/src/gallium/state_trackers/va/context.c
@@ -28,8 +28,6 @@
 
 #include "pipe/p_screen.h"
 #include "pipe/p_video_codec.h"
-#include "pipe-loader/pipe_loader.h"
-#include "state_tracker/drm_driver.h"
 #include "util/u_memory.h"
 #include "util/u_handle_table.h"
 #include "util/u_video.h"
@@ -133,32 +131,16 @@ VA_DRIVER_INIT_FUNC(VADriverContextP ctx)
  return VA_STATUS_ERROR_INVALID_PARAMETER;
   }
 
-#if GALLIUM_STATIC_TARGETS
   drm_fd = drm_info->fd;
-#else
-  drm_fd = dup(drm_info->fd);
-#endif
 
   if (drm_fd < 0) {
  FREE(drv);
  return VA_STATUS_ERROR_INVALID_PARAMETER;
   }
 
-  drv->vscreen = CALLOC_STRUCT(vl_screen);
+  drv->vscreen = vl_drm_screen_create(drm_fd);
   if (!drv->vscreen)
  goto error_screen;
-
-#if GALLIUM_STATIC_TARGETS
-  drv->vscreen->pscreen = dd_create_screen(drm_fd);
-#else
-  if (pipe_loader_drm_probe_fd(>vscreen->dev, drm_fd))
- drv->vscreen->pscreen =
-   pipe_loader_create_screen(drv->vscreen->dev, PIPE_SEARCH_DIR);
-#endif
-
-  if (!drv->vscreen->pscreen)
- goto error_pipe;
-
   }
   break;
default:
@@ -203,7 +185,7 @@ error_pipe:
if (ctx->display_type == VA_DISPLAY_GLX || ctx->display_type == 
VA_DISPLAY_X11)
   vl_screen_destroy(drv->vscreen);
else
-  FREE(drv->vscreen);
+  vl_drm_screen_destroy(drv->vscreen);
 
 error_screen:
FREE(drv);
@@ -343,7 +325,7 @@ vlVaTerminate(VADriverContextP ctx)
if (ctx->display_type == VA_DISPLAY_GLX || ctx->display_type == 
VA_DISPLAY_X11)
   vl_screen_destroy(drv->vscreen);
else
-  FREE(drv->vscreen);
+  vl_drm_screen_destroy(drv->vscreen);
handle_table_destroy(drv->htab);
FREE(drv);
 
-- 
1.9.1

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Re: [Mesa-dev] [PATCH] radeon/uvd: add H.265/HEVC to legal notes

[Alex Deucher]

On Fri, Nov 6, 2015 at 5:45 AM, Christian König  wrote:
> From: Christian König 
>
> Signed-off-by: Christian König 
CC stable?  Was HEVC in 11?

Reviewed-by: Alex Deucher 

> ---
>  docs/README.UVD | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/docs/README.UVD b/docs/README.UVD
> index 38ea864..b0f4b9d 100644
> --- a/docs/README.UVD
> +++ b/docs/README.UVD
> @@ -2,8 +2,8 @@ The software may implement third party technologies (e.g. 
> third party
>  libraries) that are not licensed to you by AMD and for which you may need
>  to obtain licenses from other parties.  Unless explicitly stated otherwise,
>  these third party technologies are not licensed hereunder.  Such third
> -party technologies include, but are not limited, to H.264, MPEG-2, MPEG-4,
> -AVC, and VC-1.
> +party technologies include, but are not limited, to H.264, H.265, HEVC, 
> MPEG-2,
> +MPEG-4, AVC, and VC-1.
>
>  For MPEG-2 Encoding Products ANY USE OF THIS PRODUCT IN ANY MANNER OTHER
>  THAN PERSONAL USE THAT COMPLIES WITH THE MPEG-2 STANDARD FOR ENCODING VIDEO
> --
> 1.9.1
>
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Re: [Mesa-dev] [PATCH v3 6/8] mesa: Enable usage of blend_func_extended blend factors

[Ian Romanick]

On 11/05/2015 06:47 PM, Ryan Houdek wrote:
> ---
>  src/mesa/main/blend.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/src/mesa/main/blend.c b/src/mesa/main/blend.c
> index 20aa498..185e30e 100644
> --- a/src/mesa/main/blend.c
> +++ b/src/mesa/main/blend.c
> @@ -67,7 +67,7 @@ legal_src_factor(const struct gl_context *ctx, GLenum 
> factor)
> case GL_SRC1_ALPHA:
> case GL_ONE_MINUS_SRC1_COLOR:
> case GL_ONE_MINUS_SRC1_ALPHA:
> -  return _mesa_is_desktop_gl(ctx)
> +  return ctx->API != API_OPENGLES
>   && ctx->Extensions.ARB_blend_func_extended;
> default:
>return GL_FALSE;
> @@ -107,7 +107,7 @@ legal_dst_factor(const struct gl_context *ctx, GLenum 
> factor)
> case GL_SRC1_ALPHA:
> case GL_ONE_MINUS_SRC1_COLOR:
> case GL_ONE_MINUS_SRC1_ALPHA:
> -  return _mesa_is_desktop_gl(ctx)
> +  return ctx->API != API_OPENGLES
>   && ctx->Extensions.ARB_blend_func_extended;
> default:
>return GL_FALSE;
> 

This extension also enables GL_SRC_ALPHA_SATURATE as a destination
weight.  Previously this was only available in OpenGL ES 3.0+ or desktop
OpenGL.
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Re: [Mesa-dev] [PATCH v3 5/8] glsl: Add a parse check to check for the index layout qualifier

[Ian Romanick]

On 11/05/2015 06:47 PM, Ryan Houdek wrote:
> This can only be used if EXT_blend_func_extended is enabled
> ---
>  src/glsl/glsl_parser.yy | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
> index 4636435..40e60e5 100644
> --- a/src/glsl/glsl_parser.yy
> +++ b/src/glsl/glsl_parser.yy
> @@ -1463,6 +1463,11 @@ layout_qualifier_id:
>}
>  
>if (match_layout_qualifier("index", $1, state) == 0) {
> + if (state->es_shader && !state->EXT_blend_func_extended_enable) {
> +_mesa_glsl_error(& @3, state, "index layout qualifier requires 
> EXT_blend_func_extended");
> +YYERROR;
> + }
> +

It seems like more changes should be necessary in this area.  Did we not
previously generate errors in an ES 3.0 shader that used the index
layout qualifier?

>   $$.flags.q.explicit_index = 1;
>  
>   if ($3 >= 0) {
> 

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Re: [Mesa-dev] [PATCH v3 3/8] glsl: Add support for the new builtins that EXT_blend_func_extended provides.

[Ian Romanick]

On 11/05/2015 06:47 PM, Ryan Houdek wrote:
> gl_MaxDualSourceDrawBuffersEXT - Maximum DS draw buffers supported
> 
> Only for ESSL 1.0 it provides two builtins since you can't have user-defined
> color output variables
> gl_SecondaryFragColorEXT and gl_SecondaryFragDataEXT[MaxDSDrawBuffers]
> ---
>  src/glsl/ast_to_hir.cpp| 16 +++
>  src/glsl/builtin_variables.cpp | 62 
> ++
>  2 files changed, 78 insertions(+)
> 
> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> index 0306530..9ac7d80 100644
> --- a/src/glsl/ast_to_hir.cpp
> +++ b/src/glsl/ast_to_hir.cpp
> @@ -6973,6 +6973,8 @@ detect_conflicting_assignments(struct 
> _mesa_glsl_parse_state *state,
>  {
> bool gl_FragColor_assigned = false;
> bool gl_FragData_assigned = false;
> +   bool gl_FragSecondaryColor_assigned = false;
> +   bool gl_FragSecondaryData_assigned = false;
> bool user_defined_fs_output_assigned = false;
> ir_variable *user_defined_fs_output = NULL;
>  
> @@ -6990,6 +6992,10 @@ detect_conflicting_assignments(struct 
> _mesa_glsl_parse_state *state,
>   gl_FragColor_assigned = true;
>else if (strcmp(var->name, "gl_FragData") == 0)
>   gl_FragData_assigned = true;
> + else if (strcmp(var->name, "gl_SecondaryFragColorEXT") == 0)
> + gl_FragSecondaryColor_assigned = true;
> + else if (strcmp(var->name, "gl_SecondaryFragDataEXT") == 0)
> + gl_FragSecondaryData_assigned = true;
>else if (!is_gl_identifier(var->name)) {
>   if (state->stage == MESA_SHADER_FRAGMENT &&
>   var->data.mode == ir_var_shader_out) {
> @@ -7021,11 +7027,21 @@ detect_conflicting_assignments(struct 
> _mesa_glsl_parse_state *state,
>_mesa_glsl_error(, state, "fragment shader writes to both "
> "`gl_FragColor' and `%s'",
> user_defined_fs_output->name);
> +   } else if (gl_FragSecondaryColor_assigned && 
> gl_FragSecondaryData_assigned) {
> +  _mesa_glsl_error(, state, "fragment shader writes to both "
> +   "`gl_FragSecondaryColorEXT' and"
> +   " `gl_FragSecondaryDataEXT'");
> } else if (gl_FragData_assigned && user_defined_fs_output_assigned) {
>_mesa_glsl_error(, state, "fragment shader writes to both "
> "`gl_FragData' and `%s'",
> user_defined_fs_output->name);
> }
> +
> +   if ((gl_FragSecondaryColor_assigned || gl_FragSecondaryData_assigned) &&
> +   !state->EXT_blend_func_extended_enable) {
> +  _mesa_glsl_error(, state,
> +   "Dual source blending requires 
> EXT_blend_func_extended");
> +   }

The spec doesn't seem to provide any guidance about a shader like:

#extension GL_EXT_blend_func_extended: require
void main() {
gl_FragData[0] = vec4(0);
glSecondaryFragColorEXT = vec4(0);
}

What does NVIDIA's implementation do?  We should mimic that behavior,
and have a comment here justifying it.  Something like

/* The EXT_blend_func_extended spec doesn't say what to do if
 * gl_FragData and glSecondaryFragColorEXT (or gl_FragColor and
 * glSecondaryFragDataEXT) are written together.  NVIDIA's XXX.YY
 * driver [say what it does], so we mimic that.
 */

We should also have piglit tests that exercise it.

>  }
>  
>  
> diff --git a/src/glsl/builtin_variables.cpp b/src/glsl/builtin_variables.cpp
> index c30fb92..4933c8a 100644
> --- a/src/glsl/builtin_variables.cpp
> +++ b/src/glsl/builtin_variables.cpp
> @@ -376,6 +376,11 @@ private:
>return add_variable(name, type, ir_var_shader_out, slot);
> }
>  
> +   ir_variable *add_index_output(int slot, int index, const glsl_type *type, 
> const char *name)
> +   {
> +  return add_index_variable(name, type, ir_var_shader_out, slot, index);
> +   }
> +
> ir_variable *add_system_value(int slot, const glsl_type *type,
>   const char *name)
> {
> @@ -384,6 +389,8 @@ private:
>  
> ir_variable *add_variable(const char *name, const glsl_type *type,
>   enum ir_variable_mode mode, int slot);
> +   ir_variable *add_index_variable(const char *name, const glsl_type *type,
> + enum ir_variable_mode mode, int slot, int 
> index);
> ir_variable *add_uniform(const glsl_type *type, const char *name);
> ir_variable *add_const(const char *name, int value);
> ir_variable *add_const_ivec3(const char *name, int x, int y, int z);
> @@ -429,6 +436,46 @@ builtin_variable_generator::builtin_variable_generator(
>  {
>  }
>  
> +ir_variable *
> +builtin_variable_generator::add_index_variable(const char *name,
> + const glsl_type *type,
> + enum ir_variable_mode mode, int 
> slot, int index)
> +{
> +   ir_variable *var = new(symtab) ir_variable(type, name, mode);
> +   

Re: [Mesa-dev] [PATCH] i965/fs: Use regs_read/written for post-RA scheduling in calculate_deps

[Matt Turner]

On Fri, Nov 6, 2015 at 10:59 AM, Jason Ekstrand  wrote:
> Previously, we were assuming that everything read/wrote exactly 1 logical
> GRF (1 in SIMD8 and 2 in SIMD16).  This isn't actually true.  In
> particular, the PLN instruction reads 2 logical registers in one of the
> components.  This commit changes post-RA scheduling to use regs_read and
> regs_written instead so that we add enough dependencies.

Yep, this looks spot on.

Reviewed-by: Matt Turner 
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Re: [Mesa-dev] [PATCH] nir/glsl_to_nir: use _mesa_fls() to compute num_textures

[Matt Turner]

On Fri, Nov 6, 2015 at 8:27 AM, Juan A. Suarez Romero
 wrote:
> Replace the current loop by a direct call to _mesa_fls() function.
>
> It also fixes an implicit bug in the current code where num_textures
> seems to be one value less than it should be when sh->Program->SamplersUsed > 
> 0.
>
> For instance, num_textures is 0 instead of 1 when
> sh->Program->SamplersUsed is 1.

Looks good to me, and we use _mesa_fls elsewhere to do this same calculation.

Reviewed-by: Matt Turner 

Jason, was there some reason we weren't doing this? I'm confused why
we would have had a one-line comment and a 4-line loop when the all we
needed to do was call one functon?
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Re: [Mesa-dev] [PATCH 00/24] i965: Refactor register classes

[Emil Velikov]

Hi Matt,

A short summary

 [PATCH 06/24] i965: Add and use enum brw_reg_file.
s/GRF/BRW_ARCHITECTURE_REGISTER_FILE/ - already addressed in your branch.

 [PATCH 12/24] i965: Initialize registers' file to BAD_FILE.
With the fs_visitor::init() hunk dropped and memset(this->outputs,
0...) removed.

 [PATCH 18/24] i965: Combine register file field.
Please squash the two fixup patches that I've sent.

 [PATCH 20/24] Revert "i965: Have brw_imm_vf4() take the vector
components as integer values."
Regardless if VF_ZERO/ONE or brw_float_to_vf() is used.

 [PATCH 23/24] i965/vec4: Replace src_reg(imm) constructors with brw_imm_*().
Keep the memcpy(), although we really should address the uninitialised
imm[] warning/bug. In a separate commit of course and optionally nuke
the memcpy.

With these and a jenkins spin to catch any subtle bugs the series is
Reviewed-by: Emil Velikov 

Thanks again for reworking/clearing these up.
-Emil
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Re: [Mesa-dev] fix VC-1 simple/main profile

[Emil Velikov]

On 6 November 2015 at 10:58, Christian König  wrote:
> Hi list,
>
> we haven't fixed all the issues yet, but this is a clearly step in the
> right direction.
>
> If nobody has any more objections I'm going to push these by the end of today.
>
On behalf of everyone using the 11.0 series - thank you for the mesa-stable tag.

Fire^WCommit at will

Regards,
Emil

P.S. Is it me or does writing commit messages feels like pulling
teeth, sometimes ?
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Re: [Mesa-dev] [PATCH] i965/fs: Use regs_read/written for post-RA scheduling in calculate_deps

[Connor Abbott]

Reviewed-by: Connor Abbott  

On Fri, Nov 6, 2015 at 1:59 PM, Jason Ekstrand  wrote:
> Previously, we were assuming that everything read/wrote exactly 1 logical
> GRF (1 in SIMD8 and 2 in SIMD16).  This isn't actually true.  In
> particular, the PLN instruction reads 2 logical registers in one of the
> components.  This commit changes post-RA scheduling to use regs_read and
> regs_written instead so that we add enough dependencies.
>
> Cc: Connor Abbott 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92770
> ---
>  src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 15 ---
>  1 file changed, 4 insertions(+), 11 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp 
> b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
> index 88c45f7..d21bc67 100644
> --- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
> @@ -927,7 +927,6 @@ fs_instruction_scheduler::calculate_deps()
>  * granular level.
>  */
> schedule_node *last_fixed_grf_write = NULL;
> -   int reg_width = v->dispatch_width / 8;
>
> /* The last instruction always needs to still be the last
>  * instruction.  Either it's flow control (IF, ELSE, ENDIF, DO,
> @@ -964,10 +963,7 @@ fs_instruction_scheduler::calculate_deps()
>  (inst->src[i].fixed_hw_reg.file ==
>   BRW_GENERAL_REGISTER_FILE)) {
>  if (post_reg_alloc) {
> -   int size = reg_width;
> -   if (inst->src[i].fixed_hw_reg.vstride == 
> BRW_VERTICAL_STRIDE_0)
> -  size = 1;
> -   for (int r = 0; r < size; r++)
> +   for (int r = 0; r < inst->regs_read(i); r++)
>add_dep(last_grf_write[inst->src[i].fixed_hw_reg.nr + r], 
> n);
>  } else {
> add_dep(last_fixed_grf_write, n);
> @@ -1031,7 +1027,7 @@ fs_instruction_scheduler::calculate_deps()
>} else if (inst->dst.file == HW_REG &&
>   inst->dst.fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) {
>   if (post_reg_alloc) {
> -for (int r = 0; r < reg_width; r++)
> +for (int r = 0; r < inst->regs_written; r++)
> last_grf_write[inst->dst.fixed_hw_reg.nr + r] = n;
>   } else {
>  last_fixed_grf_write = n;
> @@ -1093,10 +1089,7 @@ fs_instruction_scheduler::calculate_deps()
>  (inst->src[i].fixed_hw_reg.file ==
>   BRW_GENERAL_REGISTER_FILE)) {
>  if (post_reg_alloc) {
> -   int size = reg_width;
> -   if (inst->src[i].fixed_hw_reg.vstride == 
> BRW_VERTICAL_STRIDE_0)
> -  size = 1;
> -   for (int r = 0; r < size; r++)
> +   for (int r = 0; r < inst->regs_read(i); r++)
>add_dep(n, last_grf_write[inst->src[i].fixed_hw_reg.nr + 
> r], 0);
>  } else {
> add_dep(n, last_fixed_grf_write, 0);
> @@ -1159,7 +1152,7 @@ fs_instruction_scheduler::calculate_deps()
>} else if (inst->dst.file == HW_REG &&
>   inst->dst.fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) {
>   if (post_reg_alloc) {
> -for (int r = 0; r < reg_width; r++)
> +for (int r = 0; r < inst->regs_written; r++)
> last_grf_write[inst->dst.fixed_hw_reg.nr + r] = n;
>   } else {
>  last_fixed_grf_write = n;
> --
> 2.5.0.400.gff86faf
>
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Re: [Mesa-dev] [PATCH v2 0/3] Lower UBO/SSBO access early

[Jordan Justen]

Nice work. Thanks for fixing this one!

Series Reviewed-by: Jordan Justen 

On 2015-11-05 21:44:29, Kristian Høgsberg Kristensen wrote:
> Here's v2 of the series I sent out yesterday. Nothing changed in what
> we're trying to do, but I figured out the shader-db regression.
> 
> I used ir_type_variable instead of ir_type_dereference_variable when
> trying to make opt_dead_code_local not stomp on my vector array deref
> lvalue. As a result, the pass now failed to eliminate some cases of dead code.
> 
> This v2 series, now has no shader-db impact and no jenkins regressions.
> 
> Kristian Høgsberg Kristensen (3):
>   glsl: Drop exec_list argument to lower_ubo_reference
>   glsl: Lower UBO and SSBO access in glsl linker
>   glsl: Use array deref for access to vector components
> 
>  src/glsl/Makefile.sources  |   1 +
>  src/glsl/ast_array_index.cpp   |   5 +-
>  src/glsl/ast_function.cpp  |  24 ++-
>  src/glsl/ast_to_hir.cpp|  43 
>  src/glsl/ir_optimization.h |   3 +-
>  src/glsl/ir_validate.cpp   |   7 +-
>  src/glsl/linker.cpp|  10 +++
>  src/glsl/lower_ubo_reference.cpp   |  18 -
>  src/glsl/lower_vector_derefs.cpp   | 104 
> +
>  src/glsl/opt_dead_code_local.cpp   |   5 ++
>  src/mesa/drivers/dri/i965/brw_link.cpp |   2 -
>  src/mesa/drivers/dri/i965/brw_shader.cpp   |   2 +
>  src/mesa/main/mtypes.h |   2 +
>  src/mesa/state_tracker/st_extensions.c |   1 +
>  src/mesa/state_tracker/st_glsl_to_tgsi.cpp |   1 -
>  15 files changed, 154 insertions(+), 74 deletions(-)
>  create mode 100644 src/glsl/lower_vector_derefs.cpp
> 
> -- 
> 2.6.2
> 
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Re: [Mesa-dev] [PATCH 1/6] mesa: add ARB_enhanced_layouts

[Timothy Arceri]

On Fri, 2015-11-06 at 13:02 +, Emil Velikov wrote:
> Hi Tim,
> 
> A few comments below
> 
> On 5 November 2015 at 11:17, Timothy Arceri  wrote:
> > From: Timothy Arceri 
> > 
> > Set to dummy_false until the remaining features are added.
> > ---
> >  src/glsl/glcpp/glcpp-parse.y| 1 +
> >  src/glsl/glsl_parser_extras.cpp | 1 +
> >  src/glsl/glsl_parser_extras.h   | 2 ++
> >  src/mesa/main/extensions.c  | 1 +
> >  4 files changed, 5 insertions(+)
> > 
> > diff --git a/src/glsl/glcpp/glcpp-parse.y b/src/glsl/glcpp/glcpp-parse.y
> > index 4acccf7..6aa7abe 100644
> > --- a/src/glsl/glcpp/glcpp-parse.y
> > +++ b/src/glsl/glcpp/glcpp-parse.y
> > @@ -2387,6 +2387,7 @@
> > _glcpp_parser_handle_version_declaration(glcpp_parser_t *parser, intmax_t
> > versio
> >}
> > } else {
> >add_builtin_define(parser, "GL_ARB_draw_buffers", 1);
> > +   add_builtin_define(parser, "GL_ARB_enhanced_layouts", 1);
> > add_builtin_define(parser, "GL_ARB_separate_shader_objects",
> > 1);
> >add_builtin_define(parser, "GL_ARB_texture_rectangle", 1);
> > add_builtin_define(parser, "GL_AMD_shader_trinary_minmax", 1);
> > diff --git a/src/glsl/glsl_parser_extras.cpp
> > b/src/glsl/glsl_parser_extras.cpp
> > index 14cb9fc..be344d6 100644
> > --- a/src/glsl/glsl_parser_extras.cpp
> > +++ b/src/glsl/glsl_parser_extras.cpp
> > @@ -594,6 +594,7 @@ static const _mesa_glsl_extension
> > _mesa_glsl_supported_extensions[] = {
> > EXT(ARB_derivative_control,   true,  false,
> >  ARB_derivative_control),
> > EXT(ARB_draw_buffers, true,  false, dummy_true),
> > EXT(ARB_draw_instanced,   true,  false,
> >  ARB_draw_instanced),
> > +   EXT(ARB_enhanced_layouts, true,  false, dummy_true),
> > EXT(ARB_explicit_attrib_location, true,  false,
> >  ARB_explicit_attrib_location),
> > EXT(ARB_explicit_uniform_location,true,  false,
> >  ARB_explicit_uniform_location),
> > EXT(ARB_fragment_coord_conventions,   true,  false,
> >  ARB_fragment_coord_conventions),
> > diff --git a/src/glsl/glsl_parser_extras.h b/src/glsl/glsl_parser_extras.h
> > index b54c535..684b917 100644
> > --- a/src/glsl/glsl_parser_extras.h
> > +++ b/src/glsl/glsl_parser_extras.h
> > @@ -499,6 +499,8 @@ struct _mesa_glsl_parse_state {
> > bool ARB_draw_buffers_warn;
> > bool ARB_draw_instanced_enable;
> > bool ARB_draw_instanced_warn;
> > +   bool ARB_enhanced_layouts_enable;
> > +   bool ARB_enhanced_layouts_warn;
> > bool ARB_explicit_attrib_location_enable;
> > bool ARB_explicit_attrib_location_warn;
> > bool ARB_explicit_uniform_location_enable;
> > diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
> > index bdc6817..b8556aa 100644
> > --- a/src/mesa/main/extensions.c
> > +++ b/src/mesa/main/extensions.c
> > @@ -111,6 +111,7 @@ static const struct extension extension_table[] = {
> > { "GL_ARB_draw_elements_base_vertex",  
> >  o(ARB_draw_elements_base_vertex),   GL, 2009 },
> > { "GL_ARB_draw_indirect",   o(ARB_draw_indirect), 
> >   GLC,2010 },
> > { "GL_ARB_draw_instanced",  o(ARB_draw_instanced),
> >   GL, 2008 },
> > +   { "GL_ARB_enhanced_layouts",o(dummy_false),   
> >   GLC,2013 },
> > { "GL_ARB_explicit_attrib_location",   
> >  o(ARB_explicit_attrib_location),GL, 2009 },
> > { "GL_ARB_explicit_uniform_location",  
> >  o(ARB_explicit_uniform_location),   GL, 2012 },
> > { "GL_ARB_fragment_coord_conventions", 
> >  o(ARB_fragment_coord_conventions),  GL, 2009 },
> Please add gl_extensions::ARB_enhanced_layouts and use it in the above
> two tables. Otherwise the extension override won't work.

Are you sure? MESA_EXTENSION_OVERRIDE=GL_ARB_enhanced_layouts has been working
for my testing without it.

>  We can always
> nuke it at the end, if it turns out that this extension can be enabled
> everywhere.
> 
> Thanks
> Emil
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Re: [Mesa-dev] [PATCH 3/6] glsl: move layout qualifier validation out of the parser

[Timothy Arceri]

On Fri, 2015-11-06 at 13:16 +, Emil Velikov wrote:
> On 5 November 2015 at 11:17, Timothy Arceri  wrote:
> > From: Timothy Arceri 
> > 
> > This is in preperation for compile-time constant support.
> typo "preparation"
> 
> > 
> > Also fix up the locations for some of the extension checking
> > error messages in the parser. We now correctly give the location
> > of the layout qualifier identifier rather than the integer constant.
> > 
> > The validation is moved to two locations, for validation on variables the
> > checks are moved to the ast to hir pass and for qualifiers that apply to
> > the
> > shader the validation is moved into glsl_parser_extras.cpp.
> > 
> > In order to do validation at the later stage in glsl_parser_extras.cpp we
> > need to temporarily add a field in ast_type_qualifier to keep track of the
> > parser location, this will be removed in a following patch when we
> > introduce a new type for storing the comiple-time qualifiers.
> > 
> > Also as the set_shader_inout_layout() function in glsl parser extras is
> > normally called after all validation is done we need to move the code that
> > sets CompileStatus and InfoLog otherwise the newly moved error messages
> > will
> > be ignored.
> Personally I would split the validate_layout_qualifiers() introduction
> and the CompileStatus/InfoLog movement into separate patches.

The reason for not doing this in a new patch is that this is existing
functionality not new functionality, doing so would regress a bunch of piglit
tests.

I can do it if it makes things easier to review but it should all be pushed as
one.

> 
> Feel free to ignore, if others don't share my sentiment
> -Emil
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Re: [Mesa-dev] [PATCH v3 3/3] i965/nir/fs: Implement new barrier functions for compute shaders

[Jordan Justen]

On 2015-11-06 04:48:00, Francisco Jerez wrote:
> Jordan Justen  writes:
> 
> > For these nir intrinsics, we emit the same code as
> > nir_intrinsic_memory_barrier:
> >
> >  * nir_intrinsic_memory_barrier_atomic_counter
> >  * nir_intrinsic_memory_barrier_buffer
> >  * nir_intrinsic_memory_barrier_image
> >
> > We treat these nir intrinsics as no-ops:
> >  * nir_intrinsic_group_memory_barrier
> >  * nir_intrinsic_memory_barrier_shared
> >
> > v3:
> >  * Add comment for no-op cases (curro)
> >
> > Signed-off-by: Jordan Justen 
> > Cc: Francisco Jerez 
> > ---
> >  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 11 +++
> >  1 file changed, 11 insertions(+)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 
> > b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> > index b6f4c52..3b3bc67 100644
> > --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> > @@ -1697,6 +1697,9 @@ fs_visitor::nir_emit_intrinsic(const fs_builder , 
> > nir_intrinsic_instr *instr
> >break;
> > }
> >  
> > +   case nir_intrinsic_memory_barrier_atomic_counter:
> > +   case nir_intrinsic_memory_barrier_buffer:
> > +   case nir_intrinsic_memory_barrier_image:
> > case nir_intrinsic_memory_barrier: {
> >const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UD, 16 / 
> > dispatch_width);
> >bld.emit(SHADER_OPCODE_MEMORY_FENCE, tmp)
> > @@ -1704,6 +1707,14 @@ fs_visitor::nir_emit_intrinsic(const fs_builder 
> > , nir_intrinsic_instr *instr
> >break;
> > }
> >  
> > +   case nir_intrinsic_group_memory_barrier:
> > +   case nir_intrinsic_memory_barrier_shared:
> > +  /* We treat these single workgroup level barriers as no-ops. This is
> > +   * safe today because we don't allow memory functions to be 
> > re-ordered
> > +   * and we only execute programs on a single sub-slice.
> > +   */
> 
> You forgot to mention the fault-and-stream thing, which is going to be a
> problem already on Gen9.5.  How about the following:
> 
> | /* We treat these workgroup-level barriers as no-ops.  This should be
> |  * safe at present and as long as:
> |  *
> |  *  - Memory access instructions are not subsequently reordered by the
> |  *compiler back-end.
> |  *
> |  *  - All threads from a given compute shader workgroup fit within a
> |  *single subslice and therefore talk to the same HDC shared unit
> |  *what supposedly guarantees ordering and coherency between threads
> |  *from the same workgroup.  This may change in the future when we
> |  *start splitting workgroups across multiple subslices.
> |  *
> |  *  - The context is not in fault-and-stream mode, which could cause
> |  *memory transactions (including to SLM) prior to the barrier to be
> |  *replayed after the barrier if a pagefault occurs.  This shouldn't
> |  *be a problem up to and including SKL because fault-and-stream is
> |  *not usable due to hardware issues, but that's likely to change in
> |  *the future.
> |  */
> 
> If you use that comment instead this patch is:
> 
> Reviewed-by: Francisco Jerez 

Ok, but I think I'll move the comment to a separate patch authored by
you.

Thanks,

-Jordan

> 
> 
> > +  break;
> > +
> > case nir_intrinsic_shader_clock: {
> >/* We cannot do anything if there is an event, so ignore it for now 
> > */
> >fs_reg shader_clock = get_timestamp(bld);
> > -- 
> > 2.6.2
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