Re: [Mesa-dev] Playing with display timing -- VK_MESA_present_period
Michel Dänzer writes: > Should this extension specify how it interacts with the various > VK_PRESENT_MODE_* modes? Yes. It needs to be clear on how this extension interacts with all existing display stuff. Thanks for pointing out one pretty important interaction. > For one example: With VK_PRESENT_MODE_MAILBOX_KHR, does the period > specified by this extension correspond to: > > > a) The time between when the image is placed in the the queue of > pending presentation requests and when the next image is placed in the > queue > > b) The time between when the image is taken from the queue to be > actually presented and when the same thing happens for another image > (which happens to be in the queue at the time) > > c) Yet something else? > > If it's a), given the extension talks about rounding to the nearest > upcoming frame, does VK_PRESENT_MODE_MAILBOX_KHR effectively behave > the same as VK_PRESENT_MODE_FIFO(_RELAXED)_KHR with this extension? > > If it's b), there can be any number of images entering and leaving the > queue during the period, so it's not clear what purpose the period > would serve? Given that the period is defined as being relative to the time when the image was presented to the screen (not when the image is queued for presentation), and that the extension specifies that future images will be delayed by that period, I think the right definition will be that specifying non-zero present_period for a QueuePresent call will force images queued later to not replace the first image and be delayed for display until the specified present_period has passed. Which looks a lot like FIFO, but only for QueuePresent calls which specify a non-zero present_period. I think I've got enough to start writing a more 'formal' specification for the extension, which I'll do as a patch to the Vulkan specification. -- -keith signature.asc Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 8/8] nvc0: Add shader disk caching
On Mon, Feb 17, 2020 at 6:41 PM Mark Menzynski wrote:
>
> Adds shader disk caching for nvc0 to reduce the need to every time compile
> shaders. Shaders are saved into disk_shader_cache from nvc0_screen structure.
>
> It serializes the input nv50_ir_prog_info to compute the hash key and
> also to do a byte compare between the original nv50_ir_prog_info and the one
> saved in the cache. If keys match and also the byte compare returns they
> are equal, shaders are same, and the compiled nv50_ir_prog_info_out from the
> cache can be used instead of compiling input info.
>
> Seems to be significantly improving loading times. Piglit tests seem
> to be OK.
>
> Signed-off-by: Mark Menzynski
> ---
> .../drivers/nouveau/nvc0/nvc0_context.h | 1 +
> .../drivers/nouveau/nvc0/nvc0_program.c | 49 ---
> .../drivers/nouveau/nvc0/nvc0_shader_state.c | 3 +-
> src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 2 +
> 4 files changed, 46 insertions(+), 9 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
> b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
> index 8a2a8f2797e..4b83d1afeb4 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
> @@ -321,6 +321,7 @@ extern struct draw_stage *nvc0_draw_render_stage(struct
> nvc0_context *);
>
> /* nvc0_program.c */
> bool nvc0_program_translate(struct nvc0_program *, uint16_t chipset,
> +struct disk_cache *,
> struct pipe_debug_callback *);
> bool nvc0_program_upload(struct nvc0_context *, struct nvc0_program *);
> void nvc0_program_destroy(struct nvc0_context *, struct nvc0_program *);
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> index 1a5073292e8..06b6f7b4db5 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> @@ -24,6 +24,7 @@
>
> #include "compiler/nir/nir.h"
> #include "tgsi/tgsi_ureg.h"
> +#include "util/blob.h"
>
> #include "nvc0/nvc0_context.h"
>
> @@ -568,11 +569,19 @@ nvc0_program_dump(struct nvc0_program *prog)
>
> bool
> nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
> + struct disk_cache *disk_shader_cache,
> struct pipe_debug_callback *debug)
> {
> + struct blob blob;
> struct nv50_ir_prog_info *info;
> struct nv50_ir_prog_info_out info_out = {};
> - int ret;
> +
> + void *cached_data = NULL;
> + size_t cached_size;
> + bool shader_found = false;
> +
> + int ret = 0;
> + cache_key key;
>
> info = CALLOC_STRUCT(nv50_ir_prog_info);
> if (!info)
> @@ -631,14 +640,38 @@ nvc0_program_translate(struct nvc0_program *prog,
> uint16_t chipset,
> info->assignSlots = nvc0_program_assign_varying_slots;
>
> /* these fields might be overwritten by the compiler */
> - info_out.bin.smemSize = prog->cp.smem_size;
> - info_out.io.genUserClip = prog->vp.num_ucps;
> -
> - ret = nv50_ir_generate_code(info, _out);
> - if (ret) {
> - NOUVEAU_ERR("shader translation failed: %i\n", ret);
> - goto out;
> + info->bin.smemSize = prog->cp.smem_size;
> + info->io.genUserClip = prog->vp.num_ucps;
> +
> + blob_init();
> + nv50_ir_prog_info_serialize(, info);
> +
> + if (disk_shader_cache) {
> + disk_cache_compute_key(disk_shader_cache, blob.data, blob.size, key);
> + cached_data = disk_cache_get(disk_shader_cache, key, _size);
> +
> + if (cached_data && cached_size >= blob.size) { // blob.size is the
> size of serialized "info"
> + if (memcmp(cached_data, blob.data, blob.size) == 0) {
> +shader_found = true;
> +/* Blob contains only "info". In disk cache, "info_out" comes
> right after it */
> +size_t offset = blob.size;
> +nv50_ir_prog_info_out_deserialize(cached_data, cached_size,
> offset, _out);
> + }
I am still a bit unsure if we really really need this check... other
drivers don't seem to do it either, but it's definitely safer to keep
it... let's see what others think about it.
> + }
> + free(cached_data);
> + }
> + if (!shader_found) {
> + ret = nv50_ir_generate_code(info, _out);
> + if (ret) {
> + NOUVEAU_ERR("shader translation failed: %i\n", ret);
> + goto out;
> + }
> + if (disk_shader_cache) {
> + nv50_ir_prog_info_out_serialize(, _out);
> + disk_cache_put(disk_shader_cache, key, blob.data, blob.size, NULL);
> + }
> }
> + blob_finish();
>
> prog->code = info_out.bin.code;
> prog->code_size = info_out.bin.codeSize;
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
> b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
> index 774c5648113..4327a89454b 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
> +++
Re: [Mesa-dev] [PATCH 7/8] nv50/ir: Move separateFragData
On Mon, Feb 17, 2020 at 6:41 PM Mark Menzynski wrote:
>
> Nv50_ir_prog_info (input) was in the wrong place, moved it to
> nv50_ir_prog_info_out.
>
> Signed-off-by: Mark Menzynski
> ---
> src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 2 +-
> src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 2 +-
> src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> index cdf19eeabcf..30498ceffaf 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> @@ -112,7 +112,6 @@ struct nv50_ir_prog_info
> uint8_t inputPrim;
>} gp;
>struct {
> - bool separateFragData;
> bool persampleInvocation;
>} fp;
>struct {
> @@ -200,6 +199,7 @@ struct nv50_ir_prog_info_out
> bool usesSampleMaskIn;
> bool readsFramebuffer;
> bool readsSampleLocations;
> + bool separateFragData;
>} fp;
> } prop;
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
> index 3efeaab4569..cf5f3d6d7e7 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
> @@ -2100,7 +2100,7 @@ Converter::visit(nir_intrinsic_instr *insn)
>atom->setIndirect(0, 0, address);
>atom->subOp = getSubOp(op);
>
> - info->io.globalAccess |= 0x2;
> + info_out->io.globalAccess |= 0x2;
>break;
> }
> case nir_intrinsic_bindless_image_atomic_add:
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> index 5850dc18fec..c2322f3856a 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> @@ -1176,7 +1176,7 @@ void Source::scanProperty(const struct
> tgsi_full_property *prop)
>info_out->prop.gp.instanceCount = prop->u[0].Data;
>break;
> case TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS:
> - info->prop.fp.separateFragData = true;
> + info_out->prop.fp.separateFragData = true;
>break;
> case TGSI_PROPERTY_FS_COORD_ORIGIN:
> case TGSI_PROPERTY_FS_COORD_PIXEL_CENTER:
> --
> 2.21.1
>
> ___
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> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
mind merging those changes into the 1st patch? Just add a "v2 (mark):
..." note or something.
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Re: [Mesa-dev] [PATCH 6/8] tgsi/util: Change boolean for bool
by the way: Mind creating a MR on gitlab with this and the 2nd patch?
This way we can get them reviewed and tested there and merged before
the nouveau related patches.
On Mon, Feb 17, 2020 at 9:09 PM Karol Herbst wrote:
>
> Reviewed-by: Karol Herbst
>
> On Mon, Feb 17, 2020 at 6:41 PM Mark Menzynski wrote:
> >
> > I was getting errors with "boolean" when compiling. This patch changes
> > boolean to bool from .
> >
> > Signed-off-by: Mark Menzynski
> > ---
> > src/gallium/auxiliary/tgsi/tgsi_util.c | 2 +-
> > src/gallium/auxiliary/tgsi/tgsi_util.h | 5 +++--
> > 2 files changed, 4 insertions(+), 3 deletions(-)
> >
> > diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.c
> > b/src/gallium/auxiliary/tgsi/tgsi_util.c
> > index 1e5582ba273..e1b604cff0e 100644
> > --- a/src/gallium/auxiliary/tgsi/tgsi_util.c
> > +++ b/src/gallium/auxiliary/tgsi/tgsi_util.c
> > @@ -537,7 +537,7 @@ tgsi_util_get_shadow_ref_src_index(enum
> > tgsi_texture_type tgsi_tex)
> > }
> >
> >
> > -boolean
> > +bool
> > tgsi_is_shadow_target(enum tgsi_texture_type target)
> > {
> > switch (target) {
> > diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.h
> > b/src/gallium/auxiliary/tgsi/tgsi_util.h
> > index 686b90f467e..6dc576b1a00 100644
> > --- a/src/gallium/auxiliary/tgsi/tgsi_util.h
> > +++ b/src/gallium/auxiliary/tgsi/tgsi_util.h
> > @@ -28,6 +28,7 @@
> > #ifndef TGSI_UTIL_H
> > #define TGSI_UTIL_H
> >
> > +#include
> > #include "pipe/p_shader_tokens.h"
> >
> > #if defined __cplusplus
> > @@ -84,11 +85,11 @@ tgsi_util_get_texture_coord_dim(enum tgsi_texture_type
> > tgsi_tex);
> > int
> > tgsi_util_get_shadow_ref_src_index(enum tgsi_texture_type tgsi_tex);
> >
> > -boolean
> > +bool
> > tgsi_is_shadow_target(enum tgsi_texture_type target);
> >
> >
> > -static inline boolean
> > +static inline bool
> > tgsi_is_msaa_target(enum tgsi_texture_type target)
> > {
> > return (target == TGSI_TEXTURE_2D_MSAA ||
> > --
> > 2.21.1
> >
> > ___
> > mesa-dev mailing list
> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> >
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Re: [Mesa-dev] [PATCH 6/8] tgsi/util: Change boolean for bool
Reviewed-by: Karol Herbst
On Mon, Feb 17, 2020 at 6:41 PM Mark Menzynski wrote:
>
> I was getting errors with "boolean" when compiling. This patch changes
> boolean to bool from .
>
> Signed-off-by: Mark Menzynski
> ---
> src/gallium/auxiliary/tgsi/tgsi_util.c | 2 +-
> src/gallium/auxiliary/tgsi/tgsi_util.h | 5 +++--
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.c
> b/src/gallium/auxiliary/tgsi/tgsi_util.c
> index 1e5582ba273..e1b604cff0e 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_util.c
> +++ b/src/gallium/auxiliary/tgsi/tgsi_util.c
> @@ -537,7 +537,7 @@ tgsi_util_get_shadow_ref_src_index(enum tgsi_texture_type
> tgsi_tex)
> }
>
>
> -boolean
> +bool
> tgsi_is_shadow_target(enum tgsi_texture_type target)
> {
> switch (target) {
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.h
> b/src/gallium/auxiliary/tgsi/tgsi_util.h
> index 686b90f467e..6dc576b1a00 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_util.h
> +++ b/src/gallium/auxiliary/tgsi/tgsi_util.h
> @@ -28,6 +28,7 @@
> #ifndef TGSI_UTIL_H
> #define TGSI_UTIL_H
>
> +#include
> #include "pipe/p_shader_tokens.h"
>
> #if defined __cplusplus
> @@ -84,11 +85,11 @@ tgsi_util_get_texture_coord_dim(enum tgsi_texture_type
> tgsi_tex);
> int
> tgsi_util_get_shadow_ref_src_index(enum tgsi_texture_type tgsi_tex);
>
> -boolean
> +bool
> tgsi_is_shadow_target(enum tgsi_texture_type target);
>
>
> -static inline boolean
> +static inline bool
> tgsi_is_msaa_target(enum tgsi_texture_type target)
> {
> return (target == TGSI_TEXTURE_2D_MSAA ||
> --
> 2.21.1
>
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Re: [Mesa-dev] [PATCH 5/8] nv50/ir: Add nv50_ir_prog_info serialize
On Mon, Feb 17, 2020 at 6:41 PM Mark Menzynski wrote:
>
> Adds a function for serializing a nv50_ir_prog_info structure, which is
> needed for shader caching.
>
> Signed-off-by: Mark Menzynski
> ---
> .../drivers/nouveau/codegen/nv50_ir_driver.h | 4 +
> .../nouveau/codegen/nv50_ir_serialize.cpp | 81 +++
> 2 files changed, 85 insertions(+)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> index 9eb8a4c4798..cdf19eeabcf 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> @@ -278,6 +278,10 @@ namespace nv50_ir
> extern void
> nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *);
>
> +/* Serialize a nv50_ir_prog_info structure and save it into blob */
> +extern bool
> +nv50_ir_prog_info_serialize(struct blob *, struct nv50_ir_prog_info *);
> +
> /* Serialize a nv50_ir_prog_info_out structure and save it into blob */
> extern bool
> nv50_ir_prog_info_out_serialize(struct blob *, struct nv50_ir_prog_info_out
> *);
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
> index 077f3eba6c8..0f47189f10b 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
> @@ -17,6 +17,87 @@ enum InterpApply {
> FLIP_GM107 = 7
> };
>
> +extern bool
> +nv50_ir_prog_info_serialize(struct blob *blob, struct nv50_ir_prog_info
> *info)
> +{
> + blob_write_uint16(blob, info->target);
> + blob_write_uint8(blob, info->type);
> + blob_write_uint8(blob, info->optLevel);
> + blob_write_uint8(blob, info->dbgFlags);
> + blob_write_uint8(blob, info->omitLineNum);
> + blob_write_uint32(blob, info->bin.smemSize);
> + blob_write_uint16(blob, info->bin.maxOutput);
> + blob_write_uint8(blob, info->bin.sourceRep);
> +
> + switch(info->bin.sourceRep) {
> + case PIPE_SHADER_IR_TGSI: {
> + struct tgsi_token *tokens = (struct tgsi_token *)info->bin.source;
> + unsigned int num_tokens = tgsi_num_tokens(tokens);
> +
> + blob_write_uint32(blob, num_tokens);
> + blob_write_bytes(blob, tokens, num_tokens * sizeof(struct
> tgsi_token));
> + break;
> + }
> + case PIPE_SHADER_IR_NIR: {
> + struct nir_shader *nir = (struct nir_shader *)info->bin.source;
> + nir_serialize(blob, nir, false);
> + break;
> + }
> + default:
> + assert(!"unhandled info->bin.sourceRep");
> + return false;
> + }
> +
> + blob_write_uint16(blob, info->immd.bufSize);
> + blob_write_bytes(blob, info->immd.buf, info->immd.bufSize *
> sizeof(*info->immd.buf));
> + blob_write_uint16(blob, info->immd.count);
> + blob_write_bytes(blob, info->immd.data, info->immd.count *
> sizeof(*info->immd.data));
> + blob_write_bytes(blob, info->immd.type, info->immd.count * 16); // for
> each vec4 (128 bit)
> +
> + switch (info->type) {
> + case PIPE_SHADER_VERTEX:
> + blob_write_bytes(blob, info->prop.vp.inputMask,
> + 4 * sizeof(*info->prop.vp.inputMask)); /* array of
> size 4 */
we have an ARRAY_SIZE macro, but sizeof(info->prop.vp.inputMask)
should give you the full array size already, no?
> + break;
> + case PIPE_SHADER_TESS_CTRL:
> + blob_write_uint32(blob, info->prop.cp.inputOffset);
> + blob_write_uint32(blob, info->prop.cp.sharedOffset);
> + blob_write_uint32(blob, info->prop.cp.gridInfoBase);
> + blob_write_bytes(blob, info->prop.cp.numThreads,
> + 3 * sizeof(*info->prop.cp.numThreads)); /* array
> of size 3 */
same here
> + case PIPE_SHADER_GEOMETRY:
> + blob_write_uint8(blob, info->prop.gp.inputPrim);
> + break;
> + case PIPE_SHADER_FRAGMENT:
> + blob_write_uint8(blob, info->prop.fp.persampleInvocation);
> + break;
> + default:
> + break;
> + }
> +
> + blob_write_uint8(blob, info->io.auxCBSlot);
> + blob_write_uint16(blob, info->io.ucpBase);
> + blob_write_uint16(blob, info->io.drawInfoBase);
> + blob_write_uint16(blob, info->io.alphaRefBase);
> + blob_write_uint8(blob, info->io.pointSize);
> + blob_write_uint8(blob, info->io.viewportId);
> + blob_write_bytes(blob, info->io.backFaceColor, 2 *
> sizeof(*info->io.backFaceColor));
and here
> + blob_write_uint8(blob, info->io.mul_zero_wins);
> + blob_write_uint8(blob, info->io.nv50styleSurfaces);
> + blob_write_uint16(blob, info->io.texBindBase);
> + blob_write_uint16(blob, info->io.fbtexBindBase);
> + blob_write_uint16(blob, info->io.suInfoBase);
> + blob_write_uint16(blob, info->io.bindlessBase);
> + blob_write_uint16(blob, info->io.bufInfoBase);
> + blob_write_uint16(blob, info->io.sampleInfoBase);
> + blob_write_uint8(blob,
Re: [Mesa-dev] [PATCH 4/8] nv50/ir: Add prog_info_out print
On Mon, Feb 17, 2020 at 6:41 PM Mark Menzynski wrote:
>
> Adds a function for printing nv50_ir_prog_info_out structure
> in JSON-like format, which could be used in debugging.
>
> Signed-off-by: Mark Menzynski
> ---
> .../drivers/nouveau/codegen/nv50_ir_driver.h | 3 +
> .../drivers/nouveau/codegen/nv50_ir_print.cpp | 155 ++
> 2 files changed, 158 insertions(+)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> index bc92a3bc4ee..9eb8a4c4798 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> @@ -275,6 +275,9 @@ namespace nv50_ir
> }
> #endif
>
> +extern void
> +nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *);
> +
> /* Serialize a nv50_ir_prog_info_out structure and save it into blob */
> extern bool
> nv50_ir_prog_info_out_serialize(struct blob *, struct nv50_ir_prog_info_out
> *);
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
> index 5dcbf3c3e0c..f19d1a7d280 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
> @@ -22,6 +22,7 @@
>
> #include "codegen/nv50_ir.h"
> #include "codegen/nv50_ir_target.h"
> +#include "codegen/nv50_ir_driver.h"
>
> #include
>
> @@ -852,3 +853,157 @@ Function::printLiveIntervals() const
> }
>
> } // namespace nv50_ir
> +
> +extern void
> +nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *info_out)
> +{
> + int i;
> +
> + INFO("{\n");
> + INFO(" \"target\":\"%d\",\n", info_out->target);
> + INFO(" \"type\":\"%d\",\n", info_out->type);
> +
> + // Bin
> + INFO(" \"bin\":{\n");
> + INFO(" \"maxGPR\":\"%d\",\n", info_out->bin.maxGPR);
> + INFO(" \"tlsSpace\":\"%d\",\n", info_out->bin.tlsSpace);
> + INFO(" \"smemSize\":\"%d\",\n", info_out->bin.smemSize);
> + INFO(" \"codeSize\":\"%d\",\n", info_out->bin.codeSize);
> + INFO(" \"instructions\":\"%d\",\n", info_out->bin.instructions);
> +
> + // RelocInfo
> + INFO(" \"RelocInfo\":");
> + if (!info_out->bin.relocData) {
> + INFO("\"NULL\",\n");
> + }
> + else {
please keep it in one line.
> + nv50_ir::RelocInfo *reloc = (nv50_ir::RelocInfo
> *)info_out->bin.relocData;
> + INFO("{\n");
> + INFO(" \"codePos\":\"%d\",\n", reloc->codePos);
> + INFO(" \"libPos\":\"%d\",\n", reloc->libPos);
> + INFO(" \"dataPos\":\"%d\",\n", reloc->dataPos);
> + INFO(" \"count\":\"%d\",\n", reloc->count);
> + INFO(" \"RelocEntry\":[\n");
> + for (unsigned int i = 0; i < reloc->count; i++) {
> + INFO("
> {\"data\":\"%d\",\t\"mask\":\"%d\",\t\"offset\":\"%d\",\t\"bitPos\":\"%d\",\t\"type\":\"%d\"}",
> + reloc->entry[i].data, reloc->entry[i].mask,
> reloc->entry[i].offset, reloc->entry[i].bitPos, reloc->entry[i].type
> + );
> + }
> + INFO("\n");
> + INFO(" ]\n");
> + INFO(" },\n");
> + }
> +
> + // FixupInfo
> + INFO(" \"FixupInfo\":");
> + if (!info_out->bin.fixupData) {
> + INFO("\"NULL\"\n");
> + }
> + else {
here as well
> + nv50_ir::FixupInfo *fixup = (nv50_ir::FixupInfo
> *)info_out->bin.fixupData;
> + INFO("{\n");
> + INFO(" \"count\":\"%d\"\n", fixup->count);
> + INFO(" \"FixupEntry\":[\n");
> + for (unsigned int i = 0; i < fixup->count; i++) {
> + INFO("
> {\"apply\":\"%p\",\t\"ipa\":\"%d\",\t\"reg\":\"%d\",\t\"loc\":\"%d\"}",
> + fixup->entry[i].apply, fixup->entry[i].ipa,
> fixup->entry[i].reg, fixup->entry[i].loc);
> + }
> + INFO("\n");
> + INFO(" ]\n");
> + INFO(" }\n");
> +
> + INFO(" },\n");
> + }
> +
> + if (info_out->numSysVals) {
> + INFO(" \"sv\":[\n");
> + for (i = 0; i < info_out->numSysVals; i++) {
> + if (&(info_out->sv[i])) {
> +INFO(" {\"id\":\"%d\", \"sn\":\"%d\", \"si\":\"%d\"}",
> + info_out->sv[i].id, info_out->sv[i].sn,
> info_out->sv[i].si);
> + }
> + }
> + INFO("\n ],\n");
> + }
> + if (info_out->numInputs) {
> + INFO(" \"in\":[\n");
> + for (i = 0; i < info_out->numInputs; i++) {
> + if (&(info_out->in[i])) {
> +INFO(" {\"id\":\"%d\",\t\"sn\":\"%d\",\t\"si\":\"%d\"}",
> +info_out->in[i].id, info_out->in[i].sn, info_out->in[i].si);
> + }
> + }
> + INFO("\n ],\n");
> + }
> + if (info_out->numOutputs) {
> + INFO(" \"out\":[\n");
> + for (i = 0; i < info_out->numOutputs; i++) {
> + if (&(info_out->out[i])) {
> +INFO(" {\"id\":\"%d\",\t\"sn\":\"%d\",\t\"si\":\"%d\"}",
> +
Re: [Mesa-dev] [PATCH 3/8] nv50/ir: Add nv50_ir_prog_info_out serialize and deserialize
On Mon, Feb 17, 2020 at 6:41 PM Mark Menzynski wrote:
>
> Adds functions for serializing and deserializing
> nv50_ir_prog_info_out structure, which are needed for shader caching.
>
> Signed-off-by: Mark Menzynski
> ---
> .../drivers/nouveau/codegen/nv50_ir_driver.h | 44
> .../nouveau/codegen/nv50_ir_emit_gk110.cpp| 14 +-
> .../nouveau/codegen/nv50_ir_emit_gm107.cpp| 14 +-
> .../nouveau/codegen/nv50_ir_emit_nv50.cpp | 6 +-
> .../nouveau/codegen/nv50_ir_emit_nvc0.cpp | 14 +-
> .../nouveau/codegen/nv50_ir_serialize.cpp | 196 ++
> src/gallium/drivers/nouveau/meson.build | 1 +
> 7 files changed, 265 insertions(+), 24 deletions(-)
> create mode 100644 src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> index f6b5415bc95..bc92a3bc4ee 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> @@ -25,6 +25,7 @@
>
> #include "pipe/p_shader_tokens.h"
>
> +#include "util/blob.h"
> #include "tgsi/tgsi_util.h"
> #include "tgsi/tgsi_parse.h"
> #include "tgsi/tgsi_scan.h"
> @@ -242,6 +243,49 @@ nv50_ir_apply_fixups(void *fixupData, uint32_t *code,
> extern void nv50_ir_get_target_library(uint32_t chipset,
> const uint32_t **code, uint32_t
> *size);
>
> +
> +#ifdef __cplusplus
> +namespace nv50_ir
> +{
> + class FixupEntry;
> + class FixupData;
> +
> + void
> + gk110_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
> + const nv50_ir::FixupData& data);
> + void
> + gm107_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
> + const nv50_ir::FixupData& data);
> + void
> + nv50_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
> +const nv50_ir::FixupData& data);
> + void
> + nvc0_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
> +const nv50_ir::FixupData& data);
> + void
> + gk110_selpFlip(const nv50_ir::FixupEntry *entry, uint32_t *code,
> + const nv50_ir::FixupData& data);
> + void
> + gm107_selpFlip(const nv50_ir::FixupEntry *entry, uint32_t *code,
> + const nv50_ir::FixupData& data);
> + void
> + nvc0_selpFlip(const nv50_ir::FixupEntry *entry, uint32_t *code,
> + const nv50_ir::FixupData& data);
> +
> +}
> +#endif
> +
> +/* Serialize a nv50_ir_prog_info_out structure and save it into blob */
> +extern bool
> +nv50_ir_prog_info_out_serialize(struct blob *, struct nv50_ir_prog_info_out
> *);
> +
> +/* Deserialize from data and save into a nv50_ir_prog_info_out structure
> + * using a pointer. Size is a total size of the serialized data.
> + * Offset points to where info_out in data is located. */
> +extern bool
> +nv50_ir_prog_info_out_deserialize(void *data, size_t size, size_t offset,
> + struct nv50_ir_prog_info_out *);
some spaces missing. Also I'd drop the offset argument and require the
callee to pass in an adjusted pointer already.
> +
> #ifdef __cplusplus
> }
> #endif
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
> index 2118c3153f7..e651d7fdcb0 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
> @@ -1209,8 +1209,8 @@ CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
> }
> }
>
> -static void
> -selpFlip(const FixupEntry *entry, uint32_t *code, const FixupData& data)
> +void
> +gk110_selpFlip(const FixupEntry *entry, uint32_t *code, const FixupData&
> data)
> {
> int loc = entry->loc;
> if (data.force_persample_interp)
> @@ -1227,7 +1227,7 @@ void CodeEmitterGK110::emitSELP(const Instruction *i)
>code[1] |= 1 << 13;
>
> if (i->subOp == 1) {
> - addInterp(0, 0, selpFlip);
> + addInterp(0, 0, gk110_selpFlip);
> }
> }
>
> @@ -2042,8 +2042,8 @@ CodeEmitterGK110::emitInterpMode(const Instruction *i)
> code[1] |= (i->ipa & 0xc) << (19 - 2);
> }
>
> -static void
> -interpApply(const FixupEntry *entry, uint32_t *code, const FixupData& data)
> +void
> +gk110_interpApply(const struct FixupEntry *entry, uint32_t *code, const
> FixupData& data)
> {
> int ipa = entry->ipa;
> int reg = entry->reg;
> @@ -2078,10 +2078,10 @@ CodeEmitterGK110::emitINTERP(const Instruction *i)
>
> if (i->op == OP_PINTERP) {
>srcId(i->src(1), 23);
> - addInterp(i->ipa, SDATA(i->src(1)).id, interpApply);
> + addInterp(i->ipa, SDATA(i->src(1)).id, gk110_interpApply);
> } else {
>code[0] |= 0xff << 23;
> - addInterp(i->ipa, 0xff, interpApply);
> + addInterp(i->ipa, 0xff, gk110_interpApply);
> }
>
>
Re: [Mesa-dev] [PATCH 2/8] util/blob: Add overwrite function for uint8
On Mon, Feb 17, 2020 at 6:41 PM Mark Menzynski wrote:
>
> Overwrite function for this type was missing and I needed it for my project.
>
> Signed-off-by: Mark Menzynski
> ---
> src/util/blob.c | 9 +
> src/util/blob.h | 15 +++
> 2 files changed, 24 insertions(+)
>
> diff --git a/src/util/blob.c b/src/util/blob.c
> index 94d5a9dea74..5bf4b924c91 100644
> --- a/src/util/blob.c
> +++ b/src/util/blob.c
> @@ -214,6 +214,15 @@ BLOB_WRITE_TYPE(blob_write_intptr, intptr_t)
> #define ASSERT_ALIGNED(_offset, _align) \
> assert(ALIGN((_offset), (_align)) == (_offset))
>
> +bool
> +blob_overwrite_uint8 (struct blob *blob,
> + size_t offset,
> + uint8_t value)
> +{
> + ASSERT_ALIGNED(offset, sizeof(value));
> + return blob_overwrite_bytes(blob, offset, , sizeof(value));
> +}
> +
I think it would be better to do the same as with the write functions
and define a macro for the implementation.
> bool
> blob_overwrite_uint32 (struct blob *blob,
> size_t offset,
> diff --git a/src/util/blob.h b/src/util/blob.h
> index 9113331254a..d5496fef1cd 100644
> --- a/src/util/blob.h
> +++ b/src/util/blob.h
> @@ -209,6 +209,21 @@ blob_write_uint16(struct blob *blob, uint16_t value);
> bool
> blob_write_uint32(struct blob *blob, uint32_t value);
>
> +/**
> + * Overwrite a uint8_t previously written to the blob.
> + *
> + * Writes a uint8_t value to an existing portion of the blob at an offset of
> + * \offset. This data range must have previously been written to the blob by
> + * one of the blob_write_* calls.
> + *
> + * \return True unless the requested position or position+to_write lie
> outside
> + * the current blob's size.
> + */
> +bool
> +blob_overwrite_uint8(struct blob *blob,
> + size_t offset,
> + uint8_t value);
> +
following the existing pattern, I think this should be moved after the
blob_write_uint8 declaration.
> /**
> * Overwrite a uint32_t previously written to the blob.
> *
> --
> 2.21.1
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
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Re: [Mesa-dev] Playing with display timing -- VK_MESA_present_period
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 2020-02-02 7:51 a.m., Keith Packard wrote:
>
> I spent some time over the last week experimenting with a different
> way of doing frame timing.
>
> Instead of specifying *when* a particular frame should be
> displayed, how about we specify how *long* a particular frame
> should be made visible to the user?
>
> This has a couple of advantages over the approach taken in
> GOOGLE_display_timing:
>
> 1. It provides information to the backend about frame timing a
> frame earlier.
>
> 2. Missing a frame can generate fewer artifacts.
>
> Here's what I'm thinking the extension would look like:
>
> An application uses VK_MESA_present_period by including a
> VkPresentPeriodMESA structure in the pNext chain in the
> VkPresentInfoKHR structure passed to the vkQueuePresentKHR call.
>
> typedef struct VkPresentPeriodMESA { VkStructureTypesType;
> const void*pNext; uint32_t swapchainCount; const
> int64_t* pPresentPeriods; } VkPresentPeriodMESA;
>
> The fields in this structure are:
>
> * sType. Set to VK_STRUCTURE_TYPE_PRESENT_PERIOD_MESA * pNext.
> Points to the next extension structure in the chain (if any). *
> swapchainCount. A copy of the swapchainCount field in the
> VkPresentInfoKHR structure. * pPresentPeriods. An array, length
> swapchainCount, of presentation periods for each image in the
> call.
>
> Positive presentation periods represent nanoseconds. Negative
> presentation periods represent frames. A zero value means the
> extension does not affect the associated presentation. Nanosecond
> values are rounded to the nearest upcoming frame so that a value of
> n * refresh_interval is the same as using a value of n frames.
>
> The presentation period causes *future* images to be delayed at
> least until the specified interval after this image has been
> presented. Specifying both a presentation period in a previous
> frame and using GOOGLE_display_timing is well defined -- the
> presentation will be delayed until the later of the two times.
Should this extension specify how it interacts with the various
VK_PRESENT_MODE_* modes?
For one example: With VK_PRESENT_MODE_MAILBOX_KHR, does the period
specified by this extension correspond to:
a) The time between when the image is placed in the the queue of
pending presentation requests and when the next image is placed in the
queue
b) The time between when the image is taken from the queue to be
actually presented and when the same thing happens for another image
(which happens to be in the queue at the time)
c) Yet something else?
If it's a), given the extension talks about rounding to the nearest
upcoming frame, does VK_PRESENT_MODE_MAILBOX_KHR effectively behave
the same as VK_PRESENT_MODE_FIFO(_RELAXED)_KHR with this extension?
If it's b), there can be any number of images entering and leaving the
queue during the period, so it's not clear what purpose the period
would serve?
- --
Earthling Michel Dänzer | https://redhat.com
Libre software enthusiast | Mesa and X developer
-BEGIN PGP SIGNATURE-
iF0EARECAB0WIQSwn681vpFFIZgJURRaga+OatuyAAUCXkrQ9gAKCRBaga+Oatuy
AB2FAJ4glgpyMYSy1WPmbpzbI2O5Rvv0/QCfSeQBF7vsooAtjEBicmW76NfWWws=
=MzZO
-END PGP SIGNATURE-
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[Mesa-dev] [PATCH 4/8] nv50/ir: Add prog_info_out print
Adds a function for printing nv50_ir_prog_info_out structure
in JSON-like format, which could be used in debugging.
Signed-off-by: Mark Menzynski
---
.../drivers/nouveau/codegen/nv50_ir_driver.h | 3 +
.../drivers/nouveau/codegen/nv50_ir_print.cpp | 155 ++
2 files changed, 158 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
index bc92a3bc4ee..9eb8a4c4798 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
@@ -275,6 +275,9 @@ namespace nv50_ir
}
#endif
+extern void
+nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *);
+
/* Serialize a nv50_ir_prog_info_out structure and save it into blob */
extern bool
nv50_ir_prog_info_out_serialize(struct blob *, struct nv50_ir_prog_info_out *);
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
index 5dcbf3c3e0c..f19d1a7d280 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
@@ -22,6 +22,7 @@
#include "codegen/nv50_ir.h"
#include "codegen/nv50_ir_target.h"
+#include "codegen/nv50_ir_driver.h"
#include
@@ -852,3 +853,157 @@ Function::printLiveIntervals() const
}
} // namespace nv50_ir
+
+extern void
+nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *info_out)
+{
+ int i;
+
+ INFO("{\n");
+ INFO(" \"target\":\"%d\",\n", info_out->target);
+ INFO(" \"type\":\"%d\",\n", info_out->type);
+
+ // Bin
+ INFO(" \"bin\":{\n");
+ INFO(" \"maxGPR\":\"%d\",\n", info_out->bin.maxGPR);
+ INFO(" \"tlsSpace\":\"%d\",\n", info_out->bin.tlsSpace);
+ INFO(" \"smemSize\":\"%d\",\n", info_out->bin.smemSize);
+ INFO(" \"codeSize\":\"%d\",\n", info_out->bin.codeSize);
+ INFO(" \"instructions\":\"%d\",\n", info_out->bin.instructions);
+
+ // RelocInfo
+ INFO(" \"RelocInfo\":");
+ if (!info_out->bin.relocData) {
+ INFO("\"NULL\",\n");
+ }
+ else {
+ nv50_ir::RelocInfo *reloc = (nv50_ir::RelocInfo
*)info_out->bin.relocData;
+ INFO("{\n");
+ INFO(" \"codePos\":\"%d\",\n", reloc->codePos);
+ INFO(" \"libPos\":\"%d\",\n", reloc->libPos);
+ INFO(" \"dataPos\":\"%d\",\n", reloc->dataPos);
+ INFO(" \"count\":\"%d\",\n", reloc->count);
+ INFO(" \"RelocEntry\":[\n");
+ for (unsigned int i = 0; i < reloc->count; i++) {
+ INFO("
{\"data\":\"%d\",\t\"mask\":\"%d\",\t\"offset\":\"%d\",\t\"bitPos\":\"%d\",\t\"type\":\"%d\"}",
+ reloc->entry[i].data, reloc->entry[i].mask,
reloc->entry[i].offset, reloc->entry[i].bitPos, reloc->entry[i].type
+ );
+ }
+ INFO("\n");
+ INFO(" ]\n");
+ INFO(" },\n");
+ }
+
+ // FixupInfo
+ INFO(" \"FixupInfo\":");
+ if (!info_out->bin.fixupData) {
+ INFO("\"NULL\"\n");
+ }
+ else {
+ nv50_ir::FixupInfo *fixup = (nv50_ir::FixupInfo
*)info_out->bin.fixupData;
+ INFO("{\n");
+ INFO(" \"count\":\"%d\"\n", fixup->count);
+ INFO(" \"FixupEntry\":[\n");
+ for (unsigned int i = 0; i < fixup->count; i++) {
+ INFO("
{\"apply\":\"%p\",\t\"ipa\":\"%d\",\t\"reg\":\"%d\",\t\"loc\":\"%d\"}",
+ fixup->entry[i].apply, fixup->entry[i].ipa,
fixup->entry[i].reg, fixup->entry[i].loc);
+ }
+ INFO("\n");
+ INFO(" ]\n");
+ INFO(" }\n");
+
+ INFO(" },\n");
+ }
+
+ if (info_out->numSysVals) {
+ INFO(" \"sv\":[\n");
+ for (i = 0; i < info_out->numSysVals; i++) {
+ if (&(info_out->sv[i])) {
+INFO(" {\"id\":\"%d\", \"sn\":\"%d\", \"si\":\"%d\"}",
+ info_out->sv[i].id, info_out->sv[i].sn, info_out->sv[i].si);
+ }
+ }
+ INFO("\n ],\n");
+ }
+ if (info_out->numInputs) {
+ INFO(" \"in\":[\n");
+ for (i = 0; i < info_out->numInputs; i++) {
+ if (&(info_out->in[i])) {
+INFO(" {\"id\":\"%d\",\t\"sn\":\"%d\",\t\"si\":\"%d\"}",
+info_out->in[i].id, info_out->in[i].sn, info_out->in[i].si);
+ }
+ }
+ INFO("\n ],\n");
+ }
+ if (info_out->numOutputs) {
+ INFO(" \"out\":[\n");
+ for (i = 0; i < info_out->numOutputs; i++) {
+ if (&(info_out->out[i])) {
+INFO(" {\"id\":\"%d\",\t\"sn\":\"%d\",\t\"si\":\"%d\"}",
+ info_out->out[i].id, info_out->out[i].sn,
info_out->out[i].si);
+ }
+ }
+ INFO("\n ],\n");
+ }
+
+ INFO(" \"numInputs\":\"%d\",\n", info_out->numInputs);
+ INFO(" \"numOutputs\":\"%d\",\n", info_out->numOutputs);
+ INFO(" \"numPatchConstants\":\"%d\",\n", info_out->numPatchConstants);
+ INFO(" \"numSysVals\":\"%d\",\n",
[Mesa-dev] [PATCH 8/8] nvc0: Add shader disk caching
Adds shader disk caching for nvc0 to reduce the need to every time compile
shaders. Shaders are saved into disk_shader_cache from nvc0_screen structure.
It serializes the input nv50_ir_prog_info to compute the hash key and
also to do a byte compare between the original nv50_ir_prog_info and the one
saved in the cache. If keys match and also the byte compare returns they
are equal, shaders are same, and the compiled nv50_ir_prog_info_out from the
cache can be used instead of compiling input info.
Seems to be significantly improving loading times. Piglit tests seem
to be OK.
Signed-off-by: Mark Menzynski
---
.../drivers/nouveau/nvc0/nvc0_context.h | 1 +
.../drivers/nouveau/nvc0/nvc0_program.c | 49 ---
.../drivers/nouveau/nvc0/nvc0_shader_state.c | 3 +-
src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 2 +
4 files changed, 46 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
index 8a2a8f2797e..4b83d1afeb4 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
@@ -321,6 +321,7 @@ extern struct draw_stage *nvc0_draw_render_stage(struct
nvc0_context *);
/* nvc0_program.c */
bool nvc0_program_translate(struct nvc0_program *, uint16_t chipset,
+struct disk_cache *,
struct pipe_debug_callback *);
bool nvc0_program_upload(struct nvc0_context *, struct nvc0_program *);
void nvc0_program_destroy(struct nvc0_context *, struct nvc0_program *);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index 1a5073292e8..06b6f7b4db5 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -24,6 +24,7 @@
#include "compiler/nir/nir.h"
#include "tgsi/tgsi_ureg.h"
+#include "util/blob.h"
#include "nvc0/nvc0_context.h"
@@ -568,11 +569,19 @@ nvc0_program_dump(struct nvc0_program *prog)
bool
nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
+ struct disk_cache *disk_shader_cache,
struct pipe_debug_callback *debug)
{
+ struct blob blob;
struct nv50_ir_prog_info *info;
struct nv50_ir_prog_info_out info_out = {};
- int ret;
+
+ void *cached_data = NULL;
+ size_t cached_size;
+ bool shader_found = false;
+
+ int ret = 0;
+ cache_key key;
info = CALLOC_STRUCT(nv50_ir_prog_info);
if (!info)
@@ -631,14 +640,38 @@ nvc0_program_translate(struct nvc0_program *prog,
uint16_t chipset,
info->assignSlots = nvc0_program_assign_varying_slots;
/* these fields might be overwritten by the compiler */
- info_out.bin.smemSize = prog->cp.smem_size;
- info_out.io.genUserClip = prog->vp.num_ucps;
-
- ret = nv50_ir_generate_code(info, _out);
- if (ret) {
- NOUVEAU_ERR("shader translation failed: %i\n", ret);
- goto out;
+ info->bin.smemSize = prog->cp.smem_size;
+ info->io.genUserClip = prog->vp.num_ucps;
+
+ blob_init();
+ nv50_ir_prog_info_serialize(, info);
+
+ if (disk_shader_cache) {
+ disk_cache_compute_key(disk_shader_cache, blob.data, blob.size, key);
+ cached_data = disk_cache_get(disk_shader_cache, key, _size);
+
+ if (cached_data && cached_size >= blob.size) { // blob.size is the size
of serialized "info"
+ if (memcmp(cached_data, blob.data, blob.size) == 0) {
+shader_found = true;
+/* Blob contains only "info". In disk cache, "info_out" comes
right after it */
+size_t offset = blob.size;
+nv50_ir_prog_info_out_deserialize(cached_data, cached_size,
offset, _out);
+ }
+ }
+ free(cached_data);
+ }
+ if (!shader_found) {
+ ret = nv50_ir_generate_code(info, _out);
+ if (ret) {
+ NOUVEAU_ERR("shader translation failed: %i\n", ret);
+ goto out;
+ }
+ if (disk_shader_cache) {
+ nv50_ir_prog_info_out_serialize(, _out);
+ disk_cache_put(disk_shader_cache, key, blob.data, blob.size, NULL);
+ }
}
+ blob_finish();
prog->code = info_out.bin.code;
prog->code_size = info_out.bin.codeSize;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
index 774c5648113..4327a89454b 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
@@ -54,7 +54,8 @@ nvc0_program_validate(struct nvc0_context *nvc0, struct
nvc0_program *prog)
if (!prog->translated) {
prog->translated = nvc0_program_translate(
- prog, nvc0->screen->base.device->chipset, >base.debug);
+ prog, nvc0->screen->base.device->chipset,
+ nvc0->screen->base.disk_shader_cache, >base.debug);
if (!prog->translated)
return false;
}
diff --git
[Mesa-dev] [PATCH 3/8] nv50/ir: Add nv50_ir_prog_info_out serialize and deserialize
Adds functions for serializing and deserializing
nv50_ir_prog_info_out structure, which are needed for shader caching.
Signed-off-by: Mark Menzynski
---
.../drivers/nouveau/codegen/nv50_ir_driver.h | 44
.../nouveau/codegen/nv50_ir_emit_gk110.cpp| 14 +-
.../nouveau/codegen/nv50_ir_emit_gm107.cpp| 14 +-
.../nouveau/codegen/nv50_ir_emit_nv50.cpp | 6 +-
.../nouveau/codegen/nv50_ir_emit_nvc0.cpp | 14 +-
.../nouveau/codegen/nv50_ir_serialize.cpp | 196 ++
src/gallium/drivers/nouveau/meson.build | 1 +
7 files changed, 265 insertions(+), 24 deletions(-)
create mode 100644 src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
index f6b5415bc95..bc92a3bc4ee 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
@@ -25,6 +25,7 @@
#include "pipe/p_shader_tokens.h"
+#include "util/blob.h"
#include "tgsi/tgsi_util.h"
#include "tgsi/tgsi_parse.h"
#include "tgsi/tgsi_scan.h"
@@ -242,6 +243,49 @@ nv50_ir_apply_fixups(void *fixupData, uint32_t *code,
extern void nv50_ir_get_target_library(uint32_t chipset,
const uint32_t **code, uint32_t *size);
+
+#ifdef __cplusplus
+namespace nv50_ir
+{
+ class FixupEntry;
+ class FixupData;
+
+ void
+ gk110_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
+ const nv50_ir::FixupData& data);
+ void
+ gm107_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
+ const nv50_ir::FixupData& data);
+ void
+ nv50_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
+const nv50_ir::FixupData& data);
+ void
+ nvc0_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
+const nv50_ir::FixupData& data);
+ void
+ gk110_selpFlip(const nv50_ir::FixupEntry *entry, uint32_t *code,
+ const nv50_ir::FixupData& data);
+ void
+ gm107_selpFlip(const nv50_ir::FixupEntry *entry, uint32_t *code,
+ const nv50_ir::FixupData& data);
+ void
+ nvc0_selpFlip(const nv50_ir::FixupEntry *entry, uint32_t *code,
+ const nv50_ir::FixupData& data);
+
+}
+#endif
+
+/* Serialize a nv50_ir_prog_info_out structure and save it into blob */
+extern bool
+nv50_ir_prog_info_out_serialize(struct blob *, struct nv50_ir_prog_info_out *);
+
+/* Deserialize from data and save into a nv50_ir_prog_info_out structure
+ * using a pointer. Size is a total size of the serialized data.
+ * Offset points to where info_out in data is located. */
+extern bool
+nv50_ir_prog_info_out_deserialize(void *data, size_t size, size_t offset,
+ struct nv50_ir_prog_info_out *);
+
#ifdef __cplusplus
}
#endif
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
index 2118c3153f7..e651d7fdcb0 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
@@ -1209,8 +1209,8 @@ CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
}
}
-static void
-selpFlip(const FixupEntry *entry, uint32_t *code, const FixupData& data)
+void
+gk110_selpFlip(const FixupEntry *entry, uint32_t *code, const FixupData& data)
{
int loc = entry->loc;
if (data.force_persample_interp)
@@ -1227,7 +1227,7 @@ void CodeEmitterGK110::emitSELP(const Instruction *i)
code[1] |= 1 << 13;
if (i->subOp == 1) {
- addInterp(0, 0, selpFlip);
+ addInterp(0, 0, gk110_selpFlip);
}
}
@@ -2042,8 +2042,8 @@ CodeEmitterGK110::emitInterpMode(const Instruction *i)
code[1] |= (i->ipa & 0xc) << (19 - 2);
}
-static void
-interpApply(const FixupEntry *entry, uint32_t *code, const FixupData& data)
+void
+gk110_interpApply(const struct FixupEntry *entry, uint32_t *code, const
FixupData& data)
{
int ipa = entry->ipa;
int reg = entry->reg;
@@ -2078,10 +2078,10 @@ CodeEmitterGK110::emitINTERP(const Instruction *i)
if (i->op == OP_PINTERP) {
srcId(i->src(1), 23);
- addInterp(i->ipa, SDATA(i->src(1)).id, interpApply);
+ addInterp(i->ipa, SDATA(i->src(1)).id, gk110_interpApply);
} else {
code[0] |= 0xff << 23;
- addInterp(i->ipa, 0xff, interpApply);
+ addInterp(i->ipa, 0xff, gk110_interpApply);
}
srcId(i->src(0).getIndirect(0), 10);
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
index e244bd0d610..4970f14cb33 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
@@ -947,8 +947,8 @@ CodeEmitterGM107::emitI2I()
emitGPR (0x00, insn->def(0));
}
-static
[Mesa-dev] [PATCH 2/8] util/blob: Add overwrite function for uint8
Overwrite function for this type was missing and I needed it for my project.
Signed-off-by: Mark Menzynski
---
src/util/blob.c | 9 +
src/util/blob.h | 15 +++
2 files changed, 24 insertions(+)
diff --git a/src/util/blob.c b/src/util/blob.c
index 94d5a9dea74..5bf4b924c91 100644
--- a/src/util/blob.c
+++ b/src/util/blob.c
@@ -214,6 +214,15 @@ BLOB_WRITE_TYPE(blob_write_intptr, intptr_t)
#define ASSERT_ALIGNED(_offset, _align) \
assert(ALIGN((_offset), (_align)) == (_offset))
+bool
+blob_overwrite_uint8 (struct blob *blob,
+ size_t offset,
+ uint8_t value)
+{
+ ASSERT_ALIGNED(offset, sizeof(value));
+ return blob_overwrite_bytes(blob, offset, , sizeof(value));
+}
+
bool
blob_overwrite_uint32 (struct blob *blob,
size_t offset,
diff --git a/src/util/blob.h b/src/util/blob.h
index 9113331254a..d5496fef1cd 100644
--- a/src/util/blob.h
+++ b/src/util/blob.h
@@ -209,6 +209,21 @@ blob_write_uint16(struct blob *blob, uint16_t value);
bool
blob_write_uint32(struct blob *blob, uint32_t value);
+/**
+ * Overwrite a uint8_t previously written to the blob.
+ *
+ * Writes a uint8_t value to an existing portion of the blob at an offset of
+ * \offset. This data range must have previously been written to the blob by
+ * one of the blob_write_* calls.
+ *
+ * \return True unless the requested position or position+to_write lie outside
+ * the current blob's size.
+ */
+bool
+blob_overwrite_uint8(struct blob *blob,
+ size_t offset,
+ uint8_t value);
+
/**
* Overwrite a uint32_t previously written to the blob.
*
--
2.21.1
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[Mesa-dev] [PATCH 1/8] nv50/ir: add nv50_ir_prog_info_out
From: Karol Herbst
Split out the output relevant fields from the nv50_ir_prog_info struct
in order to have a cleaner separation between the input and output of
the compilation.
Signed-off-by: Karol Herbst
---
.../drivers/nouveau/codegen/nv50_ir.cpp | 49 ++--
src/gallium/drivers/nouveau/codegen/nv50_ir.h | 9 +-
.../drivers/nouveau/codegen/nv50_ir_driver.h | 117 +---
.../nouveau/codegen/nv50_ir_from_common.cpp | 14 +-
.../nouveau/codegen/nv50_ir_from_common.h | 3 +-
.../nouveau/codegen/nv50_ir_from_nir.cpp | 202 +++---
.../nouveau/codegen/nv50_ir_from_tgsi.cpp | 254 +-
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 6 +-
.../nouveau/codegen/nv50_ir_target.cpp| 2 +-
.../drivers/nouveau/codegen/nv50_ir_target.h | 5 +-
.../nouveau/codegen/nv50_ir_target_nv50.cpp | 17 +-
.../nouveau/codegen/nv50_ir_target_nv50.h | 3 +-
.../drivers/nouveau/nouveau_compiler.c| 9 +-
.../drivers/nouveau/nv50/nv50_program.c | 61 ++---
.../drivers/nouveau/nvc0/nvc0_program.c | 89 +++---
15 files changed, 448 insertions(+), 392 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
index c65853578f6..c2c5956874a 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
@@ -1241,15 +1241,18 @@ void Program::releaseValue(Value *value)
extern "C" {
static void
-nv50_ir_init_prog_info(struct nv50_ir_prog_info *info)
+nv50_ir_init_prog_info(struct nv50_ir_prog_info *info,
+ struct nv50_ir_prog_info_out *info_out)
{
+ info_out->target = info->target;
+ info_out->type = info->type;
if (info->type == PIPE_SHADER_TESS_CTRL || info->type ==
PIPE_SHADER_TESS_EVAL) {
- info->prop.tp.domain = PIPE_PRIM_MAX;
- info->prop.tp.outputPrim = PIPE_PRIM_MAX;
+ info_out->prop.tp.domain = PIPE_PRIM_MAX;
+ info_out->prop.tp.outputPrim = PIPE_PRIM_MAX;
}
if (info->type == PIPE_SHADER_GEOMETRY) {
- info->prop.gp.instanceCount = 1;
- info->prop.gp.maxVertices = 1;
+ info_out->prop.gp.instanceCount = 1;
+ info_out->prop.gp.maxVertices = 1;
}
if (info->type == PIPE_SHADER_COMPUTE) {
info->prop.cp.numThreads[0] =
@@ -1257,23 +1260,26 @@ nv50_ir_init_prog_info(struct nv50_ir_prog_info *info)
info->prop.cp.numThreads[2] = 1;
}
info->io.pointSize = 0xff;
- info->io.instanceId = 0xff;
- info->io.vertexId = 0xff;
- info->io.edgeFlagIn = 0xff;
- info->io.edgeFlagOut = 0xff;
- info->io.fragDepth = 0xff;
- info->io.sampleMask = 0xff;
+ info_out->bin.smemSize = info->bin.smemSize;
+ info_out->io.genUserClip = info->io.genUserClip;
+ info_out->io.instanceId = 0xff;
+ info_out->io.vertexId = 0xff;
+ info_out->io.edgeFlagIn = 0xff;
+ info_out->io.edgeFlagOut = 0xff;
+ info_out->io.fragDepth = 0xff;
+ info_out->io.sampleMask = 0xff;
info->io.backFaceColor[0] = info->io.backFaceColor[1] = 0xff;
}
int
-nv50_ir_generate_code(struct nv50_ir_prog_info *info)
+nv50_ir_generate_code(struct nv50_ir_prog_info *info,
+ struct nv50_ir_prog_info_out *info_out)
{
int ret = 0;
nv50_ir::Program::Type type;
- nv50_ir_init_prog_info(info);
+ nv50_ir_init_prog_info(info, info_out);
#define PROG_TYPE_CASE(a, b) \
case PIPE_SHADER_##a: type = nv50_ir::Program::TYPE_##b; break
@@ -1301,15 +1307,16 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
return -1;
}
prog->driver = info;
+ prog->driver_out = info_out;
prog->dbgFlags = info->dbgFlags;
prog->optLevel = info->optLevel;
switch (info->bin.sourceRep) {
case PIPE_SHADER_IR_NIR:
- ret = prog->makeFromNIR(info) ? 0 : -2;
+ ret = prog->makeFromNIR(info, info_out) ? 0 : -2;
break;
case PIPE_SHADER_IR_TGSI:
- ret = prog->makeFromTGSI(info) ? 0 : -2;
+ ret = prog->makeFromTGSI(info, info_out) ? 0 : -2;
break;
default:
ret = -1;
@@ -1320,7 +1327,7 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
if (prog->dbgFlags & NV50_IR_DEBUG_VERBOSE)
prog->print();
- targ->parseDriverInfo(info);
+ targ->parseDriverInfo(info, info_out);
prog->getTarget()->runLegalizePass(prog, nv50_ir::CG_STAGE_PRE_SSA);
prog->convertToSSA();
@@ -1342,7 +1349,7 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
prog->optimizePostRA(info->optLevel);
- if (!prog->emitBinary(info)) {
+ if (!prog->emitBinary(info_out)) {
ret = -5;
goto out;
}
@@ -1350,10 +1357,10 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
out:
INFO_DBG(prog->dbgFlags, VERBOSE, "nv50_ir_generate_code: ret = %i\n", ret);
- info->bin.maxGPR = prog->maxGPR;
- info->bin.code = prog->code;
- info->bin.codeSize = prog->binSize;
- info->bin.tlsSpace =
[Mesa-dev] [PATCH 7/8] nv50/ir: Move separateFragData
Nv50_ir_prog_info (input) was in the wrong place, moved it to
nv50_ir_prog_info_out.
Signed-off-by: Mark Menzynski
---
src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 2 +-
src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 2 +-
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
index cdf19eeabcf..30498ceffaf 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
@@ -112,7 +112,6 @@ struct nv50_ir_prog_info
uint8_t inputPrim;
} gp;
struct {
- bool separateFragData;
bool persampleInvocation;
} fp;
struct {
@@ -200,6 +199,7 @@ struct nv50_ir_prog_info_out
bool usesSampleMaskIn;
bool readsFramebuffer;
bool readsSampleLocations;
+ bool separateFragData;
} fp;
} prop;
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
index 3efeaab4569..cf5f3d6d7e7 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
@@ -2100,7 +2100,7 @@ Converter::visit(nir_intrinsic_instr *insn)
atom->setIndirect(0, 0, address);
atom->subOp = getSubOp(op);
- info->io.globalAccess |= 0x2;
+ info_out->io.globalAccess |= 0x2;
break;
}
case nir_intrinsic_bindless_image_atomic_add:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index 5850dc18fec..c2322f3856a 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -1176,7 +1176,7 @@ void Source::scanProperty(const struct tgsi_full_property
*prop)
info_out->prop.gp.instanceCount = prop->u[0].Data;
break;
case TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS:
- info->prop.fp.separateFragData = true;
+ info_out->prop.fp.separateFragData = true;
break;
case TGSI_PROPERTY_FS_COORD_ORIGIN:
case TGSI_PROPERTY_FS_COORD_PIXEL_CENTER:
--
2.21.1
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[Mesa-dev] [PATCH 6/8] tgsi/util: Change boolean for bool
I was getting errors with "boolean" when compiling. This patch changes
boolean to bool from .
Signed-off-by: Mark Menzynski
---
src/gallium/auxiliary/tgsi/tgsi_util.c | 2 +-
src/gallium/auxiliary/tgsi/tgsi_util.h | 5 +++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.c
b/src/gallium/auxiliary/tgsi/tgsi_util.c
index 1e5582ba273..e1b604cff0e 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_util.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_util.c
@@ -537,7 +537,7 @@ tgsi_util_get_shadow_ref_src_index(enum tgsi_texture_type
tgsi_tex)
}
-boolean
+bool
tgsi_is_shadow_target(enum tgsi_texture_type target)
{
switch (target) {
diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.h
b/src/gallium/auxiliary/tgsi/tgsi_util.h
index 686b90f467e..6dc576b1a00 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_util.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_util.h
@@ -28,6 +28,7 @@
#ifndef TGSI_UTIL_H
#define TGSI_UTIL_H
+#include
#include "pipe/p_shader_tokens.h"
#if defined __cplusplus
@@ -84,11 +85,11 @@ tgsi_util_get_texture_coord_dim(enum tgsi_texture_type
tgsi_tex);
int
tgsi_util_get_shadow_ref_src_index(enum tgsi_texture_type tgsi_tex);
-boolean
+bool
tgsi_is_shadow_target(enum tgsi_texture_type target);
-static inline boolean
+static inline bool
tgsi_is_msaa_target(enum tgsi_texture_type target)
{
return (target == TGSI_TEXTURE_2D_MSAA ||
--
2.21.1
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[Mesa-dev] [PATCH 5/8] nv50/ir: Add nv50_ir_prog_info serialize
Adds a function for serializing a nv50_ir_prog_info structure, which is
needed for shader caching.
Signed-off-by: Mark Menzynski
---
.../drivers/nouveau/codegen/nv50_ir_driver.h | 4 +
.../nouveau/codegen/nv50_ir_serialize.cpp | 81 +++
2 files changed, 85 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
index 9eb8a4c4798..cdf19eeabcf 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
@@ -278,6 +278,10 @@ namespace nv50_ir
extern void
nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *);
+/* Serialize a nv50_ir_prog_info structure and save it into blob */
+extern bool
+nv50_ir_prog_info_serialize(struct blob *, struct nv50_ir_prog_info *);
+
/* Serialize a nv50_ir_prog_info_out structure and save it into blob */
extern bool
nv50_ir_prog_info_out_serialize(struct blob *, struct nv50_ir_prog_info_out *);
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
index 077f3eba6c8..0f47189f10b 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
@@ -17,6 +17,87 @@ enum InterpApply {
FLIP_GM107 = 7
};
+extern bool
+nv50_ir_prog_info_serialize(struct blob *blob, struct nv50_ir_prog_info *info)
+{
+ blob_write_uint16(blob, info->target);
+ blob_write_uint8(blob, info->type);
+ blob_write_uint8(blob, info->optLevel);
+ blob_write_uint8(blob, info->dbgFlags);
+ blob_write_uint8(blob, info->omitLineNum);
+ blob_write_uint32(blob, info->bin.smemSize);
+ blob_write_uint16(blob, info->bin.maxOutput);
+ blob_write_uint8(blob, info->bin.sourceRep);
+
+ switch(info->bin.sourceRep) {
+ case PIPE_SHADER_IR_TGSI: {
+ struct tgsi_token *tokens = (struct tgsi_token *)info->bin.source;
+ unsigned int num_tokens = tgsi_num_tokens(tokens);
+
+ blob_write_uint32(blob, num_tokens);
+ blob_write_bytes(blob, tokens, num_tokens * sizeof(struct
tgsi_token));
+ break;
+ }
+ case PIPE_SHADER_IR_NIR: {
+ struct nir_shader *nir = (struct nir_shader *)info->bin.source;
+ nir_serialize(blob, nir, false);
+ break;
+ }
+ default:
+ assert(!"unhandled info->bin.sourceRep");
+ return false;
+ }
+
+ blob_write_uint16(blob, info->immd.bufSize);
+ blob_write_bytes(blob, info->immd.buf, info->immd.bufSize *
sizeof(*info->immd.buf));
+ blob_write_uint16(blob, info->immd.count);
+ blob_write_bytes(blob, info->immd.data, info->immd.count *
sizeof(*info->immd.data));
+ blob_write_bytes(blob, info->immd.type, info->immd.count * 16); // for each
vec4 (128 bit)
+
+ switch (info->type) {
+ case PIPE_SHADER_VERTEX:
+ blob_write_bytes(blob, info->prop.vp.inputMask,
+ 4 * sizeof(*info->prop.vp.inputMask)); /* array of
size 4 */
+ break;
+ case PIPE_SHADER_TESS_CTRL:
+ blob_write_uint32(blob, info->prop.cp.inputOffset);
+ blob_write_uint32(blob, info->prop.cp.sharedOffset);
+ blob_write_uint32(blob, info->prop.cp.gridInfoBase);
+ blob_write_bytes(blob, info->prop.cp.numThreads,
+ 3 * sizeof(*info->prop.cp.numThreads)); /* array of
size 3 */
+ case PIPE_SHADER_GEOMETRY:
+ blob_write_uint8(blob, info->prop.gp.inputPrim);
+ break;
+ case PIPE_SHADER_FRAGMENT:
+ blob_write_uint8(blob, info->prop.fp.persampleInvocation);
+ break;
+ default:
+ break;
+ }
+
+ blob_write_uint8(blob, info->io.auxCBSlot);
+ blob_write_uint16(blob, info->io.ucpBase);
+ blob_write_uint16(blob, info->io.drawInfoBase);
+ blob_write_uint16(blob, info->io.alphaRefBase);
+ blob_write_uint8(blob, info->io.pointSize);
+ blob_write_uint8(blob, info->io.viewportId);
+ blob_write_bytes(blob, info->io.backFaceColor, 2 *
sizeof(*info->io.backFaceColor));
+ blob_write_uint8(blob, info->io.mul_zero_wins);
+ blob_write_uint8(blob, info->io.nv50styleSurfaces);
+ blob_write_uint16(blob, info->io.texBindBase);
+ blob_write_uint16(blob, info->io.fbtexBindBase);
+ blob_write_uint16(blob, info->io.suInfoBase);
+ blob_write_uint16(blob, info->io.bindlessBase);
+ blob_write_uint16(blob, info->io.bufInfoBase);
+ blob_write_uint16(blob, info->io.sampleInfoBase);
+ blob_write_uint8(blob, info->io.msInfoCBSlot);
+ blob_write_uint16(blob, info->io.msInfoBase);
+ blob_write_uint16(blob, info->io.uboInfoBase);
+ blob_write_uint8(blob, info->io.genUserClip);
+
+ return true;
+}
+
extern bool
nv50_ir_prog_info_out_serialize(struct blob *blob,
struct nv50_ir_prog_info_out *info_out)
--
2.21.1
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