[Mesa-dev] [ANNOUNCE] mesa 21.2.5
Hi list, Sorry this is a day late, I've been sick the last week. Mesa 21.2.5 is now available. Things are starting to slow down a bit as we get to the end of the 21.2 cycle, and that's nice. We've got a bit of everything in here: general vulkan, panfrost, and zink are the biggest changes. Cheers, Dylan shortlog Alyssa Rosenzweig (4): panfrost: Detect implementations support AFBC panfrost,panvk: Use dev->has_afbc instead of quirks panfrost: Fix gl_FragColor lowering panfrost: Add internal afbc_formats Boris Brezillon (3): vulkan: Fix weak symbol emulation when compiling with MSVC vulkan: Set unused entrypoints to vk_entrypoint_stub when compiling with MSVC vulkan: Fix entrypoint generation when compiling for x86 with MSVC Daniel Schürmann (1): driconf: set vk_x11_strict_image_count for Wolfenstein: Youngblood Dylan Baker (9): docs: add sha256 sum for 21.2.4 release .pick_status.json: Update to 1c0eb7aa78bac4494dbff0c502a8c09e23a4c123 .pick_status.json: Update to d43f89f17a8259c842016fa559fa33c1c6279105 .pick_status.json: Update to be6d584de43966ee58bf1fcac156ebf8040081d1 .pick_status.json: Update to 39f25945311e1385a54ddd17f71f9f6023d97256 .pick_status.json: Update to dc74285d32df9c09eb896bc4571066402d32d10b .pick_status.json: Update to 16f838576cf29e26f1af198ac93a0fb3a3cfad8f docs: add release notes for 21.2.5 VERSION: bump for 21.2.5 release Emma Anholt (1): radeonsi: Fix leak of screen->perfcounters. Ian Romanick (1): nir/loop_unroll: Always unroll loops that iterate at most once Jan Beich (1): meson: disable -Werror=thread-safety on FreeBSD Jason Ekstrand (2): i965: Emit a NULL surface for buffer textures with no buffer nir/algebraic: Lower fisfinite Karol Herbst (1): spirv: Don't add 0.5 to array indicies for OpImageSampleExplicitLod Lionel Landwerlin (2): isl: only bump the min row pitch for display when not specified anv: fix push constant lowering with bindless shaders Maniraj D (1): egl: set TSD as NULL after deinit Marcin Ślusarz (2): iris: fix scratch address patching for TESS_EVAL stage intel: fix INTEL_DEBUG environment variable on 32-bit systems Marek Olšák (2): mesa: fix crashes in the no_error path of glUniform st/mesa: don't crash when draw indirect buffer has no storage Mike Blumenkrantz (6): aux/pb: add a tolerance for reclaim failure aux/pb: more correctly check number of reclaims zink: fully zero surface creation struct zink: don't break early when applying fb clears zink: fix gl_SampleMaskIn spirv generation nir/lower_samplers_as_deref: rewrite more image intrinsics Mykhailo Skorokhodov (1): iris: Add missed tile flush flag Nanley Chery (1): iris: Tile cache flush for depth before fast clear Pierre-Eric Pelloux-Prayer (1): radeonsi: use viewport offset in quant_mode determination Tapani Pälli (1): anv: use vk_object_zalloc for wsi fences created Timur Kristóf (1): drirc: Apply radv_invariant_geom workaround to Resident Evil Village. git tag: mesa-21.2.5 https://mesa.freedesktop.org/archive/mesa-21.2.5.tar.xz SHA256: 8e49585fb760d973723dab6435d0c86f7849b8305b1e6d99f475138d896bacbb mesa-21.2.5.tar.xz SHA512: aaa1ebaa1e18eea76c3784c9a65942c3e417c1079d7bf75dcede574999dc459fb4d68d041cf2f767afb9cbfa834a985e0a4edd5a56b0fc90f8fdc506359aa5da mesa-21.2.5.tar.xz PGP: https://mesa.freedesktop.org/archive/mesa-21.2.5.tar.xz.sig signature.asc Description: signature
Re: [Mesa-dev] llvmpipe not supporting EGL_EXT_image_dma_buf_import ?
Well I'm not an expert on llvmpipe, but as far as I know that's a general problem. DMA-buf is used by the Linux kernel drivers to pass hardware bufefrs between processes and drivers. Since llvmpipe as a software renderer it has no kernel driver, so there is no easy way to implement that. What could work is to use dma-buf-heaps as general allocation interface for llvmpipe or other software rendereres. Regards, Christian. Am 28.10.21 um 13:30 schrieb Irion, Alexander: Hello, I would like to use the zwp_linux_dmabuf interface of Weston which requires the EGL_EXT_image_dma_buf_import extension. Apparently with llvmpipe renderer (LLVM 12.0.0, 256 bits) this extension is not enumerated. Does llvmpipe currently not support EGL_EXT_image_dma_buf_import in general? Kind regards, Alexander Irion - Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht München, HRB 106955
[Mesa-dev] llvmpipe not supporting EGL_EXT_image_dma_buf_import ?
Hello, I would like to use the zwp_linux_dmabuf interface of Weston which requires the EGL_EXT_image_dma_buf_import extension. Apparently with llvmpipe renderer (LLVM 12.0.0, 256 bits) this extension is not enumerated. Does llvmpipe currently not support EGL_EXT_image_dma_buf_import in general? Kind regards, Alexander Irion - Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht München, HRB 106955
Re: [Mesa-dev] [PATCH v3 12/17] drm/i915/dg2: Tile 4 plane format support
On Thu, Oct 28, 2021 at 02:53:34AM +0530, Ramalingam C wrote:
> From: Stanislav Lisovskiy
>
> TileF(Tile4 in bspec) format is 4K tile organized into
> 64B subtiles with same basic shape as for legacy TileY
> which will be supported by Display13.
>
> v2: - Fixed wrong case condition(Jani Nikula)
> - Increased I915_FORMAT_MOD_F_TILED up to 12(Imre Deak)
>
> v3: - s/I915_TILING_F/TILING_4/g
> - s/I915_FORMAT_MOD_F_TILED/I915_FORMAT_MOD_4_TILED/g
> - Removed unneeded fencing code
>
> v4: - Rebased, fixed merge conflict with new table-oriented
> format modifier checking(Stan)
> - Replaced the rest of "Tile F" mentions to "Tile 4"(Stan)
>
> v5: - Fixed the has_4tile addition (Ram)
>
> Cc: Imre Deak
> Cc: Matt Roper
> Cc: Maarten Lankhorst
> cc: Simon Ser
> cc: Pekka Paalanen
> Cc: Jordan Justen
> Cc: Kenneth Graunke
> Cc: mesa-dev@lists.freedesktop.org
> Cc: Tony Ye
> Cc: Slawomir Milczarek
> Signed-off-by: Stanislav Lisovskiy
> Signed-off-by: Matt Roper
> Signed-off-by: Juha-Pekka Heikkilä
> Signed-off-by: Ramalingam C
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 1 +
> drivers/gpu/drm/i915/display/intel_fb.c | 11 ++
> drivers/gpu/drm/i915/display/intel_fbc.c | 1 +
> .../drm/i915/display/intel_plane_initial.c| 1 +
> .../drm/i915/display/skl_universal_plane.c| 20 +++
> drivers/gpu/drm/i915/i915_drv.h | 3 +++
> drivers/gpu/drm/i915/i915_pci.c | 1 +
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_device_info.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 1 +
> include/uapi/drm/drm_fourcc.h | 8
> 11 files changed, 41 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 79cd158503b3..9b3913d73213 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7755,6 +7755,7 @@ static int intel_atomic_check_async(struct
> intel_atomic_state *state)
> case I915_FORMAT_MOD_X_TILED:
> case I915_FORMAT_MOD_Y_TILED:
> case I915_FORMAT_MOD_Yf_TILED:
> + case I915_FORMAT_MOD_4_TILED:
> break;
> default:
> drm_dbg_kms(>drm,
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
> b/drivers/gpu/drm/i915/display/intel_fb.c
> index 9ff52dde1683..562d5244688d 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -188,6 +188,10 @@ static const struct intel_modifier_desc
> intel_modifiers[] = {
> .modifier = I915_FORMAT_MOD_Yf_TILED,
> .display_ver = { 9, 11 },
> .tiling = I915_TILING_NONE,
> + }, {
> + .modifier = I915_FORMAT_MOD_4_TILED,
> + .display_ver = { 12, 13 },
> + .tiling = I915_TILING_NONE,
> }, {
> .modifier = I915_FORMAT_MOD_Y_TILED,
> .display_ver = { 9, 13 },
> @@ -578,6 +582,12 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb,
> int color_plane)
> return 128;
> else
> return 512;
> + case I915_FORMAT_MOD_4_TILED:
> + /*
> + * Each 4K tile consists of 64B(8*8) subtiles, with
> + * same shape as Y Tile(i.e 4*16B OWords)
> + */
> + return 128;
> case I915_FORMAT_MOD_Y_TILED_CCS:
> if (intel_fb_is_ccs_aux_plane(fb, color_plane))
> return 128;
> @@ -746,6 +756,7 @@ unsigned int intel_surf_alignment(const struct
> drm_framebuffer *fb,
> case I915_FORMAT_MOD_Y_TILED_CCS:
> case I915_FORMAT_MOD_Yf_TILED_CCS:
> case I915_FORMAT_MOD_Y_TILED:
> + case I915_FORMAT_MOD_4_TILED:
> case I915_FORMAT_MOD_Yf_TILED:
> return 1 * 1024 * 1024;
> default:
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 1f66de77a6b1..f079a771f802 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -747,6 +747,7 @@ static bool tiling_is_valid(struct drm_i915_private
> *dev_priv,
> case DRM_FORMAT_MOD_LINEAR:
> case I915_FORMAT_MOD_Y_TILED:
> case I915_FORMAT_MOD_Yf_TILED:
> + case I915_FORMAT_MOD_4_TILED:
> return DISPLAY_VER(dev_priv) >= 9;
> case I915_FORMAT_MOD_X_TILED:
> return true;
> diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c
> b/drivers/gpu/drm/i915/display/intel_plane_initial.c
> index dcd698a02da2..d80855ee9b96 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane_initial.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c
> @@ -125,6 +125,7 @@
