[Mesa-dev] [PATCH] R600: Add SI load support for v[24]i32 and store for v2i32
Also add a seperate vector lit test file, since r600 doesn't seem to handle v2i32 load/store yet, but we can test both for SI. Signed-off-by: Aaron Watry awa...@gmail.com --- lib/Target/R600/SIInstructions.td | 5 + test/CodeGen/R600/load.vec.ll | 19 +++ 2 files changed, 24 insertions(+) create mode 100644 test/CodeGen/R600/load.vec.ll diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index e8ed2dd..9c96c08 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -1638,6 +1638,10 @@ defm : MUBUFLoad_Pattern BUFFER_LOAD_DWORD_ADDR64, i32, global_load, constant_load; defm : MUBUFLoad_Pattern BUFFER_LOAD_UBYTE_ADDR64, i32, zextloadi8_global, zextloadi8_constant; +defm : MUBUFLoad_Pattern BUFFER_LOAD_DWORDX2_ADDR64, v2i32, + global_load, constant_load; +defm : MUBUFLoad_Pattern BUFFER_LOAD_DWORDX4_ADDR64, v4i32, + global_load, constant_load; multiclass MUBUFStore_Pattern MUBUF Instr, ValueType vt { @@ -1654,6 +1658,7 @@ multiclass MUBUFStore_Pattern MUBUF Instr, ValueType vt { defm : MUBUFStore_Pattern BUFFER_STORE_DWORD, i32; defm : MUBUFStore_Pattern BUFFER_STORE_DWORDX2, i64; +defm : MUBUFStore_Pattern BUFFER_STORE_DWORDX2, v2i32; defm : MUBUFStore_Pattern BUFFER_STORE_DWORDX4, v4i32; /** == **/ diff --git a/test/CodeGen/R600/load.vec.ll b/test/CodeGen/R600/load.vec.ll new file mode 100644 index 000..08e034e --- /dev/null +++ b/test/CodeGen/R600/load.vec.ll @@ -0,0 +1,19 @@ +; RUN: llc %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK %s + +; load a v2i32 value from the global address space. +; SI-CHECK: @load_v2i32 +; SI-CHECK: BUFFER_LOAD_DWORDX2 VGPR{{[0-9]+}} +define void @load_v2i32(2 x i32 addrspace(1)* %out, 2 x i32 addrspace(1)* %in) { + %a = load 2 x i32 addrspace(1) * %in + store 2 x i32 %a, 2 x i32 addrspace(1)* %out + ret void +} + +; load a v4i32 value from the global address space. +; SI-CHECK: @load_v4i32 +; SI-CHECK: BUFFER_LOAD_DWORDX4 VGPR{{[0-9]+}} +define void @load_v4i32(4 x i32 addrspace(1)* %out, 4 x i32 addrspace(1)* %in) { + %a = load 4 x i32 addrspace(1) * %in + store 4 x i32 %a, 4 x i32 addrspace(1)* %out + ret void +} -- 1.8.1.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] R600: Add SI load support for v[24]i32 and store for v2i32
On Fri, Jun 14, 2013 at 08:40:38AM -0500, Aaron Watry wrote: Also add a seperate vector lit test file, since r600 doesn't seem to handle v2i32 load/store yet, but we can test both for SI. Pushed, thanks! -Tom Signed-off-by: Aaron Watry awa...@gmail.com --- lib/Target/R600/SIInstructions.td | 5 + test/CodeGen/R600/load.vec.ll | 19 +++ 2 files changed, 24 insertions(+) create mode 100644 test/CodeGen/R600/load.vec.ll diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index e8ed2dd..9c96c08 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -1638,6 +1638,10 @@ defm : MUBUFLoad_Pattern BUFFER_LOAD_DWORD_ADDR64, i32, global_load, constant_load; defm : MUBUFLoad_Pattern BUFFER_LOAD_UBYTE_ADDR64, i32, zextloadi8_global, zextloadi8_constant; +defm : MUBUFLoad_Pattern BUFFER_LOAD_DWORDX2_ADDR64, v2i32, + global_load, constant_load; +defm : MUBUFLoad_Pattern BUFFER_LOAD_DWORDX4_ADDR64, v4i32, + global_load, constant_load; multiclass MUBUFStore_Pattern MUBUF Instr, ValueType vt { @@ -1654,6 +1658,7 @@ multiclass MUBUFStore_Pattern MUBUF Instr, ValueType vt { defm : MUBUFStore_Pattern BUFFER_STORE_DWORD, i32; defm : MUBUFStore_Pattern BUFFER_STORE_DWORDX2, i64; +defm : MUBUFStore_Pattern BUFFER_STORE_DWORDX2, v2i32; defm : MUBUFStore_Pattern BUFFER_STORE_DWORDX4, v4i32; /** == **/ diff --git a/test/CodeGen/R600/load.vec.ll b/test/CodeGen/R600/load.vec.ll new file mode 100644 index 000..08e034e --- /dev/null +++ b/test/CodeGen/R600/load.vec.ll @@ -0,0 +1,19 @@ +; RUN: llc %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK %s + +; load a v2i32 value from the global address space. +; SI-CHECK: @load_v2i32 +; SI-CHECK: BUFFER_LOAD_DWORDX2 VGPR{{[0-9]+}} +define void @load_v2i32(2 x i32 addrspace(1)* %out, 2 x i32 addrspace(1)* %in) { + %a = load 2 x i32 addrspace(1) * %in + store 2 x i32 %a, 2 x i32 addrspace(1)* %out + ret void +} + +; load a v4i32 value from the global address space. +; SI-CHECK: @load_v4i32 +; SI-CHECK: BUFFER_LOAD_DWORDX4 VGPR{{[0-9]+}} +define void @load_v4i32(4 x i32 addrspace(1)* %out, 4 x i32 addrspace(1)* %in) { + %a = load 4 x i32 addrspace(1) * %in + store 4 x i32 %a, 4 x i32 addrspace(1)* %out + ret void +} -- 1.8.1.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev