Signed-off-by: Alyssa Rosenzweig <aly...@rosenzweig.io>
---
.../drivers/panfrost/midgard/disassemble.c | 20 ++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/panfrost/midgard/disassemble.c
b/src/gallium/drivers/panfrost/midgard/disassemble.c
index 9469cac6e75..8466a90b8d6 100644
--- a/src/gallium/drivers/panfrost/midgard/disassemble.c
+++ b/src/gallium/drivers/panfrost/midgard/disassemble.c
@@ -75,6 +75,8 @@ prefix_for_bits(unsigned bits)
return 'q';
case 16:
return 'h';
+ case 64:
+ return 'd';
default:
return 0;
}
@@ -219,7 +221,19 @@ print_vector_src(unsigned src_binary, bool out_high,
print_reg(reg, 32);
}
} else if (mode == midgard_reg_mode_64) {
- /* TODO */
+ if (src->rep_high)
+ printf(" /* rep_high */ ");
+
+ if (src->rep_low)
+ printf(" /* rep_low */ ");
+
+ if (src->half)
+ printf(" /* half */ ");
+
+ if (out_high)
+ printf(" /* out_high */ ");
+
+ print_reg(reg, 64);
}
//swizzle
@@ -268,10 +282,6 @@ print_vector_field(const char *name, uint16_t *words,
uint16_t reg_word,
midgard_vector_alu *alu_field = (midgard_vector_alu *) words;
midgard_reg_mode mode = alu_field->reg_mode;
- if (mode == midgard_reg_mode_64) {
- printf("unknown reg mode %u\n", alu_field->reg_mode);
- }
-
/* For now, prefix instruction names with their unit, until we
* understand how this works on a deeper level */
printf("%s.", name);
--
2.20.1
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