Re: [Mesa-dev] [PATCH 09/29] nir/format_convert: Add pack/unpack for R11F_G11F_B10F

2018-03-05 Thread Pohjolainen, Topi 
On Sun, Mar 04, 2018 at 07:44:09AM -0600, Jason Ekstrand wrote:
> On March 4, 2018 03:11:03 "Pohjolainen, Topi"
>  wrote:
> 
> >On Fri, Jan 26, 2018 at 05:59:38PM -0800, Jason Ekstrand wrote:
> >>---
> >> src/compiler/nir/nir_format_convert.h | 38 
> >> +++
> >> 1 file changed, 38 insertions(+)
> >>
> >>diff --git a/src/compiler/nir/nir_format_convert.h
> >>b/src/compiler/nir/nir_format_convert.h
> >>index 07618dc..0ffd0db 100644
> >>--- a/src/compiler/nir/nir_format_convert.h
> >>+++ b/src/compiler/nir/nir_format_convert.h
> >>@@ -130,3 +130,41 @@ nir_format_srgb_to_linear(nir_builder *b, nir_ssa_def 
> >>*c)
> >>return nir_fsat(b, nir_bcsel(b, nir_flt(b, c, nir_imm_float(b, 
> >> 0.04045f)),
> >>linear, curved));
> >> }
> >>+
> >>+static inline nir_ssa_def *
> >>+nir_format_unpack_11f11f10f(nir_builder *b, nir_ssa_def *packed)
> >>+{
> >>+   nir_ssa_def *chans[3];
> >>+   chans[0] = nir_mask_shift(b, packed, 0x07ff, 4);
> >>+   chans[1] = nir_mask_shift(b, packed, 0x003ff100, -7);
> >>+   chans[2] = nir_mask_shift(b, packed, 0xffc0, -17);
> >>+
> >>+   for (unsigned i = 0; i < 3; i++)
> >>+  chans[i] = nir_unpack_half_2x16_split_x(b, chans[i]);
> >>+
> >>+   return nir_vec(b, chans, 3);
> >>+}
> >>+
> >>+static inline nir_ssa_def *
> >>+nir_format_pack_r11g11b10f(nir_builder *b, nir_ssa_def *color)
> >>+{
> >>+   /* 10 and 11-bit floats are unsigned.  Clamp to non-negative */
> >>+   nir_ssa_def *clamped = nir_fmax(b, color, nir_imm_float(b, 0));
> >>+
> >>+   nir_ssa_def *undef = nir_ssa_undef(b, 1, color->bit_size);
> >>+   nir_ssa_def *p1 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 
> >>0),
> >>+ nir_channel(b, clamped, 
> >>1));
> >>+   nir_ssa_def *p2 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 
> >>2),
> >>+ undef);
> >>+
> >>+   /* A 10 or 11-bit float has the same exponent as a 16-bit float but with
> >>+* fewer exponent bits and no sign bit.  All we have to do is throw away
> >
> >   mantissa?
> >
> >>+* the sign bit and the bottom mantissa bits and shift it into place.
> >>+*/
> >>+   nir_ssa_def *packed = nir_imm_int(b, 0);
> >>+   packed = nir_mask_shift_or(b, packed, p1, 0x7ff0, -4);
> >>+   packed = nir_mask_shift_or(b, packed, p1, 0x7ff0, -9);
> >>+   packed = nir_mask_shift_or(b, packed, p2, 0x7ff0, 17);
> >
> >Shouldn't the mask be 0x7FE? Otherwise the lowest bit collides with the
> >exponent bits of green?
> 
> Yes, I think it should.  That may explain an issue I was setting
> earlier that caused me to not enable compressed blorp_copy for
> r11g11b10f formats. Good catch!

Nice! This patch is then also:

Reviewed-by: Topi Pohjolainen 

> 
> >>+
> >>+   return packed;
> >>+}
> >>--
> >>2.5.0.400.gff86faf
> >>
> >>___
> >>mesa-dev mailing list
> >>mesa-dev@lists.freedesktop.org
> >>https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> 
> 
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Re: [Mesa-dev] [PATCH 09/29] nir/format_convert: Add pack/unpack for R11F_G11F_B10F

2018-03-04 Thread Jason Ekstrand 
On March 4, 2018 03:11:03 "Pohjolainen, Topi"  
wrote:



On Fri, Jan 26, 2018 at 05:59:38PM -0800, Jason Ekstrand wrote:

---
 src/compiler/nir/nir_format_convert.h | 38 +++
 1 file changed, 38 insertions(+)

diff --git a/src/compiler/nir/nir_format_convert.h 
b/src/compiler/nir/nir_format_convert.h

index 07618dc..0ffd0db 100644
--- a/src/compiler/nir/nir_format_convert.h
+++ b/src/compiler/nir/nir_format_convert.h
@@ -130,3 +130,41 @@ nir_format_srgb_to_linear(nir_builder *b, nir_ssa_def *c)
return nir_fsat(b, nir_bcsel(b, nir_flt(b, c, nir_imm_float(b, 0.04045f)),
linear, curved));
 }
+
+static inline nir_ssa_def *
+nir_format_unpack_11f11f10f(nir_builder *b, nir_ssa_def *packed)
+{
+   nir_ssa_def *chans[3];
+   chans[0] = nir_mask_shift(b, packed, 0x07ff, 4);
+   chans[1] = nir_mask_shift(b, packed, 0x003ff100, -7);
+   chans[2] = nir_mask_shift(b, packed, 0xffc0, -17);
+
+   for (unsigned i = 0; i < 3; i++)
+  chans[i] = nir_unpack_half_2x16_split_x(b, chans[i]);
+
+   return nir_vec(b, chans, 3);
+}
+
+static inline nir_ssa_def *
+nir_format_pack_r11g11b10f(nir_builder *b, nir_ssa_def *color)
+{
+   /* 10 and 11-bit floats are unsigned.  Clamp to non-negative */
+   nir_ssa_def *clamped = nir_fmax(b, color, nir_imm_float(b, 0));
+
+   nir_ssa_def *undef = nir_ssa_undef(b, 1, color->bit_size);
+   nir_ssa_def *p1 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 0),
+ nir_channel(b, clamped, 1));
+   nir_ssa_def *p2 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 2),
+ undef);
+
+   /* A 10 or 11-bit float has the same exponent as a 16-bit float but with
+* fewer exponent bits and no sign bit.  All we have to do is throw away


   mantissa?


+* the sign bit and the bottom mantissa bits and shift it into place.
+*/
+   nir_ssa_def *packed = nir_imm_int(b, 0);
+   packed = nir_mask_shift_or(b, packed, p1, 0x7ff0, -4);
+   packed = nir_mask_shift_or(b, packed, p1, 0x7ff0, -9);
+   packed = nir_mask_shift_or(b, packed, p2, 0x7ff0, 17);


Shouldn't the mask be 0x7FE? Otherwise the lowest bit collides with the
exponent bits of green?


Yes, I think it should.  That may explain an issue I was setting earlier 
that caused me to not enable compressed blorp_copy for r11g11b10f formats. 
Good catch!



+
+   return packed;
+}
--
2.5.0.400.gff86faf

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Re: [Mesa-dev] [PATCH 09/29] nir/format_convert: Add pack/unpack for R11F_G11F_B10F

2018-03-04 Thread Pohjolainen, Topi 
On Fri, Jan 26, 2018 at 05:59:38PM -0800, Jason Ekstrand wrote:
> ---
>  src/compiler/nir/nir_format_convert.h | 38 
> +++
>  1 file changed, 38 insertions(+)
> 
> diff --git a/src/compiler/nir/nir_format_convert.h 
> b/src/compiler/nir/nir_format_convert.h
> index 07618dc..0ffd0db 100644
> --- a/src/compiler/nir/nir_format_convert.h
> +++ b/src/compiler/nir/nir_format_convert.h
> @@ -130,3 +130,41 @@ nir_format_srgb_to_linear(nir_builder *b, nir_ssa_def *c)
> return nir_fsat(b, nir_bcsel(b, nir_flt(b, c, nir_imm_float(b, 0.04045f)),
> linear, curved));
>  }
> +
> +static inline nir_ssa_def *
> +nir_format_unpack_11f11f10f(nir_builder *b, nir_ssa_def *packed)
> +{
> +   nir_ssa_def *chans[3];
> +   chans[0] = nir_mask_shift(b, packed, 0x07ff, 4);
> +   chans[1] = nir_mask_shift(b, packed, 0x003ff100, -7);
> +   chans[2] = nir_mask_shift(b, packed, 0xffc0, -17);
> +
> +   for (unsigned i = 0; i < 3; i++)
> +  chans[i] = nir_unpack_half_2x16_split_x(b, chans[i]);
> +
> +   return nir_vec(b, chans, 3);
> +}
> +
> +static inline nir_ssa_def *
> +nir_format_pack_r11g11b10f(nir_builder *b, nir_ssa_def *color)
> +{
> +   /* 10 and 11-bit floats are unsigned.  Clamp to non-negative */
> +   nir_ssa_def *clamped = nir_fmax(b, color, nir_imm_float(b, 0));
> +
> +   nir_ssa_def *undef = nir_ssa_undef(b, 1, color->bit_size);
> +   nir_ssa_def *p1 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 0),
> + nir_channel(b, clamped, 1));
> +   nir_ssa_def *p2 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 2),
> + undef);
> +
> +   /* A 10 or 11-bit float has the same exponent as a 16-bit float but with
> +* fewer exponent bits and no sign bit.  All we have to do is throw away

   mantissa?

> +* the sign bit and the bottom mantissa bits and shift it into place.
> +*/
> +   nir_ssa_def *packed = nir_imm_int(b, 0);
> +   packed = nir_mask_shift_or(b, packed, p1, 0x7ff0, -4);
> +   packed = nir_mask_shift_or(b, packed, p1, 0x7ff0, -9);
> +   packed = nir_mask_shift_or(b, packed, p2, 0x7ff0, 17);

Shouldn't the mask be 0x7FE? Otherwise the lowest bit collides with the
exponent bits of green?

> +
> +   return packed;
> +}
> -- 
> 2.5.0.400.gff86faf
> 
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[Mesa-dev] [PATCH 09/29] nir/format_convert: Add pack/unpack for R11F_G11F_B10F

2018-01-26 Thread Jason Ekstrand 
---
 src/compiler/nir/nir_format_convert.h | 38 +++
 1 file changed, 38 insertions(+)

diff --git a/src/compiler/nir/nir_format_convert.h 
b/src/compiler/nir/nir_format_convert.h
index 07618dc..0ffd0db 100644
--- a/src/compiler/nir/nir_format_convert.h
+++ b/src/compiler/nir/nir_format_convert.h
@@ -130,3 +130,41 @@ nir_format_srgb_to_linear(nir_builder *b, nir_ssa_def *c)
return nir_fsat(b, nir_bcsel(b, nir_flt(b, c, nir_imm_float(b, 0.04045f)),
linear, curved));
 }
+
+static inline nir_ssa_def *
+nir_format_unpack_11f11f10f(nir_builder *b, nir_ssa_def *packed)
+{
+   nir_ssa_def *chans[3];
+   chans[0] = nir_mask_shift(b, packed, 0x07ff, 4);
+   chans[1] = nir_mask_shift(b, packed, 0x003ff100, -7);
+   chans[2] = nir_mask_shift(b, packed, 0xffc0, -17);
+
+   for (unsigned i = 0; i < 3; i++)
+  chans[i] = nir_unpack_half_2x16_split_x(b, chans[i]);
+
+   return nir_vec(b, chans, 3);
+}
+
+static inline nir_ssa_def *
+nir_format_pack_r11g11b10f(nir_builder *b, nir_ssa_def *color)
+{
+   /* 10 and 11-bit floats are unsigned.  Clamp to non-negative */
+   nir_ssa_def *clamped = nir_fmax(b, color, nir_imm_float(b, 0));
+
+   nir_ssa_def *undef = nir_ssa_undef(b, 1, color->bit_size);
+   nir_ssa_def *p1 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 0),
+ nir_channel(b, clamped, 1));
+   nir_ssa_def *p2 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 2),
+ undef);
+
+   /* A 10 or 11-bit float has the same exponent as a 16-bit float but with
+* fewer exponent bits and no sign bit.  All we have to do is throw away
+* the sign bit and the bottom mantissa bits and shift it into place.
+*/
+   nir_ssa_def *packed = nir_imm_int(b, 0);
+   packed = nir_mask_shift_or(b, packed, p1, 0x7ff0, -4);
+   packed = nir_mask_shift_or(b, packed, p1, 0x7ff0, -9);
+   packed = nir_mask_shift_or(b, packed, p2, 0x7ff0, 17);
+
+   return packed;
+}
-- 
2.5.0.400.gff86faf

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