Re: [Mesa-dev] [PATCH 6/9] i965/fs: Port untyped surface read support to Broadwell.

[Eric Anholt]

Kenneth Graunke kenn...@whitecape.org writes:

 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77221
 Signed-off-by: Kenneth Graunke kenn...@whitecape.org

 diff --git a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp 
 b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
 index 856a23e..dae4026 100644
 --- a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
 +++ b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
 @@ -821,6 +821,34 @@ 
 gen8_fs_generator::generate_unpack_half_2x16_split(fs_inst *inst,
  }
  
  void
 +gen8_fs_generator::generate_untyped_surface_read(fs_inst *ir,
 + struct brw_reg dst,
 + struct brw_reg surf_index)
 +{
 +   assert(surf_index.file == BRW_IMMEDIATE_VALUE 
 +  surf_index.type == BRW_REGISTER_TYPE_UD);
 +
 +   const unsigned num_channels = 1;

unused value?

 +
 +   unsigned msg_control = 0xe | /* Enable only the R channel */
 + ((dispatch_width == 16 ? 1 : 2)  4); /* Slot Group: SIMD8 or SIMD16 */

In the specs I'm looking at, this is called simd mode, not slot
group  (if it was slot group like for aops, I'd be concerned since a
simd16 op needs to use all 16 slots)


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[Mesa-dev] [PATCH 6/9] i965/fs: Port untyped surface read support to Broadwell.

[Kenneth Graunke]

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77221
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
 src/mesa/drivers/dri/i965/brw_fs.h  |  3 +++
 src/mesa/drivers/dri/i965/gen8_fs_generator.cpp | 30 -
 2 files changed, 32 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 3c87db7..8b71003 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -750,6 +750,9 @@ private:
void generate_unpack_half_2x16_split(fs_inst *inst,
 struct brw_reg dst,
 struct brw_reg src);
+   void generate_untyped_surface_read(fs_inst *inst,
+  struct brw_reg dst,
+  struct brw_reg surf_index);
void generate_discard_jump(fs_inst *ir);
 
void patch_discard_jumps_to_fb_writes();
diff --git a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp 
b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
index 856a23e..dae4026 100644
--- a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
@@ -821,6 +821,34 @@ gen8_fs_generator::generate_unpack_half_2x16_split(fs_inst 
*inst,
 }
 
 void
+gen8_fs_generator::generate_untyped_surface_read(fs_inst *ir,
+ struct brw_reg dst,
+ struct brw_reg surf_index)
+{
+   assert(surf_index.file == BRW_IMMEDIATE_VALUE 
+  surf_index.type == BRW_REGISTER_TYPE_UD);
+
+   const unsigned num_channels = 1;
+
+   unsigned msg_control = 0xe | /* Enable only the R channel */
+ ((dispatch_width == 16 ? 1 : 2)  4); /* Slot Group: SIMD8 or SIMD16 */
+
+   gen8_instruction *inst = next_inst(BRW_OPCODE_SEND);
+   gen8_set_dst(brw, inst, retype(dst, BRW_REGISTER_TYPE_UD));
+   gen8_set_src0(brw, inst, brw_message_reg(ir-base_mrf));
+   gen8_set_dp_message(brw, inst, HSW_SFID_DATAPORT_DATA_CACHE_1,
+   surf_index.dw1.ud,
+   HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ,
+   msg_control,
+   ir-mlen,
+   dispatch_width / 8,
+   ir-header_present,
+   false);
+
+   brw_mark_surface_used(c-prog_data.base, surf_index.dw1.ud);
+}
+
+void
 gen8_fs_generator::generate_code(exec_list *instructions)
 {
int last_native_inst_offset = next_inst_offset;
@@ -1193,7 +1221,7 @@ gen8_fs_generator::generate_code(exec_list *instructions)
  break;
 
   case SHADER_OPCODE_UNTYPED_SURFACE_READ:
- assert(!XXX: Missing Gen8 scalar support for untyped surface reads);
+ generate_untyped_surface_read(ir, dst, src[0]);
  break;
 
   case FS_OPCODE_SET_SIMD4X2_OFFSET:
-- 
1.9.1

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