Re: [Mesa-dev] [PATCH 3/3] Revert "gallium/radeon: consolidate PIPE_BIND_SHARED/SCANOUT handling"

[Mark Thompson]

On 29/09/17 17:25, Leo Liu wrote:
> On 09/29/2017 11:37 AM, Leo Liu wrote:
>> On 09/29/2017 10:45 AM, Andy Furniss wrote:
>>> Marek Olšák wrote:
 Can you test this?
>>>
>>> My mpv test case is fixed by
>>>
>>> radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb
>>
>> With Andy's information that this happens on newer MPV, and with Marek's 
>> fixes, we know MPV is changed to
>> interop decode buffer instead of previous output buffer, which means the CSC 
>> is done within MPV by most likely calling GL directly instead of
>> previously done by VL shader. This might increase CPU usage for MPV in 
>> general.

How would you intend to render without GL (or similar, like Vulkan)?  While it 
might be possible to support all possible variations (of colour primaries / 
transfer characteristic / matrix coefficients / range / subsample location) in 
Mesa colour conversion, VAAPI does not currently allow this detail to be 
expressed.  For playback cases the user may also want other features which 
modify the output directly (e.g. brightness) or which influence how the image 
is rendered (e.g. alternative scaling methods suited to animation rather than 
live video).

I am preparing a patch to add support for specifying the colour properties (in 
the usual five dimensions) to libva for VPP, but obviously the drivers would 
need to read and act upon them for it to do anything useful.

> I had a quick test between older and newer MPV on a system, there is no 
> obvious difference on CPU usage, which is good.
> 
> And we may expect to get more flexibilities with the change.

Adding the proper export support to libva and the associated series in Mesa 
drops CPU use for worst-case high-bitrate H.265/4K/10-bit video from something 
like ~1 CPU to ~0.05 CPUs on a normalish desktop system.

(Previously it was forced to go through a download-upload step in order to get 
the surfaces into GL.)

Thanks,

- Mark
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Re: [Mesa-dev] [PATCH 3/3] Revert "gallium/radeon: consolidate PIPE_BIND_SHARED/SCANOUT handling"

[Mark Thompson]

On 29/09/17 15:45, Andy Furniss wrote:
> Marek Olšák wrote:
>> Can you test this?
> 
> My mpv test case is fixed by
> 
> radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb

Also good for my VAAPI case; dropped the revert from my series.

Thanks,

- Mark

>>
>> Thanks,
>> Marek
>>
>> On Fri, Sep 29, 2017 at 1:51 AM, Andy Furniss  wrote:
>>> Mark Thompson wrote:

 This reverts commit f70f6baaa3bb0f8b280ac2eaea69bbffaf7de840.
>>>
>>>
>>> I just bisected to this as it also breaks
>>>
>>> mpv --hwdec=vdpau --vo=opengl
>>>
>>> amdgpu: The CS has been rejected, see dmesg for more information (-22).
>>> amdgpu: The CS has been cancelled because the context is lost.
>>>
>>> [drm:amdgpu_uvd_cs_pass2 [amdgpu]] *ERROR* buffer (2) to small (8355840 /
>>> 12441600)!
>>>
>>>
>>>
 ---
 This commit broke VAAPI surface export (found by bisection).  I think the
 observed behaviour with playback is consistent with surfaces not being
 updated some of the time, so something to do with sharing?  I tried setting
 PIPE_BIND_SHARED on the surfaces explicitly, but that didn't help so I'm
 somewhat unclear what's going on exactly.

 I've included this patch in the series as a revert because it makes it
 testable for other people, but it would be better if someone who 
 understands
 how these interact could have a look and decide how to fix it properly.

 Thanks,

 - Mark


    src/gallium/drivers/radeon/r600_buffer_common.c | 13 +
    src/gallium/drivers/radeon/r600_texture.c   |  4 
    2 files changed, 13 insertions(+), 4 deletions(-)

 diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c
 b/src/gallium/drivers/radeon/r600_buffer_common.c
 index b3e60a46e4..706c7485c3 100644
 --- a/src/gallium/drivers/radeon/r600_buffer_common.c
 +++ b/src/gallium/drivers/radeon/r600_buffer_common.c
 @@ -167,10 +167,12 @@ void si_init_resource_fields(struct
 r600_common_screen *rscreen,
   RADEON_FLAG_GTT_WC;
  }
    - /* Displayable and shareable surfaces are not suballocated. */
 -   if (res->b.b.bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT))
 -   res->flags |= RADEON_FLAG_NO_SUBALLOC; /* shareable */
 -   else
 +   /* Only displayable single-sample textures can be shared between
 +    * processes. */
 +   if (!(res->b.b.bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT)) &&
 +   (res->b.b.target == PIPE_BUFFER ||
 +    res->b.b.nr_samples >= 2 ||
 +    rtex->surface.micro_tile_mode != RADEON_MICRO_MODE_DISPLAY))
  res->flags |= RADEON_FLAG_NO_INTERPROCESS_SHARING;
  /* If VRAM is just stolen system memory, allow both VRAM and
 @@ -190,6 +192,9 @@ void si_init_resource_fields(struct r600_common_screen
 *rscreen,
  if (rscreen->debug_flags & DBG_NO_WC)
  res->flags &= ~RADEON_FLAG_GTT_WC;
    + if (res->b.b.bind & PIPE_BIND_SHARED)
 +   res->flags |= RADEON_FLAG_NO_SUBALLOC;
 +
  /* Set expected VRAM and GART usage for the buffer. */
  res->vram_usage = 0;
  res->gart_usage = 0;
 diff --git a/src/gallium/drivers/radeon/r600_texture.c
 b/src/gallium/drivers/radeon/r600_texture.c
 index a9a1b2627e..829d105827 100644
 --- a/src/gallium/drivers/radeon/r600_texture.c
 +++ b/src/gallium/drivers/radeon/r600_texture.c
 @@ -1219,6 +1219,10 @@ r600_texture_create_object(struct pipe_screen
 *screen,
  si_init_resource_fields(rscreen, resource, rtex->size,
    rtex->surface.surf_alignment);
    + /* Displayable surfaces are not suballocated. */
 +   if (resource->b.b.bind & PIPE_BIND_SCANOUT)
 +   resource->flags |= RADEON_FLAG_NO_SUBALLOC;
 +
  if (!si_alloc_resource(rscreen, resource)) {
  FREE(rtex);
  return NULL;

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Re: [Mesa-dev] [PATCH 3/3] Revert "gallium/radeon: consolidate PIPE_BIND_SHARED/SCANOUT handling"

[Leo Liu]

On 09/29/2017 11:37 AM, Leo Liu wrote:



On 09/29/2017 10:45 AM, Andy Furniss wrote:

Marek Olšák wrote:

Can you test this?


My mpv test case is fixed by

radeonsi/uvd: fix planar formats broken since 
f70f6baaa3bb0f8b280ac2eaea69bb


With Andy's information that this happens on newer MPV, and with 
Marek's fixes, we know MPV is changed to
interop decode buffer instead of previous output buffer, which means 
the CSC is done within MPV by most likely calling GL directly instead of
previously done by VL shader. This might increase CPU usage for MPV in 
general.


I had a quick test between older and newer MPV on a system, there is no 
obvious difference on CPU usage, which is good.


And we may expect to get more flexibilities with the change.

Regards,
Leo




Marek

On Fri, Sep 29, 2017 at 1:51 AM, Andy Furniss  
wrote:

Mark Thompson wrote:


This reverts commit f70f6baaa3bb0f8b280ac2eaea69bbffaf7de840.



I just bisected to this as it also breaks

mpv --hwdec=vdpau --vo=opengl

amdgpu: The CS has been rejected, see dmesg for more information 
(-22).

amdgpu: The CS has been cancelled because the context is lost.

[drm:amdgpu_uvd_cs_pass2 [amdgpu]] *ERROR* buffer (2) to small 
(8355840 /

12441600)!




---
This commit broke VAAPI surface export (found by bisection).  I 
think the
observed behaviour with playback is consistent with surfaces not 
being
updated some of the time, so something to do with sharing? I tried 
setting
PIPE_BIND_SHARED on the surfaces explicitly, but that didn't help 
so I'm

somewhat unclear what's going on exactly.

I've included this patch in the series as a revert because it 
makes it
testable for other people, but it would be better if someone who 
understands
how these interact could have a look and decide how to fix it 
properly.


Thanks,

- Mark


   src/gallium/drivers/radeon/r600_buffer_common.c | 13 +
   src/gallium/drivers/radeon/r600_texture.c   |  4 
   2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c
b/src/gallium/drivers/radeon/r600_buffer_common.c
index b3e60a46e4..706c7485c3 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -167,10 +167,12 @@ void si_init_resource_fields(struct
r600_common_screen *rscreen,
  RADEON_FLAG_GTT_WC;
 }
   - /* Displayable and shareable surfaces are not 
suballocated. */

-   if (res->b.b.bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT))
-   res->flags |= RADEON_FLAG_NO_SUBALLOC; /* 
shareable */

-   else
+   /* Only displayable single-sample textures can be shared 
between

+* processes. */
+   if (!(res->b.b.bind & (PIPE_BIND_SHARED | 
PIPE_BIND_SCANOUT)) &&

+   (res->b.b.target == PIPE_BUFFER ||
+res->b.b.nr_samples >= 2 ||
+rtex->surface.micro_tile_mode != 
RADEON_MICRO_MODE_DISPLAY))

 res->flags |= RADEON_FLAG_NO_INTERPROCESS_SHARING;
 /* If VRAM is just stolen system memory, allow both VRAM and
@@ -190,6 +192,9 @@ void si_init_resource_fields(struct 
r600_common_screen

*rscreen,
 if (rscreen->debug_flags & DBG_NO_WC)
 res->flags &= ~RADEON_FLAG_GTT_WC;
   + if (res->b.b.bind & PIPE_BIND_SHARED)
+   res->flags |= RADEON_FLAG_NO_SUBALLOC;
+
 /* Set expected VRAM and GART usage for the buffer. */
 res->vram_usage = 0;
 res->gart_usage = 0;
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index a9a1b2627e..829d105827 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1219,6 +1219,10 @@ r600_texture_create_object(struct pipe_screen
*screen,
 si_init_resource_fields(rscreen, resource, 
rtex->size,

rtex->surface.surf_alignment);
   + /* Displayable surfaces are not suballocated. */
+   if (resource->b.b.bind & PIPE_BIND_SCANOUT)
+   resource->flags |= RADEON_FLAG_NO_SUBALLOC;
+
 if (!si_alloc_resource(rscreen, resource)) {
 FREE(rtex);
 return NULL;



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Re: [Mesa-dev] [PATCH 3/3] Revert "gallium/radeon: consolidate PIPE_BIND_SHARED/SCANOUT handling"

[Leo Liu]

On 09/29/2017 10:45 AM, Andy Furniss wrote:

Marek Olšák wrote:

Can you test this?


My mpv test case is fixed by

radeonsi/uvd: fix planar formats broken since 
f70f6baaa3bb0f8b280ac2eaea69bb


With Andy's information that this happens on newer MPV, and with Marek's 
fixes, we know MPV is changed to
interop decode buffer instead of previous output buffer, which means the 
CSC is done within MPV by most likely calling GL directly instead of
previously done by VL shader. This might increase CPU usage for MPV in 
general.


Leo






Thanks,
Marek

On Fri, Sep 29, 2017 at 1:51 AM, Andy Furniss  
wrote:

Mark Thompson wrote:


This reverts commit f70f6baaa3bb0f8b280ac2eaea69bbffaf7de840.



I just bisected to this as it also breaks

mpv --hwdec=vdpau --vo=opengl

amdgpu: The CS has been rejected, see dmesg for more information (-22).
amdgpu: The CS has been cancelled because the context is lost.

[drm:amdgpu_uvd_cs_pass2 [amdgpu]] *ERROR* buffer (2) to small 
(8355840 /

12441600)!




---
This commit broke VAAPI surface export (found by bisection).  I 
think the

observed behaviour with playback is consistent with surfaces not being
updated some of the time, so something to do with sharing? I tried 
setting
PIPE_BIND_SHARED on the surfaces explicitly, but that didn't help 
so I'm

somewhat unclear what's going on exactly.

I've included this patch in the series as a revert because it makes it
testable for other people, but it would be better if someone who 
understands
how these interact could have a look and decide how to fix it 
properly.


Thanks,

- Mark


   src/gallium/drivers/radeon/r600_buffer_common.c | 13 +
   src/gallium/drivers/radeon/r600_texture.c   |  4 
   2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c
b/src/gallium/drivers/radeon/r600_buffer_common.c
index b3e60a46e4..706c7485c3 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -167,10 +167,12 @@ void si_init_resource_fields(struct
r600_common_screen *rscreen,
  RADEON_FLAG_GTT_WC;
 }
   - /* Displayable and shareable surfaces are not 
suballocated. */

-   if (res->b.b.bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT))
-   res->flags |= RADEON_FLAG_NO_SUBALLOC; /* shareable */
-   else
+   /* Only displayable single-sample textures can be shared 
between

+* processes. */
+   if (!(res->b.b.bind & (PIPE_BIND_SHARED | 
PIPE_BIND_SCANOUT)) &&

+   (res->b.b.target == PIPE_BUFFER ||
+res->b.b.nr_samples >= 2 ||
+rtex->surface.micro_tile_mode != 
RADEON_MICRO_MODE_DISPLAY))

 res->flags |= RADEON_FLAG_NO_INTERPROCESS_SHARING;
 /* If VRAM is just stolen system memory, allow both VRAM and
@@ -190,6 +192,9 @@ void si_init_resource_fields(struct 
r600_common_screen

*rscreen,
 if (rscreen->debug_flags & DBG_NO_WC)
 res->flags &= ~RADEON_FLAG_GTT_WC;
   + if (res->b.b.bind & PIPE_BIND_SHARED)
+   res->flags |= RADEON_FLAG_NO_SUBALLOC;
+
 /* Set expected VRAM and GART usage for the buffer. */
 res->vram_usage = 0;
 res->gart_usage = 0;
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index a9a1b2627e..829d105827 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1219,6 +1219,10 @@ r600_texture_create_object(struct pipe_screen
*screen,
 si_init_resource_fields(rscreen, resource, 
rtex->size,

rtex->surface.surf_alignment);
   + /* Displayable surfaces are not suballocated. */
+   if (resource->b.b.bind & PIPE_BIND_SCANOUT)
+   resource->flags |= RADEON_FLAG_NO_SUBALLOC;
+
 if (!si_alloc_resource(rscreen, resource)) {
 FREE(rtex);
 return NULL;



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Re: [Mesa-dev] [PATCH 3/3] Revert "gallium/radeon: consolidate PIPE_BIND_SHARED/SCANOUT handling"

[Andy Furniss]

Marek Olšák wrote:

Can you test this?


My mpv test case is fixed by

radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb



Thanks,
Marek

On Fri, Sep 29, 2017 at 1:51 AM, Andy Furniss  wrote:

Mark Thompson wrote:


This reverts commit f70f6baaa3bb0f8b280ac2eaea69bbffaf7de840.



I just bisected to this as it also breaks

mpv --hwdec=vdpau --vo=opengl

amdgpu: The CS has been rejected, see dmesg for more information (-22).
amdgpu: The CS has been cancelled because the context is lost.

[drm:amdgpu_uvd_cs_pass2 [amdgpu]] *ERROR* buffer (2) to small (8355840 /
12441600)!




---
This commit broke VAAPI surface export (found by bisection).  I think the
observed behaviour with playback is consistent with surfaces not being
updated some of the time, so something to do with sharing?  I tried setting
PIPE_BIND_SHARED on the surfaces explicitly, but that didn't help so I'm
somewhat unclear what's going on exactly.

I've included this patch in the series as a revert because it makes it
testable for other people, but it would be better if someone who understands
how these interact could have a look and decide how to fix it properly.

Thanks,

- Mark


   src/gallium/drivers/radeon/r600_buffer_common.c | 13 +
   src/gallium/drivers/radeon/r600_texture.c   |  4 
   2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c
b/src/gallium/drivers/radeon/r600_buffer_common.c
index b3e60a46e4..706c7485c3 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -167,10 +167,12 @@ void si_init_resource_fields(struct
r600_common_screen *rscreen,
  RADEON_FLAG_GTT_WC;
 }
   - /* Displayable and shareable surfaces are not suballocated. */
-   if (res->b.b.bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT))
-   res->flags |= RADEON_FLAG_NO_SUBALLOC; /* shareable */
-   else
+   /* Only displayable single-sample textures can be shared between
+* processes. */
+   if (!(res->b.b.bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT)) &&
+   (res->b.b.target == PIPE_BUFFER ||
+res->b.b.nr_samples >= 2 ||
+rtex->surface.micro_tile_mode != RADEON_MICRO_MODE_DISPLAY))
 res->flags |= RADEON_FLAG_NO_INTERPROCESS_SHARING;
 /* If VRAM is just stolen system memory, allow both VRAM and
@@ -190,6 +192,9 @@ void si_init_resource_fields(struct r600_common_screen
*rscreen,
 if (rscreen->debug_flags & DBG_NO_WC)
 res->flags &= ~RADEON_FLAG_GTT_WC;
   + if (res->b.b.bind & PIPE_BIND_SHARED)
+   res->flags |= RADEON_FLAG_NO_SUBALLOC;
+
 /* Set expected VRAM and GART usage for the buffer. */
 res->vram_usage = 0;
 res->gart_usage = 0;
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index a9a1b2627e..829d105827 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1219,6 +1219,10 @@ r600_texture_create_object(struct pipe_screen
*screen,
 si_init_resource_fields(rscreen, resource, rtex->size,
   rtex->surface.surf_alignment);
   + /* Displayable surfaces are not suballocated. */
+   if (resource->b.b.bind & PIPE_BIND_SCANOUT)
+   resource->flags |= RADEON_FLAG_NO_SUBALLOC;
+
 if (!si_alloc_resource(rscreen, resource)) {
 FREE(rtex);
 return NULL;



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Re: [Mesa-dev] [PATCH 3/3] Revert "gallium/radeon: consolidate PIPE_BIND_SHARED/SCANOUT handling"

[Marek Olšák]

Can you test this?

Thanks,
Marek

On Fri, Sep 29, 2017 at 1:51 AM, Andy Furniss  wrote:
> Mark Thompson wrote:
>>
>> This reverts commit f70f6baaa3bb0f8b280ac2eaea69bbffaf7de840.
>
>
> I just bisected to this as it also breaks
>
> mpv --hwdec=vdpau --vo=opengl
>
> amdgpu: The CS has been rejected, see dmesg for more information (-22).
> amdgpu: The CS has been cancelled because the context is lost.
>
> [drm:amdgpu_uvd_cs_pass2 [amdgpu]] *ERROR* buffer (2) to small (8355840 /
> 12441600)!
>
>
>
>> ---
>> This commit broke VAAPI surface export (found by bisection).  I think the
>> observed behaviour with playback is consistent with surfaces not being
>> updated some of the time, so something to do with sharing?  I tried setting
>> PIPE_BIND_SHARED on the surfaces explicitly, but that didn't help so I'm
>> somewhat unclear what's going on exactly.
>>
>> I've included this patch in the series as a revert because it makes it
>> testable for other people, but it would be better if someone who understands
>> how these interact could have a look and decide how to fix it properly.
>>
>> Thanks,
>>
>> - Mark
>>
>>
>>   src/gallium/drivers/radeon/r600_buffer_common.c | 13 +
>>   src/gallium/drivers/radeon/r600_texture.c   |  4 
>>   2 files changed, 13 insertions(+), 4 deletions(-)
>>
>> diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c
>> b/src/gallium/drivers/radeon/r600_buffer_common.c
>> index b3e60a46e4..706c7485c3 100644
>> --- a/src/gallium/drivers/radeon/r600_buffer_common.c
>> +++ b/src/gallium/drivers/radeon/r600_buffer_common.c
>> @@ -167,10 +167,12 @@ void si_init_resource_fields(struct
>> r600_common_screen *rscreen,
>>  RADEON_FLAG_GTT_WC;
>> }
>>   - /* Displayable and shareable surfaces are not suballocated. */
>> -   if (res->b.b.bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT))
>> -   res->flags |= RADEON_FLAG_NO_SUBALLOC; /* shareable */
>> -   else
>> +   /* Only displayable single-sample textures can be shared between
>> +* processes. */
>> +   if (!(res->b.b.bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT)) &&
>> +   (res->b.b.target == PIPE_BUFFER ||
>> +res->b.b.nr_samples >= 2 ||
>> +rtex->surface.micro_tile_mode != RADEON_MICRO_MODE_DISPLAY))
>> res->flags |= RADEON_FLAG_NO_INTERPROCESS_SHARING;
>> /* If VRAM is just stolen system memory, allow both VRAM and
>> @@ -190,6 +192,9 @@ void si_init_resource_fields(struct r600_common_screen
>> *rscreen,
>> if (rscreen->debug_flags & DBG_NO_WC)
>> res->flags &= ~RADEON_FLAG_GTT_WC;
>>   + if (res->b.b.bind & PIPE_BIND_SHARED)
>> +   res->flags |= RADEON_FLAG_NO_SUBALLOC;
>> +
>> /* Set expected VRAM and GART usage for the buffer. */
>> res->vram_usage = 0;
>> res->gart_usage = 0;
>> diff --git a/src/gallium/drivers/radeon/r600_texture.c
>> b/src/gallium/drivers/radeon/r600_texture.c
>> index a9a1b2627e..829d105827 100644
>> --- a/src/gallium/drivers/radeon/r600_texture.c
>> +++ b/src/gallium/drivers/radeon/r600_texture.c
>> @@ -1219,6 +1219,10 @@ r600_texture_create_object(struct pipe_screen
>> *screen,
>> si_init_resource_fields(rscreen, resource, rtex->size,
>>   rtex->surface.surf_alignment);
>>   + /* Displayable surfaces are not suballocated. */
>> +   if (resource->b.b.bind & PIPE_BIND_SCANOUT)
>> +   resource->flags |= RADEON_FLAG_NO_SUBALLOC;
>> +
>> if (!si_alloc_resource(rscreen, resource)) {
>> FREE(rtex);
>> return NULL;
>>
>
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From 76aed9efbe89a51aadd89243c30fd100013c731a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= 
Date: Fri, 29 Sep 2017 16:05:49 +0200
Subject: [PATCH] radeonsi/uvd: fix planar formats broken since
 f70f6baaa3bb0f8b280ac2eaea69bb

---
 src/gallium/drivers/radeonsi/si_uvd.c | 11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_uvd.c b/src/gallium/drivers/radeonsi/si_uvd.c
index 4e82506..1a38b26 100644
--- a/src/gallium/drivers/radeonsi/si_uvd.c
+++ b/src/gallium/drivers/radeonsi/si_uvd.c
@@ -65,8 +65,13 @@ struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
 	template.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
 
 	vl_video_buffer_template(, , resource_formats[0], 1, array_size, PIPE_USAGE_DEFAULT, 0);
+
 	/* TODO: get tiling working */
-	templ.bind = PIPE_BIND_LINEAR;
+	/* Set PIPE_BIND_SHARED to avoid reallocation in r600_texture_get_handle,
+	 * which can't handle joined surfaces. */
+	unsigned bind = 

Re: [Mesa-dev] [PATCH 3/3] Revert "gallium/radeon: consolidate PIPE_BIND_SHARED/SCANOUT handling"

[Andy Furniss]

Mark Thompson wrote:

This reverts commit f70f6baaa3bb0f8b280ac2eaea69bbffaf7de840.


I just bisected to this as it also breaks

mpv --hwdec=vdpau --vo=opengl

amdgpu: The CS has been rejected, see dmesg for more information (-22).
amdgpu: The CS has been cancelled because the context is lost.

[drm:amdgpu_uvd_cs_pass2 [amdgpu]] *ERROR* buffer (2) to small (8355840 
/ 12441600)!




---
This commit broke VAAPI surface export (found by bisection).  I think the 
observed behaviour with playback is consistent with surfaces not being updated 
some of the time, so something to do with sharing?  I tried setting 
PIPE_BIND_SHARED on the surfaces explicitly, but that didn't help so I'm 
somewhat unclear what's going on exactly.

I've included this patch in the series as a revert because it makes it testable 
for other people, but it would be better if someone who understands how these 
interact could have a look and decide how to fix it properly.

Thanks,

- Mark


  src/gallium/drivers/radeon/r600_buffer_common.c | 13 +
  src/gallium/drivers/radeon/r600_texture.c   |  4 
  2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c 
b/src/gallium/drivers/radeon/r600_buffer_common.c
index b3e60a46e4..706c7485c3 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -167,10 +167,12 @@ void si_init_resource_fields(struct r600_common_screen 
*rscreen,
 RADEON_FLAG_GTT_WC;
}
  
-	/* Displayable and shareable surfaces are not suballocated. */

-   if (res->b.b.bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT))
-   res->flags |= RADEON_FLAG_NO_SUBALLOC; /* shareable */
-   else
+   /* Only displayable single-sample textures can be shared between
+* processes. */
+   if (!(res->b.b.bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT)) &&
+   (res->b.b.target == PIPE_BUFFER ||
+res->b.b.nr_samples >= 2 ||
+rtex->surface.micro_tile_mode != RADEON_MICRO_MODE_DISPLAY))
res->flags |= RADEON_FLAG_NO_INTERPROCESS_SHARING;
  
  	/* If VRAM is just stolen system memory, allow both VRAM and

@@ -190,6 +192,9 @@ void si_init_resource_fields(struct r600_common_screen 
*rscreen,
if (rscreen->debug_flags & DBG_NO_WC)
res->flags &= ~RADEON_FLAG_GTT_WC;
  
+	if (res->b.b.bind & PIPE_BIND_SHARED)

+   res->flags |= RADEON_FLAG_NO_SUBALLOC;
+
/* Set expected VRAM and GART usage for the buffer. */
res->vram_usage = 0;
res->gart_usage = 0;
diff --git a/src/gallium/drivers/radeon/r600_texture.c 
b/src/gallium/drivers/radeon/r600_texture.c
index a9a1b2627e..829d105827 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1219,6 +1219,10 @@ r600_texture_create_object(struct pipe_screen *screen,
si_init_resource_fields(rscreen, resource, rtex->size,
  rtex->surface.surf_alignment);
  
+		/* Displayable surfaces are not suballocated. */

+   if (resource->b.b.bind & PIPE_BIND_SCANOUT)
+   resource->flags |= RADEON_FLAG_NO_SUBALLOC;
+
if (!si_alloc_resource(rscreen, resource)) {
FREE(rtex);
return NULL;



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