Re: [PATCH v6 1/4] s390x/tcg: Implement Miscellaneous-Instruction-Extensions Facility 3 for the s390x
Am 23.02.22 um 23:29 schrieb David Miller: Yes I'm adding to this patch, I haven't quite figured out where to put them, they are inline to various things in the patch themselves so I'm putting in the cover letter under the patch they go to. I hope that's correct. You usually put it under your Signed-off-by: line in the patch. I think Thomas can fixup when applying. Thanks - David Miller On Wed, Feb 23, 2022 at 8:40 AM Christian Borntraeger wrote: Am 18.02.22 um 00:17 schrieb David Miller: resolves: https://gitlab.com/qemu-project/qemu/-/issues/737 implements: AND WITH COMPLEMENT (NCRK, NCGRK) NAND (NNRK, NNGRK) NOT EXCLUSIVE OR (NXRK, NXGRK) NOR (NORK, NOGRK) OR WITH COMPLEMENT(OCRK, OCGRK) SELECT(SELR, SELGR) SELECT HIGH (SELFHR) MOVE RIGHT TO LEFT(MVCRL) POPULATION COUNT (POPCNT) Signed-off-by: David Miller For your next patches, feel free to add previous Reviewed-by: tags so that others can see what review has already happened.
Re: [PATCH v6 1/4] s390x/tcg: Implement Miscellaneous-Instruction-Extensions Facility 3 for the s390x
Yes I'm adding to this patch, I haven't quite figured out where to put them, they are inline to various things in the patch themselves so I'm putting in the cover letter under the patch they go to. I hope that's correct. Thanks - David Miller On Wed, Feb 23, 2022 at 8:40 AM Christian Borntraeger wrote: > > > Am 18.02.22 um 00:17 schrieb David Miller: > > resolves: https://gitlab.com/qemu-project/qemu/-/issues/737 > > implements: > > AND WITH COMPLEMENT (NCRK, NCGRK) > > NAND (NNRK, NNGRK) > > NOT EXCLUSIVE OR (NXRK, NXGRK) > > NOR (NORK, NOGRK) > > OR WITH COMPLEMENT(OCRK, OCGRK) > > SELECT(SELR, SELGR) > > SELECT HIGH (SELFHR) > > MOVE RIGHT TO LEFT(MVCRL) > > POPULATION COUNT (POPCNT) > > > > Signed-off-by: David Miller > > For your next patches, feel free to add previous Reviewed-by: tags so that > others > can see what review has already happened.
Re: [PATCH v6 1/4] s390x/tcg: Implement Miscellaneous-Instruction-Extensions Facility 3 for the s390x
> Bit 0 controls this, and recall that IBM uses big-bit numbering, so "8".
> This stores the low part of r[23] in the high part of r1.
> You need to select the high part of r[23].
good catch, these are both fixed will update patch shortly.
Thanks for the review
- David Miller
On Wed, Feb 23, 2022 at 2:41 PM Richard Henderson
wrote:
>
> On 2/17/22 13:17, David Miller wrote:
> > +/* SELECT HIGH */
> > +C(0xb9c0, SELFHR, RRF_a, MIE3, r3, r2, new, r1_32h, loc, 0)
>
> This stores the low part of r[23] in the high part of r1.
> You need to select the high part of r[23].
>
> > static DisasJumpType op_popcnt(DisasContext *s, DisasOps *o)
> > {
> > -gen_helper_popcnt(o->out, o->in2);
> > +const uint8_t m3 = get_field(s, m3);
> > +
> > +if ((m3 & 1) && s390_has_feat(S390_FEAT_MISC_INSTRUCTION_EXT3)) {
>
> Bit 0 controls this, and recall that IBM uses big-bit numbering, so "8".
>
>
> r~
Re: [PATCH v6 1/4] s390x/tcg: Implement Miscellaneous-Instruction-Extensions Facility 3 for the s390x
On 2/17/22 13:17, David Miller wrote:
+/* SELECT HIGH */
+C(0xb9c0, SELFHR, RRF_a, MIE3, r3, r2, new, r1_32h, loc, 0)
This stores the low part of r[23] in the high part of r1.
You need to select the high part of r[23].
static DisasJumpType op_popcnt(DisasContext *s, DisasOps *o)
{
-gen_helper_popcnt(o->out, o->in2);
+const uint8_t m3 = get_field(s, m3);
+
+if ((m3 & 1) && s390_has_feat(S390_FEAT_MISC_INSTRUCTION_EXT3)) {
Bit 0 controls this, and recall that IBM uses big-bit numbering, so "8".
r~
Re: [PATCH v6 1/4] s390x/tcg: Implement Miscellaneous-Instruction-Extensions Facility 3 for the s390x
Am 18.02.22 um 00:17 schrieb David Miller: resolves: https://gitlab.com/qemu-project/qemu/-/issues/737 implements: AND WITH COMPLEMENT (NCRK, NCGRK) NAND (NNRK, NNGRK) NOT EXCLUSIVE OR (NXRK, NXGRK) NOR (NORK, NOGRK) OR WITH COMPLEMENT(OCRK, OCGRK) SELECT(SELR, SELGR) SELECT HIGH (SELFHR) MOVE RIGHT TO LEFT(MVCRL) POPULATION COUNT (POPCNT) Signed-off-by: David Miller For your next patches, feel free to add previous Reviewed-by: tags so that others can see what review has already happened.
[PATCH v6 1/4] s390x/tcg: Implement Miscellaneous-Instruction-Extensions Facility 3 for the s390x
resolves: https://gitlab.com/qemu-project/qemu/-/issues/737
implements:
AND WITH COMPLEMENT (NCRK, NCGRK)
NAND (NNRK, NNGRK)
NOT EXCLUSIVE OR (NXRK, NXGRK)
NOR (NORK, NOGRK)
OR WITH COMPLEMENT(OCRK, OCGRK)
SELECT(SELR, SELGR)
SELECT HIGH (SELFHR)
MOVE RIGHT TO LEFT(MVCRL)
POPULATION COUNT (POPCNT)
Signed-off-by: David Miller
---
target/s390x/gen-features.c| 1 +
target/s390x/helper.h | 1 +
target/s390x/tcg/insn-data.def | 30 +--
target/s390x/tcg/mem_helper.c | 20 +
target/s390x/tcg/translate.c | 53 --
5 files changed, 100 insertions(+), 5 deletions(-)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 7cb1a6ec10..a3f30f69d9 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -740,6 +740,7 @@ static uint16_t qemu_LATEST[] = {
/* add all new definitions before this point */
static uint16_t qemu_MAX[] = {
+S390_FEAT_MISC_INSTRUCTION_EXT3,
/* generates a dependency warning, leave it out for now */
S390_FEAT_MSA_EXT_5,
};
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 271b081e8c..69f69cf718 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -4,6 +4,7 @@ DEF_HELPER_FLAGS_4(nc, TCG_CALL_NO_WG, i32, env, i32, i64, i64)
DEF_HELPER_FLAGS_4(oc, TCG_CALL_NO_WG, i32, env, i32, i64, i64)
DEF_HELPER_FLAGS_4(xc, TCG_CALL_NO_WG, i32, env, i32, i64, i64)
DEF_HELPER_FLAGS_4(mvc, TCG_CALL_NO_WG, void, env, i32, i64, i64)
+DEF_HELPER_FLAGS_4(mvcrl, TCG_CALL_NO_WG, void, env, i64, i64, i64)
DEF_HELPER_FLAGS_4(mvcin, TCG_CALL_NO_WG, void, env, i32, i64, i64)
DEF_HELPER_FLAGS_4(clc, TCG_CALL_NO_WG, i32, env, i32, i64, i64)
DEF_HELPER_3(mvcl, i32, env, i32, i32)
diff --git a/target/s390x/tcg/insn-data.def b/target/s390x/tcg/insn-data.def
index 1c3e115712..3e51cd7c6d 100644
--- a/target/s390x/tcg/insn-data.def
+++ b/target/s390x/tcg/insn-data.def
@@ -105,6 +105,9 @@
D(0xa507, NILL,RI_a, Z, r1_o, i2_16u, r1, 0, andi, 0, 0x1000)
D(0x9400, NI, SI,Z, la1, i2_8u, new, 0, ni, nz64, MO_UB)
D(0xeb54, NIY, SIY, LD, la1, i2_8u, new, 0, ni, nz64, MO_UB)
+/* AND WITH COMPLEMENT */
+C(0xb9f5, NCRK,RRF_a, MIE3, r2, r3, new, r1_32, andc, nz32)
+C(0xb9e5, NCGRK, RRF_a, MIE3, r2, r3, r1, 0, andc, nz64)
/* BRANCH AND LINK */
C(0x0500, BALR,RR_a, Z, 0, r2_nz, r1, 0, bal, 0)
@@ -640,6 +643,8 @@
C(0xeb8e, MVCLU, RSY_a, E2, 0, a2, 0, 0, mvclu, 0)
/* MOVE NUMERICS */
C(0xd100, MVN, SS_a, Z, la1, a2, 0, 0, mvn, 0)
+/* MOVE RIGHT TO LEFT */
+C(0xe50a, MVCRL, SSE, MIE3, la1, a2, 0, 0, mvcrl, 0)
/* MOVE PAGE */
C(0xb254, MVPG,RRE, Z, 0, 0, 0, 0, mvpg, 0)
/* MOVE STRING */
@@ -707,6 +712,16 @@
F(0xed0f, MSEB,RXF, Z, e1, m2_32u, new, e1, mseb, 0, IF_BFP)
F(0xed1f, MSDB,RXF, Z, f1, m2_64, new, f1, msdb, 0, IF_BFP)
+/* NAND */
+C(0xb974, NNRK,RRF_a, MIE3, r2, r3, new, r1_32, nand, nz32)
+C(0xb964, NNGRK, RRF_a, MIE3, r2, r3, r1, 0, nand, nz64)
+/* NOR */
+C(0xb976, NORK,RRF_a, MIE3, r2, r3, new, r1_32, nor, nz32)
+C(0xb966, NOGRK, RRF_a, MIE3, r2, r3, r1, 0, nor, nz64)
+/* NOT EXCLUSIVE OR */
+C(0xb977, NXRK,RRF_a, MIE3, r2, r3, new, r1_32, nxor, nz32)
+C(0xb967, NXGRK, RRF_a, MIE3, r2, r3, r1, 0, nxor, nz64)
+
/* OR */
C(0x1600, OR, RR_a, Z, r1, r2, new, r1_32, or, nz32)
C(0xb9f6, ORK, RRF_a, DO, r2, r3, new, r1_32, or, nz32)
@@ -725,6 +740,9 @@
D(0xa50b, OILL,RI_a, Z, r1_o, i2_16u, r1, 0, ori, 0, 0x1000)
D(0x9600, OI, SI,Z, la1, i2_8u, new, 0, oi, nz64, MO_UB)
D(0xeb56, OIY, SIY, LD, la1, i2_8u, new, 0, oi, nz64, MO_UB)
+/* OR WITH COMPLEMENT */
+C(0xb975, OCRK,RRF_a, MIE3, r2, r3, new, r1_32, orc, nz32)
+C(0xb965, OCGRK, RRF_a, MIE3, r2, r3, r1, 0, orc, nz64)
/* PACK */
/* Really format SS_b, but we pack both lengths into one argument
@@ -735,6 +753,9 @@
/* PACK UNICODE */
C(0xe100, PKU, SS_f, E2, la1, a2, 0, 0, pku, 0)
+/* POPULATION COUNT */
+C(0xb9e1, POPCNT, RRF_c, PC, 0, r2_o, r1, 0, popcnt, nz64)
+
/* PREFETCH */
/* Implemented as nops of course. */
C(0xe336, PFD, RXY_b, GIE, 0, 0, 0, 0, 0, 0)
@@ -743,9 +764,6 @@
/* Implemented as nop of course. */
C(0xb2e8, PPA, RRF_c, PPA, 0, 0, 0, 0, 0, 0)
-/* POPULATION COUNT */
-C(0xb9e1, POPCNT, RRE, PC, 0, r2_o, r1, 0, popcnt, nz64)
-
/* ROTATE LEFT SINGLE LOGICAL */
C(0xeb1d, RLL, RSY_a, Z, r3_o, sh, new, r1_32, rll32, 0)
C(0xeb1c, RLLG,RSY_a, Z, r3_o, sh, r1, 0, rll64, 0)
@@ -765,6 +783,12 @@
/* SEARCH STRING UNICODE */
C(0xb9be, SRSTU, RRE, ETF3, 0, 0, 0, 0, srstu, 0)
+/* SELECT */
+C(0xb9f0, SELR,RRF_a, MIE3, r3, r2, new, r1_32, loc, 0)
+C(0xb9e3, SELGR, RRF_a,
