tb_invalidate_page_range() was intended to be used to invalidate an area of a TB
which the guest explicitly flushes from i-cache. However, QEMU detects writes
to code areas where TBs have been generated, so this has never been useful.
Delete the function, adjust callers.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
cpu-exec.c | 13 -
exec-all.h |1 -
linux-user/main.c| 22 ++
target-ppc/op_helper.c |1 -
target-sparc/helper.h|1 -
target-sparc/op_helper.c |6 --
target-sparc/translate.c |2 +-
7 files changed, 3 insertions(+), 43 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 014f03b..5f0a5a1 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -666,16 +666,3 @@ int cpu_exec(CPUState *env1)
cpu_single_env = NULL;
return ret;
}
-
-/* must only be called from the generated code as an exception can be
- generated */
-void tb_invalidate_page_range(target_ulong start, target_ulong end)
-{
-/* XXX: cannot enable it yet because it yields to MMU exception
- where NIP != read address on PowerPC */
-#if 0
-target_ulong phys_addr;
-phys_addr = get_phys_addr_code(env, start);
-tb_invalidate_phys_page_range(phys_addr, phys_addr + end - start, 0);
-#endif
-}
diff --git a/exec-all.h b/exec-all.h
index 7c2d29f..cf3a704 100644
--- a/exec-all.h
+++ b/exec-all.h
@@ -95,7 +95,6 @@ void QEMU_NORETURN cpu_loop_exit(void);
int page_unprotect(target_ulong address, unsigned long pc, void *puc);
void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
int is_cpu_write_access);
-void tb_invalidate_page_range(target_ulong start, target_ulong end);
void tlb_flush_page(CPUState *env, target_ulong addr);
void tlb_flush(CPUState *env, int flush_global);
#if !defined(CONFIG_USER_ONLY)
diff --git a/linux-user/main.c b/linux-user/main.c
index a4996e7..8336639 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -455,24 +455,6 @@ void cpu_loop(CPUX86State *env)
#ifdef TARGET_ARM
-static void arm_cache_flush(abi_ulong start, abi_ulong last)
-{
-abi_ulong addr, last1;
-
-if (last start)
-return;
-addr = start;
-for(;;) {
-last1 = ((addr + TARGET_PAGE_SIZE) TARGET_PAGE_MASK) - 1;
-if (last1 last)
-last1 = last;
-tb_invalidate_page_range(addr, last1 + 1);
-if (last1 == last)
-break;
-addr = last1 + 1;
-}
-}
-
/* Handle a jump to the kernel code page. */
static int
do_kernel_trap(CPUARMState *env)
@@ -717,7 +699,7 @@ void cpu_loop(CPUARMState *env)
}
if (n == ARM_NR_cacheflush) {
-arm_cache_flush(env-regs[0], env-regs[1]);
+/* nop */
} else if (n == ARM_NR_semihosting
|| n == ARM_NR_thumb_semihosting) {
env-regs[0] = do_arm_semihosting (env);
@@ -733,7 +715,7 @@ void cpu_loop(CPUARMState *env)
if ( n ARM_NR_BASE) {
switch (n) {
case ARM_NR_cacheflush:
-arm_cache_flush(env-regs[0], env-regs[1]);
+/* nop */
break;
case ARM_NR_set_tls:
cpu_set_tls(env, env-regs[0]);
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index d5db484..d5a987b 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -362,7 +362,6 @@ void helper_icbi(target_ulong addr)
* do the load by hand.
*/
ldl(addr);
-tb_invalidate_page_range(addr, addr + env-icache_line_size);
}
// XXX: to be tested
diff --git a/target-sparc/helper.h b/target-sparc/helper.h
index 12e8557..023f4d6 100644
--- a/target-sparc/helper.h
+++ b/target-sparc/helper.h
@@ -35,7 +35,6 @@ DEF_HELPER_2(check_align, void, tl, i32)
DEF_HELPER_0(debug, void)
DEF_HELPER_0(save, void)
DEF_HELPER_0(restore, void)
-DEF_HELPER_1(flush, void, tl)
DEF_HELPER_2(udiv, tl, tl, tl)
DEF_HELPER_2(udiv_cc, tl, tl, tl)
DEF_HELPER_2(sdiv, tl, tl, tl)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index b8c..b38691e 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -4092,12 +4092,6 @@ void helper_write_softint(uint64_t value)
}
#endif
-void helper_flush(target_ulong addr)
-{
-addr = ~7;
-tb_invalidate_page_range(addr, addr + 8);
-}
-
#ifdef TARGET_SPARC64
#ifdef DEBUG_PCALL
static const char * const excp_names[0x80] = {
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index fe99f0b..0cc47e9 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -4226,7 +4226,7 @@ static void disas_sparc_insn(DisasContext * dc)
case 0x3b: /* flush */
if (!((dc)-def-features CPU_FEATURE_FLUSH))
