RE: Sam CPU timing quick quezzie
At 22:26 14/08/01, Si Owen wrote: You'll certainly see the extra delays when writing to ports 248 and above, or when the ASIC is drawing the main screen area. I'm confident that the current SimCoupé is already accurate enough for you to be able to develop your Mode 4 IM2 routines on it and have it run the same on a real SAM. Thanks for this info. Surprisingly, I'm still using my *real SAM* to program on right now I generally took 78000 TStates per frame to be the norm for Mode 4 - this roughly equates to Aley's quote of 30-32% memory contention speed loss. -howard
RE: Sam CPU timing quick quezzie
Howard Price wrote: Thanks for this info. Surprisingly, I'm still using my *real SAM* to program on right now My real one is fairly inconvenient to use - I need access to the main TV, and I have to put it back in it's box so my wife doesn't complain about it being untidy! :-D I generally took 78000 TStates per frame to be the norm for Mode 4 - this roughly equates to Aley's quote of 30-32% memory contention speed loss. Some test cases to give best/worst cases: NOPs are fairly efficient because only the opcode fetch requires a RAM access, and the timing is a round 4 t-states. During the 6144 on-screen blocks there is an additional 4 t-state delay per instruction for the memory access, giving 8 t-states. You can do 23808 NOPs in a mode 3/4 frame, which would take 95232 t-states in theory. With 119808 t-states per frame, that gives 79.5% of full speed. OUT (254),A is less efficient, as there are opcode and operand fetches that may be contended, as well as an ASIC port access for yet more delay. You can do just 6528 of those per mode 3/4 frame, which would take a be 71808 t-states in theory (assuming an unrounded 11 t-states from the documented Z80 timings). That gives a running speed of just 60% of full speed! Real programs will tend to average between the two, and probably more towards the efficient side (not many instructions will access ASIC ports)... Si
RE: Sam CPU timing quick quezzie
Howard Price wrote: Do you know how many T-states you get a frame, then? There are always 384 t-states per line for the 312 screen lines = 119808 t-states. Pref. with memory contention in Mode 4 Just writing a timing program in IM2 Unfortunately it's not that simple to work out! :-/ The delays from contention depends on the instructions you're using, and where the ASIC is drawing at the time your code is running. You'll certainly see the extra delays when writing to ports 248 and above, or when the ASIC is drawing the main screen area. I'm confident that the current SimCoupé is already accurate enough for you to be able to develop your Mode 4 IM2 routines on it and have it run the same on a real SAM. In the last few days I've worked out the mode 1 contention delays, and Dave Laundon is nearly done with a unified implementation for all timings, which now gives correct ROM timings too. It already passes all the CPU Speed tests, and there's just a tiny bit more to do. So, the next public SimCoupé should have flawless timing for _anything_ you throw at it in any mode. :-) Si
RE: Sam CPU timing quick quezzie
At 11:59 10/08/01, you wrote: Real SAM: MODE 1: ROM=5.986, RAM=4.428 MODE 2: ROM=5.988, RAM=4.883 MODE 3 and 4 (video on): ROM=5.988, RAM=4.883 MODE 3 and 4 (video off): ROM=5.988, RAM=5.561 Si Do you know how many T-states you get a frame, then? Pref. with memory contention in Mode 4 Just writing a timing program in IM2 -h
