[U-Boot] [PATCH] Add code for spi half duplex operation for enc28j60
Add code for spi half duplex operation for enc28j60 The current code assumes full duplex spi operation. But there are processors like imx23 which only permit half duplex operation. This fix does half duplex operation based on the definition of CONFIG_SPI_HALF_DUPLEX Signed-off-by: Asok Subramanian asok at vyassoft.com --- drivers/net/enc28j60.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c index ec33764..753fe26 100644 --- a/drivers/net/enc28j60.c +++ b/drivers/net/enc28j60.c @@ -157,9 +157,17 @@ static u8 enc_r8(enc_dev_t *enc, const u16 reg) enc_set_bank(enc, reg); dout[0] = CMD_RCR(reg); +#ifndef CONFIG_SPI_HALF_DUPLEX spi_xfer(enc-slave, nbytes * 8, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); return din[nbytes-1]; +#else + spi_xfer(enc-slave, (nbytes -1) * 8, dout, NULL, + SPI_XFER_BEGIN ); + spi_xfer(enc-slave, 8, NULL, din, + SPI_XFER_END ); + return din[0]; +#endif } /* @@ -175,6 +183,7 @@ static u16 enc_r16(enc_dev_t *enc, const u16 reg) enc_set_bank(enc, reg); dout[0] = CMD_RCR(reg); +#ifndef CONFIG_SPI_HALF_DUPLEX spi_xfer(enc-slave, nbytes * 8, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); result = din[nbytes-1]; @@ -183,6 +192,20 @@ static u16 enc_r16(enc_dev_t *enc, const u16 reg) SPI_XFER_BEGIN | SPI_XFER_END); result |= din[nbytes-1] 8; return result; +#else + spi_xfer(enc-slave, (nbytes -1) * 8, dout, NULL, + SPI_XFER_BEGIN ); + spi_xfer(enc-slave, 8, NULL, din, + SPI_XFER_END ); + result = din[0]; + dout[0]++; /* next register */ + spi_xfer(enc-slave, (nbytes -1) * 8, dout, NULL, + SPI_XFER_BEGIN ); + spi_xfer(enc-slave, 8, NULL, din, + SPI_XFER_END ); + result |= din[0] 8; + return result; +#endif } /* -- 1.7.9.5___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/4] gpio: atmel: fix code to use pointer for pio port
This patch set fix code to use pointer for pio port as the warning message suggested, remove the warning message remove unused at91_pio structure definition add common gpio API add copyright and remove error header info runtime testing on at91sam9x5ek and sama5d3xek board compile testing for all atmel ek board Bo Shen (4): gpio: atmel: fix code to use pointer for pio port gpio: atmel: remove the at91_pio definition gpio: atmel: add gpio common API support gpio: atmel: add copyright and remove error header info arch/arm/include/asm/arch-at91/at91_pio.h | 15 -- drivers/gpio/at91_gpio.c | 277 ++--- 2 files changed, 178 insertions(+), 114 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] gpio: atmel: fix code to use pointer for pio port
fix code to use pointer for pio port as the warning message suggested
remove the warning message
Signed-off-by: Bo Shen voice.s...@atmel.com
---
drivers/gpio/at91_gpio.c | 232 ++
1 file changed, 134 insertions(+), 98 deletions(-)
diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
index 2322914..15f396f 100644
--- a/drivers/gpio/at91_gpio.c
+++ b/drivers/gpio/at91_gpio.c
@@ -8,16 +8,6 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-/*
- * WARNING:
- *
- * As the code is right now, it expects all PIO ports A,B,C,...
- * to be evenly spaced in the memory map:
- * ATMEL_BASE_PIOA + port * sizeof at91pio_t
- * This might not necessaryly be true in future Atmel SoCs.
- * This code should be fixed to use a pointer array to the ports.
- */
-
#include config.h
#include common.h
#include asm/io.h
@@ -25,19 +15,52 @@
#include asm/arch/hardware.h
#include asm/arch/at91_pio.h
+static unsigned at91_pio_get_port(unsigned port)
+{
+ unsigned at91_port;
+
+ switch (port) {
+ case AT91_PIO_PORTA:
+ at91_port = ATMEL_BASE_PIOA;
+ break;
+ case AT91_PIO_PORTB:
+ at91_port = ATMEL_BASE_PIOB;
+ break;
+ case AT91_PIO_PORTC:
+ at91_port = ATMEL_BASE_PIOC;
+ break;
+ #if (ATMEL_PIO_PORTS 3)
+ case AT91_PIO_PORTD:
+ at91_port = ATMEL_BASE_PIOD;
+ break;
+ #endif
+ #if (ATMEL_PIO_PORTS 4)
+ case AT91_PIO_PORTE:
+ at91_port = ATMEL_BASE_PIOE;
+ break;
+ #endif
+ default:
+ at91_port = 0;
+ break;
+ }
+
+ return at91_port;
+}
+
int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
{
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
- u32 mask;
+ at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port);
+ u32 mask;
if ((port ATMEL_PIO_PORTS) (pin 32)) {
mask = 1 pin;
if (use_pullup)
- writel(1 pin, pio-port[port].puer);
+ writel(1 pin, at91_port-puer);
else
- writel(1 pin, pio-port[port].pudr);
- writel(mask, pio-port[port].per);
+ writel(1 pin, at91_port-pudr);
+ writel(mask, at91_port-per);
}
+
return 0;
}
@@ -46,15 +69,16 @@ int at91_set_pio_pullup(unsigned port, unsigned pin, int
use_pullup)
*/
int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup)
{
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
- u32 mask;
+ at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port);
+ u32 mask;
if ((port ATMEL_PIO_PORTS) (pin 32)) {
mask = 1 pin;
- writel(mask, pio-port[port].idr);
+ writel(mask, at91_port-idr);
at91_set_pio_pullup(port, pin, use_pullup);
- writel(mask, pio-port[port].per);
+ writel(mask, at91_port-per);
}
+
return 0;
}
@@ -63,23 +87,24 @@ int at91_set_pio_periph(unsigned port, unsigned pin, int
use_pullup)
*/
int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup)
{
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
- u32 mask;
+ at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port);
+ u32 mask;
if ((port ATMEL_PIO_PORTS) (pin 32)) {
mask = 1 pin;
- writel(mask, pio-port[port].idr);
+ writel(mask, at91_port-idr);
at91_set_pio_pullup(port, pin, use_pullup);
#if defined(CPU_HAS_PIO3)
- writel(readl(pio-port[port].abcdsr1) ~mask,
- pio-port[port].abcdsr1);
- writel(readl(pio-port[port].abcdsr2) ~mask,
- pio-port[port].abcdsr2);
+ writel(readl(at91_port-abcdsr1) ~mask,
+ at91_port-abcdsr1);
+ writel(readl(at91_port-abcdsr2) ~mask,
+ at91_port-abcdsr2);
#else
- writel(mask, pio-port[port].asr);
+ writel(mask, at91_port-asr);
#endif
- writel(mask, pio-port[port].pdr);
+ writel(mask, at91_port-pdr);
}
+
return 0;
}
@@ -88,23 +113,24 @@ int at91_set_a_periph(unsigned port, unsigned pin, int
use_pullup)
*/
int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup)
{
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
- u32 mask;
+ at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port);
+ u32 mask;
if ((port ATMEL_PIO_PORTS) (pin 32)) {
mask = 1 pin;
- writel(mask, pio-port[port].idr);
+
[U-Boot] [PATCH 2/4] gpio: atmel: remove the at91_pio definition
the at91_pio definition is no longer needed, so remove it
Signed-off-by: Bo Shen voice.s...@atmel.com
---
arch/arm/include/asm/arch-at91/at91_pio.h | 15 ---
1 file changed, 15 deletions(-)
diff --git a/arch/arm/include/asm/arch-at91/at91_pio.h
b/arch/arm/include/asm/arch-at91/at91_pio.h
index 676f024..ba61542 100644
--- a/arch/arm/include/asm/arch-at91/at91_pio.h
+++ b/arch/arm/include/asm/arch-at91/at91_pio.h
@@ -109,21 +109,6 @@ typedef struct at91_port {
#endif
} at91_port_t;
-typedef union at91_pio {
- struct {
- at91_port_t pioa;
- at91_port_t piob;
- at91_port_t pioc;
- #if (ATMEL_PIO_PORTS 3)
- at91_port_t piod;
- #endif
- #if (ATMEL_PIO_PORTS 4)
- at91_port_t pioe;
- #endif
- } ;
- at91_port_t port[ATMEL_PIO_PORTS];
-} at91_pio_t;
-
#ifdef CONFIG_AT91_GPIO
int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup);
int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup);
--
1.7.9.5
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[U-Boot] [PATCH 3/4] gpio: atmel: add gpio common API support
add gpio common API support for gpio command
Signed-off-by: Bo Shen voice.s...@atmel.com
---
drivers/gpio/at91_gpio.c | 43 +++
1 file changed, 43 insertions(+)
diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
index 15f396f..3de0844 100644
--- a/drivers/gpio/at91_gpio.c
+++ b/drivers/gpio/at91_gpio.c
@@ -363,3 +363,46 @@ int at91_get_pio_value(unsigned port, unsigned pin)
return pdsr != 0;
}
+
+/* Common GPIO API */
+
+#define at91_gpio_to_port(gpio)(gpio / 32)
+#define at91_gpio_to_pin(gpio) (gpio % 32)
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ at91_set_pio_input(at91_gpio_to_port(gpio),
+ at91_gpio_to_pin(gpio), 0);
+ return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ at91_set_pio_output(at91_gpio_to_port(gpio),
+ at91_gpio_to_pin(gpio), value);
+ return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ return (int) at91_get_pio_value(at91_gpio_to_port(gpio),
+ at91_gpio_to_pin(gpio));
+}
+
+int gpio_set_value(unsigned gpio, int value)
+{
+ at91_set_pio_value(at91_gpio_to_port(gpio),
+ at91_gpio_to_pin(gpio), value);
+
+ return 0;
+}
--
1.7.9.5
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[U-Boot] [PATCH 4/4] gpio: atmel: add copyright and remove error header info
Signed-off-by: Bo Shen voice.s...@atmel.com --- drivers/gpio/at91_gpio.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c index 3de0844..72161dc 100644 --- a/drivers/gpio/at91_gpio.c +++ b/drivers/gpio/at91_gpio.c @@ -1,5 +1,5 @@ /* - * Memory Setup stuff - taken from blob memsetup.S + * Copyright (C) 2013 Bo Shen voice.s...@atmel.com * * Copyright (C) 2009 Jens Scharsig (js_at...@scharsoft.de) * -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arm: atmel: remove the config.mk file
remove the config.mk file move text base define to board config file for following boards - at91sam9m10g45ek - at91sam9x5ek Signed-off-by: Bo Shen voice.s...@atmel.com --- board/atmel/at91sam9m10g45ek/config.mk |1 - board/atmel/at91sam9x5ek/config.mk |1 - include/configs/at91sam9m10g45ek.h |2 ++ include/configs/at91sam9x5ek.h |2 ++ 4 files changed, 4 insertions(+), 2 deletions(-) delete mode 100644 board/atmel/at91sam9m10g45ek/config.mk delete mode 100644 board/atmel/at91sam9x5ek/config.mk diff --git a/board/atmel/at91sam9m10g45ek/config.mk b/board/atmel/at91sam9m10g45ek/config.mk deleted file mode 100644 index 9d3c5ae..000 --- a/board/atmel/at91sam9m10g45ek/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x73f0 diff --git a/board/atmel/at91sam9x5ek/config.mk b/board/atmel/at91sam9x5ek/config.mk deleted file mode 100644 index 6589a12..000 --- a/board/atmel/at91sam9x5ek/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x26f0 diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 2aea555..fc4ecec 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -13,6 +13,8 @@ #include asm/hardware.h +#define CONFIG_SYS_TEXT_BASE 0x73f0 + #define CONFIG_AT91_LEGACY #define CONFIG_ATMEL_LEGACY/* required until (g)pio is fixed */ diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 2b1533c..f844a91 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -11,6 +11,8 @@ #include asm/hardware.h +#define CONFIG_SYS_TEXT_BASE 0x26f0 + /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 1200/* 12 MHz crystal */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request - serial dcc
Hi Tom, please pull these two patches to your tree. I have sent them to mailing list as RFC and only Wolfgang's concern was if this breaks using dcc as console. We have done these patches because we couldn't use dcc as console. It means this patch fix the problem with dcc driver. In mainline u-boot only zynq has DCC enabled in configuration file. I can't see any dedicated serial custodian that's why I am sending this pull request directly to you. Thanks, Michal The following changes since commit d62a89bd5b5033649a90fa5bfe0f5b32013ca8f8: mpc5200: Misc updates to a3m071 config header (2013-08-12 21:11:24 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git dcc for you to fetch changes up to a168d3af5d9887019e62c4d4f842c79971079a0b: serial: arm_dcc: Register with serial core (2013-08-13 08:38:52 +0200) Jagannadha Sutradharudu Teki (2): serial: arm_dcc: Remove stdio structure support serial: arm_dcc: Register with serial core common/stdio.c | 3 --- drivers/serial/arm_dcc.c | 41 +++-- drivers/serial/serial.c | 2 ++ include/stdio_dev.h | 3 --- 4 files changed, 25 insertions(+), 24 deletions(-) -- Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-boot] CONFIG_LMB is required for supporting FIT?
Hi, experts: It seems if user wants to enable FIT support in U-boot, must define these 3 macro in related config.h /* Enable flat device tree support */ #define CONFIG_LMB 1 #define CONFIG_FIT 1 #define CONFIG_OF_LIBFDT 1 CONFIG_LMB is a required item for ARM SOC platform? Best wishes, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc: sdhci: use the SDHCI_QUIRK_USE_WIDE8 for samsung SoC
Dear Pantelis,
Welcome to take care of u-boot-mmc.
Could you merge this patch?
Best Regards,
Jaehoon Chung
On 07/19/2013 05:44 PM, Jaehoon Chung wrote:
Samsung SoC is supported the WIDE8, even if Controller version is v2.0.
So add the SDHCI_QUIRK_USE_WIDE8 for Samsung-SoC.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/mmc/s5p_sdhci.c |4 +++-
drivers/mmc/sdhci.c | 13 +++--
include/sdhci.h |3 +++
3 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index e50ff92..97e153e 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -84,7 +84,7 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
host-quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
- SDHCI_QUIRK_WAIT_SEND_CMD;
+ SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8;
host-voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
host-version = sdhci_readw(host, SDHCI_HOST_VERSION);
@@ -93,6 +93,8 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
host-index = index;
host-host_caps = MMC_MODE_HC;
+ if (bus_width == 8)
+ host-host_caps |= MMC_MODE_8BIT;
return add_sdhci(host, 5200, 40);
}
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index c5631bf..9bf3052 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -270,7 +270,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int
clock)
if (clock == 0)
return 0;
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300) {
+ if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300) {
/* Version 3.00 divisors must be a multiple of 2. */
if (mmc-f_max = clock)
div = 1;
@@ -363,10 +363,11 @@ void sdhci_set_ios(struct mmc *mmc)
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
if (mmc-bus_width == 8) {
ctrl = ~SDHCI_CTRL_4BITBUS;
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+ if ((SDHCI_GET_VERSION(host) = SDHCI_SPEC_300) ||
+ (host-quirks SDHCI_QUIRK_USE_WIDE8))
ctrl |= SDHCI_CTRL_8BITBUS;
} else {
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+ if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300)
ctrl = ~SDHCI_CTRL_8BITBUS;
if (mmc-bus_width == 4)
ctrl |= SDHCI_CTRL_4BITBUS;
@@ -453,7 +454,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
if (max_clk)
mmc-f_max = max_clk;
else {
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+ if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300)
mmc-f_max = (caps SDHCI_CLOCK_V3_BASE_MASK)
SDHCI_CLOCK_BASE_SHIFT;
else
@@ -468,7 +469,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
if (min_clk)
mmc-f_min = min_clk;
else {
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+ if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300)
mmc-f_min = mmc-f_max / SDHCI_MAX_DIV_SPEC_300;
else
mmc-f_min = mmc-f_max / SDHCI_MAX_DIV_SPEC_200;
@@ -486,7 +487,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
mmc-voltages |= host-voltages;
mmc-host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300) {
+ if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300) {
if (caps SDHCI_CAN_DO_8BIT)
mmc-host_caps |= MMC_MODE_8BIT;
}
diff --git a/include/sdhci.h b/include/sdhci.h
index cffbe53..f3f8219 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -208,6 +208,8 @@
#define SDHCI_SPEC_200 1
#define SDHCI_SPEC_300 2
+#define SDHCI_GET_VERSION(x) (x-version SDHCI_SPEC_VER_MASK)
+
/*
* End of controller registers.
*/
@@ -226,6 +228,7 @@
#define SDHCI_QUIRK_NO_CD(1 5)
#define SDHCI_QUIRK_WAIT_SEND_CMD(1 6)
#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1 7)
+#define SDHCI_QUIRK_USE_WIDE8(1 8)
/* to make gcc happy */
struct sdhci_host;
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Re: [U-Boot] [PATCH] mmc: sdhci: use the SDHCI_QUIRK_USE_WIDE8 for samsung SoC
Hi Jaehoon,
On Aug 13, 2013, at 11:52 AM, Jaehoon Chung wrote:
Dear Pantelis,
Welcome to take care of u-boot-mmc.
Thanks
Could you merge this patch?
Please hold on a bit; we're still in the process of passing over the (mmc)
torch.
That patch looks good.
Best Regards,
Jaehoon Chung
Regards
-- Pantelis
On 07/19/2013 05:44 PM, Jaehoon Chung wrote:
Samsung SoC is supported the WIDE8, even if Controller version is v2.0.
So add the SDHCI_QUIRK_USE_WIDE8 for Samsung-SoC.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/mmc/s5p_sdhci.c |4 +++-
drivers/mmc/sdhci.c | 13 +++--
include/sdhci.h |3 +++
3 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index e50ff92..97e153e 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -84,7 +84,7 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
host-quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
-SDHCI_QUIRK_WAIT_SEND_CMD;
+SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8;
host-voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
host-version = sdhci_readw(host, SDHCI_HOST_VERSION);
@@ -93,6 +93,8 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
host-index = index;
host-host_caps = MMC_MODE_HC;
+if (bus_width == 8)
+host-host_caps |= MMC_MODE_8BIT;
return add_sdhci(host, 5200, 40);
}
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index c5631bf..9bf3052 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -270,7 +270,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int
clock)
if (clock == 0)
return 0;
-if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300) {
+if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300) {
/* Version 3.00 divisors must be a multiple of 2. */
if (mmc-f_max = clock)
div = 1;
@@ -363,10 +363,11 @@ void sdhci_set_ios(struct mmc *mmc)
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
if (mmc-bus_width == 8) {
ctrl = ~SDHCI_CTRL_4BITBUS;
-if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+if ((SDHCI_GET_VERSION(host) = SDHCI_SPEC_300) ||
+(host-quirks SDHCI_QUIRK_USE_WIDE8))
ctrl |= SDHCI_CTRL_8BITBUS;
} else {
-if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300)
ctrl = ~SDHCI_CTRL_8BITBUS;
if (mmc-bus_width == 4)
ctrl |= SDHCI_CTRL_4BITBUS;
@@ -453,7 +454,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
if (max_clk)
mmc-f_max = max_clk;
else {
-if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300)
mmc-f_max = (caps SDHCI_CLOCK_V3_BASE_MASK)
SDHCI_CLOCK_BASE_SHIFT;
else
@@ -468,7 +469,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
if (min_clk)
mmc-f_min = min_clk;
else {
-if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300)
mmc-f_min = mmc-f_max / SDHCI_MAX_DIV_SPEC_300;
else
mmc-f_min = mmc-f_max / SDHCI_MAX_DIV_SPEC_200;
@@ -486,7 +487,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
mmc-voltages |= host-voltages;
mmc-host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
-if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300) {
+if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300) {
if (caps SDHCI_CAN_DO_8BIT)
mmc-host_caps |= MMC_MODE_8BIT;
}
diff --git a/include/sdhci.h b/include/sdhci.h
index cffbe53..f3f8219 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -208,6 +208,8 @@
#define SDHCI_SPEC_200 1
#define SDHCI_SPEC_300 2
+#define SDHCI_GET_VERSION(x) (x-version SDHCI_SPEC_VER_MASK)
+
/*
* End of controller registers.
*/
@@ -226,6 +228,7 @@
#define SDHCI_QUIRK_NO_CD(1 5)
#define SDHCI_QUIRK_WAIT_SEND_CMD(1 6)
#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1 7)
+#define SDHCI_QUIRK_USE_WIDE8 (1 8)
/* to make gcc happy */
struct sdhci_host;
___
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Re: [U-Boot] [U-boot] CONFIG_LMB is required for supporting FIT?
On Tue, Aug 13, 2013 at 2:17 PM, tiger...@viatech.com.cn wrote: Hi, experts: It seems if user wants to enable FIT support in U-boot, must define these 3 macro in related config.h /* Enable flat device tree support */ #define CONFIG_LMB 1 This is required, but when u define CONFIG_FIT, this will automatically defined i guess. Check it once. -- Thanks, Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/p1010rdb: fix calculating ddr_freq_mhz
There was a bug for calculating ddr_freq_mhz, it should be divided by 100 rather than 0x100. Signed-off-by: Shengzhou Liu shengzhou@freescale.com --- board/freescale/p1010rdb/spl_minimal.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/board/freescale/p1010rdb/spl_minimal.c b/board/freescale/p1010rdb/spl_minimal.c index 73289f3..d0e712e 100644 --- a/board/freescale/p1010rdb/spl_minimal.c +++ b/board/freescale/p1010rdb/spl_minimal.c @@ -26,7 +26,7 @@ void sdram_init(void) ddr_ratio = in_be32(gur-porpllsr) MPC85xx_PORPLLSR_DDR_RATIO; ddr_ratio = ddr_ratio MPC85xx_PORPLLSR_DDR_RATIO_SHIFT; - ddr_freq_mhz = (CONFIG_SYS_CLK_FREQ * ddr_ratio) / 0x100; + ddr_freq_mhz = (CONFIG_SYS_CLK_FREQ * ddr_ratio) / 100; /* mask off E bit */ u32 svr = SVR_SOC_VER(mfspr(SPRN_SVR)); -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/p1010rdb-pb: add support for p1010rdb-pb board
Add support for freescale P1010RDB-PB board.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
board/freescale/p1010rdb/law.c |2 -
board/freescale/p1010rdb/p1010rdb.c | 302 ---
board/freescale/p1010rdb/tlb.c |4 -
boards.cfg | 21 +++
include/configs/P1010RDB.h | 111 ++---
5 files changed, 383 insertions(+), 57 deletions(-)
diff --git a/board/freescale/p1010rdb/law.c b/board/freescale/p1010rdb/law.c
index 0045127..ed41a05 100644
--- a/board/freescale/p1010rdb/law.c
+++ b/board/freescale/p1010rdb/law.c
@@ -9,11 +9,9 @@
#include asm/mmu.h
struct law_entry law_table[] = {
-#ifndef CONFIG_SDCARD
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
-#endif
};
int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/board/freescale/p1010rdb/p1010rdb.c
b/board/freescale/p1010rdb/p1010rdb.c
index 06aa800..ef7502f 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -21,10 +21,8 @@
#include asm/fsl_serdes.h
#include asm/fsl_ifc.h
#include asm/fsl_pci.h
-
-#ifndef CONFIG_SDCARD
#include hwconfig.h
-#endif
+#include i2c.h
DECLARE_GLOBAL_DATA_PTR;
@@ -33,10 +31,30 @@ DECLARE_GLOBAL_DATA_PTR;
#define MUX_CPLD_TDM 0x01
#define MUX_CPLD_SPICS0_FLASH 0x00
#define MUX_CPLD_SPICS0_SLIC 0x02
+#define PMUXCR1_IFC_MASK 0x0000
+#define PMUXCR1_SDHC_MASK 0x00fff000
+#define PMUXCR1_SDHC_ENABLE 0x00555000
+
+enum {
+ MUX_TYPE_IFC,
+ MUX_TYPE_SDHC,
+ MUX_TYPE_SPIFLASH,
+ MUX_TYPE_TDM,
+ MUX_TYPE_CAN,
+ MUX_TYPE_CS0_NOR,
+ MUX_TYPE_CS0_NAND,
+};
+
+enum {
+ I2C_READ_BANK,
+ I2C_READ_PCB_VER,
+};
+
+uint pin_mux;
-#ifndef CONFIG_SDCARD
struct cpld_data {
u8 cpld_ver; /* cpld revision */
+#if defined(CONFIG_P1010RDB)
u8 pcba_ver; /* pcb revision number */
u8 twindie_ddr3;
u8 res1[6];
@@ -51,18 +69,16 @@ struct cpld_data {
u8 por1; /* POR Options */
u8 por2; /* POR Options */
u8 por3; /* POR Options */
+#elif defined(CONFIG_P1010RDB_PB)
+ u8 rom_loc;
+#endif
};
+#if defined(CONFIG_P1010RDB) defined(DEBUG)
void cpld_show(void)
{
struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
- printf(CPLD: V%x.%x PCBA: V%x.0\n,
- in_8(cpld_data-cpld_ver) 0xF0,
- in_8(cpld_data-cpld_ver) 0x0F,
- in_8(cpld_data-pcba_ver) 0x0F);
-
-#ifdef CONFIG_DEBUG
printf(twindie_ddr =%x\n,
in_8(cpld_data-twindie_ddr3));
printf(bank_sel =%x\n,
@@ -85,19 +101,16 @@ void cpld_show(void)
in_8(cpld_data-bcsr2));
printf(bcsr3 =%x\n,
in_8(cpld_data-bcsr3));
-#endif
}
#endif
int board_early_init_f(void)
{
ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
-#ifndef CONFIG_SDCARD
struct fsl_ifc *ifc = (void *)CONFIG_SYS_IFC_ADDR;
/* Clock configuration to access CPLD using IFC(GPCM) */
setbits_be32(ifc-ifc_gcr, 1 IFC_GCR_TBCTL_TRN_TIME_SHIFT);
-#endif
/*
* Reset PCIe slots via GPIO4
*/
@@ -109,7 +122,6 @@ int board_early_init_f(void)
int board_early_init_r(void)
{
-#ifndef CONFIG_SDCARD
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
@@ -133,7 +145,7 @@ int board_early_init_r(void)
CONFIG_SYS_FLASH_BASE_PHYS + 0x100,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel+1, BOOKE_PAGESZ_16M, 1);
-#endif
+
return 0;
}
@@ -144,13 +156,201 @@ void pci_init_board(void)
}
#endif /* ifdef CONFIG_PCI */
+int config_board_mux(int ctrl_type)
+{
+ ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ u8 tmp;
+
+#if defined(CONFIG_P1010RDB)
+ struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
+
+ switch (ctrl_type) {
+ case MUX_TYPE_IFC:
+ i2c_set_bus_num(I2C_PCA9557_BUS_NUM);
+ tmp = 0xf0;
+ i2c_write(I2C_PCA9557_ADDR1, 3, 1, tmp, 1);
+ tmp = 0x01;
+ i2c_write(I2C_PCA9557_ADDR1, 1, 1, tmp, 1);
+ pin_mux = MUX_TYPE_IFC;
+ clrbits_be32(gur-pmuxcr, PMUXCR1_IFC_MASK);
+ debug(pin mux is configured for IFC, SDHC disabled\n);
+ break;
+ case MUX_TYPE_SDHC:
+ i2c_set_bus_num(I2C_PCA9557_BUS_NUM);
+ tmp = 0xf0;
+ i2c_write(I2C_PCA9557_ADDR1, 3, 1, tmp, 1);
+ tmp = 0x05;
+ i2c_write(I2C_PCA9557_ADDR1, 1, 1, tmp, 1);
+
[U-Boot] [GIT PULL] u-boot-mips/master
Hi Tom, The following changes since commit d62a89bd5b5033649a90fa5bfe0f5b32013ca8f8: mpc5200: Misc updates to a3m071 config header (2013-08-12 21:11:24 +0200) are available in the git repository at: git://git.denx.de/u-boot-mips.git master for you to fetch changes up to 4b17645d5d60a9aa8ef0810d4fdf962bce407c8a: MIPS: bootm: drop obsolete Qemu specific bootm implementation (2013-08-13 11:58:48 +0200) Daniel Schwierzeck (8): MIPS: bootm: fix checkpatch.pl warnings MIPS: bootm: optimize kernel entry call MIPS: bootm: add support for LMB MIPS: bootm: refactor initialisation of kernel cmdline MIPS: bootm: refactor initialisation of kernel environment MIPS: bootm: add support for generic relocation of init ramdisks MIPS: bootm: add YAMON style Linux preparation/jump code for Qemu Malta MIPS: bootm: drop obsolete Qemu specific bootm implementation arch/mips/include/asm/config.h | 3 ++ arch/mips/lib/Makefile | 4 --- arch/mips/lib/bootm.c | 241 arch/mips/lib/bootm_qemu_mips.c | 62 -- 4 files changed, 160 insertions(+), 150 deletions(-) delete mode 100644 arch/mips/lib/bootm_qemu_mips.c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 1/2] NET: Add net_busy_flag if CONFIG_USB_KEYBOARD is defined
This flag is to make console aware that NET transfer is running or not. Signed-off-by: Jim Lin ji...@nvidia.com --- Changes in v2: 1. Change configuration name from CONFIG_CTRLC_POLL_MS to CONFIG_CTRLC_POLL_S. 2. New code will be executed only when CONFIG_CTRLC_POLL_S is defined in configuration header file. 3. Add description in README.console. Changes in v3: 1. Move changes to common/usb_kbd.c and doc/README.usb 2. Rename config setting to CONFIG_USBKB_TESTC_PERIOD. 3. Remove slow response on USB-keyboard input when TFTP boot is not running. Changes in v4: 1. Remove changes in doc/README.usb, common/usb_kbd.c and CONFIG_USBKB_TESTC_PERIOD 2. Modify net/net.c Changes in v5: 1. Change variable name to ctrlc_t_start. 2. Use two calls of get_timer(0) to get time gap. Changes in v6: 1. In common/usb_kbd.c, check net_busy_flag to determine whether we poll USB keyboard status. 2. In include/usb.h, add external variable declaration net_busy_flag Changes in v7: 1. Add CONFIG_USB_KEYBOARD Changes in v8: 1. net/net.c, add __maybe_unused for variable net_busy_flag. Changes in v9: None net/net.c | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/net/net.c b/net/net.c index df94789..65daaa0 100644 --- a/net/net.c +++ b/net/net.c @@ -207,6 +207,8 @@ static int net_check_prereq(enum proto_t protocol); static int NetTryCount; +int __maybe_unused net_busy_flag; + /**/ static int on_bootfile(const char *name, const char *value, enum env_op op, @@ -341,6 +343,9 @@ int NetLoop(enum proto_t protocol) eth_init_state_only(bd); restart: +#ifdef CONFIG_USB_KEYBOARD + net_busy_flag = 0; +#endif net_set_state(NETLOOP_CONTINUE); /* @@ -453,6 +458,9 @@ restart: status_led_set(STATUS_LED_RED, STATUS_LED_ON); #endif /* CONFIG_SYS_FAULT_ECHO_LINK_DOWN, ... */ #endif /* CONFIG_MII, ... */ +#ifdef CONFIG_USB_KEYBOARD + net_busy_flag = 1; +#endif /* * Main packet reception loop. Loop receiving packets until @@ -558,6 +566,9 @@ restart: } done: +#ifdef CONFIG_USB_KEYBOARD + net_busy_flag = 0; +#endif #ifdef CONFIG_CMD_TFTPPUT /* Clear out the handlers */ net_set_udp_handler(NULL); -- 1.7.7 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 2/2] console: usb: kbd: To improve TFTP booting performance
TFTP booting is slow when a USB keyboard is installed and
stdin has usbkbd added.
This fix is to change Ctrl-C polling for USB keyboard to every second
when NET transfer is running.
Signed-off-by: Jim Lin ji...@nvidia.com
---
Changes in v2:
1. Change configuration name from CONFIG_CTRLC_POLL_MS to CONFIG_CTRLC_POLL_S.
2. New code will be executed only when CONFIG_CTRLC_POLL_S is defined in
configuration header file.
3. Add description in README.console.
Changes in v3:
1. Move changes to common/usb_kbd.c and doc/README.usb
2. Rename config setting to CONFIG_USBKB_TESTC_PERIOD.
3. Remove slow response on USB-keyboard input when TFTP boot is not running.
Changes in v4:
1. Remove changes in doc/README.usb, common/usb_kbd.c and
CONFIG_USBKB_TESTC_PERIOD
2. Modify net/net.c
Changes in v5:
1. Change variable name to ctrlc_t_start.
2. Use two calls of get_timer(0) to get time gap.
Changes in v6:
1. In common/usb_kbd.c, check net_busy_flag to determine whether we poll
USB keyboard status.
2. In include/usb.h, add external variable declaration net_busy_flag
Changes in v7:
1. In common/usb_kbd.c and include/usb.h, add #ifdef CONFIG_CMD_NET.
2. In common/usb_kbd.c, modify code to get correct time gap.
Changes in v8:
1. Add __maybe_unused for variable kbd_testc_tms.
Changes in v9:
1. Move external variable declaration from include/usb.h to common/usb_kbd.c
common/usb_kbd.c | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 3174b5e..46100e6 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -121,6 +121,11 @@ struct usb_kbd_pdata {
uint8_t flags;
};
+extern int __maybe_unused net_busy_flag;
+
+/* The period of time between two calls of usb_kbd_testc(). */
+static unsigned long __maybe_unused kbd_testc_tms;
+
/* Generic keyboard event polling. */
void usb_kbd_generic_poll(void)
{
@@ -366,6 +371,16 @@ static int usb_kbd_testc(void)
struct usb_device *usb_kbd_dev;
struct usb_kbd_pdata *data;
+#ifdef CONFIG_CMD_NET
+ /*
+* If net_busy_flag is 1, NET transfer is running,
+* then we check key-pressed every second (first check may be
+* less than 1 second) to improve TFTP booting performance.
+*/
+ if (net_busy_flag (get_timer(kbd_testc_tms) CONFIG_SYS_HZ))
+ return 0;
+ kbd_testc_tms = get_timer(0);
+#endif
dev = stdio_get_by_name(DEVNAME);
usb_kbd_dev = (struct usb_device *)dev-priv;
data = usb_kbd_dev-privptr;
--
1.7.7
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Re: [U-Boot] [PATCH] mmc: sdhci: use the SDHCI_QUIRK_USE_WIDE8 for samsung SoC
On 08/13/2013 06:01 PM, Pantelis Antoniou wrote:
Hi Jaehoon,
On Aug 13, 2013, at 11:52 AM, Jaehoon Chung wrote:
Dear Pantelis,
Welcome to take care of u-boot-mmc.
Thanks
Could you merge this patch?
Please hold on a bit; we're still in the process of passing over the (mmc)
torch.
Sure..Thank you.:)
Best Regards,
Jaehoon Chung
That patch looks good.
Best Regards,
Jaehoon Chung
Regards
-- Pantelis
On 07/19/2013 05:44 PM, Jaehoon Chung wrote:
Samsung SoC is supported the WIDE8, even if Controller version is v2.0.
So add the SDHCI_QUIRK_USE_WIDE8 for Samsung-SoC.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/mmc/s5p_sdhci.c |4 +++-
drivers/mmc/sdhci.c | 13 +++--
include/sdhci.h |3 +++
3 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index e50ff92..97e153e 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -84,7 +84,7 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
host-quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
- SDHCI_QUIRK_WAIT_SEND_CMD;
+ SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8;
host-voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
host-version = sdhci_readw(host, SDHCI_HOST_VERSION);
@@ -93,6 +93,8 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
host-index = index;
host-host_caps = MMC_MODE_HC;
+ if (bus_width == 8)
+ host-host_caps |= MMC_MODE_8BIT;
return add_sdhci(host, 5200, 40);
}
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index c5631bf..9bf3052 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -270,7 +270,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned
int clock)
if (clock == 0)
return 0;
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300) {
+ if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300) {
/* Version 3.00 divisors must be a multiple of 2. */
if (mmc-f_max = clock)
div = 1;
@@ -363,10 +363,11 @@ void sdhci_set_ios(struct mmc *mmc)
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
if (mmc-bus_width == 8) {
ctrl = ~SDHCI_CTRL_4BITBUS;
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+ if ((SDHCI_GET_VERSION(host) = SDHCI_SPEC_300) ||
+ (host-quirks SDHCI_QUIRK_USE_WIDE8))
ctrl |= SDHCI_CTRL_8BITBUS;
} else {
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+ if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300)
ctrl = ~SDHCI_CTRL_8BITBUS;
if (mmc-bus_width == 4)
ctrl |= SDHCI_CTRL_4BITBUS;
@@ -453,7 +454,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
if (max_clk)
mmc-f_max = max_clk;
else {
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+ if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300)
mmc-f_max = (caps SDHCI_CLOCK_V3_BASE_MASK)
SDHCI_CLOCK_BASE_SHIFT;
else
@@ -468,7 +469,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
if (min_clk)
mmc-f_min = min_clk;
else {
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300)
+ if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300)
mmc-f_min = mmc-f_max / SDHCI_MAX_DIV_SPEC_300;
else
mmc-f_min = mmc-f_max / SDHCI_MAX_DIV_SPEC_200;
@@ -486,7 +487,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
mmc-voltages |= host-voltages;
mmc-host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
- if ((host-version SDHCI_SPEC_VER_MASK) = SDHCI_SPEC_300) {
+ if (SDHCI_GET_VERSION(host) = SDHCI_SPEC_300) {
if (caps SDHCI_CAN_DO_8BIT)
mmc-host_caps |= MMC_MODE_8BIT;
}
diff --git a/include/sdhci.h b/include/sdhci.h
index cffbe53..f3f8219 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -208,6 +208,8 @@
#define SDHCI_SPEC_2001
#define SDHCI_SPEC_3002
+#define SDHCI_GET_VERSION(x) (x-version SDHCI_SPEC_VER_MASK)
+
/*
* End of controller registers.
*/
@@ -226,6 +228,7 @@
#define SDHCI_QUIRK_NO_CD (1 5)
#define SDHCI_QUIRK_WAIT_SEND_CMD (1 6)
#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1 7)
+#define SDHCI_QUIRK_USE_WIDE8 (1 8)
/* to make gcc happy */
struct sdhci_host;
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Re: [U-Boot] Unified u-boot feature set for simpler distro support
Hi Stephen, Could you expand upon what handles booting from extX directly means? Upstream U-Boot has supported ext2/3 for as long as I've been involved with it (which admittedly isn't that long), and ext4 support was added recently. This allows U-Boot commands extload or load to access ext* just like any other file-system. Is there something more involved when you say booting from extX directly beyond just the extload/load commands? Sorry, I meant loading the SPL, which in some of the boot scripts are loaded from FAT still. I think it's reasonable to require that boards supported by generic distros have upgraded/recent U-Boots that export a standard set of environment variables that define the various addresses, so that boot.scr authors don't have to care about platform differences, but rather simply use those variables. For example, kernel_addr_r, ramdisk_addr_r, fdt_addr_r, etc. Sure, no problems with that. Greetings, Dirk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers:power:max77693: add support for new multi function pmic max77693
Dear Minkyu Kang, On 05/21/2013 03:00 PM, Piotr Wilczek wrote: This patch add support for new multi function pmic max77693. The driver is split into three modules: pmic, muic and fuelgage. Signed-off-by: Piotr Wilczek p.wilc...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com CC: Minkyu Kang mk7.k...@samsung.com --- Makefile |1 + drivers/power/mfd/Makefile| 49 + drivers/power/mfd/fg_max77693.c | 143 + drivers/power/mfd/muic_max77693.c | 91 +++ drivers/power/mfd/pmic_max77693.c | 110 include/power/max77693_fg.h | 65 + include/power/max77693_muic.h | 90 +++ include/power/max77693_pmic.h | 56 +++ 8 files changed, 605 insertions(+) create mode 100644 drivers/power/mfd/Makefile create mode 100644 drivers/power/mfd/fg_max77693.c create mode 100644 drivers/power/mfd/muic_max77693.c create mode 100644 drivers/power/mfd/pmic_max77693.c create mode 100644 include/power/max77693_fg.h create mode 100644 include/power/max77693_muic.h create mode 100644 include/power/max77693_pmic.h I think that this patch should be resend with the new license index. Do you have any other comments? Best regards, Piotr Wilczek -- Samsung RD Institute Poland (SRPOL) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-video/master
On Mon, Aug 12, 2013 at 11:42:50PM +0200, Anatolij Gustschin wrote:
Hey Tom,
The following changes since commit a78dac79ede7fbb4c9e816abc879655540c3f076:
nds32: fix the missing COBJS-y change (2013-08-09 01:51:24 +0800)
are available in the git repository at:
git://git.denx.de/u-boot-video.git master
for you to fetch changes up to 1dc793dd2b8fb97dddf437547d86bd5bcfdb8b29:
edid: rename struct member to fix two EDID_* macros (2013-08-12 23:32:20
+0200)
Christian Gmeiner (1):
edid: rename struct member to fix two EDID_* macros
Donghwa Lee (1):
exynos: video: change mipi dsi write function parameters correctly
Heiko Schocher (6):
video, da8xx: move da8xx-fb.h to drivers/video
arm, am33xx: add clk_get prototype
video, da8xx-fb: changes for am335x usage
video, da8xx-fb: show fb addr in bdinfo
tools, bmp_logo: fix index from uint16_t to int to allow bigger logos
video: add an option to skip cfb console init
Hyungwon Hwang (1):
video: add L5F31188 TFT-LCD panel driver
Marek Vasut (7):
dma: apbh: Add special circular mode for LCD
video: Allocate the MXSFB framebuffer aligned
video: Add System-Mode configuration hook into mxsfb
video: Implement continuous screen refresh for SmartLCD into mxsfb
video: Fix cfb_console for 4-bit wide font
video: Encapsulate font in video_font_data.h
video: Add small 4x6 font from Linux
arch/arm/include/asm/arch-am33xx/hardware.h|1 +
arch/arm/include/asm/arch-exynos/mipi_dsim.h |2 +-
arch/arm/include/asm/imx-common/dma.h |2 +
arch/powerpc/cpu/mpc8xx/video.c|1 -
board/davinci/ea20/ea20.c | 28 +-
common/lcd.c |1 -
drivers/dma/apbh_dma.c | 22 +
drivers/video/Makefile |1 +
drivers/video/cfb_console.c| 37 +-
drivers/video/da8xx-fb.c | 338 ++-
.../asm/arch-davinci = drivers/video}/da8xx-fb.h |7 +-
drivers/video/exynos_mipi_dsi_common.c | 62 +-
drivers/video/exynos_mipi_dsi_common.h |2 +-
drivers/video/exynos_mipi_dsi_lowlevel.c |2 +-
drivers/video/exynos_mipi_dsi_lowlevel.h |2 +-
drivers/video/l5f31188.c | 192 ++
drivers/video/mxsfb.c | 45 +-
drivers/video/s6e8ax0.c| 59 +-
drivers/video/sed156x.c|1 -
include/edid.h |2 +-
include/video_font.h |9 +-
include/video_font_4x6.h | 2154
include/video_font_data.h |7 +-
tools/bmp_logo.c |2 +-
24 files changed, 2843 insertions(+), 136 deletions(-)
rename {arch/arm/include/asm/arch-davinci = drivers/video}/da8xx-fb.h (94%)
create mode 100644 drivers/video/l5f31188.c
create mode 100644 include/video_font_4x6.h
Please pull. Thanks!
Applied to u-boot/master, thanks!
--
Tom
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Re: [U-Boot] [GIT PULL] u-boot-mips/master
On Tue, Aug 13, 2013 at 12:42:36PM +0200, Daniel Schwierzeck wrote: Hi Tom, The following changes since commit d62a89bd5b5033649a90fa5bfe0f5b32013ca8f8: mpc5200: Misc updates to a3m071 config header (2013-08-12 21:11:24 +0200) are available in the git repository at: git://git.denx.de/u-boot-mips.git master for you to fetch changes up to 4b17645d5d60a9aa8ef0810d4fdf962bce407c8a: MIPS: bootm: drop obsolete Qemu specific bootm implementation (2013-08-13 11:58:48 +0200) Daniel Schwierzeck (8): MIPS: bootm: fix checkpatch.pl warnings MIPS: bootm: optimize kernel entry call MIPS: bootm: add support for LMB MIPS: bootm: refactor initialisation of kernel cmdline MIPS: bootm: refactor initialisation of kernel environment MIPS: bootm: add support for generic relocation of init ramdisks MIPS: bootm: add YAMON style Linux preparation/jump code for Qemu Malta MIPS: bootm: drop obsolete Qemu specific bootm implementation arch/mips/include/asm/config.h | 3 ++ arch/mips/lib/Makefile | 4 --- arch/mips/lib/bootm.c | 241 arch/mips/lib/bootm_qemu_mips.c | 62 -- 4 files changed, 160 insertions(+), 150 deletions(-) delete mode 100644 arch/mips/lib/bootm_qemu_mips.c Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] OMAP3: igep00x0: allow DeviceTree booting
On Wed, Aug 7, 2013 at 5:53 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
Now that Device Tree support for IGEP boards has been included
in the mainline Linux kernel, it's better if the default boot
command has proper support for booting with DT.
This patch-set his composed of the following patches:
Enric Balletbo i Serra (1):
ARM: igep00x0.h: Enable the use of CMD_EXT4, CMD_FS_GENERIC and zImage.
Javier Martinez Canillas (1):
OMAP3: igep00x0: allow booting with a FDT from MMC
The first patch adds some improvements to igep00x0.h to support
loading kernel images from ext{2,3,4} partitions besides FAT and
using by default a zImage instead of a uImage now that multiplatform
support has been added to OMAP.
The second patch adds support to boot using a FDT if is present
in the /boot dir of the rootfs partition and fallback to legacy
boot if is not present so users that have not migrated to DT can
still use the default boot command.
Hi Tom,
Any comments on this patch-set?
Thanks a lot and best regards,
Javier
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Re: [U-Boot] [PATCH] i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework
Hi Heiko, Original Message Subject: [PATCH] i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework Date: Sat, 3 Aug 2013 06:58:25 +0200 From: Heiko Schocher h...@denx.de To: u-boot@lists.denx.de CC: Heiko Schocher h...@denx.de, Tom Rini tr...@ti.com, Lars Poeschel poesc...@lemonage.de, Steve Sakoman sako...@gmail.com, Thomas Weber we...@corscience.de, Tom Rix tom@windriver.com, Grazvydas Ignotas nota...@gmail.com, Enric Balletbo i Serra eballe...@iseebcn.com, Luca Ceresoli luca.ceres...@comelit.it, Igor Grinberg grinb...@compulab.co.il, Ilya Yanok ya...@emcraft.com, Stefano Babic sba...@denx.de, Nishanth Menon n...@ti.com, Pali Rohár pali.ro...@gmail.com, Peter Barada peter.bar...@logicpd.com, Nagendra T S nagen...@mistralsolutions.com, Michael Jones michael.jo...@matrix-vision.de, Raphael Assenat r...@8d.com - add omap24xx driver to new multibus/multiadpater support - adapted all config files, which uses this driver Tested on the am335x based siemens boards rut, dxr2 and pxm2 posted here: http://patchwork.ozlabs.org/patch/263211/ Based on u-boot-ti git://git.denx.de/u-boot-ti.git master: commit bb2a5d8f87fffb4fadfb205837decbd1b3e75f88 Author: Dan Murphy dmur...@ti.com Date: Thu Jul 11 13:10:28 2013 -0500 gpio: omap5-uevm: Configure the tca6424 gpio expander The patch doesn't apply on current u-boot-ti master. Please rebase. -- Regards, Nikita. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Unified u-boot feature set for simpler distro support
On Sat, Aug 03, 2013 at 02:11:04AM -0500, Dennis Gilmore wrote: Hi all, I wanted to start a discussion on defining a unified feature set that makes it simpler for the different distros to support ARM systems using u-boot. I have based a lot of my thoughts on how calxeda ship their systems configured as it works fairly well, recently i sent in a patch implementing most of what I would like to see for the wandboard[1] So, lets try and bring this back around. It seems like the general concensous was on Yes for an opt-in and documented set of requirements. Can you please patch one of the boards you have with the set of required variable names and commands (and spelled out, rather than relying on config_cmd_default.h) ? I imagine we still need to chat a bit more about if a boot script should come from the distro or be built-in, but I also believe that if you write it into your patch as a U-Boot built-in, that'll further the discussion along nicely :) Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools: fix FIT image with ramdisk
On Sat, Jul 20, 2013 at 07:36:12PM -0400, Tom Rini wrote: On Sat, Jul 20, 2013 at 05:29:19PM -0600, Simon Glass wrote: +Stephen Hi Tom, On Sat, Jul 20, 2013 at 4:38 PM, Tom Rini tr...@ti.com wrote: On Sat, Jul 20, 2013 at 04:06:27PM -0600, Simon Glass wrote: Hi, On Sat, Jul 13, 2013 at 8:55 PM, Tom Rini tr...@ti.com wrote: [snip] No, because what we have today is insufficient for the kernel, you still have to specify the load/entry point, in FIT at least, even on NOLOAD. I'd have sworn at least, I couldn't find a way to get around this problem before... NOLOAD does work provided that the kernel in the FIT is a zImage. Personally I think that is an odd thing to do, since U-Boot is perfectly capable of decompressing a kernel, and the decompression shim requires ugly hacks for caches and low-level serial access. I haven't seen a .its with a NOLOAD kernel that doesn't specify a load/entry property for it. If you've got one, and it works on a Beaglebone (which doesn't have DDR starting at 0x0 ...), I'd love to see the .its :) We use one with load/exec addresses of 0 (on a platform with no RAM there). With NOLOAD the address seems to be ignored anyway. OK, I shall play around again now that I've got a I swear working FIT image. Following up to myself, yes, a load/exec address of 0 (which I found to be counter-intuitave) means that kernel and ramdisk are both used in-place and not relocated. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/8] am335x: NOR support
On 30/07/13 14:28, Tom Rini wrote:
On Thu, Jul 18, 2013 at 03:12:57PM -0400, Tom Rini wrote:
Hey all,
This series adds NOR support to am335x_evm, along with a few generic
changes to make gpmc clearer (for per-board things like different NOR
chips, etc). This series depends on the last go-round of the am335x
falcon mode docs as that adds the README that I add more content to.
And while I say this in 3/8, to be clear, I expect to drop 3/8 in favor
of Justin Waters' way of doing this instead, I just include this here for
completeness and will get it all happy together when I assemble things
in u-boot-ti.
The big changes in v4 are:
- Apply again to master which includes a few non-trivial updates, so the
linker script got re-synced.
- After checking what's going on, and testing with NAND again, we can be
common with gpmc_cfg-irqstatus/enable, and only set documented bits
in gpmc_cfg-config
Applied to u-boot-ti/master, thanks!
I'm now rebasing our NanoBone code onto the TI uboot code, but
I'm coming up with the original issue [1] of having to not check for
the R_ARM_RELATIVE relocations again.
If I patch config.mk again, the code all compiles.
I've tested make am335x_evm_norboot and that works.
I've attached my custom patchset ... can you tell me what I'm doing wrong ?
[1] http://lists.denx.de/pipermail/u-boot/2013-July/158592.html
Cheers
Mark J.
---
board/newflow/nanobone/Makefile | 38 +
board/newflow/nanobone/board.c| 295 +++
board/newflow/nanobone/mux.c | 195 +++
board/newflow/nanobone/u-boot.lds | 110 +
boards.cfg|2 +
include/configs/nanobone.h| 308 +
6 files changed, 948 insertions(+)
create mode 100644 board/newflow/nanobone/Makefile
create mode 100644 board/newflow/nanobone/board.c
create mode 100644 board/newflow/nanobone/mux.c
create mode 100644 board/newflow/nanobone/u-boot.lds
create mode 100644 include/configs/nanobone.h
diff --git a/board/newflow/nanobone/Makefile b/board/newflow/nanobone/Makefile
new file mode 100644
index 000..3dbeeda
--- /dev/null
+++ b/board/newflow/nanobone/Makefile
@@ -0,0 +1,38 @@
+#
+# Makefile
+#
+# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y)
+COBJS := mux.o
+endif
+
+COBJS += board.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/newflow/nanobone/board.c b/board/newflow/nanobone/board.c
new file mode 100644
index 000..6ccda1b
--- /dev/null
+++ b/board/newflow/nanobone/board.c
@@ -0,0 +1,295 @@
+/*
+ * board.c
+ *
+ * Board functions for Newflow NanoBone board
+ *
+ * Copyright (C) 2013, Newflow Ltd - http://www.newflow.co.uk/
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include errno.h
+#include spl.h
+#include asm/arch/cpu.h
+#include asm/arch/hardware.h
+#include asm/arch/omap.h
+#include asm/arch/ddr_defs.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc_host_def.h
+#include asm/arch/sys_proto.h
+#include asm/arch/mem.h
+#include asm/io.h
+#include asm/emif.h
+#include asm/gpio.h
+#include i2c.h
+#include miiphy.h
+#include cpsw.h
+#include board.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* NOR Flash config */
+#define NOR_CS 0
+#define NOR_BASE 0x0800
+#define NOR_SIZE GPMC_SIZE_128M
+static u32 gpmc_nor_config[GPMC_MAX_REG] = {
+ 0x1200,
+ 0x00101000,
+ 0x00030301,
+ 0x10041004,
+ 0x010f1010,
+ 0x08070280,
+ 0
+};
+
+/* FRAM config */
+#define FRAM_CS1
+#define FRAM_BASE 0x1c00
+#define FRAM_SIZE GPMC_SIZE_16M
+static u32 gpmc_fram_config[GPMC_MAX_REG] = {
+ 0x1200,
+ 0x00101000,
+ 0x00020201,
+ 0x0f030f03,
+ 0x010d1010,
+ 0x000301c0,
+ 0
+};
+
+static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
+#if defined(CONFIG_SPL_BUILD) || (CONFIG_NOR_BOOT)
+//static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
+#endif
+
+/* MII mode defines */
+#define PORT1_MII_MODE_ENABLE 0x0
+#define PORT2_MII_MODE_ENABLE 0x0
+
+static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
+#if defined(CONFIG_SPL_BUILD) ||
Re: [U-Boot] [PATCH v4 0/8] am335x: NOR support
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 08/13/2013 10:57 AM, Mark Jackson wrote: On 30/07/13 14:28, Tom Rini wrote: On Thu, Jul 18, 2013 at 03:12:57PM -0400, Tom Rini wrote: Hey all, This series adds NOR support to am335x_evm, along with a few generic changes to make gpmc clearer (for per-board things like different NOR chips, etc). This series depends on the last go-round of the am335x falcon mode docs as that adds the README that I add more content to. And while I say this in 3/8, to be clear, I expect to drop 3/8 in favor of Justin Waters' way of doing this instead, I just include this here for completeness and will get it all happy together when I assemble things in u-boot-ti. The big changes in v4 are: - Apply again to master which includes a few non-trivial updates, so the linker script got re-synced. - After checking what's going on, and testing with NAND again, we can be common with gpmc_cfg-irqstatus/enable, and only set documented bits in gpmc_cfg-config Applied to u-boot-ti/master, thanks! I'm now rebasing our NanoBone code onto the TI uboot code, but I'm coming up with the original issue [1] of having to not check for the R_ARM_RELATIVE relocations again. Your linker script is out of sync with arch/arm/cpu/u-boot.lds - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJSCkoKAAoJENk4IS6UOR1WS5IP/0is6vnCBc3NtLRkOxCbIwjK oFsx7qzJ/xg+D+56ygI14JVH7zikGk2b70bh05wLog96D/oIk8lFgLj3h3YJSG99 cGlAB3ZxI7VupgILfN0lnJ0Ht6NNqou6p3qfC2lJl6/kl40mVXsPBV93X8b/N2vx eDvP6bE8cjhvtQLlOb6HnDcp5OAkbXqiexM3vfwsVALisCksK67DpFgnrm37w9T6 LVAIMRBAOmf6UHDAEbK0I2FjUb/zG/bO3dsTVl+04H5jeOeVerscQPPYtSLY2vua KaJDOXutw2CnUX4xNh3OWj/bSFz39qt5GnGJ8roNfwClbTjEtt0/7zGuGSPh7qXd CCIGHktpYtvAj2HmQ7U4aSqnF4o/gZDJlZZmNArrvDVn2/5XmdxrUO9tSdiRYMBR ljPLK+VBD7vz96mbfx3QWbL0dBnjzg0jxaOpvEX/N7SomZnb7seu9lTetaDVRJhD xj96lSaZ2BL7SGAW/1h1mt93Bh/emQDhpLI1wNIr0UCRWmdx34enQnBN51A8Al0j E132z4n1zQfj7fAG9nLdAVuuBJsDX5iyHFz3NUuxvREls+yLK5bweXUOwfhUirMd eJqlPaKiAuuoUwsPJHWCr/PS0+pU0AdxZ9dP9s9sGU1Lr+lJNUkqP0KVnb4aZqtA nmrkfKCX6p+R1C/RluK0 =LnpG -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/8] am335x: NOR support
On 13/08/13 16:00, Tom Rini wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 08/13/2013 10:57 AM, Mark Jackson wrote: On 30/07/13 14:28, Tom Rini wrote: On Thu, Jul 18, 2013 at 03:12:57PM -0400, Tom Rini wrote: Hey all, This series adds NOR support to am335x_evm, along with a few generic changes to make gpmc clearer (for per-board things like different NOR chips, etc). This series depends on the last go-round of the am335x falcon mode docs as that adds the README that I add more content to. And while I say this in 3/8, to be clear, I expect to drop 3/8 in favor of Justin Waters' way of doing this instead, I just include this here for completeness and will get it all happy together when I assemble things in u-boot-ti. The big changes in v4 are: - Apply again to master which includes a few non-trivial updates, so the linker script got re-synced. - After checking what's going on, and testing with NAND again, we can be common with gpmc_cfg-irqstatus/enable, and only set documented bits in gpmc_cfg-config Applied to u-boot-ti/master, thanks! I'm now rebasing our NanoBone code onto the TI uboot code, but I'm coming up with the original issue [1] of having to not check for the R_ARM_RELATIVE relocations again. Your linker script is out of sync with arch/arm/cpu/u-boot.lds Strange ... since the am335x nor_boot compile appeared to work fine, I just copied the script from board/ti/am335x, and assumed it would work fine for me (with a library path change). So does this TI file also need updating ? Either way, my code now compiles. Cheers. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] OMAP3: igep00x0: allow DeviceTree booting
On Tue, Aug 13, 2013 at 03:28:25PM +0200, Javier Martinez Canillas wrote:
On Wed, Aug 7, 2013 at 5:53 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
Now that Device Tree support for IGEP boards has been included
in the mainline Linux kernel, it's better if the default boot
command has proper support for booting with DT.
This patch-set his composed of the following patches:
Enric Balletbo i Serra (1):
ARM: igep00x0.h: Enable the use of CMD_EXT4, CMD_FS_GENERIC and
zImage.
Javier Martinez Canillas (1):
OMAP3: igep00x0: allow booting with a FDT from MMC
The first patch adds some improvements to igep00x0.h to support
loading kernel images from ext{2,3,4} partitions besides FAT and
using by default a zImage instead of a uImage now that multiplatform
support has been added to OMAP.
The second patch adds support to boot using a FDT if is present
in the /boot dir of the rootfs partition and fallback to legacy
boot if is not present so users that have not migrated to DT can
still use the default boot command.
Hi Tom,
Any comments on this patch-set?
Looks good, preparing another u-boot-ti pull request for soon now.
--
Tom
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Re: [U-Boot] [PATCH v4 0/8] am335x: NOR support
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 08/13/2013 11:06 AM, Mark Jackson wrote: On 13/08/13 16:00, Tom Rini wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 08/13/2013 10:57 AM, Mark Jackson wrote: On 30/07/13 14:28, Tom Rini wrote: On Thu, Jul 18, 2013 at 03:12:57PM -0400, Tom Rini wrote: Hey all, This series adds NOR support to am335x_evm, along with a few generic changes to make gpmc clearer (for per-board things like different NOR chips, etc). This series depends on the last go-round of the am335x falcon mode docs as that adds the README that I add more content to. And while I say this in 3/8, to be clear, I expect to drop 3/8 in favor of Justin Waters' way of doing this instead, I just include this here for completeness and will get it all happy together when I assemble things in u-boot-ti. The big changes in v4 are: - Apply again to master which includes a few non-trivial updates, so the linker script got re-synced. - After checking what's going on, and testing with NAND again, we can be common with gpmc_cfg-irqstatus/enable, and only set documented bits in gpmc_cfg-config Applied to u-boot-ti/master, thanks! I'm now rebasing our NanoBone code onto the TI uboot code, but I'm coming up with the original issue [1] of having to not check for the R_ARM_RELATIVE relocations again. Your linker script is out of sync with arch/arm/cpu/u-boot.lds Strange ... since the am335x nor_boot compile appeared to work fine, I just copied the script from board/ti/am335x, and assumed it would work fine for me (with a library path change). So does this TI file also need updating ? Either way, my code now compiles. I had to re-sync the TI one in this series as well. Double check between what you have working now vs before, there's a few small changes there... - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJSCkyQAAoJENk4IS6UOR1WmrUP+wXcDGmf/sWOqB99kvxrMrYz 25rbCBYj1I65ataC9gIqXmPnKOeXLwjWOOIK5Z8fYol6Xzf7gz9E4EiuRQPxs3SO NfgEPueEBZVl52/BjzgicO7X6HPlbizuL7sp+yQbMmfsEAklnVmyGR2vOoG2A8CN 07rHmhej9QwYpVyYpAOfU/u3ZGn55PI9GxJiqVXMTRqb/WSEyv7ie0dRivSSHW4y g3WSemNBNYpvHYbYPDjJ68cDSBXiNlXX6uftQdlXD2wxhP5jP3MXUOcvhlFxXbvZ YFBjN7xAI0XeoK3OQk65z+oq/0JGq8FNk5wIKSWKjP06y4ncp1Xb5adGfoiVJ2HI FGqXRLRjHrQoON8f+90EV+a2YXiQ14/G387tJXSLWVSOzdRuaWbPMyzrOw6CT8qS BhOAsxhLCYyu+So+z9+tO1ZB+Wt8XWI1PS3DsRhw7mx9pGUjtLCjN6Ys10r71DyW 5M6rBaDu5eG3Th6X7ifoUwVJUEygh9YUHnWzAEcMtd1aYcFHsngwM7K3vtaAYv/Y PUlbay0Ars8B2JC2rJPKh5PS+BHpEsItHehdkmptKJCwC2NqR987Mv+IT19PFxJz 6Uf8Jc3tQCmfA5DG0HDVBsWon69EbRTTykpgUqCeKPohp2Ms65nKFnYSV/iDCU7U fuVnxnKZSkkuAtX1CkEl =hthS -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/8] am335x: NOR support
On 13/08/13 16:11, Tom Rini wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 08/13/2013 11:06 AM, Mark Jackson wrote: On 13/08/13 16:00, Tom Rini wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 08/13/2013 10:57 AM, Mark Jackson wrote: On 30/07/13 14:28, Tom Rini wrote: On Thu, Jul 18, 2013 at 03:12:57PM -0400, Tom Rini wrote: Hey all, This series adds NOR support to am335x_evm, along with a few generic changes to make gpmc clearer (for per-board things like different NOR chips, etc). This series depends on the last go-round of the am335x falcon mode docs as that adds the README that I add more content to. And while I say this in 3/8, to be clear, I expect to drop 3/8 in favor of Justin Waters' way of doing this instead, I just include this here for completeness and will get it all happy together when I assemble things in u-boot-ti. The big changes in v4 are: - Apply again to master which includes a few non-trivial updates, so the linker script got re-synced. - After checking what's going on, and testing with NAND again, we can be common with gpmc_cfg-irqstatus/enable, and only set documented bits in gpmc_cfg-config Applied to u-boot-ti/master, thanks! I'm now rebasing our NanoBone code onto the TI uboot code, but I'm coming up with the original issue [1] of having to not check for the R_ARM_RELATIVE relocations again. Your linker script is out of sync with arch/arm/cpu/u-boot.lds Strange ... since the am335x nor_boot compile appeared to work fine, I just copied the script from board/ti/am335x, and assumed it would work fine for me (with a library path change). So does this TI file also need updating ? Either way, my code now compiles. I had to re-sync the TI one in this series as well. Double check between what you have working now vs before, there's a few small changes there... Doh ... I was copying the script from the non-TI branch of uboot !! :-( ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] part1 of arm64. This patch provide u-boot with arm64 support. Currently it works on Foundation Model for armv8 or Fast Model for armv8.
On 08/11/2013 09:05 AM, feng...@phytium.com.cn wrote: From: fenghua fenghua@ligen-virtual-machine.(none) This patch provide u-boot with arm64 support. Currently, it works on Foundation Model for armv8 or Fast Model for armv8. Signed-off-by: fenghua fenghua@ligen-virtual-machine.(none) It boots! Even it has a lot of compiling warning, but it is really a good start. Thanks for sharing! York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-mpc85xx
On Mon, Aug 12, 2013 at 03:43:29PM -0700, York Sun wrote: Tom, The following changes since commit d05bfd0586ccebe96e31976459c8ef45ec65e109: Merge branch 'master' of git://git.denx.de/u-boot-i2c (2013-08-06 09:49:06 -0400) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx.git master for you to fetch changes up to 3aab0cd852d7c9565c2559a7983cbb73852bac28: powerpc/mpc85xx: Cleanup license header in source files (2013-08-12 15:04:24 -0700) Haijun.Zhang (1): p1020rdb-pd: platform support James Yang (1): powerpc/mpc8xxx: Fix TIMING_CFG_3[EXT_ACTTOPRE] Liu Gang (4): powerpc/srio: Update the SRIO LIODN registers and ID table macro powerpc/b4860: Correct LIODN assignment for SRIO powerpc/t4: Correct LIODN assignment for SRIO powerpc/srio-pcie-boot: Avoid the NOR_BOOT macro when boot from SRIO/PCIE Minghuan Lian (1): powerpc/rman: fix RMan support for t4240 and b4860 Mingkai Hu (2): powerpc/85xx: Add C29x SoC support powerpc/c29xpcie: add support for C29XPCIE board Priyanka Jain (2): board/bsc9132qds: Add DSP side tlb and laws board/bsc9132qds: Configure DSP DDR controller Roy Zang (1): 83xx/pcie: fix build error for 83xx pcie Shaveta Leekha (4): board/freescale/common: IDT8T49N222A configuration code powerpc/mpc85xx: Add defines for serdes RSTCTL register powerpc/asm: Move function declaration of 'serdes_get_prtcl' to fsl_serdes.h board/b4860qds: Add support for configuring SerDes1 Refclks Xie Xiaobo (1): powerpc/85xx: Add TWR-P10xx board support York Sun (12): powerpc/corenet: Move CONFIG_FSL_CORENET out of board header file drivers/fm: Fix compiling error if FW location is not defined mpc85xx: Base emulator support powerpc/t4qds: cleanup board header file powerpc/corenet: Move RCW print to cpu.c powerpc/T4240EMU: Add T4240EMU target powerpc/mpc8xxx: Set inactive csn_bnds to 0x powerpc/t4240qds: Adjust DDR timing for RDIMM powerpc/mpc8xxx: Add x4 DDR device support powerpc/mpc8xxx: Add memory reset control powerpc/mpc85xx: Workaround for A-005812 powerpc/mpc85xx: Cleanup license header in source files Zang Roy-R61911 (2): powerpc/pcie: add PCIe version 3.x support powerpc/pcie: remove PCIe version 3.x define for B4860 and B4420 MAINTAINERS |8 + README | 12 + arch/powerpc/cpu/mpc83xx/pcie.c |2 + arch/powerpc/cpu/mpc85xx/Makefile|2 + arch/powerpc/cpu/mpc85xx/b4860_ids.c | 12 +- arch/powerpc/cpu/mpc85xx/c29x_serdes.c | 62 +++ arch/powerpc/cpu/mpc85xx/cmd_errata.c|3 + arch/powerpc/cpu/mpc85xx/cpu.c | 23 +- arch/powerpc/cpu/mpc85xx/cpu_init.c | 10 + arch/powerpc/cpu/mpc85xx/ddr-gen1.c |2 +- arch/powerpc/cpu/mpc85xx/ddr-gen2.c |2 +- arch/powerpc/cpu/mpc85xx/ddr-gen3.c | 36 +- arch/powerpc/cpu/mpc85xx/fdt.c |6 +- arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.h |1 - arch/powerpc/cpu/mpc85xx/release.S | 15 + arch/powerpc/cpu/mpc85xx/start.S |3 +- arch/powerpc/cpu/mpc85xx/t4240_ids.c | 12 +- arch/powerpc/cpu/mpc86xx/ddr-8641.c |2 +- arch/powerpc/cpu/mpc8xxx/cpu.c |3 + arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 15 +- arch/powerpc/cpu/mpc8xxx/ddr/ddr.h |2 +- arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c |1 + arch/powerpc/cpu/mpc8xxx/ddr/interactive.c |4 + arch/powerpc/cpu/mpc8xxx/ddr/main.c | 62 ++- arch/powerpc/cpu/mpc8xxx/ddr/options.c |2 + arch/powerpc/include/asm/config_mpc85xx.h| 26 + arch/powerpc/include/asm/fsl_ddr_dimm_params.h |1 + arch/powerpc/include/asm/fsl_ddr_sdram.h | 25 +- arch/powerpc/include/asm/fsl_law.h |7 +- arch/powerpc/include/asm/fsl_liodn.h |7 + arch/powerpc/include/asm/fsl_pci.h | 35 +- arch/powerpc/include/asm/fsl_serdes.h|1 + arch/powerpc/include/asm/immap_85xx.h| 49 +- arch/powerpc/include/asm/processor.h |3 + board/freescale/b4860qds/b4860qds.c | 127 - board/freescale/b4860qds/eth_b4860qds.c |2 - board/freescale/bsc9131rdb/ddr.c |2 +- board/freescale/bsc9132qds/bsc9132qds.c | 22 + board/freescale/bsc9132qds/ddr.c |2 +- board/freescale/bsc9132qds/law.c |8 + board/freescale/bsc9132qds/tlb.c
Re: [U-Boot] [PATCH v4 0/8] am335x: NOR support
On 13/08/13 16:20, Mark Jackson wrote: On 13/08/13 16:11, Tom Rini wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 08/13/2013 11:06 AM, Mark Jackson wrote: On 13/08/13 16:00, Tom Rini wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 08/13/2013 10:57 AM, Mark Jackson wrote: On 30/07/13 14:28, Tom Rini wrote: On Thu, Jul 18, 2013 at 03:12:57PM -0400, Tom Rini wrote: Hey all, This series adds NOR support to am335x_evm, along with a few generic changes to make gpmc clearer (for per-board things like different NOR chips, etc). This series depends on the last go-round of the am335x falcon mode docs as that adds the README that I add more content to. And while I say this in 3/8, to be clear, I expect to drop 3/8 in favor of Justin Waters' way of doing this instead, I just include this here for completeness and will get it all happy together when I assemble things in u-boot-ti. The big changes in v4 are: - Apply again to master which includes a few non-trivial updates, so the linker script got re-synced. - After checking what's going on, and testing with NAND again, we can be common with gpmc_cfg-irqstatus/enable, and only set documented bits in gpmc_cfg-config Applied to u-boot-ti/master, thanks! I'm now rebasing our NanoBone code onto the TI uboot code, but I'm coming up with the original issue [1] of having to not check for the R_ARM_RELATIVE relocations again. Your linker script is out of sync with arch/arm/cpu/u-boot.lds Strange ... since the am335x nor_boot compile appeared to work fine, I just copied the script from board/ti/am335x, and assumed it would work fine for me (with a library path change). So does this TI file also need updating ? Either way, my code now compiles. I had to re-sync the TI one in this series as well. Double check between what you have working now vs before, there's a few small changes there... Doh ... I was copying the script from the non-TI branch of uboot !! :-( Well the code seems to work apart from I get no networking. We have dual ethernet, so I'll have to do some digging. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] i.MX: Add documentation on how to use SPI NOR on MX28evk
On Tue, Aug 13, 2013 at 12:48 PM, Mårten Wikman marten.wik...@novia.fi wrote: 2013/8/11 Otavio Salvador ota...@ossystems.com.br: On Sun, Aug 11, 2013 at 10:49 AM, Mårten Wikman marten.wik...@novia.fi wrote: This adds necessary information on how to use U-boot on SPI NOR on MX28evk Signed-off-by: Marten Wikman marten.wik...@novia.fi Marten, The patch looks right and complete; I'd just split it in two patches: - add the new target - add documentation From your commit log it is not clear you're adding the new target. Should I split it into two and send is as PATCH v2 to the mailing list? I think so. -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://projetos.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] i.MX: Add documentation on how to use SPI NOR on MX28evk
2013/8/11 Otavio Salvador ota...@ossystems.com.br: On Sun, Aug 11, 2013 at 10:49 AM, Mårten Wikman marten.wik...@novia.fi wrote: This adds necessary information on how to use U-boot on SPI NOR on MX28evk Signed-off-by: Marten Wikman marten.wik...@novia.fi Marten, The patch looks right and complete; I'd just split it in two patches: - add the new target - add documentation From your commit log it is not clear you're adding the new target. -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://projetos.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 Should I split it into two and send is as PATCH v2 to the mailing list? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] Add Nanobone board support
NanoBone Specification:
---
CPU:
TI AM335x
Memory:
256MB DDR3
64MB NOR flash
256MB NAND flash
128KB FRAM
Ethernet:
2 x 10/100 connected to SMSC LAN8710 PHY
USB:
1 x USB2.0 Type A
I2C:
2Kbit EEPROM (Microchip 24AA02)
RTC (Maxim DS1338)
GPIO Expander (Microchip MCP23017)
Expansion connector:
6 x UART
1 x MMC/SD
1 x USB2.0
Signed-off-by: Mark Jackson m...@newflow.co.uk
---
Changes in v3:
- Rebased on TI U-Boot
Changes in v2:
- Tweaked after comments from Tom Rini
MAINTAINERS |4 +
board/newflow/nanobone/Makefile | 38 +
board/newflow/nanobone/board.c| 296 +++
board/newflow/nanobone/mux.c | 195 +++
board/newflow/nanobone/u-boot.lds | 98
boards.cfg|2 +
include/configs/nanobone.h| 307 +
7 files changed, 940 insertions(+)
create mode 100644 board/newflow/nanobone/Makefile
create mode 100644 board/newflow/nanobone/board.c
create mode 100644 board/newflow/nanobone/mux.c
create mode 100644 board/newflow/nanobone/u-boot.lds
create mode 100644 include/configs/nanobone.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..4f44e8f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -717,6 +717,10 @@ Ilko Iliev il...@ronetix.at
PM9263 AT91SAM9263
PM9G45 ARM926EJS (AT91SAM9G45 SoC)
+Mark Jackson m...@newflow.co.uk
+
+ NANOBONEARM ARMV7 (AM33xx Soc)
+
Michael Jones michael.jo...@matrix-vision.de
omap3_mvblx ARM ARMV7 (OMAP3xx SoC)
diff --git a/board/newflow/nanobone/Makefile b/board/newflow/nanobone/Makefile
new file mode 100644
index 000..3dbeeda
--- /dev/null
+++ b/board/newflow/nanobone/Makefile
@@ -0,0 +1,38 @@
+#
+# Makefile
+#
+# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y)
+COBJS := mux.o
+endif
+
+COBJS += board.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/newflow/nanobone/board.c b/board/newflow/nanobone/board.c
new file mode 100644
index 000..2534516
--- /dev/null
+++ b/board/newflow/nanobone/board.c
@@ -0,0 +1,296 @@
+/*
+ * board.c
+ *
+ * Board functions for Newflow NanoBone board
+ *
+ * Copyright (C) 2013, Newflow Ltd - http://www.newflow.co.uk/
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include errno.h
+#include spl.h
+#include asm/arch/cpu.h
+#include asm/arch/hardware.h
+#include asm/arch/omap.h
+#include asm/arch/ddr_defs.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc_host_def.h
+#include asm/arch/sys_proto.h
+#include asm/arch/mem.h
+#include asm/io.h
+#include asm/emif.h
+#include asm/gpio.h
+#include i2c.h
+#include miiphy.h
+#include cpsw.h
+#include board.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* NOR Flash config */
+#define NOR_CS 0
+#define NOR_BASE 0x0800
+#define NOR_SIZE GPMC_SIZE_128M
+static u32 gpmc_nor_config[GPMC_MAX_REG] = {
+ 0x1200,
+ 0x00101000,
+ 0x00030301,
+ 0x10041004,
+ 0x010f1010,
+ 0x08070280,
+ 0
+};
+
+/* FRAM config */
+#define FRAM_CS1
+#define FRAM_BASE 0x1c00
+#define FRAM_SIZE GPMC_SIZE_16M
+static u32 gpmc_fram_config[GPMC_MAX_REG] = {
+ 0x1200,
+ 0x00101000,
+ 0x00020201,
+ 0x0f030f03,
+ 0x010d1010,
+ 0x000301c0,
+ 0
+};
+
+static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
+#if defined(CONFIG_SPL_BUILD) || (CONFIG_NOR_BOOT)
+//static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
+#endif
+
+/* MII mode defines */
+#define PORT1_MII_MODE_ENABLE 0x0
+#define PORT2_MII_MODE_ENABLE 0x0
+
+static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+static const struct ddr_data ddr3_data = {
+ .datardsratio0 = MT41J128MJT125_RD_DQS,
+ .datawdsratio0 = MT41J128MJT125_WR_DQS,
+ .datafwsratio0 = MT41J128MJT125_PHY_FIFO_WE,
+ .datawrsratio0 = MT41J128MJT125_PHY_WR_DATA,
+ .datadldiff0 = PHY_DLL_LOCK_DIFF,
+};
+
+static const struct cmd_control ddr3_cmd_ctrl_data = {
+ .cmd0csratio = MT41J128MJT125_RATIO,
Re: [U-Boot] [PATCH v3] Add Nanobone board support
On Tue, Aug 13, 2013 at 05:09:57PM +0100, Mark Jackson wrote: +++ b/board/newflow/nanobone/board.c [snip] +#if defined(CONFIG_SPL_BUILD) || (CONFIG_NOR_BOOT) +//static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE; +#endif Here and elsewhere, remove commented out code. +++ b/include/configs/nanobone.h [snip] +#define CONFIG_DMA_COHERENT +#define CONFIG_DMA_COHERENT_SIZE (1 20) [snip] +#define CONFIG_STACKSIZE (128 * 1024) Unused [snip] +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 But no CONFIG_CMD_FS_GENERIC ? + /* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ +#define PHYS_DRAM_1 0x8000 /* DRAM Bank #1 */ +#define CONFIG_MAX_RAM_BANK_SIZE (1024 20)/* 1GB */ Please just use 0x8000 directly in later defines, or CONFIG_SYS_SDRAM_BASE in code. [snip] +#define CONFIG_SPL_NET_VCI_STRINGAM335x U-Boot SPL I would strongly encourage nanobone somewhere in this string, so that you don't feed the binary for an am335x_evm.h-based board to this board. Or drop if you aren't really supporting SPL via USB or ethernet. +/* Unsupported features */ +#undef CONFIG_USE_IRQ [snip] +#define CONFIG_BOOTP_DEFAULT Unused. And I realize everything but the VCI string and lack of CONFIG_CMD_FS_GENERIC is inherited from am335x_evm.h, I'm working on a series to fix that now. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 6/7, v10] NAND: TPL : introduce the TPL based on the SPL
On 07/25/2013 12:44 AM, ying.zh...@freescale.com wrote: From: Ying Zhang b40...@freescale.com Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can not be more than 4K. So, the SPL cannot initialize the DDR with the SPD code. This patch introduces TPL to enable a loader stub that is loaded by the code from the SPL. It initializes the DDR with the SPD or other operations. The TPL's size is sizeable, the maximum size is decided by the memory's size that TPL runs. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are three stage uboot images: * spl_boot, * tpl_boot, * final uboot image This patch is on top of the patch: SPL: Makefile: Build a separate autoconf.mk for SPL Signed-off-by: Ying Zhang b40...@freescale.com Ying, You patch's dependency has not been applied. I am going to hold this patch until I can apply it. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] RFC: tegra: Avoid using I2C prior to relocation
Hi Tom, On Sat, Aug 10, 2013 at 7:21 PM, Tom Warren twar...@nvidia.com wrote: Simon, From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass Sent: Friday, August 09, 2013 9:04 PM To: Stephen Warren Cc: U-Boot Mailing List; Tom Warren; Stephen Warren; tr...@ti.com Subject: Re: [PATCH] RFC: tegra: Avoid using I2C prior to relocation +Tom Rini Hi Stephen, On Fri, Aug 9, 2013 at 5:17 PM, Stephen Warren swar...@wwwdotorg.org wrote: On 08/07/2013 10:20 AM, Stephen Warren wrote: On 08/06/2013 11:52 PM, Simon Glass wrote: Tegra recently moved to the new I2C framework, which sets up I2C prior to relocation, and prior to calling i2c_init_board(). This causes a crash on Tegra boards. note: There are many ways to fix this. I believe this is one. It disables i2c_init() until relocation is complete. I have been unable to test it so far due to problems getting my Seaboard to work. I will try another Tegra board, but send this for comment in the meantime. Tested-by: Stephen Warren swar...@nvidia.com (On Beaver and Dalmore, tested booting to U-Boot command prompt followed by i2c dev 0; i2c probe) Note: I believe this is an enormous hack that hacks around the problem of dynamic device initialization just not being well thought out relative to the restrictions of U-Boot's various boot stages. I'd still prefer an outright revert of the broken code. In other words, tegra_i2c_init() simply shouldn't be called at the wrong time; it shouldn't have to handle being called at the wrong time and null itself out when that happens. However, if this is what it takes to get U-Boot working again, then let's apply it ASAP. This doesn't seem to have been applied yet. Are you expecting this to go through the main U-boot Tree, I2C tree, or Tegra tree? I just noticed that you only CC'd the Tegra maintainer... I put tegra: on the front expecting it to go that way, but it doesn't matter. Also your comments did not exactly represent a glowing recommendation. [Tom] It’s still marked RFC – doesn’t that have to go away before anyone can pick it up / apply it? Sorry, I missed this in first reading due to the quoting. I will re-issue without RFC. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] RFC: tegra: Avoid using I2C prior to relocation
On 08/13/2013 01:34 PM, Simon Glass wrote: Hi Tom, On Sat, Aug 10, 2013 at 7:21 PM, Tom Warren twar...@nvidia.com wrote: Simon, From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass ... I put tegra: on the front expecting it to go that way, but it doesn't matter. Also your comments did not exactly represent a glowing recommendation. [Tom] It’s still marked RFC – doesn’t that have to go away before anyone can pick it up / apply it? Sorry, I missed this in first reading due to the quoting. I will re-issue without RFC. If that's the only change, you hardly need to repost it to edit the patch subject; there are many ways of fixing that when applying the patch... ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/3] ARM: use r9 for gd instead of r8
Hello Benoît, On 08/12/2013 12:08 AM, Benoît Thébaudeau wrote: On Sunday, August 11, 2013 10:58:36 PM, Jeroen Hofstee wrote: To be EABI compliant (r9 is a platform specific register) and as a prepration for building u-boot with clang/llvm (with does / will support r9 as reserved register), store the pointer to gd in r9. If r9 is reserved, I understand that its current usage may conflict with clang's but why would gd have to be stored in r9 for clang? Moreover, if r9 is reserved for clang (reserved for what?), why can it be used for gd? I know Albert already responded to this, but for completeness: The reserved is from a compiler point of view, which is perhaps a bit llvm nomenclature, Reserved means the compiler should _not_ use it as a general purpose register; it is reserved for the platform, U-boot in this case. I'm also wondering if r9 as initialized by relocate.S is not sometimes used by GCC to handle position-independent code within generated code, i.e. like the static base feature described for r9 as a possible usage in the ARM EABI AAPCS document (5.1.1). If this is the case, changing r9 to gd would break GCC code at runtime. This is not needed / supported on U-boot arm. U-boot will actually error at compile time if there are any symbols which are not pc relative. Regards, Jeroen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] ARM: use r9 for gd
Hi, On 08/12/2013 05:23 PM, Wolfgang Denk wrote: Dear Albert, In message 20130812164406.5a6807e7@lilith you wrote: IIRC, r9 is used as GOT pointer ? No, it is not, well, not any more since GOT-based relocation was replaced by ELF relocation, which requires no reserved register. In any case, please also update the README section of register usage on ARM. I see, thanks for the explanation - so this is one more item thatneeds to be fixed in the README. Damn: The role of register r9 is platform specific. A virtual platform may assign any role to this register and _must document_ this usage ;) I will update the README for both. Regards, Jeroen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 3/7, v10] powerpc: p1022ds: Enable P1022DS to boot from SD Card with SPL
On 07/25/2013 12:44 AM, ying.zh...@freescale.com wrote: From: Ying Zhang b40...@freescale.com Enable p1022ds to start from eSDHC with SPL. Signed-off-by: Ying Zhang b40...@freescale.com Ying, Does this patch need anything out of this set? I can't get the following targets built P1022DS_SPIFLASH P1022DS_36BIT_SPIFLASH P1022DS_SDCARD P1022DS_36BIT_SDCARD Looks like function env_import is not available for these configuration. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1 1/4] mtd: nand: omap: enable BCH ECC scheme using ELM for generic platform
On Tue, 2013-08-13 at 05:00 +, Gupta, Pekon wrote: - CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW_DETECTION_SW Include API for S/W library (lib/bch.c) so included that here.. But this ECC scheme should be used only for older OMAP platforms where ELM is not present - CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW Include declarations for ELM functions. So new OMAP platforms which have ELM hardware engine, need not include whole bch.c library in their code. Maybe it should just be something like CONFIG_SYS_OMAP_ELM? Actually is not just decides between using ELM or not. CONFIGs also selects which all ECC scheme to support (multiple selection allowed). Following ECC schemes can be supported on omap-nand driver.. [1] http://permalink.gmane.org/gmane.linux.ports.arm.omap/101028 So to keep code foot-print small, configs are used to select out some Un-needed ECC schemes on newer devices. If the hardware doesn't dictate a specific choice, use CONFIG rather than CONFIG_SYS, even if not all hardware supports all options. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v1, 4/8] mpc8xxx: set x2 DDR3 refresh rate if SPD config requires it
On 07/26/2013 03:02 AM, Valentin Longchamp wrote: If the DDR3 module supports industrial temperature range and requires the x2 refresh rate for that temp range, the refresh period must be 3.9us instead of 7.8 us. Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com --- arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c index 3e7c269..603b68b 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c @@ -320,6 +320,8 @@ ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd, * = 3.9 us at ext temperature range */ pdimm-refresh_rate_ps = 780; + if ((spd-therm_ref_opt 0x1) !(spd-therm_ref_opt 0x2)) + pdimm-refresh_rate_ps = 390; /* * min four active window delay time Has this been verified on a board? This looks half-way done. If the module supports extended temperature range, the MR2 should be adjusted to fit the module. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v1, 5/8] fsl: do not define FSL_SRIO_PCIE_BOOT_MASTER for all P2041 systems
On 07/26/2013 03:02 AM, Valentin Longchamp wrote: If this #define stays in config_mpc85xx.h, the P2041 based boards must define a lot of SRIO values even if they do not implement a SRIO device. The #define is moved into the P2041RDB board config file where it is used. Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com --- include/configs/P2041RDB.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 4ea8717..523117b 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -399,6 +399,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE */ +#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef08ull #define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff8ull #define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x8 /* 512K */ I failed to see what problem this patch fixes. Maybe you were using an older copy of u-boot? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v1, 6/8] net/fman: add a fm_enable_port function
On 07/26/2013 03:02 AM, Valentin Longchamp wrote:
This can be useful if we want to disable an interface in u-boot and
later reenable them, so that it looks available when trying to fix the
FDT or for the kernel.
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
drivers/net/fm/init.c | 7 +++
include/fm_eth.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c
index 5908c32..820277e 100644
--- a/drivers/net/fm/init.c
+++ b/drivers/net/fm/init.c
@@ -158,6 +158,13 @@ void fm_disable_port(enum fm_port port)
fman_disable_port(port);
}
+void fm_enable_port(enum fm_port port)
+{
+ int i = fm_port_to_index(port);
+
+ fm_info[i].enabled = 1;
+}
+
void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus)
{
int i = fm_port_to_index(port);
diff --git a/include/fm_eth.h b/include/fm_eth.h
index 8fcf172..b464e04 100644
--- a/include/fm_eth.h
+++ b/include/fm_eth.h
@@ -162,5 +162,6 @@ void fm_info_set_phy_address(enum fm_port port, int
address);
int fm_info_get_phy_address(enum fm_port port);
void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus);
void fm_disable_port(enum fm_port port);
+void fm_enable_port(enum fm_port port);
Is this function called somewhere?
York
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Re: [U-Boot] [PATCH v1 7/8] mtd/fsl_elbc: take NAND_ECC_SOFT_BCH config option into accout
On Fri, 2013-07-26 at 12:02 +0200, Valentin Longchamp wrote: NAND_ECC_SOFT was the only option available while the SOFT_BCH option may also be used. Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com --- drivers/mtd/nand/fsl_elbc_nand.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) Acked-by: Scott Wood scottw...@freescale.com Is this for use with http://patchwork.ozlabs.org/patch/168855/ or do you have a 2K-page NAND that requires more than 1 bit of ECC correction? -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request - serial dcc
On Tue, Aug 13, 2013 at 09:22:12AM +0200, Michal Simek wrote: Hi Tom, please pull these two patches to your tree. I have sent them to mailing list as RFC and only Wolfgang's concern was if this breaks using dcc as console. We have done these patches because we couldn't use dcc as console. It means this patch fix the problem with dcc driver. In mainline u-boot only zynq has DCC enabled in configuration file. I can't see any dedicated serial custodian that's why I am sending this pull request directly to you. Thanks, Michal The following changes since commit d62a89bd5b5033649a90fa5bfe0f5b32013ca8f8: mpc5200: Misc updates to a3m071 config header (2013-08-12 21:11:24 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git dcc for you to fetch changes up to a168d3af5d9887019e62c4d4f842c79971079a0b: serial: arm_dcc: Register with serial core (2013-08-13 08:38:52 +0200) Jagannadha Sutradharudu Teki (2): serial: arm_dcc: Remove stdio structure support serial: arm_dcc: Register with serial core common/stdio.c | 3 --- drivers/serial/arm_dcc.c | 41 +++-- drivers/serial/serial.c | 2 ++ include/stdio_dev.h | 3 --- 4 files changed, 25 insertions(+), 24 deletions(-) Applied to u-boot/master, thanks! And FWIW, I'd have been fine getting this via the u-boot-arm tree. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] RFC: tegra: Avoid using I2C prior to relocation
On Wed, Aug 07, 2013 at 10:20:01AM -0600, Stephen Warren wrote: On 08/06/2013 11:52 PM, Simon Glass wrote: Tegra recently moved to the new I2C framework, which sets up I2C prior to relocation, and prior to calling i2c_init_board(). This causes a crash on Tegra boards. note: There are many ways to fix this. I believe this is one. It disables i2c_init() until relocation is complete. I have been unable to test it so far due to problems getting my Seaboard to work. I will try another Tegra board, but send this for comment in the meantime. Tested-by: Stephen Warren swar...@nvidia.com With a hand-tweaked commit message, applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/2] powerpc: Use print_size() where appropriate
On 07/31/2013 08:31 AM, Shruti Kanetkar wrote:
Makes the startup output more consistent
Signed-off-by: Shruti Kanetkar shr...@freescale.com
Acked-by: Andy Fleming aflem...@freescale.com
---
arch/powerpc/cpu/mpc824x/cpu.c | 8 +++-
arch/powerpc/cpu/mpc85xx/cpu_init.c | 8 +---
arch/powerpc/cpu/mpc8xx/cpu.c | 24 +++-
arch/powerpc/cpu/mpc8xxx/ddr/main.c | 3 ++-
4 files changed, 21 insertions(+), 22 deletions(-)
Hello PowerPC Custodians,
These are two simple patches I've been playing with as part of my learning
process. I realize that perhaps pieces of these patches should be submitted to
their respective custodians, but given their simplicity I'm thinking one of
the
powerpc custodians can apply them (Andy perhaps) to their tree if nobody
objects
I compile-tested these patches on all the mpc8xx and mpc8[356]xxx powerpc
boards/targets and I run them on one board each of the following families of
SoC(s): MPC8xx, MPC83xx and MPC85xx
Checkpatch has a few warnings like this:
WARNING: space prohibited between function name and open parenthesis '('
#132: FILE: arch/powerpc/cpu/ppc4xx/cpu.c:670:
+ printf ( 16 KiB I-Cache %d KiB D-Cache,
but I simply preserved the existing formating/style in the respective files
Appreciate the cleanup. Please fix the space issue as checkpatch
complained. There are many examples of bad style in source code. We
should clean them up as much as we can. Thanks.
York
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Re: [U-Boot] [PATCH v1 8/8] mpc85xx: introduce the kmp204x reference design support
On Fri, 2013-07-26 at 12:02 +0200, Valentin Longchamp wrote:
This patch introduces the support for Keymile's kmp204x reference
design. This design is based on Freescale's P2040/P2041 SoC.
The peripherals used by this design are:
- DDR3 RAM with SPD support
- SPI NOR Flash as boot medium
- NAND Flash
- 2 PCIe busses (hosts 1 and 3)
- 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5)
- 3 Local Bus windows, with one dedicated to the QRIO reset/power mgmt
FPGA
- 2 HW I2C busses
- last but not least, the mandatory serial port
The board/keymile/kmp204x code is mostly based on Freescale's P2041rdb
support and was changed according to our design (that means essentially
removing what is not present on the designs and a few adaptations).
A lot of the copied files have had Freescale copyrights removed... Also
please try to factor shared code out rather than duplicate, where
practical.
There is currently only one prototype board that is based on this design
and this patch also introduces it. The board is called kmlion1.
Signed-off-by: Stefan Bigler stefan.big...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
MAINTAINERS | 1 +
board/keymile/common/common.c | 4 +-
board/keymile/kmp204x/Makefile| 48
board/keymile/kmp204x/ddr.c | 84 +++
board/keymile/kmp204x/eth.c | 87 +++
board/keymile/kmp204x/kmp204x.c | 307 ++
board/keymile/kmp204x/kmp204x.h | 31 +++
board/keymile/kmp204x/law.c | 51
board/keymile/kmp204x/pbi.cfg | 51
board/keymile/kmp204x/pci.c | 49
board/keymile/kmp204x/rcw_kmp204x.cfg | 11 +
board/keymile/kmp204x/tlb.c | 122 +
boards.cfg| 1 +
include/configs/km/kmp204x-common.h | 462
++
include/configs/kmp204x.h | 84 +++
15 files changed, 1392 insertions(+), 1 deletion(-)
create mode 100644 board/keymile/kmp204x/Makefile
create mode 100644 board/keymile/kmp204x/ddr.c
create mode 100644 board/keymile/kmp204x/eth.c
create mode 100644 board/keymile/kmp204x/kmp204x.c
create mode 100644 board/keymile/kmp204x/kmp204x.h
create mode 100644 board/keymile/kmp204x/law.c
create mode 100644 board/keymile/kmp204x/pbi.cfg
create mode 100644 board/keymile/kmp204x/pci.c
create mode 100644 board/keymile/kmp204x/rcw_kmp204x.cfg
create mode 100644 board/keymile/kmp204x/tlb.c
create mode 100644 include/configs/km/kmp204x-common.h
create mode 100644 include/configs/kmp204x.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..fff77f0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -778,6 +778,7 @@ Valentin Longchamp valentin.longch...@keymile.com
mgcoge3un ARM926EJS (Kirkwood SoC)
kmcoge5un ARM926EJS (Kirkwood SoC)
portl2 ARM926EJS (Kirkwood SoC)
+ kmcoge4 MPC85xx (P2041 SoC)
Nishanth Menon n...@ti.com
diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c
index ef93ed3..ca833db 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -94,7 +94,7 @@ int set_km_env(void)
}
#if defined(CONFIG_SYS_I2C_INIT_BOARD)
-#if !defined(CONFIG_MPC83xx)
+#if !defined(CONFIG_MPC83xx) !defined(CONFIG_PPC_P2041)
Perhaps you should check for when you do want to run this code, rather
than when you don't.
static void i2c_write_start_seq(void)
{
set_sda(1);
@@ -183,6 +183,7 @@ void i2c_init_board(void)
}
#endif
+#ifndef CONFIG_KMP204X
int board_eth_init(bd_t *bis)
Likewise.
+/* TODO: implement the I2C functions */
+void i2c_write_start_seq(void){
+ return;
+}
Opening brace goes on its own line for function definitions.
+ if (en)
+ prst = ~(1bit);
+ else
+ prst |= (1bit);
Spaces around binary operators such as
+#ifdef CONFIG_SYS_NAND_BASE_PHYS
+ SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
+#endif
The NAND window is 8K. There's no reason for the LAW to be more than
the minimum 32K.
diff --git a/board/keymile/kmp204x/tlb.c b/board/keymile/kmp204x/tlb.c
new file mode 100644
index 000..5bbefd5
--- /dev/null
+++ b/board/keymile/kmp204x/tlb.c
@@ -0,0 +1,122 @@
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp valentin.longch...@keymile.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *
Re: [U-Boot] [PATCH 2/2] cmd_nand: slight optimization of nand_dump function
On Thu, 2013-07-11 at 17:27 +0900, Masahiro Yamada wrote:
If a non-zero value is given to only_oob argument,
printing the main area is skipped.
With a little modification, we can skip the whole
while loop.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
common/cmd_nand.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index a66f569..adc1ce4 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -77,18 +77,21 @@ static int nand_dump(nand_info_t *nand, ulong off, int
only_oob, int repeat)
goto free_all;
}
printf(Page %08lx dump:\n, off);
- i = nand-writesize 4;
- p = datbuf;
- while (i--) {
- if (!only_oob)
+ if (!only_oob) {
+ i = nand-writesize 4;
+ p = datbuf;
+
+ while (i--) {
printf(\t%02x %02x %02x %02x %02x %02x %02x %02x
%02x %02x %02x %02x %02x %02x %02x %02x\n,
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
p[8], p[9], p[10], p[11], p[12], p[13], p[14],
p[15]);
- p += 16;
+ p += 16;
+ }
}
+
puts(OOB:\n);
i = nand-oobsize 3;
p = oobbuf;
I'll probably apply this since it makes the code slightly more
intuitive, but as an optimization I doubt this makes any noticeable
difference.
-Scott
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Re: [U-Boot] [U-Boot, v1, 8/8] mpc85xx: introduce the kmp204x reference design support
On 07/26/2013 03:02 AM, Valentin Longchamp wrote:
+
+phys_size_t initdram(int board_type)
+{
+ phys_size_t dram_size = 0;
+
+ puts(Initializing);
+
+ if (fsl_use_spd()) {
+ puts(using SPD\n);
+ dram_size = fsl_ddr_sdram();
+ } else {
+ puts(no SPD and fixed parameters\n);
+ return dram_size;
+ }
How does the else clause work? You probably want to put an error or
panic here if you don't have other way to initialize it.
York
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Re: [U-Boot] [PATCH 1/2]powerpc/usb: Workaround for erratum-A006918
On 08/05/2013 03:43 AM, Ramneek Mehresh wrote: Erratum-A006918 prevents internal UTMI dual phy pll inside T4240 rev 1.0 from starting sometimes. Workaround involves restarting phy pll maximum seven times with 1ms delay in each loop Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com Signed-off-by: Suresh Gupta suresh.gu...@freescale.com Mehresh, This patch only applies to rev 1 of T4240, doesn't it? Rev 1 part is not available for general public. We don't submit rev 1 errata workaround. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2]powerpc/fdt: Modify USB device-tree fixup for erratum-A006918
On 08/05/2013 03:43 AM, Ramneek Mehresh wrote: Erratum-A006918 prevents internal UTMI phy pll from starting sometimes. Workaround involves restarting phy pll maximum seven times with 1ms delay in each loop. If pll still fails to start after max retries, status property is set to fail-erratum-a006918 to stop kernel from using this device Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com Same here, we don't submit rev1 errata workaround. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] part1 of arm64. This patch provide u-boot with arm64 support. Currently it works on Foundation Model for armv8 or Fast Model for armv8.
On Mon, 2013-08-12 at 00:05 +0800, feng...@phytium.com.cn wrote:
From: fenghua fenghua@ligen-virtual-machine.(none)
This patch provide u-boot with arm64 support. Currently, it works on
Foundation Model for armv8 or Fast Model for armv8.
Signed-off-by: fenghua fenghua@ligen-virtual-machine.(none)
Could you provide a proper signoff (full name and valid e-mail address)?
---
arch/arm64/config.mk | 32 +++
arch/arm64/lib/Makefile | 64 +
arch/arm64/lib/board.c | 456
++
arch/arm64/lib/bootm.c | 211
arch/arm64/lib/cache.c | 282 +
arch/arm64/lib/crt0.S| 129 ++
arch/arm64/lib/interrupts.c | 109
arch/arm64/lib/relocate.S| 72 ++
arch/arm64/lib/reset.c | 37 +++
arch/arm64/lib/timer.c | 95 +++
board/armltd/dts/vexpress64.dts | 215
board/armltd/vexpress64/Makefile | 43
board/armltd/vexpress64/vexpress64.c | 63 +
boards.cfg |1 +
common/cmd_bdinfo.c | 32 +++
common/fdt_support.c | 66 ++---
common/image.c |5 +-
doc/README.arm64 | 10 +
examples/standalone/stubs.c | 13 +
include/configs/vexpress_aemv8a.h| 200 +++
include/image.h |1 +
lib/asm-offsets.c|2 +-
22 files changed, 2103 insertions(+), 35 deletions(-)
create mode 100644 arch/arm64/config.mk
create mode 100644 arch/arm64/lib/Makefile
create mode 100644 arch/arm64/lib/board.c
create mode 100644 arch/arm64/lib/bootm.c
create mode 100644 arch/arm64/lib/cache.c
create mode 100644 arch/arm64/lib/crt0.S
create mode 100644 arch/arm64/lib/interrupts.c
create mode 100644 arch/arm64/lib/relocate.S
create mode 100644 arch/arm64/lib/reset.c
create mode 100644 arch/arm64/lib/timer.c
create mode 100644 board/armltd/dts/vexpress64.dts
create mode 100644 board/armltd/vexpress64/Makefile
create mode 100644 board/armltd/vexpress64/vexpress64.c
create mode 100644 doc/README.arm64
create mode 100644 include/configs/vexpress_aemv8a.h
It would be nice if the patches were separated into arch support, core
support, board support, anything specific to the foundation/fast models,
etc.
diff --git a/arch/arm64/config.mk b/arch/arm64/config.mk
new file mode 100644
index 000..e40e983
--- /dev/null
+++ b/arch/arm64/config.mk
Does there really need to be a separate arch/arm64? I know this is what
Linux does, but on every other 32/64 architecture that decision has been
eventually reversed (even on x86, which has about as much difference
between 32 and 64 bit as ARM does).
We started working on armv8 U-Boot using a unified arch/arm, and at
least got to the point of something that builds, so it doesn't seem
impractical. Besides making maintenance easier, it would also make it
much easier to review what is being done differently for arm64 (and for
any files that do need to be moved or copied, be sure to pass -M -C to
git format-patch).
@@ -0,0 +1,32 @@
+#
+# Copyright (c) 2013 FengHua feng...@phytium.com.cn
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+CROSS_COMPILE ?=
/home/fenghua/DS-5-Workspace/gcc-linaro-aarch64-linux-gnu-4.8-2013.05_linux/bin/aarch64-linux-gnu-
Please don't insert references to paths that only work on your computer.
Plus, what about native builds that don't need a cross compiler?
diff --git a/common/fdt_support.c b/common/fdt_support.c
index b034c98..9bc5821 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -21,6 +21,34 @@
*/
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * Get cells len in bytes
+ * if #-cells property is 2 then len is 8
+ * otherwise len is 4
+ */
+static int get_cells_len(void *blob, char *nr_cells_name)
+{
+ const fdt32_t *cell;
+
+ cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
+ if (cell fdt32_to_cpu(*cell) == 2)
+ return 8;
+
+ return 4;
+}
+
Re: [U-Boot] [PATCH] part2 of arm64. This patch provide u-boot with arm64 support. Currently, it works on Foundation Model for armv8 or Fast Model for armv8.
On Mon, 2013-08-12 at 00:05 +0800, feng...@phytium.com.cn wrote: diff --git a/arch/arm64/cpu/armv8/exceptions.S b/arch/arm64/cpu/armv8/exceptions.S new file mode 100644 index 000..376df49 --- /dev/null +++ b/arch/arm64/cpu/armv8/exceptions.S @@ -0,0 +1,210 @@ +/* + * Copyright (c) 2013FengHua feng...@phytium.com.cn + * + * Based on entry.S of linux kernel by + * Catalin Marinas catalin.mari...@arm.com and + * Will Deacon will.dea...@arm.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. Do you have permission to relicense this as v2 or later? arch/arm64/kernel/entry.S in Linux is licensed v2-only. I doubt you got permission to strip out the ARM Ltd. copyright... -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/p1010rdb-pb: add support for p1010rdb-pb board
On Tue, 2013-08-13 at 16:43 +0800, Shengzhou Liu wrote:
Add support for freescale P1010RDB-PB board.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
board/freescale/p1010rdb/law.c |2 -
board/freescale/p1010rdb/p1010rdb.c | 302
---
board/freescale/p1010rdb/tlb.c |4 -
boards.cfg | 21 +++
include/configs/P1010RDB.h | 111 ++---
5 files changed, 383 insertions(+), 57 deletions(-)
diff --git a/board/freescale/p1010rdb/law.c b/board/freescale/p1010rdb/law.c
index 0045127..ed41a05 100644
--- a/board/freescale/p1010rdb/law.c
+++ b/board/freescale/p1010rdb/law.c
@@ -9,11 +9,9 @@
#include asm/mmu.h
struct law_entry law_table[] = {
-#ifndef CONFIG_SDCARD
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
-#endif
};
If this is applicable to the current board as well (is that
P1010RDB-PA?), then it isn't related to adding PB support and thus
belongs in a separate patch.
+uint pin_mux;
This is too generic for a global variable. Does it even need to be
global?
-#ifndef CONFIG_SDCARD
struct cpld_data {
u8 cpld_ver; /* cpld revision */
+#if defined(CONFIG_P1010RDB)
u8 pcba_ver; /* pcb revision number */
u8 twindie_ddr3;
u8 res1[6];
@@ -51,18 +69,16 @@ struct cpld_data {
u8 por1; /* POR Options */
u8 por2; /* POR Options */
u8 por3; /* POR Options */
+#elif defined(CONFIG_P1010RDB_PB)
+ u8 rom_loc;
+#endif
};
CONFIG_P1010RDB should be defined if CONFIG_P1010RDB_PB is defined.
Define a new CONFIG_P1010RDB_PA (if that's the appropriate name) for
things that are specifically for the older revision.
+#if defined(CONFIG_P1010RDB) defined(DEBUG)
void cpld_show(void)
{
struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
- printf(CPLD: V%x.%x PCBA: V%x.0\n,
- in_8(cpld_data-cpld_ver) 0xF0,
- in_8(cpld_data-cpld_ver) 0x0F,
- in_8(cpld_data-pcba_ver) 0x0F);
Why are you removing this? Where is cpld_show() called?
@@ -246,6 +446,16 @@ void fdt_del_sdhc(void *blob)
}
}
+void fdt_del_ifc(void *blob)
+{
+ int nodeoff = 0;
+
+ while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
+ fsl,ifc)) = 0) {
+ fdt_del_node(blob, nodeoff);
+ }
+}
Is this PB-specific? If no, why is it in this patch? If not, why isn't
the caller guarded by the PB ifdef?
+static int pin_mux_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ if (argc 2)
+ return CMD_RET_USAGE;
+ if (strcmp(argv[1], ifc) == 0)
+ config_board_mux(MUX_TYPE_IFC);
+ else if (strcmp(argv[1], sdhc) == 0)
+ config_board_mux(MUX_TYPE_SDHC);
+ else
+ return CMD_RET_USAGE;
+ return 0;
+}
+
+U_BOOT_CMD(
+ mux, 2, 0, pin_mux_cmd,
+ configure multiplexing pin for IFC/SDHC bus in runtime,
+ bus_type (e.g. mux sdhc)
+);
Are you sure this is a good idea? What happens to the drivers using
said hardware at the time? Granted they should be idle when not running
a command that actively uses them, but still... Usually we use hwconfig
for this sort of thing.
@@ -203,25 +207,24 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_SYS_DDR_INIT_ADDR 0x
#define CONFIG_SYS_DDR_INIT_EXT_ADDR 0x
#define CONFIG_SYS_DDR_MODE_CONTROL 0x
-
#define CONFIG_SYS_DDR_ZQ_CONTROL0x89080600
#define CONFIG_SYS_DDR_SR_CNTR 0x
#define CONFIG_SYS_DDR_RCW_1 0x
#define CONFIG_SYS_DDR_RCW_2 0x
-#define CONFIG_SYS_DDR_CONTROL 0x470C /* Type = DDR3
*/
-#define CONFIG_SYS_DDR_CONTROL_2 0x04401010
+#define CONFIG_SYS_DDR_CONTROL 0xc70c0008 /* Type = DDR3
*/
+#define CONFIG_SYS_DDR_CONTROL_2 0x24401000
#define CONFIG_SYS_DDR_TIMING_4 0x0001
-#define CONFIG_SYS_DDR_TIMING_5 0x03402400
+#define CONFIG_SYS_DDR_TIMING_5 0x02401400
-#define CONFIG_SYS_DDR_TIMING_3_800 0x0002
-#define CONFIG_SYS_DDR_TIMING_0_800 0x00330004
-#define CONFIG_SYS_DDR_TIMING_1_800 0x6f6B4644
+#define CONFIG_SYS_DDR_TIMING_3_800 0x0003
+#define CONFIG_SYS_DDR_TIMING_0_800 0x00110104
+#define CONFIG_SYS_DDR_TIMING_1_800 0x6f6b8644
#define CONFIG_SYS_DDR_TIMING_2_800 0x0FA888CF
#define CONFIG_SYS_DDR_CLK_CTRL_800 0x0300
-#define CONFIG_SYS_DDR_MODE_1_8000x40461520
-#define CONFIG_SYS_DDR_MODE_2_8000x8000c000
+#define CONFIG_SYS_DDR_MODE_1_8000x00441420
+#define CONFIG_SYS_DDR_MODE_2_8000x
#define
Re: [U-Boot] [PATCH 06/10 v5] spl: env_common.c: make CONFIG_SPL_BUILD contain function env_import
Hi, Tom, This patch hasn't been applied? I think it should be applied early and it is needed by other patches of this set. Thanks. -Original Message- From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Tom Rini Sent: Friday, June 28, 2013 5:57 AM To: Wood Scott-B07421 Cc: u-boot@lists.denx.de; Wood Scott-B07421; aflem...@gmail.com; Zhang Ying-B40530 Subject: Re: [U-Boot] [PATCH 06/10 v5] spl: env_common.c: make CONFIG_SPL_BUILD contain function env_import On Thu, Jun 27, 2013 at 03:16:34PM -0500, Scott Wood wrote: On 06/27/2013 07:17:48 AM, Tom Rini wrote: On Thu, Jun 27, 2013 at 02:35:34AM +, Zhang Ying-B40530 wrote: -Original Message- From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Tom Rini [snip] Building for am335x_evm and am335x_evm_usbspl should tell you if it is, or is not. Whacking network support into SPL required more than --gc-sections alone could give us and we needed to drop a few couldn't-ever-reach calls and functionality out. [Zhang Ying] Yes, I tried to build for am335x_evm without this ifdef, no problem. Whether it can be removed? Did you also build am335x_evm_usbspl? It builds OK for me with the ifdef removed. It adds 81 bytes to the SPL. I think we can live with that. Acked-by: Tom Rini tr...@ti.com -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] part1 of arm64. This patch provide u-boot with arm64 support. Currently it works on Foundation Model for armv8 or Fast Model for armv8.
-原始邮件- 发件人: Scott Wood scottw...@freescale.com 发送时间: 2013年8月14日 星期三 收件人: feng...@phytium.com.cn 抄送: u-boot@lists.denx.de, tr...@ti.com 主题: Re: [U-Boot] [PATCH] part1 of arm64. This patch provide u-boot with arm64 support. Currently it works on Foundation Model for armv8 or Fast Model for armv8. On Mon, 2013-08-12 at 00:05 +0800, feng...@phytium.com.cn wrote: From: fenghua fenghua@ligen-virtual-machine.(none) This patch provide u-boot with arm64 support. Currently, it works on Foundation Model for armv8 or Fast Model for armv8. Signed-off-by: fenghua fenghua@ligen-virtual-machine.(none) Could you provide a proper signoff (full name and valid e-mail address)? I will fix it. --- arch/arm64/config.mk | 32 +++ arch/arm64/lib/Makefile | 64 + arch/arm64/lib/board.c | 456 ++ arch/arm64/lib/bootm.c | 211 arch/arm64/lib/cache.c | 282 + arch/arm64/lib/crt0.S| 129 ++ arch/arm64/lib/interrupts.c | 109 arch/arm64/lib/relocate.S| 72 ++ arch/arm64/lib/reset.c | 37 +++ arch/arm64/lib/timer.c | 95 +++ board/armltd/dts/vexpress64.dts | 215 board/armltd/vexpress64/Makefile | 43 board/armltd/vexpress64/vexpress64.c | 63 + boards.cfg |1 + common/cmd_bdinfo.c | 32 +++ common/fdt_support.c | 66 ++--- common/image.c |5 +- doc/README.arm64 | 10 + examples/standalone/stubs.c | 13 + include/configs/vexpress_aemv8a.h| 200 +++ include/image.h |1 + lib/asm-offsets.c|2 +- 22 files changed, 2103 insertions(+), 35 deletions(-) create mode 100644 arch/arm64/config.mk create mode 100644 arch/arm64/lib/Makefile create mode 100644 arch/arm64/lib/board.c create mode 100644 arch/arm64/lib/bootm.c create mode 100644 arch/arm64/lib/cache.c create mode 100644 arch/arm64/lib/crt0.S create mode 100644 arch/arm64/lib/interrupts.c create mode 100644 arch/arm64/lib/relocate.S create mode 100644 arch/arm64/lib/reset.c create mode 100644 arch/arm64/lib/timer.c create mode 100644 board/armltd/dts/vexpress64.dts create mode 100644 board/armltd/vexpress64/Makefile create mode 100644 board/armltd/vexpress64/vexpress64.c create mode 100644 doc/README.arm64 create mode 100644 include/configs/vexpress_aemv8a.h It would be nice if the patches were separated into arch support, core support, board support, anything specific to the foundation/fast models, etc. Actually, I prefered to generate one patch file. but, it's size is out of 100KB. so, I split it to two part. I will try to generate patch as you recommended. diff --git a/arch/arm64/config.mk b/arch/arm64/config.mk new file mode 100644 index 000..e40e983 --- /dev/null +++ b/arch/arm64/config.mk Does there really need to be a separate arch/arm64? I know this is what Linux does, but on every other 32/64 architecture that decision has been eventually reversed (even on x86, which has about as much difference between 32 and 64 bit as ARM does). We started working on armv8 U-Boot using a unified arch/arm, and at least got to the point of something that builds, so it doesn't seem impractical. Besides making maintenance easier, it would also make it much easier to review what is being done differently for arm64 (and for any files that do need to be moved or copied, be sure to pass -M -C to git format-patch). The porting is performed as a seperate architecture due to a few considerations, 1. The porting will be simple and clear. There's no need to touch any original ARM code and less macro switch is needed. 2. There's no any real chip of armv8 until now. Many aspect of armv8 are not completely confirmed. Of course, it could be merged with ARM at a proper time in the later. Actually, linux kernel follow this mode. @@ -0,0 +1,32 @@ +# +# Copyright (c) 2013 FengHua feng...@phytium.com.cn +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should
