[XFree86] x not listing the pci Bus 1 I/O range:

2008-07-01 Thread vishnuvaradan vishnuvaradan
Hi all

Iam using a Pmc graphics card on a base board with ppc processor along with
tundra system controller. On  pci  bus
(II) PCI: 00:00:0: chip 10e3,0148 - vme
(II) PCI: 00:02:0: chip 10b5,6520 - pci to pci bridge
(II) PCI: 01:03:0: chip 126f,0720 - Pmc card

my var/log file gives

(II) Bus 1 non-prefetchable memory range:
[0] -1  0   0x9bf0 - 0x9fff (0x410) MX[B]
(II) Bus 1 prefetchable memory range:
[0] -1  0   0x9be0 - 0x9bef (0x10) MX[B]
(II) Host-to-PCI bridge:
(II) Bus 0: bridge is at (0:0:0), (0,0,0), BCTRL: 0x0008 (VGA_EN is set)
(II) Bus 0 I/O range:
[0] -1  0   0x - 0x00ff (0x100) IX[B]
(II) Bus 0 non-prefetchable memory range:
[0] -1  0   0x - 0x (0x0) MX[B]
(II) Bus 0 prefetchable memory range:
[0] -1  0   0x - 0x (0x0) MX[B]
(--) PCI:*(1:3:0) Silicon Motion, Inc. SM720 Lynx3DM rev 193, Mem @
0x9c00/26

Its NOT listing the I/o resource range for the bus1 .. what i expect like
this is NOT LISTING
--
(II) Bus 1 I/O range:
[0] -1  0   0xf200 - 0xf2000fff (0x1000) IX[B]

1. Please help me to solve the above issue
2. I have another query.. If suppose i want to access the io reg from the
xfree driver shall i use the addr 0xf200 directly or any io remapping is
required for  0xf200? if required please help me how to do it ..

I have also attached the log file

Thanks in advance


log file.log
Description: Binary data


Re: [XFree86] x not listing the pci Bus 1 I/O range:

2008-07-01 Thread Marc Aurele La France

On Tue, 1 Jul 2008, vishnuvaradan vishnuvaradan wrote:


Iam using a Pmc graphics card on a base board with ppc processor along with
tundra system controller. On  pci  bus
(II) PCI: 00:00:0: chip 10e3,0148 - vme
(II) PCI: 00:02:0: chip 10b5,6520 - pci to pci bridge
(II) PCI: 01:03:0: chip 126f,0720 - Pmc card



my var/log file gives



(II) Bus 1 non-prefetchable memory range:
   [0] -1  0   0x9bf0 - 0x9fff (0x410) MX[B]
(II) Bus 1 prefetchable memory range:
   [0] -1  0   0x9be0 - 0x9bef (0x10) MX[B]
(II) Host-to-PCI bridge:
(II) Bus 0: bridge is at (0:0:0), (0,0,0), BCTRL: 0x0008 (VGA_EN is set)
(II) Bus 0 I/O range:
   [0] -1  0   0x - 0x00ff (0x100) IX[B]
(II) Bus 0 non-prefetchable memory range:
   [0] -1  0   0x - 0x (0x0) MX[B]
(II) Bus 0 prefetchable memory range:
   [0] -1  0   0x - 0x (0x0) MX[B]
(--) PCI:*(1:3:0) Silicon Motion, Inc. SM720 Lynx3DM rev 193, Mem @
0x9c00/26



Its NOT listing the I/o resource range for the bus1 .. what i expect like
this is NOT LISTING
--
(II) Bus 1 I/O range:
   [0] -1  0   0xf200 - 0xf2000fff (0x1000) IX[B]



1. Please help me to solve the above issue


It seems likely that the bridge at 0:2:0 is not, in reality, forwarding I/O 
transactions to bus 1 because the I/O enable bit in its command register is 
off.  The output from `scanpci -v` would confirm this.


In any case, I strongly suspect that 0xf2000xxx I/O range to be completely 
useless to the Lynx3DM board.  As such, you have a system whose designers 
wrong-headedly decided to cripple PCI I/O.


Your options seem to be ...

1) Hack the driver to not reference fixed I/O resources (likely in the
   0x3B0-0x3DF range).  Such a change would not be accepted unless it was
   contolled by an option.
2) Replace the Lynx3DM with a board that does not need VGA resources.


2. I have another query.. If suppose i want to access the io reg from the
xfree driver shall i use the addr 0xf200 directly or any io remapping is
required for  0xf200? if required please help me how to do it ..


I've already pointed you to xf86EnableIO() in os-support/linux/lnx_video.c. 
But I really don't think relocating the driver's I/O to 0xf200 will solve 
anything.


Marc.

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