3-stefa...@redhat.com>
Reviewed-by: Kevin Wolf
Acked-by: Daniel P. Berrangé
Signed-off-by: Kevin Wolf
Commit: 36c1febe3f34ae38db375865b7841165d76cdae4
https://github.com/qemu/qemu/commit/36c1febe3f34ae38db375865b7841165d76cdae4
Author: Richard Henderson
Date: 2024-06-12 (W
On 6/11/24 07:24, Paolo Bonzini wrote:
The following changes since commit 80e8f0602168f451a93e71cbb1d59e93d745e62e:
Merge tag 'bsd-user-misc-2024q2-pull-request' of gitlab.com:bsdimp/qemu into
staging (2024-06-09 11:21:55 -0700)
are available in the Git repository at:
6/tcg/emit.c.inc
Log Message:
---
target/i386: remove CPUX86State argument from generator functions
CPUX86State argument would only be used to fetch bytes, but that has to be
done before the generator function is called. So remove it, and all
temptation together with it.
Reviewed-by:
On 6/10/24 10:13, Stefan Hajnoczi wrote:
The following changes since commit 80e8f0602168f451a93e71cbb1d59e93d745e62e:
Merge tag 'bsd-user-misc-2024q2-pull-request' of gitlab.com:bsdimp/qemu into
staging (2024-06-09 11:21:55 -0700)
are available in the Git repository at:
Signed-off-by: Stefan Hajnoczi
Commit: f3e8cc47de2bc537d4991e883a85208e4e1c0f98
https://github.com/qemu/qemu/commit/f3e8cc47de2bc537d4991e883a85208e4e1c0f98
Author: Richard Henderson
Date: 2024-06-12 (Wed, 12 Jun 2024)
Changed paths:
M backends/tpm/tpm_util.c
M backends
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: f3e8cc47de2bc537d4991e883a85208e4e1c0f98
https://github.com/qemu/qemu/commit/f3e8cc47de2bc537d4991e883a85208e4e1c0f98
Author: Richard Henderson
Date: 2024-06-12 (Wed, 12 Jun 2024)
Changed paths:
M
On 6/12/24 07:36, Alex Bennée wrote:
What happens when the CPU is running mixed mode code and jumping between
64 and 32 bit? Wouldn't it be easier to have a helper that routes to the
correct unwinder, c.f. gen_intermediate_code
GDB can't switch modes, so there is *never* any mode switching.
arget/i386/tcg/emit.c.inc
Log Message:
---
target/i386: remove CPUX86State argument from generator functions
CPUX86State argument would only be used to fetch bytes, but that has to be
done before the generator function is called. So remove it, and all
temptation together with it.
Reviewed-by
On 6/9/24 09:55, Warner Losh wrote:
The following changes since commit 3e246da2c3f85298b52f8a1154b832acf36aa656:
Merge tag 'for-upstream' ofhttps://gitlab.com/bonzini/qemu into staging
(2024-06-08 07:40:08 -0700)
are available in the Git repository at:
g...@gitlab.com:bsdimp/qemu.git
.
Signed-off-by: Warner Losh
Reviewed-by: Richard Henderson
Commit: ba379542bf026313d3c6aa1b46da3f2520927a4f
https://github.com/qemu/qemu/commit/ba379542bf026313d3c6aa1b46da3f2520927a4f
Author: Warner Losh
Date: 2024-06-09 (Sun, 09 Jun 2024)
Changed paths:
M bsd-user/main.c
.
Signed-off-by: Warner Losh
Reviewed-by: Richard Henderson
Commit: ba379542bf026313d3c6aa1b46da3f2520927a4f
https://github.com/qemu/qemu/commit/ba379542bf026313d3c6aa1b46da3f2520927a4f
Author: Warner Losh
Date: 2024-06-09 (Sun, 09 Jun 2024)
Changed paths:
M bsd-user/main.c
ino
Reviewed-by: Richard Henderson
Reviewed-by: Taylor Simpson
Reviewed-by: Brian Cain
Message-Id:
<277b7aeda2c717a96d4dde936b3ac77707cb6517.1714755107.git.quic_mathb...@quicinc.com>
Signed-off-by: Brian Cain
Commit: 49c1f7a472ebff23b4f374a1d5201250f3fdbd76
https://github.c
On 6/9/24 11:11, Chinmay Rath wrote:
The calculation of effective address in these instructions is slightly different than the
others,
for which helper function exist :
EA for these insns : EA ← (RA=0) ? 0 : GPR[RA]
EA for rest storage access insns : EA ← ((RA=0) ? 0 : GPR[RA]) + GPR[RB]
This
On 6/8/24 17:56, Brian Cain wrote:
The following changes since commit 3e246da2c3f85298b52f8a1154b832acf36aa656:
Merge tag 'for-upstream' ofhttps://gitlab.com/bonzini/qemu into staging
(2024-06-08 07:40:08 -0700)
are available in the Git repository at:
https://github.com/quic/qemu
ino
Reviewed-by: Richard Henderson
Reviewed-by: Taylor Simpson
Reviewed-by: Brian Cain
Message-Id:
<277b7aeda2c717a96d4dde936b3ac77707cb6517.1714755107.git.quic_mathb...@quicinc.com>
Signed-off-by: Brian Cain
Commit: 49c1f7a472ebff23b4f374a1d5201250f3fdbd76
https://github.c
On 6/8/24 01:33, Paolo Bonzini wrote:
The following changes since commit f1572ab94738bd5787b7badcd4bd93a3657f0680:
Merge tag 'for-upstream' ofhttps://gitlab.com/bonzini/qemu into staging
(2024-06-05 07:45:23 -0700)
are available in the Git repository at:
deletions(-)
Reviewed-by: Richard Henderson
r~
On 6/8/24 01:41, Paolo Bonzini wrote:
It is already checked before getting there.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 26 --
1 file changed, 8 insertions(+), 18 deletions(-)
Reviewed-by: Richard Henderson
r~
+++-
1 file changed, 3 insertions(+), 9 deletions(-)
Reviewed-by: Richard Henderson
r~
On 6/8/24 01:41, Paolo Bonzini wrote:
Group them so that it is easier to figure out which two-byte opcodes to
tackle together.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 18 ++
1 file changed, 18 insertions(+)
Reviewed-by: Richard Henderson
r~
/i386/tcg/translate.c | 152 +--
target/i386/tcg/decode-new.c.inc | 44 -
target/i386/tcg/emit.c.inc | 2 +-
4 files changed, 94 insertions(+), 118 deletions(-)
Reviewed-by: Richard Henderson
r~
deletions(-)
Reviewed-by: Richard Henderson
r~
deletions(-)
Acked-by: Richard Henderson
r~
4 files changed, 132 insertions(+), 76 deletions(-)
Reviewed-by: Richard Henderson
r~
hanged, 48 insertions(+), 83 deletions(-)
Reviewed-by: Richard Henderson
r~
egs[R_ECX] as the
shift count.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/emit.c.inc | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
Reviewed-by: Richard Henderson
r~
++---
1 file changed, 14 insertions(+), 41 deletions(-)
Reviewed-by: Richard Henderson
r~
On 6/8/24 01:41, Paolo Bonzini wrote:
-if (mod != 3) {
-AddressParts a = gen_lea_modrm_0(env, s, modrm);
-/* specific case: we need to add a displacement */
-gen_exts(ot, s->T1);
-tcg_gen_sari_tl(s->tmp0, s->T1, 3 + ot);
-
changed, 202 insertions(+), 168 deletions(-)
Reviewed-by: Richard Henderson
r~
files changed, 13 insertions(+), 4 deletions(-)
Acked-by: Richard Henderson
r~
On 6/8/24 01:40, Paolo Bonzini wrote:
All other control registers are stored plainly in CPUX86State.
s/stored/read/
Reviewed-by: Richard Henderson
r~
E(DisasContext *s, X86DecodedInsn *decode)
+{
+if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
+gen_NM_exception(s);
+}
+gen_helper_fxsave(tcg_env, s->A0);
+}
You want else's here, to not emit fxsave/restore after raising NM.
Otherwise,
Reviewed-by: Richard Henderson
r~
On 6/8/24 01:40, Paolo Bonzini wrote:
Aesthetic change only.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 93
1 file changed, 46 insertions(+), 47 deletions(-)
Reviewed-by: Richard Henderson
r~
+++--
target/i386/tcg/emit.c.inc | 20 +++-
3 files changed, 68 insertions(+), 84 deletions(-)
Reviewed-by: Richard Henderson
r~
On 6/8/24 01:40, Paolo Bonzini wrote:
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 1 +
target/i386/tcg/decode-new.c.inc | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
Reviewed-by: Richard Henderson
r~
changed, 9 insertions(+), 11 deletions(-)
Reviewed-by: Richard Henderson
r~
* instructions.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 48
target/i386/tcg/emit.c.inc | 2 +-
2 files changed, 25 insertions(+), 25 deletions(-)
Reviewed-by: Richard Henderson
r~
/sextT0.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 6 +++---
target/i386/tcg/emit.c.inc | 34
2 files changed, 20 insertions(+), 20 deletions(-)
Acked-by: Richard Henderson
r~
+---
2 files changed, 11 insertions(+), 17 deletions(-)
Reviewed-by: Richard Henderson
r~
fusing... :-)
Otherwise,
Reviewed-by: Richard Henderson
r~
+-
target/i386/tcg/decode-new.c.inc | 4 +-
target/i386/tcg/emit.c.inc | 572 +++
3 files changed, 289 insertions(+), 289 deletions(-)
Yay!
Reviewed-by: Richard Henderson
r~
On 6/6/24 07:02, Don Porter wrote:
+/**
+ * get_pte - Copy the contents of the page table entry at node[i] into
pt_entry.
+ * Optionally, add the relevant bits to the virtual address in
+ * vaddr_pte.
+ *
+ * @cs - CPU state
+ * @node - physical address of the current page
On 6/6/24 07:02, Don Porter wrote:
+/**
+ * _for_each_pte - recursive helper function
+ *
+ * @cs - CPU state
+ * @fn(cs, data, pte, vaddr, height) - User-provided function to call on each
+ * pte.
+ * * @cs - pass through cs
+ * * @data - user-provided,
, 49 insertions(+), 54 deletions(-)
Reviewed-by: Richard Henderson
r~
On 6/6/24 21:25, Warner Losh wrote:
Warner Losh (3):
linux-user: Adjust comment to reflect the code.
bsd-user: port linux-user:ff8a8bbc2ad1 for variable page sizes
bsd-user: Catch up to run-time reserved_va math
Reviewed-by: Richard Henderson
r~
;rc ? cpu_crf[6] : tcg_temp_new_i32();
helper(dest, ...)
Anyway,
Reviewed-by: Richard Henderson
r~
On 6/7/24 07:49, Chinmay Rath wrote:
+static bool do_ld_st_vl(DisasContext *ctx, arg_X *a,
+void (*helper)(TCGv_ptr, TCGv, TCGv_ptr, TCGv))
+{
+TCGv EA;
+TCGv_ptr xt;
+if (a->rt < 32) {
+REQUIRE_VSX(ctx);
+} else {
+REQUIRE_VECTOR(ctx);
+
On 6/6/24 07:02, Don Porter wrote:
Signed-off-by: Don Porter
---
target/i386/arch_memory_mapping.c| 44 +++-
target/i386/cpu.h| 5 +-
target/i386/helper.c | 374 +++
target/i386/tcg/sysemu/excp_helper.c | 2 +-
4 files
On 6/6/24 07:02, Don Porter wrote:
Signed-off-by: Don Porter
---
target/i386/cpu.h| 42 ++
target/i386/helper.c | 515 +
target/i386/tcg/sysemu/excp_helper.c | 555 +--
3 files changed, 562 insertions(+),
deletions(-)
Because the ops are identical,
Reviewed-by: Richard Henderson
But you really should update these to use tcg_gen_qemu_ld/st_i128 with the proper
atomicity flags. This will fix an existing bug...
+static bool trans_LXVD2X(DisasContext *ctx, arg_LXVD2X *a)
{
TCGv EA
On 6/7/24 03:14, Jim Shu wrote:
Support 4-byte atomic instruction fetch when instruction is natural
aligned.
Current implementation is not atomic because it loads instruction twice
for first and last 2 bytes. We load 4 bytes at once to keep the
atomicity. This instruction preload method only
On 6/5/24 21:00, maobibo wrote:
No, because the ifdef checks that the *compiler* is prepared to use LASX/LSX
instructions itself without further checks. There's no point in qemu checking further.
By my understanding, currently compiler option is the same with all files, there is no
separate
#1: 4KB24050 MB/sec
# buffer_is_zero #1: 16KB38082 MB/sec
# buffer_is_zero #1: 64KB36399 MB/sec
#
# buffer_is_zero #2: 1KB 8026 MB/sec
# buffer_is_zero #2: 4KB15493 MB/sec
# buffer_is_zero #2: 16KB20865 MB/sec
# buffer_is_zero #2: 64KB19694 MB/sec
r~
Richard H
Split out host/bufferiszero.h.inc for x86, aarch64 and generic
in order to avoid an overlong ifdef ladder.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
util/bufferiszero.c | 191 +--
host/include/aarch64/host
Use inline assembly because no release compiler allows
per-function selection of the ISA.
Signed-off-by: Richard Henderson
---
.../loongarch64/host/bufferiszero.c.inc | 143 ++
1 file changed, 143 insertions(+)
create mode 100644 host/include/loongarch64/host
On 6/5/24 21:01, Song Gao wrote:
The following changes since commit db2feb2df8d19592c9859efb3f682404e0052957:
Merge tag 'pull-misc-20240605' ofhttps://gitlab.com/rth7680/qemu into
staging (2024-06-05 14:17:01 -0700)
are available in the Git repository at:
--
target/loongarch: fix a wrong print in cpu dump
description:
loongarch_cpu_dump_state() want to dump all loongarch cpu
state registers, but there is a tiny typographical error when
printing "PRCFG2".
Cc: qemu-sta...@nongnu.org
Signed-off-by: lanyanzhi
Reviewed-by: Richard Henderso
--
target/loongarch: fix a wrong print in cpu dump
description:
loongarch_cpu_dump_state() want to dump all loongarch cpu
state registers, but there is a tiny typographical error when
printing "PRCFG2".
Cc: qemu-sta...@nongnu.org
Signed-off-by: lanyanzhi
Reviewed-by: Richard Henderso
On 6/6/24 04:50, Alex Bennée wrote:
The following changes since commit db2feb2df8d19592c9859efb3f682404e0052957:
Merge tag 'pull-misc-20240605' ofhttps://gitlab.com/rth7680/qemu into
staging (2024-06-05 14:17:01 -0700)
are available in the Git repository at:
and the related
ansible setup bits.
We still have centos9 docker images build and test.
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20240603175328.3823123-2-alex.ben...@linaro.org>
Commit: cc1d2e04d516da0e1c2e4e99aedf86c5688bd845
https://github.com/qemu/qemu/
(uint32_t)(b32 < 0 ? INT32_MAX : INT32_MIN) | (-1ull << 32);
}
-a64 /= b;
+a64 /= b32;
r = a64;
if (unlikely(r != a64)) {
return (uint32_t)(a64 < 0 ? INT32_MIN : INT32_MAX) | (-1ull << 32);
Oops.
Reviewed-by: Richard Henderson
r~
and the related
ansible setup bits.
We still have centos9 docker images build and test.
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20240603175328.3823123-2-alex.ben...@linaro.org>
Commit: cc1d2e04d516da0e1c2e4e99aedf86c5688bd845
https://github.com/qem
On 6/5/24 23:51, Philippe Mathieu-Daudé wrote:
Shouldn't we remove the definitions from the source to
complete the "split"?
Gah, I thought I had done that.
r~
On 6/6/24 01:27, Andreas Schwab wrote:
Which ruby?
$ ruby --version
ruby 3.3.1 (2024-04-23 revision c56cd86388) [x86_64-linux-gnu]
ruby 3.0.2p107 (2021-07-07 revision 0db68f0233) [x86_64-linux-gnu]
That might have been handy to have with your original report.
r~
Split out host/bufferiszero.h.inc for x86, aarch64 and generic
in order to avoid an overlong ifdef ladder.
Signed-off-by: Richard Henderson
---
host/include/aarch64/host/bufferiszero.h.inc | 76
host/include/generic/host/bufferiszero.h.inc | 10 +
host/include/i386/host
On 6/5/24 20:45, Zhao Liu wrote:
@@ -1710,7 +1710,9 @@ void sev_es_set_reset_vector(CPUState *cpu)
{
X86CPU *x86;
CPUX86State *env;
-SevCommonState *sev_common = SEV_COMMON(MACHINE(qdev_get_machine())->cgs);
+ConfidentialGuestSupport *cgs = MACHINE(qdev_get_machine())->cgs;
On 6/5/24 20:36, maobibo wrote:
static biz_accel_fn const accel_table[] = {
buffer_is_zero_int_ge256,
#ifdef __loongarch_sx
buffer_is_zero_lsx,
#endif
#ifdef __loongarch_asx
buffer_is_zero_lasx,
#endif
};
static unsigned best_accel(void)
{
#ifdef __loongarch_asx
/* lasx may
Reviewed-by: Alex Bennée
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
target/i386/gdb-internal.h | 65 ++
target/i386/gdbstub.c | 1 +
2 files changed, 66 insertions(+)
create mode 100644 target/i386/gdb-internal.h
diff --git
This is a generalization of cpu_compute_eflags, with a dynamic
value of cc_op, and is thus tcg specific.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
target/i386/cpu.h | 2 ++
target/i386/tcg/cc_helper.c | 10 ++
2 files changed, 12 insertions(+)
diff
Store a host code address to use with the tcg unwinder when called
from a plugin. Generate one such store per guest insn that uses
a plugin callback.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
include/hw/core/cpu.h | 4 +---
accel/tcg/plugin-gen.c | 49
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
target/i386/tcg/tcg-cpu.c | 72 ++-
1 file changed, 56 insertions(+), 16 deletions(-)
diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c
index cca19cd40e..2370053df2 100644
w to avoid the extra code duplication. :-)
r~
Richard Henderson (9):
tcg: Introduce INDEX_op_plugin_pc
accel/tcg: Set CPUState.plugin_ra before all plugin callbacks
accel/tcg: Return the TranslationBlock from cpu_unwind_state_data
plugins: Introduce TCGCPUOps callbacks for mid-tb regi
Adjust the i386 get_memio_eip function to use tb->cflags instead
of tcg_cflags_has, which is technically more correct.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
include/exec/cpu-common.h | 9 +
accel/tcg/translate-all.c | 9 +
target/i386/helpe
For the moment, this is an exact copy of arm_tcg_ops.
Export arm_cpu_exec_interrupt for the cross-file reference.
Signed-off-by: Richard Henderson
---
target/arm/internals.h | 1 +
target/arm/cpu.c | 2 +-
target/arm/cpu64.c | 30 ++
3 files changed, 32
Signed-off-by: Richard Henderson
---
target/arm/internals.h | 7 +--
target/arm/cpu.c | 38 ++
target/arm/cpu64.c | 25 +
target/arm/tcg/cpu-v7m.c | 2 ++
4 files changed, 70 insertions(+), 2 deletions(-)
diff
callbacks.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
include/hw/core/tcg-cpu-ops.h | 14 ++
plugins/api.c | 36 +--
2 files changed, 48 insertions(+), 2 deletions(-)
diff --git a/include/hw/core/tcg-cpu-ops.h b
Add an opcode to find a code address within the current insn,
for later use with unwinding. Generate the code generically
using tcg_reg_alloc_do_movi.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Richard Henderson
---
include/tcg/tcg-op-common.h | 1 +
include/tcg/tcg-opc.h | 1 +
tcg
On 6/5/24 20:18, Richard Henderson wrote:
On 6/5/24 19:30, maobibo wrote:
On 2024/6/6 上午7:51, Richard Henderson wrote:
On 6/5/24 02:32, Bibo Mao wrote:
Different gcc versions have different features, macro CONFIG_LSX_OPT
and CONFIG_LASX_OPT is added here to detect whether gcc supports
built
On 6/5/24 19:30, maobibo wrote:
On 2024/6/6 上午7:51, Richard Henderson wrote:
On 6/5/24 02:32, Bibo Mao wrote:
Different gcc versions have different features, macro CONFIG_LSX_OPT
and CONFIG_LASX_OPT is added here to detect whether gcc supports
built-in lsx/lasx macro.
Function
On 6/5/24 16:34, Michael S. Tsirkin wrote:
Dropped acpi patches that had endian-ness issues.
The following changes since commit 60b54b67c63d8f076152e0f7dccf39854dfc6a77:
Merge tag 'pull-lu-20240526' of https://gitlab.com/rth7680/qemu into staging
(2024-05-26 17:51:00 -0700)
are available
On 6/5/24 14:15, Richard Henderson wrote:
The following changes since commit f1572ab94738bd5787b7badcd4bd93a3657f0680:
Merge tag 'for-upstream' ofhttps://gitlab.com/bonzini/qemu into staging
(2024-06-05 07:45:23 -0700)
are available in the Git repository at:
https://gitlab.com/rth7680
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 53ee5f551e5743516c90a662425276cae4cf0aeb
https://github.com/qemu/qemu/commit/53ee5f551e5743516c90a662425276cae4cf0aeb
Author: Richard Henderson
Date: 2024-06-05 (Wed, 05 Jun 2024)
Changed paths:
M hw
On 6/5/24 02:32, Bibo Mao wrote:
Different gcc versions have different features, macro CONFIG_LSX_OPT
and CONFIG_LASX_OPT is added here to detect whether gcc supports
built-in lsx/lasx macro.
Function buffer_zero_lsx() is added for 128bit simd fpu optimization,
and function buffer_zero_lasx()
On 6/5/24 02:14, Andreas Schwab wrote:
$ qemu-x86_64 --version
qemu-x86_64 version 9.0.50 (v9.0.0-1211-gd16cab541a)
Copyright (c) 2003-2024 Fabrice Bellard and the QEMU Project developers
$ cat fork.rb
begin
r, w = IO.pipe
if pid1 = fork
w.close
r.read 1
Process.kill "USR1",
These are not booleans, but masks.
Fixes: f86fd4d8721 ("plugins: distinct types for callbacks")
Signed-off-by: Richard Henderson
---
accel/tcg/plugin-gen.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
index
v1: 20220906101747.344559-1-richard.hender...@linaro.org
A lot has changed in the 20 months since, including generic
cleanups and splitting out the PER fixes.
r~
Richard Henderson (10):
target/s390x: Change help_goto_direct to work on displacements
target/s390x: Introduce
This is slightly more complicated than a straight displacement
for 31 and 24-bit modes. Dont bother with a cant-happen assert.
Reviewed-by: Ilya Leoshkevich
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate.c | 20 +++-
1 file changed, 11 insertions(+), 9
Replace manual masking and oring with deposits.
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate.c | 32
1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 2654c85a8e
All callers pass s->pc_tmp.
Reviewed-by: Ilya Leoshkevich
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/
In preparation for TARGET_TB_PCREL, reduce reliance on absolute values.
Reviewed-by: Ilya Leoshkevich
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate.c | 25 +++--
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/target/s390x/tcg/translate.c b
When changing modes via SAM, we raise a specification exception if the
new PC is out of range. The masking in s390x_tr_init_disas_context
was too late to be correct, but may be removed. Add a debugging
assert in cpu_get_tb_cpu_state.
Reviewed-by: Ilya Leoshkevich
Signed-off-by: Richard
Remove the remaining uses of pc_tmp, and remove the variable.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Ilya Leoshkevich
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate.c | 28
1 file changed, 8 insertions(+), 20 deletions(-)
diff --git
Signed-off-by: Richard Henderson
---
target/s390x/cpu.c | 17 +
target/s390x/tcg/translate.c | 71 +++-
2 files changed, 62 insertions(+), 26 deletions(-)
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index c786767bd1..9f03190c35 100644
Complicated because we may now require a runtime jump.
Reviewed-by: Ilya Leoshkevich
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate.c | 39 +---
1 file changed, 27 insertions(+), 12 deletions(-)
diff --git a/target/s390x/tcg/translate.c b
In preparation for CF_PCREL, reduce reliance on absolute values.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Ilya Leoshkevich
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/target/s390x/tcg
Trivial but non-mechanical conversion away from pc_tmp.
Reviewed-by: Ilya Leoshkevich
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target/s390x/tcg/translate.c b
Use a printf format instead of sprintf into a buffer.
Signed-off-by: Richard Henderson
Reviewed-by: Pierrick Bouvier
Message-Id: <20240412073346.458116-20-richard.hender...@linaro.org>
---
disas/microblaze.c | 22 +-
1 file changed, 5 insertions(+), 17 deletions(-)
Generalize the current 1 byte unit and 4 byte blocking
within the output.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20240412073346.458116-5-richard.hender...@linaro.org>
---
include/qemu/cutils.h | 6 +-
hw/virtio/vhost-vdpa.c | 2 +-
Allocate a new, or append to an existing GString instead of
using a fixed sized buffer. Require the caller to determine
the length of the line -- do not bound len here.
Signed-off-by: Richard Henderson
Message-Id: <20240412073346.458116-4-richard.hender...@linaro.org>
---
include/qemu/cu
Unify the code blocks that try to print a symbolic address.
Signed-off-by: Richard Henderson
Reviewed-by: Pierrick Bouvier
Message-Id: <20240412073346.458116-15-richard.hender...@linaro.org>
---
disas/microblaze.c | 89 +++---
1 file chang
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