[openssl/openssl] 793298: Drop the old PGP key fingerprint

2024-06-06 Thread Richard Levitte
Branch: refs/heads/openssl-3.0 Home: https://github.com/openssl/openssl Commit: 793298a6d8d58ec6a4f412fa876371694252a19c https://github.com/openssl/openssl/commit/793298a6d8d58ec6a4f412fa876371694252a19c Author: Richard Levitte Date: 2024-06-06 (Thu, 06 Jun 2024) Changed

[openssl/openssl] a9fa07: Drop the old PGP key fingerprint

2024-06-06 Thread Richard Levitte
Branch: refs/heads/master Home: https://github.com/openssl/openssl Commit: a9fa07f47cea6a43d5ac4a3aa336ab34756c2e9b https://github.com/openssl/openssl/commit/a9fa07f47cea6a43d5ac4a3aa336ab34756c2e9b Author: Richard Levitte Date: 2024-06-06 (Thu, 06 Jun 2024) Changed paths

[openssl/openssl] 42d56b: Drop the old PGP key fingerprint

2024-06-06 Thread Richard Levitte
Branch: refs/heads/openssl-3.1 Home: https://github.com/openssl/openssl Commit: 42d56b8a839a6f924ffe3c69605901b4d57db8a7 https://github.com/openssl/openssl/commit/42d56b8a839a6f924ffe3c69605901b4d57db8a7 Author: Richard Levitte Date: 2024-06-06 (Thu, 06 Jun 2024) Changed

Re: [PATCH v7] Match: Support more form for scalar unsigned SAT_ADD

2024-06-06 Thread Richard Biener
e _p0 = build2 (gimple_cond_code (_ct_1), boolean_type_node, >_cond_lhs_1, _cond_rhs_1); > bool _arg_0_is_true_1 = gimple_phi_arg_edge (_a1, 0)->flags & > EDGE_TRUE_VALUE; > tree _p1 = gimple_phi_arg_def (_a1, _arg_0_is_true

[PATCH] Add SLP_TREE_MEMORY_ACCESS_TYPE

2024-06-06 Thread Richard Biener
It turns out target costing code looks at STMT_VINFO_MEMORY_ACCESS_TYPE to identify operations from (emulated) gathers for example. This doesn't work for SLP loads since we do not set STMT_VINFO_MEMORY_ACCESS_TYPE there as the vectorization strathegy might differ between different stmt uses. It

Re: Appendix border lines painting cross document border

2024-06-06 Thread Richard Kimberly Heck
On 6/6/24 08:44, Jean-Marc Lasgouttes wrote: Le 04/06/2024 à 10:02, Pavel Sanda a écrit : Hi, just a small painting issue: 1. start new file 2. document -> start appendix here 3. type anything 4. the border lines stretch below the end of document 5. it get's fixed byt enter 6. type again ->

Re: quotes around argument of PackageOptions

2024-06-06 Thread Richard Kimberly Heck
On 6/6/24 01:01, Jürgen Spitzmüller wrote: Am Donnerstag, dem 06.06.2024 um 00:19 +0300 schrieb Udicoudco: I attached a file that compiles with 2.3.x but not with 2.4.0. If I remove the quotes around the second argument of PackageOptions then LyX 2.3.7 complains that the layout is invalid, and

[PATCH] RISC-V: Handle non-grouped stores as single-lane SLP

2024-06-06 Thread Richard Biener
The following enables single-lane loop SLP discovery for non-grouped stores and adjusts vectorizable_store to properly handle those. For gfortran.dg/vect/vect-8.f90 we vectorize one additional loop, not running into the "not falling back to strided accesses" bail-out. I have not investigated in

Re: [PATCH] aarch64: Add fix_truncv4sfv4hi2 pattern [PR113882]

2024-06-06 Thread Richard Biener
On Thu, 6 Jun 2024, Richard Sandiford wrote: > Pengxuan Zheng writes: > > This patch adds the fix_truncv4sfv4hi2 (V4SF->V4HI) pattern which is > > implemented > > using fix_truncv4sfv4si2 (V4SF->V4SI) and then truncv4siv4hi2 (V4SI->V4HI). > > > >

[jira] [Commented] (MNG-7868) "Could not acquire lock(s)" error in concurrent maven builds

2024-06-06 Thread Richard Eckart de Castilho (Jira)
[ https://issues.apache.org/jira/browse/MNG-7868?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel=17852783#comment-17852783 ] Richard Eckart de Castilho commented on MNG-7868: - The bnd plugin version used here

[jira] [Commented] (MNG-7868) "Could not acquire lock(s)" error in concurrent maven builds

2024-06-06 Thread Richard Eckart de Castilho (Jira)
[ https://issues.apache.org/jira/browse/MNG-7868?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel=17852776#comment-17852776 ] Richard Eckart de Castilho commented on MNG-7868: - {noformat

Re: [PATCH] aarch64: Add fix_truncv4sfv4hi2 pattern [PR113882]

2024-06-06 Thread Richard Sandiford
/aarch64-simd.md (fix_truncv4sfv4hi2): New pattern. Could we handle this by extending the target-independent code instead? Richard mentioned in comment 1 that the current set of intermediate conversions is hard-coded, but it didn't sound like he was implying that the set shouldn't change. Thanks

Re: [PATCH] aarch64: Add missing ACLE macro for NEON-SVE Bridge

2024-06-06 Thread Richard Sandiford
Richard Ball writes: > __ARM_NEON_SVE_BRIDGE was missed in the original patch and is > added by this patch. > > Ok for trunk and a backport into gcc-14? > > gcc/ChangeLog: > > * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): > Add missing __

Re: Heading Level Access In Safari Browser

2024-06-06 Thread Richard Turner
I thought you were using a bluetooth keyboard. Those are keyboard commands. Sorry. Richard, USA“Grandma always told us, “Be careful when you pray for patience. God stores it on the other side of Hell and you will have to go through Hell to get it.”-- Cedrick Bridgeforth My web site: https

Re: [PATCH]AArch64: correct constraint on Upl early clobber alternatives

2024-06-06 Thread Richard Sandiford
[ , Upl , w, w, Upl; yes ] > cmp\t%0., %1/z, %2., %3.d > - [ ?Upa, 0Upl, w, w, Upl; yes ] ^ > - [ Upa , Upl , w, w, Upl; no ] ^ > + {@ [ cons: =0, 1 , 2, 3, 6 ; attrs: pred_clobber ] > + [

Re: arm: Add .type and .size to __gnu_cmse_nonsecure_call [PR115360]

2024-06-06 Thread Richard Earnshaw (lists)
On 05/06/2024 17:07, Andre Vieira (lists) wrote: > Hi, > > This patch adds missing assembly directives to the CMSE library wrapper to > call functions with attribute cmse_nonsecure_call.  Without the .type > directive the linker will fail to produce the correct veneer if a call to > this

[jira] [Commented] (MNG-7868) "Could not acquire lock(s)" error in concurrent maven builds

2024-06-06 Thread Richard Eckart de Castilho (Jira)
[ https://issues.apache.org/jira/browse/MNG-7868?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel=17852754#comment-17852754 ] Richard Eckart de Castilho commented on MNG-7868: - [~cstamas] can you read anything useful

Re: [PATCH v2] Vect: Support IFN SAT_SUB for unsigned vector int

2024-06-06 Thread Richard Biener
t; vectp_y.8_66 = vectp_y.8_65 + ivtmp_60; > vectp_out.12_71 = vectp_out.12_70 + ivtmp_60; > ivtmp_75 = ivtmp_74 - _76; > ... > } > > The below test suites are passed for this patch > * The x86 bootstrap test. > * The x86 fully regression test. > * The riscv

Re: [PATCH v4] Match: Support more form for scalar unsigned SAT_ADD

2024-06-06 Thread Richard Biener
On Thu, Jun 6, 2024 at 3:19 AM Li, Pan2 wrote: > > Hi Richard, > > After revisited all the comments of the mail thread, I would like to confirm > if my understanding is correct according to the generated match code. > For now the generated code looks like below: > > else

Re: [PATCH v2] aarch64: Add vector floating point extend pattern [PR113880, PR113869]

2024-06-06 Thread Richard Sandiford
b ones. > * config/aarch64/aarch64-simd.md (aarch64_float_extend_lo_): > Rename > to... > (extend2): ... This. > > gcc/testsuite/ChangeLog: > > * gcc.target/aarch64/extend-vec.c: New test. OK, thanks, and sorry for the slow review. Richard > Signed-off-by:

Re: [PATCH v2 1/2] driver: Use -as/ld/objcopy as final fallback instead of native ones for cross

2024-06-06 Thread Richard Sandiford
YunQiang Su writes: > YunQiang Su 于2024年5月29日周三 10:02写道: >> >> Richard Sandiford 于2024年5月29日周三 05:28写道: >> > >> > YunQiang Su writes: >> > > If `find_a_program` cannot find `as/ld/objcopy` and we are a cross >> > > toolchain, >>

Re: [OE-core] [PATCH] gcc: Fix wrong order of gcc include paths on musl systems

2024-06-06 Thread Richard Purdie
.  */ > +   do_spec_1 (" ", 0, NULL); > +   do_spec_1 (gcc_exec_prefix, 1, NULL); > The trouble is we build one cross compiler for both glibc and musl so this will fix musl and break glibc. It would need to change this depending upon the targe

Re: [patch, rs6000, middle-end 0/1] v1: Add implementation for different targets for pair mem fusion

2024-06-06 Thread Richard Sandiford
t generated > + // by RA for neg:V2DF (fma: V2DF (reg1) > + // (reg2) > + // (neg:V2DF (reg3))) > + if (GET_RTX_CLASS (code) == RTX_UNARY) > + return false; What's special about (neg (fma ...))? > + > + def_link = def_link->next; > + } > + } > + return true; > +} Thanks, Richard

[jira] [Resolved] (OPENNLP-1565) Deploy Model Snapshots via GitHub Actions

2024-06-06 Thread Richard Zowalla (Jira)
[ https://issues.apache.org/jira/browse/OPENNLP-1565?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel ] Richard Zowalla resolved OPENNLP-1565. -- Resolution: Fixed > Deploy Model Snapshots via GitHub Acti

[jira] [Created] (OPENNLP-1565) Deploy Model Snapshots via GitHub Actions

2024-06-06 Thread Richard Zowalla (Jira)
Richard Zowalla created OPENNLP-1565: Summary: Deploy Model Snapshots via GitHub Actions Key: OPENNLP-1565 URL: https://issues.apache.org/jira/browse/OPENNLP-1565 Project: OpenNLP Issue

[gcc r15-1056] Allow single-lane SLP in-order reductions

2024-06-06 Thread Richard Biener via Gcc-cvs
https://gcc.gnu.org/g:4653b682ef161c3c2fc7bf8462b8f9206a1349e6 commit r15-1056-g4653b682ef161c3c2fc7bf8462b8f9206a1349e6 Author: Richard Biener Date: Tue Mar 5 15:46:24 2024 +0100 Allow single-lane SLP in-order reductions The single-lane case isn't different from non-SLP, no re

[gcc r15-1054] Allow single-lane COND_REDUCTION vectorization

2024-06-06 Thread Richard Biener via Gcc-cvs
https://gcc.gnu.org/g:202a9c8fe7db9dd94e5a77f42e54ef3d966f88e8 commit r15-1054-g202a9c8fe7db9dd94e5a77f42e54ef3d966f88e8 Author: Richard Biener Date: Fri Mar 1 14:39:08 2024 +0100 Allow single-lane COND_REDUCTION vectorization The following enables single-lane COND_REDUCTION

[gcc r15-1055] Add double reduction support for SLP vectorization

2024-06-06 Thread Richard Biener via Gcc-cvs
https://gcc.gnu.org/g:2ee41ef76a99ef5a8b62b351e2c01dad93f51b18 commit r15-1055-g2ee41ef76a99ef5a8b62b351e2c01dad93f51b18 Author: Richard Biener Date: Tue Mar 5 15:28:58 2024 +0100 Add double reduction support for SLP vectorization The following makes double reduction

[gcc r15-1053] Relax COND_EXPR reduction vectorization SLP restriction

2024-06-06 Thread Richard Biener via Gcc-cvs
https://gcc.gnu.org/g:28edeb1409a7b839407ec06031899b933390bff3 commit r15-1053-g28edeb1409a7b839407ec06031899b933390bff3 Author: Richard Biener Date: Fri Feb 23 16:16:38 2024 +0100 Relax COND_EXPR reduction vectorization SLP restriction Allow one-lane SLP but for the case where

[jira] [Resolved] (OPENNLP-1562) Create a Markdown List

2024-06-06 Thread Richard Zowalla (Jira)
[ https://issues.apache.org/jira/browse/OPENNLP-1562?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel ] Richard Zowalla resolved OPENNLP-1562. -- Resolution: Fixed > Create a Markdown L

[jira] [Resolved] (TOMEE-4350) mp-jwt: Add qualifier for produced Jsonb

2024-06-06 Thread Richard Zowalla (Jira)
[ https://issues.apache.org/jira/browse/TOMEE-4350?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel ] Richard Zowalla resolved TOMEE-4350. Fix Version/s: 10.0.0-M2 9.1.4 Resolution: Fixed > mp-jwt:

Re: [PATCH] tree-optimization/115254 - don't account single-lane SLP against discovery limit

2024-06-06 Thread Richard Biener
On Thu, 6 Jun 2024, YunQiang Su wrote: > Richard Biener 于2024年5月28日周二 17:47写道: > > > > The following avoids accounting single-lane SLP to the discovery > > limit. As the two testcases show this makes discovery fail, > > unfortunately even not the same across targets

[jira] [Created] (TOMEE-4351) Jakarta Security 3.0

2024-06-06 Thread Richard Zowalla (Jira)
Richard Zowalla created TOMEE-4351: -- Summary: Jakarta Security 3.0 Key: TOMEE-4351 URL: https://issues.apache.org/jira/browse/TOMEE-4351 Project: TomEE Issue Type: New Feature

[jira] [Assigned] (TOMEE-4350) mp-jwt: Add qualifier for produced Jsonb

2024-06-06 Thread Richard Zowalla (Jira)
[ https://issues.apache.org/jira/browse/TOMEE-4350?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel ] Richard Zowalla reassigned TOMEE-4350: -- Assignee: Markus Jung > mp-jwt: Add qualifier for produced Js

[PATCH] util/bufferiszero: Split out host include files

2024-06-05 Thread Richard Henderson
Split out host/bufferiszero.h.inc for x86, aarch64 and generic in order to avoid an overlong ifdef ladder. Signed-off-by: Richard Henderson --- host/include/aarch64/host/bufferiszero.h.inc | 76 host/include/generic/host/bufferiszero.h.inc | 10 + host/include/i386/host

Re: [PATCH] target/i386: SEV: do not assume machine->cgs is SEV

2024-06-05 Thread Richard Henderson
On 6/5/24 20:45, Zhao Liu wrote: @@ -1710,7 +1710,9 @@ void sev_es_set_reset_vector(CPUState *cpu) { X86CPU *x86; CPUX86State *env; -SevCommonState *sev_common = SEV_COMMON(MACHINE(qdev_get_machine())->cgs); +ConfidentialGuestSupport *cgs = MACHINE(qdev_get_machine())->cgs;

Re: [PATCH 2/2] util/bufferiszero: Add simd acceleration for loongarch64

2024-06-05 Thread Richard Henderson
On 6/5/24 20:36, maobibo wrote: static biz_accel_fn const accel_table[] = { buffer_is_zero_int_ge256, #ifdef __loongarch_sx buffer_is_zero_lsx, #endif #ifdef __loongarch_asx buffer_is_zero_lasx, #endif }; static unsigned best_accel(void) { #ifdef __loongarch_asx /* lasx may

[PATCH v2 5/9] target/i386: Split out gdb-internal.h

2024-06-05 Thread Richard Henderson
Reviewed-by: Alex Bennée Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- target/i386/gdb-internal.h | 65 ++ target/i386/gdbstub.c | 1 + 2 files changed, 66 insertions(+) create mode 100644 target/i386/gdb-internal.h diff --git

[PATCH v2 6/9] target/i386: Introduce cpu_compute_eflags_ccop

2024-06-05 Thread Richard Henderson
This is a generalization of cpu_compute_eflags, with a dynamic value of cc_op, and is thus tcg specific. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- target/i386/cpu.h | 2 ++ target/i386/tcg/cc_helper.c | 10 ++ 2 files changed, 12 insertions(+) diff

[PATCH v2 2/9] accel/tcg: Set CPUState.plugin_ra before all plugin callbacks

2024-06-05 Thread Richard Henderson
Store a host code address to use with the tcg unwinder when called from a plugin. Generate one such store per guest insn that uses a plugin callback. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/hw/core/cpu.h | 4 +--- accel/tcg/plugin-gen.c | 49

[PATCH v2 7/9] target/i386: Implement TCGCPUOps for plugin register reads

2024-06-05 Thread Richard Henderson
Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- target/i386/tcg/tcg-cpu.c | 72 ++- 1 file changed, 56 insertions(+), 16 deletions(-) diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index cca19cd40e..2370053df2 100644

[PATCH v2 0/9] plugins: Use unwind info for special gdb registers

2024-06-05 Thread Richard Henderson
w to avoid the extra code duplication. :-) r~ Richard Henderson (9): tcg: Introduce INDEX_op_plugin_pc accel/tcg: Set CPUState.plugin_ra before all plugin callbacks accel/tcg: Return the TranslationBlock from cpu_unwind_state_data plugins: Introduce TCGCPUOps callbacks for mid-tb regi

[PATCH v2 3/9] accel/tcg: Return the TranslationBlock from cpu_unwind_state_data

2024-06-05 Thread Richard Henderson
Adjust the i386 get_memio_eip function to use tb->cflags instead of tcg_cflags_has, which is technically more correct. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/exec/cpu-common.h | 9 + accel/tcg/translate-all.c | 9 + target/i386/helpe

[PATCH v2 8/9] target/arm: Add aarch64_tcg_ops

2024-06-05 Thread Richard Henderson
For the moment, this is an exact copy of arm_tcg_ops. Export arm_cpu_exec_interrupt for the cross-file reference. Signed-off-by: Richard Henderson --- target/arm/internals.h | 1 + target/arm/cpu.c | 2 +- target/arm/cpu64.c | 30 ++ 3 files changed, 32

[PATCH v2 9/9] target/arm: Implement TCGCPUOps for plugin register reads

2024-06-05 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/arm/internals.h | 7 +-- target/arm/cpu.c | 38 ++ target/arm/cpu64.c | 25 + target/arm/tcg/cpu-v7m.c | 2 ++ 4 files changed, 70 insertions(+), 2 deletions(-) diff

[PATCH v2 4/9] plugins: Introduce TCGCPUOps callbacks for mid-tb register reads

2024-06-05 Thread Richard Henderson
callbacks. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 14 ++ plugins/api.c | 36 +-- 2 files changed, 48 insertions(+), 2 deletions(-) diff --git a/include/hw/core/tcg-cpu-ops.h b

[PATCH v2 1/9] tcg: Introduce INDEX_op_plugin_pc

2024-06-05 Thread Richard Henderson
Add an opcode to find a code address within the current insn, for later use with unwinding. Generate the code generically using tcg_reg_alloc_do_movi. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/tcg/tcg-op-common.h | 1 + include/tcg/tcg-opc.h | 1 + tcg

Re: [PATCH 2/2] util/bufferiszero: Add simd acceleration for loongarch64

2024-06-05 Thread Richard Henderson
On 6/5/24 20:18, Richard Henderson wrote: On 6/5/24 19:30, maobibo wrote: On 2024/6/6 上午7:51, Richard Henderson wrote: On 6/5/24 02:32, Bibo Mao wrote: Different gcc versions have different features, macro CONFIG_LSX_OPT and CONFIG_LASX_OPT is added here to detect whether gcc supports built

Re: [PATCH 2/2] util/bufferiszero: Add simd acceleration for loongarch64

2024-06-05 Thread Richard Henderson
On 6/5/24 19:30, maobibo wrote: On 2024/6/6 上午7:51, Richard Henderson wrote: On 6/5/24 02:32, Bibo Mao wrote: Different gcc versions have different features, macro CONFIG_LSX_OPT and CONFIG_LASX_OPT is added here to detect whether gcc supports built-in lsx/lasx macro. Function

[TLS]Re: Is NIST actually prohibiting X25519?

2024-06-05 Thread Richard Barnes
As with the earlier thread, this message is off-topic for this list. Regardless of what NIST does, the TLS protocol does and will support a variety of curves. On Wed, Jun 5, 2024 at 20:14 D. J. Bernstein wrote: > Andrei Popov writes: > > This is a complicated compliance question. I'm not

Re: [PULL v3 00/41] virtio: features,fixes

2024-06-05 Thread Richard Henderson
On 6/5/24 16:34, Michael S. Tsirkin wrote: Dropped acpi patches that had endian-ness issues. The following changes since commit 60b54b67c63d8f076152e0f7dccf39854dfc6a77: Merge tag 'pull-lu-20240526' of https://gitlab.com/rth7680/qemu into staging (2024-05-26 17:51:00 -0700) are available

Re: [PULL 00/16] sprintf fixes

2024-06-05 Thread Richard Henderson
On 6/5/24 14:15, Richard Henderson wrote: The following changes since commit f1572ab94738bd5787b7badcd4bd93a3657f0680: Merge tag 'for-upstream' ofhttps://gitlab.com/bonzini/qemu into staging (2024-06-05 07:45:23 -0700) are available in the Git repository at: https://gitlab.com/rth7680

[Qemu-commits] [qemu/qemu] 53ee5f: util/hexdump: Use a GString for qemu_hexdump_line

2024-06-05 Thread Richard Henderson via Qemu-commits
Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 53ee5f551e5743516c90a662425276cae4cf0aeb https://github.com/qemu/qemu/commit/53ee5f551e5743516c90a662425276cae4cf0aeb Author: Richard Henderson Date: 2024-06-05 (Wed, 05 Jun 2024) Changed paths: M hw

Re: [PATCH 2/2] util/bufferiszero: Add simd acceleration for loongarch64

2024-06-05 Thread Richard Henderson
On 6/5/24 02:32, Bibo Mao wrote: Different gcc versions have different features, macro CONFIG_LSX_OPT and CONFIG_LASX_OPT is added here to detect whether gcc supports built-in lsx/lasx macro. Function buffer_zero_lsx() is added for 128bit simd fpu optimization, and function buffer_zero_lasx()

Re: linux-user emulation hangs during fork

2024-06-05 Thread Richard Henderson
On 6/5/24 02:14, Andreas Schwab wrote: $ qemu-x86_64 --version qemu-x86_64 version 9.0.50 (v9.0.0-1211-gd16cab541a) Copyright (c) 2003-2024 Fabrice Bellard and the QEMU Project developers $ cat fork.rb begin r, w = IO.pipe if pid1 = fork w.close r.read 1 Process.kill "USR1",

[clang] Pass LangOpts from CompilerInstance to DependencyScanningWorker (PR #93753)

2024-06-05 Thread Richard Smith via cfe-commits
zygoloid wrote: > > I guess the general question is - is it acceptable to have the Scanner > > operating in a language standard different than the passed in language mode > > and different than the compiler language standard? > > I think that is acceptable. It is kinda hacky, but the lexer

[PATCH] accel/tcg/plugin: Fix inject_mem_cb rw masking

2024-06-05 Thread Richard Henderson
These are not booleans, but masks. Fixes: f86fd4d8721 ("plugins: distinct types for callbacks") Signed-off-by: Richard Henderson --- accel/tcg/plugin-gen.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index

[PATCH v2 00/10] target/s390x: pc-relative translation

2024-06-05 Thread Richard Henderson
v1: 20220906101747.344559-1-richard.hender...@linaro.org A lot has changed in the 20 months since, including generic cleanups and splitting out the PER fixes. r~ Richard Henderson (10): target/s390x: Change help_goto_direct to work on displacements target/s390x: Introduce

[PATCH v2 04/10] target/s390x: Use gen_psw_addr_disp in pc_to_link_info

2024-06-05 Thread Richard Henderson
This is slightly more complicated than a straight displacement for 31 and 24-bit modes. Dont bother with a cant-happen assert. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 20 +++- 1 file changed, 11 insertions(+), 9

[PATCH v2 06/10] target/s390x: Use deposit in save_link_info

2024-06-05 Thread Richard Henderson
Replace manual masking and oring with deposits. Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 32 1 file changed, 20 insertions(+), 12 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 2654c85a8e

[PATCH v2 03/10] target/s390x: Remove pc argument to pc_to_link_into

2024-06-05 Thread Richard Henderson
All callers pass s->pc_tmp. Reviewed-by: Ilya Leoshkevich Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/

[PATCH v2 02/10] target/s390x: Introduce gen_psw_addr_disp

2024-06-05 Thread Richard Henderson
In preparation for TARGET_TB_PCREL, reduce reliance on absolute values. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 25 +++-- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/target/s390x/tcg/translate.c b

[PATCH v2 09/10] target/s390x: Assert masking of psw.addr in cpu_get_tb_cpu_state

2024-06-05 Thread Richard Henderson
When changing modes via SAM, we raise a specification exception if the new PC is out of range. The masking in s390x_tr_init_disas_context was too late to be correct, but may be removed. Add a debugging assert in cpu_get_tb_cpu_state. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard

[PATCH v2 08/10] target/s390x: Use ilen instead in branches

2024-06-05 Thread Richard Henderson
Remove the remaining uses of pc_tmp, and remove the variable. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 28 1 file changed, 8 insertions(+), 20 deletions(-) diff --git

[PATCH v2 10/10] target/s390x: Enable CF_PCREL

2024-06-05 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/s390x/cpu.c | 17 + target/s390x/tcg/translate.c | 71 +++- 2 files changed, 62 insertions(+), 26 deletions(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index c786767bd1..9f03190c35 100644

[PATCH v2 07/10] target/s390x: Use gen_psw_addr_disp in op_sam

2024-06-05 Thread Richard Henderson
Complicated because we may now require a runtime jump. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 39 +--- 1 file changed, 27 insertions(+), 12 deletions(-) diff --git a/target/s390x/tcg/translate.c b

[PATCH v2 01/10] target/s390x: Change help_goto_direct to work on displacements

2024-06-05 Thread Richard Henderson
In preparation for CF_PCREL, reduce reliance on absolute values. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/target/s390x/tcg

[PATCH v2 05/10] target/s390x: Use gen_psw_addr_disp in save_link_info

2024-06-05 Thread Richard Henderson
Trivial but non-mechanical conversion away from pc_tmp. Reviewed-by: Ilya Leoshkevich Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/s390x/tcg/translate.c b

[PULL 14/16] disas/microblaze: Print registers directly with PRIrfsl

2024-06-05 Thread Richard Henderson
Use a printf format instead of sprintf into a buffer. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20240412073346.458116-20-richard.hender...@linaro.org> --- disas/microblaze.c | 22 +- 1 file changed, 5 insertions(+), 17 deletions(-)

[PULL 02/16] util/hexdump: Add unit_len and block_len to qemu_hexdump_line

2024-06-05 Thread Richard Henderson
Generalize the current 1 byte unit and 4 byte blocking within the output. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20240412073346.458116-5-richard.hender...@linaro.org> --- include/qemu/cutils.h | 6 +- hw/virtio/vhost-vdpa.c | 2 +-

[PULL 01/16] util/hexdump: Use a GString for qemu_hexdump_line

2024-06-05 Thread Richard Henderson
Allocate a new, or append to an existing GString instead of using a fixed sized buffer. Require the caller to determine the length of the line -- do not bound len here. Signed-off-by: Richard Henderson Message-Id: <20240412073346.458116-4-richard.hender...@linaro.org> --- include/qemu/cu

[PULL 09/16] disas/microblaze: Split out print_immval_addr

2024-06-05 Thread Richard Henderson
Unify the code blocks that try to print a symbolic address. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20240412073346.458116-15-richard.hender...@linaro.org> --- disas/microblaze.c | 89 +++--- 1 file chang

[PULL 10/16] disas/microblaze: Re-indent print_insn_microblaze

2024-06-05 Thread Richard Henderson
Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20240412073346.458116-16-richard.hender...@linaro.org> --- disas/microblaze.c | 263 - 1 file changed, 141 insertions(+), 122 deletions(-) diff --git a/disas/microbla

[Qemu-commits] [qemu/qemu] 53ee5f: util/hexdump: Use a GString for qemu_hexdump_line

2024-06-05 Thread Richard Henderson via Qemu-commits
Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 53ee5f551e5743516c90a662425276cae4cf0aeb https://github.com/qemu/qemu/commit/53ee5f551e5743516c90a662425276cae4cf0aeb Author: Richard Henderson Date: 2024-06-05 (Wed, 05 Jun 2024) Changed paths: M hw

[PULL 08/16] hw/dma/pl330: Use qemu_hexdump_line to avoid sprintf

2024-06-05 Thread Richard Henderson
From: Philippe Mathieu-Daudé sprintf() is deprecated on Darwin since macOS 13.0 / XCode 14.1. Using qemu_hexdump_line both fixes the deprecation warning and simplifies the code base. Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message

[PULL 00/16] sprintf fixes

2024-06-05 Thread Richard Henderson
hw/dma/pl330: Use qemu_hexdump_line to avoid sprintf Richard Henderson (11): util/hexdump: Use a GString for qemu_hexdump_line util/hexdump: Add unit_len and block_len to qemu_hexdump_line util/hexdump: Inline g_string_append_printf "%02x" disas/microblaze:

[PULL 13/16] disas/microblaze: Print immediates directly with PRIimm

2024-06-05 Thread Richard Henderson
Use a printf format instead of sprintf into a buffer. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20240412073346.458116-19-richard.hender...@linaro.org> --- disas/microblaze.c | 61 +- 1 file changed, 11 inse

[PULL 15/16] disas/microblaze: Split get_field_special

2024-06-05 Thread Richard Henderson
Extract the raw special index and a function to lookup a name. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20240412073346.458116-21-richard.hender...@linaro.org> --- disas/microblaze.c | 142 +++-- 1 file chang

[PULL 05/16] system/qtest: Replace sprintf by qemu_hexdump_line

2024-06-05 Thread Richard Henderson
From: Philippe Mathieu-Daudé sprintf() is deprecated on Darwin since macOS 13.0 / XCode 14.1. Using qemu_hexdump_line both fixes the deprecation warning and simplifies the code base. Signed-off-by: Philippe Mathieu-Daudé ` [rth: Use qemu_hexdump_line] Signed-off-by: Richard Henderson Reviewed

[PULL 07/16] hw/ide/atapi: Use qemu_hexdump_line to avoid sprintf

2024-06-05 Thread Richard Henderson
From: Philippe Mathieu-Daudé sprintf() is deprecated on Darwin since macOS 13.0 / XCode 14.1. Using qemu_hexdump_line both fixes the deprecation warning and simplifies the code base. Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message

[PULL 12/16] disas/microblaze: Print registers directly with PRIreg

2024-06-05 Thread Richard Henderson
Use a printf format instead of sprintf into a buffer. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20240412073346.458116-18-richard.hender...@linaro.org> --- disas/microblaze.c | 54 -- 1 file changed, 23 inse

[PULL 06/16] hw/scsi/scsi-disk: Use qemu_hexdump_line to avoid sprintf

2024-06-05 Thread Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20240412073346.458116-9-richard.hender...@linaro.org> --- hw/scsi/scsi-disk.c | 13 +++-- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/hw/scsi/

[PULL 16/16] disas/riscv: Use GString in format_inst

2024-06-05 Thread Richard Henderson
Allocate and fill a GString instead of snprintf and appending to a fixed sized buffer. Signed-off-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Pierrick Bouvier Message-Id: <20240412073346.458116-22-richard.hender...@linaro.org> --- disas/riscv.c

[PULL 04/16] hw/mips/malta: Add re-usable rng_seed_hex_new() method

2024-06-05 Thread Richard Henderson
Mathieu-Daudé [rth: Use qemu_hexdump_line.] Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20240412073346.458116-7-richard.hender...@linaro.org> --- hw/mips/malta.c | 25 + 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/h

[PULL 11/16] disas/microblaze: Merge op->name output into each fprintf

2024-06-05 Thread Richard Henderson
In the common case, issue one single fprintf. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20240412073346.458116-17-richard.hender...@linaro.org> --- disas/microblaze.c | 80 +++--- 1 file changed, 40 insertions(

[PULL 03/16] util/hexdump: Inline g_string_append_printf "%02x"

2024-06-05 Thread Richard Henderson
Trivial arithmetic can be used for emitting the nibbles, rather than full-blown printf formatting. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20240412073346.458116-6-richard.hender...@linaro.org> --- util/hexdump.c | 12 +++- 1 file chang

Re: [BVARC] 2024 Field Day K3's

2024-06-05 Thread Richard Bonica via BVARC
Where do we get these power supplies from? On Wed, Jun 5, 2024, 2:24 PM Allen Brier via BVARC wrote: > I forgot to mention (I always do) that all the K3’s (including those > already committed) will need power supplied go to with them. … Don’t > forget!! > > > > Allen R. Brier N5XZ > > 1515

Re: [BVARC] Field Day Signup sheet link

2024-06-05 Thread Richard Bonica via BVARC
No problem -- but thank you for letting me know and hope you're are better On Sat, Jun 1, 2024, 5:14 PM Mike Knerr via BVARC wrote: > I am sorry to say that I will not be able to sell the door prize tickets > this year. With luck I'll be able to walk again for Hamfest. > Mike Knerr KI5UBL 73 >

Re: [PATCH v3 00/28] linux-user/i386: Properly align signal frame

2024-06-05 Thread Richard Henderson
On 6/5/24 14:16, Pierrick Bouvier wrote: I'll take a look, thanks. On 6/5/24 12:06, Philippe Mathieu-Daudé wrote: On 15/5/24 17:08, Richard Henderson wrote: v2: https://lore.kernel.org/qemu-devel/20240409050302.1523277-1-richard.hender...@linaro.org/ Disconnect fpstate from sigframe, just

[TLS]Re: Issue 1358: Require sending MTI curves in CH.key_share

2024-06-05 Thread Richard Barnes
This sounds like the right approach to me. The point of the MTI is to ensure that the connection succeeds, not that it succeeds as quickly as possible. --Richard On Wed, Jun 5, 2024 at 2:57 PM Martin Thomson wrote: > I would not mandate the use of an MTI curve, but instead recomm

[Qemu-commits] [qemu/qemu] e6e903: linux-user: Add ioctl for BLKBSZSET

2024-06-05 Thread Richard Henderson via Qemu-commits
https://github.com/qemu/qemu/commit/fa9079a86d94c202c316c97ca2eb61ca3e763907 Author: Richard Henderson Date: 2024-06-05 (Wed, 05 Jun 2024) Changed paths: M target/sparc/vis_helper.c Log Message: --- target/sparc: Fix ARRAY8 Follow the Oracle Sparc 2015 implementation note and

Re: [PULL 00/38] sparc + linux-user patch queue

2024-06-05 Thread Richard Henderson
On 6/5/24 12:22, Richard Henderson wrote: The following changes since commit d16cab541ab9217977e2a39abf3d79f914146741: Merge tag 'hw-misc-accel-20240604' ofhttps://github.com/philmd/qemu into staging (2024-06-04 14:53:05 -0500) are available in the Git repository at: https

Re: [PATCH v2 2/6] Convert 'info tlb' to use generic iterator

2024-06-05 Thread Richard Henderson
On 6/5/24 13:35, Don Porter wrote: On 5/31/24 10:18, Dr. David Alan Gilbert wrote: * Don Porter (por...@cs.unc.edu) wrote: Signed-off-by: Don Porter If this changes the output of 'info tlb' could you add a before/after to the commit message please. Thanks for the advice.  It should not

Re: Keyboard mapping of Option and Command

2024-06-05 Thread Richard Frith-Macdonald
> On 5 Jun 2024, at 19:27, lars.sonchocky-helld...@hamburg.de wrote: > > Hi, > >> Am 05.06.2024 um 18:33 schrieb Riccardo Mottola : >> >> Hi, >> >> Riccardo Mottola wrote: >>> what is the default mapping for Option and Command on GNUstep when running >>> on X11? >> >> I reply to myself

Re: [PATCH v2 3/6] hw/acpi: Generic Port Affinity Structure support

2024-06-05 Thread Richard Henderson
...@linaro.org/T/#m0f6531d67ba28663bd35b359e32ddfea42db2dea has my current theory on why and Richard is grabbing the SRAT table which will hopefully have this as the smoking gun. Comes back to my normal question to management. Can I have an s390 for tests? Where are those up to date big endian test

[PULL 10/38] target/sparc: Implement FMAf extension

2024-06-05 Thread Richard Henderson
Rearrange PDIST so that do_ is general purpose and may be re-used for FMADDd etc. Add pickNaN and pickNaNMulAdd. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 2 + target/sparc/cpu-feature.h.inc | 1 + target/sparc/insns.decode | 23 +- linux-user

[PULL 23/38] target/sparc: Implement LZCNT

2024-06-05 Thread Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 18 ++ 2 files changed, 19 insertions(+) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index fec055910e..4766964893 100644

[PULL 24/38] target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd

2024-06-05 Thread Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 6 ++ target/sparc/translate.c | 36 2 files changed, 42 insertions(+) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index

[PULL 09/38] target/sparc: Use gvec for VIS1 parallel add/sub

2024-06-05 Thread Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/sparc/translate.c | 22 ++ 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 362e88de18..7c290293ea 100644 --- a/target

[PULL 25/38] target/sparc: Implement PDISTN

2024-06-05 Thread Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 11 +++ 2 files changed, 12 insertions(+) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index e0e9248982..09c8adca37 100644

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