[clang] [llvm] [WebAssembly] Implement prototype f32.load_f16 instruction. (PR #90906)

[Thomas Lively via cfe-commits]

https://github.com/tlively closed 
https://github.com/llvm/llvm-project/pull/90906
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[clang] [llvm] [WebAssembly] Sort target features (NFC) (PR #90777)

[Thomas Lively via cfe-commits]

https://github.com/tlively approved this pull request.


https://github.com/llvm/llvm-project/pull/90777
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[clang] [WebAssembly] Add preprocessor define for half-precision (PR #90528)

[Thomas Lively via cfe-commits]

https://github.com/tlively approved this pull request.


https://github.com/llvm/llvm-project/pull/90528
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[clang] [llvm] [WebAssembly] Add half-precision feature (PR #90248)

[Thomas Lively via cfe-commits]

https://github.com/tlively closed 
https://github.com/llvm/llvm-project/pull/90248
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[clang] [llvm] [WebAssembly] Add half-precision feature (PR #90248)

[Thomas Lively via cfe-commits]

https://github.com/tlively approved this pull request.

LGTM. We can always bikeshed the feature name later if we want.

https://github.com/llvm/llvm-project/pull/90248
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[clang] [WebAssembly] Enable multivalue and reference-types in generic CPU config (PR #80923)

[Thomas Lively via cfe-commits]

@@ -147,19 +147,25 @@ void 
WebAssemblyTargetInfo::setFeatureEnabled(llvm::StringMap ,
 bool WebAssemblyTargetInfo::initFeatureMap(
 llvm::StringMap , DiagnosticsEngine , StringRef CPU,
 const std::vector ) const {
-  if (CPU == "bleeding-edge") {
-Features["nontrapping-fptoint"] = true;
+  auto addGenericFeatures = [&]() {
 Features["sign-ext"] = true;
+Features["mutable-globals"] = true;
+Features["reference-types"] = true;
+Features["multivalue"] = true;
+  };
+  auto addBleedingEdgeFeatures = [&]() {
+addGenericFeatures();
+Features["nontrapping-fptoint"] = true;

tlively wrote:

Oh, I see, if we think we would need a Binaryen lowering pass first, then 
proceeding without this SGTM.

https://github.com/llvm/llvm-project/pull/80923
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[clang] [WebAssembly] Enable multivalue and reference-types in generic CPU config (PR #80923)

[Thomas Lively via cfe-commits]

@@ -147,19 +147,25 @@ void 
WebAssemblyTargetInfo::setFeatureEnabled(llvm::StringMap ,
 bool WebAssemblyTargetInfo::initFeatureMap(
 llvm::StringMap , DiagnosticsEngine , StringRef CPU,
 const std::vector ) const {
-  if (CPU == "bleeding-edge") {
-Features["nontrapping-fptoint"] = true;
+  auto addGenericFeatures = [&]() {
 Features["sign-ext"] = true;
+Features["mutable-globals"] = true;
+Features["reference-types"] = true;
+Features["multivalue"] = true;
+  };
+  auto addBleedingEdgeFeatures = [&]() {
+addGenericFeatures();
+Features["nontrapping-fptoint"] = true;

tlively wrote:

Looks like this was enabled in Safari in September 2021. Should we enable this 
by default as well?

https://github.com/llvm/llvm-project/pull/80923
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[clang] [WebAssembly] Enable multivalue and reference-types in generic CPU config (PR #80923)

[Thomas Lively via cfe-commits]

https://github.com/tlively approved this pull request.


https://github.com/llvm/llvm-project/pull/80923
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[clang] [WebAssembly] Enable multivalue and reference-types in generic CPU config (PR #80923)

[Thomas Lively via cfe-commits]

https://github.com/tlively edited 
https://github.com/llvm/llvm-project/pull/80923
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[clang] [WebAssembly] Tidy up wasm-target-features.c (PR #89778)

[Thomas Lively via cfe-commits]

https://github.com/tlively approved this pull request.


https://github.com/llvm/llvm-project/pull/89778
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[clang] [WebAssembly] Fix uses of -DAG and -NOT in wasm-target-features.c (PR #89777)

[Thomas Lively via cfe-commits]

https://github.com/tlively approved this pull request.

Thanks!

https://github.com/llvm/llvm-project/pull/89777
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[clang] [WebAssembly] Fix CPU tests in wasm-features.c (PR #80900)

[Thomas Lively via cfe-commits]

https://github.com/tlively approved this pull request.

This makes sense, thanks!

https://github.com/llvm/llvm-project/pull/80900
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[clang] [WebAssembly] Remove wasm-features.c test (PR #80900)

[Thomas Lively via cfe-commits]

tlively wrote:

> The reason it is passing is because it only has `-NOT` checks

This doesn't look right, though. There are plenty of positive checks in the 
file, so how could it be passing if it's not checking the right things? 
 

https://github.com/llvm/llvm-project/pull/80900
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[clang] [WebAssembly] Add tests for generic CPU config (PR #80775)

[Thomas Lively via cfe-commits]

https://github.com/tlively approved this pull request.


https://github.com/llvm/llvm-project/pull/80775
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[llvm] [clang] [WebAssembly] Refactor Wasm Reference Types as TargetExtType (PR #71540)

[Thomas Lively via cfe-commits]

https://github.com/tlively commented:

Very cool! LGTM so far. It's really nice that we can delete that entire pass 
out of the backend. Where can I read more about these new target extension 
types?

https://github.com/llvm/llvm-project/pull/71540
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[clang] 86ed8cb - [WebAssembly] Add multiple memories feature

[Thomas Lively via cfe-commits]

Author: Ashley Nelson
Date: 2023-08-21T14:23:14-07:00
New Revision: 86ed8cb8fabe7716b9046317231f861fee5f126a

URL: 
https://github.com/llvm/llvm-project/commit/86ed8cb8fabe7716b9046317231f861fee5f126a
DIFF: 
https://github.com/llvm/llvm-project/commit/86ed8cb8fabe7716b9046317231f861fee5f126a.diff

LOG: [WebAssembly] Add multiple memories feature

Adding to allow users to get this flag into the target features section for
future use cases.

Reviewed By: tlively, aheejin

Differential Revision: https://reviews.llvm.org/D158409

Added: 


Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Basic/Targets/WebAssembly.cpp
clang/lib/Basic/Targets/WebAssembly.h
clang/test/Driver/wasm-features.c
clang/test/Preprocessor/wasm-target-features.c
llvm/lib/Target/WebAssembly/WebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index d668faf650a721..619c418365c262 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -4583,6 +4583,8 @@ def mreference_types : Flag<["-"], "mreference-types">, 
Group, 
Group;
 def mextended_const : Flag<["-"], "mextended-const">, 
Group;
 def mno_extended_const : Flag<["-"], "mno-extended-const">, 
Group;
+def mmultimemory : Flag<["-"], "mmultimemory">, Group;
+def mno_multimemory : Flag<["-"], "mno-multimemory">, 
Group;
 def mexec_model_EQ : Joined<["-"], "mexec-model=">, 
Group,
  Values<"command,reactor">,
  HelpText<"Execution model (WebAssembly only)">,

diff  --git a/clang/lib/Basic/Targets/WebAssembly.cpp 
b/clang/lib/Basic/Targets/WebAssembly.cpp
index e9b77e03c03114..f1c925d90cb649 100644
--- a/clang/lib/Basic/Targets/WebAssembly.cpp
+++ b/clang/lib/Basic/Targets/WebAssembly.cpp
@@ -57,6 +57,7 @@ bool WebAssemblyTargetInfo::hasFeature(StringRef Feature) 
const {
   .Case("tail-call", HasTailCall)
   .Case("reference-types", HasReferenceTypes)
   .Case("extended-const", HasExtendedConst)
+  .Case("multimemory", HasMultiMemory)
   .Default(false);
 }
 
@@ -96,6 +97,8 @@ void WebAssemblyTargetInfo::getTargetDefines(const 
LangOptions ,
 Builder.defineMacro("__wasm_reference_types__");
   if (HasExtendedConst)
 Builder.defineMacro("__wasm_extended_const__");
+  if (HasMultiMemory)
+Builder.defineMacro("__wasm_multimemory__");
 
   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
@@ -152,6 +155,7 @@ bool WebAssemblyTargetInfo::initFeatureMap(
 Features["mutable-globals"] = true;
 Features["tail-call"] = true;
 Features["reference-types"] = true;
+Features["multimemory"] = true;
 setSIMDLevel(Features, SIMD128, true);
   } else if (CPU == "generic") {
 Features["sign-ext"] = true;
@@ -260,6 +264,14 @@ bool WebAssemblyTargetInfo::handleTargetFeatures(
   HasExtendedConst = false;
   continue;
 }
+if (Feature == "+multimemory") {
+  HasMultiMemory = true;
+  continue;
+}
+if (Feature == "-multimemory") {
+  HasMultiMemory = false;
+  continue;
+}
 
 Diags.Report(diag::err_opt_not_valid_with_opt)
 << Feature << "-target-feature";

diff  --git a/clang/lib/Basic/Targets/WebAssembly.h 
b/clang/lib/Basic/Targets/WebAssembly.h
index 9484898fe1c575..83b1711f9fdf6a 100644
--- a/clang/lib/Basic/Targets/WebAssembly.h
+++ b/clang/lib/Basic/Targets/WebAssembly.h
@@ -63,6 +63,7 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public 
TargetInfo {
   bool HasTailCall = false;
   bool HasReferenceTypes = false;
   bool HasExtendedConst = false;
+  bool HasMultiMemory = false;
 
   std::string ABI;
 

diff  --git a/clang/test/Driver/wasm-features.c 
b/clang/test/Driver/wasm-features.c
index e5f71b42b5055b..1a43361a4a1080 100644
--- a/clang/test/Driver/wasm-features.c
+++ b/clang/test/Driver/wasm-features.c
@@ -41,3 +41,12 @@
 // DEFAULT-NOT: "-target-feature" "-nontrapping-fptoint"
 // MVP-NOT: "-target-feature" "+nontrapping-fptoint"
 // BLEEDING-EDGE-NOT: "-target-feature" "-nontrapping-fptoint"
+
+// RUN: %clang --target=wasm32-unknown-unknown -### %s -mmultimemory 2>&1 | 
FileCheck %s -check-prefix=MULTIMEMORY
+// RUN: %clang --target=wasm32-unknown-unknown -### %s -mno-multimemory 2>&1 | 
FileCheck %s -check-prefix=NO-MULTIMEMORY
+
+// MULTIMEMORY: "-target-feature" "+multimemory"
+// NO-MULTIMEMORY: "-target-feature" "-multimemory"
+// DEFAULT-NOT: "-target-feature" "-multimemory"
+// MVP-NOT: "-target-feature" "+multimemory"
+// BLEEDING-EDGE-NOT: "-target-feature" "-multimemory"

diff  --git a/clang/test/Preprocessor/wasm-target-features.c 
b/clang/test/Preprocessor/wasm-target-features.c
index c05b26a0c22784..c225e226b69ba1 

[clang] ae96b5b - [WebAssembly] Update relaxed-simd instruction names

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2022-11-21T12:40:15-08:00
New Revision: ae96b5bd2dd0c5f7317724f4977b4ff489afe7f3

URL: 
https://github.com/llvm/llvm-project/commit/ae96b5bd2dd0c5f7317724f4977b4ff489afe7f3
DIFF: 
https://github.com/llvm/llvm-project/commit/ae96b5bd2dd0c5f7317724f4977b4ff489afe7f3.diff

LOG: [WebAssembly] Update relaxed-simd instruction names

Including builtin and intrinsic names. These should be the final names for the
proposal.
https://github.com/WebAssembly/relaxed-simd/blob/main/proposals/relaxed-simd/Overview.md

Reviewed By: aheejin, maratyszcza

Differential Revision: https://reviews.llvm.org/D138249

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 723645ca606af..9064ded12fd1e 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -162,15 +162,15 @@ 
TARGET_BUILTIN(__builtin_wasm_trunc_sat_s_zero_f64x2_i32x4, "V4iV2d", "nc", "sim
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_u_zero_f64x2_i32x4, "V4UiV2d", "nc", 
"simd128")
 
 // Relaxed SIMD builtins (experimental)
-TARGET_BUILTIN(__builtin_wasm_fma_f32x4, "V4fV4fV4fV4f", "nc", "relaxed-simd")
-TARGET_BUILTIN(__builtin_wasm_fms_f32x4, "V4fV4fV4fV4f", "nc", "relaxed-simd")
-TARGET_BUILTIN(__builtin_wasm_fma_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
-TARGET_BUILTIN(__builtin_wasm_fms_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_madd_f32x4, "V4fV4fV4fV4f", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f32x4, "V4fV4fV4fV4f", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_madd_f64x2, "V2dV2dV2dV2d", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f64x2, "V2dV2dV2dV2d", "nc", 
"relaxed-simd")
 
-TARGET_BUILTIN(__builtin_wasm_laneselect_i8x16, "V16ScV16ScV16ScV16Sc", "nc", 
"relaxed-simd")
-TARGET_BUILTIN(__builtin_wasm_laneselect_i16x8, "V8sV8sV8sV8s", "nc", 
"relaxed-simd")
-TARGET_BUILTIN(__builtin_wasm_laneselect_i32x4, "V4iV4iV4iV4i", "nc", 
"relaxed-simd")
-TARGET_BUILTIN(__builtin_wasm_laneselect_i64x2, "V2LLiV2LLiV2LLiV2LLi", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i8x16, 
"V16ScV16ScV16ScV16Sc", "nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i16x8, "V8sV8sV8sV8s", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i32x4, "V4iV4iV4iV4i", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i64x2, 
"V2LLiV2LLiV2LLiV2LLi", "nc", "relaxed-simd")
 
 TARGET_BUILTIN(__builtin_wasm_relaxed_swizzle_i8x16, "V16ScV16ScV16Sc", "nc", 
"relaxed-simd")
 
@@ -186,8 +186,8 @@ 
TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_u_zero_i32x4_f64x2, "V4UiV2d", "nc",
 
 TARGET_BUILTIN(__builtin_wasm_relaxed_q15mulr_s_i16x8, "V8sV8sV8s", "nc", 
"relaxed-simd")
 
-TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_s_i16x8, "V8sV16ScV16Sc", "nc", 
"relaxed-simd")
-TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_add_s_i32x4, "V4iV16ScV16ScV4i", 
"nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_dot_i8x16_i7x16_s_i16x8, 
"V8sV16ScV16Sc", "nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_dot_i8x16_i7x16_add_s_i32x4, 
"V4iV16ScV16ScV4i", "nc", "relaxed-simd")
 TARGET_BUILTIN(__builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4, 
"V4fV8UsV8UsV4f", "nc", "relaxed-simd")
 
 #undef BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index e45f1187e231d..7ae5508ae76d8 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -19043,22 +19043,22 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_shuffle);
 return Builder.CreateCall(Callee, Ops);
   }
-  case WebAssembly::BI__builtin_wasm_fma_f32x4:
-  case WebAssembly::BI__builtin_wasm_fms_f32x4:
-  case WebAssembly::BI__builtin_wasm_fma_f64x2:
-  case WebAssembly::BI__builtin_wasm_fms_f64x2: {
+  case WebAssembly::BI__builtin_wasm_relaxed_madd_f32x4:
+  case WebAssembly::BI__builtin_wasm_relaxed_nmadd_f32x4:
+  case WebAssembly::BI__builtin_wasm_relaxed_madd_f64x2:
+  case WebAssembly::BI__builtin_wasm_relaxed_nmadd_f64x2: {
 Value *A = EmitScalarExpr(E->getArg(0));
 Value *B = EmitScalarExpr(E->getArg(1));
 Value *C = EmitScalarExpr(E->getArg(2));
 unsigned IntNo;
 switch (BuiltinID) {
-case WebAssembly::BI__builtin_wasm_fma_f32x4:
-case 

[clang] ac3b8df - [WebAssembly] Prototype `f32x4.relaxed_dot_bf16x8_add_f32`

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2022-09-08T08:07:49-07:00
New Revision: ac3b8df8f2f433193827b8c0396ba8d41d1af565

URL: 
https://github.com/llvm/llvm-project/commit/ac3b8df8f2f433193827b8c0396ba8d41d1af565
DIFF: 
https://github.com/llvm/llvm-project/commit/ac3b8df8f2f433193827b8c0396ba8d41d1af565.diff

LOG: [WebAssembly] Prototype `f32x4.relaxed_dot_bf16x8_add_f32`

As proposed in https://github.com/WebAssembly/relaxed-simd/issues/77. Only an
LLVM intrinsic and a clang builtin are implemented. Since there is no bfloat16
type, use u16 to represent the bfloats in the builtin function arguments.

Differential Revision: https://reviews.llvm.org/D133428

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 03c6162f62e3..723645ca606a 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -188,6 +188,7 @@ TARGET_BUILTIN(__builtin_wasm_relaxed_q15mulr_s_i16x8, 
"V8sV8sV8s", "nc", "relax
 
 TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_s_i16x8, "V8sV16ScV16Sc", "nc", 
"relaxed-simd")
 TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_add_s_i32x4, "V4iV16ScV16ScV4i", 
"nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4, 
"V4fV8UsV8UsV4f", "nc", "relaxed-simd")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 5af3811988e1..fff94678a684 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18870,6 +18870,14 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(Intrinsic::wasm_dot_i8x16_i7x16_add_signed);
 return Builder.CreateCall(Callee, {LHS, RHS, Acc});
   }
+  case WebAssembly::BI__builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Value *Acc = EmitScalarExpr(E->getArg(2));
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_relaxed_dot_bf16x8_add_f32);
+return Builder.CreateCall(Callee, {LHS, RHS, Acc});
+  }
   default:
 return nullptr;
   }

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index ea591a195cad..9d742e7c7e29 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -794,3 +794,10 @@ i32x4 dot_i8x16_i7x16_add_s_i32x4(i8x16 a, i8x16 b, i32x4 
c) {
   // WEBASSEMBLY-SAME: <16 x i8> %a, <16 x i8> %b, <4 x i32> %c)
   // WEBASSEMBLY-NEXT: ret
 }
+
+f32x4 relaxed_dot_bf16x8_add_f32_f32x4(u16x8 a, u16x8 b, f32x4 c) {
+  return __builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4(a, b, c);
+  // WEBASSEMBLY: call <4 x float> @llvm.wasm.relaxed.dot.bf16x8.add.f32
+  // WEBASSEMBLY-SAME: <8 x i16> %a, <8 x i16> %b, <4 x float> %c)
+  // WEBASSEMBLY-NEXT: ret
+}

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index f313be1b2235..7c678ee63b89 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -285,6 +285,12 @@ def int_wasm_dot_i8x16_i7x16_add_signed:
 [llvm_v16i8_ty, llvm_v16i8_ty, llvm_v4i32_ty],
 [IntrNoMem, IntrSpeculatable]>;
 
+def int_wasm_relaxed_dot_bf16x8_add_f32:
+  Intrinsic<[llvm_v4f32_ty],
+[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4f32_ty],
+[IntrNoMem, IntrSpeculatable]>;
+
+
 
//===--===//
 // Thread-local storage intrinsics
 
//===--===//

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td 
b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index 14202a8e1924..36393aea293c 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -1466,3 +1466,15 @@ defm RELAXED_DOT_ADD :
(v16i8 V128:$lhs), (v16i8 V128:$rhs), (v4i32 V128:$acc)))],
 "i32x4.dot_i8x16_i7x16_add_s\t$dst, $lhs, $rhs, $acc",
 "i32x4.dot_i8x16_i7x16_add_s", 0x113>;
+
+//===--===//
+// Relaxed BFloat16 dot product
+//===--===//
+
+defm RELAXED_DOT_BFLOAT :
+  RELAXED_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs, V128:$acc),
+(outs), (ins),
+

[clang] aff679a - [WebAssembly] Implement remaining relaxed SIMD instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2022-06-08T10:32:10-07:00
New Revision: aff679a48c438924c4fca4e9eaa38f91c022ffe3

URL: 
https://github.com/llvm/llvm-project/commit/aff679a48c438924c4fca4e9eaa38f91c022ffe3
DIFF: 
https://github.com/llvm/llvm-project/commit/aff679a48c438924c4fca4e9eaa38f91c022ffe3.diff

LOG: [WebAssembly] Implement remaining relaxed SIMD instructions

Add codegen, intrinsics, and builtins for the i16x8.relaxed_q15mulr_s,
i16x8.dot_i8x16_i7x16_s, and i32x4.dot_i8x16_i7x16_add_s instructions. These are
the last instructions from the relaxed SIMD proposal[1] that had not been
implemented.

[1]:
https://github.com/WebAssembly/relaxed-simd/blob/main/proposals/relaxed-simd/Overview.md.

Differential Revision: https://reviews.llvm.org/D127170

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 24fb24f81fc14..03c6162f62e3f 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -184,5 +184,10 @@ TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_u_i32x4_f32x4, 
"V4UiV4f", "nc", "rel
 TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_s_zero_i32x4_f64x2, "V4iV2d", 
"nc", "relaxed-simd")
 TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_u_zero_i32x4_f64x2, "V4UiV2d", 
"nc", "relaxed-simd")
 
+TARGET_BUILTIN(__builtin_wasm_relaxed_q15mulr_s_i16x8, "V8sV8sV8s", "nc", 
"relaxed-simd")
+
+TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_s_i16x8, "V8sV16ScV16Sc", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_add_s_i32x4, "V4iV16ScV16ScV4i", 
"nc", "relaxed-simd")
+
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 1c10d32de5fe9..9d2e6dfb320d5 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18684,6 +18684,26 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo);
 return Builder.CreateCall(Callee, {Vec});
   }
+  case WebAssembly::BI__builtin_wasm_relaxed_q15mulr_s_i16x8: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Function *Callee = 
CGM.getIntrinsic(Intrinsic::wasm_relaxed_q15mulr_signed);
+return Builder.CreateCall(Callee, {LHS, RHS});
+  }
+  case WebAssembly::BI__builtin_wasm_dot_i8x16_i7x16_s_i16x8: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Function *Callee = 
CGM.getIntrinsic(Intrinsic::wasm_dot_i8x16_i7x16_signed);
+return Builder.CreateCall(Callee, {LHS, RHS});
+  }
+  case WebAssembly::BI__builtin_wasm_dot_i8x16_i7x16_add_s_i32x4: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Value *Acc = EmitScalarExpr(E->getArg(2));
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_dot_i8x16_i7x16_add_signed);
+return Builder.CreateCall(Callee, {LHS, RHS, Acc});
+  }
   default:
 return nullptr;
   }

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 6ea97e293077a..d9ea753ee86a2 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -777,3 +777,24 @@ u32x4 relaxed_trunc_u_zero_i32x4_f64x2(f64x2 x) {
   // WEBASSEMBLY: call <4 x i32> @llvm.wasm.relaxed.trunc.unsigned.zero(<2 x 
double> %x)
   // WEBASSEMBLY-NEXT: ret
 }
+
+i16x8 relaxed_q15mulr_s_i16x8(i16x8 a, i16x8 b) {
+  return __builtin_wasm_relaxed_q15mulr_s_i16x8(a, b);
+  // WEBASSEMBLY: call <8 x i16> @llvm.wasm.relaxed.q15mulr.signed(
+  // WEBASSEMBLY-SAME: <8 x i16> %a, <8 x i16> %b)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i16x8 dot_i8x16_i7x16_s_i16x8(i8x16 a, i8x16 b) {
+  return __builtin_wasm_dot_i8x16_i7x16_s_i16x8(a, b);
+  // WEBASSEMBLY: call <8 x i16> @llvm.wasm.dot.i8x16.i7x16.signed(
+  // WEBASSEMBLY-SAME: <16 x i8> %a, <16 x i8> %b)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i32x4 dot_i8x16_i7x16_add_s_i32x4(i8x16 a, i8x16 b, i32x4 c) {
+  return __builtin_wasm_dot_i8x16_i7x16_add_s_i32x4(a, b, c);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.dot.i8x16.i7x16.add.signed(
+  // WEBASSEMBLY-SAME: <16 x i8> %a, <16 x i8> %b, <4 x i32> %c)
+  // WEBASSEMBLY-NEXT: ret
+}

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index 2f3edfe806579..f313be1b2235d 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ 

[clang] 7e8913d - [WebAssembly] Fix names of SIMD instructions containing '_zero'

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2022-03-16T13:34:57-07:00
New Revision: 7e8913d775ca2959861425dca886f98ac03ab9b4

URL: 
https://github.com/llvm/llvm-project/commit/7e8913d775ca2959861425dca886f98ac03ab9b4
DIFF: 
https://github.com/llvm/llvm-project/commit/7e8913d775ca2959861425dca886f98ac03ab9b4.diff

LOG: [WebAssembly] Fix names of SIMD instructions containing '_zero'

Fix the instruction names to match the WebAssembly spec:

 - `i32x4.trunc_sat_zero_f64x2_{s,u}` => `i32x4.trunc_sat_f64x2_{s,u}_zero`
 - `f32x4.demote_zero_f64x2` => `f32x4.demote_f64x2_zero`

Also rename related things like intrinsics, builtins, and test functions to
match.

Reviewed By: aheejin

Differential Revision: https://reviews.llvm.org/D121661

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-conversions.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 057d968e9bca3..24fb24f81fc14 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -158,8 +158,8 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, 
"V16UcV8sV8s", "nc", "simd12
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4iV4i", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4, "V4iV2d", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_trunc_sat_s_zero_f64x2_i32x4, "V4iV2d", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_trunc_sat_u_zero_f64x2_i32x4, "V4UiV2d", "nc", 
"simd128")
 
 // Relaxed SIMD builtins (experimental)
 TARGET_BUILTIN(__builtin_wasm_fma_f32x4, "V4fV4fV4fV4f", "nc", "relaxed-simd")
@@ -181,8 +181,8 @@ TARGET_BUILTIN(__builtin_wasm_relaxed_max_f64x2, 
"V2dV2dV2d", "nc", "relaxed-sim
 
 TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_s_i32x4_f32x4, "V4iV4f", "nc", 
"relaxed-simd")
 TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_u_i32x4_f32x4, "V4UiV4f", "nc", 
"relaxed-simd")
-TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_zero_s_i32x4_f64x2, "V4iV2d", 
"nc", "relaxed-simd")
-TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_zero_u_i32x4_f64x2, "V4UiV2d", 
"nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_s_zero_i32x4_f64x2, "V4iV2d", 
"nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_u_zero_i32x4_f64x2, "V4UiV2d", 
"nc", "relaxed-simd")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 6383dfdd89508..bdb430c62e0d5 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18411,15 +18411,15 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(IntNo, {ConvertType(E->getType()), Low->getType()});
 return Builder.CreateCall(Callee, {Low, High});
   }
-  case WebAssembly::BI__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4:
-  case WebAssembly::BI__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4: {
+  case WebAssembly::BI__builtin_wasm_trunc_sat_s_zero_f64x2_i32x4:
+  case WebAssembly::BI__builtin_wasm_trunc_sat_u_zero_f64x2_i32x4: {
 Value *Vec = EmitScalarExpr(E->getArg(0));
 unsigned IntNo;
 switch (BuiltinID) {
-case WebAssembly::BI__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4:
+case WebAssembly::BI__builtin_wasm_trunc_sat_s_zero_f64x2_i32x4:
   IntNo = Intrinsic::fptosi_sat;
   break;
-case WebAssembly::BI__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4:
+case WebAssembly::BI__builtin_wasm_trunc_sat_u_zero_f64x2_i32x4:
   IntNo = Intrinsic::fptoui_sat;
   break;
 default:
@@ -18510,8 +18510,8 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
   }
   case WebAssembly::BI__builtin_wasm_relaxed_trunc_s_i32x4_f32x4:
   case WebAssembly::BI__builtin_wasm_relaxed_trunc_u_i32x4_f32x4:
-  case WebAssembly::BI__builtin_wasm_relaxed_trunc_zero_s_i32x4_f64x2:
-  case WebAssembly::BI__builtin_wasm_relaxed_trunc_zero_u_i32x4_f64x2: {
+  case WebAssembly::BI__builtin_wasm_relaxed_trunc_s_zero_i32x4_f64x2:
+  case WebAssembly::BI__builtin_wasm_relaxed_trunc_u_zero_i32x4_f64x2: {
 Value *Vec = EmitScalarExpr(E->getArg(0));
 unsigned IntNo;
 switch (BuiltinID) {
@@ -18521,11 +18521,11 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 case 

[clang] c01ec30 - [WebAssembly] Update Preprocessor/init.c test after 3be9e0ba972c

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2022-03-04T18:40:10-08:00
New Revision: c01ec3083026f7e24e6c06f48a05d413e2c697d4

URL: 
https://github.com/llvm/llvm-project/commit/c01ec3083026f7e24e6c06f48a05d413e2c697d4
DIFF: 
https://github.com/llvm/llvm-project/commit/c01ec3083026f7e24e6c06f48a05d413e2c697d4.diff

LOG: [WebAssembly] Update Preprocessor/init.c test after 3be9e0ba972c

Added: 


Modified: 
clang/test/Preprocessor/init.c

Removed: 




diff  --git a/clang/test/Preprocessor/init.c b/clang/test/Preprocessor/init.c
index a08e503570723..33354e8975fd2 100644
--- a/clang/test/Preprocessor/init.c
+++ b/clang/test/Preprocessor/init.c
@@ -1483,7 +1483,7 @@
 // RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 
-triple=wasm32-emscripten \
 // RUN:   < /dev/null \
 // RUN:   | FileCheck -match-full-lines 
-check-prefixes=WEBASSEMBLY,WEBASSEMBLY32,EMSCRIPTEN %s
-// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 
-triple=wasm32-emscripten -pthread -target-feature +atomics \
+// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 
-triple=wasm32-emscripten -pthread -target-feature +atomics -target-feature 
+bulk-memory \
 // RUN:   < /dev/null \
 // RUN:   | FileCheck -match-full-lines 
-check-prefixes=WEBASSEMBLY,WEBASSEMBLY32,EMSCRIPTEN,EMSCRIPTEN-THREADS %s
 // RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 
-triple=wasm64-emscripten \
@@ -1498,7 +1498,7 @@
 // RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 
-triple=wasm32-unknown-unknown -x c++ \
 // RUN:   < /dev/null \
 // RUN:   | FileCheck -match-full-lines -check-prefixes=WEBASSEMBLY-CXX %s
-// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 
-triple=wasm32-unknown-unknown -x c++ -pthread -target-feature +atomics \
+// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 
-triple=wasm32-unknown-unknown -x c++ -pthread -target-feature +atomics 
-target-feature +bulk-memory \
 // RUN:   < /dev/null \
 // RUN:   | FileCheck -match-full-lines 
-check-prefixes=WEBASSEMBLY-CXX-ATOMICS %s
 //



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[clang] 3be9e0b - [WebAssembly] Check bulk-memory when adjusting lang opts

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2022-03-04T16:07:16-08:00
New Revision: 3be9e0ba972cc3486971f745a606e2c44472b655

URL: 
https://github.com/llvm/llvm-project/commit/3be9e0ba972cc3486971f745a606e2c44472b655
DIFF: 
https://github.com/llvm/llvm-project/commit/3be9e0ba972cc3486971f745a606e2c44472b655.diff

LOG: [WebAssembly] Check bulk-memory when adjusting lang opts

We previously had logic to disable pthreads, set the ThreadModel to Single, and
disable thread-safe statics when the atomics target features is disabled, since
that means that the resulting program will not be used in a threaded context.
Similarly check for the presence of the bulk-memory feature, since that is also
necessary to produce multithreaded programs.

Differential Revision: https://reviews.llvm.org/D121014

Added: 


Modified: 
clang/lib/Basic/Targets/WebAssembly.cpp
clang/test/CodeGenCXX/static-init-wasm.cpp

Removed: 




diff  --git a/clang/lib/Basic/Targets/WebAssembly.cpp 
b/clang/lib/Basic/Targets/WebAssembly.cpp
index 023c03c7cf5c0..18ff109bf2d39 100644
--- a/clang/lib/Basic/Targets/WebAssembly.cpp
+++ b/clang/lib/Basic/Targets/WebAssembly.cpp
@@ -256,9 +256,10 @@ ArrayRef 
WebAssemblyTargetInfo::getTargetBuiltins() const {
 void WebAssemblyTargetInfo::adjust(DiagnosticsEngine ,
LangOptions ) {
   TargetInfo::adjust(Diags, Opts);
-  // If the Atomics feature isn't available, turn off POSIXThreads and
-  // ThreadModel, so that we don't predefine _REENTRANT or __STDCPP_THREADS__.
-  if (!HasAtomics) {
+  // Turn off POSIXThreads and ThreadModel so that we don't predefine 
_REENTRANT
+  // or __STDCPP_THREADS__ if we will eventually end up stripping atomics
+  // because they are unsupported.
+  if (!HasAtomics || !HasBulkMemory) {
 Opts.POSIXThreads = false;
 Opts.setThreadModel(LangOptions::ThreadModelKind::Single);
 Opts.ThreadsafeStatics = false;

diff  --git a/clang/test/CodeGenCXX/static-init-wasm.cpp 
b/clang/test/CodeGenCXX/static-init-wasm.cpp
index 0a066de616fa9..3742976ca4947 100644
--- a/clang/test/CodeGenCXX/static-init-wasm.cpp
+++ b/clang/test/CodeGenCXX/static-init-wasm.cpp
@@ -1,6 +1,6 @@
-// RUN: %clang_cc1 -emit-llvm -triple=wasm32-unknown-unknown -target-feature 
+atomics -o - %s \
+// RUN: %clang_cc1 -emit-llvm -triple=wasm32-unknown-unknown -target-feature 
+atomics -target-feature +bulk-memory -o - %s \
 // RUN:   | FileCheck %s -check-prefix=WEBASSEMBLY32
-// RUN: %clang_cc1 -emit-llvm -triple=wasm64-unknown-unknown -target-feature 
+atomics -o - %s \
+// RUN: %clang_cc1 -emit-llvm -triple=wasm64-unknown-unknown -target-feature 
+atomics -target-feature +bulk-memory -o - %s \
 // RUN:   | FileCheck %s -check-prefix=WEBASSEMBLY64
 
 // Test that we don't create common blocks.
@@ -53,9 +53,9 @@ A theA;
 // WEBASSEMBLY64: define internal void @_GLOBAL__sub_I_static_init_wasm.cpp() 
#3 {
 // WEBASSEMBLY64: call void @__cxx_global_var_init()
 
-// RUN: %clang_cc1 -emit-llvm -triple=wasm32-unknown-unknown -o - %s \
+// RUN: %clang_cc1 -emit-llvm -triple=wasm32-unknown-unknown -target-feature 
+bulk-memory -o - %s \
 // RUN:   | FileCheck %s -check-prefix=NOATOMICS
-// RUN: %clang_cc1 -emit-llvm -triple=wasm64-unknown-unknown -o - %s \
+// RUN: %clang_cc1 -emit-llvm -triple=wasm64-unknown-unknown -target-feature 
+bulk-memory -o - %s \
 // RUN:   | FileCheck %s -check-prefix=NOATOMICS
 
 // NOATOMICS-LABEL: @_Z1gv()
@@ -66,3 +66,17 @@ A theA;
 // NOATOMICS-NOT:   __cxa_guard_acquire
 // NOATOMICS:   [[END]]:
 // NOATOMICS-NEXT:  ret void
+
+// RUN: %clang_cc1 -emit-llvm -triple=wasm32-unknown-unknown -target-feature 
+atomics -o - %s \
+// RUN:   | FileCheck %s -check-prefix=NOBULKMEM
+// RUN: %clang_cc1 -emit-llvm -triple=wasm64-unknown-unknown -target-feature 
+atomics -o - %s \
+// RUN:   | FileCheck %s -check-prefix=NOBULKMEM
+
+// NOBULKMEM-LABEL: @_Z1gv()
+// NOBULKMEM:   %[[R0:.+]] = load i8, i8* @_ZGVZ1gvE1a, align 1
+// NOBULKMEM-NEXT:  %guard.uninitialized = icmp eq i8 %[[R0]], 0
+// NOBULKMEM-NEXT:  br i1 %guard.uninitialized, label %[[CHECK:.+]], label 
%[[END:.+]],
+// NOBULKMEM:   [[CHECK]]:
+// NOBULKMEM-NOT:   __cxa_guard_acquire
+// NOBULKMEM:   [[END]]:
+// NOBULKMEM-NEXT:  ret void



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[clang] fb67f3d - [WebAssembly] Add prototype relaxed float to int trunc instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-10-28T14:01:53-07:00
New Revision: fb67f3d96980519fa77c25f708dc7dfe9065beca

URL: 
https://github.com/llvm/llvm-project/commit/fb67f3d96980519fa77c25f708dc7dfe9065beca
DIFF: 
https://github.com/llvm/llvm-project/commit/fb67f3d96980519fa77c25f708dc7dfe9065beca.diff

LOG: [WebAssembly] Add prototype relaxed float to int trunc instructions

Add i32x4.relaxed_trunc_f32x4_s, i32x4.relaxed_trunc_f32x4_u,
i32x4.relaxed_trunc_f64x2_s_zero, i32x4.relaxed_trunc_f64x2_u_zero.

These are only exposed as builtins, and require user opt-in.

Differential Revision: https://reviews.llvm.org/D112186

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index c30a2a606016..057d968e9bca 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -179,5 +179,10 @@ TARGET_BUILTIN(__builtin_wasm_relaxed_max_f32x4, 
"V4fV4fV4f", "nc", "relaxed-sim
 TARGET_BUILTIN(__builtin_wasm_relaxed_min_f64x2, "V2dV2dV2d", "nc", 
"relaxed-simd")
 TARGET_BUILTIN(__builtin_wasm_relaxed_max_f64x2, "V2dV2dV2d", "nc", 
"relaxed-simd")
 
+TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_s_i32x4_f32x4, "V4iV4f", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_u_i32x4_f32x4, "V4UiV4f", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_zero_s_i32x4_f64x2, "V4iV2d", 
"nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_trunc_zero_u_i32x4_f64x2, "V4UiV2d", 
"nc", "relaxed-simd")
+
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 02cba577a542..501b0e3c3443 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18391,6 +18391,31 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo, LHS->getType());
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_relaxed_trunc_s_i32x4_f32x4:
+  case WebAssembly::BI__builtin_wasm_relaxed_trunc_u_i32x4_f32x4:
+  case WebAssembly::BI__builtin_wasm_relaxed_trunc_zero_s_i32x4_f64x2:
+  case WebAssembly::BI__builtin_wasm_relaxed_trunc_zero_u_i32x4_f64x2: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_relaxed_trunc_s_i32x4_f32x4:
+  IntNo = Intrinsic::wasm_relaxed_trunc_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_relaxed_trunc_u_i32x4_f32x4:
+  IntNo = Intrinsic::wasm_relaxed_trunc_unsigned;
+  break;
+case WebAssembly::BI__builtin_wasm_relaxed_trunc_zero_s_i32x4_f64x2:
+  IntNo = Intrinsic::wasm_relaxed_trunc_zero_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_relaxed_trunc_zero_u_i32x4_f64x2:
+  IntNo = Intrinsic::wasm_relaxed_trunc_zero_unsigned;
+  break;
+default:
+  llvm_unreachable("unexpected builtin ID");
+}
+Function *Callee = CGM.getIntrinsic(IntNo);
+return Builder.CreateCall(Callee, {Vec});
+  }
   default:
 return nullptr;
   }

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 8eb8522d90b5..36b70a8fbbcb 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -765,3 +765,27 @@ f64x2 relaxed_max_f64x2(f64x2 a, f64x2 b) {
   // WEBASSEMBLY-SAME: <2 x double> %a, <2 x double> %b)
   // WEBASSEMBLY-NEXT: ret
 }
+
+i32x4 relaxed_trunc_s_i32x4_f32x4(f32x4 f) {
+  return __builtin_wasm_relaxed_trunc_s_i32x4_f32x4(f);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.relaxed.trunc.signed(<4 x float> 
%f)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+u32x4 relaxed_trunc_u_i32x4_f32x4(f32x4 f) {
+  return __builtin_wasm_relaxed_trunc_u_i32x4_f32x4(f);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.relaxed.trunc.unsigned(<4 x float> 
%f)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i32x4 relaxed_trunc_zero_s_i32x4_f64x2(f64x2 x) {
+  return __builtin_wasm_relaxed_trunc_zero_s_i32x4_f64x2(x);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.relaxed.trunc.zero.signed(<2 x 
double> %x)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+u32x4 relaxed_trunc_zero_u_i32x4_f64x2(f64x2 x) {
+  return __builtin_wasm_relaxed_trunc_zero_u_i32x4_f64x2(x);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.relaxed.trunc.zero.unsigned(<2 x 
double> %x)
+  // WEBASSEMBLY-NEXT: ret
+}

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 

[clang] e1fb134 - [WebAssembly] Add prototype relaxed float min max instructions

[Thomas Lively via cfe-commits]

Author: Zhi An Ng
Date: 2021-10-20T09:41:51-07:00
New Revision: e1fb13401e1b90a912ba83c6d1a82794cfdb8aec

URL: 
https://github.com/llvm/llvm-project/commit/e1fb13401e1b90a912ba83c6d1a82794cfdb8aec
DIFF: 
https://github.com/llvm/llvm-project/commit/e1fb13401e1b90a912ba83c6d1a82794cfdb8aec.diff

LOG: [WebAssembly] Add prototype relaxed float min max instructions

Add relaxed. f32x4.min, f32x4.max, f64x2.min, f64x2.max. These are only
exposed as builtins, and require user opt-in.

Differential Revision: https://reviews.llvm.org/D112146

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 0eecab3c31f26..c30a2a6060169 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -174,5 +174,10 @@ TARGET_BUILTIN(__builtin_wasm_laneselect_i64x2, 
"V2LLiV2LLiV2LLiV2LLi", "nc", "r
 
 TARGET_BUILTIN(__builtin_wasm_relaxed_swizzle_i8x16, "V16ScV16ScV16Sc", "nc", 
"relaxed-simd")
 
+TARGET_BUILTIN(__builtin_wasm_relaxed_min_f32x4, "V4fV4fV4f", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_max_f32x4, "V4fV4fV4f", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_min_f64x2, "V2dV2dV2d", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_max_f64x2, "V2dV2dV2d", "nc", 
"relaxed-simd")
+
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 9ef9d4f1c2d9e..d20415f1ced6c 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18325,6 +18325,28 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_relaxed_swizzle);
 return Builder.CreateCall(Callee, {Src, Indices});
   }
+  case WebAssembly::BI__builtin_wasm_relaxed_min_f32x4:
+  case WebAssembly::BI__builtin_wasm_relaxed_max_f32x4:
+  case WebAssembly::BI__builtin_wasm_relaxed_min_f64x2:
+  case WebAssembly::BI__builtin_wasm_relaxed_max_f64x2: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_relaxed_min_f32x4:
+case WebAssembly::BI__builtin_wasm_relaxed_min_f64x2:
+  IntNo = Intrinsic::wasm_relaxed_min;
+  break;
+case WebAssembly::BI__builtin_wasm_relaxed_max_f32x4:
+case WebAssembly::BI__builtin_wasm_relaxed_max_f64x2:
+  IntNo = Intrinsic::wasm_relaxed_max;
+  break;
+default:
+  llvm_unreachable("unexpected builtin ID");
+}
+Function *Callee = CGM.getIntrinsic(IntNo, LHS->getType());
+return Builder.CreateCall(Callee, {LHS, RHS});
+  }
   default:
 return nullptr;
   }

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 489565ee09d15..8eb8522d90b5b 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -737,3 +737,31 @@ i8x16 relaxed_swizzle_i8x16(i8x16 x, i8x16 y) {
   return __builtin_wasm_relaxed_swizzle_i8x16(x, y);
   // WEBASSEMBLY: call <16 x i8> @llvm.wasm.relaxed.swizzle(<16 x i8> %x, <16 
x i8> %y)
 }
+
+f32x4 relaxed_min_f32x4(f32x4 a, f32x4 b) {
+  return __builtin_wasm_relaxed_min_f32x4(a, b);
+  // WEBASSEMBLY: call <4 x float> @llvm.wasm.relaxed.min.v4f32(
+  // WEBASSEMBLY-SAME: <4 x float> %a, <4 x float> %b)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+f32x4 relaxed_max_f32x4(f32x4 a, f32x4 b) {
+  return __builtin_wasm_relaxed_max_f32x4(a, b);
+  // WEBASSEMBLY: call <4 x float> @llvm.wasm.relaxed.max.v4f32(
+  // WEBASSEMBLY-SAME: <4 x float> %a, <4 x float> %b)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+f64x2 relaxed_min_f64x2(f64x2 a, f64x2 b) {
+  return __builtin_wasm_relaxed_min_f64x2(a, b);
+  // WEBASSEMBLY: call <2 x double> @llvm.wasm.relaxed.min.v2f64(
+  // WEBASSEMBLY-SAME: <2 x double> %a, <2 x double> %b)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+f64x2 relaxed_max_f64x2(f64x2 a, f64x2 b) {
+  return __builtin_wasm_relaxed_max_f64x2(a, b);
+  // WEBASSEMBLY: call <2 x double> @llvm.wasm.relaxed.max.v2f64(
+  // WEBASSEMBLY-SAME: <2 x double> %a, <2 x double> %b)
+  // WEBASSEMBLY-NEXT: ret
+}

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index d832195609f09..53d63a0d4dcc7 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -205,6 +205,15 @@ def int_wasm_relaxed_swizzle :
   

[clang] 2542bfa - [WebAssembly] Add prototype relaxed swizzle instructions

[Thomas Lively via cfe-commits]

Author: Zhi An Ng
Date: 2021-10-19T17:53:04-07:00
New Revision: 2542bfa43a9709982ee20f8d86f905f4115c41f9

URL: 
https://github.com/llvm/llvm-project/commit/2542bfa43a9709982ee20f8d86f905f4115c41f9
DIFF: 
https://github.com/llvm/llvm-project/commit/2542bfa43a9709982ee20f8d86f905f4115c41f9.diff

LOG: [WebAssembly] Add prototype relaxed swizzle instructions

Add i8x16 relaxed_swizzle instructions. These are only
exposed as builtins, and require user opt-in.

Differential Revision: https://reviews.llvm.org/D112022

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 557189c01a279..0eecab3c31f26 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -172,5 +172,7 @@ TARGET_BUILTIN(__builtin_wasm_laneselect_i16x8, 
"V8sV8sV8sV8s", "nc", "relaxed-s
 TARGET_BUILTIN(__builtin_wasm_laneselect_i32x4, "V4iV4iV4iV4i", "nc", 
"relaxed-simd")
 TARGET_BUILTIN(__builtin_wasm_laneselect_i64x2, "V2LLiV2LLiV2LLiV2LLi", "nc", 
"relaxed-simd")
 
+TARGET_BUILTIN(__builtin_wasm_relaxed_swizzle_i8x16, "V16ScV16ScV16Sc", "nc", 
"relaxed-simd")
+
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 9a44fddafd649..9ef9d4f1c2d9e 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18319,6 +18319,12 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(Intrinsic::wasm_laneselect, A->getType());
 return Builder.CreateCall(Callee, {A, B, C});
   }
+  case WebAssembly::BI__builtin_wasm_relaxed_swizzle_i8x16: {
+Value *Src = EmitScalarExpr(E->getArg(0));
+Value *Indices = EmitScalarExpr(E->getArg(1));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_relaxed_swizzle);
+return Builder.CreateCall(Callee, {Src, Indices});
+  }
   default:
 return nullptr;
   }

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index e86812c03f3ac..489565ee09d15 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -732,3 +732,8 @@ i64x2 laneselect_i64x2(i64x2 a, i64x2 b, i64x2 c) {
   // WEBASSEMBLY-SAME: <2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
   // WEBASSEMBLY-NEXT: ret
 }
+
+i8x16 relaxed_swizzle_i8x16(i8x16 x, i8x16 y) {
+  return __builtin_wasm_relaxed_swizzle_i8x16(x, y);
+  // WEBASSEMBLY: call <16 x i8> @llvm.wasm.relaxed.swizzle(<16 x i8> %x, <16 
x i8> %y)
+}

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index 7d0f38bc9889d..d832195609f09 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -200,6 +200,11 @@ def int_wasm_laneselect :
 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
 [IntrNoMem, IntrSpeculatable]>;
 
+def int_wasm_relaxed_swizzle :
+  Intrinsic<[llvm_v16i8_ty],
+[llvm_v16i8_ty, llvm_v16i8_ty],
+[IntrNoMem, IntrSpeculatable]>;
+
 
//===--===//
 // Thread-local storage intrinsics
 
//===--===//

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td 
b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index 7f540736cf873..aee39423915f6 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -1361,3 +1361,14 @@ defm "" : SIMDLANESELECT;
 defm "" : SIMDLANESELECT;
 defm "" : SIMDLANESELECT;
 defm "" : SIMDLANESELECT;
+
+
+//===--===//
+// Relaxed swizzle
+//===--===//
+
+defm RELAXED_SWIZZLE :
+  RELAXED_I<(outs V128:$dst), (ins V128:$src, V128:$mask), (outs), (ins),
+ [(set (v16i8 V128:$dst),
+   (int_wasm_relaxed_swizzle (v16i8 V128:$src), (v16i8 V128:$mask)))],
+ "i8x16.relaxed_swizzle\t$dst, $src, $mask", "i8x16.relaxed_swizzle", 
162>;

diff  --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll 
b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
index 660a10781987c..1f54aeac9a7fc 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
@@ -192,6 +192,16 @@ define <16 x i8> 

[clang] da07942 - [WebAssembly] Add prototype relaxed laneselect instructions

[Thomas Lively via cfe-commits]

Author: Zhi An Ng
Date: 2021-10-15T17:45:09-07:00
New Revision: da07942834fe3ea575d7f7b980940d938411afe5

URL: 
https://github.com/llvm/llvm-project/commit/da07942834fe3ea575d7f7b980940d938411afe5
DIFF: 
https://github.com/llvm/llvm-project/commit/da07942834fe3ea575d7f7b980940d938411afe5.diff

LOG: [WebAssembly] Add prototype relaxed laneselect instructions

Add i8x16, i16x8, i32x4, i64x2 laneselect instructions. These are only
exposed as builtins, and require user opt-in.

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 778424686a10b..557189c01a279 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -167,5 +167,10 @@ TARGET_BUILTIN(__builtin_wasm_fms_f32x4, "V4fV4fV4fV4f", 
"nc", "relaxed-simd")
 TARGET_BUILTIN(__builtin_wasm_fma_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
 TARGET_BUILTIN(__builtin_wasm_fms_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
 
+TARGET_BUILTIN(__builtin_wasm_laneselect_i8x16, "V16ScV16ScV16ScV16Sc", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_laneselect_i16x8, "V8sV8sV8sV8s", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_laneselect_i32x4, "V4iV4iV4iV4i", "nc", 
"relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_laneselect_i64x2, "V2LLiV2LLiV2LLiV2LLi", "nc", 
"relaxed-simd")
+
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 9172a21c5a985..9a44fddafd649 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18308,6 +18308,17 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo, A->getType());
 return Builder.CreateCall(Callee, {A, B, C});
   }
+  case WebAssembly::BI__builtin_wasm_laneselect_i8x16:
+  case WebAssembly::BI__builtin_wasm_laneselect_i16x8:
+  case WebAssembly::BI__builtin_wasm_laneselect_i32x4:
+  case WebAssembly::BI__builtin_wasm_laneselect_i64x2: {
+Value *A = EmitScalarExpr(E->getArg(0));
+Value *B = EmitScalarExpr(E->getArg(1));
+Value *C = EmitScalarExpr(E->getArg(2));
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_laneselect, A->getType());
+return Builder.CreateCall(Callee, {A, B, C});
+  }
   default:
 return nullptr;
   }

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 914c37dc1e1ef..e86812c03f3ac 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -704,3 +704,31 @@ f64x2 fms_f64x2(f64x2 a, f64x2 b, f64x2 c) {
   // WEBASSEMBLY-SAME: <2 x double> %a, <2 x double> %b, <2 x double> %c)
   // WEBASSEMBLY-NEXT: ret
 }
+
+i8x16 laneselect_i8x16(i8x16 a, i8x16 b, i8x16 c) {
+  return __builtin_wasm_laneselect_i8x16(a, b, c);
+  // WEBASSEMBLY: call <16 x i8> @llvm.wasm.laneselect.v16i8(
+  // WEBASSEMBLY-SAME: <16 x i8> %a, <16 x i8> %b, <16 x i8> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i16x8 laneselect_i16x8(i16x8 a, i16x8 b, i16x8 c) {
+  return __builtin_wasm_laneselect_i16x8(a, b, c);
+  // WEBASSEMBLY: call <8 x i16> @llvm.wasm.laneselect.v8i16(
+  // WEBASSEMBLY-SAME: <8 x i16> %a, <8 x i16> %b, <8 x i16> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i32x4 laneselect_i32x4(i32x4 a, i32x4 b, i32x4 c) {
+  return __builtin_wasm_laneselect_i32x4(a, b, c);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.laneselect.v4i32(
+  // WEBASSEMBLY-SAME: <4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i64x2 laneselect_i64x2(i64x2 a, i64x2 b, i64x2 c) {
+  return __builtin_wasm_laneselect_i64x2(a, b, c);
+  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.laneselect.v2i64(
+  // WEBASSEMBLY-SAME: <2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
+  // WEBASSEMBLY-NEXT: ret
+}

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index de0b36eadecfa..7d0f38bc9889d 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -195,6 +195,11 @@ def int_wasm_fms :
 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
 [IntrNoMem, IntrSpeculatable]>;
 
+def int_wasm_laneselect :
+  Intrinsic<[llvm_anyvector_ty],
+[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+[IntrNoMem, IntrSpeculatable]>;
+
 
//===--===//
 // Thread-local storage 

[clang] 2f51982 - [WebAssembly] Add prototype relaxed SIMD fma/fms instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-09-23T11:01:36-07:00
New Revision: 2f519825ba56cc2377ef9fbf1514944215ed9d0d

URL: 
https://github.com/llvm/llvm-project/commit/2f519825ba56cc2377ef9fbf1514944215ed9d0d
DIFF: 
https://github.com/llvm/llvm-project/commit/2f519825ba56cc2377ef9fbf1514944215ed9d0d.diff

LOG: [WebAssembly] Add prototype relaxed SIMD fma/fms instructions

Add experimental clang builtins, LLVM intrinsics, and backend definitions for
the new {f32x4,f64x2}.{fma,fms} instructions in the relaxed SIMD proposal:
https://github.com/WebAssembly/relaxed-simd/blob/main/proposals/relaxed-simd/Overview.md.
Do not allow these instructions to be selected without explicit user opt-in.

Differential Revision: https://reviews.llvm.org/D110295

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index f5120b23f8118..778424686a10b 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -161,5 +161,11 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, 
"V8UsV4iV4i", "nc", "simd128
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4, "V4iV2d", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", 
"simd128")
 
+// Relaxed SIMD builtins (experimental)
+TARGET_BUILTIN(__builtin_wasm_fma_f32x4, "V4fV4fV4fV4f", "nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_fms_f32x4, "V4fV4fV4fV4f", "nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_fma_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_fms_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
+
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index d485e8e767692..2a9ab387fa527 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18222,6 +18222,29 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_shuffle);
 return Builder.CreateCall(Callee, Ops);
   }
+  case WebAssembly::BI__builtin_wasm_fma_f32x4:
+  case WebAssembly::BI__builtin_wasm_fms_f32x4:
+  case WebAssembly::BI__builtin_wasm_fma_f64x2:
+  case WebAssembly::BI__builtin_wasm_fms_f64x2: {
+Value *A = EmitScalarExpr(E->getArg(0));
+Value *B = EmitScalarExpr(E->getArg(1));
+Value *C = EmitScalarExpr(E->getArg(2));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_fma_f32x4:
+case WebAssembly::BI__builtin_wasm_fma_f64x2:
+  IntNo = Intrinsic::wasm_fma;
+  break;
+case WebAssembly::BI__builtin_wasm_fms_f32x4:
+case WebAssembly::BI__builtin_wasm_fms_f64x2:
+  IntNo = Intrinsic::wasm_fms;
+  break;
+default:
+  llvm_unreachable("unexpected builtin ID");
+}
+Function *Callee = CGM.getIntrinsic(IntNo, A->getType());
+return Builder.CreateCall(Callee, {A, B, C});
+  }
   default:
 return nullptr;
   }

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 7f67d78693d0c..914c37dc1e1ef 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple wasm32-unknown-unknown -target-feature +simd128 
-target-feature +nontrapping-fptoint -target-feature +exception-handling 
-target-feature +bulk-memory -target-feature +atomics 
-flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s 
-check-prefixes WEBASSEMBLY,WEBASSEMBLY32
-// RUN: %clang_cc1 -triple wasm64-unknown-unknown -target-feature +simd128 
-target-feature +nontrapping-fptoint -target-feature +exception-handling 
-target-feature +bulk-memory -target-feature +atomics 
-flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s 
-check-prefixes WEBASSEMBLY,WEBASSEMBLY64
+// RUN: %clang_cc1 -triple wasm32-unknown-unknown -target-feature +simd128 
-target-feature +relaxed-simd -target-feature +nontrapping-fptoint 
-target-feature +exception-handling -target-feature +bulk-memory 
-target-feature +atomics -flax-vector-conversions=none -O3 -emit-llvm -o - %s | 
FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY32
+// RUN: %clang_cc1 -triple wasm64-unknown-unknown -target-feature +simd128 
-target-feature +relaxed-simd -target-feature +nontrapping-fptoint 
-target-feature +exception-handling -target-feature +bulk-memory 
-target-feature +atomics 

[clang] 1552179 - [WebAssembly] Add relaxed-simd feature

[Thomas Lively via cfe-commits]

Author: Zhi An Ng
Date: 2021-09-22T14:52:50-07:00
New Revision: 1552179ac0199d819396d8b8db807016a78c8951

URL: 
https://github.com/llvm/llvm-project/commit/1552179ac0199d819396d8b8db807016a78c8951
DIFF: 
https://github.com/llvm/llvm-project/commit/1552179ac0199d819396d8b8db807016a78c8951.diff

LOG: [WebAssembly] Add relaxed-simd feature

This currently only defines a constant, but it the future will be used
to gate builtins for experimenting and prototyping relaxed-simd proposal
(https://github.com/WebAssembly/relaxed-simd/).

Differential Revision: https://reviews.llvm.org/D110111

Added: 


Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Basic/Targets/WebAssembly.cpp
clang/lib/Basic/Targets/WebAssembly.h
clang/test/Preprocessor/wasm-target-features.c
llvm/lib/Target/WebAssembly/WebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 13d740cdb0fb7..64d837f975b22 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -3337,6 +3337,8 @@ def mharden_sls_EQ : Joined<["-"], "mharden-sls=">,
 
 def msimd128 : Flag<["-"], "msimd128">, Group;
 def mno_simd128 : Flag<["-"], "mno-simd128">, Group;
+def mrelaxed_simd : Flag<["-"], "mrelaxed-simd">, Group;
+def mno_relaxed_simd : Flag<["-"], "mno-relaxed-simd">, 
Group;
 def mnontrapping_fptoint : Flag<["-"], "mnontrapping-fptoint">, 
Group;
 def mno_nontrapping_fptoint : Flag<["-"], "mno-nontrapping-fptoint">, 
Group;
 def msign_ext : Flag<["-"], "msign-ext">, Group;

diff  --git a/clang/lib/Basic/Targets/WebAssembly.cpp 
b/clang/lib/Basic/Targets/WebAssembly.cpp
index 7ef79849cb75d..61c35e65fccc1 100644
--- a/clang/lib/Basic/Targets/WebAssembly.cpp
+++ b/clang/lib/Basic/Targets/WebAssembly.cpp
@@ -46,6 +46,7 @@ bool WebAssemblyTargetInfo::setABI(const std::string ) {
 bool WebAssemblyTargetInfo::hasFeature(StringRef Feature) const {
   return llvm::StringSwitch(Feature)
   .Case("simd128", SIMDLevel >= SIMD128)
+  .Case("relaxed-simd", SIMDLevel >= RelaxedSIMD)
   .Case("nontrapping-fptoint", HasNontrappingFPToInt)
   .Case("sign-ext", HasSignExt)
   .Case("exception-handling", HasExceptionHandling)
@@ -72,6 +73,8 @@ void WebAssemblyTargetInfo::getTargetDefines(const 
LangOptions ,
   defineCPUMacros(Builder, "wasm", /*Tuning=*/false);
   if (SIMDLevel >= SIMD128)
 Builder.defineMacro("__wasm_simd128__");
+  if (SIMDLevel >= RelaxedSIMD)
+Builder.defineMacro("__wasm_relaxed_simd__");
   if (HasNontrappingFPToInt)
 Builder.defineMacro("__wasm_nontrapping_fptoint__");
   if (HasSignExt)
@@ -96,6 +99,9 @@ void 
WebAssemblyTargetInfo::setSIMDLevel(llvm::StringMap ,
  SIMDEnum Level, bool Enabled) {
   if (Enabled) {
 switch (Level) {
+case RelaxedSIMD:
+  Features["relaxed-simd"] = true;
+  LLVM_FALLTHROUGH;
 case SIMD128:
   Features["simd128"] = true;
   LLVM_FALLTHROUGH;
@@ -109,6 +115,9 @@ void 
WebAssemblyTargetInfo::setSIMDLevel(llvm::StringMap ,
   case NoSIMD:
   case SIMD128:
 Features["simd128"] = false;
+LLVM_FALLTHROUGH;
+  case RelaxedSIMD:
+Features["relaxed-simd"] = false;
 break;
   }
 }
@@ -118,6 +127,8 @@ void 
WebAssemblyTargetInfo::setFeatureEnabled(llvm::StringMap ,
   bool Enabled) const {
   if (Name == "simd128")
 setSIMDLevel(Features, SIMD128, Enabled);
+  else if (Name == "relaxed-simd")
+setSIMDLevel(Features, RelaxedSIMD, Enabled);
   else
 Features[Name] = Enabled;
 }
@@ -149,6 +160,14 @@ bool WebAssemblyTargetInfo::handleTargetFeatures(
   SIMDLevel = std::min(SIMDLevel, SIMDEnum(SIMD128 - 1));
   continue;
 }
+if (Feature == "+relaxed-simd") {
+  SIMDLevel = std::max(SIMDLevel, RelaxedSIMD);
+  continue;
+}
+if (Feature == "-relaxed-simd") {
+  SIMDLevel = std::min(SIMDLevel, SIMDEnum(RelaxedSIMD - 1));
+  continue;
+}
 if (Feature == "+nontrapping-fptoint") {
   HasNontrappingFPToInt = true;
   continue;

diff  --git a/clang/lib/Basic/Targets/WebAssembly.h 
b/clang/lib/Basic/Targets/WebAssembly.h
index 4a5ba25c75e7e..27b6576e4b7ad 100644
--- a/clang/lib/Basic/Targets/WebAssembly.h
+++ b/clang/lib/Basic/Targets/WebAssembly.h
@@ -27,6 +27,7 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public 
TargetInfo {
   enum SIMDEnum {
 NoSIMD,
 SIMD128,
+RelaxedSIMD,
   } SIMDLevel = NoSIMD;
 
   bool HasNontrappingFPToInt = false;

diff  --git a/clang/test/Preprocessor/wasm-target-features.c 
b/clang/test/Preprocessor/wasm-target-features.c
index 29cc3071a235a..3c743142a3e38 100644
--- a/clang/test/Preprocessor/wasm-target-features.c
+++ b/clang/test/Preprocessor/wasm-target-features.c
@@ -7,6 +7,15 @@
 //
 // 

[clang] 88962ce - [WebAssembly] Restore builtins and intrinsics for pmin/pmax

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-08-20T09:21:31-07:00
New Revision: 88962cea46805dbcc60524f7107030c986833052

URL: 
https://github.com/llvm/llvm-project/commit/88962cea46805dbcc60524f7107030c986833052
DIFF: 
https://github.com/llvm/llvm-project/commit/88962cea46805dbcc60524f7107030c986833052.diff

LOG: [WebAssembly] Restore builtins and intrinsics for pmin/pmax

Partially reverts 85157c007903, which had removed these builtins and intrinsics
in favor of normal codegen patterns. It turns out that it is possible for the
patterns to be split over multiple basic blocks, however, which means that DAG
ISel is not able to select them to the pmin/pmax instructions. To make sure the
SIMD intrinsics generate the correct instructions in these cases, reintroduce
the clang builtins and corresponding LLVM intrinsics, but also keep the normal
pattern matching as well.

Differential Revision: https://reviews.llvm.org/D108387

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
clang/test/Headers/wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 51a819efdee0..f5120b23f811 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -129,8 +129,12 @@ TARGET_BUILTIN(__builtin_wasm_abs_f64x2, "V2dV2d", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_min_f32x4, "V4fV4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_max_f32x4, "V4fV4fV4f", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_pmin_f32x4, "V4fV4fV4f", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_pmax_f32x4, "V4fV4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_min_f64x2, "V2dV2dV2d", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_max_f64x2, "V2dV2dV2d", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_pmin_f64x2, "V2dV2dV2d", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_pmax_f64x2, "V2dV2dV2d", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_ceil_f32x4, "V4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_floor_f32x4, "V4fV4f", "nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index d74209ae27a4..89b773fc5f97 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17822,6 +17822,22 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(Intrinsic::maximum, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_pmin_f32x4:
+  case WebAssembly::BI__builtin_wasm_pmin_f64x2: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_pmin, ConvertType(E->getType()));
+return Builder.CreateCall(Callee, {LHS, RHS});
+  }
+  case WebAssembly::BI__builtin_wasm_pmax_f32x4:
+  case WebAssembly::BI__builtin_wasm_pmax_f64x2: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_pmax, ConvertType(E->getType()));
+return Builder.CreateCall(Callee, {LHS, RHS});
+  }
   case WebAssembly::BI__builtin_wasm_ceil_f32x4:
   case WebAssembly::BI__builtin_wasm_floor_f32x4:
   case WebAssembly::BI__builtin_wasm_trunc_f32x4:

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 438a54526b33..3889a2769faf 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -1297,14 +1297,12 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f32x4_max(v128_t __a,
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_pmin(v128_t __a,
 v128_t __b) {
-  __i32x4 __mask = (__i32x4)((__f32x4)__b < (__f32x4)__a);
-  return (v128_t)__i32x4)__b) & __mask) | (((__i32x4)__a) & ~__mask));
+  return (v128_t)__builtin_wasm_pmin_f32x4((__f32x4)__a, (__f32x4)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_pmax(v128_t __a,
 v128_t __b) {
-  __i32x4 __mask = (__i32x4)((__f32x4)__a < (__f32x4)__b);
-  return (v128_t)__i32x4)__b) & __mask) | (((__i32x4)__a) & ~__mask));
+  return (v128_t)__builtin_wasm_pmax_f32x4((__f32x4)__a, (__f32x4)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_abs(v128_t __a) {
@@ -1367,14 +1365,12 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f64x2_max(v128_t __a,
 
 static __inline__ v128_t 

[clang] 64a9957 - [WebAssembly] Make shift values unsigned in wasm_simd128.h

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-08-20T09:10:37-07:00
New Revision: 64a9957bf7b65a0d10819918ac2a565d69e9c4bb

URL: 
https://github.com/llvm/llvm-project/commit/64a9957bf7b65a0d10819918ac2a565d69e9c4bb
DIFF: 
https://github.com/llvm/llvm-project/commit/64a9957bf7b65a0d10819918ac2a565d69e9c4bb.diff

LOG: [WebAssembly] Make shift values unsigned in wasm_simd128.h

On some platforms, negative shift values mean to shift in the opposite
direction, but this is not true with WebAssembly. To avoid confusion, make the
shift values in the shift intrinsics unsigned.

Differential Revision: https://reviews.llvm.org/D108415

Added: 


Modified: 
clang/lib/Headers/wasm_simd128.h
clang/test/Headers/wasm.c

Removed: 




diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 498898acaf8a..438a54526b33 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -960,17 +960,17 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_i8x16_popcnt(v128_t __a) {
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_shl(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__i8x16)__a << __b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_shr(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__i8x16)__a >> __b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_shr(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__u8x16)__a >> __b);
 }
 
@@ -1046,17 +1046,17 @@ static __inline__ uint32_t __DEFAULT_FN_ATTRS 
wasm_i16x8_bitmask(v128_t __a) {
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_shl(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__i16x8)__a << __b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_shr(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__i16x8)__a >> __b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_shr(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__u16x8)__a >> __b);
 }
 
@@ -1137,17 +1137,17 @@ static __inline__ uint32_t __DEFAULT_FN_ATTRS 
wasm_i32x4_bitmask(v128_t __a) {
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_shl(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__i32x4)__a << __b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_shr(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__i32x4)__a >> __b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_shr(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__u32x4)__a >> __b);
 }
 
@@ -1208,17 +1208,17 @@ static __inline__ uint32_t __DEFAULT_FN_ATTRS 
wasm_i64x2_bitmask(v128_t __a) {
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_shl(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__i64x2)__a << (int64_t)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_shr(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__i64x2)__a >> (int64_t)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u64x2_shr(v128_t __a,
-   int32_t __b) {
+   uint32_t __b) {
   return (v128_t)((__u64x2)__a >> (int64_t)__b);
 }
 

diff  --git a/clang/test/Headers/wasm.c b/clang/test/Headers/wasm.c
index 72f20b1520fd..ba7d3dc71f2b 100644
--- a/clang/test/Headers/wasm.c
+++ b/clang/test/Headers/wasm.c
@@ -1603,7 +1603,7 @@ v128_t test_i8x16_popcnt(v128_t a) {
 // CHECK-NEXT:[[TMP3:%.*]] = bitcast <16 x i8> [[SHL_I]] to <4 

[clang] 2456e11 - [WebAssembly] Add SIMD intrinsics using unsigned integers

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-08-20T08:56:51-07:00
New Revision: 2456e11614c10a2e648005e27e3213c77b7ab7a4

URL: 
https://github.com/llvm/llvm-project/commit/2456e11614c10a2e648005e27e3213c77b7ab7a4
DIFF: 
https://github.com/llvm/llvm-project/commit/2456e11614c10a2e648005e27e3213c77b7ab7a4.diff

LOG: [WebAssembly] Add SIMD intrinsics using unsigned integers

For each SIMD intrinsic function that takes or returns a scalar signed integer
value, ensure there is a corresponding intrinsic that returns or an
unsigned value. This is a convenience for users who use -Wsign-conversion so
they don't have to insert explicit casts, especially when the intrinsic
arguments are integer literals that fit into the unsigned integer type but not
the signed type.

Differential Revision: https://reviews.llvm.org/D108412

Added: 


Modified: 
clang/lib/Headers/wasm_simd128.h
clang/test/Headers/wasm.c

Removed: 




diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index e43c31a36e77..498898acaf8a 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -276,12 +276,28 @@ wasm_i8x16_make(int8_t __c0, int8_t __c1, int8_t __c2, 
int8_t __c3, int8_t __c4,
__c12, __c13, __c14, __c15};
 }
 
+static __inline__ v128_t __DEFAULT_FN_ATTRS
+wasm_u8x16_make(uint8_t __c0, uint8_t __c1, uint8_t __c2, uint8_t __c3,
+uint8_t __c4, uint8_t __c5, uint8_t __c6, uint8_t __c7,
+uint8_t __c8, uint8_t __c9, uint8_t __c10, uint8_t __c11,
+uint8_t __c12, uint8_t __c13, uint8_t __c14, uint8_t __c15) {
+  return (v128_t)(__u8x16){__c0,  __c1,  __c2,  __c3, __c4,  __c5,
+   __c6,  __c7,  __c8,  __c9, __c10, __c11,
+   __c12, __c13, __c14, __c15};
+}
+
 static __inline__ v128_t __DEFAULT_FN_ATTRS
 wasm_i16x8_make(int16_t __c0, int16_t __c1, int16_t __c2, int16_t __c3,
 int16_t __c4, int16_t __c5, int16_t __c6, int16_t __c7) {
   return (v128_t)(__i16x8){__c0, __c1, __c2, __c3, __c4, __c5, __c6, __c7};
 }
 
+static __inline__ v128_t __DEFAULT_FN_ATTRS
+wasm_u16x8_make(uint16_t __c0, uint16_t __c1, uint16_t __c2, uint16_t __c3,
+uint16_t __c4, uint16_t __c5, uint16_t __c6, uint16_t __c7) {
+  return (v128_t)(__u16x8){__c0, __c1, __c2, __c3, __c4, __c5, __c6, __c7};
+}
+
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_make(int32_t __c0,
 int32_t __c1,
 int32_t __c2,
@@ -289,11 +305,23 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_i32x4_make(int32_t __c0,
   return (v128_t)(__i32x4){__c0, __c1, __c2, __c3};
 }
 
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_make(uint32_t __c0,
+uint32_t __c1,
+uint32_t __c2,
+uint32_t __c3) {
+  return (v128_t)(__u32x4){__c0, __c1, __c2, __c3};
+}
+
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_make(int64_t __c0,
 int64_t __c1) {
   return (v128_t)(__i64x2){__c0, __c1};
 }
 
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u64x2_make(uint64_t __c0,
+uint64_t __c1) {
+  return (v128_t)(__u64x2){__c0, __c1};
+}
+
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_make(float __c0,
 float __c1,
 float __c2,
@@ -324,6 +352,24 @@ wasm_i8x16_const(int8_t __c0, int8_t __c1, int8_t __c2, 
int8_t __c3,
__c12, __c13, __c14, __c15};
 }
 
+static __inline__ v128_t __DEFAULT_FN_ATTRS
+wasm_u8x16_const(uint8_t __c0, uint8_t __c1, uint8_t __c2, uint8_t __c3,
+ uint8_t __c4, uint8_t __c5, uint8_t __c6, uint8_t __c7,
+ uint8_t __c8, uint8_t __c9, uint8_t __c10, uint8_t __c11,
+ uint8_t __c12, uint8_t __c13, uint8_t __c14, uint8_t __c15)
+__REQUIRE_CONSTANT(__c0) __REQUIRE_CONSTANT(__c1) __REQUIRE_CONSTANT(__c2)
+__REQUIRE_CONSTANT(__c3) __REQUIRE_CONSTANT(__c4)
+__REQUIRE_CONSTANT(__c5) __REQUIRE_CONSTANT(__c6)
+__REQUIRE_CONSTANT(__c7) __REQUIRE_CONSTANT(__c8)
+__REQUIRE_CONSTANT(__c9) __REQUIRE_CONSTANT(__c10)
+__REQUIRE_CONSTANT(__c11) __REQUIRE_CONSTANT(__c12)
+__REQUIRE_CONSTANT(__c13) __REQUIRE_CONSTANT(__c14)
+__REQUIRE_CONSTANT(__c15) {
+  return (v128_t)(__u8x16){__c0,  __c1,  __c2,  __c3, __c4,  __c5,
+   __c6,  

[clang] fd3bd63 - [WebAssembly] Make bitmask instructions return unsigned ints

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-08-19T16:23:47-07:00
New Revision: fd3bd63df26ad0a3865fd1fcbdbbd0063f2b0761

URL: 
https://github.com/llvm/llvm-project/commit/fd3bd63df26ad0a3865fd1fcbdbbd0063f2b0761
DIFF: 
https://github.com/llvm/llvm-project/commit/fd3bd63df26ad0a3865fd1fcbdbbd0063f2b0761.diff

LOG: [WebAssembly] Make bitmask instructions return unsigned ints

Since they are bitmasks, it will be more common for them to be used and
potentially extended to 64-bit integers as unsigned values rather than signed
values.

Differential Revision: https://reviews.llvm.org/D108401

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/Headers/wasm_simd128.h
clang/test/Headers/wasm.c

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 04ec45aa3b747..51a819efdee07 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -119,10 +119,10 @@ TARGET_BUILTIN(__builtin_wasm_all_true_i16x8, "iV8s", 
"nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_all_true_i32x4, "iV4i", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_all_true_i64x2, "iV2LLi", "nc", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_bitmask_i8x16, "iV16Sc", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_bitmask_i16x8, "iV8s", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_bitmask_i32x4, "iV4i", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_bitmask_i64x2, "iV2LLi", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_bitmask_i8x16, "UiV16Sc", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_bitmask_i16x8, "UiV8s", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_bitmask_i32x4, "UiV4i", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_bitmask_i64x2, "UiV2LLi", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_abs_f32x4, "V4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_abs_f64x2, "V2dV2d", "nc", "simd128")

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 712fa03780986..e43c31a36e776 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -804,7 +804,7 @@ static __inline__ bool __DEFAULT_FN_ATTRS 
wasm_i8x16_all_true(v128_t __a) {
   return __builtin_wasm_all_true_i8x16((__i8x16)__a);
 }
 
-static __inline__ int32_t __DEFAULT_FN_ATTRS wasm_i8x16_bitmask(v128_t __a) {
+static __inline__ uint32_t __DEFAULT_FN_ATTRS wasm_i8x16_bitmask(v128_t __a) {
   return __builtin_wasm_bitmask_i8x16((__i8x16)__a);
 }
 
@@ -894,7 +894,7 @@ static __inline__ bool __DEFAULT_FN_ATTRS 
wasm_i16x8_all_true(v128_t __a) {
   return __builtin_wasm_all_true_i16x8((__i16x8)__a);
 }
 
-static __inline__ int32_t __DEFAULT_FN_ATTRS wasm_i16x8_bitmask(v128_t __a) {
+static __inline__ uint32_t __DEFAULT_FN_ATTRS wasm_i16x8_bitmask(v128_t __a) {
   return __builtin_wasm_bitmask_i16x8((__i16x8)__a);
 }
 
@@ -985,7 +985,7 @@ static __inline__ bool __DEFAULT_FN_ATTRS 
wasm_i32x4_all_true(v128_t __a) {
   return __builtin_wasm_all_true_i32x4((__i32x4)__a);
 }
 
-static __inline__ int32_t __DEFAULT_FN_ATTRS wasm_i32x4_bitmask(v128_t __a) {
+static __inline__ uint32_t __DEFAULT_FN_ATTRS wasm_i32x4_bitmask(v128_t __a) {
   return __builtin_wasm_bitmask_i32x4((__i32x4)__a);
 }
 
@@ -1056,7 +1056,7 @@ static __inline__ bool __DEFAULT_FN_ATTRS 
wasm_i64x2_all_true(v128_t __a) {
   return __builtin_wasm_all_true_i64x2((__i64x2)__a);
 }
 
-static __inline__ int32_t __DEFAULT_FN_ATTRS wasm_i64x2_bitmask(v128_t __a) {
+static __inline__ uint32_t __DEFAULT_FN_ATTRS wasm_i64x2_bitmask(v128_t __a) {
   return __builtin_wasm_bitmask_i64x2((__i64x2)__a);
 }
 

diff  --git a/clang/test/Headers/wasm.c b/clang/test/Headers/wasm.c
index f51f005974f23..c2f412c445199 100644
--- a/clang/test/Headers/wasm.c
+++ b/clang/test/Headers/wasm.c
@@ -1345,7 +1345,7 @@ bool test_i8x16_all_true(v128_t a) {
 // CHECK-NEXT:[[TMP1:%.*]] = tail call i32 @llvm.wasm.bitmask.v16i8(<16 x 
i8> [[TMP0]]) #[[ATTR6]]
 // CHECK-NEXT:ret i32 [[TMP1]]
 //
-int32_t test_i8x16_bitmask(v128_t a) {
+uint32_t test_i8x16_bitmask(v128_t a) {
   return wasm_i8x16_bitmask(a);
 }
 
@@ -1577,7 +1577,7 @@ bool test_i16x8_all_true(v128_t a) {
 // CHECK-NEXT:[[TMP1:%.*]] = tail call i32 @llvm.wasm.bitmask.v8i16(<8 x 
i16> [[TMP0]]) #[[ATTR6]]
 // CHECK-NEXT:ret i32 [[TMP1]]
 //
-int32_t test_i16x8_bitmask(v128_t a) {
+uint32_t test_i16x8_bitmask(v128_t a) {
   return wasm_i16x8_bitmask(a);
 }
 
@@ -1804,7 +1804,7 @@ bool test_i32x4_all_true(v128_t a) {
 // CHECK-NEXT:[[TMP0:%.*]] = tail call i32 @llvm.wasm.bitmask.v4i32(<4 x 
i32> [[A:%.*]]) #[[ATTR6]]
 // CHECK-NEXT:ret i32 [[TMP0]]
 //
-int32_t test_i32x4_bitmask(v128_t a) {
+uint32_t test_i32x4_bitmask(v128_t a) {
   return wasm_i32x4_bitmask(a);
 }
 
@@ -1958,7 +1958,7 @@ bool test_i64x2_all_true(v128_t a) {
 // CHECK-NEXT:

[clang] 3378657 - [WebAssembly] Codegen for extmul SIMD instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-07-27T08:41:30-07:00
New Revision: 33786576fd3a7f79a6627a51386b173940bab0e9

URL: 
https://github.com/llvm/llvm-project/commit/33786576fd3a7f79a6627a51386b173940bab0e9
DIFF: 
https://github.com/llvm/llvm-project/commit/33786576fd3a7f79a6627a51386b173940bab0e9.diff

LOG: [WebAssembly] Codegen for extmul SIMD instructions

Replace the clang builtins and LLVM intrinsics for the SIMD extmul instructions
with normal codegen patterns.

Differential Revision: https://reviews.llvm.org/D106724

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
clang/test/Headers/wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-arith.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index aff14b7dbf4d8..04ec45aa3b747 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -103,21 +103,6 @@ TARGET_BUILTIN(__builtin_wasm_popcnt_i8x16, "V16ScV16Sc", 
"nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_q15mulr_sat_s_i16x8, "V8sV8sV8s", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_extmul_low_i8x16_s_i16x8, "V8sV16ScV16Sc", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extmul_high_i8x16_s_i16x8, "V8sV16ScV16Sc", 
"nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_extmul_low_i8x16_u_i16x8, "V8UsV16UcV16Uc", 
"nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_extmul_high_i8x16_u_i16x8, "V8UsV16UcV16Uc", 
"nc", "simd128")
-
-TARGET_BUILTIN(__builtin_wasm_extmul_low_i16x8_s_i32x4, "V4iV8sV8s", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extmul_high_i16x8_s_i32x4, "V4iV8sV8s", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extmul_low_i16x8_u_i32x4, "V4UiV8UsV8Us", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extmul_high_i16x8_u_i32x4, "V4UiV8UsV8Us", "nc", 
"simd128")
-
-TARGET_BUILTIN(__builtin_wasm_extmul_low_i32x4_s_i64x2, "V2LLiV4iV4i", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extmul_high_i32x4_s_i64x2, "V2LLiV4iV4i", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extmul_low_i32x4_u_i64x2, "V2ULLiV4UiV4Ui", 
"nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_extmul_high_i32x4_u_i64x2, "V2ULLiV4UiV4Ui", 
"nc", "simd128")
-
 TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i8x16_s_i16x8, "V8sV16Sc", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i8x16_u_i16x8, "V8UsV16Uc", 
"nc", "simd128")
 

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index f6a9a10c3f7fd..d9b2a5fe16bec 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17864,49 +17864,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_q15mulr_sat_signed);
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
-  case WebAssembly::BI__builtin_wasm_extmul_low_i8x16_s_i16x8:
-  case WebAssembly::BI__builtin_wasm_extmul_high_i8x16_s_i16x8:
-  case WebAssembly::BI__builtin_wasm_extmul_low_i8x16_u_i16x8:
-  case WebAssembly::BI__builtin_wasm_extmul_high_i8x16_u_i16x8:
-  case WebAssembly::BI__builtin_wasm_extmul_low_i16x8_s_i32x4:
-  case WebAssembly::BI__builtin_wasm_extmul_high_i16x8_s_i32x4:
-  case WebAssembly::BI__builtin_wasm_extmul_low_i16x8_u_i32x4:
-  case WebAssembly::BI__builtin_wasm_extmul_high_i16x8_u_i32x4:
-  case WebAssembly::BI__builtin_wasm_extmul_low_i32x4_s_i64x2:
-  case WebAssembly::BI__builtin_wasm_extmul_high_i32x4_s_i64x2:
-  case WebAssembly::BI__builtin_wasm_extmul_low_i32x4_u_i64x2:
-  case WebAssembly::BI__builtin_wasm_extmul_high_i32x4_u_i64x2: {
-Value *LHS = EmitScalarExpr(E->getArg(0));
-Value *RHS = EmitScalarExpr(E->getArg(1));
-unsigned IntNo;
-switch (BuiltinID) {
-case WebAssembly::BI__builtin_wasm_extmul_low_i8x16_s_i16x8:
-case WebAssembly::BI__builtin_wasm_extmul_low_i16x8_s_i32x4:
-case WebAssembly::BI__builtin_wasm_extmul_low_i32x4_s_i64x2:
-  IntNo = Intrinsic::wasm_extmul_low_signed;
-  break;
-case WebAssembly::BI__builtin_wasm_extmul_low_i8x16_u_i16x8:
-case WebAssembly::BI__builtin_wasm_extmul_low_i16x8_u_i32x4:
-case WebAssembly::BI__builtin_wasm_extmul_low_i32x4_u_i64x2:
-  IntNo = Intrinsic::wasm_extmul_low_unsigned;
-  break;
-case WebAssembly::BI__builtin_wasm_extmul_high_i8x16_s_i16x8:
-case WebAssembly::BI__builtin_wasm_extmul_high_i16x8_s_i32x4:
-case WebAssembly::BI__builtin_wasm_extmul_high_i32x4_s_i64x2:
-  IntNo = Intrinsic::wasm_extmul_high_signed;
-  break;
-case 

[clang] 85157c0 - [WebAssembly] Codegen for pmin and pmax

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-07-23T14:49:21-07:00
New Revision: 85157c0079031b51c0446b222894aec4aad71b53

URL: 
https://github.com/llvm/llvm-project/commit/85157c0079031b51c0446b222894aec4aad71b53
DIFF: 
https://github.com/llvm/llvm-project/commit/85157c0079031b51c0446b222894aec4aad71b53.diff

LOG: [WebAssembly] Codegen for pmin and pmax

Replace the clang builtins and LLVM intrinsics for {f32x4,f64x2}.{pmin,pmax}
with standard codegen patterns. Since wasm_simd128.h uses an integer vector as
the standard single vector type, the IR for the pmin and pmax intrinsic
functions contains bitcasts that would not be there otherwise. Add extra codegen
patterns that can still select the pmin and pmax instructions in the presence of
these bitcasts.

Differential Revision: https://reviews.llvm.org/D106612

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
clang/test/Headers/wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-arith.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 07c368a0431d..aff14b7dbf4d 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -144,12 +144,8 @@ TARGET_BUILTIN(__builtin_wasm_abs_f64x2, "V2dV2d", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_min_f32x4, "V4fV4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_max_f32x4, "V4fV4fV4f", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_pmin_f32x4, "V4fV4fV4f", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_pmax_f32x4, "V4fV4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_min_f64x2, "V2dV2dV2d", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_max_f64x2, "V2dV2dV2d", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_pmin_f64x2, "V2dV2dV2d", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_pmax_f64x2, "V2dV2dV2d", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_ceil_f32x4, "V4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_floor_f32x4, "V4fV4f", "nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index a3a0c3e88359..7bff02d2eb20 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17589,22 +17589,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(Intrinsic::maximum, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
-  case WebAssembly::BI__builtin_wasm_pmin_f32x4:
-  case WebAssembly::BI__builtin_wasm_pmin_f64x2: {
-Value *LHS = EmitScalarExpr(E->getArg(0));
-Value *RHS = EmitScalarExpr(E->getArg(1));
-Function *Callee =
-CGM.getIntrinsic(Intrinsic::wasm_pmin, ConvertType(E->getType()));
-return Builder.CreateCall(Callee, {LHS, RHS});
-  }
-  case WebAssembly::BI__builtin_wasm_pmax_f32x4:
-  case WebAssembly::BI__builtin_wasm_pmax_f64x2: {
-Value *LHS = EmitScalarExpr(E->getArg(0));
-Value *RHS = EmitScalarExpr(E->getArg(1));
-Function *Callee =
-CGM.getIntrinsic(Intrinsic::wasm_pmax, ConvertType(E->getType()));
-return Builder.CreateCall(Callee, {LHS, RHS});
-  }
   case WebAssembly::BI__builtin_wasm_ceil_f32x4:
   case WebAssembly::BI__builtin_wasm_floor_f32x4:
   case WebAssembly::BI__builtin_wasm_trunc_f32x4:

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index bd5dbd59eab6..309e39e80186 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -1150,12 +1150,14 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f32x4_max(v128_t __a,
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_pmin(v128_t __a,
 v128_t __b) {
-  return (v128_t)__builtin_wasm_pmin_f32x4((__f32x4)__a, (__f32x4)__b);
+  __i32x4 __mask = (__i32x4)((__f32x4)__b < (__f32x4)__a);
+  return (v128_t)__i32x4)__b) & __mask) | (((__i32x4)__a) & ~__mask));
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_pmax(v128_t __a,
 v128_t __b) {
-  return (v128_t)__builtin_wasm_pmax_f32x4((__f32x4)__a, (__f32x4)__b);
+  __i32x4 __mask = (__i32x4)((__f32x4)__a < (__f32x4)__b);
+  return (v128_t)__i32x4)__b) & __mask) | (((__i32x4)__a) & ~__mask));
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_abs(v128_t __a) {
@@ -1218,12 +1220,14 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f64x2_max(v128_t __a,
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_pmin(v128_t __a,
  

[clang] 481084f - [WebAssembly][NFC] Update test expectations labels after db7efcab7dd9

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-07-22T16:31:12-07:00
New Revision: 481084f669e10beb89b2e1a75bc67e7fb8125941

URL: 
https://github.com/llvm/llvm-project/commit/481084f669e10beb89b2e1a75bc67e7fb8125941
DIFF: 
https://github.com/llvm/llvm-project/commit/481084f669e10beb89b2e1a75bc67e7fb8125941.diff

LOG: [WebAssembly][NFC] Update test expectations labels after db7efcab7dd9

Commit db7efcab7dd9 changed the implementations of the wasm_*_extract_lane and
wasm_*_replace_lane intrinsics from using builtin functions to using the
standard vector extensions. This did not change the resulting IR, but it changes
how update_cc_test_checks.py labels values in the IR. This commit simply updates
those labels.

Differential Revision: https://reviews.llvm.org/D106611

Added: 


Modified: 
clang/test/Headers/wasm.c

Removed: 




diff  --git a/clang/test/Headers/wasm.c b/clang/test/Headers/wasm.c
index bcf48a7c37ff..f4e08dda8c4e 100644
--- a/clang/test/Headers/wasm.c
+++ b/clang/test/Headers/wasm.c
@@ -458,8 +458,8 @@ v128_t test_i8x16_splat(int8_t a) {
 // CHECK-LABEL: @test_i8x16_extract_lane(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
-// CHECK-NEXT:[[TMP1:%.*]] = extractelement <16 x i8> [[TMP0]], i32 15
-// CHECK-NEXT:ret i8 [[TMP1]]
+// CHECK-NEXT:[[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i32 15
+// CHECK-NEXT:ret i8 [[VECEXT_I]]
 //
 int8_t test_i8x16_extract_lane(v128_t a) {
   return wasm_i8x16_extract_lane(a, 15);
@@ -468,8 +468,8 @@ int8_t test_i8x16_extract_lane(v128_t a) {
 // CHECK-LABEL: @test_u8x16_extract_lane(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
-// CHECK-NEXT:[[TMP1:%.*]] = extractelement <16 x i8> [[TMP0]], i32 15
-// CHECK-NEXT:ret i8 [[TMP1]]
+// CHECK-NEXT:[[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i32 15
+// CHECK-NEXT:ret i8 [[VECEXT_I]]
 //
 uint8_t test_u8x16_extract_lane(v128_t a) {
   return wasm_u8x16_extract_lane(a, 15);
@@ -478,9 +478,9 @@ uint8_t test_u8x16_extract_lane(v128_t a) {
 // CHECK-LABEL: @test_i8x16_replace_lane(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
-// CHECK-NEXT:[[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 
[[B:%.*]], i32 15
-// CHECK-NEXT:[[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
-// CHECK-NEXT:ret <4 x i32> [[TMP2]]
+// CHECK-NEXT:[[VECINS_I:%.*]] = insertelement <16 x i8> [[TMP0]], i8 
[[B:%.*]], i32 15
+// CHECK-NEXT:[[TMP1:%.*]] = bitcast <16 x i8> [[VECINS_I]] to <4 x i32>
+// CHECK-NEXT:ret <4 x i32> [[TMP1]]
 //
 v128_t test_i8x16_replace_lane(v128_t a, int8_t b) {
   return wasm_i8x16_replace_lane(a, 15, b);
@@ -500,8 +500,8 @@ v128_t test_i16x8_splat(int16_t a) {
 // CHECK-LABEL: @test_i16x8_extract_lane(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
-// CHECK-NEXT:[[TMP1:%.*]] = extractelement <8 x i16> [[TMP0]], i32 7
-// CHECK-NEXT:ret i16 [[TMP1]]
+// CHECK-NEXT:[[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i32 7
+// CHECK-NEXT:ret i16 [[VECEXT_I]]
 //
 int16_t test_i16x8_extract_lane(v128_t a) {
   return wasm_i16x8_extract_lane(a, 7);
@@ -510,8 +510,8 @@ int16_t test_i16x8_extract_lane(v128_t a) {
 // CHECK-LABEL: @test_u16x8_extract_lane(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
-// CHECK-NEXT:[[TMP1:%.*]] = extractelement <8 x i16> [[TMP0]], i32 7
-// CHECK-NEXT:ret i16 [[TMP1]]
+// CHECK-NEXT:[[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i32 7
+// CHECK-NEXT:ret i16 [[VECEXT_I]]
 //
 uint16_t test_u16x8_extract_lane(v128_t a) {
   return wasm_u16x8_extract_lane(a, 7);
@@ -520,9 +520,9 @@ uint16_t test_u16x8_extract_lane(v128_t a) {
 // CHECK-LABEL: @test_i16x8_replace_lane(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
-// CHECK-NEXT:[[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 
[[B:%.*]], i32 7
-// CHECK-NEXT:[[TMP2:%.*]] = bitcast <8 x i16> [[TMP1]] to <4 x i32>
-// CHECK-NEXT:ret <4 x i32> [[TMP2]]
+// CHECK-NEXT:[[VECINS_I:%.*]] = insertelement <8 x i16> [[TMP0]], i16 
[[B:%.*]], i32 7
+// CHECK-NEXT:[[TMP1:%.*]] = bitcast <8 x i16> [[VECINS_I]] to <4 x i32>
+// CHECK-NEXT:ret <4 x i32> [[TMP1]]
 //
 v128_t test_i16x8_replace_lane(v128_t a, int16_t b) {
   return wasm_i16x8_replace_lane(a, 7, b);
@@ -540,8 +540,8 @@ v128_t test_i32x4_splat(int32_t a) {
 
 // CHECK-LABEL: @test_i32x4_extract_lane(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = extractelement <4 x i32> [[A:%.*]], i32 3
-// CHECK-NEXT:ret i32 [[TMP0]]
+// CHECK-NEXT:[[VECEXT_I:%.*]] = extractelement <4 x i32> [[A:%.*]], i32 3
+// CHECK-NEXT:ret i32 [[VECEXT_I]]
 //

[clang] 8af333c - [WebAssembly] Replace @llvm.wasm.popcnt with @llvm.ctpop.v16i8

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-07-21T16:45:54-07:00
New Revision: 8af333cf1a77f72ed3ccf14afa96a4f8f12e40c4

URL: 
https://github.com/llvm/llvm-project/commit/8af333cf1a77f72ed3ccf14afa96a4f8f12e40c4
DIFF: 
https://github.com/llvm/llvm-project/commit/8af333cf1a77f72ed3ccf14afa96a4f8f12e40c4.diff

LOG: [WebAssembly] Replace @llvm.wasm.popcnt with @llvm.ctpop.v16i8

Use the standard target-independent intrinsic to take advantage of standard
optimizations.

Differential Revision: https://reviews.llvm.org/D106506

Added: 


Modified: 
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
clang/test/Headers/wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/CodeGen/WebAssembly/simd-unsupported.ll

Removed: 




diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 7a7e9a1b3b31b..a4d0d87f2cbcb 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17815,7 +17815,8 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
   }
   case WebAssembly::BI__builtin_wasm_popcnt_i8x16: {
 Value *Vec = EmitScalarExpr(E->getArg(0));
-Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_popcnt);
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::ctpop, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {Vec});
   }
   case WebAssembly::BI__builtin_wasm_any_true_v128:

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index ea2beed5cd8ea..f25797882b487 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -506,7 +506,7 @@ i32x4 bitselect(i32x4 x, i32x4 y, i32x4 c) {
 
 i8x16 popcnt(i8x16 x) {
   return __builtin_wasm_popcnt_i8x16(x);
-  // WEBASSEMBLY: call <16 x i8> @llvm.wasm.popcnt(<16 x i8> %x)
+  // WEBASSEMBLY: call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %x)
   // WEBASSEMBLY-NEXT: ret
 }
 

diff  --git a/clang/test/Headers/wasm.c b/clang/test/Headers/wasm.c
index 7f279725192a4..bcf48a7c37ffb 100644
--- a/clang/test/Headers/wasm.c
+++ b/clang/test/Headers/wasm.c
@@ -1352,7 +1352,7 @@ int32_t test_i8x16_bitmask(v128_t a) {
 // CHECK-LABEL: @test_i8x16_popcnt(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
-// CHECK-NEXT:[[TMP1:%.*]] = tail call <16 x i8> @llvm.wasm.popcnt(<16 x 
i8> [[TMP0]]) #[[ATTR6]]
+// CHECK-NEXT:[[TMP1:%.*]] = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x 
i8> [[TMP0]]) #[[ATTR6]]
 // CHECK-NEXT:[[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
 // CHECK-NEXT:ret <4 x i32> [[TMP2]]
 //

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index bc93137af5fa0..4ce74d84a721e 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -172,11 +172,6 @@ def int_wasm_pmax :
 [LLVMMatchType<0>, LLVMMatchType<0>],
 [IntrNoMem, IntrSpeculatable]>;
 
-// TODO: Replace this intrinsic with normal ISel patterns once popcnt is merged
-// to the proposal.
-def int_wasm_popcnt :
-  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem, IntrSpeculatable]>;
-
 def int_wasm_extmul_low_signed :
   Intrinsic<[llvm_anyvector_ty],
 [LLVMSubdivide2VectorType<0>, LLVMSubdivide2VectorType<0>],

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 
b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 32f8b5df25c3e..1cff336cb3e4e 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -212,6 +212,9 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
   for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32})
 setOperationAction(Op, T, Legal);
 
+// And we have popcnt for i8x16
+setOperationAction(ISD::CTPOP, MVT::v16i8, Legal);
+
 // Expand float operations supported for scalars but not SIMD
 for (auto Op : {ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10,
 ISD::FEXP, ISD::FEXP2, ISD::FRINT})

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td 
b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index ff7c7deed233b..bf05b82237430 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -833,7 +833,7 @@ defm ABS : SIMDUnaryInt;
 defm NEG : SIMDUnaryInt;
 
 // Population count: popcnt
-defm POPCNT : SIMDUnary;
+defm POPCNT : SIMDUnary;
 
 // Any lane true: any_true
 defm ANYTRUE : SIMD_I<(outs I32:$dst), (ins V128:$vec), (outs), (ins), [],

diff  --git 

[clang] db7efca - [WebAssembly] Remove clang builtins for extract_lane and replace_lane

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-07-21T16:11:00-07:00
New Revision: db7efcab7dd9c969179a86fb27149743a0f1f491

URL: 
https://github.com/llvm/llvm-project/commit/db7efcab7dd9c969179a86fb27149743a0f1f491
DIFF: 
https://github.com/llvm/llvm-project/commit/db7efcab7dd9c969179a86fb27149743a0f1f491.diff

LOG: [WebAssembly] Remove clang builtins for extract_lane and replace_lane

These builtins were added to capture the fact that the underlying Wasm
instructions return i32s and implicitly sign or zero extend the extracted lanes
in the case of the i8x16 and i16x8 variants. But we do sufficient optimizations
during code gen that these low-level details do not need to be exposed to users.

This commit replaces the use of the builtins in wasm_simd128.h with normal
target-independent vector code. As a result, we can switch the relevant
intrinsics to use functions rather than macros and can use more user-friendly
return types rather than trying to precisely expose the underlying Wasm types.
Note, however, that the generated LLVM IR is no different after this change.

Differential Revision: https://reviews.llvm.org/D106500

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 72ba83300a5d..07c368a0431d 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -68,22 +68,6 @@ TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i64_f64, 
"LLid", "nc", "nontrappi
 // SIMD builtins
 TARGET_BUILTIN(__builtin_wasm_swizzle_i8x16, "V16ScV16ScV16Sc", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_extract_lane_s_i8x16, "iV16ScIi", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_u_i8x16, "iV16UcIUi", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_s_i16x8, "iV8sIi", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_u_i16x8, "iV8UsIUi", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_i32x4, "iV4iIi", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_i64x2, "LLiV2LLiIi", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_f32x4, "fV4fIi", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_f64x2, "dV2dIi", "nc", "simd128")
-
-TARGET_BUILTIN(__builtin_wasm_replace_lane_i8x16, "V16ScV16ScIii", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_replace_lane_i16x8, "V8sV8sIii", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_replace_lane_i32x4, "V4iV4iIii", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_replace_lane_i64x2, "V2LLiV2LLiIiLLi", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_replace_lane_f32x4, "V4fV4fIif", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_replace_lane_f64x2, "V2dV2dIid", "nc", "simd128")
-
 TARGET_BUILTIN(__builtin_wasm_add_sat_s_i8x16, "V16ScV16ScV16Sc", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_add_sat_u_i8x16, "V16UcV16UcV16Uc", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_add_sat_s_i16x8, "V8sV8sV8s", "nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index ad0fc96f2e67..7a7e9a1b3b31 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17635,63 +17635,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_swizzle);
 return Builder.CreateCall(Callee, {Src, Indices});
   }
-  case WebAssembly::BI__builtin_wasm_extract_lane_s_i8x16:
-  case WebAssembly::BI__builtin_wasm_extract_lane_u_i8x16:
-  case WebAssembly::BI__builtin_wasm_extract_lane_s_i16x8:
-  case WebAssembly::BI__builtin_wasm_extract_lane_u_i16x8:
-  case WebAssembly::BI__builtin_wasm_extract_lane_i32x4:
-  case WebAssembly::BI__builtin_wasm_extract_lane_i64x2:
-  case WebAssembly::BI__builtin_wasm_extract_lane_f32x4:
-  case WebAssembly::BI__builtin_wasm_extract_lane_f64x2: {
-llvm::APSInt LaneConst =
-*E->getArg(1)->getIntegerConstantExpr(getContext());
-Value *Vec = EmitScalarExpr(E->getArg(0));
-Value *Lane = llvm::ConstantInt::get(getLLVMContext(), LaneConst);
-Value *Extract = Builder.CreateExtractElement(Vec, Lane);
-switch (BuiltinID) {
-case WebAssembly::BI__builtin_wasm_extract_lane_s_i8x16:
-case WebAssembly::BI__builtin_wasm_extract_lane_s_i16x8:
-  return Builder.CreateSExt(Extract, ConvertType(E->getType()));
-case WebAssembly::BI__builtin_wasm_extract_lane_u_i8x16:
-case WebAssembly::BI__builtin_wasm_extract_lane_u_i16x8:
-  return Builder.CreateZExt(Extract, ConvertType(E->getType()));
-case WebAssembly::BI__builtin_wasm_extract_lane_i32x4:
-case WebAssembly::BI__builtin_wasm_extract_lane_i64x2:
-

[clang] 1a57ee1 - [WebAssembly] Codegen for v128.load{32,64}_zero

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-07-21T09:02:12-07:00
New Revision: 1a57ee1276edd90d13ca0d7e617c647bfe28377f

URL: 
https://github.com/llvm/llvm-project/commit/1a57ee1276edd90d13ca0d7e617c647bfe28377f
DIFF: 
https://github.com/llvm/llvm-project/commit/1a57ee1276edd90d13ca0d7e617c647bfe28377f.diff

LOG: [WebAssembly] Codegen for v128.load{32,64}_zero

Replace the experimental clang builtins and LLVM intrinsics for these
instructions with normal instruction selection patterns. The wasm_simd128.h
intrinsics header was already using portable code for the corresponding
intrinsics, so now it produces the correct instructions.

Differential Revision: https://reviews.llvm.org/D106400

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll
llvm/test/CodeGen/WebAssembly/simd-load-zero-offset.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 01c80bdf799a9..72ba83300a5d1 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -192,8 +192,5 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, 
"V8UsV4iV4i", "nc", "simd128
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4, "V4iV2d", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4iiC*", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLiC*", "n", "simd128")
-
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index cd86433cbf751..ad0fc96f2e672 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17967,16 +17967,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
Builder.getInt32(2), Builder.getInt32(3)});
 return Builder.CreateShuffleVector(Trunc, Splat, ConcatMask);
   }
-  case WebAssembly::BI__builtin_wasm_load32_zero: {
-Value *Ptr = EmitScalarExpr(E->getArg(0));
-Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load32_zero);
-return Builder.CreateCall(Callee, {Ptr});
-  }
-  case WebAssembly::BI__builtin_wasm_load64_zero: {
-Value *Ptr = EmitScalarExpr(E->getArg(0));
-Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load64_zero);
-return Builder.CreateCall(Callee, {Ptr});
-  }
   case WebAssembly::BI__builtin_wasm_shuffle_i8x16: {
 Value *Ops[18];
 size_t OpIdx = 0;

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index b7341b943ada5..b94652d430f4a 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -836,18 +836,6 @@ u32x4 trunc_sat_zero_u_f64x2_i32x4(f64x2 x) {
   // WEBASSEMBLY: ret <4 x i32> %1
 }
 
-i32x4 load32_zero(const int *p) {
-  return __builtin_wasm_load32_zero(p);
-  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.load32.zero(i32* %p)
-  // WEBASSEMBLY: ret
-}
-
-i64x2 load64_zero(const long long *p) {
-  return __builtin_wasm_load64_zero(p);
-  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.load64.zero(i64* %p)
-  // WEBASSEMBLY: ret
-}
-
 i8x16 swizzle_i8x16(i8x16 x, i8x16 y) {
   return __builtin_wasm_swizzle_i8x16(x, y);
   // WEBASSEMBLY: call <16 x i8> @llvm.wasm.swizzle(<16 x i8> %x, <16 x i8> %y)

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index 99e7ecea59374..bc93137af5fa0 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -172,20 +172,6 @@ def int_wasm_pmax :
 [LLVMMatchType<0>, LLVMMatchType<0>],
 [IntrNoMem, IntrSpeculatable]>;
 
-// TODO: Replace these intrinsic with normal ISel patterns once the
-// load_zero instructions are merged to the proposal.
-def int_wasm_load32_zero :
-  Intrinsic<[llvm_v4i32_ty],
-[LLVMPointerType],
-[IntrReadMem, IntrArgMemOnly],
- "", [SDNPMemOperand]>;
-
-def int_wasm_load64_zero :
-  Intrinsic<[llvm_v2i64_ty],
-[LLVMPointerType],
-[IntrReadMem, IntrArgMemOnly],
- "", [SDNPMemOperand]>;
-
 // TODO: Replace this intrinsic with normal ISel patterns once popcnt is merged
 // to the proposal.
 def int_wasm_popcnt :

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 
b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index b8831bb7070b5..32f8b5df25c3e 100644
--- 

[clang] 4a4229f - [WebAssembly] Codegen for v128.storeX_lane instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-07-14T16:15:25-07:00
New Revision: 4a4229f70f815a0a83e8e226ec1718af693faf4d

URL: 
https://github.com/llvm/llvm-project/commit/4a4229f70f815a0a83e8e226ec1718af693faf4d
DIFF: 
https://github.com/llvm/llvm-project/commit/4a4229f70f815a0a83e8e226ec1718af693faf4d.diff

LOG: [WebAssembly] Codegen for v128.storeX_lane instructions

Replace the experimental clang builtins and LLVM intrinsics for these
instructions with normal codegen patterns. Resolves PR50435.

Differential Revision: https://reviews.llvm.org/D106019

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
clang/test/Headers/wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-build-pair.ll
llvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll
llvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index d05f5cd9ba7f..01c80bdf799a 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -195,10 +195,5 @@ 
TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", "si
 TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4iiC*", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLiC*", "n", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_store8_lane, "vSc*V16ScIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_store16_lane, "vs*V8sIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_store32_lane, "vi*V4iIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_store64_lane, "vLLi*V2LLiIi", "n", "simd128")
-
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index d4b2414cde42..2819931664ba 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17776,36 +17776,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load64_zero);
 return Builder.CreateCall(Callee, {Ptr});
   }
-  case WebAssembly::BI__builtin_wasm_store8_lane:
-  case WebAssembly::BI__builtin_wasm_store16_lane:
-  case WebAssembly::BI__builtin_wasm_store32_lane:
-  case WebAssembly::BI__builtin_wasm_store64_lane: {
-Value *Ptr = EmitScalarExpr(E->getArg(0));
-Value *Vec = EmitScalarExpr(E->getArg(1));
-Optional LaneIdxConst =
-E->getArg(2)->getIntegerConstantExpr(getContext());
-assert(LaneIdxConst && "Constant arg isn't actually constant?");
-Value *LaneIdx = llvm::ConstantInt::get(getLLVMContext(), *LaneIdxConst);
-unsigned IntNo;
-switch (BuiltinID) {
-case WebAssembly::BI__builtin_wasm_store8_lane:
-  IntNo = Intrinsic::wasm_store8_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_store16_lane:
-  IntNo = Intrinsic::wasm_store16_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_store32_lane:
-  IntNo = Intrinsic::wasm_store32_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_store64_lane:
-  IntNo = Intrinsic::wasm_store64_lane;
-  break;
-default:
-  llvm_unreachable("unexpected builtin ID");
-}
-Function *Callee = CGM.getIntrinsic(IntNo);
-return Builder.CreateCall(Callee, {Ptr, Vec, LaneIdx});
-  }
   case WebAssembly::BI__builtin_wasm_shuffle_i8x16: {
 Value *Ops[18];
 size_t OpIdx = 0;

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index d52cbc0d6a12..fdb32bd1d059 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -223,18 +223,48 @@ static __inline__ void __DEFAULT_FN_ATTRS 
wasm_v128_store(void *__mem,
   ((struct __wasm_v128_store_struct *)__mem)->__v = __a;
 }
 
-#define wasm_v128_store8_lane(__ptr, __vec, __i)   
\
-  (__builtin_wasm_store8_lane((signed char *)(__ptr), (__i8x16)(__vec), (__i)))
+static __inline__ void __DEFAULT_FN_ATTRS wasm_v128_store8_lane(void *__mem,
+v128_t __vec,
+int __i)
+__REQUIRE_CONSTANT(__i) {
+  struct __wasm_v128_store8_lane_struct {
+int8_t __v;
+  } __attribute__((__packed__, __may_alias__));
+  ((struct __wasm_v128_store8_lane_struct *)__mem)->__v = 
((__i8x16)__vec)[__i];
+}
 
-#define wasm_v128_store16_lane(__ptr, __vec, __i)  
\
-  (__builtin_wasm_store16_lane((short *)(__ptr), (__i16x8)(__vec), (__i)))
+static __inline__ void __DEFAULT_FN_ATTRS 

[clang] 970e090 - [WebAssembly] Codegen for v128.loadX_lane instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-07-14T11:31:53-07:00
New Revision: 970e0900104d6f67a9c15fa9c913cf3eeba5d06a

URL: 
https://github.com/llvm/llvm-project/commit/970e0900104d6f67a9c15fa9c913cf3eeba5d06a
DIFF: 
https://github.com/llvm/llvm-project/commit/970e0900104d6f67a9c15fa9c913cf3eeba5d06a.diff

LOG: [WebAssembly] Codegen for v128.loadX_lane instructions

Replace the experimental clang builtin and LLVM intrinsics for these
instructions with normal codegen patterns. Resolves PR50433.

Differential Revision: https://reviews.llvm.org/D105950

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
clang/test/Headers/wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
llvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll
llvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 58d10ea1012e1..d05f5cd9ba7f9 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -195,10 +195,6 @@ 
TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", "si
 TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4iiC*", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLiC*", "n", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_load8_lane, "V16ScScC*V16ScIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load16_lane, "V8ssC*V8sIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load32_lane, "V4iiC*V4iIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load64_lane, "V2LLiLLiC*V2LLiIi", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_store8_lane, "vSc*V16ScIi", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_store16_lane, "vs*V8sIi", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_store32_lane, "vi*V4iIi", "n", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index baa1436954183..d4b2414cde425 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17776,10 +17776,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load64_zero);
 return Builder.CreateCall(Callee, {Ptr});
   }
-  case WebAssembly::BI__builtin_wasm_load8_lane:
-  case WebAssembly::BI__builtin_wasm_load16_lane:
-  case WebAssembly::BI__builtin_wasm_load32_lane:
-  case WebAssembly::BI__builtin_wasm_load64_lane:
   case WebAssembly::BI__builtin_wasm_store8_lane:
   case WebAssembly::BI__builtin_wasm_store16_lane:
   case WebAssembly::BI__builtin_wasm_store32_lane:
@@ -17792,18 +17788,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Value *LaneIdx = llvm::ConstantInt::get(getLLVMContext(), *LaneIdxConst);
 unsigned IntNo;
 switch (BuiltinID) {
-case WebAssembly::BI__builtin_wasm_load8_lane:
-  IntNo = Intrinsic::wasm_load8_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_load16_lane:
-  IntNo = Intrinsic::wasm_load16_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_load32_lane:
-  IntNo = Intrinsic::wasm_load32_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_load64_lane:
-  IntNo = Intrinsic::wasm_load64_lane;
-  break;
 case WebAssembly::BI__builtin_wasm_store8_lane:
   IntNo = Intrinsic::wasm_store8_lane;
   break;

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index dc54bb91e135b..d52cbc0d6a12f 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -170,21 +170,49 @@ wasm_v128_load64_zero(const void *__mem) {
   return (v128_t)(__i64x2){__v, 0};
 }
 
-#define wasm_v128_load8_lane(__ptr, __vec, __i)
\
-  ((v128_t)__builtin_wasm_load8_lane((const signed char *)(__ptr), 
\
- (__i8x16)(__vec), (__i)))
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_load8_lane(
+const void *__mem, v128_t __vec, int __i) __REQUIRE_CONSTANT(__i) {
+  struct __wasm_v128_load8_lane_struct {
+int8_t __v;
+  } __attribute__((__packed__, __may_alias__));
+  int8_t __v = ((const struct __wasm_v128_load8_lane_struct *)__mem)->__v;
+  __i8x16 __ret = (__i8x16)__vec;
+  __ret[__i] = __v;
+  return (v128_t)__ret;
+}
 
-#define wasm_v128_load16_lane(__ptr, __vec, __i)   
\
-  ((v128_t)__builtin_wasm_load16_lane((const short *)(__ptr),  
\
-  (__i16x8)(__vec), (__i)))

[clang] cbabfc6 - [WebAssembly] Custom combines for f32x4.demote_zero_f64x2

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-07-12T10:32:18-07:00
New Revision: cbabfc63b1be274316552d3eaaf7b2ad88c4c073

URL: 
https://github.com/llvm/llvm-project/commit/cbabfc63b1be274316552d3eaaf7b2ad88c4c073
DIFF: 
https://github.com/llvm/llvm-project/commit/cbabfc63b1be274316552d3eaaf7b2ad88c4c073.diff

LOG: [WebAssembly] Custom combines for f32x4.demote_zero_f64x2

Replace the clang builtin function and LLVM intrinsic for
f32x4.demote_zero_f64x2 with combines from normal SDNodes. Also add missing
combines for i32x4.trunc_sat_zero_f64x2_{s,u}, which share the same pattern.

Differential Revision: https://reviews.llvm.org/D105755

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
clang/test/Headers/wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISD.def
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-conversions.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index cdaaa5d81f6df..58d10ea1012e1 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -191,7 +191,6 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, 
"V8UsV4iV4i", "nc", "simd128
 
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4, "V4iV2d", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_demote_zero_f64x2_f32x4, "V4fV2d", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4iiC*", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLiC*", "n", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 41ea2bf5f43a2..355ed8ffbfea1 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17723,11 +17723,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
Builder.getInt32(2), Builder.getInt32(3)});
 return Builder.CreateShuffleVector(Trunc, Splat, ConcatMask);
   }
-  case WebAssembly::BI__builtin_wasm_demote_zero_f64x2_f32x4: {
-Value *Vec = EmitScalarExpr(E->getArg(0));
-Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_demote_zero);
-return Builder.CreateCall(Callee, Vec);
-  }
   case WebAssembly::BI__builtin_wasm_load32_zero: {
 Value *Ptr = EmitScalarExpr(E->getArg(0));
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load32_zero);

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 4869f7de6c7f3..dc54bb91e135b 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -1151,7 +1151,9 @@ wasm_u32x4_trunc_sat_f64x2_zero(v128_t __a) {
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS
 wasm_f32x4_demote_f64x2_zero(v128_t __a) {
-  return (v128_t)__builtin_wasm_demote_zero_f64x2_f32x4((__f64x2)__a);
+  return (v128_t) __builtin_convertvector(
+  __builtin_shufflevector((__f64x2)__a, (__f64x2){0, 0}, 0, 1, 2, 3),
+  __f32x4);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 61130922241cd..8999d391fdeba 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -892,12 +892,6 @@ u32x4 trunc_sat_zero_u_f64x2_i32x4(f64x2 x) {
   // WEBASSEMBLY: ret <4 x i32> %1
 }
 
-f32x4 wasm_demote_zero_f64x2_f32x4(f64x2 x) {
-  return __builtin_wasm_demote_zero_f64x2_f32x4(x);
-  // WEBASSEMBLY: call <4 x float> @llvm.wasm.demote.zero(<2 x double> %x)
-  // WEBASSEMBLY: ret
-}
-
 i32x4 load32_zero(const int *p) {
   return __builtin_wasm_load32_zero(p);
   // WEBASSEMBLY: call <4 x i32> @llvm.wasm.load32.zero(i32* %p)

diff  --git a/clang/test/Headers/wasm.c b/clang/test/Headers/wasm.c
index 1cf87b4bb786a..cc2f2b65ca126 100644
--- a/clang/test/Headers/wasm.c
+++ b/clang/test/Headers/wasm.c
@@ -2465,9 +2465,10 @@ v128_t test_u32x4_trunc_sat_f64x2_zero(v128_t a) {
 // CHECK-LABEL: @test_f32x4_demote_f64x2_zero(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
-// CHECK-NEXT:[[TMP1:%.*]] = tail call <4 x float> 
@llvm.wasm.demote.zero(<2 x double> [[TMP0]]) #[[ATTR10]]
-// CHECK-NEXT:[[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32>
-// CHECK-NEXT:ret <4 x i32> [[TMP2]]
+// CHECK-NEXT:[[SHUFFLE_I:%.*]] = shufflevector <2 x double> [[TMP0]], <2 
x double> zeroinitializer, <4 x i32> 
+// CHECK-NEXT:[[CONV_I:%.*]] = fptrunc <4 

[clang] e522010 - [WebAssembly] Custom combines for f64x2.promote_low_f32x4

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-07-09T18:59:29-07:00
New Revision: e5220104d0708e02f2faaacc091189fb3e47e30c

URL: 
https://github.com/llvm/llvm-project/commit/e5220104d0708e02f2faaacc091189fb3e47e30c
DIFF: 
https://github.com/llvm/llvm-project/commit/e5220104d0708e02f2faaacc091189fb3e47e30c.diff

LOG: [WebAssembly] Custom combines for f64x2.promote_low_f32x4

Replace the clang builtin function and LLVM intrinsic previously used to select
the f64x2.promote_low_f32x4 instruction with custom combines from standard
SelectionDAG nodes. Implement the new combines to share code with the similar
combines for f64x2.convert_low_i32x4_{s,u}. Resolves PR50232.

Differential Revision: https://reviews.llvm.org/D105675

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
clang/test/Headers/wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISD.def
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-conversions.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index c11490771973..cdaaa5d81f6d 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -192,7 +192,6 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, 
"V8UsV4iV4i", "nc", "simd128
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4, "V4iV2d", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_demote_zero_f64x2_f32x4, "V4fV2d", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_promote_low_f32x4_f64x2, "V2dV4f", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4iiC*", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLiC*", "n", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 2c24b71d030a..41ea2bf5f43a 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17728,11 +17728,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_demote_zero);
 return Builder.CreateCall(Callee, Vec);
   }
-  case WebAssembly::BI__builtin_wasm_promote_low_f32x4_f64x2: {
-Value *Vec = EmitScalarExpr(E->getArg(0));
-Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_promote_low);
-return Builder.CreateCall(Callee, Vec);
-  }
   case WebAssembly::BI__builtin_wasm_load32_zero: {
 Value *Ptr = EmitScalarExpr(E->getArg(0));
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load32_zero);

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index fe087d2442a1..4869f7de6c7f 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -43,6 +43,7 @@ typedef unsigned short __u16x4
 typedef int __i32x2 __attribute__((__vector_size__(8), __aligned__(8)));
 typedef unsigned int __u32x2
 __attribute__((__vector_size__(8), __aligned__(8)));
+typedef float __f32x2 __attribute__((__vector_size__(8), __aligned__(8)));
 
 #define __DEFAULT_FN_ATTRS 
\
   __attribute__((__always_inline__, __nodebug__, __target__("simd128"),
\
@@ -1155,7 +1156,8 @@ wasm_f32x4_demote_f64x2_zero(v128_t __a) {
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS
 wasm_f64x2_promote_low_f32x4(v128_t __a) {
-  return (v128_t)__builtin_wasm_promote_low_f32x4_f64x2((__f32x4)__a);
+  return (v128_t) __builtin_convertvector(
+  (__f32x2){((__f32x4)__a)[0], ((__f32x4)__a)[1]}, __f64x2);
 }
 
 #define wasm_i8x16_shuffle(__a, __b, __c0, __c1, __c2, __c3, __c4, __c5, __c6, 
\

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 151bddc4ee03..61130922241c 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -898,12 +898,6 @@ f32x4 wasm_demote_zero_f64x2_f32x4(f64x2 x) {
   // WEBASSEMBLY: ret
 }
 
-f64x2 wasm_promote_low_f32x4_f64x2(f32x4 x) {
-  return __builtin_wasm_promote_low_f32x4_f64x2(x);
-  // WEBASSEMBLY: call <2 x double> @llvm.wasm.promote.low(<4 x float> %x)
-  // WEBASSEMBLY: ret
-}
-
 i32x4 load32_zero(const int *p) {
   return __builtin_wasm_load32_zero(p);
   // WEBASSEMBLY: call <4 x i32> @llvm.wasm.load32.zero(i32* %p)

diff  --git a/clang/test/Headers/wasm.c b/clang/test/Headers/wasm.c
index 86c7f8a2a8ea..1cf87b4bb786 100644
--- a/clang/test/Headers/wasm.c
+++ b/clang/test/Headers/wasm.c
@@ -1281,7 +1281,7 @@ v128_t 

[clang] 1e9c39a - [WebAssembly] Use functions instead of macros for const SIMD intrinsics

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-05-07T11:50:19-07:00
New Revision: 1e9c39a3f982fe2f50cd19c74be8b64dfba4baad

URL: 
https://github.com/llvm/llvm-project/commit/1e9c39a3f982fe2f50cd19c74be8b64dfba4baad
DIFF: 
https://github.com/llvm/llvm-project/commit/1e9c39a3f982fe2f50cd19c74be8b64dfba4baad.diff

LOG: [WebAssembly] Use functions instead of macros for const SIMD intrinsics

To improve hygiene, consistency, and usability, it would be good to replace all
the macro intrinsics in wasm_simd128.h with functions. The reason for using
macros in the first place was to enforce the use of constants for some arguments
using `_Static_assert` with `__builtin_constant_p`. This commit switches to
using functions and uses the `__diagnose_if__` attribute rather than
`_Static_assert` to enforce constantness.

The remaining macro intrinsics cannot be made into functions until the builtin
functions they are implemented with can be replaced with normal code patterns
because the builtin functions themselves require that their arguments are
constants.

This commit also fixes a bug with the const_splat intrinsics in which the f32x4
and f64x2 variants were incorrectly producing integer vectors.

Differential Revision: https://reviews.llvm.org/D102018

Added: 


Modified: 
clang/lib/Headers/wasm_simd128.h
clang/test/Headers/wasm.c

Removed: 




diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index cd11f096dd956..fe087d2442a16 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -48,8 +48,9 @@ typedef unsigned int __u32x2
   __attribute__((__always_inline__, __nodebug__, __target__("simd128"),
\
  __min_vector_width__(128)))
 
-#define __REQUIRE_CONSTANT(e)  
\
-  _Static_assert(__builtin_constant_p(e), "Expected constant")
+#define __REQUIRE_CONSTANT(c)  
\
+  __attribute__((__diagnose_if__(!__builtin_constant_p(c), 
\
+ #c " must be constant", "error")))
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_load(const void *__mem) {
   // UB-free unaligned access copied from xmmintrin.h
@@ -246,88 +247,90 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f64x2_make(double __c0,
   return (v128_t)(__f64x2){__c0, __c1};
 }
 
-#define wasm_i8x16_const(__c0, __c1, __c2, __c3, __c4, __c5, __c6, __c7, __c8, 
\
- __c9, __c10, __c11, __c12, __c13, __c14, __c15)   
\
-  __extension__({  
\
-__REQUIRE_CONSTANT(__c0);  
\
-__REQUIRE_CONSTANT(__c1);  
\
-__REQUIRE_CONSTANT(__c2);  
\
-__REQUIRE_CONSTANT(__c3);  
\
-__REQUIRE_CONSTANT(__c4);  
\
-__REQUIRE_CONSTANT(__c5);  
\
-__REQUIRE_CONSTANT(__c6);  
\
-__REQUIRE_CONSTANT(__c7);  
\
-__REQUIRE_CONSTANT(__c8);  
\
-__REQUIRE_CONSTANT(__c9);  
\
-__REQUIRE_CONSTANT(__c10); 
\
-__REQUIRE_CONSTANT(__c11); 
\
-__REQUIRE_CONSTANT(__c12); 
\
-__REQUIRE_CONSTANT(__c13); 
\
-__REQUIRE_CONSTANT(__c14); 
\
-__REQUIRE_CONSTANT(__c15); 
\
-(v128_t)(__i8x16){__c0, __c1, __c2,  __c3,  __c4,  __c5,  __c6,  __c7, 
\
-  __c8, __c9, __c10, __c11, __c12, __c13, __c14, __c15};   
\
-  })
-
-#define wasm_i16x8_const(__c0, __c1, __c2, __c3, __c4, __c5, __c6, __c7)   
\
-  __extension__({  
\
-__REQUIRE_CONSTANT(__c0);  
\
-__REQUIRE_CONSTANT(__c1);  
\
-__REQUIRE_CONSTANT(__c2);  
\
-__REQUIRE_CONSTANT(__c3);  
\
-__REQUIRE_CONSTANT(__c4);  
\
-__REQUIRE_CONSTANT(__c5);  
\
-__REQUIRE_CONSTANT(__c6);  
\
-

[clang] b198b9b - [WebAssembly] Fix argument types in SIMD narrowing intrinsics

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-05-06T10:07:45-07:00
New Revision: b198b9b8974b19c9e8493f8d70c85ac54182597a

URL: 
https://github.com/llvm/llvm-project/commit/b198b9b8974b19c9e8493f8d70c85ac54182597a
DIFF: 
https://github.com/llvm/llvm-project/commit/b198b9b8974b19c9e8493f8d70c85ac54182597a.diff

LOG: [WebAssembly] Fix argument types in SIMD narrowing intrinsics

The builtins were updated to take signed parameters in 627a52695537, but the
intrinsics that use those builtins were not updated as well. The intrinsic test
did not catch this sign mismatch because it is only reported as an error under
-fno-lax-vector-conversions.

This commit fixes the type mismatch and adds -fno-lax-vector-conversions to the
test to catch similar problems in the future.

Differential Revision: https://reviews.llvm.org/D101979

Added: 


Modified: 
clang/lib/Headers/wasm_simd128.h
clang/test/Headers/wasm.c

Removed: 




diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index e6fb0496e514..cd11f096dd95 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -1197,8 +1197,8 @@ wasm_i8x16_narrow_i16x8(v128_t __a, v128_t __b) {
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS
 wasm_u8x16_narrow_i16x8(v128_t __a, v128_t __b) {
-  return (v128_t)__builtin_wasm_narrow_u_i8x16_i16x8((__u16x8)__a,
- (__u16x8)__b);
+  return (v128_t)__builtin_wasm_narrow_u_i8x16_i16x8((__i16x8)__a,
+ (__i16x8)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS
@@ -1209,8 +1209,8 @@ wasm_i16x8_narrow_i32x4(v128_t __a, v128_t __b) {
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS
 wasm_u16x8_narrow_i32x4(v128_t __a, v128_t __b) {
-  return (v128_t)__builtin_wasm_narrow_u_i16x8_i32x4((__u32x4)__a,
- (__u32x4)__b);
+  return (v128_t)__builtin_wasm_narrow_u_i16x8_i32x4((__i32x4)__a,
+ (__i32x4)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS

diff  --git a/clang/test/Headers/wasm.c b/clang/test/Headers/wasm.c
index f5076ae3af30..409da99d43a7 100644
--- a/clang/test/Headers/wasm.c
+++ b/clang/test/Headers/wasm.c
@@ -1,7 +1,7 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --force-update
 // REQUIRES: webassembly-registered-target, asserts
 
-// RUN: %clang %s -O2 -emit-llvm -S -o - -target wasm32-unknown-unknown 
-msimd128 -Wcast-qual -Werror | FileCheck %s
+// RUN: %clang %s -O2 -emit-llvm -S -o - -target wasm32-unknown-unknown 
-msimd128 -Wcast-qual -fno-lax-vector-conversions -Werror | FileCheck %s
 
 #include 
 



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[clang] 81fce29 - [WebAssembly] Add SIMD const_splat intrinsics

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-05-05T13:46:45-07:00
New Revision: 81fce29d6e1f0a83e8a4170c7f24cdd93869d55a

URL: 
https://github.com/llvm/llvm-project/commit/81fce29d6e1f0a83e8a4170c7f24cdd93869d55a
DIFF: 
https://github.com/llvm/llvm-project/commit/81fce29d6e1f0a83e8a4170c7f24cdd93869d55a.diff

LOG: [WebAssembly] Add SIMD const_splat intrinsics

These intrinsics do not correspond to their own underlying instruction, but are
a convenience for the common case of materializing a constant vector that has
the same value in each lane.

Differential Revision: https://reviews.llvm.org/D101885

Added: 


Modified: 
clang/lib/Headers/wasm_simd128.h
clang/test/Headers/wasm.c

Removed: 




diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 21571253e7b96..e6fb0496e5140 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -229,6 +229,11 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_i32x4_make(int32_t __c0,
   return (v128_t)(__i32x4){__c0, __c1, __c2, __c3};
 }
 
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_make(int64_t __c0,
+int64_t __c1) {
+  return (v128_t)(__i64x2){__c0, __c1};
+}
+
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_make(float __c0,
 float __c1,
 float __c2,
@@ -236,11 +241,6 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f32x4_make(float __c0,
   return (v128_t)(__f32x4){__c0, __c1, __c2, __c3};
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_make(int64_t __c0,
-int64_t __c1) {
-  return (v128_t)(__i64x2){__c0, __c1};
-}
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_make(double __c0,
 double __c1) {
   return (v128_t)(__f64x2){__c0, __c1};
@@ -291,20 +291,20 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f64x2_make(double __c0,
 (v128_t)(__i32x4){__c0, __c1, __c2, __c3}; 
\
   })
 
-#define wasm_f32x4_const(__c0, __c1, __c2, __c3)   
\
+#define wasm_i64x2_const(__c0, __c1)   
\
   __extension__({  
\
 __REQUIRE_CONSTANT(__c0);  
\
 __REQUIRE_CONSTANT(__c1);  
\
-__REQUIRE_CONSTANT(__c2);  
\
-__REQUIRE_CONSTANT(__c3);  
\
-(v128_t)(__f32x4){__c0, __c1, __c2, __c3}; 
\
+(v128_t)(__i64x2){__c0, __c1}; 
\
   })
 
-#define wasm_i64x2_const(__c0, __c1)   
\
+#define wasm_f32x4_const(__c0, __c1, __c2, __c3)   
\
   __extension__({  
\
 __REQUIRE_CONSTANT(__c0);  
\
 __REQUIRE_CONSTANT(__c1);  
\
-(v128_t)(__i64x2){__c0, __c1}; 
\
+__REQUIRE_CONSTANT(__c2);  
\
+__REQUIRE_CONSTANT(__c3);  
\
+(v128_t)(__f32x4){__c0, __c1, __c2, __c3}; 
\
   })
 
 #define wasm_f64x2_const(__c0, __c1)   
\
@@ -314,6 +314,21 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f64x2_make(double __c0,
 (v128_t)(__f64x2){__c0, __c1}; 
\
   })
 
+#define wasm_i8x16_const_splat(__c)
\
+  wasm_i8x16_const(__c, __c, __c, __c, __c, __c, __c, __c, __c, __c, __c, __c, 
\
+   __c, __c, __c, __c)
+
+#define wasm_i16x8_const_splat(__c)
\
+  wasm_i16x8_const(__c, __c, __c, __c, __c, __c, __c, __c)
+
+#define wasm_i32x4_const_splat(__c) wasm_i32x4_const(__c, __c, __c, __c)
+
+#define wasm_i64x2_const_splat(__c) wasm_i64x2_const(__c, __c)
+
+#define wasm_f32x4_const_splat(__c) wasm_i32x4_const(__c, __c, __c, __c)
+
+#define wasm_f64x2_const_splat(__c) wasm_i64x2_const(__c, __c)
+
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_splat(int8_t __a) {
   return (v128_t)(__i8x16){__a, __a, __a, __a, __a, __a, __a, __a,
__a, __a, __a, __a, __a, __a, __a, __a};

diff  --git a/clang/test/Headers/wasm.c b/clang/test/Headers/wasm.c
index 

[clang] 602f318 - [WebAssembly] Fix constness of pointer params to load intrinsics

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-05-05T13:16:56-07:00
New Revision: 602f318cfdac999a8604f1588159326b1a1a1a23

URL: 
https://github.com/llvm/llvm-project/commit/602f318cfdac999a8604f1588159326b1a1a1a23
DIFF: 
https://github.com/llvm/llvm-project/commit/602f318cfdac999a8604f1588159326b1a1a1a23.diff

LOG: [WebAssembly] Fix constness of pointer params to load intrinsics

Update the SIMD builtin load functions to take pointers to const data and update
the intrinsics themselves to not cast away constness.

Differential Revision: https://reviews.llvm.org/D101884

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
clang/test/Headers/wasm.c

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index e3e223f05db08..c114907719737 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -194,13 +194,13 @@ 
TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", "si
 TARGET_BUILTIN(__builtin_wasm_demote_zero_f64x2_f32x4, "V4fV2d", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_promote_low_f32x4_f64x2, "V2dV4f", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4iiC*", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLiC*", "n", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_load8_lane, "V16ScSc*V16ScIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load16_lane, "V8ss*V8sIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load32_lane, "V4ii*V4iIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load64_lane, "V2LLiLLi*V2LLiIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load8_lane, "V16ScScC*V16ScIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load16_lane, "V8ssC*V8sIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load32_lane, "V4iiC*V4iIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load64_lane, "V2LLiLLiC*V2LLiIi", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_store8_lane, "vSc*V16ScIi", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_store16_lane, "vs*V8sIi", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_store32_lane, "vi*V4iIi", "n", "simd128")

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 2ed07bac420c3..21571253e7b96 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -169,18 +169,19 @@ wasm_v128_load64_zero(const void *__mem) {
 }
 
 #define wasm_v128_load8_lane(__ptr, __vec, __i)
\
-  ((v128_t)__builtin_wasm_load8_lane((signed char *)(__ptr), (__i8x16)(__vec), 
\
- (__i)))
+  ((v128_t)__builtin_wasm_load8_lane((const signed char *)(__ptr), 
\
+ (__i8x16)(__vec), (__i)))
 
 #define wasm_v128_load16_lane(__ptr, __vec, __i)   
\
-  ((v128_t)__builtin_wasm_load16_lane((short *)(__ptr), (__i16x8)(__vec),  
\
-  (__i)))
+  ((v128_t)__builtin_wasm_load16_lane((const short *)(__ptr),  
\
+  (__i16x8)(__vec), (__i)))
 
 #define wasm_v128_load32_lane(__ptr, __vec, __i)   
\
-  ((v128_t)__builtin_wasm_load32_lane((int *)(__ptr), (__i32x4)(__vec), (__i)))
+  ((v128_t)__builtin_wasm_load32_lane((const int *)(__ptr), (__i32x4)(__vec),  
\
+  (__i)))
 
 #define wasm_v128_load64_lane(__ptr, __vec, __i)   
\
-  ((v128_t)__builtin_wasm_load64_lane((long long int *)(__ptr),
\
+  ((v128_t)__builtin_wasm_load64_lane((const long long int *)(__ptr),  
\
   (__i64x2)(__vec), (__i)))
 
 static __inline__ void __DEFAULT_FN_ATTRS wasm_v128_store(void *__mem,

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 6d774b198af05..151bddc4ee039 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -284,28 +284,28 @@ f64x2 replace_lane_f64x2(f64x2 v, double x) {
   // WEBASSEMBLY-NEXT: ret
 }
 
-i8x16 load8_lane(signed char *p, i8x16 v) {
+i8x16 load8_lane(const signed char *p, i8x16 v) {
   return __builtin_wasm_load8_lane(p, v, 0);
   // WEBASSEMBLY: tail call <16 x i8> @llvm.wasm.load8.lane(
   // WEBASSEMBLY-SAME: i8* %p, <16 x i8> %v, i32 0)
   // WEBASSEMBLY-NEXT: ret
 }
 
-i16x8 load16_lane(short *p, i16x8 v) {
+i16x8 load16_lane(const short *p, i16x8 v) {
   return __builtin_wasm_load16_lane(p, v, 0);
   // WEBASSEMBLY: tail call <8 x i16> @llvm.wasm.load16.lane(

[clang] 627a526 - [WebAssembly] Update narrowing builtin function operand types

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-05-05T13:04:04-07:00
New Revision: 627a52695537dd2bea068630887431febbf06856

URL: 
https://github.com/llvm/llvm-project/commit/627a52695537dd2bea068630887431febbf06856
DIFF: 
https://github.com/llvm/llvm-project/commit/627a52695537dd2bea068630887431febbf06856.diff

LOG: [WebAssembly] Update narrowing builtin function operand types

Make the inputs to all narrowing builtins signed, which is how they are
interpreted by the underlying instructions (only the result changes sign
between instructions).

Differential Revision: https://reviews.llvm.org/D101883

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/test/CodeGen/builtins-wasm.c

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 1a89b006e75bd..e3e223f05db08 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -185,9 +185,9 @@ TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i32x4_f32x4, 
"V4iV4f", "nc", "sim
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i32x4_f32x4, "V4iV4f", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i8x16_i16x8, "V16ScV8sV8s", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, "V16UcV8UsV8Us", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, "V16UcV8sV8s", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4UiV4Ui", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4iV4i", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4, "V4iV2d", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", 
"simd128")

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index a7268faa613e6..6d774b198af05 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -857,7 +857,7 @@ i8x16 narrow_s_i8x16_i16x8(i16x8 low, i16x8 high) {
   // WEBASSEMBLY: ret
 }
 
-u8x16 narrow_u_i8x16_i16x8(u16x8 low, u16x8 high) {
+u8x16 narrow_u_i8x16_i16x8(i16x8 low, i16x8 high) {
   return __builtin_wasm_narrow_u_i8x16_i16x8(low, high);
   // WEBASSEMBLY: call <16 x i8> @llvm.wasm.narrow.unsigned.v16i8.v8i16(
   // WEBASSEMBLY-SAME: <8 x i16> %low, <8 x i16> %high)
@@ -871,7 +871,7 @@ i16x8 narrow_s_i16x8_i32x4(i32x4 low, i32x4 high) {
   // WEBASSEMBLY: ret
 }
 
-u16x8 narrow_u_i16x8_i32x4(u32x4 low, u32x4 high) {
+u16x8 narrow_u_i16x8_i32x4(i32x4 low, i32x4 high) {
   return __builtin_wasm_narrow_u_i16x8_i32x4(low, high);
   // WEBASSEMBLY: call <8 x i16> @llvm.wasm.narrow.unsigned.v8i16.v4i32(
   // WEBASSEMBLY-SAME: <4 x i32> %low, <4 x i32> %high)



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[clang] 502f540 - [WebAssembly] Finalize wasm_simd128.h intrinsics

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-04-23T13:37:27-07:00
New Revision: 502f54049d17f5a107f833596fb2c31297a99773

URL: 
https://github.com/llvm/llvm-project/commit/502f54049d17f5a107f833596fb2c31297a99773
DIFF: 
https://github.com/llvm/llvm-project/commit/502f54049d17f5a107f833596fb2c31297a99773.diff

LOG: [WebAssembly] Finalize wasm_simd128.h intrinsics

Adds new intrinsics for instructions that are in the final SIMD spec but did not
previously have intrinsics. Also updates the names of existing intrinsics to
reflect the final names of the underlying instructions in the spec. Keeps the
old names as deprecated functions to ease the transition to the new names.

Differential Revision: https://reviews.llvm.org/D101112

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
clang/test/Headers/wasm.c

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index bc0c37a11207f..1a89b006e75bd 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -66,7 +66,7 @@ TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i64_f64, 
"LLid", "nc", "nontrappi
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i64_f64, "LLid", "nc", 
"nontrapping-fptoint")
 
 // SIMD builtins
-TARGET_BUILTIN(__builtin_wasm_swizzle_v8x16, "V16ScV16ScV16Sc", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_swizzle_i8x16, "V16ScV16ScV16Sc", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_extract_lane_s_i8x16, "iV16ScIi", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_extract_lane_u_i8x16, "iV16UcIUi", "nc", 
"simd128")
@@ -97,6 +97,7 @@ TARGET_BUILTIN(__builtin_wasm_sub_sat_u_i16x8, 
"V8UsV8UsV8Us", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_abs_i8x16, "V16ScV16Sc", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_abs_i16x8, "V8sV8s", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_abs_i32x4, "V4iV4i", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_abs_i64x2, "V2LLiV2LLi", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_min_s_i8x16, "V16ScV16ScV16Sc", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_min_u_i8x16, "V16UcV16UcV16Uc", "nc", "simd128")
@@ -141,12 +142,9 @@ 
TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i16x8_u_i32x4, "V4UiV8Us", "nc", "
 
 TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_shuffle_v8x16, 
"V16ScV16ScV16ScIiIiIiIiIiIiIiIiIiIiIiIiIiIiIiIi", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_shuffle_i8x16, 
"V16ScV16ScV16ScIiIiIiIiIiIiIiIiIiIiIiIiIiIiIiIi", "nc", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_any_true_i8x16, "iV16Sc", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_any_true_i16x8, "iV8s", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_any_true_i32x4, "iV4i", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_any_true_i64x2, "iV2LLi", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_any_true_v128, "iV16Sc", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_all_true_i8x16, "iV16Sc", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_all_true_i16x8, "iV8s", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_all_true_i32x4, "iV4i", "nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 431929d49da82..9a01691adcf1a 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17157,7 +17157,7 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, Value);
   }
-  case WebAssembly::BI__builtin_wasm_swizzle_v8x16: {
+  case WebAssembly::BI__builtin_wasm_swizzle_i8x16: {
 Value *Src = EmitScalarExpr(E->getArg(0));
 Value *Indices = EmitScalarExpr(E->getArg(1));
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_swizzle);
@@ -17256,7 +17256,8 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
   }
   case WebAssembly::BI__builtin_wasm_abs_i8x16:
   case WebAssembly::BI__builtin_wasm_abs_i16x8:
-  case WebAssembly::BI__builtin_wasm_abs_i32x4: {
+  case WebAssembly::BI__builtin_wasm_abs_i32x4:
+  case WebAssembly::BI__builtin_wasm_abs_i64x2: {
 Value *Vec = EmitScalarExpr(E->getArg(0));
 Value *Neg = Builder.CreateNeg(Vec, "neg");
 Constant *Zero = llvm::Constant::getNullValue(Vec->getType());
@@ -17402,20 +17403,14 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_popcnt);
 return Builder.CreateCall(Callee, {Vec});
   }
-  case WebAssembly::BI__builtin_wasm_any_true_i8x16:
-  case WebAssembly::BI__builtin_wasm_any_true_i16x8:
-  case 

[clang] 5c72975 - [WebAssembly] Remove saturating fp-to-int target intrinsics

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-04-16T12:11:20-07:00
New Revision: 5c729750a6d75df4eeb3eaad72e0b4e93ea27c0e

URL: 
https://github.com/llvm/llvm-project/commit/5c729750a6d75df4eeb3eaad72e0b4e93ea27c0e
DIFF: 
https://github.com/llvm/llvm-project/commit/5c729750a6d75df4eeb3eaad72e0b4e93ea27c0e.diff

LOG: [WebAssembly] Remove saturating fp-to-int target intrinsics

Use the target-independent @llvm.fptosi and @llvm.fptoui intrinsics instead.
This includes removing the instrinsics for i32x4.trunc_sat_zero_f64x2_{s,u},
which are now represented in IR as a saturating truncation to a v2i32 followed 
by
a concatenation with a zero vector.

Differential Revision: https://reviews.llvm.org/D100596

Added: 


Modified: 
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Analysis/ConstantFolding.cpp
llvm/lib/Target/WebAssembly/WebAssemblyISD.def
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
llvm/lib/Target/WebAssembly/WebAssemblyInstrConv.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/conv.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 
llvm/test/Transforms/InstSimplify/ConstProp/WebAssembly/trunc_saturate.ll



diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 860492a281fe0..7e19532322536 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17073,8 +17073,8 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
   case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32x4_f32x4: {
 Value *Src = EmitScalarExpr(E->getArg(0));
 llvm::Type *ResT = ConvertType(E->getType());
-Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_trunc_saturate_signed,
-{ResT, Src->getType()});
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::fptosi_sat, {ResT, Src->getType()});
 return Builder.CreateCall(Callee, {Src});
   }
   case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i32_f32:
@@ -17084,8 +17084,8 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
   case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i32x4_f32x4: {
 Value *Src = EmitScalarExpr(E->getArg(0));
 llvm::Type *ResT = ConvertType(E->getType());
-Function *Callee = 
CGM.getIntrinsic(Intrinsic::wasm_trunc_saturate_unsigned,
-{ResT, Src->getType()});
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::fptoui_sat, {ResT, Src->getType()});
 return Builder.CreateCall(Callee, {Src});
   }
   case WebAssembly::BI__builtin_wasm_min_f32:
@@ -17481,16 +17481,24 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 unsigned IntNo;
 switch (BuiltinID) {
 case WebAssembly::BI__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4:
-  IntNo = Intrinsic::wasm_trunc_sat_zero_signed;
+  IntNo = Intrinsic::fptosi_sat;
   break;
 case WebAssembly::BI__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4:
-  IntNo = Intrinsic::wasm_trunc_sat_zero_unsigned;
+  IntNo = Intrinsic::fptoui_sat;
   break;
 default:
   llvm_unreachable("unexpected builtin ID");
 }
-Function *Callee = CGM.getIntrinsic(IntNo);
-return Builder.CreateCall(Callee, Vec);
+llvm::Type *SrcT = Vec->getType();
+llvm::Type *TruncT =
+SrcT->getWithNewType(llvm::IntegerType::get(getLLVMContext(), 32));
+Function *Callee = CGM.getIntrinsic(IntNo, {TruncT, SrcT});
+Value *Trunc = Builder.CreateCall(Callee, Vec);
+Value *Splat = Builder.CreateVectorSplat(2, Builder.getInt32(0));
+Value *ConcatMask =
+llvm::ConstantVector::get({Builder.getInt32(0), Builder.getInt32(1),
+   Builder.getInt32(2), Builder.getInt32(3)});
+return Builder.CreateShuffleVector(Trunc, Splat, ConcatMask);
   }
   case WebAssembly::BI__builtin_wasm_demote_zero_f64x2_f32x4: {
 Value *Vec = EmitScalarExpr(E->getArg(0));

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 1a986f03dc498..d20b6a739f94a 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -123,49 +123,49 @@ long long trunc_u_i64_f64(double f) {
 
 int trunc_saturate_s_i32_f32(float f) {
   return __builtin_wasm_trunc_saturate_s_i32_f32(f);
-  // WEBASSEMBLY: call i32 @llvm.wasm.trunc.saturate.signed.i32.f32(float %f)
+  // WEBASSEMBLY: call i32 @llvm.fptosi.sat.i32.f32(float %f)
   // WEBASSEMBLY-NEXT: ret
 }
 
 int trunc_saturate_u_i32_f32(float f) {
   return __builtin_wasm_trunc_saturate_u_i32_f32(f);
-  // WEBASSEMBLY: call i32 @llvm.wasm.trunc.saturate.unsigned.i32.f32(float %f)
+  // WEBASSEMBLY: call i32 

[clang] 6a18cc2 - [WebAssembly] Codegen for i64x2.extend_{low,high}_i32x4_{s,u}

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-04-14T13:43:09-07:00
New Revision: 6a18cc23efad410db48a3ccfc233d215de7d4cb9

URL: 
https://github.com/llvm/llvm-project/commit/6a18cc23efad410db48a3ccfc233d215de7d4cb9
DIFF: 
https://github.com/llvm/llvm-project/commit/6a18cc23efad410db48a3ccfc233d215de7d4cb9.diff

LOG: [WebAssembly] Codegen for i64x2.extend_{low,high}_i32x4_{s,u}

Removes the builtins and intrinsics used to opt in to using these instructions
and replaces them with normal ISel patterns now that they are no longer
prototypes.

Differential Revision: https://reviews.llvm.org/D100402

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-extending.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index db8ec8ebeb30..bc0c37a11207 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -191,11 +191,6 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, 
"V16UcV8UsV8Us", "nc", "simd
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4UiV4Ui", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_extend_low_s_i32x4_i64x2, "V2LLiV4i", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extend_high_s_i32x4_i64x2, "V2LLiV4i", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extend_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_extend_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
-
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4, "V4iV2d", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_demote_zero_f64x2_f32x4, "V4fV2d", "nc", 
"simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 7871dfd65d53..860492a281fe 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17475,31 +17475,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(IntNo, {ConvertType(E->getType()), Low->getType()});
 return Builder.CreateCall(Callee, {Low, High});
   }
-  case WebAssembly::BI__builtin_wasm_extend_low_s_i32x4_i64x2:
-  case WebAssembly::BI__builtin_wasm_extend_high_s_i32x4_i64x2:
-  case WebAssembly::BI__builtin_wasm_extend_low_u_i32x4_i64x2:
-  case WebAssembly::BI__builtin_wasm_extend_high_u_i32x4_i64x2: {
-Value *Vec = EmitScalarExpr(E->getArg(0));
-unsigned IntNo;
-switch (BuiltinID) {
-case WebAssembly::BI__builtin_wasm_extend_low_s_i32x4_i64x2:
-  IntNo = Intrinsic::wasm_extend_low_signed;
-  break;
-case WebAssembly::BI__builtin_wasm_extend_high_s_i32x4_i64x2:
-  IntNo = Intrinsic::wasm_extend_high_signed;
-  break;
-case WebAssembly::BI__builtin_wasm_extend_low_u_i32x4_i64x2:
-  IntNo = Intrinsic::wasm_extend_low_unsigned;
-  break;
-case WebAssembly::BI__builtin_wasm_extend_high_u_i32x4_i64x2:
-  IntNo = Intrinsic::wasm_extend_high_unsigned;
-  break;
-default:
-  llvm_unreachable("unexpected builtin ID");
-}
-Function *Callee = CGM.getIntrinsic(IntNo);
-return Builder.CreateCall(Callee, Vec);
-  }
   case WebAssembly::BI__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4:
   case WebAssembly::BI__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4: {
 Value *Vec = EmitScalarExpr(E->getArg(0));

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index a5c6f4423c3b..1a986f03dc49 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -890,30 +890,6 @@ u16x8 narrow_u_i16x8_i32x4(u32x4 low, u32x4 high) {
   // WEBASSEMBLY: ret
 }
 
-i64x2 extend_low_s_i32x4_i64x2(i32x4 x) {
-  return __builtin_wasm_extend_low_s_i32x4_i64x2(x);
-  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.extend.low.signed(<4 x i32> %x)
-  // WEBASSEMBLY: ret
-}
-
-i64x2 extend_high_s_i32x4_i64x2(i32x4 x) {
-  return __builtin_wasm_extend_high_s_i32x4_i64x2(x);
-  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.extend.high.signed(<4 x i32> %x)
-  // WEBASSEMBLY: ret
-}
-
-u64x2 extend_low_u_i32x4_i64x2(u32x4 x) {
-  return __builtin_wasm_extend_low_u_i32x4_i64x2(x);
-  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.extend.low.unsigned(<4 x i32> %x)
-  // WEBASSEMBLY: ret
-}
-
-u64x2 extend_high_u_i32x4_i64x2(u32x4 x) {
-  return __builtin_wasm_extend_high_u_i32x4_i64x2(x);
-  // WEBASSEMBLY: call <2 x 

[clang] af7925b - [WebAssembly] Codegen for f64x2.convert_low_i32x4_{s, u}

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-04-14T10:42:45-07:00
New Revision: af7925b4dd6519ebf0126ac8a18d791eb26968c9

URL: 
https://github.com/llvm/llvm-project/commit/af7925b4dd6519ebf0126ac8a18d791eb26968c9
DIFF: 
https://github.com/llvm/llvm-project/commit/af7925b4dd6519ebf0126ac8a18d791eb26968c9.diff

LOG: [WebAssembly] Codegen for f64x2.convert_low_i32x4_{s,u}

Add a custom DAG combine and ISD opcode for detecting patterns like

  (uint_to_fp (extract_subvector ...))

before the extract_subvector is expanded to ensure that they will ultimately
lower to f64x2.convert_low_i32x4_{s,u} instructions. Since these instructions
are no longer prototypes and can now be produced via standard IR, this commit
also removes the target intrinsics and builtins that had been used to prototype
the instructions.

Differential Revision: https://reviews.llvm.org/D100425

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISD.def
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-conversions.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 3f8b050aabfd1..db8ec8ebeb302 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -196,8 +196,6 @@ TARGET_BUILTIN(__builtin_wasm_extend_high_s_i32x4_i64x2, 
"V2LLiV4i", "nc", "simd
 TARGET_BUILTIN(__builtin_wasm_extend_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_extend_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_convert_low_s_i32x4_f64x2, "V2dV4i", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_convert_low_u_i32x4_f64x2, "V2dV4Ui", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4, "V4iV2d", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4, "V4UiV2d", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_demote_zero_f64x2_f32x4, "V4fV2d", "nc", 
"simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index b9e3110da8345..7871dfd65d53e 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17500,23 +17500,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo);
 return Builder.CreateCall(Callee, Vec);
   }
-  case WebAssembly::BI__builtin_wasm_convert_low_s_i32x4_f64x2:
-  case WebAssembly::BI__builtin_wasm_convert_low_u_i32x4_f64x2: {
-Value *Vec = EmitScalarExpr(E->getArg(0));
-unsigned IntNo;
-switch (BuiltinID) {
-case WebAssembly::BI__builtin_wasm_convert_low_s_i32x4_f64x2:
-  IntNo = Intrinsic::wasm_convert_low_signed;
-  break;
-case WebAssembly::BI__builtin_wasm_convert_low_u_i32x4_f64x2:
-  IntNo = Intrinsic::wasm_convert_low_unsigned;
-  break;
-default:
-  llvm_unreachable("unexpected builtin ID");
-}
-Function *Callee = CGM.getIntrinsic(IntNo);
-return Builder.CreateCall(Callee, Vec);
-  }
   case WebAssembly::BI__builtin_wasm_trunc_sat_zero_s_f64x2_i32x4:
   case WebAssembly::BI__builtin_wasm_trunc_sat_zero_u_f64x2_i32x4: {
 Value *Vec = EmitScalarExpr(E->getArg(0));

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 7b7965c026e1a..a5c6f4423c3b4 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -914,18 +914,6 @@ u64x2 extend_high_u_i32x4_i64x2(u32x4 x) {
   // WEBASSEMBLY: ret
 }
 
-f64x2 convert_low_s_i32x4_f64x2(i32x4 x) {
-  return __builtin_wasm_convert_low_s_i32x4_f64x2(x);
-  // WEBASSEMBLY: call <2 x double> @llvm.wasm.convert.low.signed(<4 x i32> %x)
-  // WEBASSEMBLY: ret
-}
-
-f64x2 convert_low_u_i32x4_f64x2(u32x4 x) {
-  return __builtin_wasm_convert_low_u_i32x4_f64x2(x);
-  // WEBASSEMBLY: call <2 x double> @llvm.wasm.convert.low.unsigned(<4 x i32> 
%x)
-  // WEBASSEMBLY: ret
-}
-
 i32x4 trunc_sat_zero_s_f64x2_i32x4(f64x2 x) {
   return __builtin_wasm_trunc_sat_zero_s_f64x2_i32x4(x);
   // WEBASSEMBLY: call <4 x i32> @llvm.wasm.trunc.sat.zero.signed(<2 x double> 
%x)

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index f4bdd07b81082..977647db92adf 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -275,12 +275,6 @@ def int_wasm_extadd_pairwise_unsigned :
 [IntrNoMem, IntrSpeculatable]>;
 
 // TODO: Remove these if possible if they are 

[clang] af7ab81 - [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-04-14T09:19:27-07:00
New Revision: af7ab81ce3104418b4971b2398c1e028238ed90f

URL: 
https://github.com/llvm/llvm-project/commit/af7ab81ce3104418b4971b2398c1e028238ed90f
DIFF: 
https://github.com/llvm/llvm-project/commit/af7ab81ce3104418b4971b2398c1e028238ed90f.diff

LOG: [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

Now that these instructions are no longer prototypes, we do not need to be
careful about keeping them opt-in and can use the standard LLVM infrastructure
for them. This commit removes the bespoke intrinsics we were using to represent
these operations in favor of the corresponding target-independent intrinsics.
The clang builtins are preserved because there is no standard way to easily
represent these operations in C/C++.

For consistency with the scalar codegen in the Wasm backend, the intrinsic used
to represent {f32x4,f64x2}.nearest is @llvm.nearbyint even though
@llvm.roundeven better captures the semantics of the underlying Wasm
instruction. Replacing our use of @llvm.nearbyint with use of @llvm.roundeven is
left to a potential future patch.

Differential Revision: https://reviews.llvm.org/D100411

Added: 


Modified: 
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/CodeGen/WebAssembly/simd-unsupported.ll

Removed: 




diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 439b378306550..b9e3110da8345 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17136,19 +17136,19 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 switch (BuiltinID) {
 case WebAssembly::BI__builtin_wasm_ceil_f32x4:
 case WebAssembly::BI__builtin_wasm_ceil_f64x2:
-  IntNo = Intrinsic::wasm_ceil;
+  IntNo = Intrinsic::ceil;
   break;
 case WebAssembly::BI__builtin_wasm_floor_f32x4:
 case WebAssembly::BI__builtin_wasm_floor_f64x2:
-  IntNo = Intrinsic::wasm_floor;
+  IntNo = Intrinsic::floor;
   break;
 case WebAssembly::BI__builtin_wasm_trunc_f32x4:
 case WebAssembly::BI__builtin_wasm_trunc_f64x2:
-  IntNo = Intrinsic::wasm_trunc;
+  IntNo = Intrinsic::trunc;
   break;
 case WebAssembly::BI__builtin_wasm_nearest_f32x4:
 case WebAssembly::BI__builtin_wasm_nearest_f64x2:
-  IntNo = Intrinsic::wasm_nearest;
+  IntNo = Intrinsic::nearbyint;
   break;
 default:
   llvm_unreachable("unexpected builtin ID");

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index c27be6d909c08..7b7965c026e1a 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -792,49 +792,49 @@ f64x2 pmax_f64x2(f64x2 x, f64x2 y) {
 
 f32x4 ceil_f32x4(f32x4 x) {
   return __builtin_wasm_ceil_f32x4(x);
-  // WEBASSEMBLY: call <4 x float> @llvm.wasm.ceil.v4f32(<4 x float> %x)
+  // WEBASSEMBLY: call <4 x float> @llvm.ceil.v4f32(<4 x float> %x)
   // WEBASSEMBLY: ret
 }
 
 f32x4 floor_f32x4(f32x4 x) {
   return __builtin_wasm_floor_f32x4(x);
-  // WEBASSEMBLY: call <4 x float> @llvm.wasm.floor.v4f32(<4 x float> %x)
+  // WEBASSEMBLY: call <4 x float> @llvm.floor.v4f32(<4 x float> %x)
   // WEBASSEMBLY: ret
 }
 
 f32x4 trunc_f32x4(f32x4 x) {
   return __builtin_wasm_trunc_f32x4(x);
-  // WEBASSEMBLY: call <4 x float> @llvm.wasm.trunc.v4f32(<4 x float> %x)
+  // WEBASSEMBLY: call <4 x float> @llvm.trunc.v4f32(<4 x float> %x)
   // WEBASSEMBLY: ret
 }
 
 f32x4 nearest_f32x4(f32x4 x) {
   return __builtin_wasm_nearest_f32x4(x);
-  // WEBASSEMBLY: call <4 x float> @llvm.wasm.nearest.v4f32(<4 x float> %x)
+  // WEBASSEMBLY: call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %x)
   // WEBASSEMBLY: ret
 }
 
 f64x2 ceil_f64x2(f64x2 x) {
   return __builtin_wasm_ceil_f64x2(x);
-  // WEBASSEMBLY: call <2 x double> @llvm.wasm.ceil.v2f64(<2 x double> %x)
+  // WEBASSEMBLY: call <2 x double> @llvm.ceil.v2f64(<2 x double> %x)
   // WEBASSEMBLY: ret
 }
 
 f64x2 floor_f64x2(f64x2 x) {
   return __builtin_wasm_floor_f64x2(x);
-  // WEBASSEMBLY: call <2 x double> @llvm.wasm.floor.v2f64(<2 x double> %x)
+  // WEBASSEMBLY: call <2 x double> @llvm.floor.v2f64(<2 x double> %x)
   // WEBASSEMBLY: ret
 }
 
 f64x2 trunc_f64x2(f64x2 x) {
   return __builtin_wasm_trunc_f64x2(x);
-  // WEBASSEMBLY: call <2 x double> @llvm.wasm.trunc.v2f64(<2 x double> %x)
+  // WEBASSEMBLY: call <2 x double> @llvm.trunc.v2f64(<2 x double> %x)
   // WEBASSEMBLY: ret
 }
 
 f64x2 nearest_f64x2(f64x2 x) {
   return __builtin_wasm_nearest_f64x2(x);
-  // WEBASSEMBLY: call <2 x double> @llvm.wasm.nearest.v2f64(<2 x double> %x)
+  // WEBASSEMBLY: call <2 x double> 

[clang] 45783d0 - [WebAssembly] Implement i64x2 comparisons

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-03-31T10:46:17-07:00
New Revision: 45783d0e8a3632b7c1f5b0cdd258bfba1f8583e7

URL: 
https://github.com/llvm/llvm-project/commit/45783d0e8a3632b7c1f5b0cdd258bfba1f8583e7
DIFF: 
https://github.com/llvm/llvm-project/commit/45783d0e8a3632b7c1f5b0cdd258bfba1f8583e7.diff

LOG: [WebAssembly] Implement i64x2 comparisons

Removes the prototype builtin and intrinsic for i64x2.eq and implements that
instruction as well as the other i64x2 comparison instructions in the final SIMD
spec. Unsigned comparisons were not included in the final spec, so they still
need to be scalarized via a custom lowering.

Differential Revision: https://reviews.llvm.org/D99623

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-comparisons.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/CodeGen/WebAssembly/simd-select.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 6ea59026cd02a..3f8b050aabfd1 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -215,7 +215,5 @@ TARGET_BUILTIN(__builtin_wasm_store16_lane, "vs*V8sIi", 
"n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_store32_lane, "vi*V4iIi", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_store64_lane, "vLLi*V2LLiIi", "n", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_eq_i64x2, "V2LLiV2LLiV2LLi", "nc", "simd128")
-
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 7d24b6a9342e4..86ea4ac28ae86 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17400,12 +17400,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_popcnt);
 return Builder.CreateCall(Callee, {Vec});
   }
-  case WebAssembly::BI__builtin_wasm_eq_i64x2: {
-Value *LHS = EmitScalarExpr(E->getArg(0));
-Value *RHS = EmitScalarExpr(E->getArg(1));
-Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_eq);
-return Builder.CreateCall(Callee, {LHS, RHS});
-  }
   case WebAssembly::BI__builtin_wasm_any_true_i8x16:
   case WebAssembly::BI__builtin_wasm_any_true_i16x8:
   case WebAssembly::BI__builtin_wasm_any_true_i32x4:

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index f635e68258963..c27be6d909c08 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -650,12 +650,6 @@ i8x16 popcnt(i8x16 x) {
   // WEBASSEMBLY-NEXT: ret
 }
 
-i64x2 eq_i64x2(i64x2 x, i64x2 y) {
-  return __builtin_wasm_eq_i64x2(x, y);
-  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.eq(<2 x i64> %x, <2 x i64> %y)
-  // WEBASSEMBLY-NEXT: ret
-}
-
 int any_true_i8x16(i8x16 x) {
   return __builtin_wasm_any_true_i8x16(x);
   // WEBASSEMBLY: call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> %x)

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index 7e7d151d22fef..a57080d1d95b4 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -294,13 +294,6 @@ def int_wasm_extadd_pairwise_unsigned :
 [LLVMSubdivide2VectorType<0>],
 [IntrNoMem, IntrSpeculatable]>;
 
-// TODO: Remove this intrinsic and the associated builtin if i64x2.eq gets
-// merged to the proposal.
-def int_wasm_eq :
-  Intrinsic<[llvm_v2i64_ty],
-[llvm_v2i64_ty, llvm_v2i64_ty],
-[IntrNoMem, IntrSpeculatable]>;
-
 // TODO: Remove these if possible if they are merged to the spec.
 def int_wasm_convert_low_signed :
   Intrinsic<[llvm_v2f64_ty], [llvm_v4i32_ty],

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 
b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 85d2d2f60a53d..4c12c5f2a3d97 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -186,9 +186,9 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
   for (auto T : {MVT::v4f32, MVT::v2f64})
 setOperationAction(Op, T, Expand);
 
-// Expand operations not supported for i64x2 vectors
-for (unsigned CC = 0; CC < ISD::SETCC_INVALID; ++CC)
-  setCondCodeAction(static_cast(CC), MVT::v2i64, Custom);
+// Unsigned comparison operations are unavailable for i64x2 vectors.
+for (auto CC : {ISD::SETUGT, ISD::SETUGE, ISD::SETULT, ISD::SETULE})
+  

[clang] cbab2cd - [WebAssembly] Remove experimental instructions from wasm_simd128.h

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-03-18T17:13:50-07:00
New Revision: cbab2cd6bf77f121c0d8a46abf607895b2911a20

URL: 
https://github.com/llvm/llvm-project/commit/cbab2cd6bf77f121c0d8a46abf607895b2911a20
DIFF: 
https://github.com/llvm/llvm-project/commit/cbab2cd6bf77f121c0d8a46abf607895b2911a20.diff

LOG: [WebAssembly] Remove experimental instructions from wasm_simd128.h

These experimental builtin functions and the feature macro they were gated
behind have been removed.

Reviewed By: aheejin

Differential Revision: https://reviews.llvm.org/D98907

Added: 


Modified: 
clang/lib/Headers/wasm_simd128.h

Removed: 




diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 20f5a85b3224..eb2a42f303b6 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -825,18 +825,6 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_i64x2_neg(v128_t __a) {
   return (v128_t)(-(__u64x2)__a);
 }
 
-#ifdef __wasm_unimplemented_simd128__
-
-static __inline__ bool __DEFAULT_FN_ATTRS wasm_i64x2_any_true(v128_t __a) {
-  return __builtin_wasm_any_true_i64x2((__i64x2)__a);
-}
-
-static __inline__ bool __DEFAULT_FN_ATTRS wasm_i64x2_all_true(v128_t __a) {
-  return __builtin_wasm_all_true_i64x2((__i64x2)__a);
-}
-
-#endif // __wasm_unimplemented_simd128__
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_shl(v128_t __a,
int32_t __b) {
   return (v128_t)((__i64x2)__a << (int64_t)__b);
@@ -879,24 +867,6 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f32x4_sqrt(v128_t __a) {
   return (v128_t)__builtin_wasm_sqrt_f32x4((__f32x4)__a);
 }
 
-#ifdef __wasm_unimplemented_simd128__
-
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_qfma(v128_t __a,
-v128_t __b,
-v128_t __c) {
-  return (v128_t)__builtin_wasm_qfma_f32x4((__f32x4)__a, (__f32x4)__b,
-   (__f32x4)__c);
-}
-
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_qfms(v128_t __a,
-v128_t __b,
-v128_t __c) {
-  return (v128_t)__builtin_wasm_qfms_f32x4((__f32x4)__a, (__f32x4)__b,
-   (__f32x4)__c);
-}
-
-#endif // __wasm_unimplemented_simd128__
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_add(v128_t __a,
v128_t __b) {
   return (v128_t)((__f32x4)__a + (__f32x4)__b);
@@ -949,24 +919,6 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f64x2_sqrt(v128_t __a) {
   return (v128_t)__builtin_wasm_sqrt_f64x2((__f64x2)__a);
 }
 
-#ifdef __wasm_unimplemented_simd128__
-
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_qfma(v128_t __a,
-v128_t __b,
-v128_t __c) {
-  return (v128_t)__builtin_wasm_qfma_f64x2((__f64x2)__a, (__f64x2)__b,
-   (__f64x2)__c);
-}
-
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_qfms(v128_t __a,
-v128_t __b,
-v128_t __c) {
-  return (v128_t)__builtin_wasm_qfms_f64x2((__f64x2)__a, (__f64x2)__b,
-   (__f64x2)__c);
-}
-
-#endif // __wasm_unimplemented_simd128__
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_add(v128_t __a,
v128_t __b) {
   return (v128_t)((__f64x2)__a + (__f64x2)__b);



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[clang] f5764a8 - [WebAssembly] Finalize SIMD names and opcodes

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-03-18T11:21:25-07:00
New Revision: f5764a8654e3caa6ca5dab3a89238c165062228f

URL: 
https://github.com/llvm/llvm-project/commit/f5764a8654e3caa6ca5dab3a89238c165062228f
DIFF: 
https://github.com/llvm/llvm-project/commit/f5764a8654e3caa6ca5dab3a89238c165062228f.diff

LOG: [WebAssembly] Finalize SIMD names and opcodes

Updates the names (e.g. widen => extend, saturate => sat) and opcodes of all
SIMD instructions to match the finalized SIMD spec. Deliberately does not change
the public interface in wasm_simd128.h yet; that will require more care.

Depends on D98466.

Differential Revision: https://reviews.llvm.org/D98676

Added: 
llvm/test/CodeGen/WebAssembly/simd-extending.ll

Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISD.def
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 
llvm/test/CodeGen/WebAssembly/simd-widening.ll



diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 2f51376ba15a..6ea59026cd02 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -84,15 +84,15 @@ TARGET_BUILTIN(__builtin_wasm_replace_lane_i64x2, 
"V2LLiV2LLiIiLLi", "nc", "simd
 TARGET_BUILTIN(__builtin_wasm_replace_lane_f32x4, "V4fV4fIif", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_replace_lane_f64x2, "V2dV2dIid", "nc", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_add_saturate_s_i8x16, "V16ScV16ScV16Sc", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_add_saturate_u_i8x16, "V16UcV16UcV16Uc", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_add_saturate_s_i16x8, "V8sV8sV8s", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_add_saturate_u_i16x8, "V8UsV8UsV8Us", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_add_sat_s_i8x16, "V16ScV16ScV16Sc", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_add_sat_u_i8x16, "V16UcV16UcV16Uc", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_add_sat_s_i16x8, "V8sV8sV8s", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_add_sat_u_i16x8, "V8UsV8UsV8Us", "nc", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_sub_saturate_s_i8x16, "V16ScV16ScV16Sc", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_sub_saturate_u_i8x16, "V16UcV16UcV16Uc", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_sub_saturate_s_i16x8, "V8sV8sV8s", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_sub_saturate_u_i16x8, "V8UsV8UsV8Us", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_sub_sat_s_i8x16, "V16ScV16ScV16Sc", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_sub_sat_u_i8x16, "V16UcV16UcV16Uc", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_sub_sat_s_i16x8, "V8sV8sV8s", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_sub_sat_u_i16x8, "V8UsV8UsV8Us", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_abs_i8x16, "V16ScV16Sc", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_abs_i16x8, "V8sV8s", "nc", "simd128")
@@ -116,7 +116,7 @@ TARGET_BUILTIN(__builtin_wasm_avgr_u_i16x8, "V8UsV8UsV8Us", 
"nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_popcnt_i8x16, "V16ScV16Sc", "nc", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_q15mulr_saturate_s_i16x8, "V8sV8sV8s", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_q15mulr_sat_s_i16x8, "V8sV8sV8s", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_extmul_low_i8x16_s_i16x8, "V8sV16ScV16Sc", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_extmul_high_i8x16_s_i16x8, "V8sV16ScV16Sc", 
"nc", "simd128")
@@ -191,15 +191,15 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, 
"V16UcV8UsV8Us", "nc", "simd
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4UiV4Ui", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_widen_low_s_i32x4_i64x2, "V2LLiV4i", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i64x2, "V2LLiV4i", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extend_low_s_i32x4_i64x2, "V2LLiV4i", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extend_high_s_i32x4_i64x2, "V2LLiV4i", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extend_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extend_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_convert_low_s_i32x4_f64x2, "V2dV4i", "nc", 

[clang] 2f2ae08 - [WebAssembly] Remove experimental SIMD instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-03-18T11:21:24-07:00
New Revision: 2f2ae08da91dc5c188d5bb4d8b0b096d0a120a4a

URL: 
https://github.com/llvm/llvm-project/commit/2f2ae08da91dc5c188d5bb4d8b0b096d0a120a4a
DIFF: 
https://github.com/llvm/llvm-project/commit/2f2ae08da91dc5c188d5bb4d8b0b096d0a120a4a.diff

LOG: [WebAssembly] Remove experimental SIMD instructions

Removes the instruction definitions, intrinsics, and builtins for qfma/qfms,
signselect, and prefetch instructions, which were not included in the final
WebAssembly SIMD spec.

Depends on D98457.

Differential Revision: https://reviews.llvm.org/D98466

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 
llvm/test/CodeGen/WebAssembly/simd-prefetch-offset.ll



diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 38de66587cba..2f51376ba15a 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -141,11 +141,6 @@ 
TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i16x8_u_i32x4, "V4UiV8Us", "nc", "
 
 TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_signselect_i8x16, "V16ScV16ScV16ScV16Sc", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_signselect_i16x8, "V8sV8sV8sV8s", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_signselect_i32x4, "V4iV4iV4iV4i", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_signselect_i64x2, "V2LLiV2LLiV2LLiV2LLi", "nc", 
"simd128")
-
 TARGET_BUILTIN(__builtin_wasm_shuffle_v8x16, 
"V16ScV16ScV16ScIiIiIiIiIiIiIiIiIiIiIiIiIiIiIiIi", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_any_true_i8x16, "iV16Sc", "nc", "simd128")
@@ -188,11 +183,6 @@ TARGET_BUILTIN(__builtin_wasm_dot_s_i32x4_i16x8, 
"V4iV8sV8s", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_sqrt_f32x4, "V4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_sqrt_f64x2, "V2dV2d", "nc", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_qfma_f32x4, "V4fV4fV4fV4f", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_qfms_f32x4, "V4fV4fV4fV4f", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_qfma_f64x2, "V2dV2dV2dV2d", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_qfms_f64x2, "V2dV2dV2dV2d", "nc", "simd128")
-
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i32x4_f32x4, "V4iV4f", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i32x4_f32x4, "V4iV4f", "nc", 
"simd128")
 
@@ -206,9 +196,6 @@ TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i64x2, 
"V2LLiV4i", "nc", "simd1
 TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_widen_s_i8x16_i32x4, "V4iV16ScIi", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_widen_u_i8x16_i32x4, "V4UiV16UcIi", "nc", 
"simd128")
-
 TARGET_BUILTIN(__builtin_wasm_convert_low_s_i32x4_f64x2, "V2dV4i", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_convert_low_u_i32x4_f64x2, "V2dV4Ui", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4, "V4iV2d", 
"nc", "simd128")
@@ -230,8 +217,5 @@ TARGET_BUILTIN(__builtin_wasm_store64_lane, "vLLi*V2LLiIi", 
"n", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_eq_i64x2, "V2LLiV2LLiV2LLi", "nc", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_prefetch_t, "vv*", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_prefetch_nt, "vv*", "n", "simd128")
-
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 8d1d3c50870c..96df7b0d6222 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17366,17 +17366,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(Intrinsic::wasm_bitselect, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {V1, V2, C});
   }
-  case WebAssembly::BI__builtin_wasm_signselect_i8x16:
-  case WebAssembly::BI__builtin_wasm_signselect_i16x8:
-  case WebAssembly::BI__builtin_wasm_signselect_i32x4:
-  case WebAssembly::BI__builtin_wasm_signselect_i64x2: {
-Value *V1 = EmitScalarExpr(E->getArg(0));
-Value *V2 = EmitScalarExpr(E->getArg(1));
-Value *C = EmitScalarExpr(E->getArg(2));
-Function *Callee =
-CGM.getIntrinsic(Intrinsic::wasm_signselect, 
ConvertType(E->getType()));
-return Builder.CreateCall(Callee, {V1, V2, 

[clang] eec7f8f - [WebAssembly] Add missing default cases in switch statements

[Thomas Lively via cfe-commits]

Author: Soumi Manna
Date: 2021-03-03T13:15:23-08:00
New Revision: eec7f8f7b1226be422a76542cb403d02538f453a

URL: 
https://github.com/llvm/llvm-project/commit/eec7f8f7b1226be422a76542cb403d02538f453a
DIFF: 
https://github.com/llvm/llvm-project/commit/eec7f8f7b1226be422a76542cb403d02538f453a.diff

LOG: [WebAssembly] Add missing default cases in switch statements

unsigned variable 'IntNo' has been declared but not been defined inside function
EmitWebAssemblyBuiltinExpr().

static code analysis tool complains about uninitialized variable "IntNo" since
this enters to default branch without setting any intrinsics and calls Function
*Callee = CGM.getIntrinsic(IntNo).

This patch fixes the problem by adding default cases in switch statements.

Added: 


Modified: 
clang/lib/CodeGen/CGBuiltin.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 1a5dfdedc037..6b3d385c411e 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17365,6 +17365,8 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 case WebAssembly::BI__builtin_wasm_widen_high_u_i32x4_i64x2:
   IntNo = Intrinsic::wasm_widen_high_unsigned;
   break;
+default:
+  llvm_unreachable("unexpected builtin ID");
 }
 Function *Callee = CGM.getIntrinsic(IntNo);
 return Builder.CreateCall(Callee, Vec);
@@ -17383,6 +17385,8 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 case WebAssembly::BI__builtin_wasm_widen_u_i8x16_i32x4:
   IntNo = Intrinsic::wasm_widen_unsigned;
   break;
+default:
+  llvm_unreachable("unexpected builtin ID");
 }
 Function *Callee = CGM.getIntrinsic(IntNo);
 return Builder.CreateCall(Callee, {Vec, SubVec});
@@ -17398,6 +17402,8 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 case WebAssembly::BI__builtin_wasm_convert_low_u_i32x4_f64x2:
   IntNo = Intrinsic::wasm_convert_low_unsigned;
   break;
+default:
+  llvm_unreachable("unexpected builtin ID");
 }
 Function *Callee = CGM.getIntrinsic(IntNo);
 return Builder.CreateCall(Callee, Vec);
@@ -17413,6 +17419,8 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_u_f64x2_i32x4:
   IntNo = Intrinsic::wasm_trunc_saturate_zero_unsigned;
   break;
+default:
+  llvm_unreachable("unexpected builtin ID");
 }
 Function *Callee = CGM.getIntrinsic(IntNo);
 return Builder.CreateCall(Callee, Vec);



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[clang] 4b68b64 - [WebAssembly] Prototype i8x16 to i32x4 widening instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-01-28T10:59:32-08:00
New Revision: 4b68b64dcc5bcd6f29779b820791611c60438385

URL: 
https://github.com/llvm/llvm-project/commit/4b68b64dcc5bcd6f29779b820791611c60438385
DIFF: 
https://github.com/llvm/llvm-project/commit/4b68b64dcc5bcd6f29779b820791611c60438385.diff

LOG: [WebAssembly] Prototype i8x16 to i32x4 widening instructions

As proposed in https://github.com/WebAssembly/simd/pull/395 and matching the
opcodes used in V8:
https://chromium-review.googlesource.com/c/v8/v8/+/2617385/4/src/wasm/wasm-opcodes.h

Differential Revision: https://reviews.llvm.org/D95557

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index bb7d6d379e58..84f346bcb928 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -206,6 +206,9 @@ TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i64x2, 
"V2LLiV4i", "nc", "simd1
 TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
 
+TARGET_BUILTIN(__builtin_wasm_widen_s_i8x16_i32x4, "V4iV16ScIi", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_widen_u_i8x16_i32x4, "V4UiV16UcIi", "nc", 
"simd128")
+
 TARGET_BUILTIN(__builtin_wasm_convert_low_s_i32x4_f64x2, "V2dV4i", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_convert_low_u_i32x4_f64x2, "V2dV4Ui", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4, "V4iV2d", 
"nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 113541bd5024..973a20f2f58c 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17220,6 +17220,24 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo);
 return Builder.CreateCall(Callee, Vec);
   }
+  case WebAssembly::BI__builtin_wasm_widen_s_i8x16_i32x4:
+  case WebAssembly::BI__builtin_wasm_widen_u_i8x16_i32x4: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+llvm::APSInt SubVecConst =
+*E->getArg(1)->getIntegerConstantExpr(getContext());
+Value *SubVec = llvm::ConstantInt::get(getLLVMContext(), SubVecConst);
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_widen_s_i8x16_i32x4:
+  IntNo = Intrinsic::wasm_widen_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_widen_u_i8x16_i32x4:
+  IntNo = Intrinsic::wasm_widen_unsigned;
+  break;
+}
+Function *Callee = CGM.getIntrinsic(IntNo);
+return Builder.CreateCall(Callee, {Vec, SubVec});
+  }
   case WebAssembly::BI__builtin_wasm_convert_low_s_i32x4_f64x2:
   case WebAssembly::BI__builtin_wasm_convert_low_u_i32x4_f64x2: {
 Value *Vec = EmitScalarExpr(E->getArg(0));

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 61fc76cd1873..771764c85d6b 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -976,6 +976,18 @@ u64x2 widen_high_u_i32x4_i64x2(u32x4 x) {
   // WEBASSEMBLY: ret
 }
 
+i32x4 widen_s_i8x16_i32x4(i8x16 x) {
+  return __builtin_wasm_widen_s_i8x16_i32x4(x, 3);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.widen.signed(<16 x i8> %x, i32 3)
+  // WEBASSEMBLY: ret
+}
+
+u32x4 widen_u_i8x16_i32x4(u8x16 x) {
+  return __builtin_wasm_widen_u_i8x16_i32x4(x, 3);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.widen.unsigned(<16 x i8> %x, i32 3)
+  // WEBASSEMBLY: ret
+}
+
 f64x2 convert_low_s_i32x4_f64x2(i32x4 x) {
   return __builtin_wasm_convert_low_s_i32x4_f64x2(x);
   // WEBASSEMBLY: call <2 x double> @llvm.wasm.convert.low.signed(<4 x i32> %x)

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index d306d0ccb90d..323b9a770c05 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -348,6 +348,14 @@ def int_wasm_promote_low :
   Intrinsic<[llvm_v2f64_ty], [llvm_v4f32_ty],
 [IntrNoMem, IntrSpeculatable]>;
 
+// TODO: Remove these if possible if they are merged to the spec.
+def int_wasm_widen_signed :
+  Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty, llvm_i32_ty],
+[IntrNoMem, IntrSpeculatable, ImmArg>]>;
+def int_wasm_widen_unsigned :
+  Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty, llvm_i32_ty],
+[IntrNoMem, IntrSpeculatable, ImmArg>]>;
+
 

[clang] 11802ec - [WebAssembly] Prototype new f64x2 conversions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-01-20T11:28:06-08:00
New Revision: 11802eced5d67394c1dcb5acfaef38b0038c6d90

URL: 
https://github.com/llvm/llvm-project/commit/11802eced5d67394c1dcb5acfaef38b0038c6d90
DIFF: 
https://github.com/llvm/llvm-project/commit/11802eced5d67394c1dcb5acfaef38b0038c6d90.diff

LOG: [WebAssembly] Prototype new f64x2 conversions

As proposed in https://github.com/WebAssembly/simd/pull/383.

Differential Revision: https://reviews.llvm.org/D95012

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 080c6b5c3a40..bb7d6d379e58 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -206,6 +206,13 @@ TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i64x2, 
"V2LLiV4i", "nc", "simd1
 TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
 
+TARGET_BUILTIN(__builtin_wasm_convert_low_s_i32x4_f64x2, "V2dV4i", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_convert_low_u_i32x4_f64x2, "V2dV4Ui", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4, "V4iV2d", 
"nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_trunc_saturate_zero_u_f64x2_i32x4, "V4UiV2d", 
"nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_demote_zero_f64x2_f32x4, "V4fV2d", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_promote_low_f32x4_f64x2, "V2dV4f", "nc", 
"simd128")
+
 TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "n", "simd128")
 

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 25ebb67c2ab6..113541bd5024 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17220,6 +17220,46 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo);
 return Builder.CreateCall(Callee, Vec);
   }
+  case WebAssembly::BI__builtin_wasm_convert_low_s_i32x4_f64x2:
+  case WebAssembly::BI__builtin_wasm_convert_low_u_i32x4_f64x2: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_convert_low_s_i32x4_f64x2:
+  IntNo = Intrinsic::wasm_convert_low_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_convert_low_u_i32x4_f64x2:
+  IntNo = Intrinsic::wasm_convert_low_unsigned;
+  break;
+}
+Function *Callee = CGM.getIntrinsic(IntNo);
+return Builder.CreateCall(Callee, Vec);
+  }
+  case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4:
+  case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_u_f64x2_i32x4: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4:
+  IntNo = Intrinsic::wasm_trunc_saturate_zero_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_u_f64x2_i32x4:
+  IntNo = Intrinsic::wasm_trunc_saturate_zero_unsigned;
+  break;
+}
+Function *Callee = CGM.getIntrinsic(IntNo);
+return Builder.CreateCall(Callee, Vec);
+  }
+  case WebAssembly::BI__builtin_wasm_demote_zero_f64x2_f32x4: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_demote_zero);
+return Builder.CreateCall(Callee, Vec);
+  }
+  case WebAssembly::BI__builtin_wasm_promote_low_f32x4_f64x2: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_promote_low);
+return Builder.CreateCall(Callee, Vec);
+  }
   case WebAssembly::BI__builtin_wasm_load32_zero: {
 Value *Ptr = EmitScalarExpr(E->getArg(0));
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load32_zero);

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index d8b61f5d285e..61fc76cd1873 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -976,6 +976,42 @@ u64x2 widen_high_u_i32x4_i64x2(u32x4 x) {
   // WEBASSEMBLY: ret
 }
 
+f64x2 convert_low_s_i32x4_f64x2(i32x4 x) {
+  return __builtin_wasm_convert_low_s_i32x4_f64x2(x);
+  // WEBASSEMBLY: call <2 x double> @llvm.wasm.convert.low.signed(<4 x i32> %x)
+  // WEBASSEMBLY: ret
+}
+
+f64x2 convert_low_u_i32x4_f64x2(u32x4 x) {
+  return 

[clang] 497026c - [WebAssembly] Prototype prefetch instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2021-01-05T11:32:03-08:00
New Revision: 497026c90233e82ffd3ce2438c5f9567be6dabe7

URL: 
https://github.com/llvm/llvm-project/commit/497026c90233e82ffd3ce2438c5f9567be6dabe7
DIFF: 
https://github.com/llvm/llvm-project/commit/497026c90233e82ffd3ce2438c5f9567be6dabe7.diff

LOG: [WebAssembly] Prototype prefetch instructions

As proposed in https://github.com/WebAssembly/simd/pull/352 and using the
opcodes used in the V8 prototype:
https://chromium-review.googlesource.com/c/v8/v8/+/2543167. These instructions
are only usable via intrinsics and clang builtins to make them opt-in while they
are being benchmarked.

Differential Revision: https://reviews.llvm.org/D93883

Added: 
llvm/test/CodeGen/WebAssembly/simd-prefetch-offset.ll

Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index d6860e0b13be..84482082095e 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -220,5 +220,8 @@ TARGET_BUILTIN(__builtin_wasm_store64_lane, "vLLi*V2LLiIi", 
"n", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_eq_i64x2, "V2LLiV2LLiV2LLi", "nc", "simd128")
 
+TARGET_BUILTIN(__builtin_wasm_prefetch_t, "vv*", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_prefetch_nt, "vv*", "n", "simd128")
+
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 6e98af407a9a..1e0337ca7ac3 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17171,6 +17171,16 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_shuffle);
 return Builder.CreateCall(Callee, Ops);
   }
+  case WebAssembly::BI__builtin_wasm_prefetch_t: {
+Value *Ptr = EmitScalarExpr(E->getArg(0));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_prefetch_t);
+return Builder.CreateCall(Callee, Ptr);
+  }
+  case WebAssembly::BI__builtin_wasm_prefetch_nt: {
+Value *Ptr = EmitScalarExpr(E->getArg(0));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_prefetch_nt);
+return Builder.CreateCall(Callee, Ptr);
+  }
   default:
 return nullptr;
   }

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index a07c278c33af..83924b48542e 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -1002,3 +1002,13 @@ i8x16 shuffle(i8x16 x, i8x16 y) {
   // WEBASSEMBLY-SAME: i32 15
   // WEBASSEMBLY-NEXT: ret
 }
+
+void prefetch_t(void *p) {
+  return __builtin_wasm_prefetch_t(p);
+  // WEBASSEMBLY: call void @llvm.wasm.prefetch.t(i8* %p)
+}
+
+void prefetch_nt(void *p) {
+  return __builtin_wasm_prefetch_nt(p);
+  // WEBASSEMBLY: call void @llvm.wasm.prefetch.nt(i8* %p)
+}

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index d9a6aa78fdcd..e87700ab0fcb 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -311,6 +311,20 @@ def int_wasm_eq :
 [llvm_v2i64_ty, llvm_v2i64_ty],
 [IntrNoMem, IntrSpeculatable]>;
 
+// TODO: Remove this after experiments have been run. Use the target-agnostic
+// int_prefetch if this becomes specified at some point.
+def int_wasm_prefetch_t :
+  Intrinsic<[], [llvm_ptr_ty],
+[IntrInaccessibleMemOrArgMemOnly, IntrWillReturn,
+ ReadOnly>, NoCapture>],
+"", [SDNPMemOperand]>;
+
+def int_wasm_prefetch_nt :
+  Intrinsic<[], [llvm_ptr_ty],
+[IntrInaccessibleMemOrArgMemOnly, IntrWillReturn,
+ ReadOnly>, NoCapture>],
+"", [SDNPMemOperand]>;
+
 
//===--===//
 // Thread-local storage intrinsics
 
//===--===//

diff  --git a/llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp 
b/llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
index 18d7b642e044..cd07a142147c 100644
--- a/llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
+++ b/llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
@@ -427,7 +427,8 @@ class WebAssemblyAsmParser final : public MCTargetAsmParser 
{
   bool 

[clang] 5e09e99 - [WebAssembly] Prototype extending pairwise add instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-12-28T14:11:14-08:00
New Revision: 5e09e9979bc60f0fca0e80e7f72f1260bd1bbca5

URL: 
https://github.com/llvm/llvm-project/commit/5e09e9979bc60f0fca0e80e7f72f1260bd1bbca5
DIFF: 
https://github.com/llvm/llvm-project/commit/5e09e9979bc60f0fca0e80e7f72f1260bd1bbca5.diff

LOG: [WebAssembly] Prototype extending pairwise add instructions

As proposed in https://github.com/WebAssembly/simd/pull/380. This commit makes
the new instructions available only via clang builtins and LLVM intrinsics to
make their use opt-in while they are still being evaluated for inclusion in the
SIMD proposal.

Depends on D93771.

Differential Revision: https://reviews.llvm.org/D93775

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 023365bec7f8..d6860e0b13be 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -133,6 +133,12 @@ TARGET_BUILTIN(__builtin_wasm_extmul_high_i32x4_s_i64x2, 
"V2LLiV4iV4i", "nc", "s
 TARGET_BUILTIN(__builtin_wasm_extmul_low_i32x4_u_i64x2, "V2ULLiV4UiV4Ui", 
"nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_extmul_high_i32x4_u_i64x2, "V2ULLiV4UiV4Ui", 
"nc", "simd128")
 
+TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i8x16_s_i16x8, "V8sV16Sc", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i8x16_u_i16x8, "V8UsV16Uc", 
"nc", "simd128")
+
+TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i16x8_s_i32x4, "V4iV8s", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i16x8_u_i32x4, "V4UiV8Us", "nc", 
"simd128")
+
 TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_signselect_i8x16, "V16ScV16ScV16ScV16Sc", "nc", 
"simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 60bfa90e22fc..0c02dbfe8469 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16932,6 +16932,28 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_extadd_pairwise_i8x16_s_i16x8:
+  case WebAssembly::BI__builtin_wasm_extadd_pairwise_i8x16_u_i16x8:
+  case WebAssembly::BI__builtin_wasm_extadd_pairwise_i16x8_s_i32x4:
+  case WebAssembly::BI__builtin_wasm_extadd_pairwise_i16x8_u_i32x4: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_extadd_pairwise_i8x16_s_i16x8:
+case WebAssembly::BI__builtin_wasm_extadd_pairwise_i16x8_s_i32x4:
+  IntNo = Intrinsic::wasm_extadd_pairwise_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_extadd_pairwise_i8x16_u_i16x8:
+case WebAssembly::BI__builtin_wasm_extadd_pairwise_i16x8_u_i32x4:
+  IntNo = Intrinsic::wasm_extadd_pairwise_unsigned;
+  break;
+default:
+  llvm_unreachable("unexptected builtin ID");
+}
+
+Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType()));
+return Builder.CreateCall(Callee, Vec);
+  }
   case WebAssembly::BI__builtin_wasm_bitselect: {
 Value *V1 = EmitScalarExpr(E->getArg(0));
 Value *V2 = EmitScalarExpr(E->getArg(1));

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 76dd2622fe2f..a07c278c33af 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -603,6 +603,34 @@ u64x2 extmul_high_i32x4_u_i64x2(u32x4 x, u32x4 y) {
   // WEBASSEMBLY-NEXT: ret
 }
 
+i16x8 extadd_pairwise_i8x16_s_i16x8(i8x16 v) {
+  return __builtin_wasm_extadd_pairwise_i8x16_s_i16x8(v);
+  // WEBASSEMBLY: call <8 x i16> @llvm.wasm.extadd.pairwise.signed.v8i16(
+  // WEBASSEMBLY-SAME: <16 x i8> %v)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+u16x8 extadd_pairwise_i8x16_u_i16x8(u8x16 v) {
+  return __builtin_wasm_extadd_pairwise_i8x16_u_i16x8(v);
+  // WEBASSEMBLY: call <8 x i16> @llvm.wasm.extadd.pairwise.unsigned.v8i16(
+  // WEBASSEMBLY-SAME: <16 x i8> %v)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i32x4 extadd_pairwise_i16x8_s_i32x4(i16x8 v) {
+  return __builtin_wasm_extadd_pairwise_i16x8_s_i32x4(v);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.extadd.pairwise.signed.v4i32(
+  // WEBASSEMBLY-SAME: <8 x i16> %v)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+u32x4 extadd_pairwise_i16x8_u_i32x4(u16x8 v) {
+  return 

[clang] a787e09 - [WebAssembly] Prototype i64x2.bitmask

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-10-30T17:23:30-07:00
New Revision: a787e0977912d53b7177e5c97e6e465be46285a2

URL: 
https://github.com/llvm/llvm-project/commit/a787e0977912d53b7177e5c97e6e465be46285a2
DIFF: 
https://github.com/llvm/llvm-project/commit/a787e0977912d53b7177e5c97e6e465be46285a2.diff

LOG: [WebAssembly] Prototype i64x2.bitmask

As proposed in https://github.com/WebAssembly/simd/pull/368.

Differential Revision: https://reviews.llvm.org/D90514

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 4f448dfebeef..21a67d8d7bd7 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -154,6 +154,7 @@ TARGET_BUILTIN(__builtin_wasm_all_true_i64x2, "iV2LLi", 
"nc", "unimplemented-sim
 TARGET_BUILTIN(__builtin_wasm_bitmask_i8x16, "iV16Sc", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_bitmask_i16x8, "iV8s", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_bitmask_i32x4, "iV4i", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_bitmask_i64x2, "iV2LLi", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_abs_f32x4, "V4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_abs_f64x2, "V2dV2d", "nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 448eab7bfdfc..a7c07e04b4cd 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16734,7 +16734,8 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
   }
   case WebAssembly::BI__builtin_wasm_bitmask_i8x16:
   case WebAssembly::BI__builtin_wasm_bitmask_i16x8:
-  case WebAssembly::BI__builtin_wasm_bitmask_i32x4: {
+  case WebAssembly::BI__builtin_wasm_bitmask_i32x4:
+  case WebAssembly::BI__builtin_wasm_bitmask_i64x2: {
 Value *Vec = EmitScalarExpr(E->getArg(0));
 Function *Callee =
 CGM.getIntrinsic(Intrinsic::wasm_bitmask, Vec->getType());

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 4a7efaf9716e..a9158878dcc3 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -728,6 +728,12 @@ int bitmask_i32x4(i32x4 x) {
   // WEBASSEMBLY: ret
 }
 
+int bitmask_i64x2(i64x2 x) {
+  return __builtin_wasm_bitmask_i64x2(x);
+  // WEBASSEMBLY: call i32 @llvm.wasm.bitmask.v2i64(<2 x i64> %x)
+  // WEBASSEMBLY: ret
+}
+
 f32x4 abs_f32x4(f32x4 x) {
   return __builtin_wasm_abs_f32x4(x);
   // WEBASSEMBLY: call <4 x float> @llvm.fabs.v4f32(<4 x float> %x)

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td 
b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index 05f4c28e14fc..191cdea0c0ae 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -848,6 +848,7 @@ multiclass SIMDBitmask simdop> {
 defm BITMASK : SIMDBitmask;
 defm BITMASK : SIMDBitmask;
 defm BITMASK : SIMDBitmask;
+defm BITMASK : SIMDBitmask;
 
 
//===--===//
 // Bit shifts

diff  --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll 
b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
index 625ccf58eda4..23a7bfbde927 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
@@ -646,6 +646,16 @@ define i32 @all_v2i64(<2 x i64> %x) {
   ret i32 %a
 }
 
+; CHECK-LABEL: bitmask_v2i64:
+; SIMD128-NEXT: .functype bitmask_v2i64 (v128) -> (i32){{$}}
+; SIMD128-NEXT: i64x2.bitmask $push[[R:[0-9]+]]=, $0{{$}}
+; SIMD128-NEXT: return $pop[[R]]{{$}}
+declare i32 @llvm.wasm.bitmask.v2i64(<2 x i64>)
+define i32 @bitmask_v2i64(<2 x i64> %x) {
+  %a = call i32 @llvm.wasm.bitmask.v2i64(<2 x i64> %x)
+  ret i32 %a
+}
+
 ; CHECK-LABEL: bitselect_v2i64:
 ; SIMD128-NEXT: .functype bitselect_v2i64 (v128, v128, v128) -> (v128){{$}}
 ; SIMD128-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $0, $1, $2{{$}}

diff  --git a/llvm/test/MC/WebAssembly/simd-encodings.s 
b/llvm/test/MC/WebAssembly/simd-encodings.s
index a0560b597864..509f4246475f 100644
--- a/llvm/test/MC/WebAssembly/simd-encodings.s
+++ b/llvm/test/MC/WebAssembly/simd-encodings.s
@@ -523,6 +523,9 @@ main:
 # CHECK: i64x2.all_true # encoding: [0xfd,0xc3,0x01]
 i64x2.all_true
 
+# CHECK: i64x2.bitmask # encoding: [0xfd,0xc4,0x01]
+i64x2.bitmask
+
 # CHECK: i64x2.widen_low_i32x4_s # encoding: [0xfd,0xc7,0x01]
 i64x2.widen_low_i32x4_s
 



___
cfe-commits mailing list

[clang] 0a512a5 - [WebAssembly] Prototype i64x2.eq

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-10-30T16:38:15-07:00
New Revision: 0a512a555a8dbcd00eeaff5aaa14842f8614c2b4

URL: 
https://github.com/llvm/llvm-project/commit/0a512a555a8dbcd00eeaff5aaa14842f8614c2b4
DIFF: 
https://github.com/llvm/llvm-project/commit/0a512a555a8dbcd00eeaff5aaa14842f8614c2b4.diff

LOG: [WebAssembly] Prototype i64x2.eq

As proposed in https://github.com/WebAssembly/simd/pull/381. Since it is still
in the prototyping phase, it is only accessible via a target builtin function
and a target intrinsic.

Depends on D90504.

Differential Revision: https://reviews.llvm.org/D90508

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 5ab05076acd5..4f448dfebeef 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -211,5 +211,7 @@ TARGET_BUILTIN(__builtin_wasm_store16_lane, "vs*V8sIi", 
"n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_store32_lane, "vi*V4iIi", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_store64_lane, "vLLi*V2LLiIi", "n", "simd128")
 
+TARGET_BUILTIN(__builtin_wasm_eq_i64x2, "V2LLiV2LLiV2LLi", "nc", "simd128")
+
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 5979a3daf57c..448eab7bfdfc 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16697,6 +16697,12 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_popcnt);
 return Builder.CreateCall(Callee, {Vec});
   }
+  case WebAssembly::BI__builtin_wasm_eq_i64x2: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_eq);
+return Builder.CreateCall(Callee, {LHS, RHS});
+  }
   case WebAssembly::BI__builtin_wasm_any_true_i8x16:
   case WebAssembly::BI__builtin_wasm_any_true_i16x8:
   case WebAssembly::BI__builtin_wasm_any_true_i32x4:

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 450f50520853..4a7efaf9716e 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -656,6 +656,12 @@ i8x16 popcnt(i8x16 x) {
   // WEBASSEMBLY-NEXT: ret
 }
 
+i64x2 eq_i64x2(i64x2 x, i64x2 y) {
+  return __builtin_wasm_eq_i64x2(x, y);
+  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.eq(<2 x i64> %x, <2 x i64> %y)
+  // WEBASSEMBLY-NEXT: ret
+}
+
 int any_true_i8x16(i8x16 x) {
   return __builtin_wasm_any_true_i8x16(x);
   // WEBASSEMBLY: call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> %x)

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index e7a2ce76f183..2e38bd2d487f 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -294,6 +294,13 @@ def int_wasm_signselect :
 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
 [IntrNoMem, IntrSpeculatable]>;
 
+// TODO: Remove this intrinsic and the associated builtin if i64x2.eq gets
+// merged to the proposal.
+def int_wasm_eq :
+  Intrinsic<[llvm_v2i64_ty],
+[llvm_v2i64_ty, llvm_v2i64_ty],
+[IntrNoMem, IntrSpeculatable]>;
+
 
//===--===//
 // Thread-local storage intrinsics
 
//===--===//

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td 
b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index 7d7e8aa20d93..05f4c28e14fc 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -641,6 +641,14 @@ foreach nodes = [[seteq, EQ_v2f64], [setne, NE_v2f64], 
[setlt, LT_v2f64],
 def : Pat<(v2i64 (nodes[0] (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
   (v2i64 (nodes[1] (v2f64 V128:$lhs), (v2f64 V128:$rhs)))>;
 
+// Prototype i64x2.eq
+defm EQ_v2i64 :
+  SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs), (outs), (ins),
+ [(set (v2i64 V128:$dst),
+   (int_wasm_eq (v2i64 V128:$lhs), (v2i64 V128:$rhs))
+ )],
+ "i64x2.eq\t$dst, $lhs, $rhs", "i64x2.eq", 192>;
+
 
 
//===--===//
 // Bitwise operations

diff  --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll 

[clang] 1cb0b56 - [WebAssembly] Prototype i64x2.widen_{low, high}_i32x4_{s, u}

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-10-30T15:44:04-07:00
New Revision: 1cb0b5660777cb563637ff6bb80722f449ee97eb

URL: 
https://github.com/llvm/llvm-project/commit/1cb0b5660777cb563637ff6bb80722f449ee97eb
DIFF: 
https://github.com/llvm/llvm-project/commit/1cb0b5660777cb563637ff6bb80722f449ee97eb.diff

LOG: [WebAssembly] Prototype i64x2.widen_{low,high}_i32x4_{s,u}

As proposed in https://github.com/WebAssembly/simd/pull/290. As usual, these
instructions are available only via builtin functions and intrinsics while they
are in the prototyping stage.

Differential Revision: https://reviews.llvm.org/D90504

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index c1e594e147b3..5ab05076acd5 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -194,6 +194,11 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, 
"V16UcV8UsV8Us", "nc", "simd
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4UiV4Ui", "nc", 
"simd128")
 
+TARGET_BUILTIN(__builtin_wasm_widen_low_s_i32x4_i64x2, "V2LLiV4i", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i64x2, "V2LLiV4i", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", 
"simd128")
+
 TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "n", "simd128")
 TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "n", "simd128")
 

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 7341a440b873..5979a3daf57c 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16792,6 +16792,29 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(IntNo, {ConvertType(E->getType()), Low->getType()});
 return Builder.CreateCall(Callee, {Low, High});
   }
+  case WebAssembly::BI__builtin_wasm_widen_low_s_i32x4_i64x2:
+  case WebAssembly::BI__builtin_wasm_widen_high_s_i32x4_i64x2:
+  case WebAssembly::BI__builtin_wasm_widen_low_u_i32x4_i64x2:
+  case WebAssembly::BI__builtin_wasm_widen_high_u_i32x4_i64x2: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_widen_low_s_i32x4_i64x2:
+  IntNo = Intrinsic::wasm_widen_low_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_widen_high_s_i32x4_i64x2:
+  IntNo = Intrinsic::wasm_widen_high_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_widen_low_u_i32x4_i64x2:
+  IntNo = Intrinsic::wasm_widen_low_unsigned;
+  break;
+case WebAssembly::BI__builtin_wasm_widen_high_u_i32x4_i64x2:
+  IntNo = Intrinsic::wasm_widen_high_unsigned;
+  break;
+}
+Function *Callee = CGM.getIntrinsic(IntNo);
+return Builder.CreateCall(Callee, Vec);
+  }
   case WebAssembly::BI__builtin_wasm_load32_zero: {
 Value *Ptr = EmitScalarExpr(E->getArg(0));
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load32_zero);

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index e5c7211ad5be..450f50520853 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -918,6 +918,30 @@ u16x8 narrow_u_i16x8_i32x4(u32x4 low, u32x4 high) {
   // WEBASSEMBLY: ret
 }
 
+i64x2 widen_low_s_i32x4_i64x2(i32x4 x) {
+  return __builtin_wasm_widen_low_s_i32x4_i64x2(x);
+  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.widen.low.signed(<4 x i32> %x)
+  // WEBASSEMBLY: ret
+}
+
+i64x2 widen_high_s_i32x4_i64x2(i32x4 x) {
+  return __builtin_wasm_widen_high_s_i32x4_i64x2(x);
+  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.widen.high.signed(<4 x i32> %x)
+  // WEBASSEMBLY: ret
+}
+
+u64x2 widen_low_u_i32x4_i64x2(u32x4 x) {
+  return __builtin_wasm_widen_low_u_i32x4_i64x2(x);
+  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.widen.low.unsigned(<4 x i32> %x)
+  // WEBASSEMBLY: ret
+}
+
+u64x2 widen_high_u_i32x4_i64x2(u32x4 x) {
+  return __builtin_wasm_widen_high_u_i32x4_i64x2(x);
+  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.widen.high.unsigned(<4 x i32> %x)
+  // WEBASSEMBLY: ret
+}
+
 i32x4 load32_zero(int *p) {
   return __builtin_wasm_load32_zero(p);
   // WEBASSEMBLY: call <4 x i32> @llvm.wasm.load32.zero(i32* %p)

diff  --git 

[clang] be6f507 - [WebAssembly] Implement SIMD signselect instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-10-29T11:06:20-07:00
New Revision: be6f50798e79336cdfd8fe464f37d41ac135640d

URL: 
https://github.com/llvm/llvm-project/commit/be6f50798e79336cdfd8fe464f37d41ac135640d
DIFF: 
https://github.com/llvm/llvm-project/commit/be6f50798e79336cdfd8fe464f37d41ac135640d.diff

LOG: [WebAssembly] Implement SIMD signselect instructions

As proposed in https://github.com/WebAssembly/simd/pull/124, using the opcodes
adopted by V8 in
https://chromium-review.googlesource.com/c/v8/v8/+/2486235/2/src/wasm/wasm-opcodes.h.
Uses new builtin functions and a new target intrinsic exclusively to ensure that
the new instructions are only emitted when a user explicitly opts in to using
them since they are still in the prototyping and evaluation phase.

Differential Revision: https://reviews.llvm.org/D90357

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index e86346d71c59..c1e594e147b3 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -134,6 +134,12 @@ TARGET_BUILTIN(__builtin_wasm_extmul_low_i32x4_u_i64x2, 
"V2ULLiV4UiV4Ui", "nc",
 TARGET_BUILTIN(__builtin_wasm_extmul_high_i32x4_u_i64x2, "V2ULLiV4UiV4Ui", 
"nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")
+
+TARGET_BUILTIN(__builtin_wasm_signselect_i8x16, "V16ScV16ScV16ScV16Sc", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_signselect_i16x8, "V8sV8sV8sV8s", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_signselect_i32x4, "V4iV4iV4iV4i", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_signselect_i64x2, "V2LLiV2LLiV2LLiV2LLi", "nc", 
"simd128")
+
 TARGET_BUILTIN(__builtin_wasm_shuffle_v8x16, 
"V16ScV16ScV16ScIiIiIiIiIiIiIiIiIiIiIiIiIiIiIiIi", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_any_true_i8x16, "iV16Sc", "nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index f933113fa883..7341a440b873 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16675,6 +16675,17 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(Intrinsic::wasm_bitselect, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {V1, V2, C});
   }
+  case WebAssembly::BI__builtin_wasm_signselect_i8x16:
+  case WebAssembly::BI__builtin_wasm_signselect_i16x8:
+  case WebAssembly::BI__builtin_wasm_signselect_i32x4:
+  case WebAssembly::BI__builtin_wasm_signselect_i64x2: {
+Value *V1 = EmitScalarExpr(E->getArg(0));
+Value *V2 = EmitScalarExpr(E->getArg(1));
+Value *C = EmitScalarExpr(E->getArg(2));
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_signselect, 
ConvertType(E->getType()));
+return Builder.CreateCall(Callee, {V1, V2, C});
+  }
   case WebAssembly::BI__builtin_wasm_dot_s_i32x4_i16x8: {
 Value *LHS = EmitScalarExpr(E->getArg(0));
 Value *RHS = EmitScalarExpr(E->getArg(1));

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index ee635317ff7a..e5c7211ad5be 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -622,6 +622,34 @@ i32x4 bitselect(i32x4 x, i32x4 y, i32x4 c) {
   // WEBASSEMBLY-NEXT: ret
 }
 
+i8x16 signselect_i8x16(i8x16 x, i8x16 y, i8x16 c) {
+  return __builtin_wasm_signselect_i8x16(x, y, c);
+  // WEBASSEMBLY: call <16 x i8> @llvm.wasm.signselect.v16i8(
+  // WEBASSEMBLY-SAME: <16 x i8> %x, <16 x i8> %y, <16 x i8> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i16x8 signselect_i16x8(i16x8 x, i16x8 y, i16x8 c) {
+  return __builtin_wasm_signselect_i16x8(x, y, c);
+  // WEBASSEMBLY: call <8 x i16> @llvm.wasm.signselect.v8i16(
+  // WEBASSEMBLY-SAME: <8 x i16> %x, <8 x i16> %y, <8 x i16> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i32x4 signselect_i32x4(i32x4 x, i32x4 y, i32x4 c) {
+  return __builtin_wasm_signselect_i32x4(x, y, c);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.signselect.v4i32(
+  // WEBASSEMBLY-SAME: <4 x i32> %x, <4 x i32> %y, <4 x i32> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i64x2 signselect_i64x2(i64x2 x, i64x2 y, i64x2 c) {
+  return __builtin_wasm_signselect_i64x2(x, y, c);
+  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.signselect.v2i64(
+  // WEBASSEMBLY-SAME: <2 x i64> %x, <2 x i64> %y, <2 x i64> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
 i8x16 popcnt(i8x16 x) {
   return __builtin_wasm_popcnt_i8x16(x);
   // WEBASSEMBLY: call <16 x i8> @llvm.wasm.popcnt(<16 x i8> %x)

[clang] 5b464f2 - [WebAssembly] Fix incorrectly named target builtin

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-10-28T10:22:43-07:00
New Revision: 5b464f2aa514903cad2f2160dd613b74b0cee3da

URL: 
https://github.com/llvm/llvm-project/commit/5b464f2aa514903cad2f2160dd613b74b0cee3da
DIFF: 
https://github.com/llvm/llvm-project/commit/5b464f2aa514903cad2f2160dd613b74b0cee3da.diff

LOG: [WebAssembly] Fix incorrectly named target builtin

Rename __builtin_wasm_q15mulr_saturate_s_i8x16 to
__builtin_wasm_q15mulr_saturate_s_i16x8, fixing the implied lane interpretation
of the result.

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 1ee978101095..e86346d71c59 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -116,7 +116,7 @@ TARGET_BUILTIN(__builtin_wasm_avgr_u_i16x8, "V8UsV8UsV8Us", 
"nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_popcnt_i8x16, "V16ScV16Sc", "nc", "simd128")
 
-TARGET_BUILTIN(__builtin_wasm_q15mulr_saturate_s_i8x16, "V8sV8sV8s", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_q15mulr_saturate_s_i16x8, "V8sV8sV8s", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_extmul_low_i8x16_s_i16x8, "V8sV16ScV16Sc", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_extmul_high_i8x16_s_i16x8, "V8sV16ScV16Sc", 
"nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index fbfd56fac849..6f7505b7b5c2 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16593,7 +16593,7 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
-  case WebAssembly::BI__builtin_wasm_q15mulr_saturate_s_i8x16: {
+  case WebAssembly::BI__builtin_wasm_q15mulr_saturate_s_i16x8: {
 Value *LHS = EmitScalarExpr(E->getArg(0));
 Value *RHS = EmitScalarExpr(E->getArg(1));
 Function *Callee =

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index be61e9e4c86e..ee635317ff7a 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -519,7 +519,7 @@ u16x8 avgr_u_i16x8(u16x8 x, u16x8 y) {
 }
 
 i16x8 q15mulr_saturate_s_i16x8(i16x8 x, i16x8 y) {
-  return __builtin_wasm_q15mulr_saturate_s_i8x16(x, y);
+  return __builtin_wasm_q15mulr_saturate_s_i16x8(x, y);
   // WEBASSEMBLY: call <8 x i16> @llvm.wasm.q15mulr.saturate.signed(
   // WEBASSEMBLY-SAME: <8 x i16> %x, <8 x i16> %y)
   // WEBASSEMBLY-NEXT: ret



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[clang] 31e9445 - [WebAssembly] Prototype extending multiplication SIMD instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-10-28T09:38:59-07:00
New Revision: 31e944556f5464b5a488c42f1d727d5b27734169

URL: 
https://github.com/llvm/llvm-project/commit/31e944556f5464b5a488c42f1d727d5b27734169
DIFF: 
https://github.com/llvm/llvm-project/commit/31e944556f5464b5a488c42f1d727d5b27734169.diff

LOG: [WebAssembly] Prototype extending multiplication SIMD instructions

As proposed in https://github.com/WebAssembly/simd/pull/376. This commit
implements new builtin functions and intrinsics for these instructions, but does
not yet add them to wasm_simd128.h because they have not yet been merged to the
proposal. These are the first instructions with opcodes greater than 0xff, so
this commit updates the MC layer and disassembler to handle that correctly.

Differential Revision: https://reviews.llvm.org/D90253

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s
llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index f84ce92ffe7e..1ee978101095 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -118,6 +118,21 @@ TARGET_BUILTIN(__builtin_wasm_popcnt_i8x16, "V16ScV16Sc", 
"nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_q15mulr_saturate_s_i8x16, "V8sV8sV8s", "nc", 
"simd128")
 
+TARGET_BUILTIN(__builtin_wasm_extmul_low_i8x16_s_i16x8, "V8sV16ScV16Sc", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extmul_high_i8x16_s_i16x8, "V8sV16ScV16Sc", 
"nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_extmul_low_i8x16_u_i16x8, "V8UsV16UcV16Uc", 
"nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_extmul_high_i8x16_u_i16x8, "V8UsV16UcV16Uc", 
"nc", "simd128")
+
+TARGET_BUILTIN(__builtin_wasm_extmul_low_i16x8_s_i32x4, "V4iV8sV8s", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extmul_high_i16x8_s_i32x4, "V4iV8sV8s", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extmul_low_i16x8_u_i32x4, "V4UiV8UsV8Us", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extmul_high_i16x8_u_i32x4, "V4UiV8UsV8Us", "nc", 
"simd128")
+
+TARGET_BUILTIN(__builtin_wasm_extmul_low_i32x4_s_i64x2, "V2LLiV4iV4i", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extmul_high_i32x4_s_i64x2, "V2LLiV4iV4i", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_extmul_low_i32x4_u_i64x2, "V2ULLiV4UiV4Ui", 
"nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_extmul_high_i32x4_u_i64x2, "V2ULLiV4UiV4Ui", 
"nc", "simd128")
+
 TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_shuffle_v8x16, 
"V16ScV16ScV16ScIiIiIiIiIiIiIiIiIiIiIiIiIiIiIiIi", "nc", "simd128")
 

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index ae3645df183d..e38964356542 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16600,6 +16600,49 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(Intrinsic::wasm_q15mulr_saturate_signed);
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_extmul_low_i8x16_s_i16x8:
+  case WebAssembly::BI__builtin_wasm_extmul_high_i8x16_s_i16x8:
+  case WebAssembly::BI__builtin_wasm_extmul_low_i8x16_u_i16x8:
+  case WebAssembly::BI__builtin_wasm_extmul_high_i8x16_u_i16x8:
+  case WebAssembly::BI__builtin_wasm_extmul_low_i16x8_s_i32x4:
+  case WebAssembly::BI__builtin_wasm_extmul_high_i16x8_s_i32x4:
+  case WebAssembly::BI__builtin_wasm_extmul_low_i16x8_u_i32x4:
+  case WebAssembly::BI__builtin_wasm_extmul_high_i16x8_u_i32x4:
+  case WebAssembly::BI__builtin_wasm_extmul_low_i32x4_s_i64x2:
+  case WebAssembly::BI__builtin_wasm_extmul_high_i32x4_s_i64x2:
+  case WebAssembly::BI__builtin_wasm_extmul_low_i32x4_u_i64x2:
+  case WebAssembly::BI__builtin_wasm_extmul_high_i32x4_u_i64x2: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_extmul_low_i8x16_s_i16x8:
+case WebAssembly::BI__builtin_wasm_extmul_low_i16x8_s_i32x4:
+case WebAssembly::BI__builtin_wasm_extmul_low_i32x4_s_i64x2:
+  IntNo = Intrinsic::wasm_extmul_low_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_extmul_low_i8x16_u_i16x8:
+case WebAssembly::BI__builtin_wasm_extmul_low_i16x8_u_i32x4:
+case WebAssembly::BI__builtin_wasm_extmul_low_i32x4_u_i64x2:
+  IntNo = 

[clang] 1992e30 - [WebAssembly] Prototype i8x16.popcnt

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-10-15T21:18:22Z
New Revision: 1992e30c2d751f6f1f6ad5190f84e37dece04f7f

URL: 
https://github.com/llvm/llvm-project/commit/1992e30c2d751f6f1f6ad5190f84e37dece04f7f
DIFF: 
https://github.com/llvm/llvm-project/commit/1992e30c2d751f6f1f6ad5190f84e37dece04f7f.diff

LOG: [WebAssembly] Prototype i8x16.popcnt

As proposed at https://github.com/WebAssembly/simd/pull/379. Use a target
builtin and intrinsic rather than normal codegen patterns to make the
instruction opt-in until it is merged to the proposal and stabilized in engines.

Differential Revision: https://reviews.llvm.org/D89446

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 86348ff5fea7..f84ce92ffe7e 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -114,6 +114,8 @@ TARGET_BUILTIN(__builtin_wasm_max_u_i32x4, "V4UiV4UiV4Ui", 
"nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_avgr_u_i8x16, "V16UcV16UcV16Uc", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_avgr_u_i16x8, "V8UsV8UsV8Us", "nc", "simd128")
 
+TARGET_BUILTIN(__builtin_wasm_popcnt_i8x16, "V16ScV16Sc", "nc", "simd128")
+
 TARGET_BUILTIN(__builtin_wasm_q15mulr_saturate_s_i8x16, "V8sV8sV8s", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 3f6977e16c4a..884fa1103163 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16606,6 +16606,11 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_dot);
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_popcnt_i8x16: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_popcnt);
+return Builder.CreateCall(Callee, {Vec});
+  }
   case WebAssembly::BI__builtin_wasm_any_true_i8x16:
   case WebAssembly::BI__builtin_wasm_any_true_i16x8:
   case WebAssembly::BI__builtin_wasm_any_true_i32x4:

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index d7e998fb997b..4b882700e3ac 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -538,6 +538,12 @@ i32x4 bitselect(i32x4 x, i32x4 y, i32x4 c) {
   // WEBASSEMBLY-NEXT: ret
 }
 
+i8x16 popcnt(i8x16 x) {
+  return __builtin_wasm_popcnt_i8x16(x);
+  // WEBASSEMBLY: call <16 x i8> @llvm.wasm.popcnt(<16 x i8> %x)
+  // WEBASSEMBLY-NEXT: ret
+}
+
 int any_true_i8x16(i8x16 x) {
   return __builtin_wasm_any_true_i8x16(x);
   // WEBASSEMBLY: call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> %x)

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index 8298312491fa..7a701ec0e269 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -254,6 +254,11 @@ def int_wasm_store64_lane :
 [IntrWriteMem, IntrArgMemOnly],
 "", [SDNPMemOperand]>;
 
+// TODO: Replace this intrinsic with normal ISel patterns once popcnt is merged
+// to the proposal.
+def int_wasm_popcnt :
+  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem, IntrSpeculatable]>;
+
 
//===--===//
 // Thread-local storage intrinsics
 
//===--===//

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td 
b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index ad3a756dc55b..5d72def798fd 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -785,6 +785,9 @@ defm ANYTRUE : SIMDReduce;
 // All lanes true: all_true
 defm ALLTRUE : SIMDReduce;
 
+// Population count: popcnt
+defm POPCNT : SIMDUnary;
+
 // Reductions already return 0 or 1, so and 1, setne 0, and seteq 1
 // can be folded out
 foreach reduction =

diff  --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll 
b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
index 39b59227a8be..7c0f43d2c67f 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
@@ -75,6 +75,16 @@ define <16 x i8> @avgr_u_v16i8(<16 x i8> %x, <16 x i8> %y) {
   ret <16 x i8> %a
 }
 
+; CHECK-LABEL: 

[clang] 3f738d1 - Reland "[WebAssembly] v128.load{8,16,32,64}_lane instructions"

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-10-15T19:32:34Z
New Revision: 3f738d1f5e2d657993a51ca3fe56585268025d89

URL: 
https://github.com/llvm/llvm-project/commit/3f738d1f5e2d657993a51ca3fe56585268025d89
DIFF: 
https://github.com/llvm/llvm-project/commit/3f738d1f5e2d657993a51ca3fe56585268025d89.diff

LOG: Reland "[WebAssembly] v128.load{8,16,32,64}_lane instructions"

This reverts commit 7c8385a352ba21cb388046290d93b53dc273cd9f with a typing fix
to an instruction selection pattern.

Added: 
llvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll

Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 45e194c283b6..86348ff5fea7 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -171,8 +171,17 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, 
"V16UcV8UsV8Us", "nc", "simd
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4UiV4Ui", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "nU", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "nU", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "n", "simd128")
+
+TARGET_BUILTIN(__builtin_wasm_load8_lane, "V16ScSc*V16ScIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load16_lane, "V8ss*V8sIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load32_lane, "V4ii*V4iIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load64_lane, "V2LLiLLi*V2LLiIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_store8_lane, "vSc*V16ScIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_store16_lane, "vs*V8sIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_store32_lane, "vi*V4iIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_store64_lane, "vLLi*V2LLiIi", "n", "simd128")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 157dae2831f2..3f6977e16c4a 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16711,6 +16711,52 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load64_zero);
 return Builder.CreateCall(Callee, {Ptr});
   }
+  case WebAssembly::BI__builtin_wasm_load8_lane:
+  case WebAssembly::BI__builtin_wasm_load16_lane:
+  case WebAssembly::BI__builtin_wasm_load32_lane:
+  case WebAssembly::BI__builtin_wasm_load64_lane:
+  case WebAssembly::BI__builtin_wasm_store8_lane:
+  case WebAssembly::BI__builtin_wasm_store16_lane:
+  case WebAssembly::BI__builtin_wasm_store32_lane:
+  case WebAssembly::BI__builtin_wasm_store64_lane: {
+Value *Ptr = EmitScalarExpr(E->getArg(0));
+Value *Vec = EmitScalarExpr(E->getArg(1));
+Optional LaneIdxConst =
+E->getArg(2)->getIntegerConstantExpr(getContext());
+assert(LaneIdxConst && "Constant arg isn't actually constant?");
+Value *LaneIdx = llvm::ConstantInt::get(getLLVMContext(), *LaneIdxConst);
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_load8_lane:
+  IntNo = Intrinsic::wasm_load8_lane;
+  break;
+case WebAssembly::BI__builtin_wasm_load16_lane:
+  IntNo = Intrinsic::wasm_load16_lane;
+  break;
+case WebAssembly::BI__builtin_wasm_load32_lane:
+  IntNo = Intrinsic::wasm_load32_lane;
+  break;
+case WebAssembly::BI__builtin_wasm_load64_lane:
+  IntNo = Intrinsic::wasm_load64_lane;
+  break;
+case WebAssembly::BI__builtin_wasm_store8_lane:
+  IntNo = Intrinsic::wasm_store8_lane;
+  break;
+case WebAssembly::BI__builtin_wasm_store16_lane:
+  IntNo = Intrinsic::wasm_store16_lane;
+  break;
+case WebAssembly::BI__builtin_wasm_store32_lane:
+  IntNo = Intrinsic::wasm_store32_lane;
+  break;
+case WebAssembly::BI__builtin_wasm_store64_lane:
+  IntNo = Intrinsic::wasm_store64_lane;
+  break;
+default:
+  llvm_unreachable("unexpected builtin ID");
+}
+Function *Callee = CGM.getIntrinsic(IntNo);
+return Builder.CreateCall(Callee, {Ptr, Vec, LaneIdx});
+  }
   case WebAssembly::BI__builtin_wasm_shuffle_v8x16: {
 Value *Ops[18];
 size_t OpIdx 

[clang] 7c8385a - Revert "[WebAssembly] v128.load{8,16,32,64}_lane instructions"

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-10-15T15:49:36Z
New Revision: 7c8385a352ba21cb388046290d93b53dc273cd9f

URL: 
https://github.com/llvm/llvm-project/commit/7c8385a352ba21cb388046290d93b53dc273cd9f
DIFF: 
https://github.com/llvm/llvm-project/commit/7c8385a352ba21cb388046290d93b53dc273cd9f.diff

LOG: Revert "[WebAssembly] v128.load{8,16,32,64}_lane instructions"

This reverts commit 7c6bfd90ab2ddaa60de62878c8512db0645e8452.

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 
llvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll



diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 86348ff5fea7..45e194c283b6 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -171,17 +171,8 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, 
"V16UcV8UsV8Us", "nc", "simd
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4UiV4Ui", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "n", "simd128")
-
-TARGET_BUILTIN(__builtin_wasm_load8_lane, "V16ScSc*V16ScIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load16_lane, "V8ss*V8sIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load32_lane, "V4ii*V4iIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load64_lane, "V2LLiLLi*V2LLiIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_store8_lane, "vSc*V16ScIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_store16_lane, "vs*V8sIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_store32_lane, "vi*V4iIi", "n", "simd128")
-TARGET_BUILTIN(__builtin_wasm_store64_lane, "vLLi*V2LLiIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "nU", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "nU", "simd128")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 3f6977e16c4a..157dae2831f2 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16711,52 +16711,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load64_zero);
 return Builder.CreateCall(Callee, {Ptr});
   }
-  case WebAssembly::BI__builtin_wasm_load8_lane:
-  case WebAssembly::BI__builtin_wasm_load16_lane:
-  case WebAssembly::BI__builtin_wasm_load32_lane:
-  case WebAssembly::BI__builtin_wasm_load64_lane:
-  case WebAssembly::BI__builtin_wasm_store8_lane:
-  case WebAssembly::BI__builtin_wasm_store16_lane:
-  case WebAssembly::BI__builtin_wasm_store32_lane:
-  case WebAssembly::BI__builtin_wasm_store64_lane: {
-Value *Ptr = EmitScalarExpr(E->getArg(0));
-Value *Vec = EmitScalarExpr(E->getArg(1));
-Optional LaneIdxConst =
-E->getArg(2)->getIntegerConstantExpr(getContext());
-assert(LaneIdxConst && "Constant arg isn't actually constant?");
-Value *LaneIdx = llvm::ConstantInt::get(getLLVMContext(), *LaneIdxConst);
-unsigned IntNo;
-switch (BuiltinID) {
-case WebAssembly::BI__builtin_wasm_load8_lane:
-  IntNo = Intrinsic::wasm_load8_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_load16_lane:
-  IntNo = Intrinsic::wasm_load16_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_load32_lane:
-  IntNo = Intrinsic::wasm_load32_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_load64_lane:
-  IntNo = Intrinsic::wasm_load64_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_store8_lane:
-  IntNo = Intrinsic::wasm_store8_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_store16_lane:
-  IntNo = Intrinsic::wasm_store16_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_store32_lane:
-  IntNo = Intrinsic::wasm_store32_lane;
-  break;
-case WebAssembly::BI__builtin_wasm_store64_lane:
-  IntNo = Intrinsic::wasm_store64_lane;
-  break;
-default:
-  llvm_unreachable("unexpected builtin ID");
-}
-Function *Callee = CGM.getIntrinsic(IntNo);
-return Builder.CreateCall(Callee, {Ptr, Vec, LaneIdx});
-  }
   case WebAssembly::BI__builtin_wasm_shuffle_v8x16: {
 Value *Ops[18];
 size_t OpIdx = 0;

diff  --git 

[clang] 7c6bfd9 - [WebAssembly] v128.load{8, 16, 32, 64}_lane instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-10-15T15:33:10Z
New Revision: 7c6bfd90ab2ddaa60de62878c8512db0645e8452

URL: 
https://github.com/llvm/llvm-project/commit/7c6bfd90ab2ddaa60de62878c8512db0645e8452
DIFF: 
https://github.com/llvm/llvm-project/commit/7c6bfd90ab2ddaa60de62878c8512db0645e8452.diff

LOG: [WebAssembly] v128.load{8,16,32,64}_lane instructions

Prototype the newly proposed load_lane instructions, as specified in
https://github.com/WebAssembly/simd/pull/350. Since these instructions are not
available to origin trial users on Chrome stable, make them opt-in by only
selecting them from intrinsics rather than normal ISel patterns. Since we only
need rough prototypes to measure performance right now, this commit does not
implement all the load and store patterns that would be necessary to make full
use of the offset immediate. However, the full suite of offset tests is included
to make it easy to track improvements in the future.

Since these are the first instructions to have a memarg immediate as well as an
additional immediate, the disassembler needed some additional hacks to be able
to parse them correctly. Making that code more principled is left as future
work.

Differential Revision: https://reviews.llvm.org/D89366

Added: 
llvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll

Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 45e194c283b6..86348ff5fea7 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -171,8 +171,17 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, 
"V16UcV8UsV8Us", "nc", "simd
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4UiV4Ui", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "nU", "simd128")
-TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "nU", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "n", "simd128")
+
+TARGET_BUILTIN(__builtin_wasm_load8_lane, "V16ScSc*V16ScIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load16_lane, "V8ss*V8sIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load32_lane, "V4ii*V4iIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load64_lane, "V2LLiLLi*V2LLiIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_store8_lane, "vSc*V16ScIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_store16_lane, "vs*V8sIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_store32_lane, "vi*V4iIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_store64_lane, "vLLi*V2LLiIi", "n", "simd128")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 157dae2831f2..3f6977e16c4a 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16711,6 +16711,52 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load64_zero);
 return Builder.CreateCall(Callee, {Ptr});
   }
+  case WebAssembly::BI__builtin_wasm_load8_lane:
+  case WebAssembly::BI__builtin_wasm_load16_lane:
+  case WebAssembly::BI__builtin_wasm_load32_lane:
+  case WebAssembly::BI__builtin_wasm_load64_lane:
+  case WebAssembly::BI__builtin_wasm_store8_lane:
+  case WebAssembly::BI__builtin_wasm_store16_lane:
+  case WebAssembly::BI__builtin_wasm_store32_lane:
+  case WebAssembly::BI__builtin_wasm_store64_lane: {
+Value *Ptr = EmitScalarExpr(E->getArg(0));
+Value *Vec = EmitScalarExpr(E->getArg(1));
+Optional LaneIdxConst =
+E->getArg(2)->getIntegerConstantExpr(getContext());
+assert(LaneIdxConst && "Constant arg isn't actually constant?");
+Value *LaneIdx = llvm::ConstantInt::get(getLLVMContext(), *LaneIdxConst);
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_load8_lane:
+  IntNo = Intrinsic::wasm_load8_lane;
+  break;
+case WebAssembly::BI__builtin_wasm_load16_lane:
+  IntNo = Intrinsic::wasm_load16_lane;
+  break;
+case WebAssembly::BI__builtin_wasm_load32_lane:
+  IntNo = Intrinsic::wasm_load32_lane;
+  break;
+case WebAssembly::BI__builtin_wasm_load64_lane:
+  IntNo = 

[clang] d8f58bf - [WebAssembly] Prototype i16x8.q15mulr_sat_s

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-10-09T21:17:53Z
New Revision: d8f58bf53a98574ef14568fd830edac5d1fb37f3

URL: 
https://github.com/llvm/llvm-project/commit/d8f58bf53a98574ef14568fd830edac5d1fb37f3
DIFF: 
https://github.com/llvm/llvm-project/commit/d8f58bf53a98574ef14568fd830edac5d1fb37f3.diff

LOG: [WebAssembly] Prototype i16x8.q15mulr_sat_s

This saturating, rounding, Q-format multiplication instruction is proposed in
https://github.com/WebAssembly/simd/pull/365.

Differential Revision: https://reviews.llvm.org/D88968

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index c0ac74686cf1..45e194c283b6 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -114,6 +114,8 @@ TARGET_BUILTIN(__builtin_wasm_max_u_i32x4, "V4UiV4UiV4Ui", 
"nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_avgr_u_i8x16, "V16UcV16UcV16Uc", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_avgr_u_i16x8, "V8UsV8UsV8Us", "nc", "simd128")
 
+TARGET_BUILTIN(__builtin_wasm_q15mulr_saturate_s_i8x16, "V8sV8sV8s", "nc", 
"simd128")
+
 TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_shuffle_v8x16, 
"V16ScV16ScV16ScIiIiIiIiIiIiIiIiIiIiIiIiIiIiIiIi", "nc", "simd128")
 

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index dc3cafa5d062..e8c64bf0f351 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16545,6 +16545,13 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_q15mulr_saturate_s_i8x16: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_q15mulr_saturate_signed);
+return Builder.CreateCall(Callee, {LHS, RHS});
+  }
   case WebAssembly::BI__builtin_wasm_bitselect: {
 Value *V1 = EmitScalarExpr(E->getArg(0));
 Value *V2 = EmitScalarExpr(E->getArg(1));

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 01e9273e0fb6..85777491fc28 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -462,6 +462,13 @@ u16x8 avgr_u_i16x8(u16x8 x, u16x8 y) {
   // WEBASSEMBLY-NEXT: ret
 }
 
+i16x8 q15mulr_saturate_s_i16x8(i16x8 x, i16x8 y) {
+  return __builtin_wasm_q15mulr_saturate_s_i8x16(x, y);
+  // WEBASSEMBLY: call <8 x i16> @llvm.wasm.q15mulr.saturate.signed(
+  // WEBASSEMBLY-SAME: <8 x i16> %x, <8 x i16> %y)
+  // WEBASSEMBLY-NEXT: ret
+}
+
 i32x4 dot_i16x8_s(i16x8 x, i16x8 y) {
   return __builtin_wasm_dot_s_i32x4_i16x8(x, y);
   // WEBASSEMBLY: call <4 x i32> @llvm.wasm.dot(<8 x i16> %x, <8 x i16> %y)

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index 627a579ae506..a7d86e2d2ce6 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -159,6 +159,10 @@ def int_wasm_narrow_unsigned :
   Intrinsic<[llvm_anyvector_ty],
 [llvm_anyvector_ty, LLVMMatchType<1>],
 [IntrNoMem, IntrSpeculatable]>;
+def int_wasm_q15mulr_saturate_signed :
+  Intrinsic<[llvm_v8i16_ty],
+[llvm_v8i16_ty, llvm_v8i16_ty],
+[IntrNoMem, IntrSpeculatable]>;
 
 // TODO: Replace these intrinsics with normal ISel patterns
 def int_wasm_pmin :

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td 
b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index cd088751bc8a..544eed544153 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -1093,3 +1093,11 @@ multiclass SIMDQFM 
simdopA,
 
 defm "" : SIMDQFM;
 defm "" : SIMDQFM;
+
+//===--===//
+// Saturating Rounding Q-Format Multiplication
+//===--===//
+
+defm Q15MULR_SAT_S :
+  SIMDBinary;

diff  --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll 
b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
index 63092a8c5178..39b59227a8be 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
@@ -228,6 +228,17 @@ 

[clang] f496950 - [WebAssembly] Fix types in wasm_simd128.h and add tests

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-08-05T14:00:01-07:00
New Revision: f496950001c47724867912d863858db0a81b4309

URL: 
https://github.com/llvm/llvm-project/commit/f496950001c47724867912d863858db0a81b4309
DIFF: 
https://github.com/llvm/llvm-project/commit/f496950001c47724867912d863858db0a81b4309.diff

LOG: [WebAssembly] Fix types in wasm_simd128.h and add tests

47f7174ffa changed the types used in the Wasm SIMD builtin functions,
but not all of their uses in wasm_simd128.h were updated. This commit
fixes wasm_simd128.h and adds tests to make sure similar problems do
not pass uncaught in the future.

Differential Revision: https://reviews.llvm.org/D85347

Added: 
clang/test/Headers/wasm.c
clang/test/Headers/wasm.cpp

Modified: 
clang/lib/Headers/wasm_simd128.h

Removed: 




diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index b15264607d93..ac88516ac924 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -279,7 +279,7 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_i8x16_splat(int8_t __a) {
   (__builtin_wasm_extract_lane_s_i8x16((__i8x16)(__a), __i))
 
 #define wasm_u8x16_extract_lane(__a, __i)  
\
-  (__builtin_wasm_extract_lane_u_i8x16((__i8x16)(__a), __i))
+  (__builtin_wasm_extract_lane_u_i8x16((__u8x16)(__a), __i))
 
 #define wasm_i8x16_replace_lane(__a, __i, __b) 
\
   ((v128_t)__builtin_wasm_replace_lane_i8x16((__i8x16)(__a), __i, __b))
@@ -292,7 +292,7 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_i16x8_splat(int16_t __a) {
   (__builtin_wasm_extract_lane_s_i16x8((__i16x8)(__a), __i))
 
 #define wasm_u16x8_extract_lane(__a, __i)  
\
-  (__builtin_wasm_extract_lane_u_i16x8((__i16x8)(__a), __i))
+  (__builtin_wasm_extract_lane_u_i16x8((__u16x8)(__a), __i))
 
 #define wasm_i16x8_replace_lane(__a, __i, __b) 
\
   ((v128_t)__builtin_wasm_replace_lane_i16x8((__i16x8)(__a), __i, __b))
@@ -622,8 +622,8 @@ wasm_i8x16_add_saturate(v128_t __a, v128_t __b) {
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS
 wasm_u8x16_add_saturate(v128_t __a, v128_t __b) {
-  return (v128_t)__builtin_wasm_add_saturate_u_i8x16((__i8x16)__a,
- (__i8x16)__b);
+  return (v128_t)__builtin_wasm_add_saturate_u_i8x16((__u8x16)__a,
+ (__u8x16)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_sub(v128_t __a,
@@ -639,8 +639,8 @@ wasm_i8x16_sub_saturate(v128_t __a, v128_t __b) {
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS
 wasm_u8x16_sub_saturate(v128_t __a, v128_t __b) {
-  return (v128_t)__builtin_wasm_sub_saturate_u_i8x16((__i8x16)__a,
- (__i8x16)__b);
+  return (v128_t)__builtin_wasm_sub_saturate_u_i8x16((__u8x16)__a,
+ (__u8x16)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_min(v128_t __a,
@@ -650,7 +650,7 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_i8x16_min(v128_t __a,
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_min(v128_t __a,
v128_t __b) {
-  return (v128_t)__builtin_wasm_min_u_i8x16((__i8x16)__a, (__i8x16)__b);
+  return (v128_t)__builtin_wasm_min_u_i8x16((__u8x16)__a, (__u8x16)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_max(v128_t __a,
@@ -660,12 +660,12 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_i8x16_max(v128_t __a,
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_max(v128_t __a,
v128_t __b) {
-  return (v128_t)__builtin_wasm_max_u_i8x16((__i8x16)__a, (__i8x16)__b);
+  return (v128_t)__builtin_wasm_max_u_i8x16((__u8x16)__a, (__u8x16)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_avgr(v128_t __a,
 v128_t __b) {
-  return (v128_t)__builtin_wasm_avgr_u_i8x16((__i8x16)__a, (__i8x16)__b);
+  return (v128_t)__builtin_wasm_avgr_u_i8x16((__u8x16)__a, (__u8x16)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_abs(v128_t __a) {
@@ -712,8 +712,8 @@ wasm_i16x8_add_saturate(v128_t __a, v128_t __b) {
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS
 wasm_u16x8_add_saturate(v128_t __a, v128_t __b) {
-  return (v128_t)__builtin_wasm_add_saturate_u_i16x8((__i16x8)__a,
- (__i16x8)__b);
+  return (v128_t)__builtin_wasm_add_saturate_u_i16x8((__u16x8)__a,
+ (__u16x8)__b);
 }
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_sub(v128_t __a,
@@ -729,8 +729,8 @@ wasm_i16x8_sub_saturate(v128_t __a, v128_t __b) {
 
 

[clang] cb32792 - [WebAssembly] Implement prototype v128.load{32,64}_zero instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-08-03T13:54:00-07:00
New Revision: cb327922101b28ea70ec68d7f026da0e5e388eed

URL: 
https://github.com/llvm/llvm-project/commit/cb327922101b28ea70ec68d7f026da0e5e388eed
DIFF: 
https://github.com/llvm/llvm-project/commit/cb327922101b28ea70ec68d7f026da0e5e388eed.diff

LOG: [WebAssembly] Implement prototype v128.load{32,64}_zero instructions

Specified in https://github.com/WebAssembly/simd/pull/237, these
instructions load the first vector lane from memory and zero the other
lanes. Since these instructions are not officially part of the SIMD
proposal, they are only available on an opt-in basis via LLVM
intrinsics and clang builtin functions. If these instructions are
merged to the proposal, this implementation will change so that the
instructions will be generated from normal IR. At that point the
intrinsics and builtin functions would be removed.

This PR also changes the opcodes for the experimental f32x4.qfm{a,s}
instructions because their opcodes conflicted with those of the
v128.load{32,64}_zero instructions. The new opcodes were chosen to
match those used in V8.

Differential Revision: https://reviews.llvm.org/D84820

Added: 
llvm/test/CodeGen/WebAssembly/simd-load-zero-offset.ll

Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index d0f40f991a4c..39f29740cf56 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -169,5 +169,8 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, 
"V16cV8sV8s", "nc", "simd128
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
 
+TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "nU", "simd128")
+TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "nU", "simd128")
+
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 042b41a09f19..2ef164b8b65a 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16497,6 +16497,16 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(IntNo, {ConvertType(E->getType()), Low->getType()});
 return Builder.CreateCall(Callee, {Low, High});
   }
+  case WebAssembly::BI__builtin_wasm_load32_zero: {
+Value *Ptr = EmitScalarExpr(E->getArg(0));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load32_zero);
+return Builder.CreateCall(Callee, {Ptr});
+  }
+  case WebAssembly::BI__builtin_wasm_load64_zero: {
+Value *Ptr = EmitScalarExpr(E->getArg(0));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load64_zero);
+return Builder.CreateCall(Callee, {Ptr});
+  }
   case WebAssembly::BI__builtin_wasm_shuffle_v8x16: {
 Value *Ops[18];
 size_t OpIdx = 0;

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 0f66fceef4cc..14e0d0ac65ed 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -737,6 +737,18 @@ i16x8 narrow_u_i16x8_i32x4(i32x4 low, i32x4 high) {
   // WEBASSEMBLY: ret
 }
 
+i32x4 load32_zero(int *p) {
+  return __builtin_wasm_load32_zero(p);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.load32.zero(i32* %p)
+  // WEBASSEMBLY: ret
+}
+
+i64x2 load64_zero(long long *p) {
+  return __builtin_wasm_load64_zero(p);
+  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.load64.zero(i64* %p)
+  // WEBASSEMBLY: ret
+}
+
 i8x16 swizzle_v8x16(i8x16 x, i8x16 y) {
   return __builtin_wasm_swizzle_v8x16(x, y);
   // WEBASSEMBLY: call <16 x i8> @llvm.wasm.swizzle(<16 x i8> %x, <16 x i8> %y)

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index 9cc9f9eb6f18..627a579ae506 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -190,6 +190,20 @@ def int_wasm_nearest :
 [LLVMMatchType<0>],
 [IntrNoMem, IntrSpeculatable]>;
 
+// TODO: Replace these intrinsic with normal ISel patterns once the
+// load_zero instructions are merged to the proposal.
+def int_wasm_load32_zero :
+  Intrinsic<[llvm_v4i32_ty],
+[LLVMPointerType],
+[IntrReadMem, IntrArgMemOnly],
+ "", 

[clang] 11bb7ee - [WebAssembly] Remove intrinsics for SIMD widening ops

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-07-28T18:25:55-07:00
New Revision: 11bb7eef4152cab895983f19e638f0cfdf8a580f

URL: 
https://github.com/llvm/llvm-project/commit/11bb7eef4152cab895983f19e638f0cfdf8a580f
DIFF: 
https://github.com/llvm/llvm-project/commit/11bb7eef4152cab895983f19e638f0cfdf8a580f.diff

LOG: [WebAssembly] Remove intrinsics for SIMD widening ops

Instead, pattern match extends of extract_subvectors to generate
widening operations. Since extract_subvector is not a legal node, this
is implemented via a custom combine that recognizes extract_subvector
nodes before they are legalized. The combine produces custom ISD nodes
that are later pattern matched directly, just like the intrinsic was.

Also removes the clang builtins for these operations since the
instructions can now be generated from portable code sequences.

Differential Revision: https://reviews.llvm.org/D84556

Added: 
llvm/test/CodeGen/WebAssembly/simd-widening.ll

Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISD.def
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index ecee7782920f..d0f40f991a4c 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -169,14 +169,5 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, 
"V16cV8sV8s", "nc", "simd128
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_widen_low_s_i16x8_i8x16, "V8sV16c", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_widen_high_s_i16x8_i8x16, "V8sV16c", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_widen_low_u_i16x8_i8x16, "V8sV16c", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_widen_high_u_i16x8_i8x16, "V8sV16c", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_widen_low_s_i32x4_i16x8, "V4iV8s", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i16x8, "V4iV8s", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i16x8, "V4iV8s", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i16x8, "V4iV8s", "nc", 
"simd128")
-
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index d572de1b8b79..ecc0b5bf2dc4 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16528,40 +16528,6 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(IntNo, {ConvertType(E->getType()), Low->getType()});
 return Builder.CreateCall(Callee, {Low, High});
   }
-  case WebAssembly::BI__builtin_wasm_widen_low_s_i16x8_i8x16:
-  case WebAssembly::BI__builtin_wasm_widen_high_s_i16x8_i8x16:
-  case WebAssembly::BI__builtin_wasm_widen_low_u_i16x8_i8x16:
-  case WebAssembly::BI__builtin_wasm_widen_high_u_i16x8_i8x16:
-  case WebAssembly::BI__builtin_wasm_widen_low_s_i32x4_i16x8:
-  case WebAssembly::BI__builtin_wasm_widen_high_s_i32x4_i16x8:
-  case WebAssembly::BI__builtin_wasm_widen_low_u_i32x4_i16x8:
-  case WebAssembly::BI__builtin_wasm_widen_high_u_i32x4_i16x8: {
-Value *Vec = EmitScalarExpr(E->getArg(0));
-unsigned IntNo;
-switch (BuiltinID) {
-case WebAssembly::BI__builtin_wasm_widen_low_s_i16x8_i8x16:
-case WebAssembly::BI__builtin_wasm_widen_low_s_i32x4_i16x8:
-  IntNo = Intrinsic::wasm_widen_low_signed;
-  break;
-case WebAssembly::BI__builtin_wasm_widen_high_s_i16x8_i8x16:
-case WebAssembly::BI__builtin_wasm_widen_high_s_i32x4_i16x8:
-  IntNo = Intrinsic::wasm_widen_high_signed;
-  break;
-case WebAssembly::BI__builtin_wasm_widen_low_u_i16x8_i8x16:
-case WebAssembly::BI__builtin_wasm_widen_low_u_i32x4_i16x8:
-  IntNo = Intrinsic::wasm_widen_low_unsigned;
-  break;
-case WebAssembly::BI__builtin_wasm_widen_high_u_i16x8_i8x16:
-case WebAssembly::BI__builtin_wasm_widen_high_u_i32x4_i16x8:
-  IntNo = Intrinsic::wasm_widen_high_unsigned;
-  break;
-default:
-  llvm_unreachable("unexpected builtin ID");
-}
-Function *Callee =
-CGM.getIntrinsic(IntNo, {ConvertType(E->getType()), Vec->getType()});
-return Builder.CreateCall(Callee, Vec);
-  }
   case WebAssembly::BI__builtin_wasm_shuffle_v8x16: {
 Value *Ops[18];
 size_t OpIdx = 0;

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 

[clang] d2c394e - [WebAssembly] Add intrinsic for i64x2.mul

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-06-12T14:08:18-07:00
New Revision: d2c394e74fc5eb33581b58f238a745d7dd18f219

URL: 
https://github.com/llvm/llvm-project/commit/d2c394e74fc5eb33581b58f238a745d7dd18f219
DIFF: 
https://github.com/llvm/llvm-project/commit/d2c394e74fc5eb33581b58f238a745d7dd18f219.diff

LOG: [WebAssembly] Add intrinsic for i64x2.mul

Summary:
This instruction was implemented in 3181273be7, but that commit did
not add an intrinsic for it.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81757

Added: 


Modified: 
clang/lib/Headers/wasm_simd128.h

Removed: 




diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 258198a7de34..b78123834b64 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -864,6 +864,11 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_i64x2_sub(v128_t __a,
   return (v128_t)((__u64x2)__a - (__u64x2)__b);
 }
 
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_mul(v128_t __a,
+   v128_t __b) {
+  return (v128_t)((__u64x2)__a * (__u64x2)__b);
+}
+
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_abs(v128_t __a) {
   return (v128_t)__builtin_wasm_abs_f32x4((__f32x4)__a);
 }



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[clang] b7d3692 - [WebAssembly] Implement prototype SIMD rounding instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-06-09T10:14:14-07:00
New Revision: b7d369280ba6073a285811733f90cf7f2e0066be

URL: 
https://github.com/llvm/llvm-project/commit/b7d369280ba6073a285811733f90cf7f2e0066be
DIFF: 
https://github.com/llvm/llvm-project/commit/b7d369280ba6073a285811733f90cf7f2e0066be.diff

LOG: [WebAssembly] Implement prototype SIMD rounding instructions

Summary:
As specified in https://github.com/WebAssembly/simd/pull/232. These
instructions are implemented as LLVM intrinsics for now rather than
normal ISel patterns to make these instructions opt-in. Once the
instructions are merged to the spec proposal, the intrinsics will be
replaced with proper ISel patterns.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, 
cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D81222

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index d03905fdb991..5e6f0d90ab46 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -146,6 +146,15 @@ TARGET_BUILTIN(__builtin_wasm_max_f64x2, "V2dV2dV2d", 
"nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_pmin_f64x2, "V2dV2dV2d", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_pmax_f64x2, "V2dV2dV2d", "nc", "simd128")
 
+TARGET_BUILTIN(__builtin_wasm_ceil_f32x4, "V4fV4f", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_floor_f32x4, "V4fV4f", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_trunc_f32x4, "V4fV4f", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_nearest_f32x4, "V4fV4f", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_ceil_f64x2, "V2dV2d", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_floor_f64x2, "V2dV2d", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_trunc_f64x2, "V2dV2d", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_nearest_f64x2, "V2dV2d", "nc", "simd128")
+
 TARGET_BUILTIN(__builtin_wasm_dot_s_i32x4_i16x8, "V4iV8sV8s", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_sqrt_f32x4, "V4fV4f", "nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index f0092e2fa7ec..010b77e9ace6 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -15951,6 +15951,39 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(Intrinsic::wasm_pmax, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_ceil_f32x4:
+  case WebAssembly::BI__builtin_wasm_floor_f32x4:
+  case WebAssembly::BI__builtin_wasm_trunc_f32x4:
+  case WebAssembly::BI__builtin_wasm_nearest_f32x4:
+  case WebAssembly::BI__builtin_wasm_ceil_f64x2:
+  case WebAssembly::BI__builtin_wasm_floor_f64x2:
+  case WebAssembly::BI__builtin_wasm_trunc_f64x2:
+  case WebAssembly::BI__builtin_wasm_nearest_f64x2: {
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_ceil_f32x4:
+case WebAssembly::BI__builtin_wasm_ceil_f64x2:
+  IntNo = Intrinsic::wasm_ceil;
+  break;
+case WebAssembly::BI__builtin_wasm_floor_f32x4:
+case WebAssembly::BI__builtin_wasm_floor_f64x2:
+  IntNo = Intrinsic::wasm_floor;
+  break;
+case WebAssembly::BI__builtin_wasm_trunc_f32x4:
+case WebAssembly::BI__builtin_wasm_trunc_f64x2:
+  IntNo = Intrinsic::wasm_trunc;
+  break;
+case WebAssembly::BI__builtin_wasm_nearest_f32x4:
+case WebAssembly::BI__builtin_wasm_nearest_f64x2:
+  IntNo = Intrinsic::wasm_nearest;
+  break;
+default:
+  llvm_unreachable("unexpected builtin ID");
+}
+Value *Value = EmitScalarExpr(E->getArg(0));
+Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType()));
+return Builder.CreateCall(Callee, Value);
+  }
   case WebAssembly::BI__builtin_wasm_swizzle_v8x16: {
 Value *Src = EmitScalarExpr(E->getArg(0));
 Value *Indices = EmitScalarExpr(E->getArg(1));

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index b9e8b0217e0a..36d259f7405d 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -621,6 +621,54 @@ f64x2 pmax_f64x2(f64x2 x, f64x2 y) {
   // WEBASSEMBLY-NEXT: ret
 }
 
+f32x4 ceil_f32x4(f32x4 x) {
+  return __builtin_wasm_ceil_f32x4(x);
+  // WEBASSEMBLY: call <4 x float> @llvm.wasm.ceil.v4f32(<4 x float> %x)
+  // WEBASSEMBLY: ret
+}
+
+f32x4 floor_f32x4(f32x4 x) {
+  

[clang] 237be34 - [WebAssembly] Improve macro hygiene in wasm_simd128.h

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-06-02T12:55:06-07:00
New Revision: 237be3404b448637ec3b36f8992434193c5bc64c

URL: 
https://github.com/llvm/llvm-project/commit/237be3404b448637ec3b36f8992434193c5bc64c
DIFF: 
https://github.com/llvm/llvm-project/commit/237be3404b448637ec3b36f8992434193c5bc64c.diff

LOG: [WebAssembly] Improve macro hygiene in wasm_simd128.h

Summary:
The shuffle intrinsic macros did not parenthesize usages of their
constant parameters, which could lead to incorrect results due to
operator precedence issues. This patch fixes the problem by adding the
missing paretheses.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80968

Added: 


Modified: 
clang/lib/Headers/wasm_simd128.h

Removed: 




diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 580aa1e85c1b..258198a7de34 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -1034,24 +1034,24 @@ wasm_f32x4_convert_u32x4(v128_t __a) {
 #define wasm_v16x8_shuffle(__a, __b, __c0, __c1, __c2, __c3, __c4, __c5, __c6, 
\
__c7)   
\
   ((v128_t)__builtin_wasm_shuffle_v8x16(   
\
-  (__i8x16)(__a), (__i8x16)(__b), __c0 * 2, __c0 * 2 + 1, __c1 * 2,
\
-  __c1 * 2 + 1, __c2 * 2, __c2 * 2 + 1, __c3 * 2, __c3 * 2 + 1, __c4 * 2,  
\
-  __c4 * 2 + 1, __c5 * 2, __c5 * 2 + 1, __c6 * 2, __c6 * 2 + 1, __c7 * 2,  
\
-  __c7 * 2 + 1))
+  (__i8x16)(__a), (__i8x16)(__b), (__c0)*2, (__c0)*2 + 1, (__c1)*2,
\
+  (__c1)*2 + 1, (__c2)*2, (__c2)*2 + 1, (__c3)*2, (__c3)*2 + 1, (__c4)*2,  
\
+  (__c4)*2 + 1, (__c5)*2, (__c5)*2 + 1, (__c6)*2, (__c6)*2 + 1, (__c7)*2,  
\
+  (__c7)*2 + 1))
 
 #define wasm_v32x4_shuffle(__a, __b, __c0, __c1, __c2, __c3)   
\
   ((v128_t)__builtin_wasm_shuffle_v8x16(   
\
-  (__i8x16)(__a), (__i8x16)(__b), __c0 * 4, __c0 * 4 + 1, __c0 * 4 + 2,
\
-  __c0 * 4 + 3, __c1 * 4, __c1 * 4 + 1, __c1 * 4 + 2, __c1 * 4 + 3,
\
-  __c2 * 4, __c2 * 4 + 1, __c2 * 4 + 2, __c2 * 4 + 3, __c3 * 4,
\
-  __c3 * 4 + 1, __c3 * 4 + 2, __c3 * 4 + 3))
+  (__i8x16)(__a), (__i8x16)(__b), (__c0)*4, (__c0)*4 + 1, (__c0)*4 + 2,
\
+  (__c0)*4 + 3, (__c1)*4, (__c1)*4 + 1, (__c1)*4 + 2, (__c1)*4 + 3,
\
+  (__c2)*4, (__c2)*4 + 1, (__c2)*4 + 2, (__c2)*4 + 3, (__c3)*4,
\
+  (__c3)*4 + 1, (__c3)*4 + 2, (__c3)*4 + 3))
 
 #define wasm_v64x2_shuffle(__a, __b, __c0, __c1)   
\
   ((v128_t)__builtin_wasm_shuffle_v8x16(   
\
-  (__i8x16)(__a), (__i8x16)(__b), __c0 * 8, __c0 * 8 + 1, __c0 * 8 + 2,
\
-  __c0 * 8 + 3, __c0 * 8 + 4, __c0 * 8 + 5, __c0 * 8 + 6, __c0 * 8 + 7,
\
-  __c1 * 8, __c1 * 8 + 1, __c1 * 8 + 2, __c1 * 8 + 3, __c1 * 8 + 4,
\
-  __c1 * 8 + 5, __c1 * 8 + 6, __c1 * 8 + 7))
+  (__i8x16)(__a), (__i8x16)(__b), (__c0)*8, (__c0)*8 + 1, (__c0)*8 + 2,
\
+  (__c0)*8 + 3, (__c0)*8 + 4, (__c0)*8 + 5, (__c0)*8 + 6, (__c0)*8 + 7,
\
+  (__c1)*8, (__c1)*8 + 1, (__c1)*8 + 2, (__c1)*8 + 3, (__c1)*8 + 4,
\
+  (__c1)*8 + 5, (__c1)*8 + 6, (__c1)*8 + 7))
 
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v8x16_swizzle(v128_t __a,
v128_t __b) {



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[clang] 3181273 - [WebAssembly] Implement i64x2.mul and remove i8x16.mul

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-05-19T12:50:44-07:00
New Revision: 3181273be73ac798c3d5b9081dd53d87a31c91b3

URL: 
https://github.com/llvm/llvm-project/commit/3181273be73ac798c3d5b9081dd53d87a31c91b3
DIFF: 
https://github.com/llvm/llvm-project/commit/3181273be73ac798c3d5b9081dd53d87a31c91b3.diff

LOG: [WebAssembly] Implement i64x2.mul and remove i8x16.mul

Summary:
This reflects changes in the spec proposal made since basic arithmetic
was first implemented.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, 
cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D80174

Added: 


Modified: 
clang/lib/Headers/wasm_simd128.h
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-arith.ll
llvm/test/CodeGen/WebAssembly/simd-unsupported.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index d79b83b21c0e..580aa1e85c1b 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -637,11 +637,6 @@ wasm_u8x16_sub_saturate(v128_t __a, v128_t __b) {
  (__i8x16)__b);
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_mul(v128_t __a,
-   v128_t __b) {
-  return (v128_t)((__u8x16)__a * (__u8x16)__b);
-}
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_min(v128_t __a,
v128_t __b) {
   return (v128_t)__builtin_wasm_min_s_i8x16((__i8x16)__a, (__i8x16)__b);

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 
b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 2ad2ae6413d5..bf4a0da31062 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -153,9 +153,8 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
  MVT::v2f64})
 setOperationAction(Op, T, Custom);
 
-// There is no i64x2.mul instruction
-// TODO: Actually, there is now. Implement it.
-setOperationAction(ISD::MUL, MVT::v2i64, Expand);
+// There is no i8x16.mul instruction
+setOperationAction(ISD::MUL, MVT::v16i8, Expand);
 
 // There are no vector select instructions
 for (auto Op : {ISD::VSELECT, ISD::SELECT_CC, ISD::SELECT})

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td 
b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index 4236d9095c97..7faae22424fb 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -673,6 +673,12 @@ def : Pat<(v2i64 (shifts[0] (v2i64 V128:$vec), I32:$x)),
 // Integer binary arithmetic
 
//===--===//
 
+multiclass SIMDBinaryIntNoI8x16 baseInst> {
+  defm "" : SIMDBinary;
+  defm "" : SIMDBinary;
+  defm "" : SIMDBinary;
+}
+
 multiclass SIMDBinaryIntSmall baseInst> {
   defm "" : SIMDBinary;
   defm "" : SIMDBinary;
@@ -704,7 +710,7 @@ defm SUB_SAT_U :
 
 // Integer multiplication: mul
 let isCommutable = 1 in
-defm MUL : SIMDBinaryIntNoI64x2;
+defm MUL : SIMDBinaryIntNoI8x16;
 
 // Integer min_s / min_u / max_s / max_u
 let isCommutable = 1 in {

diff  --git a/llvm/test/CodeGen/WebAssembly/simd-arith.ll 
b/llvm/test/CodeGen/WebAssembly/simd-arith.ll
index d616828c51e3..c56566991a8c 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-arith.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-arith.ll
@@ -37,11 +37,12 @@ define <16 x i8> @sub_v16i8(<16 x i8> %x, <16 x i8> %y) {
   ret <16 x i8> %a
 }
 
+; i8x16.mul is not in spec
 ; CHECK-LABEL: mul_v16i8:
 ; NO-SIMD128-NOT: i8x16
-; SIMD128-NEXT: .functype mul_v16i8 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: i8x16.mul $push[[R:[0-9]+]]=, $0, $1{{$}}
-; SIMD128-NEXT: return $pop[[R]]{{$}}
+; SIMD128-NOT: i8x16.mul
+; SIMD128: i8x16.extract_lane_u
+; SIMD128: i32.mul
 define <16 x i8> @mul_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %a = mul <16 x i8> %x, %y
   ret <16 x i8> %a
@@ -956,12 +957,11 @@ define <2 x i64> @sub_v2i64(<2 x i64> %x, <2 x i64> %y) {
   ret <2 x i64> %a
 }
 
-; v2i64.mul is not in spec
 ; CHECK-LABEL: mul_v2i64:
 ; NO-SIMD128-NOT: i64x2
-; SIMD128-NOT: i64x2.mul
-; SIMD128: i64x2.extract_lane
-; SIMD128: i64.mul
+; SIMD128-NEXT: .functype mul_v2i64 (v128, v128) -> (v128){{$}}
+; SIMD128: i64x2.mul $push[[R:[0-9]+]]=, $0, $1{{$}}
+; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @mul_v2i64(<2 x i64> %x, <2 x i64> %y) {
   %a = mul <2 x i64> %x, %y
   ret <2 x i64> %a

diff  --git a/llvm/test/CodeGen/WebAssembly/simd-unsupported.ll 

[clang] c702d4b - [WebAssembly] Update latest implemented SIMD instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-05-15T10:53:02-07:00
New Revision: c702d4bf4110b65ba7a00daf3af3353ea5b74787

URL: 
https://github.com/llvm/llvm-project/commit/c702d4bf4110b65ba7a00daf3af3353ea5b74787
DIFF: 
https://github.com/llvm/llvm-project/commit/c702d4bf4110b65ba7a00daf3af3353ea5b74787.diff

LOG: [WebAssembly] Update latest implemented SIMD instructions

Summary:
Move instructions that have recently been implemented in V8 from the
`unimplemented-simd128` target feature to the `simd128` target
feature. The updated instructions match the update at
https://github.com/WebAssembly/simd/pull/223.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, 
cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D79973

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/Headers/wasm_simd128.h
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-arith.ll
llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
llvm/test/CodeGen/WebAssembly/simd-offset.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 5955237a0f58..d03905fdb991 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -70,7 +70,7 @@ TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i64_f64, 
"LLid", "nc", "nontrappi
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i64_f64, "LLid", "nc", 
"nontrapping-fptoint")
 
 // SIMD builtins
-TARGET_BUILTIN(__builtin_wasm_swizzle_v8x16, "V16cV16cV16c", "nc", 
"unimplemented-simd128")
+TARGET_BUILTIN(__builtin_wasm_swizzle_v8x16, "V16cV16cV16c", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_extract_lane_s_i8x16, "iV16cIi", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_extract_lane_u_i8x16, "iV16cIi", "nc", "simd128")

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 51e2a07716b3..d79b83b21c0e 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -50,8 +50,6 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_v128_load(const void *__mem) {
   return ((const struct __wasm_v128_load_struct *)__mem)->__v;
 }
 
-#ifdef __wasm_unimplemented_simd128__
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS
 wasm_v8x16_load_splat(const void *__mem) {
   struct __wasm_v8x16_load_splat_struct {
@@ -149,8 +147,6 @@ wasm_u64x2_load_32x2(const void *__mem) {
   return (v128_t) __builtin_convertvector(__v, __u64x2);
 }
 
-#endif // __wasm_unimplemented_simd128__
-
 static __inline__ void __DEFAULT_FN_ATTRS wasm_v128_store(void *__mem,
   v128_t __a) {
   // UB-free unaligned access copied from xmmintrin.h
@@ -564,15 +560,11 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_v128_xor(v128_t __a,
   return __a ^ __b;
 }
 
-#ifdef __wasm_unimplemented_simd128__
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_andnot(v128_t __a,
  v128_t __b) {
   return __a & ~__b;
 }
 
-#endif // __wasm_unimplemented_simd128__
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_bitselect(v128_t __a,
 v128_t __b,
 v128_t __mask) 
{
@@ -1066,15 +1058,11 @@ wasm_f32x4_convert_u32x4(v128_t __a) {
   __c1 * 8, __c1 * 8 + 1, __c1 * 8 + 2, __c1 * 8 + 3, __c1 * 8 + 4,
\
   __c1 * 8 + 5, __c1 * 8 + 6, __c1 * 8 + 7))
 
-#ifdef __wasm_unimplemented_simd128__
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v8x16_swizzle(v128_t __a,
v128_t __b) {
   return (v128_t)__builtin_wasm_swizzle_v8x16((__i8x16)__a, (__i8x16)__b);
 }
 
-#endif // __wasm_unimplemented_simd128__
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS
 wasm_i8x16_narrow_i16x8(v128_t __a, v128_t __b) {
   return (v128_t)__builtin_wasm_narrow_s_i8x16_i16x8((__i16x8)__a,

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 
b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 4a4585814381..0f8bb91ac496 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -239,12 +239,10 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
   }
 }
 // But some vector extending loads are legal
-if (Subtarget->hasUnimplementedSIMD128()) {
-  for (auto Ext : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) {
-setLoadExtAction(Ext, MVT::v8i16, MVT::v8i8, Legal);
-setLoadExtAction(Ext, MVT::v4i32, MVT::v4i16, Legal);
-  

[clang] 3d49d1c - [WebAssembly] Implement pseudo-min/max SIMD instructions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-05-12T09:39:01-07:00
New Revision: 3d49d1cfa768c046394b316d838907f2018390b8

URL: 
https://github.com/llvm/llvm-project/commit/3d49d1cfa768c046394b316d838907f2018390b8
DIFF: 
https://github.com/llvm/llvm-project/commit/3d49d1cfa768c046394b316d838907f2018390b8.diff

LOG: [WebAssembly] Implement pseudo-min/max SIMD instructions

Summary:
As proposed in https://github.com/WebAssembly/simd/pull/122. Since
these instructions are not yet merged to the SIMD spec proposal, this
patch makes them entirely opt-in by surfacing them only through LLVM
intrinsics and clang builtins. If these instructions are made
official, these intrinsics and builtins should be replaced with simple
instruction patterns.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, 
cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D79742

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 3c7e27544856..5955237a0f58 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -139,8 +139,12 @@ TARGET_BUILTIN(__builtin_wasm_abs_f64x2, "V2dV2d", "nc", 
"simd128")
 
 TARGET_BUILTIN(__builtin_wasm_min_f32x4, "V4fV4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_max_f32x4, "V4fV4fV4f", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_pmin_f32x4, "V4fV4fV4f", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_pmax_f32x4, "V4fV4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_min_f64x2, "V2dV2dV2d", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_max_f64x2, "V2dV2dV2d", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_pmin_f64x2, "V2dV2dV2d", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_pmax_f64x2, "V2dV2dV2d", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_dot_s_i32x4_i16x8, "V4iV8sV8s", "nc", "simd128")
 

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 47620c13aed6..5166f91e252c 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -15758,6 +15758,22 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
  ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_pmin_f32x4:
+  case WebAssembly::BI__builtin_wasm_pmin_f64x2: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_pmin, ConvertType(E->getType()));
+return Builder.CreateCall(Callee, {LHS, RHS});
+  }
+  case WebAssembly::BI__builtin_wasm_pmax_f32x4:
+  case WebAssembly::BI__builtin_wasm_pmax_f64x2: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_pmax, ConvertType(E->getType()));
+return Builder.CreateCall(Callee, {LHS, RHS});
+  }
   case WebAssembly::BI__builtin_wasm_swizzle_v8x16: {
 Value *Src = EmitScalarExpr(E->getArg(0));
 Value *Indices = EmitScalarExpr(E->getArg(1));

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index b81594efcc82..51e2a07716b3 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -937,6 +937,16 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f32x4_max(v128_t __a,
   return (v128_t)__builtin_wasm_max_f32x4((__f32x4)__a, (__f32x4)__b);
 }
 
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_pmin(v128_t __a,
+v128_t __b) {
+  return (v128_t)__builtin_wasm_pmin_f32x4((__f32x4)__a, (__f32x4)__b);
+}
+
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_pmax(v128_t __a,
+v128_t __b) {
+  return (v128_t)__builtin_wasm_pmax_f32x4((__f32x4)__a, (__f32x4)__b);
+}
+
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_abs(v128_t __a) {
   return (v128_t)__builtin_wasm_abs_f64x2((__f64x2)__a);
 }
@@ -997,6 +1007,16 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_f64x2_max(v128_t __a,
   return (v128_t)__builtin_wasm_max_f64x2((__f64x2)__a, (__f64x2)__b);
 }
 
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_pmin(v128_t __a,
+

[clang] 8e3e56f - [WebAssembly] Add wasm-specific vector shuffle builtin and intrinsic

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-05-11T10:01:55-07:00
New Revision: 8e3e56f2a36701480eeb65e426701d5a9025cc59

URL: 
https://github.com/llvm/llvm-project/commit/8e3e56f2a36701480eeb65e426701d5a9025cc59
DIFF: 
https://github.com/llvm/llvm-project/commit/8e3e56f2a36701480eeb65e426701d5a9025cc59.diff

LOG: [WebAssembly] Add wasm-specific vector shuffle builtin and intrinsic

Summary:

Although using `__builtin_shufflevector` and the `shufflevector`
instruction works fine, they are not opaque to the optimizer. As a
result, DAGCombine can potentially reduce the number of shuffles and
change the shuffle masks. This is unexpected behavior for users of the
WebAssembly SIMD intrinsics who have crafted their shuffles to
optimize the code generated by engines. This patch solves the problem
by adding a new shuffle intrinsic that is opaque to the optimizers in
line with the decision of the WebAssembly SIMD contributors at
https://github.com/WebAssembly/simd/issues/196#issuecomment-622494748. In
the future we may implement custom DAG combines to properly optimize
shuffles and replace this solution.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, 
llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D66983

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index cbdb33c0c352..3c7e27544856 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -119,6 +119,7 @@ TARGET_BUILTIN(__builtin_wasm_avgr_u_i8x16, "V16cV16cV16c", 
"nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_avgr_u_i16x8, "V8sV8sV8s", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_shuffle_v8x16, 
"V16cV16cV16cIiIiIiIiIiIiIiIiIiIiIiIiIiIiIiIi", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_any_true_i8x16, "iV16c", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_any_true_i16x8, "iV8s", "nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index c64fde719445..541dac7b7580 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -16044,6 +16044,20 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 CGM.getIntrinsic(IntNo, {ConvertType(E->getType()), Vec->getType()});
 return Builder.CreateCall(Callee, Vec);
   }
+  case WebAssembly::BI__builtin_wasm_shuffle_v8x16: {
+Value *Ops[18];
+size_t OpIdx = 0;
+Ops[OpIdx++] = EmitScalarExpr(E->getArg(0));
+Ops[OpIdx++] = EmitScalarExpr(E->getArg(1));
+while (OpIdx < 18) {
+  llvm::APSInt LaneConst;
+  if (!E->getArg(OpIdx)->isIntegerConstantExpr(LaneConst, getContext()))
+llvm_unreachable("Constant arg isn't actually constant?");
+  Ops[OpIdx++] = llvm::ConstantInt::get(getLLVMContext(), LaneConst);
+}
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_shuffle);
+return Builder.CreateCall(Callee, Ops);
+  }
   default:
 return nullptr;
   }

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 612aec139723..b81594efcc82 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -1020,23 +1020,31 @@ wasm_f32x4_convert_u32x4(v128_t __a) {
 #define wasm_v8x16_shuffle(__a, __b, __c0, __c1, __c2, __c3, __c4, __c5, __c6, 
\
__c7, __c8, __c9, __c10, __c11, __c12, __c13,   
\
__c14, __c15)   
\
-  ((v128_t)(__builtin_shufflevector(   
\
-  (__u8x16)(__a), (__u8x16)(__b), __c0, __c1, __c2, __c3, __c4, __c5,  
\
-  __c6, __c7, __c8, __c9, __c10, __c11, __c12, __c13, __c14, __c15)))
+  ((v128_t)__builtin_wasm_shuffle_v8x16(   
\
+  (__i8x16)(__a), (__i8x16)(__b), __c0, __c1, __c2, __c3, __c4, __c5,  
\
+  __c6, __c7, __c8, __c9, __c10, __c11, __c12, __c13, __c14, __c15))
 
 #define wasm_v16x8_shuffle(__a, __b, __c0, __c1, __c2, __c3, __c4, __c5, __c6, 
\
__c7)   
\
-  ((v128_t)(__builtin_shufflevector((__u16x8)(__a), (__u16x8)(__b), __c0,  
\
-__c1, __c2, __c3, __c4, __c5, __c6,
\
-__c7)))
+  

[clang] ebb69b8 - [clang][WebAssembly] Only expose wait and notify builtins with atomics

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-05-08T13:54:29-07:00
New Revision: ebb69b8bafad6948ee6a14b4087fb7b440c73d0d

URL: 
https://github.com/llvm/llvm-project/commit/ebb69b8bafad6948ee6a14b4087fb7b440c73d0d
DIFF: 
https://github.com/llvm/llvm-project/commit/ebb69b8bafad6948ee6a14b4087fb7b440c73d0d.diff

LOG: [clang][WebAssembly] Only expose wait and notify builtins with atomics

Summary:
Since the underlying wait and notify instructions are only available
when the atomics feature is enabled, it only makes sense to expose
their builtin functions when atomics are enabled.

Reviewers: aheejin, sunfish

Subscribers: dschuff, sbc100, jgravelle-google, jfb, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79534

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/test/CodeGen/builtins-wasm.c

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 0d66535fa8ec..cbdb33c0c352 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -45,9 +45,9 @@ TARGET_BUILTIN(__builtin_wasm_throw, "vIUiv*", "r", 
"exception-handling")
 TARGET_BUILTIN(__builtin_wasm_rethrow_in_catch, "v", "r", "exception-handling")
 
 // Atomic wait and notify.
-BUILTIN(__builtin_wasm_atomic_wait_i32, "ii*iLLi", "n")
-BUILTIN(__builtin_wasm_atomic_wait_i64, "iLLi*LLiLLi", "n")
-BUILTIN(__builtin_wasm_atomic_notify, "Uii*Ui", "n")
+TARGET_BUILTIN(__builtin_wasm_atomic_wait_i32, "ii*iLLi", "n", "atomics")
+TARGET_BUILTIN(__builtin_wasm_atomic_wait_i64, "iLLi*LLiLLi", "n", "atomics")
+TARGET_BUILTIN(__builtin_wasm_atomic_notify, "Uii*Ui", "n", "atomics")
 
 // Trapping fp-to-int conversions
 BUILTIN(__builtin_wasm_trunc_s_i32_f32, "if", "nc")

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 7e823c92a256..729a677c2485 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -1,6 +1,6 @@
-// RUN: %clang_cc1 -triple wasm32-unknown-unknown -target-feature 
+unimplemented-simd128 -target-feature +nontrapping-fptoint -target-feature 
+exception-handling -target-feature +bulk-memory -flax-vector-conversions=none 
-O3 -emit-llvm -o - %s | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY32
-// RUN: %clang_cc1 -triple wasm64-unknown-unknown -target-feature 
+unimplemented-simd128 -target-feature +nontrapping-fptoint -target-feature 
+exception-handling -target-feature +bulk-memory -flax-vector-conversions=none 
-O3 -emit-llvm -o - %s | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY64
-// RUN: not %clang_cc1 -triple wasm64-unknown-unknown -target-feature 
+nontrapping-fptoint -target-feature +exception-handling -target-feature 
+bulk-memory -flax-vector-conversions=none -O3 -emit-llvm -o - %s 2>&1 | 
FileCheck %s -check-prefixes MISSING-SIMD
+// RUN: %clang_cc1 -triple wasm32-unknown-unknown -target-feature 
+unimplemented-simd128 -target-feature +nontrapping-fptoint -target-feature 
+exception-handling -target-feature +bulk-memory -target-feature +atomics 
-flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s 
-check-prefixes WEBASSEMBLY,WEBASSEMBLY32
+// RUN: %clang_cc1 -triple wasm64-unknown-unknown -target-feature 
+unimplemented-simd128 -target-feature +nontrapping-fptoint -target-feature 
+exception-handling -target-feature +bulk-memory -target-feature +atomics 
-flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s 
-check-prefixes WEBASSEMBLY,WEBASSEMBLY64
+// RUN: not %clang_cc1 -triple wasm64-unknown-unknown -target-feature 
+nontrapping-fptoint -target-feature +exception-handling -target-feature 
+bulk-memory -target-feature +atomics -flax-vector-conversions=none -O3 
-emit-llvm -o - %s 2>&1 | FileCheck %s -check-prefixes MISSING-SIMD
 
 // SIMD convenience types
 typedef char i8x16 __attribute((vector_size(16)));



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[clang] e0f5284 - [WebAssembly] Renumber SIMD opcodes

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-05-01T17:20:49-07:00
New Revision: e0f52842c8bcf1e0a59d2535072795597571adb6

URL: 
https://github.com/llvm/llvm-project/commit/e0f52842c8bcf1e0a59d2535072795597571adb6
DIFF: 
https://github.com/llvm/llvm-project/commit/e0f52842c8bcf1e0a59d2535072795597571adb6.diff

LOG: [WebAssembly] Renumber SIMD opcodes

Summary:
As described in https://github.com/WebAssembly/simd/pull/209. This is
the final reorganization of the SIMD opcode space before
standardization. It has been landed in concert with corresponding
changes in other projects in the WebAssembly SIMD ecosystem.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79224

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/wasm_simd128.h
clang/test/CodeGen/builtins-wasm.c
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-conversions.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/Disassembler/WebAssembly/wasm.txt
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 5fb7a603fe17..0d66535fa8ec 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -153,8 +153,6 @@ TARGET_BUILTIN(__builtin_wasm_qfms_f64x2, "V2dV2dV2dV2d", 
"nc", "unimplemented-s
 
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i32x4_f32x4, "V4iV4f", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i32x4_f32x4, "V4iV4f", "nc", 
"simd128")
-TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i64x2_f64x2, "V2LLiV2d", "nc", 
"unimplemented-simd128")
-TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i64x2_f64x2, "V2LLiV2d", "nc", 
"unimplemented-simd128")
 
 TARGET_BUILTIN(__builtin_wasm_narrow_s_i8x16_i16x8, "V16cV8sV8s", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, "V16cV8sV8s", "nc", 
"simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 2fa9ed9b2443..94c0adfdf4af 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -15546,8 +15546,7 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
   case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32_f64:
   case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i64_f32:
   case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i64_f64:
-  case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32x4_f32x4:
-  case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i64x2_f64x2: {
+  case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32x4_f32x4: {
 Value *Src = EmitScalarExpr(E->getArg(0));
 llvm::Type *ResT = ConvertType(E->getType());
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_trunc_saturate_signed,
@@ -15558,8 +15557,7 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
   case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i32_f64:
   case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i64_f32:
   case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i64_f64:
-  case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i32x4_f32x4:
-  case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i64x2_f64x2: {
+  case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i32x4_f32x4: {
 Value *Src = EmitScalarExpr(E->getArg(0));
 llvm::Type *ResT = ConvertType(E->getType());
 Function *Callee = 
CGM.getIntrinsic(Intrinsic::wasm_trunc_saturate_unsigned,

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index c2c57cadfdf2..612aec139723 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -1007,20 +1007,6 @@ wasm_u32x4_trunc_saturate_f32x4(v128_t __a) {
   return (v128_t)__builtin_wasm_trunc_saturate_u_i32x4_f32x4((__f32x4)__a);
 }
 
-#ifdef __wasm_unimplemented_simd128__
-
-static __inline__ v128_t __DEFAULT_FN_ATTRS
-wasm_i64x2_trunc_saturate_f64x2(v128_t __a) {
-  return (v128_t)__builtin_wasm_trunc_saturate_s_i64x2_f64x2((__f64x2)__a);
-}
-
-static __inline__ v128_t __DEFAULT_FN_ATTRS
-wasm_u64x2_trunc_saturate_f64x2(v128_t __a) {
-  return (v128_t)__builtin_wasm_trunc_saturate_s_i64x2_f64x2((__f64x2)__a);
-}
-
-#endif // __wasm_unimplemented_simd128__
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS
 wasm_f32x4_convert_i32x4(v128_t __a) {
   return (v128_t) __builtin_convertvector((__i32x4)__a, __f32x4);
@@ -1031,20 +1017,6 @@ wasm_f32x4_convert_u32x4(v128_t __a) {
   return (v128_t) __builtin_convertvector((__u32x4)__a, __f32x4);
 }
 
-#ifdef __wasm_unimplemented_simd128__
-
-static 

[clang] 95fac2e - [WebAssembly] Rename SIMD min/max/avgr intrinsics for consistency

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-04-01T09:38:41-07:00
New Revision: 95fac2e46b73c67495dbdb43ef178d33281c05ec

URL: 
https://github.com/llvm/llvm-project/commit/95fac2e46b73c67495dbdb43ef178d33281c05ec
DIFF: 
https://github.com/llvm/llvm-project/commit/95fac2e46b73c67495dbdb43ef178d33281c05ec.diff

LOG: [WebAssembly] Rename SIMD min/max/avgr intrinsics for consistency

Summary:
The convention for the wasm_simd128.h intrinsics is to have the
integer sign in the lane interpretation rather than as a suffix. This
PR changes the names of the integer min, max, and avgr intrinsics to
match this convention.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77185

Added: 


Modified: 
clang/lib/Headers/wasm_simd128.h

Removed: 




diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
index 3b30ddbd527b..c2c57cadfdf2 100644
--- a/clang/lib/Headers/wasm_simd128.h
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -650,28 +650,28 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_i8x16_mul(v128_t __a,
   return (v128_t)((__u8x16)__a * (__u8x16)__b);
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_min_s(v128_t __a,
- v128_t __b) {
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_min(v128_t __a,
+   v128_t __b) {
   return (v128_t)__builtin_wasm_min_s_i8x16((__i8x16)__a, (__i8x16)__b);
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_min_u(v128_t __a,
- v128_t __b) {
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_min(v128_t __a,
+   v128_t __b) {
   return (v128_t)__builtin_wasm_min_u_i8x16((__i8x16)__a, (__i8x16)__b);
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_max_s(v128_t __a,
- v128_t __b) {
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_max(v128_t __a,
+   v128_t __b) {
   return (v128_t)__builtin_wasm_max_s_i8x16((__i8x16)__a, (__i8x16)__b);
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_max_u(v128_t __a,
- v128_t __b) {
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_max(v128_t __a,
+   v128_t __b) {
   return (v128_t)__builtin_wasm_max_u_i8x16((__i8x16)__a, (__i8x16)__b);
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_avgr_u(v128_t __a,
-  v128_t __b) {
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_avgr(v128_t __a,
+v128_t __b) {
   return (v128_t)__builtin_wasm_avgr_u_i8x16((__i8x16)__a, (__i8x16)__b);
 }
 
@@ -745,28 +745,28 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS 
wasm_i16x8_mul(v128_t __a,
   return (v128_t)((__u16x8)__a * (__u16x8)__b);
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_min_s(v128_t __a,
- v128_t __b) {
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_min(v128_t __a,
+   v128_t __b) {
   return (v128_t)__builtin_wasm_min_s_i16x8((__i16x8)__a, (__i16x8)__b);
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_min_u(v128_t __a,
- v128_t __b) {
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_min(v128_t __a,
+   v128_t __b) {
   return (v128_t)__builtin_wasm_min_u_i16x8((__i16x8)__a, (__i16x8)__b);
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_max_s(v128_t __a,
- v128_t __b) {
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_max(v128_t __a,
+   v128_t __b) {
   return (v128_t)__builtin_wasm_max_s_i16x8((__i16x8)__a, (__i16x8)__b);
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_max_u(v128_t __a,
- v128_t __b) {
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_max(v128_t __a,
+   v128_t __b) {
   return (v128_t)__builtin_wasm_max_u_i16x8((__i16x8)__a, (__i16x8)__b);
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_avgr_u(v128_t __a,
-  v128_t __b) {
+static __inline__ v128_t 

[clang] 5074776 - [WebAssembly] Import wasm_simd128.h from Emscripten

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-03-30T17:04:18-07:00
New Revision: 5074776de478a114ece3f82668aa1363b2f17c92

URL: 
https://github.com/llvm/llvm-project/commit/5074776de478a114ece3f82668aa1363b2f17c92
DIFF: 
https://github.com/llvm/llvm-project/commit/5074776de478a114ece3f82668aa1363b2f17c92.diff

LOG: [WebAssembly] Import wasm_simd128.h from Emscripten

Summary:
As the WebAssembly SIMD proposal nears stabilization, there is desire
to use it with toolchains other than Emscripten. Moving the intrinsics
header to clang will make it available to WASI toolchains as well.

Reviewers: aheejin, sunfish

Subscribers: dschuff, mgorny, sbc100, jgravelle-google, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D76959

Added: 
clang/lib/Headers/wasm_simd128.h

Modified: 
clang/lib/Headers/CMakeLists.txt

Removed: 




diff  --git a/clang/lib/Headers/CMakeLists.txt 
b/clang/lib/Headers/CMakeLists.txt
index 28d43cb7ed35..8124549bfc48 100644
--- a/clang/lib/Headers/CMakeLists.txt
+++ b/clang/lib/Headers/CMakeLists.txt
@@ -109,6 +109,7 @@ set(files
   vecintrin.h
   vpclmulqdqintrin.h
   waitpkgintrin.h
+  wasm_simd128.h
   wbnoinvdintrin.h
   wmmintrin.h
   __wmmintrin_aes.h

diff  --git a/clang/lib/Headers/wasm_simd128.h 
b/clang/lib/Headers/wasm_simd128.h
new file mode 100644
index ..3b30ddbd527b
--- /dev/null
+++ b/clang/lib/Headers/wasm_simd128.h
@@ -0,0 +1,1145 @@
+/*=== wasm_simd128.h - WebAssembly portable SIMD intrinsics ===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===---===
+ */
+
+#ifndef __WASM_SIMD128_H
+#define __WASM_SIMD128_H
+
+#include 
+#include 
+
+// User-facing type
+typedef int32_t v128_t __attribute__((__vector_size__(16), __aligned__(16)));
+
+// Internal types determined by clang builtin definitions
+typedef int32_t __v128_u __attribute__((__vector_size__(16), __aligned__(1)));
+typedef char __i8x16 __attribute__((__vector_size__(16), __aligned__(16)));
+typedef signed char __s8x16
+__attribute__((__vector_size__(16), __aligned__(16)));
+typedef unsigned char __u8x16
+__attribute__((__vector_size__(16), __aligned__(16)));
+typedef short __i16x8 __attribute__((__vector_size__(16), __aligned__(16)));
+typedef unsigned short __u16x8
+__attribute__((__vector_size__(16), __aligned__(16)));
+typedef int __i32x4 __attribute__((__vector_size__(16), __aligned__(16)));
+typedef unsigned int __u32x4
+__attribute__((__vector_size__(16), __aligned__(16)));
+typedef long long __i64x2 __attribute__((__vector_size__(16), 
__aligned__(16)));
+typedef unsigned long long __u64x2
+__attribute__((__vector_size__(16), __aligned__(16)));
+typedef float __f32x4 __attribute__((__vector_size__(16), __aligned__(16)));
+typedef double __f64x2 __attribute__((__vector_size__(16), __aligned__(16)));
+
+#define __DEFAULT_FN_ATTRS 
\
+  __attribute__((__always_inline__, __nodebug__, __target__("simd128"),
\
+ __min_vector_width__(128)))
+
+#define __REQUIRE_CONSTANT(e)  
\
+  _Static_assert(__builtin_constant_p(e), "Expected constant")
+
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_load(const void *__mem) {
+  // UB-free unaligned access copied from xmmintrin.h
+  struct __wasm_v128_load_struct {
+__v128_u __v;
+  } __attribute__((__packed__, __may_alias__));
+  return ((const struct __wasm_v128_load_struct *)__mem)->__v;
+}
+
+#ifdef __wasm_unimplemented_simd128__
+
+static __inline__ v128_t __DEFAULT_FN_ATTRS
+wasm_v8x16_load_splat(const void *__mem) {
+  struct __wasm_v8x16_load_splat_struct {
+uint8_t __v;
+  } __attribute__((__packed__, __may_alias__));
+  uint8_t __v = ((const struct __wasm_v8x16_load_splat_struct *)__mem)->__v;
+  return (v128_t)(__u8x16){__v, __v, __v, __v, __v, __v, __v, __v,
+   __v, __v, __v, __v, __v, __v, __v, __v};
+}
+
+static __inline__ v128_t __DEFAULT_FN_ATTRS
+wasm_v16x8_load_splat(const void *__mem) {
+  struct __wasm_v16x8_load_splat_struct {
+uint16_t __v;
+  } __attribute__((__packed__, __may_alias__));
+  uint16_t __v = ((const struct __wasm_v16x8_load_splat_struct *)__mem)->__v;
+  return (v128_t)(__u16x8){__v, __v, __v, __v, __v, __v, __v, __v};
+}
+
+static __inline__ v128_t __DEFAULT_FN_ATTRS
+wasm_v32x4_load_splat(const void *__mem) {
+  struct __wasm_v32x4_load_splat_struct {
+uint32_t __v;
+  } __attribute__((__packed__, __may_alias__));
+  uint32_t __v = ((const struct __wasm_v32x4_load_splat_struct *)__mem)->__v;
+  return (v128_t)(__u32x4){__v, __v, __v, __v};
+}
+
+static __inline__ v128_t 

[clang] de6cd3e - [WebAssembly] Add SIMD integer abs builtins

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-03-21T00:21:24-07:00
New Revision: de6cd3e836e10ca1b893459d38e7052b7513d55e

URL: 
https://github.com/llvm/llvm-project/commit/de6cd3e836e10ca1b893459d38e7052b7513d55e
DIFF: 
https://github.com/llvm/llvm-project/commit/de6cd3e836e10ca1b893459d38e7052b7513d55e.diff

LOG: [WebAssembly] Add SIMD integer abs builtins

Summary:
Since the conditional operator cannot be used with vector conditions
in C, we need a builtin to be able to express this operation in C
source.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D76538

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 86d17fc952ec..5fb7a603fe17 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -98,6 +98,10 @@ TARGET_BUILTIN(__builtin_wasm_sub_saturate_u_i8x16, 
"V16cV16cV16c", "nc", "simd1
 TARGET_BUILTIN(__builtin_wasm_sub_saturate_s_i16x8, "V8sV8sV8s", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_sub_saturate_u_i16x8, "V8sV8sV8s", "nc", 
"simd128")
 
+TARGET_BUILTIN(__builtin_wasm_abs_i8x16, "V16cV16c", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_abs_i16x8, "V8sV8s", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_abs_i32x4, "V4iV4i", "nc", "simd128")
+
 TARGET_BUILTIN(__builtin_wasm_min_s_i8x16, "V16cV16cV16c", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_min_u_i8x16, "V16cV16cV16c", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_max_s_i8x16, "V16cV16cV16c", "nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 413dbf95f1b9..8d86424c60a9 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -15050,6 +15050,15 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_abs_i8x16:
+  case WebAssembly::BI__builtin_wasm_abs_i16x8:
+  case WebAssembly::BI__builtin_wasm_abs_i32x4: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+Value *Neg = Builder.CreateNeg(Vec, "neg");
+Constant *Zero = llvm::Constant::getNullValue(Vec->getType());
+Value *ICmp = Builder.CreateICmpSLT(Vec, Zero, "abscond");
+return Builder.CreateSelect(ICmp, Neg, Vec, "abs");
+  }
   case WebAssembly::BI__builtin_wasm_min_s_i8x16:
   case WebAssembly::BI__builtin_wasm_min_u_i8x16:
   case WebAssembly::BI__builtin_wasm_max_s_i8x16:

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 0d70ea601d79..8b497d95298c 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -338,6 +338,30 @@ i8x16 sub_saturate_u_i8x16(i8x16 x, i8x16 y) {
   // WEBASSEMBLY-NEXT: ret
 }
 
+i8x16 abs_i8x16(i8x16 v) {
+  return __builtin_wasm_abs_i8x16(v);
+  // WEBASSEMBLY: %neg = sub <16 x i8> zeroinitializer, %v
+  // WEBASSEMBLY: %abscond = icmp slt <16 x i8> %v, zeroinitializer
+  // WEBASSEMBLY: %abs = select <16 x i1> %abscond, <16 x i8> %neg, <16 x i8> 
%v
+  // WEBASSEMBLY: ret <16 x i8> %abs
+}
+
+i16x8 abs_i16x8(i16x8 v) {
+  return __builtin_wasm_abs_i16x8(v);
+  // WEBASSEMBLY: %neg = sub <8 x i16> zeroinitializer, %v
+  // WEBASSEMBLY: %abscond = icmp slt <8 x i16> %v, zeroinitializer
+  // WEBASSEMBLY: %abs = select <8 x i1> %abscond, <8 x i16> %neg, <8 x i16> %v
+  // WEBASSEMBLY: ret <8 x i16> %abs
+}
+
+i32x4 abs_i32x4(i32x4 v) {
+  return __builtin_wasm_abs_i32x4(v);
+  // WEBASSEMBLY: %neg = sub <4 x i32> zeroinitializer, %v
+  // WEBASSEMBLY: %abscond = icmp slt <4 x i32> %v, zeroinitializer
+  // WEBASSEMBLY: %abs = select <4 x i1> %abscond, <4 x i32> %neg, <4 x i32> %v
+  // WEBASSEMBLY: ret <4 x i32> %abs
+}
+
 i8x16 min_s_i8x16(i8x16 x, i8x16 y) {
   return __builtin_wasm_min_s_i8x16(x, y);
   // WEBASSEMBLY: %0 = icmp slt <16 x i8> %x, %y



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[clang] a3f974f - [WebAssembly] SIMD bitmask intrinsics and builtin functions

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-03-19T17:15:37-07:00
New Revision: a3f974f3c3321d602a49f8ada3d3d4dd34db792a

URL: 
https://github.com/llvm/llvm-project/commit/a3f974f3c3321d602a49f8ada3d3d4dd34db792a
DIFF: 
https://github.com/llvm/llvm-project/commit/a3f974f3c3321d602a49f8ada3d3d4dd34db792a.diff

LOG: [WebAssembly] SIMD bitmask intrinsics and builtin functions

Summary:
These experimental new instructions are proposed in
https://github.com/WebAssembly/simd/pull/201.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D76397

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index b544e3b42137..86d17fc952ec 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -125,6 +125,10 @@ TARGET_BUILTIN(__builtin_wasm_all_true_i16x8, "iV8s", 
"nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_all_true_i32x4, "iV4i", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_all_true_i64x2, "iV2LLi", "nc", 
"unimplemented-simd128")
 
+TARGET_BUILTIN(__builtin_wasm_bitmask_i8x16, "iV16c", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_bitmask_i16x8, "iV8s", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_bitmask_i32x4, "iV4i", "nc", "simd128")
+
 TARGET_BUILTIN(__builtin_wasm_abs_f32x4, "V4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_abs_f64x2, "V2dV2d", "nc", "simd128")
 

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index e42339dbcfcc..413dbf95f1b9 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -15142,6 +15142,14 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo, Vec->getType());
 return Builder.CreateCall(Callee, {Vec});
   }
+  case WebAssembly::BI__builtin_wasm_bitmask_i8x16:
+  case WebAssembly::BI__builtin_wasm_bitmask_i16x8:
+  case WebAssembly::BI__builtin_wasm_bitmask_i32x4: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_bitmask, Vec->getType());
+return Builder.CreateCall(Callee, {Vec});
+  }
   case WebAssembly::BI__builtin_wasm_abs_f32x4:
   case WebAssembly::BI__builtin_wasm_abs_f64x2: {
 Value *Vec = EmitScalarExpr(E->getArg(0));

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index b27bf75248ca..0d70ea601d79 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -511,6 +511,24 @@ int all_true_i64x2(i64x2 x) {
   // WEBASSEMBLY: ret
 }
 
+int bitmask_i8x16(i8x16 x) {
+  return __builtin_wasm_bitmask_i8x16(x);
+  // WEBASSEMBLY: call i32 @llvm.wasm.bitmask.v16i8(<16 x i8> %x)
+  // WEBASSEMBLY: ret
+}
+
+int bitmask_i16x8(i16x8 x) {
+  return __builtin_wasm_bitmask_i16x8(x);
+  // WEBASSEMBLY: call i32 @llvm.wasm.bitmask.v8i16(<8 x i16> %x)
+  // WEBASSEMBLY: ret
+}
+
+int bitmask_i32x4(i32x4 x) {
+  return __builtin_wasm_bitmask_i32x4(x);
+  // WEBASSEMBLY: call i32 @llvm.wasm.bitmask.v4i32(<4 x i32> %x)
+  // WEBASSEMBLY: ret
+}
+
 f32x4 abs_f32x4(f32x4 x) {
   return __builtin_wasm_abs_f32x4(x);
   // WEBASSEMBLY: call <4 x float> @llvm.fabs.v4f32(<4 x float> %x)

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index e97700ad724a..90b5a25d16c0 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -129,6 +129,10 @@ def int_wasm_alltrue :
   Intrinsic<[llvm_i32_ty],
 [llvm_anyvector_ty],
 [IntrNoMem, IntrSpeculatable]>;
+def int_wasm_bitmask :
+  Intrinsic<[llvm_i32_ty],
+[llvm_anyvector_ty],
+[IntrNoMem, IntrSpeculatable]>;
 def int_wasm_qfma :
   Intrinsic<[llvm_anyvector_ty],
 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td 
b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index 144b7f6ca23e..7743a284091e 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -606,6 +606,18 @@ def : Pat<(i32 (seteq
   (i32 (!cast(reduction[1]#"_"#ty) (ty V128:$x)))>;
 }
 
+multiclass SIMDBitmask simdop> {
+  defm _#vec_t : SIMD_I<(outs I32:$dst), (ins V128:$vec), (outs), (ins),
+  

[clang] d43fcd0 - [WebAssembly] Add SIMD integer min/max builtins

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-03-06T14:28:52-08:00
New Revision: d43fcd0c0410d474a947cf51a3c67aa2e8d5a711

URL: 
https://github.com/llvm/llvm-project/commit/d43fcd0c0410d474a947cf51a3c67aa2e8d5a711
DIFF: 
https://github.com/llvm/llvm-project/commit/d43fcd0c0410d474a947cf51a3c67aa2e8d5a711.diff

LOG: [WebAssembly] Add SIMD integer min/max builtins

Summary:
Although SIMD integer min/max operations can be expressed using the ?:
operator in C++, that operator is disallowed for vectors in C. As a
workaround, this change introduces new WebAssembly-specific builtin
functions that lower to the desired vector icmp/select sequences.

Reviewers: aheejin, dschuff, kripken

Subscribers: sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75770

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 0574af395f7b..b544e3b42137 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -98,6 +98,19 @@ TARGET_BUILTIN(__builtin_wasm_sub_saturate_u_i8x16, 
"V16cV16cV16c", "nc", "simd1
 TARGET_BUILTIN(__builtin_wasm_sub_saturate_s_i16x8, "V8sV8sV8s", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_sub_saturate_u_i16x8, "V8sV8sV8s", "nc", 
"simd128")
 
+TARGET_BUILTIN(__builtin_wasm_min_s_i8x16, "V16cV16cV16c", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_min_u_i8x16, "V16cV16cV16c", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_max_s_i8x16, "V16cV16cV16c", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_max_u_i8x16, "V16cV16cV16c", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_min_s_i16x8, "V8sV8sV8s", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_min_u_i16x8, "V8sV8sV8s", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_max_s_i16x8, "V8sV8sV8s", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_max_u_i16x8, "V8sV8sV8s", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_min_s_i32x4, "V4iV4iV4i", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_min_u_i32x4, "V4iV4iV4i", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_max_s_i32x4, "V4iV4iV4i", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_max_u_i32x4, "V4iV4iV4i", "nc", "simd128")
+
 TARGET_BUILTIN(__builtin_wasm_avgr_u_i8x16, "V16cV16cV16c", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_avgr_u_i16x8, "V8sV8sV8s", "nc", "simd128")
 

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index fbb397ba3cfe..417b308d7a22 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -14900,6 +14900,47 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_min_s_i8x16:
+  case WebAssembly::BI__builtin_wasm_min_u_i8x16:
+  case WebAssembly::BI__builtin_wasm_max_s_i8x16:
+  case WebAssembly::BI__builtin_wasm_max_u_i8x16:
+  case WebAssembly::BI__builtin_wasm_min_s_i16x8:
+  case WebAssembly::BI__builtin_wasm_min_u_i16x8:
+  case WebAssembly::BI__builtin_wasm_max_s_i16x8:
+  case WebAssembly::BI__builtin_wasm_max_u_i16x8:
+  case WebAssembly::BI__builtin_wasm_min_s_i32x4:
+  case WebAssembly::BI__builtin_wasm_min_u_i32x4:
+  case WebAssembly::BI__builtin_wasm_max_s_i32x4:
+  case WebAssembly::BI__builtin_wasm_max_u_i32x4: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Value *ICmp;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_min_s_i8x16:
+case WebAssembly::BI__builtin_wasm_min_s_i16x8:
+case WebAssembly::BI__builtin_wasm_min_s_i32x4:
+  ICmp = Builder.CreateICmpSLT(LHS, RHS);
+  break;
+case WebAssembly::BI__builtin_wasm_min_u_i8x16:
+case WebAssembly::BI__builtin_wasm_min_u_i16x8:
+case WebAssembly::BI__builtin_wasm_min_u_i32x4:
+  ICmp = Builder.CreateICmpULT(LHS, RHS);
+  break;
+case WebAssembly::BI__builtin_wasm_max_s_i8x16:
+case WebAssembly::BI__builtin_wasm_max_s_i16x8:
+case WebAssembly::BI__builtin_wasm_max_s_i32x4:
+  ICmp = Builder.CreateICmpSGT(LHS, RHS);
+  break;
+case WebAssembly::BI__builtin_wasm_max_u_i8x16:
+case WebAssembly::BI__builtin_wasm_max_u_i16x8:
+case WebAssembly::BI__builtin_wasm_max_u_i32x4:
+  ICmp = Builder.CreateICmpUGT(LHS, RHS);
+  break;
+default:
+  llvm_unreachable("unexpected builtin ID");
+}
+return Builder.CreateSelect(ICmp, LHS, RHS);
+  }
   case WebAssembly::BI__builtin_wasm_avgr_u_i8x16:
   case WebAssembly::BI__builtin_wasm_avgr_u_i16x8: {
 Value *LHS = EmitScalarExpr(E->getArg(0));

[clang] 8c3e6af - [WebAssembly] Add experimental multivalue calling ABI

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-02-04T21:09:49-08:00
New Revision: 8c3e6af71b8e827655c83997747a2042feddc845

URL: 
https://github.com/llvm/llvm-project/commit/8c3e6af71b8e827655c83997747a2042feddc845
DIFF: 
https://github.com/llvm/llvm-project/commit/8c3e6af71b8e827655c83997747a2042feddc845.diff

LOG: [WebAssembly] Add experimental multivalue calling ABI

Summary:
For now, this ABI simply expands all possible aggregate arguments and
returns all possible aggregates directly. This ABI will change rapidly
as we prototype and benchmark a new ABI that takes advantage of
multivalue return and possibly other changes from the MVP ABI.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72972

Added: 


Modified: 
clang/lib/Basic/Targets/WebAssembly.cpp
clang/lib/Basic/Targets/WebAssembly.h
clang/lib/CodeGen/TargetInfo.cpp
clang/test/CodeGen/wasm-arguments.c

Removed: 




diff  --git a/clang/lib/Basic/Targets/WebAssembly.cpp 
b/clang/lib/Basic/Targets/WebAssembly.cpp
index ef7936762152..6746768090f5 100644
--- a/clang/lib/Basic/Targets/WebAssembly.cpp
+++ b/clang/lib/Basic/Targets/WebAssembly.cpp
@@ -33,6 +33,16 @@ const Builtin::Info WebAssemblyTargetInfo::BuiltinInfo[] = {
 static constexpr llvm::StringLiteral ValidCPUNames[] = {
 {"mvp"}, {"bleeding-edge"}, {"generic"}};
 
+StringRef WebAssemblyTargetInfo::getABI() const { return ABI; }
+
+bool WebAssemblyTargetInfo::setABI(const std::string ) {
+  if (Name != "mvp" && Name != "experimental-mv")
+return false;
+
+  ABI = Name;
+  return true;
+}
+
 bool WebAssemblyTargetInfo::hasFeature(StringRef Feature) const {
   return llvm::StringSwitch(Feature)
   .Case("simd128", SIMDLevel >= SIMD128)

diff  --git a/clang/lib/Basic/Targets/WebAssembly.h 
b/clang/lib/Basic/Targets/WebAssembly.h
index b022b4bb38a0..dd5584960304 100644
--- a/clang/lib/Basic/Targets/WebAssembly.h
+++ b/clang/lib/Basic/Targets/WebAssembly.h
@@ -40,6 +40,8 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public 
TargetInfo {
   bool HasTailCall = false;
   bool HasReferenceTypes = false;
 
+  std::string ABI;
+
 public:
   explicit WebAssemblyTargetInfo(const llvm::Triple , const TargetOptions &)
   : TargetInfo(T) {
@@ -59,6 +61,9 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public 
TargetInfo {
 IntPtrType = SignedLong;
   }
 
+  StringRef getABI() const override;
+  bool setABI(const std::string ) override;
+
 protected:
   void getTargetDefines(const LangOptions ,
 MacroBuilder ) const override;

diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 94d0f3dac70a..a3e3a38a1033 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -726,11 +726,19 @@ ABIArgInfo DefaultABIInfo::classifyReturnType(QualType 
RetTy) const {
 
//===--===//
 
 class WebAssemblyABIInfo final : public SwiftABIInfo {
+public:
+  enum ABIKind {
+MVP = 0,
+ExperimentalMV = 1,
+  };
+
+private:
   DefaultABIInfo defaultInfo;
+  ABIKind Kind;
 
 public:
-  explicit WebAssemblyABIInfo(CodeGen::CodeGenTypes )
-  : SwiftABIInfo(CGT), defaultInfo(CGT) {}
+  explicit WebAssemblyABIInfo(CodeGen::CodeGenTypes , ABIKind Kind)
+  : SwiftABIInfo(CGT), defaultInfo(CGT), Kind(Kind) {}
 
 private:
   ABIArgInfo classifyReturnType(QualType RetTy) const;
@@ -761,8 +769,9 @@ class WebAssemblyABIInfo final : public SwiftABIInfo {
 
 class WebAssemblyTargetCodeGenInfo final : public TargetCodeGenInfo {
 public:
-  explicit WebAssemblyTargetCodeGenInfo(CodeGen::CodeGenTypes )
-  : TargetCodeGenInfo(new WebAssemblyABIInfo(CGT)) {}
+  explicit WebAssemblyTargetCodeGenInfo(CodeGen::CodeGenTypes ,
+WebAssemblyABIInfo::ABIKind K)
+  : TargetCodeGenInfo(new WebAssemblyABIInfo(CGT, K)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override {
@@ -813,6 +822,20 @@ ABIArgInfo 
WebAssemblyABIInfo::classifyArgumentType(QualType Ty) const {
 // though watch out for things like bitfields.
 if (const Type *SeltTy = isSingleElementStruct(Ty, getContext()))
   return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
+// For the experimental multivalue ABI, fully expand all other aggregates
+if (Kind == ABIKind::ExperimentalMV) {
+  const RecordType *RT = Ty->getAs();
+  assert(RT);
+  bool HasBitField = false;
+  for (auto *Field : RT->getDecl()->fields()) {
+if (Field->isBitField()) {
+  HasBitField = true;
+  break;
+}
+  }
+  if (!HasBitField)
+return ABIArgInfo::getExpand();
+}
   }
 
   // Otherwise just do 

[clang] 2774836 - [WebAssembly] Enable recently implemented SIMD operations

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2020-02-04T18:36:32-08:00
New Revision: 27748363da8df9bd952cc0ba5b9c57f51414a07c

URL: 
https://github.com/llvm/llvm-project/commit/27748363da8df9bd952cc0ba5b9c57f51414a07c
DIFF: 
https://github.com/llvm/llvm-project/commit/27748363da8df9bd952cc0ba5b9c57f51414a07c.diff

LOG: [WebAssembly] Enable recently implemented SIMD operations

Summary:
Moves a batch of instructions from unimplemented-simd128 to simd128
because they have recently become available in V8.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, 
cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D73926

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-arith.ll
llvm/test/CodeGen/WebAssembly/simd-bitcasts.ll
llvm/test/CodeGen/WebAssembly/simd-build-pair.ll
llvm/test/CodeGen/WebAssembly/simd-comparisons.ll
llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll
llvm/test/CodeGen/WebAssembly/simd-offset.ll
llvm/test/CodeGen/WebAssembly/simd-scalar-to-vector.ll
llvm/test/CodeGen/WebAssembly/simd.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 38a2441b5fd4..0574af395f7b 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -73,20 +73,20 @@ TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i64_f64, 
"LLid", "nc", "nontrappi
 TARGET_BUILTIN(__builtin_wasm_swizzle_v8x16, "V16cV16cV16c", "nc", 
"unimplemented-simd128")
 
 TARGET_BUILTIN(__builtin_wasm_extract_lane_s_i8x16, "iV16cIi", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_u_i8x16, "iV16cIi", "nc", 
"unimplemented-simd128")
+TARGET_BUILTIN(__builtin_wasm_extract_lane_u_i8x16, "iV16cIi", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_extract_lane_s_i16x8, "iV8sIi", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_u_i16x8, "iV8sIi", "nc", 
"unimplemented-simd128")
+TARGET_BUILTIN(__builtin_wasm_extract_lane_u_i16x8, "iV8sIi", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_extract_lane_i32x4, "iV4iIi", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_i64x2, "LLiV2LLiIi", "nc", 
"unimplemented-simd128")
+TARGET_BUILTIN(__builtin_wasm_extract_lane_i64x2, "LLiV2LLiIi", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_extract_lane_f32x4, "fV4fIi", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_f64x2, "dV2dIi", "nc", 
"unimplemented-simd128")
+TARGET_BUILTIN(__builtin_wasm_extract_lane_f64x2, "dV2dIi", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_replace_lane_i8x16, "V16cV16cIii", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_replace_lane_i16x8, "V8sV8sIii", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_replace_lane_i32x4, "V4iV4iIii", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_replace_lane_i64x2, "V2LLiV2LLiIiLLi", "nc", 
"unimplemented-simd128")
+TARGET_BUILTIN(__builtin_wasm_replace_lane_i64x2, "V2LLiV2LLiIiLLi", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_replace_lane_f32x4, "V4fV4fIif", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_replace_lane_f64x2, "V2dV2dIid", "nc", 
"unimplemented-simd128")
+TARGET_BUILTIN(__builtin_wasm_replace_lane_f64x2, "V2dV2dIid", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_add_saturate_s_i8x16, "V16cV16cV16c", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_add_saturate_u_i8x16, "V16cV16cV16c", "nc", 
"simd128")
@@ -98,8 +98,8 @@ TARGET_BUILTIN(__builtin_wasm_sub_saturate_u_i8x16, 
"V16cV16cV16c", "nc", "simd1
 TARGET_BUILTIN(__builtin_wasm_sub_saturate_s_i16x8, "V8sV8sV8s", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_sub_saturate_u_i16x8, "V8sV8sV8s", "nc", 
"simd128")
 
-TARGET_BUILTIN(__builtin_wasm_avgr_u_i8x16, "V16cV16cV16c", "nc", 
"unimplemented-simd128")
-TARGET_BUILTIN(__builtin_wasm_avgr_u_i16x8, "V8sV8sV8s", "nc", 
"unimplemented-simd128")
+TARGET_BUILTIN(__builtin_wasm_avgr_u_i8x16, "V16cV16cV16c", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_avgr_u_i16x8, "V8sV8sV8s", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")
 
@@ -113,20 +113,20 @@ TARGET_BUILTIN(__builtin_wasm_all_true_i32x4, "iV4i", 
"nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_all_true_i64x2, "iV2LLi", "nc", 
"unimplemented-simd128")
 
 TARGET_BUILTIN(__builtin_wasm_abs_f32x4, "V4fV4f", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_abs_f64x2, "V2dV2d", "nc", 
"unimplemented-simd128")
+TARGET_BUILTIN(__builtin_wasm_abs_f64x2, "V2dV2d", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_min_f32x4, "V4fV4fV4f", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_max_f32x4, "V4fV4fV4f", "nc", "simd128")

[clang] 71eb802 - [WebAssembly] Add avgr_u intrinsics and require nuw in patterns

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2019-12-18T15:31:38-08:00
New Revision: 71eb8023d85e5201d32ea24194ec5bc07db23527

URL: 
https://github.com/llvm/llvm-project/commit/71eb8023d85e5201d32ea24194ec5bc07db23527
DIFF: 
https://github.com/llvm/llvm-project/commit/71eb8023d85e5201d32ea24194ec5bc07db23527.diff

LOG: [WebAssembly] Add avgr_u intrinsics and require nuw in patterns

Summary:
The vector pattern `(a + b + 1) / 2` was previously selected to an
avgr_u instruction regardless of nuw flags, but this is incorrect in
the case where either addition may have an unsigned wrap. This CL
changes the existing pattern to require both adds to have nuw flags
and adds builtin functions and intrinsics for the avgr_u instructions
because the corrected pattern is not representable in C.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, 
cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D71648

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-arith.ll
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 5b4fee421a20..38a2441b5fd4 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -98,6 +98,9 @@ TARGET_BUILTIN(__builtin_wasm_sub_saturate_u_i8x16, 
"V16cV16cV16c", "nc", "simd1
 TARGET_BUILTIN(__builtin_wasm_sub_saturate_s_i16x8, "V8sV8sV8s", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_sub_saturate_u_i16x8, "V8sV8sV8s", "nc", 
"simd128")
 
+TARGET_BUILTIN(__builtin_wasm_avgr_u_i8x16, "V16cV16cV16c", "nc", 
"unimplemented-simd128")
+TARGET_BUILTIN(__builtin_wasm_avgr_u_i16x8, "V8sV8sV8s", "nc", 
"unimplemented-simd128")
+
 TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_any_true_i8x16, "iV16c", "nc", "simd128")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 2e6c95c02c3f..37aca09bff5b 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -14496,6 +14496,14 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_avgr_u_i8x16:
+  case WebAssembly::BI__builtin_wasm_avgr_u_i16x8: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_avgr_unsigned,
+ConvertType(E->getType()));
+return Builder.CreateCall(Callee, {LHS, RHS});
+  }
   case WebAssembly::BI__builtin_wasm_bitselect: {
 Value *V1 = EmitScalarExpr(E->getArg(0));
 Value *V2 = EmitScalarExpr(E->getArg(1));

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index 7ea32feb0512..e8e5ba3fbe09 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -352,6 +352,20 @@ i16x8 sub_saturate_u_i16x8(i16x8 x, i16x8 y) {
   // WEBASSEMBLY-NEXT: ret
 }
 
+i8x16 avgr_u_i8x16(i8x16 x, i8x16 y) {
+  return __builtin_wasm_avgr_u_i8x16(x, y);
+  // WEBASSEMBLY: call <16 x i8> @llvm.wasm.avgr.unsigned.v16i8(
+  // WEBASSEMBLY-SAME: <16 x i8> %x, <16 x i8> %y)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+i16x8 avgr_u_i16x8(i16x8 x, i16x8 y) {
+  return __builtin_wasm_avgr_u_i16x8(x, y);
+  // WEBASSEMBLY: call <8 x i16> @llvm.wasm.avgr.unsigned.v8i16(
+  // WEBASSEMBLY-SAME: <8 x i16> %x, <8 x i16> %y)
+  // WEBASSEMBLY-NEXT: ret
+}
+
 i32x4 dot_i16x8_s(i16x8 x, i16x8 y) {
   return __builtin_wasm_dot_s_i32x4_i16x8(x, y);
   // WEBASSEMBLY: call <4 x i32> @llvm.wasm.dot(<8 x i16> %x, <8 x i16> %y)

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index 99c4eec1e0a3..e97700ad724a 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -112,6 +112,10 @@ def int_wasm_sub_saturate_unsigned :
   Intrinsic<[llvm_anyvector_ty],
 [LLVMMatchType<0>, LLVMMatchType<0>],
 [IntrNoMem, IntrSpeculatable]>;
+def int_wasm_avgr_unsigned :
+  Intrinsic<[llvm_anyvector_ty],
+[LLVMMatchType<0>, LLVMMatchType<0>],
+[IntrNoMem, IntrSpeculatable]>;
 
 def int_wasm_bitselect :
   Intrinsic<[llvm_anyvector_ty],

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td 

[clang] 935c84c - [WebAssembly] Add experimental SIMD dot product instruction

[Thomas Lively via cfe-commits]

Author: Thomas Lively
Date: 2019-11-01T10:45:48-07:00
New Revision: 935c84c3c27de4544917216fc2b0557314802202

URL: 
https://github.com/llvm/llvm-project/commit/935c84c3c27de4544917216fc2b0557314802202
DIFF: 
https://github.com/llvm/llvm-project/commit/935c84c3c27de4544917216fc2b0557314802202.diff

LOG: [WebAssembly] Add experimental SIMD dot product instruction

Summary:
This instruction is not merged to the spec proposal, but we need it to
be implemented in the toolchain to experiment with it. It is available
only on an opt-in basis through a clang builtin.

Defined in https://github.com/WebAssembly/simd/pull/127.

Depends on D69696.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, 
cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D69697

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def 
b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 2233c20c4d64..2c57c5b70ef6 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -132,6 +132,8 @@ TARGET_BUILTIN(__builtin_wasm_max_f32x4, "V4fV4fV4f", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_min_f64x2, "V2dV2dV2d", "nc", 
"unimplemented-simd128")
 TARGET_BUILTIN(__builtin_wasm_max_f64x2, "V2dV2dV2d", "nc", 
"unimplemented-simd128")
 
+TARGET_BUILTIN(__builtin_wasm_dot_s_i32x4_i16x8, "V4iV8sV8s", "nc", "simd128")
+
 TARGET_BUILTIN(__builtin_wasm_sqrt_f32x4, "V4fV4f", "nc", 
"unimplemented-simd128")
 TARGET_BUILTIN(__builtin_wasm_sqrt_f64x2, "V2dV2d", "nc", 
"unimplemented-simd128")
 

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index fef5cab8c8d1..cc2cbb907076 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -14360,6 +14360,12 @@ Value 
*CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
 Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_dot_s_i32x4_i16x8: {
+Value *LHS = EmitScalarExpr(E->getArg(0));
+Value *RHS = EmitScalarExpr(E->getArg(1));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_dot);
+return Builder.CreateCall(Callee, {LHS, RHS});
+  }
   case WebAssembly::BI__builtin_wasm_any_true_i8x16:
   case WebAssembly::BI__builtin_wasm_any_true_i16x8:
   case WebAssembly::BI__builtin_wasm_any_true_i32x4:

diff  --git a/clang/test/CodeGen/builtins-wasm.c 
b/clang/test/CodeGen/builtins-wasm.c
index c07e73fa1af8..eea51eb71b69 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -436,6 +436,12 @@ i32x4 max_u_i32x4(i32x4 x, i32x4 y) {
   // WEBASSEMBLY-NEXT: ret
 }
 
+i32x4 dot_i16x8_s(i16x8 x, i16x8 y) {
+  return __builtin_wasm_dot_s_i32x4_i16x8(x, y);
+  // WEBASSEMBLY: call <4 x i32> @llvm.wasm.dot(<8 x i16> %x, <8 x i16> %y)
+  // WEBASSEMBLY-NEXT: ret
+}
+
 i32x4 bitselect(i32x4 x, i32x4 y, i32x4 c) {
   return __builtin_wasm_bitselect(x, y, c);
   // WEBASSEMBLY: call <4 x i32> @llvm.wasm.bitselect.v4i32(

diff  --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td 
b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index b99abb43d116..422334a78bb4 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -152,6 +152,10 @@ def int_wasm_qfms :
   Intrinsic<[llvm_anyvector_ty],
 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
 [IntrNoMem, IntrSpeculatable]>;
+def int_wasm_dot :
+  Intrinsic<[llvm_v4i32_ty],
+[llvm_v8i16_ty, llvm_v8i16_ty],
+[IntrNoMem, IntrSpeculatable]>;
 def int_wasm_narrow_signed :
   Intrinsic<[llvm_anyvector_ty],
 [llvm_anyvector_ty, LLVMMatchType<1>],

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td 
b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index 2a423acc3016..137234f89b30 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -738,6 +738,13 @@ defm MAX_S : SIMDBinaryIntNoI64x2;
 defm MAX_U : SIMDBinaryIntNoI64x2;
 } // isCommutable = 1
 
+// Widening dot product: i32x4.dot_i16x8_s
+let isCommutable = 1 in
+defm DOT : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs), (outs), (ins),
+  [(set V128:$dst, (int_wasm_dot V128:$lhs, V128:$rhs))],
+  "i32x4.dot_i16x8_s\t$dst, $lhs, $rhs", 

r375199 - [WebAssembly] -pthread implies -target-feature +sign-ext

[Thomas Lively via cfe-commits]

Author: tlively
Date: Thu Oct 17 21:34:26 2019
New Revision: 375199

URL: http://llvm.org/viewvc/llvm-project?rev=375199=rev
Log:
[WebAssembly] -pthread implies -target-feature +sign-ext

Summary:
The sign extension proposal was motivated by a desire to not have
separate sign-extending atomic operations, so it is meant to be
enabled when threads are used.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, jfb, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D69075

Modified:
cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp
cfe/trunk/test/Driver/wasm-toolchain.c

Modified: cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp?rev=375199=375198=375199=diff
==
--- cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp Thu Oct 17 21:34:26 2019
@@ -141,7 +141,7 @@ void WebAssembly::addClangTargetOptions(
  options::OPT_fno_use_init_array, true))
 CC1Args.push_back("-fuse-init-array");
 
-  // '-pthread' implies atomics, bulk-memory, and mutable-globals
+  // '-pthread' implies atomics, bulk-memory, mutable-globals, and sign-ext
   if (DriverArgs.hasFlag(options::OPT_pthread, options::OPT_no_pthread,
  false)) {
 if (DriverArgs.hasFlag(options::OPT_mno_atomics, options::OPT_matomics,
@@ -159,12 +159,19 @@ void WebAssembly::addClangTargetOptions(
   getDriver().Diag(diag::err_drv_argument_not_allowed_with)
   << "-pthread"
   << "-mno-mutable-globals";
+if (DriverArgs.hasFlag(options::OPT_mno_sign_ext, options::OPT_msign_ext,
+   false))
+  getDriver().Diag(diag::err_drv_argument_not_allowed_with)
+  << "-pthread"
+  << "-mno-sign-ext";
 CC1Args.push_back("-target-feature");
 CC1Args.push_back("+atomics");
 CC1Args.push_back("-target-feature");
 CC1Args.push_back("+bulk-memory");
 CC1Args.push_back("-target-feature");
 CC1Args.push_back("+mutable-globals");
+CC1Args.push_back("-target-feature");
+CC1Args.push_back("+sign-ext");
   }
 
   if (DriverArgs.getLastArg(options::OPT_fwasm_exceptions)) {

Modified: cfe/trunk/test/Driver/wasm-toolchain.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/wasm-toolchain.c?rev=375199=375198=375199=diff
==
--- cfe/trunk/test/Driver/wasm-toolchain.c (original)
+++ cfe/trunk/test/Driver/wasm-toolchain.c Thu Oct 17 21:34:26 2019
@@ -48,11 +48,11 @@
 
 // Thread-related command line tests.
 
-// '-pthread' sets +atomics, +bulk-memory, +mutable-globals, and 
--shared-memory
+// '-pthread' sets +atomics, +bulk-memory, +mutable-globals, +sign-ext, and 
--shared-memory
 // RUN: %clang -### -no-canonical-prefixes -target wasm32-unknown-unknown \
 // RUN:--sysroot=/foo %s -fuse-ld=wasm-ld -pthread 2>&1 \
 // RUN:  | FileCheck -check-prefix=PTHREAD %s
-// PTHREAD: clang{{.*}}" "-cc1" {{.*}} "-target-feature" "+atomics" 
"-target-feature" "+bulk-memory" "-target-feature" "+mutable-globals"
+// PTHREAD: clang{{.*}}" "-cc1" {{.*}} "-target-feature" "+atomics" 
"-target-feature" "+bulk-memory" "-target-feature" "+mutable-globals" 
"-target-feature" "+sign-ext"
 // PTHREAD: wasm-ld{{.*}}" "-lpthread" "--shared-memory"
 
 // '-pthread' not allowed with '-mno-atomics'
@@ -73,6 +73,12 @@
 // RUN:   | FileCheck -check-prefix=PTHREAD_NO_MUT_GLOBALS %s
 // PTHREAD_NO_MUT_GLOBALS: invalid argument '-pthread' not allowed with 
'-mno-mutable-globals'
 
+// '-pthread' not allowed with '-mno-sign-ext'
+// RUN: %clang -### -no-canonical-prefixes -target wasm32-unknown-unknown \
+// RUN: --sysroot=/foo %s -pthread -mno-sign-ext 2>&1 \
+// RUN:   | FileCheck -check-prefix=PTHREAD_NO_SIGN_EXT %s
+// PTHREAD_NO_SIGN_EXT: invalid argument '-pthread' not allowed with 
'-mno-sign-ext'
+
 // '-fwasm-exceptions' sets +exception-handling
 // RUN: %clang -### -no-canonical-prefixes -target wasm32-unknown-unknown \
 // RUN:--sysroot=/foo %s -fwasm-exceptions 2>&1 \


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r374856 - [WebAssembly] Trapping fptoint builtins and intrinsics

[Thomas Lively via cfe-commits]

Author: tlively
Date: Mon Oct 14 18:11:51 2019
New Revision: 374856

URL: http://llvm.org/viewvc/llvm-project?rev=374856=rev
Log:
[WebAssembly] Trapping fptoint builtins and intrinsics

Summary:
The WebAssembly backend lowers fptoint instructions to a code sequence
that checks for overflow to avoid traps because fptoint is supposed to
be speculatable. These new builtins and intrinsics give users a way to
depend on the trapping semantics of the underlying instructions and
avoid the extra code generated normally.

Patch by coffee and tlively.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, 
cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D68902

Modified:
cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/test/CodeGen/builtins-wasm.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def?rev=374856=374855=374856=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def Mon Oct 14 18:11:51 
2019
@@ -49,6 +49,16 @@ BUILTIN(__builtin_wasm_atomic_wait_i32,
 BUILTIN(__builtin_wasm_atomic_wait_i64, "iLLi*LLiLLi", "n")
 BUILTIN(__builtin_wasm_atomic_notify, "Uii*Ui", "n")
 
+// Trapping fp-to-int conversions
+BUILTIN(__builtin_wasm_trunc_s_i32_f32, "if", "nc")
+BUILTIN(__builtin_wasm_trunc_u_i32_f32, "if", "nc")
+BUILTIN(__builtin_wasm_trunc_s_i32_f64, "id", "nc")
+BUILTIN(__builtin_wasm_trunc_u_i32_f64, "id", "nc")
+BUILTIN(__builtin_wasm_trunc_s_i64_f32, "LLif", "nc")
+BUILTIN(__builtin_wasm_trunc_u_i64_f32, "LLif", "nc")
+BUILTIN(__builtin_wasm_trunc_s_i64_f64, "LLid", "nc")
+BUILTIN(__builtin_wasm_trunc_u_i64_f64, "LLid", "nc")
+
 // Saturating fp-to-int conversions
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i32_f32, "if", "nc", 
"nontrapping-fptoint")
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i32_f32, "if", "nc", 
"nontrapping-fptoint")

Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=374856=374855=374856=diff
==
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Mon Oct 14 18:11:51 2019
@@ -14020,6 +14020,26 @@ Value *CodeGenFunction::EmitWebAssemblyB
 Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_atomic_notify);
 return Builder.CreateCall(Callee, {Addr, Count});
   }
+  case WebAssembly::BI__builtin_wasm_trunc_s_i32_f32:
+  case WebAssembly::BI__builtin_wasm_trunc_s_i32_f64:
+  case WebAssembly::BI__builtin_wasm_trunc_s_i64_f32:
+  case WebAssembly::BI__builtin_wasm_trunc_s_i64_f64: {
+Value *Src = EmitScalarExpr(E->getArg(0));
+llvm::Type *ResT = ConvertType(E->getType());
+Function *Callee =
+CGM.getIntrinsic(Intrinsic::wasm_trunc_signed, {ResT, Src->getType()});
+return Builder.CreateCall(Callee, {Src});
+  }
+  case WebAssembly::BI__builtin_wasm_trunc_u_i32_f32:
+  case WebAssembly::BI__builtin_wasm_trunc_u_i32_f64:
+  case WebAssembly::BI__builtin_wasm_trunc_u_i64_f32:
+  case WebAssembly::BI__builtin_wasm_trunc_u_i64_f64: {
+Value *Src = EmitScalarExpr(E->getArg(0));
+llvm::Type *ResT = ConvertType(E->getType());
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_trunc_unsigned,
+{ResT, Src->getType()});
+return Builder.CreateCall(Callee, {Src});
+  }
   case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32_f32:
   case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32_f64:
   case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i64_f32:

Modified: cfe/trunk/test/CodeGen/builtins-wasm.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-wasm.c?rev=374856=374855=374856=diff
==
--- cfe/trunk/test/CodeGen/builtins-wasm.c (original)
+++ cfe/trunk/test/CodeGen/builtins-wasm.c Mon Oct 14 18:11:51 2019
@@ -85,6 +85,54 @@ unsigned int atomic_notify(int *addr, un
   // WEBASSEMBLY64: call i32 @llvm.wasm.atomic.notify(i32* %{{.*}}, i32 
%{{.*}})
 }
 
+int trunc_s_i32_f32(float f) {
+  return __builtin_wasm_trunc_s_i32_f32(f);
+  // WEBASSEMBLY: call i32 @llvm.wasm.trunc.signed.i32.f32(float %f)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+int trunc_u_i32_f32(float f) {
+  return __builtin_wasm_trunc_u_i32_f32(f);
+  // WEBASSEMBLY: call i32 @llvm.wasm.trunc.unsigned.i32.f32(float %f)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+int trunc_s_i32_f64(double f) {
+  return __builtin_wasm_trunc_s_i32_f64(f);
+  // WEBASSEMBLY: call i32 @llvm.wasm.trunc.signed.i32.f64(double %f)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+int trunc_u_i32_f64(double f) 

r374189 - [WebAssembly] Add builtin and intrinsic for v8x16.swizzle

[Thomas Lively via cfe-commits]

Author: tlively
Date: Wed Oct  9 10:45:47 2019
New Revision: 374189

URL: http://llvm.org/viewvc/llvm-project?rev=374189=rev
Log:
[WebAssembly] Add builtin and intrinsic for v8x16.swizzle

Summary:
This clang builtin and corresponding LLVM intrinsic are necessary to
expose the exact semantics of the underlying WebAssembly instruction
to users. LLVM produces a poison value if the dynamic swizzle indices
are greater than the vector size, but the WebAssembly instruction sets
the corresponding output lane to zero. Users who depend on this
behavior can safely use this builtin.

Depends on D68527.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, 
llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D68531

Modified:
cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/test/CodeGen/builtins-wasm.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def?rev=374189=374188=374189=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def Wed Oct  9 10:45:47 
2019
@@ -60,6 +60,8 @@ TARGET_BUILTIN(__builtin_wasm_trunc_satu
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i64_f64, "LLid", "nc", 
"nontrapping-fptoint")
 
 // SIMD builtins
+TARGET_BUILTIN(__builtin_wasm_swizzle_v8x16, "V16cV16cV16c", "nc", 
"unimplemented-simd128")
+
 TARGET_BUILTIN(__builtin_wasm_extract_lane_s_i8x16, "iV16cIi", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_extract_lane_u_i8x16, "iV16cIi", "nc", 
"unimplemented-simd128")
 TARGET_BUILTIN(__builtin_wasm_extract_lane_s_i16x8, "iV8sIi", "nc", "simd128")

Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=374189=374188=374189=diff
==
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Wed Oct  9 10:45:47 2019
@@ -14066,6 +14066,12 @@ Value *CodeGenFunction::EmitWebAssemblyB
  ConvertType(E->getType()));
 return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_swizzle_v8x16: {
+Value *Src = EmitScalarExpr(E->getArg(0));
+Value *Indices = EmitScalarExpr(E->getArg(1));
+Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_swizzle);
+return Builder.CreateCall(Callee, {Src, Indices});
+  }
   case WebAssembly::BI__builtin_wasm_extract_lane_s_i8x16:
   case WebAssembly::BI__builtin_wasm_extract_lane_u_i8x16:
   case WebAssembly::BI__builtin_wasm_extract_lane_s_i16x8:

Modified: cfe/trunk/test/CodeGen/builtins-wasm.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-wasm.c?rev=374189=374188=374189=diff
==
--- cfe/trunk/test/CodeGen/builtins-wasm.c (original)
+++ cfe/trunk/test/CodeGen/builtins-wasm.c Wed Oct  9 10:45:47 2019
@@ -157,7 +157,6 @@ double max_f64(double x, double y) {
   // WEBASSEMBLY-NEXT: ret
 }
 
-
 int extract_lane_s_i8x16(i8x16 v) {
   return __builtin_wasm_extract_lane_s_i8x16(v, 13);
   // MISSING-SIMD: error: '__builtin_wasm_extract_lane_s_i8x16' needs target 
feature simd128
@@ -539,3 +538,9 @@ i32x4 widen_high_u_i32x4_i16x8(i16x8 v)
   // WEBASSEMBLY: call <4 x i32> @llvm.wasm.widen.high.unsigned.v4i32.v8i16(<8 
x i16> %v)
   // WEBASSEMBLY: ret
 }
+
+i8x16 swizzle_v8x16(i8x16 x, i8x16 y) {
+  return __builtin_wasm_swizzle_v8x16(x, y);
+  // WEBASSEMBLY: call <16 x i8> @llvm.wasm.swizzle(<16 x i8> %x, <16 x i8> %y)
+  // WEBASSEMBLY-NEXT: ret
+}


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r371906 - [WebAssembly] Narrowing and widening SIMD ops

[Thomas Lively via cfe-commits]

Author: tlively
Date: Fri Sep 13 15:54:41 2019
New Revision: 371906

URL: http://llvm.org/viewvc/llvm-project?rev=371906=rev
Log:
[WebAssembly] Narrowing and widening SIMD ops

Summary:
Implements target-specific LLVM intrinsics and clang builtins for
these new SIMD operations, as described at 
https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#integer-to-integer-narrowing.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, 
cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D67425

Modified:
cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/test/CodeGen/builtins-wasm.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def?rev=371906=371905=371906=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def Fri Sep 13 15:54:41 
2019
@@ -118,5 +118,19 @@ TARGET_BUILTIN(__builtin_wasm_trunc_satu
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i64x2_f64x2, "V2LLiV2d", "nc", 
"unimplemented-simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i64x2_f64x2, "V2LLiV2d", "nc", 
"unimplemented-simd128")
 
+TARGET_BUILTIN(__builtin_wasm_narrow_s_i8x16_i16x8, "V16cV8sV8s", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, "V16cV8sV8s", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8sV4iV4i", "nc", 
"simd128")
+
+TARGET_BUILTIN(__builtin_wasm_widen_low_s_i16x8_i8x16, "V8sV16c", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_widen_high_s_i16x8_i8x16, "V8sV16c", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_widen_low_u_i16x8_i8x16, "V8sV16c", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_widen_high_u_i16x8_i8x16, "V8sV16c", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_widen_low_s_i32x4_i16x8, "V4iV8s", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i16x8, "V4iV8s", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i16x8, "V4iV8s", "nc", 
"simd128")
+TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i16x8, "V4iV8s", "nc", 
"simd128")
+
 #undef BUILTIN
 #undef TARGET_BUILTIN

Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=371906=371905=371906=diff
==
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Fri Sep 13 15:54:41 2019
@@ -14196,6 +14196,63 @@ Value *CodeGenFunction::EmitWebAssemblyB
 Function *Callee = CGM.getIntrinsic(IntNo, A->getType());
 return Builder.CreateCall(Callee, {A, B, C});
   }
+  case WebAssembly::BI__builtin_wasm_narrow_s_i8x16_i16x8:
+  case WebAssembly::BI__builtin_wasm_narrow_u_i8x16_i16x8:
+  case WebAssembly::BI__builtin_wasm_narrow_s_i16x8_i32x4:
+  case WebAssembly::BI__builtin_wasm_narrow_u_i16x8_i32x4: {
+Value *Low = EmitScalarExpr(E->getArg(0));
+Value *High = EmitScalarExpr(E->getArg(1));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_narrow_s_i8x16_i16x8:
+case WebAssembly::BI__builtin_wasm_narrow_s_i16x8_i32x4:
+  IntNo = Intrinsic::wasm_narrow_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_narrow_u_i8x16_i16x8:
+case WebAssembly::BI__builtin_wasm_narrow_u_i16x8_i32x4:
+  IntNo = Intrinsic::wasm_narrow_unsigned;
+  break;
+default:
+  llvm_unreachable("unexpected builtin ID");
+}
+Function *Callee =
+CGM.getIntrinsic(IntNo, {ConvertType(E->getType()), Low->getType()});
+return Builder.CreateCall(Callee, {Low, High});
+  }
+  case WebAssembly::BI__builtin_wasm_widen_low_s_i16x8_i8x16:
+  case WebAssembly::BI__builtin_wasm_widen_high_s_i16x8_i8x16:
+  case WebAssembly::BI__builtin_wasm_widen_low_u_i16x8_i8x16:
+  case WebAssembly::BI__builtin_wasm_widen_high_u_i16x8_i8x16:
+  case WebAssembly::BI__builtin_wasm_widen_low_s_i32x4_i16x8:
+  case WebAssembly::BI__builtin_wasm_widen_high_s_i32x4_i16x8:
+  case WebAssembly::BI__builtin_wasm_widen_low_u_i32x4_i16x8:
+  case WebAssembly::BI__builtin_wasm_widen_high_u_i32x4_i16x8: {
+Value *Vec = EmitScalarExpr(E->getArg(0));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_widen_low_s_i16x8_i8x16:
+case WebAssembly::BI__builtin_wasm_widen_low_s_i32x4_i16x8:
+  IntNo = Intrinsic::wasm_widen_low_signed;
+  break;
+case WebAssembly::BI__builtin_wasm_widen_high_s_i16x8_i8x16:
+case WebAssembly::BI__builtin_wasm_widen_high_s_i32x4_i16x8:
+  IntNo = 

r370556 - [WebAssembly] Add SIMD QFMA/QFMS

[Thomas Lively via cfe-commits]

Author: tlively
Date: Fri Aug 30 17:12:29 2019
New Revision: 370556

URL: http://llvm.org/viewvc/llvm-project?rev=370556=rev
Log:
[WebAssembly] Add SIMD QFMA/QFMS

Summary:
Adds clang builtins and LLVM intrinsics for these experimental
instructions. They are not implemented in engines yet, but that is ok
because the user must opt into using them by calling the builtins.

Reviewers: aheejin, dschuff

Reviewed By: aheejin

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, 
llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D67020

Modified:
cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/test/CodeGen/builtins-wasm.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def?rev=370556=370555=370556=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def Fri Aug 30 17:12:29 
2019
@@ -108,6 +108,11 @@ TARGET_BUILTIN(__builtin_wasm_max_f64x2,
 TARGET_BUILTIN(__builtin_wasm_sqrt_f32x4, "V4fV4f", "nc", 
"unimplemented-simd128")
 TARGET_BUILTIN(__builtin_wasm_sqrt_f64x2, "V2dV2d", "nc", 
"unimplemented-simd128")
 
+TARGET_BUILTIN(__builtin_wasm_qfma_f32x4, "V4fV4fV4fV4f", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_qfms_f32x4, "V4fV4fV4fV4f", "nc", "simd128")
+TARGET_BUILTIN(__builtin_wasm_qfma_f64x2, "V2dV2dV2dV2d", "nc", 
"unimplemented-simd128")
+TARGET_BUILTIN(__builtin_wasm_qfms_f64x2, "V2dV2dV2dV2d", "nc", 
"unimplemented-simd128")
+
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i32x4_f32x4, "V4iV4f", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i32x4_f32x4, "V4iV4f", "nc", 
"simd128")
 TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i64x2_f64x2, "V2LLiV2d", "nc", 
"unimplemented-simd128")

Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=370556=370555=370556=diff
==
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Fri Aug 30 17:12:29 2019
@@ -14173,7 +14173,29 @@ Value *CodeGenFunction::EmitWebAssemblyB
 Function *Callee = CGM.getIntrinsic(Intrinsic::sqrt, Vec->getType());
 return Builder.CreateCall(Callee, {Vec});
   }
-
+  case WebAssembly::BI__builtin_wasm_qfma_f32x4:
+  case WebAssembly::BI__builtin_wasm_qfms_f32x4:
+  case WebAssembly::BI__builtin_wasm_qfma_f64x2:
+  case WebAssembly::BI__builtin_wasm_qfms_f64x2: {
+Value *A = EmitScalarExpr(E->getArg(0));
+Value *B = EmitScalarExpr(E->getArg(1));
+Value *C = EmitScalarExpr(E->getArg(2));
+unsigned IntNo;
+switch (BuiltinID) {
+case WebAssembly::BI__builtin_wasm_qfma_f32x4:
+case WebAssembly::BI__builtin_wasm_qfma_f64x2:
+  IntNo = Intrinsic::wasm_qfma;
+  break;
+case WebAssembly::BI__builtin_wasm_qfms_f32x4:
+case WebAssembly::BI__builtin_wasm_qfms_f64x2:
+  IntNo = Intrinsic::wasm_qfms;
+  break;
+default:
+  llvm_unreachable("unexpected builtin ID");
+}
+Function *Callee = CGM.getIntrinsic(IntNo, A->getType());
+return Builder.CreateCall(Callee, {A, B, C});
+  }
   default:
 return nullptr;
   }

Modified: cfe/trunk/test/CodeGen/builtins-wasm.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-wasm.c?rev=370556=370555=370556=diff
==
--- cfe/trunk/test/CodeGen/builtins-wasm.c (original)
+++ cfe/trunk/test/CodeGen/builtins-wasm.c Fri Aug 30 17:12:29 2019
@@ -412,6 +412,34 @@ f64x2 sqrt_f64x2(f64x2 x) {
   // WEBASSEMBLY: ret
 }
 
+f32x4 qfma_f32x4(f32x4 a, f32x4 b, f32x4 c) {
+  return __builtin_wasm_qfma_f32x4(a, b, c);
+  // WEBASSEMBLY: call <4 x float> @llvm.wasm.qfma.v4f32(
+  // WEBASSEMBLY-SAME: <4 x float> %a, <4 x float> %b, <4 x float> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+f32x4 qfms_f32x4(f32x4 a, f32x4 b, f32x4 c) {
+  return __builtin_wasm_qfms_f32x4(a, b, c);
+  // WEBASSEMBLY: call <4 x float> @llvm.wasm.qfms.v4f32(
+  // WEBASSEMBLY-SAME: <4 x float> %a, <4 x float> %b, <4 x float> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+f64x2 qfma_f64x2(f64x2 a, f64x2 b, f64x2 c) {
+  return __builtin_wasm_qfma_f64x2(a, b, c);
+  // WEBASSEMBLY: call <2 x double> @llvm.wasm.qfma.v2f64(
+  // WEBASSEMBLY-SAME: <2 x double> %a, <2 x double> %b, <2 x double> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
+f64x2 qfms_f64x2(f64x2 a, f64x2 b, f64x2 c) {
+  return __builtin_wasm_qfms_f64x2(a, b, c);
+  // WEBASSEMBLY: call <2 x double> @llvm.wasm.qfms.v2f64(
+  // WEBASSEMBLY-SAME: <2 x double> %a, <2 x double> %b, <2 x double> %c)
+  // WEBASSEMBLY-NEXT: ret
+}
+
 i32x4 

r365935 - [WebAssembly] Make pthread imply bulk-memory, mutable-globals

[Thomas Lively via cfe-commits]

Author: tlively
Date: Fri Jul 12 11:23:13 2019
New Revision: 365935

URL: http://llvm.org/viewvc/llvm-project?rev=365935=rev
Log:
[WebAssembly] Make pthread imply bulk-memory, mutable-globals

Summary:
This paves the way for using passive segments in pthread builds, which
will make separate memory files unnecessary. Mutable globals are also
necessary for the upcoming implementation of TLS.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, jfb, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64586

Modified:
cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp
cfe/trunk/test/Driver/wasm-toolchain.c

Modified: cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp?rev=365935=365934=365935=diff
==
--- cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp Fri Jul 12 11:23:13 2019
@@ -141,7 +141,7 @@ void WebAssembly::addClangTargetOptions(
  options::OPT_fno_use_init_array, true))
 CC1Args.push_back("-fuse-init-array");
 
-  // '-pthread' implies '-target-feature +atomics'
+  // '-pthread' implies atomics, bulk-memory, and mutable-globals
   if (DriverArgs.hasFlag(options::OPT_pthread, options::OPT_no_pthread,
  false)) {
 if (DriverArgs.hasFlag(options::OPT_mno_atomics, options::OPT_matomics,
@@ -149,8 +149,22 @@ void WebAssembly::addClangTargetOptions(
   getDriver().Diag(diag::err_drv_argument_not_allowed_with)
   << "-pthread"
   << "-mno-atomics";
+if (DriverArgs.hasFlag(options::OPT_mno_bulk_memory,
+   options::OPT_mbulk_memory, false))
+  getDriver().Diag(diag::err_drv_argument_not_allowed_with)
+  << "-pthread"
+  << "-mno-bulk-memory";
+if (DriverArgs.hasFlag(options::OPT_mno_mutable_globals,
+   options::OPT_mmutable_globals, false))
+  getDriver().Diag(diag::err_drv_argument_not_allowed_with)
+  << "-pthread"
+  << "-mno-mutable-globals";
 CC1Args.push_back("-target-feature");
 CC1Args.push_back("+atomics");
+CC1Args.push_back("-target-feature");
+CC1Args.push_back("+bulk-memory");
+CC1Args.push_back("-target-feature");
+CC1Args.push_back("+mutable-globals");
   }
 }
 

Modified: cfe/trunk/test/Driver/wasm-toolchain.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/wasm-toolchain.c?rev=365935=365934=365935=diff
==
--- cfe/trunk/test/Driver/wasm-toolchain.c (original)
+++ cfe/trunk/test/Driver/wasm-toolchain.c Fri Jul 12 11:23:13 2019
@@ -48,11 +48,11 @@
 
 // Thread-related command line tests.
 
-// '-pthread' sets '-target-feature +atomics' and '--shared-memory'
+// '-pthread' sets +atomics, +bulk-memory, +mutable-globals, and 
--shared-memory
 // RUN: %clang -### -no-canonical-prefixes -target wasm32-unknown-unknown \
 // RUN:--sysroot=/foo %s -fuse-ld=wasm-ld -pthread 2>&1 \
 // RUN:  | FileCheck -check-prefix=PTHREAD %s
-// PTHREAD: clang{{.*}}" "-cc1" {{.*}} "-target-feature" "+atomics"
+// PTHREAD: clang{{.*}}" "-cc1" {{.*}} "-target-feature" "+atomics" 
"-target-feature" "+bulk-memory" "-target-feature" "+mutable-globals"
 // PTHREAD: wasm-ld{{.*}}" "-lpthread" "--shared-memory"
 
 // '-pthread' not allowed with '-mno-atomics'
@@ -61,6 +61,18 @@
 // RUN:   | FileCheck -check-prefix=PTHREAD_NO_ATOMICS %s
 // PTHREAD_NO_ATOMICS: invalid argument '-pthread' not allowed with 
'-mno-atomics'
 
+// '-pthread' not allowed with '-mno-bulk-memory'
+// RUN: %clang -### -no-canonical-prefixes -target wasm32-unknown-unknown \
+// RUN: --sysroot=/foo %s -pthread -mno-bulk-memory 2>&1 \
+// RUN:   | FileCheck -check-prefix=PTHREAD_NO_BULK_MEM %s
+// PTHREAD_NO_BULK_MEM: invalid argument '-pthread' not allowed with 
'-mno-bulk-memory'
+
+// '-pthread' not allowed with '-mno-mutable-globals'
+// RUN: %clang -### -no-canonical-prefixes -target wasm32-unknown-unknown \
+// RUN: --sysroot=/foo %s -pthread -mno-mutable-globals 2>&1 \
+// RUN:   | FileCheck -check-prefix=PTHREAD_NO_MUT_GLOBALS %s
+// PTHREAD_NO_MUT_GLOBALS: invalid argument '-pthread' not allowed with 
'-mno-mutable-globals'
+
 // RUN: %clang %s -### -fsanitize=address -target wasm32-unknown-emscripten 
2>&1 | FileCheck -check-prefix=CHECK-ASAN-EMSCRIPTEN %s
 // CHECK-ASAN-EMSCRIPTEN: "-fsanitize=address"
 // CHECK-ASAN-EMSCRIPTEN: "-fsanitize-address-globals-dead-stripping"


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r362667 - [WebAssembly] Support Leak Sanitizer on Emscripten

[Thomas Lively via cfe-commits]

Author: tlively
Date: Wed Jun  5 18:38:12 2019
New Revision: 362667

URL: http://llvm.org/viewvc/llvm-project?rev=362667=rev
Log:
[WebAssembly] Support Leak Sanitizer on Emscripten

Summary:
LSan is currently being ported to Emscripten and mostly works.

Enabling the support in upstream would simplify testing.

Patch by Guanzhong Chen.

Reviewers: tlively, aheejin

Reviewed By: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D62830

Modified:
cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp

Modified: cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp?rev=362667=362666=362667=diff
==
--- cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/WebAssembly.cpp Wed Jun  5 18:38:12 2019
@@ -211,7 +211,7 @@ void WebAssembly::AddCXXStdlibLibArgs(co
 SanitizerMask WebAssembly::getSupportedSanitizers() const {
   SanitizerMask Res = ToolChain::getSupportedSanitizers();
   if (getTriple().isOSEmscripten()) {
-Res |= SanitizerKind::Vptr;
+Res |= SanitizerKind::Vptr | SanitizerKind::Leak;
   }
   return Res;
 }


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