for dcn301
- Add VCO parameter for DCN31 FPU
- Fix problems reported by Coverity
Acked-by: Wayne Lin
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd
From: Sung Joon Kim
[why]
preOS will not support display mode programming and link training
for UHBR rates.
[how]
If we detect a sink that's UHBR capable, disable seamless boot
Reviewed-by: Anthony Koo
Acked-by: Wayne Lin
Signed-off-by: Sung Joon Kim
---
drivers/gpu/drm/amd/display/dc/core
From: Alex Hung
This fixes 29 UNINIT issues reported by Coverity.
Reviewed-by: Hersen Wu
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/bios/command_table.c | 2 +-
drivers/gpu/drm/amd/display/dc/bios/command_table2.c | 2 +-
drivers/gpu
From: Swapnil Patel
[Why]
Currently disabling ASSR before stream is disabled causes visible
display corruption.
[How]
Move disable ASSR command to after stream has been disabled.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Wenjing Liu
Acked-by: Wayne Lin
From: Roman Li
[Why]
HPD interrupt cannot be handled in IPS2 state.
So if there's a display topology change while system in IPS2
it can be missed.
[How]
Implement worker to check each 5 sec in IPS for HPD.
Reviewed-by: Hamza Mahfooz
Acked-by: Wayne Lin
Signed-off-by: Roman Li
---
.../gpu
-by: Duncan Ma
Acked-by: Wayne Lin
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 30 +++
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 10 +++
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 +
.../gpu/drm/amd/display/dmub/inc
From: Joan Lee
[why & how]
Enable Replay for DCN315.
Reviewed-by: Robin Chen
Acked-by: Wayne Lin
Signed-off-by: Joan Lee
---
.../amd/display/dc/resource/dcn315/dcn315_resource.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dc
From: Wenjing Liu
[why]
When optc uses two pixel per container, each ODM slice width must be an
even number.
[how]
If ODM slice width is odd number increase it by 1.
Reviewed-by: Dillon Varone
Acked-by: Wayne Lin
Signed-off-by: Wenjing Liu
---
.../gpu/drm/amd/display/dc/core/dc_resource.c
Acked-by: Wayne Lin
Signed-off-by: Ilya Bakoulin
---
.../amd/display/dc/link/protocols/link_dp_phy.c| 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c
b/drivers/gpu/drm/amd/display/dc/link/protocols
From: Alex Hung
This fixes 49 UNINIT issues reported by Coverity.
Reviewed-by: Hersen Wu
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 4 ++--
.../gpu/drm/amd/display/dc/core/dc_resource.c| 2 +-
drivers/gpu/drm/amd/display/dc
From: Alex Hung
This fixes 11 UNINIT issues reported by Coverity.
Reviewed-by: Hersen Wu
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 4 ++--
2 files
)
where the desktop plane has vactive margin, and the video plane
does not.
Reviewed-by: Samson Tam
Reviewed-by: Chaitanya Dhere
Acked-by: Wayne Lin
Signed-off-by: Alvin Lee
---
.../display/dc/dcn32/dcn32_resource_helpers.c | 2 +-
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 20
From: Nevenko Stupar
[Why & How]
Currently in DML2.1 gpuvm_enable was hardcoded.
Use passed info from DC for DML21 to be in sync with
what is used in DC.
Reviewed-by: Chaitanya Dhere
Acked-by: Wayne Lin
Signed-off-by: Nevenko Stupar
---
drivers/gpu/drm/amd/display/dc/core/dc_vm_help
From: Alvin Lee
[Description]
Assign linear_pitch_alignment so we don't cause a divide by 0
error in VM environments
Reviewed-by: Sohaib Nadeem
Acked-by: Wayne Lin
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Revalla Hari Krishna
[why]
cleaning up the code refactor requires hubbub to be in its own component.
[how]
Move all files under newly created hubbub folder and fix the makefiles.
Reviewed-by: Martin Leung
Acked-by: Wayne Lin
Signed-off-by: Revalla Hari Krishna
---
drivers/gpu/drm/amd
was not previously Subvp or FPO. The assumption
is that the P-State force register should be programmed correctly the first
time SubVP / FPO was enabled, so there's no need to update / reset it if the
pipe config has never exited SubVP / FPO.
Reviewed-by: Samson Tam
Acked-by: Wayne Lin
Signed-off-by: Alvin
From: Alex Hung
This fixes 1 PW.INCLUDE_RECURSION reported by Coverity.
"./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h"
includes itself: dc_types.h -> dal_types.h -> dc_types.h
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/include/dal_
From: Webb Chen
This reverts commit f7131558f362 ("drm/amd/display: Keep VBios pixel rate div
setting util next mode set") which causes issue.
Reviewed-by: Charlene Liu
Acked-by: Wayne Lin
Signed-off-by: Webb Chen
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 4 --
.
From: Daniel Miess
[Why & How]
Enable root clock optimization for PHYSYMCLK and only
disable it when it's actively being used
Reviewed-by: Charlene Liu
Acked-by: Wayne Lin
Signed-off-by: Daniel Miess
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
.../gpu/drm/amd/display/dc/d
over to DCN35.
Reviewed-by: Charlene Liu
Acked-by: Wayne Lin
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c | 10 ++
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c | 2 ++
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu
From: Roman Li
[Why]
IPS stability was fixed in bios.
[How]
Set disable_ips init flag to DMUB_IPS_ENABLE.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Wayne Lin
Signed-off-by: Roman Li
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
From: Wenjing Liu
[why]
DSC slice must be divisible by ODM slice count.
[how]
If DSC slice count is not a multiple of ODM slice count, increase DSC
slice until it is. Otherwise fail to compute DSC configuration.
Reviewed-by: Chaitanya Dhere
Acked-by: Wayne Lin
Signed-off-by: Wenjing Liu
From: Leo Ma
[Why && How]
Screen flickering saw on 4K@60 eDP with high refresh rate external
monitor when booting up in DC mode. DC Mode Capping is disabled
which caused wrong UCLK being used.
Reviewed-by: Alvin Lee
Acked-by: Wayne Lin
Signed-off-by: Leo Ma
---
.../amd/display/dc
From: Wayne Lin
[Why]
Like commit ec5fa9fcdeca ("drm/amd/display: Adjust the MST resume flow"), we
want to avoid handling mst topology changes before restoring the old state.
If we enable DP_UP_REQ_EN before calling drm_atomic_helper_resume(), have
changce to handle CSN event firs
-by: Wayne Lin
Signed-off-by: Iswara Nagulendran
---
drivers/gpu/drm/amd/display/dc/dc.h | 8 +++-
.../gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c | 4 +++-
.../drm/amd/display/dc/resource/dcn30/dcn30_resource.c| 2 +-
3 files changed, 11 insertions(+), 3
From: Dennis Chan
[why]
To refine for link off frame count in diagnose tool,
the driver show the link off frame count number instead of showing link
off frame count level.
Reviewed-by: ChunTao Tso
Reviewed-by: Robin Chen
Acked-by: Wayne Lin
Signed-off-by: Dennis Chan
---
drivers/gpu/drm
From: Rodrigo Siqueira
Add code to handle case when quad_part is 0 in gpu_addr_to_uma().
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc
From: Rodrigo Siqueira
Set up to enable log color state for multiple DCNs.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_init.c | 1 +
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_init.c | 1 +
drivers/gpu/drm/amd/display/dc
From: Rodrigo Siqueira
This commit just remove some trivial legacy code in some of the DC
files.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 12
drivers/gpu/drm/amd/display/dc/hwss/Makefile | 6
From: Rodrigo Siqueira
Adjust to update some of the dcn303 parameters.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/resource/dcn303/dcn303_resource.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc
From: Rodrigo Siqueira
Set up to enable legacy fast update.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn301
From: Rodrigo Siqueira
Add dcn301_fpu prefix to some of the FPU function with the required
adjustments.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/dml/dcn301/dcn301_fpu.c| 4 ++--
.../amd/display/dc/dml/dcn301/dcn301_fpu.h| 7 +++
.../dc/resource
From: Rodrigo Siqueira
Add VCO speed parameters in the bounding box array.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
From: Rodrigo Siqueira
This commit just update the code style in two if conditions and in an
static array.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 8
drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c | 2 +-
2
From: Rodrigo Siqueira
This commit add PP_SMU_VER_VG to the pp_smu_ver list.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dm_pp_smu.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
b
From: Rodrigo Siqueira
Add REG_SEQ_SUBMIT and REG_SEQ_WAIT_DONE to optimize the burst write for
the regama lut.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
[Why & How]
We accidentally upstream unnecessary files. Remove them.
Reviewed-by: Tom Chung
Signed-off-by: Wayne Lin
---
drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt | 6 --
drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt | 5 -
drivers/gpu/drm/amd/displa
) instead.
This fixes 4 OVERRUN and 2 NEGATIVE_RETURNS issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
From: Hersen Wu
[WHY]
_lib->mp.Watermark and >Watermark are
the same address. memcpy may lead to unexpected behavior.
[HOW]
memmove should be used.
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Reviewed-by: Alex Hung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/d
From: Alex Hung
[WHY]
ENGINE_ID_UNKNOWN = -1 and can not be used as an array index. Plus, it
also means it is uninitialized and does not need free audio.
[HOW]
Skip and return NULL.
This fixes 2 OVERRUN issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Signed
From: Alex Hung
pipe_ctx has a size of MAX_PIPES so checking its index before accessing
the array.
This fixes an OVERRUN issue reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
.../drm/amd/display/dc/irq/dce110/irq_service_dce110.c| 8
Siqueira
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c
b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c
index f7b5583ee609
From: Hersen Wu
[Why & How]
Check return pointer of kzalloc before using it.
Reviewed-by: Alex Hung
Acked-by: Wayne Lin
Signed-off-by: Hersen Wu
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 8
.../gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
-by: Agustin Gutierrez
Reviewed-by: Sun peng Li
Acked-by: Wayne Lin
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd
/drm/amd/-/issues/2186
Reviewed-by: Agustin Gutierrez
Acked-by: Wayne Lin
Signed-off-by: Harry Wentland
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 79 ++-
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 4 +-
.../amd/display/amdgpu_dm/amdgpu_dm_plane.h | 3
boot on 128b/132b encoding
Swapnil Patel (1):
drm/amd/display: Change ASSR disable sequence
Wayne Lin (2):
drm/amd/display: Remove unnecessary files
drm/amd/display: Defer handling mst up request in resume
Webb Chen (1):
drm/amd/display: Revert "dc: Keep VBios pixel rate div setting
From: Rodrigo Siqueira
Add dcn301_fpu prefix to some of the FPU function with the required
adjustments.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/dml/dcn301/dcn301_fpu.c| 4 ++--
.../amd/display/dc/dml/dcn301/dcn301_fpu.h| 7 +++
.../dc/resource
From: Rodrigo Siqueira
Add VCO speed parameters in the bounding box array.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
From: Rodrigo Siqueira
This commit just update the code style in two if conditions and in an
static array.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 8
drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c | 2 +-
2
From: Rodrigo Siqueira
This commit add PP_SMU_VER_VG to the pp_smu_ver list.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dm_pp_smu.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
b
From: Rodrigo Siqueira
Add REG_SEQ_SUBMIT and REG_SEQ_WAIT_DONE to optimize the burst write for
the regama lut.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
[Why & How]
We accidentally upstream unnecessary files. Remove them.
Reviewed-by: Tom Chung
Signed-off-by: Wayne Lin
---
drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt | 6 --
drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt | 5 -
drivers/gpu/drm/amd/displa
) instead.
This fixes 4 OVERRUN and 2 NEGATIVE_RETURNS issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
From: Hersen Wu
[WHY]
_lib->mp.Watermark and >Watermark are
the same address. memcpy may lead to unexpected behavior.
[HOW]
memmove should be used.
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Reviewed-by: Alex Hung
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/d
From: Alex Hung
[WHY]
ENGINE_ID_UNKNOWN = -1 and can not be used as an array index. Plus, it
also means it is uninitialized and does not need free audio.
[HOW]
Skip and return NULL.
This fixes 2 OVERRUN issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Signed
From: Alex Hung
pipe_ctx has a size of MAX_PIPES so checking its index before accessing
the array.
This fixes an OVERRUN issue reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
.../drm/amd/display/dc/irq/dce110/irq_service_dce110.c| 8
Siqueira
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c
b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c
index f7b5583ee609
From: Hersen Wu
[Why & How]
Check return pointer of kzalloc before using it.
Reviewed-by: Alex Hung
Acked-by: Wayne Lin
Signed-off-by: Hersen Wu
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 8
.../gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
-by: Agustin Gutierrez
Reviewed-by: Sun peng Li
Acked-by: Wayne Lin
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd
/drm/amd/-/issues/2186
Reviewed-by: Agustin Gutierrez
Acked-by: Wayne Lin
Signed-off-by: Harry Wentland
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 79 ++-
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 4 +-
.../amd/display/amdgpu_dm/amdgpu_dm_plane.h | 3
boot on 128b/132b encoding
Swapnil Patel (1):
drm/amd/display: Change ASSR disable sequence
Wayne Lin (2):
drm/amd/display: Remove unnecessary files
drm/amd/display: Defer handling mst up request in resume
Webb Chen (1):
drm/amd/display: Revert "dc: Keep VBios pixel rate div setting
- Fix problems for dmub idle power optimization
Acked-by: Wayne Lin
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 673f36543f6c
From: Chaitanya Dhere
[Why & How]
For DML2 to decouple it from other DML versions.
Reviewed-by: Dillon Varone
Acked-by: Wayne Lin
Signed-off-by: Chaitanya Dhere
---
drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu
Reviewed-by: Josip Pavic
Acked-by: Wayne Lin
Signed-off-by: Wenjing Liu
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index
-by: Duncan Ma
Acked-by: Wayne Lin
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
b/drivers/gpu/drm/amd/display
From: Sung Joon Kim
[why & how]
To enable a new interface so alternate scrambling can be done via
security module.
Reviewed-by: Wenjing Liu
Acked-by: Wayne Lin
Signed-off-by: Sung Joon Kim
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
.../gpu/drm/amd/display/dc/link/link_dp
From: Xi Liu
[Why]
The hard coded DPM states are only used to fix mismatch states numbers from FW.
[How]
Remove when not needed.
Reviewed-by: Sung joon Kim
Acked-by: Wayne Lin
Signed-off-by: Xi Liu
---
.../display/dc/dml2/dml2_translation_helper.c | 17 +++--
1 file changed
From: Nicholas Kazlauskas
[Why]
To reduce the handshake overhead for static screen and video playback.
[How]
Flip the debug option to enable by default.
Reviewed-by: Duncan Ma
Acked-by: Wayne Lin
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/resource/dcn35
is already in IPS2 since we know we need
to exit.
These are turned off by default.
Reviewed-by: Duncan Ma
Acked-by: Wayne Lin
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c| 7 +--
drivers/gpu
that tracks the depth of the exit calls. Do not reallow
until the counter is zero.
Reviewed-by: Duncan Ma
Acked-by: Wayne Lin
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 14 --
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 1 +
2 files changed
From: Xi Liu
[Why and how]
Bounding box clocks for DCN351 should be increased as per request
Reviewed-by: Swapnil Patel
Acked-by: Wayne Lin
Signed-off-by: Xi Liu
---
.../amd/display/dc/dml/dcn351/dcn351_fpu.c| 90 ---
1 file changed, 76 insertions(+), 14 deletions
From: Chris Park
[Why]
Disabling stream encoder invokes a function that no longer exists
in bring-up.
[How]
Check if the function declaration is NULL in disable stream encoder.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Charlene Liu
Acked-by: Wayne Lin
From: Natanel Roizenman
Increase Z8 watermark times from 210->250us and 320->350us.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Wayne Lin
Signed-off-by: Natanel Roizenman
---
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 4 ++--
drivers/gpu/drm/amd/display/dc/dml/
From: Charlene Liu
[why]
APU has different refclk as dGPU which is used for AUX_DPHY setup
Reviewed-by: Chris Park
Acked-by: Wayne Lin
Signed-off-by: Charlene Liu
---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn31
From: Natanel Roizenman
Added debug prints for zstate_support and StutterPeriod in
dcn35_decide_zstate_support for testing.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Wayne Lin
Signed-off-by: Natanel Roizenman
---
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 4
1 file changed
From: Dillon Varone
[WHY]
Even if memory lower power feature policy states that it is disabled,
VPG memory should still be poweerd on if it is currently disabled when
requested.
Reviewed-by: Chris Park
Acked-by: Wayne Lin
Signed-off-by: Dillon Varone
---
drivers/gpu/drm/amd/display/dc/dcn31
From: Charlene Liu
[why]
need to apply the debug key check for max displayclk.
Reviewed-by: Chris Park
Acked-by: Wayne Lin
Signed-off-by: Charlene Liu
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/display
g. It also causes
MPO to fail. We will temprarily revert this commit and investigate
the root cause further.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Chaitanya Dhere
Reviewed-by: Martin Leung
Acked-by: Wayne Lin
Signed-off-by: Wenjing Liu
---
drivers/g
a (potential) redundant operation.
Reviewed-by: Duncan Ma
Acked-by: Wayne Lin
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 23 +++-
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
/errors and remove redundant codes
- Add missing registers and offset
Acked-by: Wayne Lin
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index
From: Anthony Koo
- Add a Replay residency mode which only calcuates the
entry time based on replay state 0/1 switch.
Acked-by: Wayne Lin
Signed-off-by: Anthony Koo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm
From: Samson Tam
[Why]
During init_pipes, otg master is not initialized. So mpc tree is
still configured even if mpc bottom is not active
[How]
For pipes that have tg enabled, check their mpc tree and clear
opp_list if mpc bottom is not active
Reviewed-by: George Shen
Acked-by: Wayne Lin
From: Dillon Varone
[WHY]
Pixel clock programming should be built per dcn revision, not hardcoded to use
dcn20.
Reviewed-by: Chris Park
Acked-by: Wayne Lin
Signed-off-by: Dillon Varone
---
.../gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c | 7 ++-
1 file changed, 6 insertions
From: Dillon Varone
[WHY]
Stream clock source is a required parameter for DP DTO programming.
Reviewed-by: Chris Park
Acked-by: Wayne Lin
Signed-off-by: Dillon Varone
---
drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd
d-by: Nicholas Kazlauskas
Reviewed-by: Charlene Liu
Acked-by: Wayne Lin
Signed-off-by: Ovidiu Bunea
---
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
b/drivers/gpu/d
and match the reference to existing ASIC
that also see increased latency at low FCLK.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Wayne Lin
Signed-off-by: Nicholas Susanto
---
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Zhongwei
[Why]
OLED panels show no display for large vtotal timings.
[How]
Check if spread spectrum is enabled and read from lut for spread spectrum
percentage. Adjust dprefclk as required.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Wayne Lin
Signed-off-by: Zhongwei
---
.../display
From: Gabe Teeger
This reverts commit 97c109f498da ("drm/amd/display: Add left edge pixel for
YCbCr422/420 + ODM pipe split")
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: George Shen
Reviewed-by: Charlene Liu
Reviewed-by: Jun Lei
Acked-by:
From: Nicholas Kazlauskas
[Why]
Leave disabled by default due to sequencing issues around power states
where these flags aren't properly reset.
[How]
Allow re-enabling from DC debug option.
Reviewed-by: Gabe Teeger
Acked-by: Wayne Lin
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm
From: Martin Leung
why and how:
causes black screen on PNP on DCN 3.5
This reverts commit 520b0596f978 ("drm/amd/display: Exit idle
optimizations before HDCP execution")
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Nicholas Kazlauskas
Acked-by:
state.
[how]
Backup stream ODM forcing option and clear it in minimal transition
state. Once minimal transition state is released, we will restore the
original debug option back.
Reviewed-by: Samson Tam
Acked-by: Wayne Lin
Signed-off-by: Wenjing Liu
---
drivers/gpu/drm/amd/display/dc/core/dc.c
Reviewed-by: Wenjing Liu
Acked-by: Wayne Lin
Signed-off-by: Leo Ma
---
.../gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
b/drivers/gpu/drm/amd/display/dc/hwss
From: Rodrigo Siqueira
[Why & How]
Registers and offset are missing. Add it back
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
.../include/asic_reg/dcn/dcn_3_2_1_offset.h | 37 ++-
.../include/asic_reg/dcn/dcn_3_2_1_sh_mask.h | 16
2 files changed
From: Rodrigo Siqueira
[Why & How]
This commit just drop some old comments and update a typo in another
one.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
From: Sherry Wang
[Why]
Hostvm should be enabled/disabled accordding to the status of
riommu_active, but hostvm always be disabled on DCN31 which causes
underflow
[How]
Set correct hostvm flag on DCN31
Acked-by: Wayne Lin
Signed-off-by: Sherry Wang
---
drivers/gpu/drm/amd/display/dc
From: Rodrigo Siqueira
[Why & How]
Enable legacy fast update for DCN314
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dc
From: Rodrigo Siqueira
[Why & How]
Remove legacy code which is unnecessary.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
.../dc/resource/dcn314/dcn314_resource.c | 20 ---
1 file changed, 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/reso
From: Rodrigo Siqueira
[Why & How]
If the driver has issues retrieving the MALL size for the specific
hardware, it might fail since the current value is set to zero. This
commit addresses this issue by adding a simple constant value to give
the drive a chance to start.
Acked-by: Wayne
1 - 100 of 491 matches
Mail list logo
