From: Tim Huang
Clear warning that cast operation might have overflowed.
Signed-off-by: Tim Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
From: Tim Huang
Clear resource leak warning that when the prepare fails,
the allocated amdgpu job object will never be released.
Signed-off-by: Tim Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 5 +
1 file changed, 5 insertions(+)
diff --git
[AMD Official Use Only - General]
OK, I will do this.
-
Best Regards,
Thomas
-Original Message-
From: Zhang, Hawking
Sent: Thursday, April 25, 2024 10:33 AM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Chai, Thomas ; Zhou1, Tao ; Li,
Candice ; Wang,
[AMD Official Use Only - General]
amdgpu_umc_fill_error_record is called in umc_v12_0_convert_error_address
directly to prepare for page retirement,
The new path need to check if these converted pages already exist before
filling the error page, umc_v12_0_convert_error_address is not suitable
[AMD Official Use Only - General]
>> Alternatively, we need to explore the opportunity to centralize legacy ras
>> and aca ras implementation in the same API. Take sysfs create/remove
>> interface for example, legacy RAS and ACA RAS do share the same logic, just
>> have different filesystem
[AMD Official Use Only - General]
-
Best Regards,
Thomas
-Original Message-
From: Zhang, Hawking
Sent: Thursday, April 25, 2024 11:01 AM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao ; Li, Candice ; Wang,
Yang(Kevin) ; Yang, Stanley
Subject: RE:
[AMD Official Use Only - General]
I might lose some context here. Can you please elaborate why we don't leverage
the existing umc_v12_0_convert_error_address implementation?
Regards,
Hawking
-Original Message-
From: Chai, Thomas
Sent: Thursday, April 18, 2024 10:58
To:
[AMD Official Use Only - General]
+void amdgpu_amdkfd_ras_pasid_poison_consumption_handler(struct amdgpu_device
*adev,
+ enum amdgpu_ras_block block, uint16_t pasid,
+ pasid_notify pasid_fn, void *data, uint32_t reset);
So we ultimately switch to
[AMD Official Use Only - General]
The patch is Reviewed-by: Hawking Zhang
Kevin, Thomas,
Alternatively, we need to explore the opportunity to centralize legacy ras and
aca ras implementation in the same API. Take sysfs create/remove interface for
example, legacy RAS and ACA RAS do share the
[AMD Official Use Only - General]
Is it okay to drop below static function and just implement the logic in poison
creation handler leveraging the ras query api: amdgpu_ras_query_error_status.
It seems to me the static function may not be able to be used for other IP
blocks.
Regards,
Hawking
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 5e4f84f18c4ee9b0ccdc19e39b7de41df21699dd Add linux-next specific
files for 20240424
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202404242144.8931hnhx-...@intel.com
https
On Mon, Apr 22, 2024 at 03:10:10PM GMT, Jani Nikula wrote:
drivers/gpu/drm/xe/xe_debugfs.c | 1 +
drivers/gpu/drm/xe/xe_gt_debugfs.c | 2 ++
drivers/gpu/drm/xe/xe_uc_debugfs.c | 2 ++
Acked-by: Lucas De Marchi
thanks
Lucas De Marchi
For the nouveau bits:
Reviewed-by: Lyude Paul
On Mon, 2024-04-22 at 15:10 +0300, Jani Nikula wrote:
> Surprisingly many places depend on debugfs.h to be included via
> drm_print.h. Fix them.
>
> v3: Also fix armada, ite-it6505, imagination, msm, sti, vc4, and xe
>
> v2: Also fix ivpu and
Hi Dave, Sima,
Fixes for 6.9.
The following changes since commit ed30a4a51bb196781c8058073ea720133a65596f:
Linux 6.9-rc5 (2024-04-21 12:35:54 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.9-2024-04-24
for you to fetch
[Public]
> -Original Message-
> From: Jani Nikula
> Sent: Wednesday, April 24, 2024 9:55 AM
> To: dri-de...@lists.freedesktop.org
> Cc: Andrzej Hajda ; Maxime Ripard
> ; Jacek Lawrynowicz
> ; Stanislaw Gruszka
> ; Oded Gabbay ;
> Russell King ; David Airlie ; Daniel
> Vetter ; Neil
[AMD Official Use Only - General]
Thanks for the fix.
Reviewed-by: Aurabindo Pillai
--
Regards,
Jay
From: Nathan Chancellor
Sent: Wednesday, April 24, 2024 2:19 PM
To: Wentland, Harry ; Li, Sun peng (Leo)
; Siqueira, Rodrigo ; Deucher,
Alexander ; Koenig,
On 2024-04-24 13:40, Harish Kasiviswanathan wrote:
Queue buffer, though it is in system memory, has to be created using the
correct amdgpu device. Enforce this as the BO needs to mapped to the
GART for MES Hardware scheduler to access it.
Signed-off-by: Harish Kasiviswanathan
I guess this
[AMD Official Use Only - General]
> -Original Message-
> From: Ma, Jun
> Sent: Wednesday, April 24, 2024 6:04 AM
> To: amd-gfx@lists.freedesktop.org; Koenig, Christian
> ; Deucher, Alexander
>
> Cc: Ma, Jun
> Subject: [PATCH 3/3] drm/amdgpu: Fix the uninitialized variable warning
>
>
-Wframe-larger-than=2048 is a part of both CFLAGS and CFLAGS_REMOVE for
dml2_core_dcn4_calcs.o, which means that it ultimately gets removed
altogether for 64-bit targets, as 2048 is the default FRAME_WARN value
for 64-bit platforms, resulting in no -Wframe-larger-than coverage for
this file.
When building with tip of tree Clang, there are some new instances of
-Wframe-larger-than from the new display code (which become fatal with
CONFIG_WERROR=y):
drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c:754:6:
error: stack frame size (2488) exceeds
-id: 20240424-amdgpu-dml2-fix-frame-larger-than-dcn401-48ff7e1f51ea
Best regards,
--
Nathan Chancellor
[AMD Official Use Only - General]
> -Original Message-
> From: Ma, Jun
> Sent: Wednesday, April 24, 2024 6:04 AM
> To: amd-gfx@lists.freedesktop.org; Koenig, Christian
> ; Deucher, Alexander
>
> Cc: Ma, Jun
> Subject: [PATCH 1/3] drm/amdgpu: Fix uninitialized variable warning in
>
On Wed, Apr 24, 2024 at 1:57 PM Harish Kasiviswanathan
wrote:
>
> Queue buffer, though it is in system memory, has to be created using the
> correct amdgpu device. Enforce this as the BO needs to mapped to the
> GART for MES Hardware scheduler to access it.
>
> Signed-off-by: Harish
Queue buffer, though it is in system memory, has to be created using the
correct amdgpu device. Enforce this as the BO needs to mapped to the
GART for MES Hardware scheduler to access it.
Signed-off-by: Harish Kasiviswanathan
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 5 +
1 file
[AMD Official Use Only - General]
Acked-by: Alex Deucher
From: Bob Zhou
Sent: Tuesday, April 23, 2024 1:32 AM
To: amd-gfx@lists.freedesktop.org ; Deucher,
Alexander ; Koenig, Christian
Cc: Zhou, Bob
Subject: [PATCH 1/2] drm/amdgpu: fix double free err_addr
For adjustable priorities by userspace, it is nice to have a bit more
granularity.
Signed-off-by: Friedrich Vock
---
include/drm/ttm/ttm_resource.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/drm/ttm/ttm_resource.h b/include/drm/ttm/ttm_resource.h
index
Used by userspace to gauge the severity of memory overcommit and make
prioritization decisions based on it.
Used by userspace to gauge the severity of memory overcommit and make
prioritization decisions based on it.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3
Used by userspace to adjust buffer priorities in response to changes in
application demand and memory pressure.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 20
include/uapi/drm/amdgpu_drm.h | 1 +
2 files changed, 21 insertions(+)
TTM now takes care of moving buffers to the best possible domain.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 -
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 191 +
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.h | 4 -
These utilities will be used to keep track of what buffers have been
evicted from any particular place, to try and decide when to try undoing
the eviction.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/ttm/ttm_device.c | 1 +
drivers/gpu/drm/ttm/ttm_resource.c | 14 ++
Try unevicting only VRAM/GTT BOs.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 50 +
1 file changed, 50 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index
This adds GTT to the "preferred domains" of this buffer object, which
will also prevent any attempts at moving the buffer back to VRAM if
there is space. If VRAM is full, GTT will already be chosen as a
fallback.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c| 4
If we didn't get the favorite placement because it was full, we should
try moving it into the favorite placement once there is space.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/ttm/ttm_bo.c | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git
Used to dynamically adjust priorities of buffers at runtime, to react to
changes in memory pressure/usage patterns.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/ttm/ttm_bo.c | 17 +
include/drm/ttm/ttm_bo.h | 2 ++
2 files changed, 19 insertions(+)
diff --git
This makes buffer eviction significantly more stable by avoiding
ping-ponging caused by low-priority buffers evicting high-priority
buffers and vice versa.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/ttm/ttm_bo.c | 9 +++--
drivers/gpu/drm/ttm/ttm_resource.c | 5 +++--
When undoing evictions because of decreased memory pressure, it makes no
sense to try evicting other buffers.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/ttm/ttm_bo.c | 2 ++
include/drm/ttm/ttm_bo.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c
Indicates support for EVICTED_VRAM queries and
AMDGPU_GEM_OP_SET_PRIORITY
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
Reserve the highest priority for the kernel, and choose a balanced value
as userspace default. Userspace is intended to be able to modify these
later to mark buffers as important/unimportant.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c| 1 +
We will never try evicting things from VRAM for these resources anyway.
This affects TTM buffer uneviction logic, which would otherwise try to
move these buffers into VRAM (clashing with VRAM-only allocations).
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 13
Provides fine-grained control for drivers over which buffers should be
considered when attempting to undo evictions.
Signed-off-by: Friedrich Vock
---
include/drm/ttm/ttm_device.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/include/drm/ttm/ttm_device.h
Hi everyone,
recently I've been looking into remedies for apps (in particular, newer
games) that experience significant performance loss when they start to
hit VRAM limits, especially on older or lower-end cards that struggle
to fit both desktop apps and all the game data into VRAM at once.
The
Make each buffer object aware of whether it has been evicted or not.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/ttm/ttm_bo.c | 1 +
include/drm/ttm/ttm_bo.h | 11 +++
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
For each buffer object, remember evictions and try undoing them if
memory pressure gets lower again.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/ttm/ttm_bo.c | 28 +++-
drivers/gpu/drm/ttm/ttm_bo_util.c | 3 +++
2 files changed, 30 insertions(+), 1
For now, they are only used internally inside TTM, but this will change
with the introduction of dynamic buffer priorities.
Signed-off-by: Friedrich Vock
---
drivers/gpu/drm/ttm/ttm_bo.c | 168 ++-
include/drm/ttm/ttm_bo.h | 6 ++
2 files changed, 172
The series is
Reviewed-by: Felix Kuehling
On 2024-04-24 11:27, Philip Yang wrote:
This patch series implement new KFD memory alloc flag for best effort contiguous
VRAM allocation, to support peer direct access RDMA device with limited
scatter-gather
dma capability.
v2: rebase on patch
f (divider < DFS_DIVIDER_RANGE_2_START) {
---
base-commit: d60dc4dd72412d5d9566fdf391e4202b05f88912
change-id: 20240424-amdgpu-display-dcn401-enum-float-conversion-c09cc1826ea2
Best regards,
--
Nathan Chancellor
On 4/23/2024 7:13 AM, Srinivasan Shanmugam wrote:
> The buffer size is determined by the declaration char fw_name[30]; This
> means fw_name can hold up to 30 characters, including the null character
> that marks the end of the string.
>
> The string to be written is "amdgpu/%s_mec.bin" or
RDMA device with limited scatter-gather ability requires contiguous VRAM
buffer allocation for RDMA peer direct support.
Add a new KFD alloc memory flag and store as bo alloc flag
AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS. When pin this bo to export for RDMA
peerdirect access, this will set
Bump the kfd ioctl minor version to delcare the contiguous VRAM
allocation flag support.
Signed-off-by: Philip Yang
---
include/uapi/linux/kfd_ioctl.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/kfd_ioctl.h b/include/uapi/linux/kfd_ioctl.h
index
If the BO pages pinned for RDMA is not contiguous on VRAM, evict it to
system memory first to free the VRAM space, then allocate contiguous
VRAM space, and then move it from system memory back to VRAM.
v6: user context should use interruptible call (Felix)
Signed-off-by: Philip Yang
---
This patch series implement new KFD memory alloc flag for best effort contiguous
VRAM allocation, to support peer direct access RDMA device with limited
scatter-gather
dma capability.
v2: rebase on patch ("drm/amdgpu: Modify the contiguous flags behaviour")
to avoid adding the new GEM flag
When TTM failed to alloc VRAM, TTM try evict BOs from VRAM to system
memory then retry the allocation, this skips the KFD BOs from the same
process because KFD require all BOs are resident for user queues.
If TTM with TTM_PL_FLAG_CONTIGUOUS flag to alloc contiguous VRAM, allow
TTM evict KFD BOs
Define macro AMDGPU_MAX_SG_SEGMENT_SIZE 2GB, because struct scatterlist
length is unsigned int, and some users of it cast to a signed int, so
every segment of sg table is limited to size 2GB maximum.
For contiguous VRAM allocation, don't limit the max buddy block size in
order to get contiguous
Am 23.04.24 um 16:31 schrieb Tim Huang:
From: Tim Huang
Clear warning that uses uninitialized value fw_size.
Signed-off-by: Tim Huang
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
On 2024-04-23 18:17, Felix Kuehling
wrote:
On 2024-04-23 11:28, Philip Yang wrote:
RDMA device with limited scatter-gather
ability requires contiguous VRAM
buffer allocation for RDMA peer direct support.
[Public]
> -Original Message-
> From: Wayne Lin
> Sent: Wednesday, April 24, 2024 4:49 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Wentland, Harry ; Li, Sun peng (Leo)
> ; Siqueira, Rodrigo ;
> Pillai, Aurabindo ; Li, Roman
> ; Lin, Wayne ; Gutierrez,
> Agustin ; Chung, ChiaHsuan (Tom)
On 2024-04-23 18:15, Felix Kuehling
wrote:
On
2024-04-23 11:28, Philip Yang wrote:
If the BO pages pinned for RDMA is not
contiguous on VRAM, evict it to
system memory first to free the VRAM space, then allocate
Am 24.04.24 um 15:20 schrieb Dan Carpenter:
On Wed, Apr 24, 2024 at 03:11:08PM +0200, Christian König wrote:
Am 24.04.24 um 13:41 schrieb Dan Carpenter:
These lines are indented too far. Clean the whitespace.
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 7
[Public]
> We have the KFD, FLR, the per engine one in the scheduler and IIRC one more
> for the CP (illegal operation and register write).
>
> I'm not sure about the CP one, but all others should be handled correctly
> with the V2 patch as far as I can see.
Where can I find the CP one?
Am 24.04.24 um 13:41 schrieb Dan Carpenter:
These lines are indented too far. Clean the whitespace.
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
Am 24.04.24 um 12:03 schrieb Ma Jun:
Initialize the interrupt timestamp for some legacy SOCs
to fix the coverity issue "Uninitialized scalar variable"
Signed-off-by: Ma Jun
Suggested-by: Christian König
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 8
Initialize the phy_id to 0 to fix the warning of
"Using uninitialized value phy_id"
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.c
Initialize the interrupt timestamp for some legacy SOCs
to fix the coverity issue "Uninitialized scalar variable"
Signed-off-by: Ma Jun
Suggested-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 8
1 file changed, 8 insertions(+)
diff --git
Assign value to clock to fix the warning below:
"Using uninitialized value res. Field res.clock is uninitialized"
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c
Am 24.04.24 um 11:36 schrieb Bob Zhou:
After amdgpu_i2c_get_byte fail, amdgpu_i2c_put_byte shouldn't be
conducted to put wrong value.
So return and check the i2c transfer result.
Signed-off-by: Bob Zhou
Suggested-by: Christian König
Reviewed-by: Christian König
---
After amdgpu_i2c_get_byte fail, amdgpu_i2c_put_byte shouldn't be
conducted to put wrong value.
So return and check the i2c transfer result.
Signed-off-by: Bob Zhou
Suggested-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c | 47 +++--
1 file changed, 28
Am 24.04.24 um 11:04 schrieb Jesse Zhang:
Initialize the size before calling amdgpu_vce_cs_reloc, such as case 0x0301.
V2: To really improve the handling we would actually
need to have a separate value of 0x.(Christian)
Signed-off-by: Jesse Zhang
Suggested-by: Christian König
Initialize the size before calling amdgpu_vce_cs_reloc, such as case 0x0301.
V2: To really improve the handling we would actually
need to have a separate value of 0x.(Christian)
Signed-off-by: Jesse Zhang
Suggested-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
From: Aric Cyr
This version brings along following fixes:
- Disable seamless boot on 128b/132b encoding
- Have cursor and surface updates together
- Change ASSR disable sequence to avoid corruption
- Fix few IPS problems
- Enable Replay for DCN315
- Fix few ODM problems
- Fix FEC_READY write
From: Sung Joon Kim
[why]
preOS will not support display mode programming and link training
for UHBR rates.
[how]
If we detect a sink that's UHBR capable, disable seamless boot
Reviewed-by: Anthony Koo
Acked-by: Wayne Lin
Signed-off-by: Sung Joon Kim
---
From: Alex Hung
This fixes 29 UNINIT issues reported by Coverity.
Reviewed-by: Hersen Wu
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/bios/command_table.c | 2 +-
drivers/gpu/drm/amd/display/dc/bios/command_table2.c | 2 +-
From: Swapnil Patel
[Why]
Currently disabling ASSR before stream is disabled causes visible
display corruption.
[How]
Move disable ASSR command to after stream has been disabled.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Wenjing Liu
Acked-by: Wayne Lin
From: Roman Li
[Why]
HPD interrupt cannot be handled in IPS2 state.
So if there's a display topology change while system in IPS2
it can be missed.
[How]
Implement worker to check each 5 sec in IPS for HPD.
Reviewed-by: Hamza Mahfooz
Acked-by: Wayne Lin
Signed-off-by: Roman Li
---
From: Nicholas Kazlauskas
[Why]
We can hang in IPS2 checking DMCUB_SCRATCH0 for link detection state.
[How]
Replace the HW access with a check on the shared state bit. This will
work the same way as the SCRATCH0 but won't require a wake in the case
where link detection isn't required.
From: Joan Lee
[why & how]
Enable Replay for DCN315.
Reviewed-by: Robin Chen
Acked-by: Wayne Lin
Signed-off-by: Joan Lee
---
.../amd/display/dc/resource/dcn315/dcn315_resource.c | 12
1 file changed, 12 insertions(+)
diff --git
From: Wenjing Liu
[why]
When optc uses two pixel per container, each ODM slice width must be an
even number.
[how]
If ODM slice width is odd number increase it by 1.
Reviewed-by: Dillon Varone
Acked-by: Wayne Lin
Signed-off-by: Wenjing Liu
---
.../gpu/drm/amd/display/dc/core/dc_resource.c
From: Ilya Bakoulin
[Why/How]
We can miss writing FEC_READY in some cases before LT start, which
violates DP spec. Remove the condition guarding the DPCD write so that
the write happens unconditionally.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Wenjing Liu
From: Alex Hung
This fixes 49 UNINIT issues reported by Coverity.
Reviewed-by: Hersen Wu
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 4 ++--
.../gpu/drm/amd/display/dc/core/dc_resource.c| 2 +-
From: Alex Hung
This fixes 11 UNINIT issues reported by Coverity.
Reviewed-by: Hersen Wu
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 4 ++--
2 files
From: Alvin Lee
[Description]
For FPO + Vactive scenarios we must check that all non-FPO pipes
have VACTIVE margin to allow it. The previous check only confirmed
that there is at least one pipe that has vactive margin, but this
is incorrect as the vactive display could be using two pipes (MPO)
From: Nevenko Stupar
[Why & How]
Currently in DML2.1 gpuvm_enable was hardcoded.
Use passed info from DC for DML21 to be in sync with
what is used in DC.
Reviewed-by: Chaitanya Dhere
Acked-by: Wayne Lin
Signed-off-by: Nevenko Stupar
---
drivers/gpu/drm/amd/display/dc/core/dc_vm_helper.c
From: Alvin Lee
[Description]
Assign linear_pitch_alignment so we don't cause a divide by 0
error in VM environments
Reviewed-by: Sohaib Nadeem
Acked-by: Wayne Lin
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Revalla Hari Krishna
[why]
cleaning up the code refactor requires hubbub to be in its own component.
[how]
Move all files under newly created hubbub folder and fix the makefiles.
Reviewed-by: Martin Leung
Acked-by: Wayne Lin
Signed-off-by: Revalla Hari Krishna
---
From: Alvin Lee
[Description]
Today for MED update type we do not call update clocks. However, for FPO
the assumption is that update clocks should be called to disable P-State
switch before any HW programming since FPO in FW and driver are not
synchronized. This causes an issue where on a MED
From: Alex Hung
This fixes 1 PW.INCLUDE_RECURSION reported by Coverity.
"./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h"
includes itself: dc_types.h -> dal_types.h -> dc_types.h
Acked-by: Wayne Lin
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/include/dal_types.h | 1 -
1
From: Webb Chen
This reverts commit f7131558f362 ("drm/amd/display: Keep VBios pixel rate div
setting util next mode set") which causes issue.
Reviewed-by: Charlene Liu
Acked-by: Wayne Lin
Signed-off-by: Webb Chen
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 4 --
From: Daniel Miess
[Why & How]
Enable root clock optimization for PHYSYMCLK and only
disable it when it's actively being used
Reviewed-by: Charlene Liu
Acked-by: Wayne Lin
Signed-off-by: Daniel Miess
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
From: Nicholas Kazlauskas
[Why]
FIFO error can occur if we don't trigger a DISPCLK change after
touching K1/K2 dividers. For 4k144 eDP + hotplug of USB-C DP display
we see FIFO underflow.
[How]
We have the path to trigger the resync as the workaround in
DCN314/DCN32, it just needs to be ported
From: Roman Li
[Why]
IPS stability was fixed in bios.
[How]
Set disable_ips init flag to DMUB_IPS_ENABLE.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Wayne Lin
Signed-off-by: Roman Li
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Wenjing Liu
[why]
DSC slice must be divisible by ODM slice count.
[how]
If DSC slice count is not a multiple of ODM slice count, increase DSC
slice until it is. Otherwise fail to compute DSC configuration.
Reviewed-by: Chaitanya Dhere
Acked-by: Wayne Lin
Signed-off-by: Wenjing Liu
---
From: Leo Ma
[Why && How]
Screen flickering saw on 4K@60 eDP with high refresh rate external
monitor when booting up in DC mode. DC Mode Capping is disabled
which caused wrong UCLK being used.
Reviewed-by: Alvin Lee
Acked-by: Wayne Lin
Signed-off-by: Leo Ma
---
From: Wayne Lin
[Why]
Like commit ec5fa9fcdeca ("drm/amd/display: Adjust the MST resume flow"), we
want to avoid handling mst topology changes before restoring the old state.
If we enable DP_UP_REQ_EN before calling drm_atomic_helper_resume(), have
changce to handle CSN event first and fire
From: Iswara Nagulendran
[HOW]
In multi-monitor cases the VBLANK stretch that is required to align both
monitors may be so large that it may create issues for gaming performance.
Use debug value to restrict in-game FAMS support for multi-disp use case.
Reviewed-by: Harry Vanzylldejong
From: Dennis Chan
[why]
To refine for link off frame count in diagnose tool,
the driver show the link off frame count number instead of showing link
off frame count level.
Reviewed-by: ChunTao Tso
Reviewed-by: Robin Chen
Acked-by: Wayne Lin
Signed-off-by: Dennis Chan
---
From: Rodrigo Siqueira
Add code to handle case when quad_part is 0 in gpu_addr_to_uma().
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
From: Rodrigo Siqueira
Set up to enable log color state for multiple DCNs.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_init.c | 1 +
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_init.c | 1 +
From: Rodrigo Siqueira
This commit just remove some trivial legacy code in some of the DC
files.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 12
drivers/gpu/drm/amd/display/dc/hwss/Makefile | 6 --
From: Rodrigo Siqueira
Adjust to update some of the dcn303 parameters.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/resource/dcn303/dcn303_resource.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git
From: Rodrigo Siqueira
Set up to enable legacy fast update.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Rodrigo Siqueira
Add dcn301_fpu prefix to some of the FPU function with the required
adjustments.
Acked-by: Wayne Lin
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/dml/dcn301/dcn301_fpu.c| 4 ++--
.../amd/display/dc/dml/dcn301/dcn301_fpu.h| 7 +++
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