On Tue, Sep 11, 2012 at 4:19 PM, Kelvin Lawson i...@atomthreads.com wrote:
Hi Ashwin,
I would confirm that the timer interrupt is occurring. The timer ISR
is in atomport.c (TIMER1_COMPA_vect).
Thanks for the reply. Yes timer interrupts are occurring but by default
scheduler is not
Hi Elvin,
It might be a bit easier to understand with the comments left in:
if (old_tcb != new_tcb)
{
/* Set the new currently-running thread pointer */
curr_tcb = new_tcb;
/* Call the architecture-specific context switch */
archContextSwitch (old_tcb,
