Re: [casper] Minimum Clock Frequency (ROACH2)

2017-04-03 Thread Jack Hickish
Hi Franco, I don't know the low frequency limit, but for what it's worth, you could always run the adc at 320 MHz and just use 1 of the 8 outputs, which also has the benefit of avoiding and inter-core mismatch issues, since you'd effectively only be using 1 core. Or run faster and only use every

[casper] Minimum Clock Frequency (ROACH2)

2017-04-03 Thread Franco
Hi All, I'm working in an application where I need high frequency resolution (~10kHz). For my model this means I need to run my ADC at ~40MHz (and the FPGA at 5MHz). I'm not using an special memory block, just brams. I'm using ROACH2, and ADC5G (https://casper.berkeley.edu/wiki/ADC1x5000-8). It

Re: [casper] Re: Can't open tut3

2017-04-03 Thread Claudio Rivera
Hello again I already updated the blocks, but now I have the following error - Version Log -- Version Path System Generator/opt/Xilinx/14.7/ISE_DS/ISE/sysgen Matlab 8.1.0.604

Re: [casper] ROACH1 serial to USB connection

2017-04-03 Thread Heystek Grobler
Hi Jason Its really no problem. I used the steps that you have send me with a ST-link V2 J-TAG (It is almost like the USB wiggler). I can open up a serail connection with Hyperterminal and open up an connection with the OCD Commander. Once i run the Macro I get the following error: Write large: