Hi Sharat,
Did you do any of the other tests Dave suggested? Compiling/running at a
lower clock speed? Checking for roach revision compatibility? Checking
whether the failures after swapping zdoks / adc cards were always the same?
I would suggest the debug messages like --
2015-09-07
Hi Sharat,
To give some context:
The adc5g has four cores, each of which has 8 parallel output lanes for the
8 bits of data. The software puts the adc in test mode, so that all cores
output a sample of 0xff, followed by 7 samples of 0x00. The delays of the
data lines relative to the clock are
Hi, Sharat,
On Sep 6, 2015, at 11:02 PM, Jack Hickish wrote:
> As the code suggests, the error comes because bit 1 of core 3 appears to
> never be glitch free, no matter what the delay setting. It's not obvious to
> me what could cause this.
Just to expand on what Jack said, here are a few
Hi Jack,
Thank you for the test scripts.
When I run your script I get the following error. What could be the
possible reason? I have not connected any input laft it floating as I have
read that the ADC has its own ramp input which is used for the calibration.
I have connected at 2500MHz clock.
Hi Sharat,
The disentangle(!) branch at
https://github.com/jack-h/adc_tests/tree/disentangle has my calibration
code. If you check out that branch and install it (cd adc5g; python
setup.py install) then the test_cal.py script is a simple template for
calibrating. If it doesn't work it should also
Hi Rurik,
Yes. I used the boffile ver2. I also generated bof using model file and
tried using it. I checked both the ADCs using -z option. I get the same
error.
Thanks and regards,
Sharat
On 4 Sep 2015 18:37, "Primiani, Rurik" wrote:
> Hi Sharat,
>
> Are you using
Hi Sharat,
Are you using the revision 1 or revision 2 version of the test suite
bitcode and does this match the version of the board that you have? By
default it uses revision 2 which is probably what you have but just to make
sure. To use the other bitcode you would need to use the -b flag with
Hi Sharat,
How recent is your checkout of that library? What does git tell you is the
most recent commit?
Can you also send me a copy of your model and boffile -- i'll test that the
calibration script works.
Cheers,
Jack
On 3 September 2015 at 22:46, sharat varma wrote:
> Hi
Hi,
Thanks for the reply and sorry for the delayed response.
Yes, the x-axis represent the time and y-axis represents the signed 8 bit
output. The negative bias is due to the nature of the input.
I was trying to use the files in the link you mentioned, but I keep getting
the error shown below. I
Hi Sharat,
Tomorrow (in California) I'll send you a link and instructions to use the
calibration script I have, which should work ok at 2500mhz clock.
In the meantime, it might not matter, but what version of mlib-devel are
you using?
Cheers,
Jack
On Thu, 3 Sep 2015 9:02 pm sharat varma
Hi Jack,
Thank you Jack.
I am using the mlib-devel from https://github.com/sma-wideband/mlib_devel
Also, I am using ISE 14.7.
Regards,
Sharat
On 4 September 2015 at 12:34, Jack Hickish wrote:
> Hi Sharat,
>
> Tomorrow (in California) I'll send you a link and
Hi Jack,
Thanks for the reply.
I did not run mmcm calibration. Actually, we checked the ADC by feeding it
a low frequency sine wave from a function generator and it works fine.
The problem with spikes occurs when we feed the ADC with the photo-detector
output.
Regards,
Sharat
On 1 September
Hi Sharat,
Are you running the adc mmcm calibration routine after programming your
roach?
Cheers,
Jack
On 31 August 2015 at 22:41, sharat varma wrote:
>
> Hi Casper,
>
> I am working as a post-doc working under guidance of Dr. Hayden So at The
> University of Hong Kong.
>
> We
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