Hi Randy
The options used in mapping, place and route etc are found in
fast_runtime.opt in the etc folder in the XPS_IBOB_base folder containing
the EDK project created by the CASPER toolflow. You will find a bunch of
options that you can play with here. Save the changes and then re-run the
--
*From:* Andrew Martens [mailto:martens.and...@gmail.com]
*Sent:* Tuesday, 4 November 2008 6:07 PM
*To:* Cheng, Wan (ATNF, Marsfield)
*Cc:* casper@lists.berkeley.edu
*Subject:* Re: [casper] Casper library basic setup
Hi Wan
I had a look at your design and noticed the following
Hi Wan
The FFT applies gain to any repeating input signal. You can view this
happening with the following MATLAB commands;
x = 0:1:32;
y = sin(4*x*2*pi/32);
plot(abs(fft(y,32)));
You will see that the output has spikes of height 16 instead of 1 which you
would expect from a sinusoid of
the FFT module has. I just give it
32 bits width '1'.
Thanks
Wan
--
*From:* Andrew Martens [mailto:martens.and...@gmail.com]
*Sent:* Monday, 22 June 2009 4:23 PM
*To:* Cheng, Wan (ATNF, Marsfield)
*Cc:* casper@lists.berkeley.edu
*Subject:* Re: [casper] about
high with the
data that caused the overflow but a lot earlier and is to used as an
indicator that an overflow occured 'somewhere' . I will implement the delays
properly when I have more time again so that it lines up correctly.
Regards
Andrew
2009/6/22 Andrew Martens martens.and...@gmail.com
Hi Wan
--
*From:* Andrew Martens [mailto:martens.and...@gmail.com]
*Sent:* Monday, 22 June 2009 8:48 PM
*To:* Cheng, Wan (ATNF, Marsfield)
*Cc:* casper@lists.berkeley.edu
*Subject:* Re: [casper] about the shift input of FFT
Hi Wan et al
The 'convert with overflow indication
with
overflow indication'.
Anyway, I could read the FFT output correctly now.
Thanks again.
Wan
--
*From:* Andrew Martens [mailto:martens.and...@gmail.com]
*Sent:* Monday, 22 June 2009 8:48 PM
*To:* Cheng, Wan (ATNF, Marsfield)
*Cc:* casper@lists.berkeley.edu
Hi
Note that there has already been work done in making it possible to use
Linux-64bit as the operating system of choice for the 11.1 toolflow (see
David George's email from a few days ago). This should solve these memory
issues as well as others (stability, block initialisation speed etc). The
Hi John
The FFT is a good place to optimise for various things. The ROACH has plenty
of multipliers in comparison to the iBOB so be sure to optimise for logic in
the FFT unless you are very short of multipliers and have logic to spare.
Complex multiplication can be done with a lot of adders and 3
Hi Wan
I am unable to understand the details of your question as there is not
enough information available in your email (axis labels, are you dividing
the power or voltage values by 4096 etc).
However, I shall explain the difference between the CASPER FFT and Matlab
FFT with respect to gain
Hi John
Some pointers on improving timing generally in ROACH.
Decrease the space your design occupies. Implement delays on data inputs to
multiplier cores in behavioural logic as these are absorbed by the DSP48E
core. Implement large adders and counters in DSP48Es. Use Truncation as your
-- Forwarded message --
From: Andrew Martens martens.and...@gmail.com
Date: 16 March 2010 14:51
Subject: Re: [casper] Simulink/Xilinx integration
To: Steve Maher stephen.f.ma...@nasa.gov
Hi Steve
As Jason has mentioned, going with Linux is choosing the path less traveled
within
Hi Chao-Te
To save on DSP48Es in the FFT try the following
Un-tick the 'Use DSP48s for adders' (uses the adders in DSP48 blocks to
implement the twiddle stage in the FFT). Should save you 4 DSP48Es per FFT
stage.
Set the 'Optimization Target' to 'Multipliers' (reduces the use of
multipliers in
Hi Dave
It may be time to copy our libraries to an mlib_devel_11_1 revision and
continue from there. ROACH2 uses Virtex6 and the 10.x and earlier tools do
not support it. Disadvantages are that a lot of library maintainers will be
working in mlib_devel_11_1 and bug fixes, changes etc may not make
Hi all
Please search the mail archives, there has been a thread discussing this
over the past few months. It is possible to manually turn off specific
warnings in Matlab and I have done so in my startup.m file so that I am not
flooded with unnecessary warnings. The thread discusses how to do
FWIW, I've noticed another related problem in the pfb_fir and pfb_fir_real
blocks. The mask callbacks for the TotalTaps parameter of these blocks
assign and use a variable named size. Unfortunately, this seems to wind
up in the global workspace and overrides the built-in size function. This
Hi Wan
The libraries available in subversion are out of date and may contain some
bugs as changes were being made before the move across to git.
The CASPER DSP and XPS libraries have moved to git repositories so you need
to install a git client to access the latest stuff. (apt-get install git in
Hi all
The casper_library.mdl file seems to be misaligned relative to the scripts.
The
scripts are trying to set mask parameters that don't exist and are failing.
I
may be wrong but the casper git repository seems to be broken at the moment.
Use the following to get a version that should work
Hi
To add to Jason's suggestions: Conversion latency = 3
The documentation on the FFT blocks at
http://casper.berkeley.edu/wiki/Block_Documentation is quite recent and
contains some suggestions and explanations.
Good luck
Regards
Andrew
Hi Danny
It looks like you may have run into a similar problem that we (and GMRT)
experienced a while ago. Basically, the clock and data coming from the iADC
were misaligned (off by 90 degrees if I recall correctly) and weird data
like this occurred at certain frequencies (and not at others).
Hi Daniel
Welcome to CASPER!
...
but then I receive a lot of messages of the type:
Warning: casper_library/Accumulators/qdr_vacc/acc_ctrl/rd_addr
is a parameterized link. To view, discard, or propagate the
changes for this link, use the Link Options menu item
In load_system at 41
In
Hi all
Just a follow up email relating to Danny's email from a while ago.
* The pfb_fir_real caused timing issues due to its adders and its convert.
Changing the adder latency to 4, then breaking the mask and init script, I
manually went into the adder blocks, changed the implentation from
Hi Laura
I have seen strange iBOB behaviour due to an incorrectly plugged in CX4
cable. It must have been bumped at some point and, although still plugged
in,
was causing strange behaviour. The iBOB would report being successfully
programmed but the LEDs would do strange things. Not sure if this
Hi Jonathan
To start we are looking closely at the FPGA resource utilization of large
PFBs. Something that probably is common knowledge amongst those experienced
in FX correlator design is that the demux factor drives the utilization much
faster than the size of the PFB. In that sense
Hi Mandana
fft_shift is set to 0x by default in tutorial 4 poco design. Any
other suggestions?
When I monitor my ADC input levels, they are about 4.6 bit used.
Ok, well that should rule out overflows from the FFT.
I assume that there is no clipping with terminated inputs?
At what
get to the ADC.
dan
On 03/01/2011 10:44 PM, Andrew Martens wrote:
Hi Mandana
fft_shift is set to 0x by default in tutorial 4 poco
design. Any other suggestions?
When I monitor my ADC input levels, they are about 4.6 bit used.
Ok, well that should rule out
Hi all
On 30 March 2011 16:14, Jack Hickish jackhick...@gmail.com wrote:
Hi Casperites,
After a long day of debugging an FFT spectrum yesterday, I got down to
basics and compared the output of the 8-pt direct fft block with matlab's
fft function. When I used random numbers as the inputs it
Hi all
Changes have eventually been made to the block allowing revision
control information to be embedded in your design.
The old revision_control block in Misc has been replaced with the
rcs block. This allows revision information about the application
and libraries to be embedded in the final
Hi Daniel
Sorry for the nasty surprise after all the hard work.
The good news is that I have very recently (Monday) compiled a design using
those library blocks and do not notice the problems you have.
There are a few things to do to figure out what the problem is;
1. Check that the block
Hi Wan
I did not see any capsper library update from git since last year august. Do
you immigrate the latest library to other server?
The main repository has not been updated for a while. If you are
looking for more recent changes use the repositories at;
Hi All
Most of the current major contributors/maintainers of the CASPER libraries
attended a telecon to resolve a couple of issues and discuss short to medium
term work to be done. It was rather long but there should be some interesting
developments to come in the following months.
The following
Hi Jesus
The sync input is not used by the ADC at all, it is passed
through to the FPGA. It is therefore not necessary to attach
anything to this port to acquire data using your ADC.
The sync input is typically attached to a PPS signal and used
as part of a synchronisation system where time is
Hi Mandana
It is important to ensure that sufficient signal is coming out after
requanisation to ensure
reasonable correlator efficiency while avoiding clipping. This
requires a calibration step that
can be done using autocorrelation products.
Thanks for the useful comments.
Is there any
Hi Jon
We have a system using 8 ROACHes for F-engines and 8 for X-engines. We
distribute the PPS to all F-engines using a digital pulse distribution
amplifier (the Timetech TT-10188 www.ptsyst.com/TT-10188-B.pdf). This pulse
originates from a GPS unit. We also use length-matched cables to ensure
Hi guys
See the thread below, it may help regarding the 'reading back zeros
problem'.
http://www.mail-archive.com/casper@lists.berkeley.edu/msg01938.html
Regards
Andrew
Hi Vikas
Does the code read back all zeros consistently after FPGA configuration?
Your problem may be related to the thread below;
http://www.mail-archive.com/casper@lists.berkeley.edu/msg01938.html
Regards
Andrew
On 24 September 2011 01:48, Vikas Asthana vikasf...@gmail.com wrote:
Hi Glenn,
Hi all
Various working groups were formed at the 2011 CASPER workshop. One of these
were for the toolflow,
libraries, software etc. Various decisions and actions were decided. This is
a list.
1. Test Suite
The current library test suite is to be updated. The current bit-for-bit
tests will
Hi Glenn
Regarding the test suite, one thing I've been thinking of that could help a
lot with designing test benches is to invest in some code (or blocks) for
the tedious boiler plate that is often needed for this work. One extremely
useful function would automatically extract sync in and
Hi Vikas
We are working on beamforming for the KAT-7 telescope here at SKA-SA.
The beamformer functionality will be in the same FPGAs as the X-engines
in our packetised correlator. The operation will be similar to delay
compensation/fringe tracking and the results from the different antennas
Hi Nimish
If you are not losing any packets (I assume you have a counter or
something in every packet to confirm this...?) then it seems that you
must be accumulating for longer than expected. This could be because of
a clock that is not running as fast as expected (as suggested by John),
or
Hi Jia
Is the whole first packet lost, or just part of it? I ask because the
snap block should capture any data after a trigger, and does not 'know'
about packets. I might expect a partial first packet, but not total
loss.
It may be that the first packet is not being transmitted or being lost
than that. We
are using iADC and want to sample at 1 GHz.
I would be glad to know if you have any suggestions to try.
Thanks again,
Nimish
On Tue, Nov 15, 2011 at 2:01 AM, Andrew Martens
martens.and...@gmail.com wrote:
Hi Nimish
If you are not losing any
https://calmail.berkeley.edu/manage/list/
On Wed, 2011-11-16 at 08:54 -0800, Sharath Raju wrote:
Please add me to the Casper mailing list. Thanks.
Regards,
Sharath Raju
.
Is there something else I could try ?
Is this related to fault in design file or python script?
Thanks.
-Vikas.
On Mon, Sep 26, 2011 at 2:18 AM, Andrew Martens
martens.and...@gmail.com wrote:
Hi Vikas
Does the code read back all zeros consistently after FPGA
Hi Laura
First off. The official stance taken by CASPER is that we recommend
installation on the Xilinx-supported operating systems (SUSE, RedHat
etc). These are often clunky to use, but allow us to approach Xilinx if
there is a problem. When running on another OS, it is unlikely that
Xilinx will
Hi Nimish
We have been making a lot of changes to the ROACH2 infrastructure in the
last few weeks. This includes fixes that improve timing scores
considerably (software registers were being connected so that the FPGA
clock was registering the value instead of the EPB clock and the EPB
clock
Hi Nimish
commit 3282865 just pushed to ska-sa github repo. ROACH2 related changes
should fix your timing issues.
Let us know if you have any problems.
Regards
Andrew
On Mon, 2012-03-05 at 15:38 -0500, Nimish Sane wrote:
Hi all,
We are using multiple shared bram yellow blocks in our FX
as
well — in particular, the shared bram block?
Thanks,
Nimish
On Tue, Mar 6, 2012 at 10:17 AM, Andrew Martens and...@ska.ac.za
wrote:
Hi Nimish
commit 3282865 just pushed to ska-sa github repo. ROACH2
related changes
should fix your timing
Hi Nimish
Assuming we have a software register connected to the KatADC atten0
input, how often/fast can we change the attenuation?
The change in value triggers an IIC operation using a controller in the
katADC yellow block. The rate at which you can change the
attenuatation/enable is thus
Hi Andrea
There was a time (v7 tools) when both the iBOB and ROACH were supported
by the toolflow. The Virtex5 architecture offers various optimisations
not available in Virtex2. These optimisations required setting up
various signal processing blocks in specific ways (e.g if a multiplier
is
Hi
Progress on toolflow (yellow blocks etc) support for ROACH2 can be found
at https://github.com/casper-astro/mlib_devel/issues/2
Regards
Andrew
Hi Ramesh, Dan
No, Jan's patch has not been applied to the the KAT branch. I shall add
it to the list of nice things to have but we are in the middle of
getting the toolflow ready for ROACH2 so it may have to wait a while.
Regards
Andrew
On Mon, 2012-03-26 at 14:20 -0700, Dan Werthimer wrote:
Hi Joe, all
There were additional errors
These two errors occurred multiple times:
Error: Block const encountered an error during execution of
xlLoadDynamicListContents. Some data may not have been re-loaded
correctly.
Error: Block manipulate encountered an error during execution of
Hi Jesus
To go into a lot of detail on the FFT would take a _lot_ of time (and is
not necessary for most users) so I will answer each of your questions
briefly and hope that you can 'look under mask' to get any details you
require.
I would like to know what signal processing scheme is
Hi John
1) add the inout choice to the mask pulldown
2) add it to the mask script, and check to make sure it's a good config
for the bits specified, and redraw the block with the extra direction
port.
3) modify xps_gpio.m to handle the inout case
4) Write/modify a vhdl module to implement
Hi Laura
Probably a silly question, but do you have Enable Large Tx Frames
enabled as a parameter option on the 10Ge core? The ~8000 data word
limit only applies when this option is chosen, otherwise it is a _lot_
smaller. When buffer overflows happen, bad things occur, the 10Ge core
does not
Hi all
My bad, I was thinking about receive, not transmit. Just got back from
holiday so my brain is probably not in gear yet, my opologies.
Regards
Andrew
On Mon, 2012-06-11 at 08:29 +0200, Andrew Martens wrote:
Hi Laura
Probably a silly question, but do you have Enable Large Tx Frames
Hey Tom
We recently found a bug in the FFT for a specific parameter set that
causes data corruption that includes overflows. If you use 'embedded' as
your multiplier implementation of choice you may have this bug.
Basically, in the twiddle_general_dsp48e block, the slice blocks are
configured
Hi Dale
On another topic, Andrew, you state that we can calculate the delays since we
know the position of the antennas and source.
Does anyone know an accurate way to find the location of GPS satellites? ...
Our system is not being used for satellites and I assume that stars have
better
Hi Jesus
There are two main types of delay in a system that combines signals from
two antennas produced by a source;
1. Delays that are produced by the geometry of the system. The physical
location of the source and antennas mean that there is a different path
length the signal produced by the
Hi Li Jian
I am including the casper list in the reply in case others find this
useful.
When I use dec_fir to design a bandpass filter I had meet many
questions.
I don't know how to configure dec_fir's coefficients.I could not get
more information about dec_fir from CASPER's webpage.
Checked around for git pull request but did not find one so did the
change myself. Untested as do not have access to an install with the
latest Xilinx version, could someone check it please at
https://github.com/ska-sa/mlib_devel/commit/b40ad47a84507770f8a480ecdedda2bde5ecc133
Regards
Andrew
On
Hi Nimish
However, the problem still remains with my main design. I believe it
has to do with number of software registers and shared brams in the
design.
At the moment the EPB bus from the PowerPC is connected to an OPB bus
(opb0 in your system.mhs). Each OPB bus can handle up to 32 devices
Hi Matt
I'm trying to compile an old design with a newly installed setup with
matlab 2011b/ise 13.4. The fft_init failed, so I replaced the old fft
blocks with new ones from the current casper library browser, but the
fft_init still doesn't compile:
A good way to test if the init scripts
trace: entering reorder_init
trace: reorder_init post same_state
trace: exiting reorder_init
trace: entering fft_init
trace: exiting fft_init
On Sat, Aug 18, 2012 at 12:38 PM, Andrew Martens and...@ska.ac.za wrote:
Hi Matt
I'm trying to compile an old design with a newly
: exiting fft_init
On Sat, Aug 18, 2012 at 12:38 PM, Andrew Martens and...@ska.ac.za wrote:
Hi Matt
I'm trying to compile an old design with a newly installed setup with
matlab 2011b/ise 13.4. The fft_init failed, so I replaced the old fft
blocks with new ones from the current casper
Hi Dave, Wes
We could probably write a little Wishbone-to-OPB module and plug that in
front of the OPB yellow blocks for some things. Messing with the
internals of yellow blocks that we don't have hardware for could be
dangerous e.g ADCs. Ideally people would help out with yellow blocks
they have
Hi Ricardo
I am trying to build a 2-pol spectrometer in a ROACH 1. I started with
the Casper mlib_devel PFB+FFT but I ran out of slices so I swap the
PFB for the one used at VEGAS (taken from the monroe_library_latest)
on the git repo.
Just to let you know in case you didn't that there are
Hi Arturo
It is possible to generate a correlator with data otuput through 1Gbit
RJ45 Ethernet?
We have 1 ROACH and 1 computer with no 10Gbe.
It is possible. You can write some software on the computer (look at the
python CORR package) that checks to see when the accumulator is done,
copies
Hi Kenneth
I get the following simulink error if I place a new fft block from the
library and try to set parameters.
Error:Error invoking object method
Error due to multiple causes. -- Error in 'new_adc_test/fft': Initialization
commands cannot be evaluated. -- Invalid object name:
Hey Ken
Problem is a bit hard to get my head around, I don't seem to be getting
the same results. It may be a version problem, I still am (rather
ashamedly) using a very old Matlab version. It would be cool if someone
with similar versions to you could try to replicate your results...
I will
post back
if you're still having trouble.
Regards
Paul
On 18 January 2013 17:02, Andrew Martens and...@ska.ac.za wrote:
Hey Ken
Problem is a bit hard to get my head around, I don't seem to be
getting
the same results. It may be a version problem, I still am
Hi Ken
There were some fixes that had not yet been pushed to the main casper
git repository (mostly to do with stale blocks). I have pulled them in
(commits 9940104 and 778d19f). Please check out the latest library and
see if that helps you.
Regards
Andrew
Hi
I did not commit this change because it's not backwards compatible.
I have noticed more and more instances of backward compatibility issues
lately as I am using older versions of the tools. At some point soon we
are going to be forced to make everyone upgrade to the latest tools if
they are
Hey
I haven't seen the Goertzel algorithm before, but it looks like a great
idea for this: we might be able to produce a coefficient DDS in just two
DSPs!
The Goertzel algorithm predates the FFT even and is used to calculate
sparse FFTs. It basically just calculates each bin individually.
Hi Dan
we used to use CORDIC for generating coefficients.
not sure how cordic comares to goertzel.
there are a few open source VHDL cordics.
Goertzel uses the coefficient factor of the previous calculation stage
to calculate the coefficient factor currently required i.e rotate the
previous
Hi
If we could figure-out a clean way of scripting mask generation, then we
could regenerate the entire library on-the-fly, which'd go a long way towards
compatibility across versions.
This is possible. It requires that the block itself be generated, as
well as the mask using scripts. The
Hi Katty
See this page for more information
https://casper.berkeley.edu/wiki/MSSGE_Toolflow_Setup
Cheers
Andrew
On Sat, 2013-02-02 at 10:33 -0300, katherine viviana cortes urbina
wrote:
Dear Casperites
I decided change to Matlab 2012b but I need to know what products
basics need Matlab
Hi Dave
It would be good to add an optional Latency parameter to the Shared BRAM
block and allow the user to select 1 (current value that does not use the
BRAMs optional output register) or 2 (new value that does use the BRAM's
optional output register). I think this would help ROACH2
Hi Nimish
Andrew, Your response makes it very clear. Perhaps, the description
enable gain block in the mask could be changed to something else
more intuitive in the future versions.
The name makes sense if you trace that parameter from the base verilog
but is probably not intuitive for a
Hi Jason
I'm having a hard time updating the .mdl file for tutorial1 after I
tried to update to the newest CASPER tools.
By 'CASPER tools' are you referring to recent git commits of the
Simulink libraries from the ska-sa repo? If so, I know what your problem
below is...
All the links to
Hi John
Hi all. When trying to use the shared bram block in a recent (march
15ish) version of the casper xps blockset from mlib_devel, we have a
problem. The munge_io block inside the yellow block doesn't work.
It has a bad parameter list. It ends up with a box in the corner
signifying
Hi Tim
Are you using one of the CASPER DAC yellow blocks?
You are also using dac1_clk and not dac0_clk - are you using 2 DAC boards?
Henno
To expand on what Henno has said, if you specify that you will be using
a clock source besides those derived from the onboard oscillator
(sys_clk,
Hi Ross
The guys at Berkeley and Ryan would probably have more detailed advice
(especially regarding hand-placement) but the following are some general
guidelines if trying to optimise timing from within System Generator;
1. Adding latency to an operation in System Generator results in the
Hi Ryan
Hey all, just an update on this: First, I reverted to an old copy of
the libraries -- it didn't work, but had a different problem. It
looks like after you have more than a certain number of yellow blocks
in use, the tools start using the opb2opb_lite pcore, which can be had
from the
Hi Ross
Solved - too much gain in the quant causing all the problems seen -
Need to work out why it had the effect it did but reducing it produces
a perfect spectrum.
We did see this when preparing for the last workshop. Tutorial 3 is set
up for a wideband noise input where the input power is
Hi Katty
This is running my designs: *first this is for modeinterleave *
root@roach:/boffiles# ./s1_2013_May_02_1157.bof
[1] 519
root@roach:/boffiles# ps
PID TTY TIME CMD
506 ttyS000:00:00 login
507 ttyS000:00:00 bash
519 ttyS000:00:00 s1_2013_May_02_
520 ttyS0
Hi Ioana, all
It turns out I was trying to use more BRAM's than we had payed for (well,
my design was nice and simple, except I had put two huge snaps. Once I
decreased the size of one, no problem)
I didn't expect the error message to take this form though
I'm not sure that these
Hi All
I have just completed a rather large overhaul of the CASPER FFT family.
Rigorous testing has yet to be performed but it works at the moment
and has been pushed to the ska-sa repo on github for early adopters/testers.
The main aim (and reason this email continues this thread) was to
Hi Dave
Do you have any utilization comparisons of old vs new?
Not yet, I hope to do a basic one soon though. Savings will depend on
use case. Also, you can optimise for resources in a few ways (DSPs vs
BRAMs when using fft_direct, logic vs BRAMS in the biplex stages and in
reset point
Hey Jason
When I try to set the Data Binary Point parameter in the Shared BRAM
block I get the error: Illegal parametrization: Binary point Binary
point must be less than or equal to the number of bits, X. X appears
to be the index of the Data Width rather than the actual value
selected by
)) on the output. It is easy to see channel swapping as
the output function is nice and smooth.
We're using the casper library:
[ptcs@ptcs /export/home/ptcs/scratch/guppi2/libraries/mlib_devel]$ git log -1
commit 6050c725f770f0bdb776fae107dc4fe26f7fce51
Merge: f50084e 0c15bf7
Author: Andrew Martens
Hi Rurik
I tried the recent changes to Shared BRAM on ska-sa but I ran into an
error during Update Diagram in munge_init.m resulting from commit
2c13dab where it's trying to index div_size which is just a integer.
Thanks for the fix :)
I
attach a patch which fixes this issue; however I'm
Hi Dave
Thanks for sending your test model. Since it was saved using a newer Simulink
version, I had to simulate it using a newer toolflow version.
Sorry about that.
Doing so did indeed show the FFT problem you described. I then re-simulated my
test model in the newer Simulink version
Hi Ryan
So I just finished a ROACH2 build, and everything from copy base
package through bitgen took almost 2 hours. It looks like this is
because I have 48 shared memories, plus about another 20
snapshots. The tools seem to be synthesizing each of these
separately.
I would expect
Hi Dave
The only way that the script could generate logic that would result in correct
data would be correct if;
1. The Relational block could get a latency of 1 when no latency was specified
i.e default operation has latency of 1 in that toolflow version.
You're right! That's exactly the
Hi Katty
Hi all,
When the number of parallel spectrometers increases when one decreases
the number of channels, but surprisingly, this increase is not very
significant, why resources not decreases significant from 32 to 2048
channels and where do the resources, FFt, PFB? and like to know
Hi Katty
Hi All,
I tested the scalability in the number of channels of existing digital
spectrometers but when the size of pfb and FFT are 2 ^15 pntos and
the other blocks as acc-cntrl and vacc. I have any error:
In the console of matlab:
Error using gen_xps_files (line 196)
The
Hi Tim
Was the following issue (see below) ever solved? I have exactly the same
problem with latest libraries at
https://github.com/ska-sa
Matlab R2012b
System Generator is 14.2.4415
Linux- Redhat
See below from Ken Treptow from Fermilab:
Tim Madden
I get the following simulink error if I
Hi Tim
I think the number of simultaneous streams refers to how many signals you
want to process in parallel in the FFT. I think it makes multiple parallel FFTs that
share twiddle factors.
I could have maybe used 'simultaneous polarisations' to be more
astronomy specific. Also, the way the
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